LTC1539IGW#TR [Linear]
LTC1539 - Dual High Efficiency, Low Noise, Synchronous Step-Down Switching Regulators; Package: SSOP; Pins: 36; Temperature Range: -40°C to 85°C;型号: | LTC1539IGW#TR |
厂家: | Linear |
描述: | LTC1539 - Dual High Efficiency, Low Noise, Synchronous Step-Down Switching Regulators; Package: SSOP; Pins: 36; Temperature Range: -40°C to 85°C 光电二极管 |
文件: | 总32页 (文件大小:336K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
LTC1538-AUX/ LTC1539
Dua l Hig h Effic ie nc y,
Lo w No ise , Sync hro no us
Ste p -Do wn Switc hing Re g ula to rs
U
FEATURES
DESCRIPTION
TheLTC®1538-AUX/LTC1539aredual,synchronous step-
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■
Maintains Constant Frequency at Low Output Currents
Dual N-Channel MOSFET Synchronous Drive
Programmable Fixed Frequency (PLL Lockable)
down switching regulator controllers which drive external
N-channel power MOSFETs in a phase-lockable fixed
frequencyarchitecture.TheAdaptivePowerTM outputstage
selectively drives two N-channel MOSFETs at frequencies
up to 400kHz while reducing switching losses to maintain
high efficiencies at low output currents.
Wide V Range: 3.5V to 36V Operation
IN
Ultrahigh Efficiency
Very Low Dropout Operation: 99% Duty Cycle
Low Dropout, 0.5A Linear Regulator for VPP
Generation or Low Noise Audio Supply
Built-In Power-On Reset Timer
Programmable Soft Start
Low-Battery Detector
Remote Output Voltage Sense
Foldback Current Limiting (Optional)
Pin Selectable Output Voltage
5V Standby Regulator Active in Shutdown: IQ < 200µA
Output Voltages from 1.19V to 9V
Available in 28- and 36-Lead SSOP Packages
An auxiliary 0.5A linear regulator using an external PNP
pass device provides a low noise, low dropout voltage
source. A secondary winding feedback control pin (SFB1)
guarantees regulation regardless of load on the main
output by forcing continuous operation.
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A 5V/20mA regulator, internal 1.19V reference and an
uncommitted comparator remain active when both con-
trollers are shut down. A power-on reset timer (POR) is
included which generates a signal delayed by 65536/fCLK
(typ 300ms) after the controller’s output is within 5% of
the regulated first voltage. Internal resistive dividers pro-
vide pin selectable output voltages with remote sense
capability on one of the two outputs.
U
APPLICATIONS
■
Notebook and Palmtop Computers, PDAs
Portable Instruments
Battery-Operated Devices
DC Power Distribution Systems
■
The operating current levels are user-programmable via
external current sense resistors. Wide input supply range
allows operation from 3.5V to 30V (36V maximum).
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, LTC and LT are registered trademarks of Linear Technology Corporation.
Adaptive Power is a trademark of Linear Technology Corporation.
U
5V STANDBY
TYPICAL APPLICATION
V
IN
5.2V TO 28V
C
IN
+
+
D
, CMDSH-3
D , CMDSH-3
B2
B1
4.7µF
22µF
35V
× 4
16V
V
PROG1
V
IN
INTV
CC
BOOST 1
TGL1
BOOST 2
TGL2
M1
M4
L2
10µH
TGS1
TGS2
M6*
M3*
L1
10µH
C
0.1µF
C
, 0.1µF
B1
B2
SW2
BG2
SW1
BG1
D2
MBR140T3
M5
D1
LTC1539
M2
MBR140T3
+
SENSE
2
2
+
1000pF
SENSE
1
R
–
SENSE2
SENSE
R
0.03Ω
SENSE1
0.03Ω
1000pF
V
OSENSE2
–
V
SENSE 1
V
3.3V
3.5A
OUT1
5V
OUT2
I
I
C
C
TH1
TH2
C1
C2
3.5A
+
1000pF
1000pF
C
220µF
10V
RUN/SS1
C
DSC
V
SGND PGND RUN/SS2
OUT1
PROG2
+
C
OUT
R
C
C
SS1
0.1µF
C
C
SS2
0.1µF
R
C
C2A
470pF
C1
10k
C1A
OSC
56pF
C2
10k
220µF
10V
220pF
1538 F01
M1, M2, M4, M5: Si4412DY
M3, M6: IRLML2803
*NOT REQUIRED FOR LTC1538-AUX BOLD LINES INDICATE HIGH CURRENT PATHS
Figure 1. High Efficiency Dual 5V/3V Step-Down Converter
1
LTC1538-AUX/ LTC1539
W W
U W
ABSOLUTE MAXIMUM RATINGS
AUXON, PLLIN, SFB1,
Input Supply Voltage (V )....................... 36V to –0.3V
IN
RUN/SS1, RUN/SS2, LBI, Voltages ......... 10V to –0.3V
Peak Output Current < 10µs (TGL1, 2, BG1, 2)......... 2A
Peak Output Current < 10µs (TGS1, 2) .............. 250mA
INTVCC Output Current ........................................ 50mA
Operating Temperature Range
LTC1538-AUXCG/LTC1539CGW............ O°C to 70°C
LTC1538-AUXIG/LTC1539IGW .......... –40°C to 85°C
Junction Temperature (Note 1)............................125°C
Storage Temperature Range ................ –65°C to 150°C
Lead Temperature (Soldering, 10 sec).................300°C
Topside Driver Voltage (BOOST 1, 2) ...... 42V to –0.3V
Peak Switch Voltage > 10µs (SW 1, 2) ... V + 5V to – 5V
IN
EXTVCC Voltage........................................ 10V to –0.3V
POR1, LBO Voltages ................................ 12V to –0.3V
AUXFB Voltage ........................................ 20V to –0.3V
AUXDR Voltage........................................ 28V to –0.3V
SENSE+ 1, SENSE+ 2, SENSE– 1, SENSE– 2,
VOSENSE2 Voltages ................... INTV + 0.3V to –0.3V
CC
V
PROG1, VPROG2 Voltages .................... INTV to –0.3V
CC
PLL LPF, ITH1, ITH2 Voltages ................... 2.7V to –0.3V
U
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PACKAGE/ORDER INFORMATION
TOP VIEW
ORDER
ORDER
PART NUMBER
PART NUMBER
TOP VIEW
1
2
PLL LPF
PLLIN
36
35
34
RUN/SS1
+
SENSE 1
1
2
TGL1
SW1
28
27
26
25
24
23
22
21
20
19
18
17
16
15
BOOST 1
–
3
BOOST 1
SENSE 1
RUN/SS1
+
LTC1538CG-AUX
LTC1538IG-AUX
LTC1539CGW
LTC1539IGW
4
33 TGL1
32 SW1
V
PROG1
3
V
IN
SENSE
1
1
–
5
I
TH1
4
BG1
SENSE
V
6
TGS1
31
30
29
28
27
26
25
POR1
5
INTV /5V
CC
PROG1
7
V
IN
C
OSC
6
PGND
BG2
I
TH1
8
BG1
SGND
LBI
7
C
OSC
9
INTV /5V
CC
8
EXTV
CC
SGND
SFB1
10
11
12
13
14
15
16
17
18
PGND
BG2
LBO
SFB1
9
SW2
10
11
12
13
14
TGL2
I
TH2
EXTV
CC
I
TH2
BOOST 2
AUXON
AUXFB
AUXDR
V
OSENSE2
–
24 TGS2
23 SW2
V
PROG2
SENSE
2
2
+
V
OSENSE2
SENSE
–
TGL2
22
21
20
19
SENSE 2
RUN/SS2
+
BOOST 2
AUXON
AUXFB
SENSE 2
G PACKAGE
28-LEAD PLASTIC SSOP
RUN/SS2
AUXDR
TJMAX = 125°C, θJA = 95°C/ W
GW PACKAGE
36-LEAD PLASTIC SSOP
JMAX = 125°C, θJA = 85°C/ W
T
Consult factory for Military grade parts.
2
LTC1538-AUX/ LTC1539
ELECTRICAL CHARACTERISTICS TA = 25°C, V = 15V, VRUN/SS1,2 = 5V unless otherwise noted.
IN
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Main Control Loops
I
V
Feedback Current
V
V
Pins Open (Note 2)
10
50
nA
IN OSENSE2
PROG1, PROG2
V
OUT1,2
Regulated Output Voltage
1.19V (Adjustable) Selected
3.3V Selected
(Note 2)
V
V
V
Pins Open
= 0V
●
●
●
1.178
3.220
4.900
1.19
3.30
5.00
1.202
3.380
5.100
V
V
V
PROG1, PROG2
V
PROG1, PROG2
5V Selected
V
V
= INTV
PROG1, PROG2 CC
V
Reference Voltage Line Regulation
Output Voltage Load Regulation
V
= 3.6V to 20V (Note 2), V Pins Open
PROG1,2
0.002
0.01
%/V
LINEREG1,2
IN
V
I
Sinking 5µA (Note 2)
Sourcing 5µA
●
●
0.5
–0.5
0.8
–0.8
%
%
LOADREG1,2
TH1,2
I
TH1,2
V
Secondary Feedback Threshold
Secondary Feedback Current
Output Overvoltage Lockout
V
Ramping Negative
= 1.5V
●
1.16
1.24
1.19
–1
1.22
–2
V
µA
V
SFB1
SFB1
I
V
SFB1
SFB1
–
V
OVL
V
Pin Open, SENSE 1 and V Pins
OSENSE2
1.28
1.32
PROG1,2
I
V
Input Current
0.5V > V
PROG1,2
–3
3
–6
6
µA
µA
PROG1,2
PROG1,2
INTV – 0.5V < V
< INTV
CC
CC
PROG1,2
I
Q
Input DC Supply Current
Normal Mode
EXTV = 5V (Note 3)
CC
3.6V < V < 30V, V
= 0V
320
70
µA
µA
IN
AUXON
Shutdown
V
= 0V, 3.6V < V < 15V
200
2
RUN/SS1,2
IN
V
Run Pin Threshold
●
0.8
1.5
1.3
3
V
µA
RUN/SS1,2
I
Soft Start Current Source
Maximum Current Sense Threshold
V
= 0V
4.5
180
RUN/SS1,2
RUN/SS1,2
∆V
V
= 0V, 5V V = Pins Open
PROG1,2
130
150
mV
SENSE(MAX)
OSENSE1,2
TGL1, 2 t , t
TGL1, TGL2 Transition Time
Rise Time
r
f
C
C
LOAD
= 3000pF
= 3000pF
50
50
150
150
ns
ns
LOAD
Fall Time
TGS1, 2 t , t
TGS1, TGS2 Transition Time
Rise Time
r
f
C
C
LOAD
= 500pF
= 500pF
100
50
150
150
ns
ns
LOAD
Fall Time
BG1, 2 t , t
BG1, BG2 Transition Time
Rise Time
r
f
C
C
LOAD
= 3000pF
= 3000pF
50
50
150
150
ns
ns
LOAD
Fall Time
Internal V Regulator –5V Standby
CC
V
Internal V Voltage
6V < V < 30V, V = 4V
EXTVCC
●
●
4.8
4.5
5.0
–0.2
170
4.7
5.2
–1
V
%
INTVCC
CC
IN
V
LDO
INT
INTV Load Regulation
INTV = 20mA, V
EXTVCC
= 4V
= 5V
CC
CC
V
LDO
EXT
EXTV Voltage Drop
INTV = 20mA, V
EXTVCC
300
mV
V
CC
CC
V
EXTVCC
EXTV Switchover Voltage
INTV = 20mA, EXTV Ramping Positive
CC CC
CC
Oscillator and Phase-Locked Loop
f
Oscillator Frequency
VCO High
C
= 100pF, LTC1539: PLL LPF = 0V (Note 4)
112
200
125
240
138
kHz
kHz
OSC
OSC
LTC1539, V
= 2.4V
PLLLPF
R
PLLIN
PLLIN Input Resistance
50
kΩ
I
Phase Detector Output Current
Sinking Capability
LTC1539
< f
PLLLPF
f
10
10
15
15
20
20
µA
µA
PLLIN OSC
Sourcing Capability
f
> f
PLLIN OSC
Power-On Reset
V
POR1 Saturation Voltage
I
V
= 1.6mA, V
= 1V,
0.6
0.2
1
1
V
SATPOR1
POR1
OSENSE1
Pins Open
PROG1
I
POR1 Leakage
V
= 12V, V
= 1.19V, V Pin Open
PROG1
µA
LPOR1
POR1
OSENSE1
V
THPOR1
POR1 Trip Voltage
V
Pin Open % of V
PROG1 REF
V
Ramping Negative
Pin Open
PROG1
–11
–7.5
–4
%
OSENSE1
t
POR1 Delay
V
65536
Cycles
DPOR1
3
LTC1538-AUX/ LTC1539
ELECTRICAL CHARACTERISTICS TA = 25°C, V = 15V, VRUN/SS1,2 = 5V unless otherwise noted.
IN
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Low-Battery Comparator
V
LBO Saturation Voltage
LBO Leakage
I
= 1.6mA, V = 1.1V
0.6
0.01
1.19
1
1
1
V
SATLBO
LBO
LBI
I
V
= 12V, V = 1.4V
●
●
●
µA
V
LLBO
LBO
LBI
V
THLB1
LBI Trip Voltage
LBI Input Current
LBO Hysteresis
High to Low Transition on LBO
= 1.19V
1.16
1.22
50
I
V
nA
mV
INLB1
LBI
V
HYSLBO
20
Auxiliary Regulator/Comparator
I
AUXDR Current
V
EXTVCC
= 0V
AUXDR
Max Current Sinking Capability
Control Current
Leakage when OFF
V
= 4V, V
= 1.0V, V
AUXON
= 1.5V, V
AUXON
= 5V
= 5V
10
15
1
0.01
mA
µA
µA
AUXDR
AUXFB
V
= 5V, V
5
1
AUXDR
AUXFB
V
AUXDR
= 24V, V
= 1.5V, V = 0V
AUXON
AUXFB
I
AUXFB Input Current
AUXON Input Current
AUXON Trip Voltage
AUXDR Saturation Voltage
AUXFB Voltage
V
= 1.19V, V = 5V
AUXON
0.01
0.01
1.19
0.4
1
µA
µA
V
INAUXFB
AUXFB
I
V
AUXON
= 5V
1
INAUXON
V
V
AUXDR
= 4V, V = 1V
AUXFB
1.0
1.4
0.8
THAUXON
V
I
= 1.6mA, V
= 1V, V = 5V
AUXON
V
SATAUXDR
AUXDR
AUXFB
V
V
= 5V, 11V < V < 24V (Note 5)
AUXDR
●
●
11.5
1.14
12.00
1.19
12.5
1.24
V
V
AUXFB
AUXON
V
AUXON
= 5V, 3V < V
< 7V
AUXDR
V
AUXFB Divider Disconnect Voltage
V
AUXON
= 5V (Note 5); Ramping Negative
7.5
8.5
9.5
V
THAUXDR
The
● denotes specifications which apply over the full operating
Note 3: Dynamic supply current is higher due to the gate charge being
temperature range.
delivered at the switching frequency. See Applications Information.
Note 1: T is calculated from the ambient temperature T and power
Note 4: Oscillator frequency is tested by measuring the C charge and
J
A
OSC
dissipation P according to the following formulas:
discharge current (I ) and applying the formula:
D
OSC
8
-1
–1
f
(kHz) = 8.4(10 )[C (pF) + 11] (1/I
+ 1/I
)
LTC1538CG-AUX: T = T + (P )(95°C/W)
OSC
OSC
CHG
DISC
J
A
D
LTC1539CGW: T = T + (P )(85°C/W)
Note 5: The auxiliary regulator is tested in a feedback loop which servos
to the balance point for the error amplifier. For applications with
J
A
D
V
AUXFB
Note 2: The LTC1538-AUX and LTC1539 are tested in a feedback loop
which servos V to the balance point for the error amplifier
V
AUXDR
> 9.5V, V
uses an internal resistive divider. See Applications
AUXFB
OSENSE1,2
Information section.
(V
= 1.19V).
ITH1,2
4
LTC1538-AUX/ LTC1539
W
U
TYPICAL PERFORMANCE CHARACTERISTICS
Efficiency vs Input Voltage:
VOUT = 3.3V
Efficiency vs Input Voltage:
OUT = 5V
V
Efficiency vs Load Current
100
100
95
90
85
80
75
70
100
95
90
85
80
75
70
V
IN
= 10V
V
OUT
= 3.3V
V
OUT
= 5V
95
90
85
80
75
70
65
60
55
50
V
OUT
= 5V
R
SENSE
= 0.33Ω
I
= 1A
LOAD
I
= 1A
LOAD
CONTINUOUS
MODE
I
= 100mA
LOAD
Burst ModeTM
OPERATION
I
= 100mA
LOAD
Adaptive PowerTM
MODE
0.001
0.01
0.1
1
10
0
10
15
20
25
30
0
10
15
20
25
30
5
5
LOAD CURRENT (A)
INPUT VOLTAGE (V)
INPUT VOLTAGE (V)
1538/39 • G03
1538/39 • G02
1538/39 • G01
V – VOUT Dropout Voltage vs
Load Current
IN
Load Regulation
VITH Pin Voltage vs Output Current
0
0.5
0.4
0.3
0.2
0.1
3.0
2.5
R
V
OUT
= 0.033Ω
DROP OF 5%
R
= 0.033Ω
SENSE
SENSE
–0.25
–0.50
–0.75
–1.00
–1.25
–1.50
2.0
1.5
1.0
0.5
0
Burst Mode
OPERATION
CONTINUOUS/
Adaptive Power
MODE
0
0
0.5
1.0
1.5
2.0
2.5
3.0
0
1.0
1.5
2.0
2.5
3.0
0.5
0
10 20 30 40 50 60 70 80 90 100
OUTPUT CURRENT (%)
LOAD CURRENT (A)
LOAD CURRENT (A)
1538/39 • G04
1538/39 • G05
1538/39 • G06
Input Supply Current
vs Input Voltage
INTVCC Regulation
vs INTVCC Load Current
EXTVCC Switch Drop
vs INTVCC Load Current
300
200
100
0
2.5
2.0
1.5
1.0
100
80
2
EXTV = 0V
CC
70°C
25°C
1
0
5V, 3.3V OFF
5V STANDBY
70°C
25°C
60
–45°C
5V, 3.3V ON
40
5V OFF, 3.3V ON
–1
–2
0.5
0
20
0
5V ON, 3.3V OFF
0
5
10
15
20
25
30
0
10
15
20
25
30
20
5
0
30
40
50
10
INPUT VOLTAGE (V)
INTV LOAD CURRENT (mA)
INTV LOAD CURRENT (mA)
CC
CC
1538/39 • G09
LTC1538/39 • TPC07
1538/39 • G08
Adaptive Power and Burst Mode are trademarks of Linear Technology Corporation.
5
LTC1538-AUX/ LTC1539
W
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TYPICAL PERFORMANCE CHARACTERISTICS
Normalized Oscillator Frequency
vs Temperature
RUN/SS Pin Current vs
Temperature
SFB1 Pin Current vs
Temperature
10
5
0
–0.25
–1.50
–0.75
4
3
2
1
f
O
–1.00
–1.25
–1.50
–5
0
–10
60
TEMPERATURE (°C)
110 135
–40 –15 10
35
60
85 110 135
60
TEMPERATURE (°C)
110 135
–40 –15
10
35
85
–40 –15
10
35
85
TEMPERATURE (°C)
1538/39 • G11
1538/39 • G10
1538/39 • G12
Maximum Current Comparator
Threshold Voltage vs Temp
Transient Response
Transient Response
154
152
150
148
V
VOUT
50mV/DIV
OUT
50mV/DIV
1538/39 • G14
1538/39 • G15
ILOAD = 50mA to 1A
ILOAD = 1A to 3A
146
–40 –15 10
35
60
85 110 135
TEMPERATURE (°C)
1538/39 • G13
Auxiliary Regulator Load
Regulation
Burst Mode Operation
Soft Start: Load Current vs Time
12.2
12.1
12.0
EXTERNAL PNP: 2N2907A
VOUT
20mV/DIV
RUN/SS
5V/DIV
INDUCTOR
CURRENT
1A/DIV
VOUT
200mV/DIV
11.9
11.8
11.7
1538/39 • G16
1538/39 • G17
ILOAD = 50mA
0
40
80
120
160
200
AUXILIARY LOAD CURRENT (mA)
1538/39 • G18
6
LTC1538-AUX/ LTC1539
W
U
TYPICAL PERFORMANCE CHARACTERISTICS
Auxiliary Regulator Sink
Current Available
Auxiliary Regulator PSRR
100
90
80
70
60
50
40
30
20
10
0
20
I
= 10mA
L
15
10
5
I
= 100mA
L
0
0
2
4
6
8
10 12 14 16
10
100
1000
AUX DR VOLTAGE (V)
FREQUENCY (kHz)
1538/39 • G20
1538/39 • G19
U
U
U
PIN FUNCTIONS
V : Main Supply Pin. Must be closely decoupled to the
IC’s signal ground pin.
SGND:SmallSignalGround.Commontobothcontrollers,
must be routed separately from high current grounds to
the (–) terminals of the COUT capacitors.
IN
INTV /5V STANDBY: Output of the Internal 5V Regulator
CC
and the EXTVCC Switch. The driver and control circuits are
powered from this voltage. Must be closely decoupled to
power ground with a minimum of 2.2µF tantalum or
electrolytic capacitor. The INTVCC regulator remains on
when both RUN/SS1 and RUN/SS2 are low. Refer to the
LTC1438/LTC1439 for applications which do not require a
5V standby regulator.
PGND: Driver Power Ground. Connects to sources of
bottom N-channel MOSFETs and the (–) terminals of C .
IN
SENSE– 1, SENSE– 2: Connects to the (–) input for the
current comparators. SENSE– 1 is internally connected to
the first controllers VOUT sensing point preventing true
remote output voltage sensing operation. The first con-
troller can only be used as a 3.3V or 5.0V regulator
controlledbytheVPROG1 pin. Thesecondcontrollercanbe
set to a 3.3V, 5.0V or an adjustable regulator controlled by
the VPROG2 pin (see Table 1).
EXTV : External Power Input to an Internal Switch. This
CC
switch closes and supplies INTVCC, bypassing the internal
low dropout regulator whenever EXTV is higher than 4.8V.
CC
Connect this pin to VOUT of the controller with the higher
Table 1. Output Voltage Table
output voltage. Do not exceed 10V on this pin. See EXTV
CC
LTC1538-AUX
LTC1539
connection in Applications Information section.
CONTROLLER 1
CONTROLLER 2
5V or 3.3V Only, Secondary Feedback Loop
Adjustable Only
Remote Sensing
5V/3.3V/Adjustable
Remote Sensing
POR1 Output
BOOST1, BOOST2:Supplies totheTopsideFloatingDrivers.
The bootstrap capacitors are returned to these pins. Voltage
swing at these pins is from INTV to V + INTV .
CC
IN
CC
SW1, SW2: Switch Node Connections to Inductors. Volt-
age swing at these pins is from a Schottky diode (external)
voltage drop below ground to V .
IN
7
LTC1538-AUX/ LTC1539
U
U
U
PIN FUNCTIONS
SENSE+ 1, SENSE+ 2: The (+) Input to Each Current
Comparator. Built-in offsets between SENSE– 1 and
SENSE+ 1 pins in conjunction with RSENSE1 set the current
trip threshold (same for second controller).
BG1, BG2: High Current Gate Drive Outputs for Bottom N-
Channel MOSFETs. Voltage swing at these pins is from
ground to INTV .
CC
SFB1: SecondaryWindingFeedbackInput. This inputacts
only on the first controller and is normally connected to a
feedback resistive divider from the secondary winding.
Pulling this pin below 1.19V will force continuous syn-
chronous operation forthe first controller. This pinshould
V
OSENSE2:Receives theremotelysensedfeedbackvoltagefor
the second controller either from the output directly or from
an external resistive divider across the output . The V
PROG2
pin determines which point. VOSENSE2 must connect to.
be tied to: ground to force continuous operation; INTV
CC
V
PROG1, VPROG2: Programs Internal Voltage Attenuators
in applications that don’t use a secondary winding; and a
resistive divider from the output in applications using a
secondary winding.
for Output Voltage Sensing. The voltage sensing for the
first controller is internally connected to SENSE– 1 while
the VOSENSE2 pin allows for remote sensing for the second
controller. For VPROG1, VPROG2 < VINTVCC/3, the divider is
POR1: This output is a drain of an N-channel pull-down.
This pin sinks current when the output voltage of the first
controller drops 7.5% below its regulated voltage and re-
leases 65536 oscillator cycles after the output voltage of the
firstcontrollerrisestowithin–5%valueofitsregulatedvalue.
The POR1 output is asserted when RUN/SS1 and RUN/SS2
set for an output voltage of 3.3V. With VPROG1
,
V
> VINTVCC/1.5 the divider is set for an output
PROG2
voltageof5V. LeavingVPROG2 open(DC)allows theoutput
voltage of the second controller to be set by an external
resistive divider connected to VOSENSE2
.
are both low, independent of the V
.
OUT1
COSC: External capacitor COSC from this pin to ground sets
the operating frequency.
LBO:This outputis adrainofanN-channelpull-down.This
pin will sink current when the LBI pin goes below 1.19V
irrespective of the RUN/SS pin voltage.
ITH1, ITH2: Error Amplifier Compensation Point. Each as-
sociated current comparator threshold increases with this
control voltage.
LBI: The (+) input of a comparator which can be used as
a low-battery voltage detector irrespective of the RUN/SS
pin voltage. The (–) input is connected to the 1.19V
internal reference.
RUN/SS1, RUN/SS2: Combination of Soft Start and RUN
Control Inputs. A capacitor to ground at each of these pins
sets the ramp time to full current output. The time is
approximately 0.5s/µF. Forcing either of these pins below
1.3V causes the IC to shut down the circuitry required for
that particular controller. Forcing both of these pins below
1.3V causes the device to shut down both controllers,
leaving the 5V standby regulator, internal reference and a
comparator active. Refer to the LTC1438/LTC1439 for appli-
cations which do not require a 5V standby regulator.
PLLIN: External Synchronizing Input to Phase Detector.
This pin is internally terminated to SGND with 50kΩ. Tie
this pin to SGND in applications which do not use the
phase-locked loop.
PLL LPF: Output of Phase Detector and Control Input of
Oscillator. Normally a series RC lowpass filter network is
connected from this pin to ground. Tie this pin to SGND in
applications which do not use the phase-locked loop. Can
be driven by a 0V to 2.4V logic signal for a frequency
shifting option.
TGL1, TGL2: High Current Gate Drives for Main Top
N-Channel MOSFET. These are the outputs of floating
drivers with a voltage swing equal to INTVCC superim-
posed on the switch node voltage SW1 and SW2.
AUXFB: Feedback Input to the Auxiliary Regulator/Com-
TGS1, TGS2: Gate Drives for Small Top N-Channel parator. When used as a linear regulator, this input can
MOSFET. These are the outputs of floating drivers with a
voltage swing equal to INTVCC superimposed on the
switch node voltage SW. Leaving TGS1 or TGS2 open
invokes Burst Mode operation for that controller.
either be connected to an external resistive divider or
directly to the collector of the external PNP pass device for
12V operation. When used as a comparator, this is the
8
LTC1538-AUX/ LTC1539
U
U
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PIN FUNCTIONS
noninverting input of a comparator whose inverting input
is tied to the internal 1.19V reference. See Auxiliary Regu-
lator Application section.
AUXDR: Open Drain Output of the Auxiliary Regulator/
Comparator. The base of an external PNP device is con-
nected to this pin when used as a linear regulator. An
external pull-up resistor is required for use as a compara-
tor. A voltage > 9.5V on AUXDR causes the internal 12V
resistivedividertobeconnectedinseries withtheAUXFBpin.
AUXON: Pulling this pin high turns on the auxiliary regu-
lator/comparator. The threshold is 1.19V. This is a conve-
nient linear power supply logic-controlled on/off input.
U
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FUNCTIONAL DIAGRA
LTC1539 shown, see specific package pinout for availability of specific functions.
V
IN
INTV
CC
2.4V
PLLIN**
BOOST
TGL
DUPLICATE FOR SECOND CONTROLLER CHANNEL
PHASE
DETECTOR
f
IN
D
B
50k
PLL LPF**
R
LP
DROPOUT
DETECTOR
C
OSC
C
LP
SFB
C
B
OSCILLATOR
S
Q
Q
C
OSC
R
POR1**
TGS**
SW
V
FB1
POWER-ON
RESET
SWITCH
LOGIC
0.6V
+
–
1.11V
SHUTDOWN
LBI**
BATTERY
SENSE
•
INTV
CC
–
LBO**
–
BG
I1
•
+
+
+
+
C
PGND
IN
+
–
+
C
OUT
AUXON
INTV
CC
R
V
SEC
SENSE
–
9V
–
I2
–
8k
+
30k
–
AUXDR
AUXFB
SENSE
V
LDO
+
+
SENSE
4k
320k
61k
180k
90.8k
10k
V
*
OSENSE
V
FB
+
V
OUT
+
–
EA
Ω
+
g
m
= 1m
C
SEC
V
PROG
*
1.19V
REF
+
SFB
SFB1*
119k
V
REF
–
+
–
1µA
V
IN
OV
†
V
IN
D
FB
4.8V
+
–
1.28V
1.19V
5V LDO
REGULATOR
C
C
3µA
I
TH
EXTV
CC
SHUTDOWN
R
C
RUN
SOFT START
INTV
CC
6V
RUN/SS
+
SGND
C
SS
INTERNAL
SUPPLY
†FOLDBACK CURRENT LIMITING OPTION
BOLD LINES INDICATE HIGH CURRENT PATHS
1438 FD
*NOT AVAILABLE ON BOTH CHANNELS
**NOT AVAILABLE ON LTC1538-AUX
9
LTC1538-AUX/ LTC1539
U
(Refer to Functional Diagram)
OPERATION
Main Control Loop
Comparator OV guards against transient overshoots
> 7.5% by turning off the top MOSFET and keeping it off
until the fault is removed.
The LTC1538-AUX/LTC1539 use a constant frequency,
current mode step-down architecture. During normal op-
eration, the top MOSFET is turned on each cycle when the
oscillator sets the RS latch and turned off when the main
current comparator I1 resets the RS latch. The peak
inductor current at which I1 resets the RS latch is con-
trolled by the voltage on the ITH1 (ITH2) pin, which is the
Low Current Operation
Adaptive Power Mode allows the LTC1539 to automati-
cally change between two output stages sized for different
load currents. The TGL1 (TGL2) and BG1 (BG2) pins drive
large synchronous N-channel MOSFETs for operation at
high currents, while the TGS1 (TGS2) pin drives a much
smaller N-channel MOSFET used in conjunction with a
Schottky diode for operation at low currents. This allows
the loop to continue to operate at normal operating fre-
quencyas theloadcurrentdecreases withoutincurringthe
large MOSFET gate charge losses. If the TGS1 (TGS2) pin
is left open, the loop defaults to Burst Mode operation in
which the large MOSFETs operate intermittently based on
load demand. Adaptive Power mode provides constant
frequency operation down to approximately 1% of rated
load current. This results in an order of magnitude reduc-
tion of load current before Burst Mode operation com-
mences. Without the small MOSFET (ie: no Adaptive
Power mode) the transition to Burst Mode operation is
approximately 10% of rated load current. The transition to
low current operation begins when comparator I2 detects
current reversal and turns off the bottom MOSFET. If the
voltage across RSENSE does not exceed the hysteresis of
I2(approximately20mV)foronefullcycle, thenonfollow-
ing cycles the top drive is routed to the small MOSFET at
the TGS1 (TGS2) pin and the BG1 (BG2) pin is disabled.
This continues until an inductor current peak exceeds
20mV/RSENSE or the ITH1 (ITH2) voltage exceeds 0.6V,
either of which causes drive to be returned to the TGL1
(TGL2) pin on the next cycle.
output of each error amplifier (EA). The V
pin,
PROG1
described in the Pin Functions, allows the EA to receive a
selectively attenuated output feedback voltage VFB1 from
the SENSE– 1 pin while VPROG2 and VOSENSE2 allow EA to
receive an output feedback voltage VFB2 from either inter-
nal or external resistive dividers on the second controller.
When the load current increases, it causes a slight de-
crease in V relative to the 1.19V reference, which in turn
FB
causes the ITH1 (ITH2) voltage to increase until the average
inductor current matches the new load current. After the
large top MOSFET has turned off, the bottom MOSFET is
turnedonuntileithertheinductorcurrentstarts toreverse,
as indicated by current comparator I2, or the beginning of
the next cycle.
The top MOSFET drivers are biased from floating boot
strap capacitor CB, which normally is recharged during
each Off cycle. When V decreases to a voltage close to
VOUT, however, the loop may enter dropout and attempt to
turn on the top MOSFET continuously. The dropout detec-
tor counts the number of oscillator cycles that the top
MOSFET remains on and periodically forces a brief off
period to allow CB to recharge.
IN
The main control loop is shut down by pulling the RUN/
SS1 (RUN/SS2) pin low. Releasing RUN/SS1 (RUN/SS2)
allows an internal 3µA current source to charge soft start
capacitor CSS. When CSS reaches 1.3V, the main control
loop is enabled with the ITH1 (ITH2) voltage clamped at
approximately 30% of its maximum value. As CSS contin-
ues to charge, ITH1 (ITH2) is gradually released allowing
normal operation to resume. When both RUN/SS1 and
RUN/SS2 are low, all LTC1538-AUX/LTC1539 functions
areshutdownexceptforthe5Vstandbyregulator, internal
referenceandacomparator.RefertotheLTC1438/LTC1439
for applications which do not require a 5V standby regulator.
Twoconditions canforcecontinuous synchronous opera-
tion, even when the load current would otherwise dictate
low current operation. One is when the common mode
–
voltage of the SENSE+ 1 (SENSE+ 2) and SENSE 1
(SENSE– 2) pins are below 1.4V, and the other is when the
SFB1 pin is below 1.19V. The latter condition is used to
assistinsecondarywindingregulation,as describedinthe
Applications Information section.
10
LTC1538-AUX/ LTC1539
U
(Refer to Functional Diagram)
OPERATION
Frequency Synchronization
The AUX block can be used as a comparator having its
inverting input tied to the internal 1.19V reference. The
AUXDR pin is used as the output and requires an external
pull-up to a supply of less than 8.5V in order to inhibit the
invoking of the internal resistive divider.
A Phase-Locked Loop (PLL) is available on the LTC1539
to allow the oscillator to be synchronized to an external
source connected to the PLLIN pin. The output of the
phase detector at the PLL LPF pin is also the control input
of the oscillator, which operates over a 0V to 2.4V range
corresponding to –30% to 30% in frequency. When
locked, the PLL aligns the turn-on of the top MOSFET to
the rising edge of the synchronizing signal. When PLLIN
is left open, PLL LPF goes low, forcing the oscillator to
minimum frequency.
INTVCC/EXTV Power
CC
Power for the top and bottom MOSFET drivers and most
of the other LTC1538-AUX/LTC1539 circuitry is derived
from the INTV pin. The bottom MOSFET driver supply is
CC
also connected to INTVCC. When the EXTVCC pin is left
open,aninternal5Vlowdropoutregulatorsupplies INTV
CC
Power-On Reset
power. If EXTVCC is taken above 4.8V, the 5V regulator is
turned off and an internal switch is turned on to connect
EXTVCC to INTVCC. This allows the INTVCC power to be
derived from a high efficiency external source such as the
output of the regulator itself or a secondary winding, as
described in the Applications Information section.
The POR1 pin is an open drain output which pulls low
when the main regulator output voltage of the LTC1539
first controller is out of regulation. When the output
voltage rises to within 5% of regulation, a timer is started
which releases POR1 after 216 (65536) oscillator cycles.
The 5V/20mA INTV regulator can be used as a standby
CC
Auxiliary Linear Regulator
regulator when the two controllers are in shutdown or
when either or both controllers are on. Irrespective of the
signals on the RUN/SS pins, the INTVCC pin will follow the
voltageappliedtotheEXTVCC pinwhenthevoltageapplied
to the EXTVCC pin is taken above 4.8V. The externally
applied voltage is required to be less than the voltage
The auxiliary linear regulator in the LTC1538-AUX and
LTC1539controls anexternalPNPtransistorforoperation
up to 500mA. A precise internal AUXFB resistive divider is
invoked when the AUXDR pin is above 9.5V to allow
regulated 12V VPP supplies to be easily implemented.
When AUXDR is below 8.5V an external feedback divider
may be used to set other output voltages. Taking the
AUXON pin low shuts down the auxiliary regulator provid-
ing a convenient logic-controlled power supply.
applied to the V pin at all times, even when both control-
IN
lers are shut down. This prevents a voltage backfeed
situation from the source applied to the EXTVCC pin to the
V pin. If the EXTV pin is tied to the first controller’s 5V
IN
CC
output, the nominal INTV pin voltage will stay in the
CC
guaranteed range of 4.7V to 5.2V.
U
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APPLICATIONS INFORMATION
R
SENSE Selection for Output Current
The basic LTC1539 application circuit is shown in Fig-
ure 1. External component selection is driven by the load
requirementandbegins withtheselectionofRSENSE.Once
RSENSE is known, COSC and L can be chosen. Next, the
RSENSE is chosen based on the required output current.
The LTC1538-AUX/LTC1539 current comparator has a
maximum threshold of 150mV/RSENSE and an input com-
mon mode range of SGND to INTVCC. The current com-
parator threshold sets the peak of the inductor current,
yielding a maximum average output current IMAX equal to
the peak value less half the peak-to-peak ripple current, ∆IL.
powerMOSFETs andD1areselected.Finally,C andCOUT
IN
are selected. The circuit shown in Figure 1 can be config-
ured for operation up to an input voltage of 28V (limited by
the external MOSFETs).
11
LTC1538-AUX/ LTC1539
U
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APPLICATIONS INFORMATION
Allowingsomemarginforvariations intheLTC1538-AUX/
LTC1539 and external component values yield:
synchronizable applications, choose COSC corresponding
to a frequency approximately 30% below your center
frequency. (See Phase-Locked Loop and Frequency
Sychronization).
100mV
R
=
SENSE
I
MAX
Inductor Value Calculation
The LTC1538-AUX/LTC1539 work well with values of
SENSE from 0.005Ω to 0.2Ω.
R
The operating frequency and inductor selection are inter-
related in that higher operating frequencies allow the use
of smaller inductor and capacitor values. So why would
anyone ever choose to operate at lower frequencies with
larger components? The answer is efficiency. A higher
frequency generally results in lower efficiency because of
MOSFET gate charge losses. In addition to this basic trade
off, the effect of inductor value on ripple current and low
current operation must also be considered.
COSC Selection for Operating Frequency
The LTC1538-AUX/LTC1539 use a constant frequency
architecture with the frequency determined by an external
oscillatorcapacitoronCOSC.EachtimethetopsideMOSFET
turns on,thevoltageonCOSC is resettoground.Duringthe
on-time, COSC is charged by a fixed current plus an
additional current which is proportional to the output
voltage of the phase detector (VPLLLPF)(LTC1539 only).
When the voltage on the capacitor reaches 1.19V, COSC is
reset to ground. The process then repeats.
Theinductorvaluehas adirecteffectonripplecurrent.The
inductor ripple current ∆IL decreases with higher induc-
tanceorfrequencyandgenerallyincreases withhigherV
IN
or VOUT
:
The value of COSC is calculated from the desired operating
frequency. Assuming the phase-locked loop has no exter-
nal oscillator input (VPLLLPF = 0V):
1
V
OUT
V
IN
∆I =
V
1–
L
OUT
(f)(L)
4
1.37 10
(
)
Accepting larger values of ∆IL allows the use of low
inductances, but results in higher output voltage ripple
and greater core losses. A reasonable starting point for
setting ripple current is ∆IL = 0.4(IMAX). Remember, the
maximum ∆IL occurs at the maximum input voltage.
C
(pF) =
– 11
OSC
Frequency kHz
(
)
A graph for selecting COSC vs frequency is given in Figure
2. As the operating frequency is increased the gate charge
losses will be higher, reducing efficiency (see Efficiency
Considerations). The maximum recommended switching
frequency is 400kHz. When using Figure 2 for
The inductor value also has an effect on low current
operation. The transition to low current operation begins
60
300
V
= 5.0V
= 3.3V
= 2.5V
OUT
V
= 0V
PLLLPF
V
OUT
50
40
30
20
10
0
250
200
150
100
50
V
OUT
0
0
100
200
300
400
500
0
100
150
200
250
300
50
OPERATING FREQUENCY (kHz)
OPERATING FREQUENCY (kHz)
LTC1538 • F02
1538 F03
Figure 2. Timing Capacitor Value
Figure 3. Recommended Inductor Values
12
LTC1538-AUX/ LTC1539
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APPLICATIONS INFORMATION
when the inductor current reaches zero while the bottom
MOSFET is on. Lower inductor values (higher∆IL) will cause
this to occur at higher load currents, which can cause a dip
in efficiency in the upper range of low current operation. In
BurstModeoperation(TGS1, 2pins open), lowerinductance
values will cause the burst frequency to decrease.
TotakeadvantageoftheAdaptivePoweroutputstage, two
topside MOSFETs must be selected. A large [low RSD(ON)
]
MOSFET and a small [higher RDS(ON)] MOSFET are re-
quired. The large MOSFET is used as the main switch and
works in conjunction with the synchronous switch. The
smaller MOSFET is only enabled under low load current
conditions.Thebenefitofthis is toboostlowtomidcurrent
efficiencies while continuing to operate at constant fre-
quency. Also, by using the small MOSFET the circuit will
keep switching at a constant frequency down to lower
currents and delay skipping cycles.
The Figure 3 graph gives a range of recommended induc-
tor values vs operating frequency and VOUT
.
Inductor Core Selection
Once the value for L is known, the type of inductor must be
selected. High efficiency converters generally cannot af-
ford the core loss found in low cost powdered iron cores,
forcing the use of more expensive ferrite, molypermalloy
or Kool Mµ® cores. Actual core loss is independent of core
size for a fixed inductor value, but it is very dependent on
inductance selected. As inductance increases, core losses
godown.Unfortunately,increasedinductancerequires more
turns of wire and therefore copper losses will increase.
The RDS(ON) recommended for the small MOSFET is
around 0.5Ω. Be careful not to use a MOSFET with an
RDS(ON) that is too low; remember, we want to conserve
gatecharge. (AhigherRDS(ON) MOSFEThas asmallergate
capacitance and thus requires less current to charge its
gate). For all LTC1538-AUX and cost sensitive LTC1539
applications,thesmallMOSFETis notrequired.Thecircuit
then begins Burst Mode operation as the load current
drops.
Ferrite designs have very low core loss and are preferred
at high switching frequencies, so design goals can con-
centrate on copper loss and preventing saturation. Ferrite
core material saturates “hard,” which means that induc-
tance collapses abruptly when the peak design current is
exceeded. This results in an abrupt increase in inductor
ripple current and consequent output voltage ripple. Do
not allow the core to saturate!
The peak-to-peak drive levels are set by the INTVCC volt-
age. This voltage is typically 5V during start-up (see
EXTVCC PinConnection).Consequently,logiclevelthresh-
old MOSFETs must be used in most LTC1538-AUX/
LTC1539 applications. The only exception is applications
in which EXTVCC is powered from an external supply
greaterthan8V(mustbeless than10V), inwhichstandard
thresholdMOSFETs (VGS(TH)<4V)maybeused.Payclose
attention to the BVDSS specification for the MOSFETs as well;
many of the logic level MOSFETs are limited to 30V or less.
Molypermalloy (from Magnetics, Inc.) is a very good, low
loss corematerialfortoroids,butitis moreexpensivethan
ferrite. A reasonable compromise from the same manu-
facturer is Kool Mµ. Toroids are very space efficient,
especially when you can use several layers of wire. Be-
cause they generally lack a bobbin, mounting is more
difficult. However, designs forsurfacemountareavailable
which do not increase the height significantly.
Selection criteria for the power MOSFETs include the "ON"
resistance RSD(ON), reverse transfer capacitance CRSS
,
input voltage and maximum output current. When the
LTC1538-AUX/LTC1539areoperatingincontinuous mode
the duty cycles for the top and bottom MOSFETs are given
by:
Power MOSFET and D1 Selection
V
OUT
Main Switch Duty Cycle =
Three external power MOSFETs must be selected for each
controllerwiththeLTC1539:apairofN-channelMOSFETs
for the top (main) switch and an N-channel MOSFET for
the bottom (synchronous) switch. Only one top MOSFET
is required for each LTC1538-AUX controller.
V
IN
V – V
(
)
IN
OUT
Synchronous Switch Duty Cycle =
V
IN
Kool Mµ is a registered trademark of Magnetics, Inc.
13
LTC1538-AUX/ LTC1539
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APPLICATIONS INFORMATION
The MOSFET power dissipations at maximum output
current are given by:
generally a good compromise for both regions of opera-
tion due to the relatively small average current.
C and COUT Selection
V
2
IN
OUT
P
=
I
1+δ R
+
(
) (
)
MAIN
MAX
DS(ON)
V
IN
1.85
In continuous mode, the source current of the top
N-channel MOSFET is a square wave of duty cycle VOUT
V . To prevent large voltage transients, a low ESR input
IN
/
k V
I
(
C
f
(
)
)(
)( )
IN
MAX RSS
capacitor sized for the maximum RMS current must be
used. The maximum RMS capacitor current is given by:
V – V
2
IN
OUT
P
=
I
(
1+δ R
) (
)
SYNC
MAX
DS(ON)
V
1/ 2
]
IN
V
V – V
OUT
(
)
[
OUT IN
C Required I
≈ I
MAX
IN
RMS
V
where δ is the temperature dependency of RDS(ON) and k
IN
is a constant inversely related to the gate drive current.
This formula has a maximum at V = 2VOUT, where IRMS
=
IN
IOUT/2. This simple worst-case condition is commonly used
for design because even significant deviations do not offer
muchrelief.Notethatcapacitormanufacturer’s ripplecurrent
ratings areoftenbasedononly2000hours oflife.This makes
it advisable to further derate the capacitor or to choose a
capacitorratedatahighertemperaturethanrequired.Several
capacitors may also be paralleled to meet size or height
requirements inthedesign.Always consultthemanufacturer
if there is any question.
Both MOSFETs have I2R losses while the topside
N-channel equation includes an additional term for transi-
tion losses, which are highest at high input voltages. For
V < 20V the high current efficiency generally improves
IN
with larger MOSFETs, while for V > 20V the transition
IN
losses rapidly increase to the point that the use of a higher
RDS(ON) device with lower CRSS actual provides higher
efficiency. The synchronous MOSFET losses are greatest
at high input voltage or during a short circuit when the duty
cycle in this switch is nearly 100%. Refer to the Foldback
Current Limiting section for further applications information.
The selection of COUT is driven by the required effective
series resistance (ESR). Typically, once the ESR require-
ment is satisfied the capacitance is adequate for filtering.
The output ripple (∆VOUT) is approximated by:
The term (1 + δ) is generally given for a MOSFET in the
form of a normalized RDS(ON) vs Temperature curve, but
δ = 0.005/°C can be used as an approximation for low
voltageMOSFETs.CRSS is usuallyspecifiedintheMOSFET
characteristics. The constant k = 2.5 can be used to
estimate the contributions of the two terms in the main
switch dissipation equation.
1
∆V
≈ ∆I ESR +
L
OUT
4fC
OUT
where f = operating frequency, COUT = output capacitance
and ∆IL = ripple current in the inductor. The output ripple
is highest at maximum input voltage since ∆IL increases
with input voltage. With ∆IL = 0.4IOUT(MAX) the output
The Schottky diode D1 shown in Figure 1 serves two
purposes. During continuous synchronous operation, D1
conducts during the dead-time between the conduction of
the two large power MOSFETs. This prevents the body
diode of the bottom MOSFET from turning on and storing
charge during the dead-time, which could cost as much as
1% in efficiency. During low current operation, D1 oper-
ates in conjunction with the small top MOSFET to provide
an efficient low current output stage. A 1A Schottky is
ripple will be less than 100mV at max V assuming:
IN
COUT Required ESR < 2RSENSE
Manufacturers such as Nichicon, United Chemicon and
Sanyoshouldbeconsideredforhighperformancethrough-
hole capacitors. The OS-CON semiconductor dielectric
capacitor available from Sanyo has the lowest (ESR size)
product of any aluminum electrolytic at a somewhat
14
LTC1538-AUX/ LTC1539
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higher price. Once the ESR requirement for COUT has been
T = 70°C + (21mA)(30V)(85°C/W) = 124°C
J
met, the RMS current rating generally far exceeds the
To prevent maximum junction temperature from being
exceeded, the input supply current must be checked while
IRIPPLE(P-P) requirement.
In surface mount applications multiple capacitors may
have to be paralleled to meet the ESR or RMS current
handling requirements of the application. Aluminum elec-
trolytic and dry tantalum capacitors are both available in
surfacemountconfigurations. Inthecaseoftantalum, itis
critical that the capacitors are surge tested for use in
switching power supplies. An excellent choice is the AVX
TPS series of surface mount tantalums, available in case
heights ranging from 2mm to 4mm. Other capacitor types
include Sanyo OS-CON, Nichicon PL series and Sprague
593D and 595D series. Consult the manufacturerforother
specific recommendations.
operating in continuous mode at maximum V .
IN
EXTVCC Connection
The LTC1538-AUX/LTC1539 contain an internal P-chan-
nel MOSFET switch connected between the EXTVCC and
INTVCC pins. When the voltage applied to EXTV rises
CC
above 4.8V, the internal regulator is turned off and an
internal switch closes, connecting the EXTVCC pin to the
INTVCC pin thereby supplying internal power to the IC. The
switch remains closed as long as the voltage applied to
EXTVCC remains above 4.5V. This allows the MOSFET
driver and control power to be derived from the output
during normal operation (4.8V < VOUT < 9V) and from the
internal regulator when the output is out of regulation
(start-up, short circuit). Do not apply greater than 10V to
the EXTVCC pin and ensure that EXTV ≤ V .
INTV /5V Standby Regulator
CC
An internal P-channel low dropout regulator produces 5V
at the INTV pin from the V supply pin. INTV powers
CC
IN
CC
CC
IN
the drivers and internal circuitry within the LTC1538-AUX/
LTC1539,as wellas any“wake-up”circuitrytiedexternally
to the INTVCC pin. The INTVCC pin regulator can supply
40mA and must be bypassed to ground with a minimum
of 2.2µF tantalum or low ESR electrolytic capacitor. Good
bypassing is necessary to supply the high transient cur-
rents required by the MOSFET gate drivers.
Significant efficiency gains can be realized by powering
INTVCC from the output, since the V current resulting
IN
from the driver and control currents will be scaled by a
factor of Duty Cycle/Efficiency. For 5V regulators this
supply means connecting the EXTVCC pin directly to VOUT
.
However, for 3.3V and other lower voltage regulators,
additional circuitry is required to derive INTVCC power
from the output.
To prevent any interaction due to the high transient gate
currents being drawn from the external capacitor an
additional series filter of 10Ω and 10µF to SGND can be
added.
The following list summarizes the four possible connec-
tions for EXTVCC:
1. EXTVCC left open (or grounded). This will cause INTV
CC
High input voltage applications in which large MOSFETs
are being driven at high frequencies may cause the maxi-
mum junction temperature rating for the LTC1538-AUX/
LTC1539 to be exceeded. The IC supply current is domi-
nated by the gate charge supply current when not using an
to be powered from the internal 5V regulator resulting
in an efficiency penalty of up to 10% at high input
voltages.
2. EXTVCC connected directly to VOUT. This is the normal
connection for a 5V regulator and provides the highest
efficiency.
output derived EXTV source. The gate charge is depen-
CC
dent on operating frequency as discussed in the Efficiency
Considerations section. The junction temperature can be
estimated by using the equations given in Note 1 of the
Electrical Characteristics. For example, the LTC1539 is
limited to less than 21mA from a 30V supply:
3. EXTVCC connectedtoanoutput-derivedboostnetwork.
For 3.3V and other low voltage regulators, efficiency
gains can still be realized by connecting EXTVCC to an
output-derived voltage which has been boosted to
15
LTC1538-AUX/ LTC1539
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+
LTC1538-AUX
LTC1539*
+
V
IN
1µF
1N4148
V
C
SEC
LTC1538-AUX
LTC1539*
IN
0.22µF
BAT85
BAT85
L1
+
V
IN
V
IN
+
C
L1
1:1
IN
1µF
TGL1
TGS1*
SW1
N-CH
N-CH
V
IN
•
EXTV
CC
BAT85
VN2222LL
R
SENSE
N-CH
TGL1
N-CH
N-CH
R6
R5
V
OUT
•
R
SENSE
TGS1*
N-CH
SFB1
V
OUT
EXTV
CC
+
BG1
SW1
BG1
C
OUT
+
SGND PGND
C
OUT
1538 F04a
PGND
OPTIONAL EXTV
*TGS1 ONLY AVAILABLE ON THE LTC1539
CC
1538 F04b
CONNECTION
5V ≤ V ≤ 9V
*TGS1 ONLY AVAILABLE ON THE LTC1539
SEC
Figure 4a. Secondary Output Loop and EXTVCC Connection
Figure 4b. Capacitive Charge Pump for EXTV
CC
greater than 4.8V. This can be done with either the
inductive boost winding as shown in Figure 4a or the
capacitivechargepumpshowninFigure4b. Thecharge
pump has the advantage of simple magnetics.
Output Voltage Programming
The LTC1538-AUX/LTC1539 have pin selectable output
voltage programming. The output voltage is selected by
the VPROG1 (VPROG2) pin as follows:
4. EXTVCC connected to an external supply. If an external
V
PROG1,2 = 0V
VOUT1,2 = 3.3V
VOUT1,2 = 5V
VOUT2 = Adjustable
supplyis availableinthe5Vto10Vrange(EXTV ≤V )
CC
IN
VPROG1,2 = INTV
CC
it may be used to power EXTVCC providing it is compat-
ible with the MOSFET gate drive requirements. When
driving standard threshold MOSFETs, the external sup-
ply must be always present during operation to prevent
MOSFETfailureduetoinsufficientgatedrive. Note:care
must be taken when using the connections in items 3 or
VPROG2 = Open (DC)
The top of an internal resistive divider is connected to
SENSE– 1 pin in Controller 1. For fixed output voltage
applications the SENSE– 1 pin is connected to the output
voltage as shown in Figure 5a. When using an external
resistivedividerforController2,theVPROG2 pinis leftopen
4. These connections will effect the INTV voltage
CC
when either or both controllers are on.
GND: V
= 3.3V
= 5V
OUT
V
PROG1
INTV : V
CC OUT
–
SENSE
1
V
OUT
Topside MOSFET Driver Supply (CB,DB)
+
LTC1538-AUX
LTC1539
C
OUT
External bootstrap capacitors CB connected to the BOOST
1 and BOOST 2 pins supply the gate drive voltages for the
topside MOSFETs. Capacitor CB in the Functional Diagram
SGND
1538 F05a
Figure 5a. LTC1538-AUX/LTC1539 Fixed Output Applications
is charged through diode DB from INTV when the
CC
SW1(SW2) pin is low. When one of the topside MOSFETs
is to be turned on, the driver places the CB voltage across
the gate source of the desired MOSFET. This enhances the
MOSFET and turns on the topside switch. The switch node
1.19V ≤ V
OUT
≤ 9V
R2
V
*
OPEN (DC)
PROG2
V
OSENSE2
voltage SW1(SW2) rises to V and the BOOST 1(BOOST
2) pin follows. With the topside MOSFET on, the boost
LTC1538-AUX
LTC1539
IN
R1
100pF
SGND
voltage is above the input supply: VBOOST = V + V
.
1538 F05b
IN
INTVCC
R2
R1
The value of the boost capacitor CB needs to be 100 times
thatofthetotalinputcapacitanceofthetopsideMOSFET(s).
The reverse breakdown on DB must be greater than
V
OUT
= 1.19V 1 +
*LTC1539 ONLY
(
)
Figure 5b. LTC1538-AUX/LTC1539 Adjustable Applications
V
IN(MAX)
.
16
LTC1538-AUX/ LTC1539
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(DC) and the VOSENSE2 pin is connected to the feedback
resistors as shown in Figure 5b. Controller 2 will force the
externally attenuated output voltage to 1.19V.
required from the input power supply. If RUN/SS has been
pulled all the way to ground there is a delay before starting
of approximately 500ms/µF, followed by a similar time to
reach full current on that controller.
Power-On Reset Function (POR)
By pulling both RUN/SS controller pins below 1.3V, the
LTC1538-AUX/LTC1539 are put into shutdown
(IQ < 200µA). These pins can be driven directly from logic
as showninFigure6.DiodeD1inFigure6reduces thestart
The power-on reset function monitors the output voltage
of the first controller and turns on an open drain device
when it is below its properly regulated voltage. An external
pull-up resistor is required on the POR1 pin.
3.3V
OR 5V
RUN/SS1
(RUN/SS2)
RUN/SS1
(RUN/SS2)
When power is first applied or when coming out of
shutdown, the POR1 output is held at ground. When the
output voltage rises above a level which is 5% below the final
regulated output value, an internal counter starts. After this
counter counts 216 (65536) clock cycles, the POR1 pull-
down device turns off. The POR1 output is active when both
D1
C
C
SS
SS
1538 F06
Figure 6. RUN/SS Pin Interfacing
controllers are shut down as long as V is powered.
IN
The POR1 output will go low whenever the output voltage
of the first controller drops below 7.5% of its regulated
value for longer than approximately 30µs, signaling an
out-of-regulation condition. In shutdown, when RUN/SS1
and RUN/SS2 are both below 1.3V, the POR1 output is
pulled low even if the regulator’s output is held up by an
external source.
delay but allows CSS to ramp up slowly providing the soft
startfunction;this diodeandCSS canbedeletedifsoftstart
is not needed. Each RUN/SS pin has an internal 6V Zener
clamp (See Functional Diagram).
Foldback Current Limiting
As described in Power MOSFET and D1 Selection, the
worst-case dissipation for either MOSFET occurs with a
short-circuited output, when the synchronous MOSFET
conducts the current limit value almost continuously. In
most applications this will not cause excessive heating,
even for extended fault intervals. However, when heat
sinking is at a premium or higher RDS(ON) MOSFETs are
being used, foldback current limiting should be added to
reduce the current in proportion to the severity ofthe fault.
RUN/Soft Start Function
The RUN/SS1 and RUN/SS2 pins each serve two func-
tions. Each pin provides the soft start function and a
means to shut down each controller. Soft start reduces
surgecurrents fromV byprovidingagradualramp-upof
IN
the internal current limit. Power supply sequencing can
also be accomplished using this pin.
An internal 3µA current source charges up an external
capacitor CSS. When the voltage on RUN/SS1 (RUN/SS2)
reaches 1.3V the particular controller is permitted to start
operating. As the voltage on the pin continues to ramp
from 1.3V to 2.4V, the internal current limit is also ramped
at a proportional linear rate. The current limit begins at
approximately50mV/RSENSE (atVRUN/SS =1.3V)andends
at 150mV/RSENSE (VRUN/SS ≥ 2.7V). The output current
thus ramps up slowly, reducing the starting surge current
Foldback current limiting is implemented by adding diode
DFB between the output and the ITH pin as shown in the
Functional Diagram. In a hard short (VOUT = 0V) the
current will be reduced to approximately 25% of the
maximum output current. This technique may be used for
all applications with regulated output voltages of 1.8V or
greater.
17
LTC1538-AUX/ LTC1539
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EXTERNAL
FREQUENCY
R
LP
2.4V
C
OSC
C
LP
PHASE
1.3
DETECTOR*
*PLL LPF
OSC
C
OSC
*PLLIN
f
O
DIGITAL
PHASE/
FREQUENCY
DETECTOR
0.7
SGND
50k
0
0.5
1.0
1.5
(V)
2.0
2.5
V
PLLLPF
1538 F07
1538 F08
*LTC1539 ONLY
Figure 7. Operating Frequency vs V
PLLLPF
Figure 8. Phase-Locked Loop Block Diagram
Phase-Locked Loop and Frequency Synchronization
external and internal oscillators. This type of phase detec-
tor will not lock up on input frequencies close to the
harmonics of the VCO center frequency. The PLL hold-in
range, ∆fH, is equal to the capture range, ∆fC:
The LTC1539 has an internal voltage-controlled oscillator
and phase detector comprising a phase-locked loop. This
allows the top MOSFET turn-on to be locked to the rising
edge of an external source. The frequency range of the
voltage-controlled oscillator is ±30% around the center
frequency fO.
∆fH = ∆fC = ±0.3 fO.
The output of the phase detector is a complementary pair
of current sources charging or discharging the external
filter network on the PLL LPF pin. A simplified block
diagram is shown in Figure 8.
The value of COSC is calculated from the desired operating
frequency (fO). Assuming the phase-locked loop is locked
(VPLLLPF = 1.19V):
If the external frequency fPLLIN is greater than the oscilla-
tor frequency fOSC, current is sourced continuously, pull-
ingupthePLLLPFpin.Whentheexternalfrequencyis less
than f0SC, current is sunk continuously, pulling down the
PLLLPFpin.Iftheexternalandinternalfrequencies arethe
same but exhibit a phase difference, the current sources
turn on for an amount of time corresponding to the phase
difference. Thus thevoltageonthePLLLPFpinis adjusted
until the phase and frequency of the external and internal
oscillators are identical. At this stable operating point the
phase comparator output is open and the filter capacitor
CLP holds the voltage. The LTC1539 PLLIN pin must be
driven from a low impedance such as a logic gate located
close to the pin. Any external attenuator used needs to be
referenced to SGND.
4
2.1 10
(
)
C
(pF) =
– 11
OSC
Frequency(kHz)
Stating the frequency as a function of VPLLLPF and COSC
Frequency(kHz) =
:
8
8.4 10
(
)
1
C
[
pF +11
( )
+ 2000
]
OSC
V
PLLLPF
2.4V
17µA+18µA
The phase detector used is an edge sensitive digital type
which provides zero degrees phase shift between the
The loop filter components CLP, RLP smooth out the
current pulses from the phase detector and provide a
18
LTC1538-AUX/ LTC1539
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SFB1 Pin Operation
stable input to the voltage-controlled oscillator. The filter
components CLP and RLP determine how fast the loop
acquires lock.Typically,RLP=10kandCLPis 0.01µFto0.1µF.
The low side of the filter needs to be connected to SGND.
When the SFB1 pin drops below its ground referenced
1.19V threshold, continuous mode operation is forced. In
continuous mode, the large N-channel main and synchro-
nous switches are used regardless of the load on the main
output.
The PLL LPF pin can be driven with external logic to obtain
a 1:1.9 frequency shift. The circuit shown in Figure 9 will
provide a frequency shift from fO to 1.9fO as the voltage on
In addition to providing a logic input to force continuous
synchronous operation, the SFB1 pin provides a means to
regulate a flyback winding output. The use of a synchro-
nous switch removes the requirement that power must be
drawn from the inductor primary in order to extract power
from the auxiliary winding. With the loop in continuous
mode, the auxiliary output may be loaded without regard
to the primary output load. The SFB1 pin provides a way
to force continuous synchronous operation as needed by
the flyback winding.
VPLLLPF increases from 0V to 2.4V. Do not exceed 2.4V on
V
.
PLLLPF
3.3V OR 5V
2.4V
MAX
PLL LPF
18k
LTC1538 • F09
Figure 9. Directly Driving PLL LPF Pin
Low Battery Comparator
Thesecondaryoutputvoltageis setbytheturns ratioofthe
transformerinconjunctionwithapairofexternalresistors
returned to the SFB1 pin as shown in Figure 4a. The
secondary regulated voltage VSEC in Figure 4a is given by:
The LTC1539 has an on-chip low battery comparator
which can be used to sense a low battery condition when
implemented as shown in Figure 10. This comparator is
active during shutdown allowing battery charge level
interrogation prior to and after powering up part or all of
the system. The resistor divider R3/R4 sets the compara-
tor trip point as follows:
R6
V
≈ N+1 V
> 1.19V 1+
(
)
SEC
OUT
R5
where N is the turns ratio of the transformer, and VOUT is
the main output voltage sensed by SENSE– 1.
R4
V
= 1.19V 1+
LBITRIP
R3
Auxiliary Regulator/Comparator
The auxiliary regulator/comparator can be used as a
comparator or low dropout regulator (by adding an exter-
nal PNP pass device).
The divided down voltage at the negative (–) input to the
comparator is compared to an internal 1.19V reference. A
20mV hysteresis is built in to assure rapid switching. The
output is an open drain MOSFET and requires a pull-up
resistor. This comparator is active when both the RUN/
SS1 and RUN/SS2 pins are low. The low side of the resistive
divider needs to be connected to SGND.
When the voltage present at the AUXON pin is greater than
1.19V the regulator/comparator is on. The amplifier is
stable when operating as a low dropout regulator. This
same amplifier can be used as a comparator whose
inverting input is tied to the 1.19V reference.
V
IN
The AUXDR pin is internally connected to an open drain
MOSFET which can sink up to 10mA. The voltage on
AUXDR determines whether or not an internal 12V resis-
tive divider is connected to AUXFB as described below. A
pull-up resistor is required on AUXDR and the voltage
must not exceed 28V.
R4
R3
LTC1539
LBO
LBI
–
+
1.19V REFERENCE
1538 F10
SGND
Figure 10. Low Battery Comparator
19
LTC1538-AUX/ LTC1539
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With the addition of an external PNP pass device, a linear
regulator capable of supplying up to 0.5A is created. As
shown in Figure 11a, the base of the external PNP con-
nects to the AUXDR pin together with a pull-up resistor.
The output voltage VOAUX at the collector of the external
PNP is sensed by the AUXFB pin.
in hysteresis. For other output voltages, an external resis-
tive divider is fed back to AUXFB as shown in Figure 11b.
The output voltage VOAUX is set as follows:
R8
V
= 1.19V 1+
= 12V
< 8V AUX DR < 8.5V
AUX DR ≥ 12V
OAUX
R7
V
OAUX
The input voltage to the auxiliary regulator can be taken
from a secondary winding on the primary inductor as
shown in Figure 11a. In this application, the SFB1 pin
regulates the input voltage to the PNP regulator (see SFB1
Pin Operation) and should be set to approximately 1V to
2V above the required output voltage of the auxiliary
regulator.AZenerclampdiodemayberequiredtokeepthe
secondary winding resultant output voltage under the 28V
AUXDR pin specification when the primary is heavily
loaded and the secondary is not.
When used as a voltage comparator as shown in Figure
11c, the auxiliary block has a noninverting characteristic.
When AUXFB drops below 1.19V, the AUXDR pin will be
pulled low. A minimum current of 5µA is required to pull up
the AUXDR pin to 5V when used as a comparator output in
ordertocounteracta1.5µAinternalpull-downcurrentsource.
Efficiency Considerations
The efficiency of a switching regulator is equal to the
output power divided by the input power times 100%. It is
oftenusefultoanalyzeindividuallosses todeterminewhat
is limiting the efficiency and which change would produce
the most improvement. Efficiency can be expressed as:
The AUXFB pin is the feedback point of the regulator. An
internalresistordivideris availabletoprovidea12Voutput
bysimplyconnectingAUXFBdirectlytothecollectorofthe
external PNP. The internal resistive divider is switched in
when the voltage at AUXFB goes above 9.5V with 1V built-
Efficiency = 100% – (L1 + L2 + L3 + ...)
SECONDARY
WINDING
SECONDARY
WINDING
1:N
1:N
R6
R6
V
SEC
= 1.19V 1 +
> 13V
V
SEC
= 1.19V 1 +
> (V
+ 1V)
OAUX
(
)
(
)
R5
R5
V
SEC
V
SEC
V
OAUX
AUXDR
R6
R5
AUXDR
+
R6
R5
R8
R7
V
12V
+
OAUX
SFB1 AUXFB
SFB1 AUXFB
+
+
LTC1538-AUX/
LTC1539
LTC1538-AUX/
LTC1539
10µF
10µF
AUXON
ON/OFF
AUXON
ON/OFF
1538 F11a
1538 F11b
Figure 11a. 12V Output Auxiliary Regulator
Using Internal Feedback Resistors
Figure 11b. 5V Output Auxiliary Regulator Using
External Feedback Resistors
V
< 7.5V
PULL-UP
LTC1538-AUX/LTC1539
ON/OFF
INPUT
AUXON
AUXDR
OUTPUT
AUXFB
–
+
1.19V REFERENCE
1538 F11c
Figure 11c. Auxiliary Comparator Configuration
20
LTC1538-AUX/ LTC1539
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whereL1, L2, etc. aretheindividuallosses as apercentage
of input power.
the resistance of one MOSFET can simply be summed
with the resistances of L and RSENSE to obtain I2R
losses. For example, if each RDS(ON) = 0.05Ω, RL =
0.15Ω and RSENSE = 0.05Ω, then the total resistance is
0.25Ω. This results in losses ranging from 3% to 10%
as the output current increases from 0.5A to 2A. I2R
losses cause the efficiency to roll off at high output
currents.
Although all dissipative elements in the circuit produce
losses, four main sources usually account for most of the
losses inLTC1538-AUX/LTC1539circuits.LTC1538-AUX/
LTC1539 V current, INTVCC current, I2R losses and
IN
topside MOSFET transition losses.
1. The V current is the DC supply current given in the
IN
4. Transition losses apply only to the topside MOSFET(s)
and only when operating at high input voltages (typically
20V or greater). Transition losses can be estimated from:
ElectricalCharacteristics whichexcludes MOSFETdriver
and control currents. V current typically results in a
IN
small (<< 1%) loss which increases with V .
IN
Transition Loss ≈ 2.5(V )1.85(IMAX)(CRSS)(f)
IN
2. INTVCC current is the sum of the MOSFET driver and
control currents. The MOSFET driver current results
from switching the gate capacitance of the power
MOSFETs. Each time a MOSFET gate is switched from
low to high to low again, a packet of charge dQ moves
Other losses including C and COUT ESR dissipative
IN
losses, Schottky conduction losses during dead-time,
and inductor core losses, generally account for less
than 2% total additional loss.
from INTV to ground. The resulting dQ/dt is a current
CC
Checking Transient Response
out of INTV which is typically much larger than the
CC
control circuit current. In continuous mode, IGATECHG
=
The regulator loop response can be checked by looking at
the load transient response. Switching regulators take
several cycles to respond to a step in DC (resistive) load
current. When a load step occurs, VOUT shifts by an
amount equal to (∆ILOAD)(ESR) where ESR is the effective
series resistance of COUT. ∆ILOAD also begins to charge or
dischargeCOUT generatingthefeedbackerrorsignalwhich
forces the regulator loop to adapt to the current change
and return VOUT to its steady-state value. During this
recovery time VOUT can be monitored for overshoot or
ringing which would indicate a stability problem. The ITH
external components shown in Figure 1 will prove ad-
equate compensation for most applications.
f(QT + QB), where QT and QB are the gate charges of the
topside and bottom side MOSFETs. It is for this reason
that the large topside and synchronous MOSFETs are
turned off during low current operation in favor of the
small topside MOSFET and external Schottky diode,
allowing efficient, constant-frequency operation at low
output currents.
By powering EXTVCC from an output-derived source,
the additional V current resulting from the driver and
IN
control currents will be scaled by a factor of Duty Cycle/
Efficiency. For example, in a 20V to 5V application,
10mA of INTV current results in approximately 3mA
CC
of V current. This reduces the midcurrent loss from
10% or more (if the driver was powered directly from
IN
A second, more severe transient is caused by switching in
loads with large (> 1µF) supply bypass capacitors. The
dischargedbypass capacitors areeffectivelyputinparallel
with COUT, causing a rapid drop in VOUT. No regulator can
deliver enough current to prevent this problem if the load
switch resistance is low and it is driven quickly. The only
solution is to limit the rise time of the switch drive so that
the load rise time is limited to approximately (25)(CLOAD).
Thus a 10µF capacitor would require a 250µs rise time,
limiting the charging current to about 200mA.
V ) to only a few percent.
IN
3. I2R losses are predicted from the DC resistances of the
MOSFET, inductor and current sense R. In continuous
mode the average output current flows through L and
RSENSE, but is “chopped” between the topside main
MOSFET and the synchronous MOSFET. If the two
MOSFETs have approximately the same RDS(ON), then
21
LTC1538-AUX/ LTC1539
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Automotive Considerations: Plugging into the
Cigarette Lighter
and COSC can immediately be calculated:
R
SENSE = 100mV/3A = 0.033Ω
As battery-powered devices go mobile, there is a natural
interest in plugging into the cigarette lighter in order to
conserveorevenrechargebatterypacks duringoperation.
But before you connect, be advised: you are plugging into
the supply from hell. The main battery line in an automo-
bile is the source ofa numberofnastypotentialtransients,
including load dump, reverse battery and double battery.
COSC = (1.37(104)/250) – 11 ≈ 43pF
Referring to Figure 3, a 10µH inductor falls within the
recommended range. To check the actual value of the
ripple current the following equation is used :
V
V
OUT
V
IN
OUT
∆I =
1–
L
(f)(L)
Load dump is the result of a loose battery cable. When the
cablebreaks connection,thefieldcollapseinthealternator
can cause a positive spike as high as 60V which takes
several hundred milliseconds to decay. Reverse battery is
just what it says, while double battery is a consequence of
tow-truck operators finding that a 24V jump start cranks
cold engines faster than 12V.
The highest value of the ripple current occurs at the
maximum input voltage:
3.3V
3.3V
22V
∆I =
1–
= 1.12A
L
250kHz(10µH)
The power dissipation on the topside MOSFET can be
easily estimated. Using a Siliconix Si4412DY for example;
RDS(ON) = 0.042Ω, CRSS = 100pF. At maximum input
voltage with T(estimated) = 50°C:
The network shown in Figure 12 is the most straightfor-
ward approach to protect a DC/DC converter from the
ravages of an automotive battery line. The series diode
prevents current from flowing during reverse battery,
while the transient suppressor clamps the input voltage
during load dump. Note that the transient suppressor
should not conduct during double battery operation, but
must still clamp the input voltage below breakdown of the
converter. Although the LTC1538-AUX/LTC1539 has a
maximum input voltage of 36V, most applications will be
3.3V
22V
2
P
=
3
1+ 0.005 50°C − 25°C 0.042Ω
)( ) ( )
( )
(
[
]
MAIN
1.85
+ 2.5 22V
3A 100pF 250kHz = 122mW
The most stringent requirement for the synchronous
N-channel MOSFET is with VOUT = 0V (i.e. short circuit).
During a continuous short circuit, the worst-case dissipa-
tion rises to:
limited to 30V by the MOSFET BV
.
DSS
Design Example
As a design example, assume V = 12V(nominal), V =
PSYNC = [ISC(AVG)]2(1 + δ)RDS(ON)
IN
IN
22V(max), VOUT = 3.3V, IMAX = 3A and f = 250kHz, RSENSE
12V
50A I RATING
PK
V
IN
LTC1538-AUX/
LTC1539
TRANSIENT VOLTAGE
SUPPRESSOR
GENERAL INSTRUMENT
1.5KA24A
1538 F12
Figure 12. Automotive Application Protection
22
LTC1538-AUX/ LTC1539
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APPLICATIONS INFORMATION
With the 0.033Ω sense resistor ISC(AVG) = 4A will result,
increasing the Si4412DY dissipation to 950mW at a die
temperature of 105°C.
4. Do the (+) plates of C connect to the drains of the
IN
topside MOSFETs as closely as possible? This capaci-
tor provides the AC current to the MOSFETs.
C will require an RMS current rating of at least 1.5A at
5. Is the INTVCC decoupling capacitor connected closely
between INTVCC and the power ground pin? This ca-
pacitor carries the MOSFET driver peak currents.
IN
temperatureandCOUT willrequireanESRof0.03Ωforlow
outputripple.Theoutputrippleincontinuous modewillbe
highest at the maximum input voltage. The output voltage
ripple due to ESR is approximately:
6. Keep the switching nodes, SW1 (SW2), away from
sensitive small-signal nodes. Ideally the switch nodes
should be placed at the furthest point from the
LTC1538-AUX/LTC1539.
V
ORIPPLE = RESR(∆IL) = 0.03Ω(1.12A) = 34mV
P-P
PC Board Layout Checklist
7. Use a low impedance source such as a logic gate to drive
the PLLIN pin and keep the lead as short as possible.
When laying out the printed circuit board, the following
checklistshouldbeusedtoensureproperoperationofthe
LTC1538-AUX/LTC1539. These items are also illustrated
graphically in the layout diagram of Figure 13. Check the
following in your layout:
PC BOARD LAYOUT SUGGESTIONS
Switching power supply printed circuit layouts are cer-
tainly among the most difficult analog circuits to design.
The following suggestions will help to get a reasonably
close solution on the first try.
1. Are the high current power ground current paths using
or running through any part of signal ground? The
LTC1438/LTC1438X/LTC1439 IC’s have their sensitive
pins on one side of the package. These pins include the
signal ground for the reference, the oscillator input, the
voltageandcurrentsensingforbothcontrollers andthe
low battery/comparator input. The signal ground area
used on this side of the IC must return to the bottom
plates of all of the output capacitors. The high current
power loops formed by the input capacitors and the
ground returns to the sources of the bottom
N-channel MOSFETs, anodes of the Schottky diodes,
The output circuits, including the external switching
MOSFETs, inductor, secondary windings, sense resistor,
input capacitors and output capacitors all have very large
voltage and/or current levels associated with them. These
components and the radiated fields (electrostatic and/or
electromagnetic) must be kept away from the very sensi-
tive control circuitry and loop compensation components
required for a current mode switching regulator.
The electrostatic or capacitive coupling problems can be
reduced by increasing the distance from the radiator,
typically a very large or very fast moving voltage signal.
The signal points that cause problems generally include:
the “switch” node, any secondary flyback winding voltage
and any nodes which also move with these nodes. The
switch,MOSFETgate,andboostnodes movebetweenVIN
andPgndeachcyclewithless thana100ns transitiontime.
The secondary flyback winding output has an AC signal
and (-) plates of C , should be as short as possible and
IN
tied through a low resistance path to the bottom plates
of the output capacitors for the ground return.
2. DotheLTC1538-AUX/LTC1539SENSE–1andVOSENSE2
pins connect to the (+) plates of COUT? In adjustable
applications, the resistive divider R1/R2 must be con-
nected between the (+) plate of COUT and signal ground
and the HF decoupling capacitor should be as close as
possible to the LTC1538-AUX/LTC1539.
component of –V times the turns ratio of the trans-
IN
former, and also has a similar < 100ns transition time. The
feedbackcontrolinputsignals needtohaveless thanafew
millivolts of noise in order for the regulator to perform
properly. A rough calculation shows that 80dB of isolation
at 2MHz is required from the switch node for low noise
switcheroperation.Thesituationis worsebyafactorofthe
–
3. AretheSENSE andSENSE+ leads routedtogetherwith
minimum PC trace spacing? The filter capacitors be-
tween SENSE+ 1 (SENSE+ 2) and SENSE– 1 (SENSE– 2)
should be as close as possible to the LTC1538-AUX/
LTC1539.
23
LTC1538-AUX/ LTC1539
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APPLICATIONS INFORMATION
turns ratio for the secondary flyback winding. Keep these
switch-node-related PC traces small and away from the
“quiet” side of the IC (not just above and below each other
on the opposite side of the board).
duced is picked up by the current comparator input filter
circuit(s),as wellas bythevoltagefeedbackcircuit(s).The
current comparator’s filter capacitor placed across the
sense pins attenuates the radiated current signal. It is
important to place this capacitor immediately adjacent to
the IC sense pins. The voltage sensing input(s) minimizes
the inductive pickup component by using an input capaci-
tance filter to SGND. The capacitors in both case serve to
integrate the induced current, reducing the susceptibility
to both the “loop” radiated magnetic fields and the trans-
former or inductor leakage fields.
The electromagnetic or current-loop induced feedback
problems can be minimized by keeping the high AC-
current (transmitter) paths and the feedback circuit (re-
ceiver)pathsmalland/orshort.Maxwell’s equations areat
work here, trying to disrupt our clean flow of current and
voltage information from the output back to the controller
input. It is crucial to understand and minimize the suscep-
tibility of the control input stage as well as the more
obvious reduction of radiation from the high-current out-
put stage(s). An inductive transmitter depends upon the
frequency, current amplitude and the size of the current
loop to determine the radiation characteristic of the gen-
erated field. The current levels are set in the output stage
oncetheinputvoltage,outputvoltageandinductorvalue(s)
have been selected. The frequency is set by the output-
stage transition times. The only parameter over which we
have some control is the size of the antenna we create on
the PC board, i.e., the loop. A loop is formed with the input
capacitance, the top MOSFET, the Schottky diode, and the
pathfromtheSchottkydiode’s groundconnectionandthe
input capacitor’s ground connection. A second path is
formed when a secondary winding is used comprising the
secondary output capacitor, the secondary winding and
the rectifier diode or switching MOSFET (in the case of a
synchronous approach). These “loops” should be kept as
small and tightly packed as possible in order to minimize
their “far field” radiation effects. The radiated field pro-
The capacitor on INTV acts as a reservoir to supply the
CC
high transient currents to the bottom gates and to re-
charge the boost capacitor. This capacitor should be a
4.7µFtantalumcapacitorplacedas closeas possibletothe
INTV and PGND pins of the IC. Peak current driving the
CC
MOSFET gates exceeds 1A. The power ground pin of the
IC, connected to this capacitor, should connect directly to
the lower plates of the output capacitors to minimize the
AC ripple on the INTV IC power supply.
CC
The previous instructions will yield a PC layout which has
three separate ground regions returning separately to the
bottom plates of the output capacitors: a signal ground, a
MOSFET gate/INTVCC ground and the ground from the
input capacitors, Schottky diode and synchronous
MOSFET. In practice, this may produce a long power
ground path from the input and output capacitors. A long,
low resistance path between the input and output capaci-
tor power grounds will not upset the operation of the
switching controllers as long as the signal and power
grounds from the IC pins does not “tap in” along this path.
24
LTC1538-AUX/ LTC1539
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APPLICATIONS INFORMATION
C
LP
R
10k
0.01µF
LP
C
0.1µF
SS
EXT
CLOCK
1
2
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
RUN/SS1 PLL LPF
+
1000pF
C
0.1µF
B1
SENSE 1
–
PLLIN
1000pF
C
C1B
3
SENSE 1 BOOST 1
220pF
C
C1A
4
C
IN1
M1
INTV
V
PROG1
TGL1
SW1
TGS1
1000pF
CC
5
I
TH1
L1
100k
R
10k
C1
6
V
IN
M3
POR2
C
OSC
+
+
LTC1539
7
R
SENSE1
C
OSC
V
IN
D
B1
8
V
OUT1
+
V
M2
M5
D1
SGND
LBI
BG1
INTV
IN
+
C
OUT1
4.7µF
9
–
CC
C
–
C2B
GROUND PLANE
470pF
10
11
12
13
14
15
16
17
18
–
LBO
SFB1
PGND
BG2
C
C
OUT2
C2A
+
D2
INT V
R
1000pF
CC
C2
V
OUT2
10k
D
B2
I
EXTV
CC
TH2
R
SENSE2
+
100pF
L2
V
PROG2
TGS2
M6
56pF
V
SW2
OSENSE2
22pF
–
SENSE 2
TGL2
M4
C
IN2
OUTPUT DIVIDER
REQUIRED WITH
1000pF
+
SENSE 2 BOOST 2
V
OPEN
PROG
C
B2
RUN/SS2
AUXDR
AUXON
AUXFB
0.1µF
C
0.1µF
SS
10Ω
220pF
10Ω
1538 F13
NOT ALL PINS CONNECTED FOR CLARITY
BOLD LINES INDICATE HIGH CURRENT PATHS
Figure 13. LTC1539 Physical Layout Diagram
25
LTC1538-AUX/ LTC1539
U
TYPICAL APPLICATIONS
+
26
LTC1538-AUX/ LTC1539
U
TYPICAL APPLICATIONS
27
LTC1538-AUX/ LTC1539
U
TYPICAL APPLICATIONS
28
LTC1538-AUX/ LTC1539
U
TYPICAL APPLICATIONS
29
LTC1538-AUX/ LTC1539
U
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PCB LAYOUT A D FIL
(Gerber files for this circuit board are available. Call the LTC factory.)
Silkscreen Top
Silkscreen Bottom
Copper Layer 1
Copper Layer 2 Ground Plane
Copper Layer 3
Copper Layer 4
30
LTC1538-AUX/ LTC1539
U
PACKAGE DESCRIPTION
Dimensions in inches (millimeters) unless otherwise noted.
G Package
28-Lead Plastic SSOP (0.209)
(LTC DWG # 05-08-1640)
0.397 – 0.407*
(10.07 – 10.33)
28 27 26 25 24 23 22 21 20 19 18
16 15
17
0.301 – 0.311
(7.65 – 7.90)
5
7
8
1
2
3
4
6
9 10 11 12 13 14
0.205 – 0.212**
(5.20 – 5.38)
0.068 – 0.078
(1.73 – 1.99)
0° – 8°
0.0256
(0.65)
BSC
0.005 – 0.009
(0.13 – 0.22)
0.022 – 0.037
(0.55 – 0.95)
0.002 – 0.008
(0.05 – 0.21)
0.010 – 0.015
(0.25 – 0.38)
*DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
**DIMENSIONS DO NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
G28 SSOP 0694
GW Package
36-Lead Plastic SSOP (Wide 0.300)
(LTC DWG # 05-08-1642)
0.602 – 0.612*
(15.290 – 15.544)
36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19
0.400 – 0.410
(10.160 – 10.414)
0.292 – 0.299**
(7.417 – 7.595)
1
2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18
0.090 – 0.094
(2.286 – 2.387)
0.097 – 0.104
(2.463 – 2.641)
0.010 – 0.016
(0.254 – 0.406)
× 45°
0° – 8° TYP
0.005 – 0.012
(0.127 – 0.305)
0.024 – 0.040
(0.610 – 1.016)
0.031
(0.800)
TYP
0.009 – 0.012
(0.231 – 0.305)
0.012 – 0.017
(0.304 – 0.431)
*DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH **DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
GW36 SSOP 0795
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tationthattheinterconnectionofits circuits as describedhereinwillnotinfringeonexistingpatentrights.
31
LTC1538-AUX/ LTC1539
U
TYPICAL APPLICATION
3.3V to 2.9V at 3A Low Noise Linear Regulator
5V
27Ω
6.8nF
47k
3.3V
ZETEX
Q1
MMBT2907ALTI
FZT849
(SURFACE MOUNT)
10Ω
100Ω
2.9V
3A
AUXDR
LTC1539
AUXFB
316k
1%
22pF
+
330µF
× 2
2.9V
ON/OFF
221k
1%
AUXON
1538 TA05
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
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LT/GP 0896 7K • PRINTED IN USA
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
32
●
●
(408) 432-1900 FAX: (408) 434-0507 TELEX: 499-3977
LINEAR TECHNOLOGY CORPORATION 1996
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