LTC1595ACN8#PBF_技术文档

LTC1595/LTC1596/LTC1596-1

Serial 16-Bit

Multiplying DACs

FEATURES

DESCRIPTION

n

SO-8 Package (LTC1595)

TheLTC^®1595/LTC1596/LTC1596-1areserialinput,16-bit

multiplying current output DACs. The LTC1595 is pin and

hardware compatible with the 12-bit DAC8043 and comes

in 8-pin PDIP and SO packages. The LTC1596 is pin and

hardware compatible with the 12-bit DAC8143/AD7543

and comes in the 16-pin SO wide package.

n

DNL and INL: 1LSB Max

n

Low Glitch Impulse: 1nV-s Typ

n

Fast Settling to 1LSB: 2µs (with LT1468)

n

Pin Compatible with Industry Standard

12-Bit DACs: DAC8043 and DAC8143/AD7543

n

4-Quadrant Multiplication

Both are specified over the industrial temperature range.

Sensitivity of INL to op amp V is reduced by five times

compared to the industry standard 12-bit DACs, so most

systems can be easily upgraded to true 16-bit resolution

and linearity without requiring more precise op amps.

n

Low Supply Current: 10µA Max

OS

n

Power-On Reset

n

LTC1595/LTC1596: Resets to Zero-Scale

n

LTC1596-1: Resets to Mid-Scale

n

3-Wire SPI and MICROWIRE Compatible

Serial Interface

These DACs include an internal deglitching circuit that

reduces the glitch impulse by more than ten times to less

than 1nV-s typ.

n

Daisy-Chain Serial Output (LTC1596)

Asynchronous Clear Input

n

LTC1596: Clears to Zero-Scale

LTC1596-1: Clears to Mid-Scale

The DACs have a clear input and a power-on reset. The

LTC1595andLTC1596resettozero-scale.TheLTC1596-1

is a version of the LTC1596 that resets to mid-scale.

n

APPLICATIONS

L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear

Technology Corporation. All other trademarks are the property of their respective owners.

n

Process Control and Industrial Automation

n

Software Controlled Gain Adjustment

n

Digitally Controlled Filter and Power Supplies

Automatic Test Equipment

n

TYPICAL APPLICATION

SO-8 Multiplying 16-Bit DAC Has Easy 3-Wire Serial Interface

Integral Nonlinearity

1.0

0.8

0.6

0.4

V

IN

5V

8

1

2

R

FB

33pF

V

DD

REF

7

6

5

CLK

SRI

LD

CLOCK

DATA

LOAD

0.2

0

–

3

OUT1

LTC1595

LT^®1468

+

V

OUT

–0.2

–0.4

–0.6

–0.8

–1.0

GND

4

1595/96 TA01

0

16384

32768

49152

65535

DIGITAL INPUT CODE

1595/96 TA02

159561fc

1

For more information www.linear.com/LTC1595

LTC1595/LTC1596/LTC1596-1

ABSOLUTE MAXIMUM RATINGS

(Note 1)

V

to AGND............................................... –0.5V to 7V

to DGND............................................... –0.5V to 7V

V

, V

to AGND ................. –0.5V to (V + 0.5V)

DD

OUT1 OUT2 DD

Maximum Junction Temperature .......................... 150°C

Operating Temperature Range

AGND to DGND ........................................... V + 0.5V

DD

DGND to AGND ............................................V + 0.5V

V

LTC1595C/LTC1596C/LTC1596-1C.......... 0°C to 70°C

LTC1595I/LTC1596I/LTC1596-1I ......... –40°C to 85°C

Storage Temperature Range ................. –65°C to 150°C

Lead Temperature (Soldering, 10 sec).................. 300°C

to AGND, DGND.............................................. 25V

REF

R

to AGND, DGND................................................ 25V

FB

Digital Inputs to DGND ............... –0.5V to (V + 0.5V)

DD

PIN CONFIGURATION

TOP VIEW

1

2

3

4

5

6

7

8

R

V

16

15

14

13

12

11

10

9

OUT1

OUT2

AGND

STB1

LD1

FB

TOP VIEW

REF

DD

1

2

3

4

V

DD

8

7

6

5

V

REF

CLK

SRI

LD

R

CLR

FB

OUT1

GND

DGND

STB4

STB3

LD2

SRO

SRI

N8 PACKAGE

8-LEAD PDIP

S8 PACKAGE

8-LEAD PLASTIC SO

STB2

T

= 150°C, θ = 130°C/W (N)

JMAX

JA

SW PACKAGE

16-LEAD PLASTIC SO WIDE

= 150°C, θ = 100°C/W (N)

T

= 150°C, θ = 190°C/W (S)

JA

JMAX

T

JMAX

JA

T

= 150°C, θ = 130°C/W (SW)

JMAX

JA

159561fc

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For more information www.linear.com/LTC1595

LTC1595/LTC1596/LTC1596-1

ORDER INFORMATION

LEAD FREE FINISH

LTC1595ACN8#PBF

LTC1595ACS8#PBF

LTC1595BCN8#PBF

LTC1595BCS8#PBF

LTC1595CCN8#PBF

LTC1595CCS8#PBF

LTC1595AIN8#PBF

LTC1595AIS8#PBF

LTC1595BIN8#PBF

LTC1595BIS8#PBF

LTC1595CIN8#PBF

LTC1595CIS8#PBF

LTC1596ACSW#PBF

LTC1596BCSW#PBF

LTC1596CCSW#PBF

LTC1596AISW#PBF

LTC1596BISW#PBF

LTC1596CISW#PBF

LTC1596-1ACSW#PBF

LTC1596-1BCSW#PBF

LTC1596-1CCSW#PBF

LTC1596-1AISW#PBF

LTC1596-1BISW#PBF

LTC1596-1CISW#PBF

TAPE AND REEL

PART MARKING*

LTC1595ACN8

1595A

PACKAGE DESCRIPTION

8-Lead PDIP

TEMPERATURE RANGE

0°C to 70°C

LTC1595ACN8#TRPBF

LTC1595ACS8#TRPBF

LTC1595BCN8#TRPBF

LTC1595BCS8#TRPBF

LTC1595CCN8#TRPBF

LTC1595CCS8#TRPBF

LTC1595AIN8#TRPBF

LTC1595AIS8#TRPBF

LTC1595BIN8#TRPBF

LTC1595BIS8#TRPBF

LTC1595CIN8#TRPBF

LTC1595CIS8#TRPBF

LTC1596ACSW#TRPBF

LTC1596BCSW#TRPBF

LTC1596CCSW#TRPBF

LTC1596AISW#TRPBF

LTC1596BISW#TRPBF

LTC1596CISW#TRPBF

8-Lead Plastic SO

0°C to 70°C

LTC1595BCN8

1595B

8-Lead PDIP

0°C to 70°C

8-Lead Plastic SO

0°C to 70°C

LTC1595CCN8

1595C

8-Lead PDIP

0°C to 70°C

8-Lead Plastic SO

0°C to 70°C

LTC1595AIN8

1595AI

8-Lead PDIP

–40°C to 85°C

0°C to 70°C

8-Lead Plastic SO

LTC1595BIN8

1595BI

8-Lead PDIP

8-Lead Plastic SO

LTC1595CIN8

1595CI

8-Lead PDIP

8-Lead Plastic SO

LTC1596ACSW

LTC1596BCSW

LTC1596CCSW

LTC1596AISW

LTC1596BISW

LTC1596CISW

16-Lead Plastic SO Wide

0°C to 70°C

–40°C to 85°C

0°C to 70°C

LTC1596-1ACSW#TRPBF LTC1596-1ACSW

LTC1596-1BCSW#TRPBF LTC1596-1BCSW

LTC1596-1CCSW#TRPBF LTC1596-1CCSW

LTC1596-1AISW#TRPBF LTC1596-1AISW

LTC1596-1BISW#TRPBF LTC1596-1BISW

LTC1596-1CISW#TRPBF LTC1596-1CISW

0°C to 70°C

–40°C to 85°C

Consult LTC Marketing for parts specified with wider operating temperature ranges.

Consult LTC Marketing for information on non-standard lead based finish parts.

For more information on lead free part marking, go to: http://www.linear.com/leadfree/

For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/

159561fc

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For more information www.linear.com/LTC1595

LTC1595/LTC1596/LTC1596-1

ELECTRICAL CHARACTERISTICS ^Thel denotes the specifications which apply over the full operating

temperature range, otherwise specifications are at T_A= 25°C. V_DD= 5V 1ꢀ0, V_REF= 1ꢀV, V_OUT1= V_OUT2= AGND = ꢀV, T_A= T_MINto

T_MAX, unless otherwise noted.

LTC1595A/96A/96-1A LTC1595B/96B/96-1B LTC1595C/96C/96-1C

SYMBOL

Accuracy

PARAMETER

CONDITIONS

MIN

TYP

MAX

MIN

TYP MAX MIN TYP

MAX

UNITS

l

Resolution

16

15

Bits

Monotonicity

INL

DNL

GE

Integral Nonlinearity (Note 2) T = 25°C

0.25

0.35

1

2

4

LSB

A

l

T

to T

MAX

MIN

Differential

Nonlinearity

T = 25°C

0.2

1

2

LSB

A

T

to T

MIN MAX

Gain Error

(Note 3) T = 25°C

2

3

16

32

LSB

A

T

to T

MAX

MIN

V_DD= 5V 1ꢀ0, V_REF= 1ꢀV, V_OUT1= V_OUT2= AGND = ꢀV, T_A= T_MINto T_MAX, unless otherwise noted.

SYMBOL

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

l

Gain Temperature Coefficient

OUT1 Leakage Current

(Note 4) ∆Gain/∆Temperature

1

2

ppm/°C

I

(Note 5) T = 25°C

3

15

nA

LEAKAGE

A

MIN

T

to T

MAX

Zero-Scale Error

T = 25°C

MIN

0.2

1

LSB

A

l

T

to T

MAX

PSRR

Power Supply Rejection

V

= 5V 10ꢀ

1

7

2

LSB/V

DD

Reference Input

l

R

V

Input Resistance

REF

(Note 6)

5

10

kΩ

REF

AC Performance

Output Current Settling Time

Mid-Scale Glitch Impulse

(Notes 7, 8)

1

2

µs

nV-s

Using LT1122 Op Amp, C

= 33pF

FEEDBACK

Digital-to-Analog Glitch Impulse

Full-Scale Transition, V = 0V,

REF

Using LT1122 Op Amp, C

FEEDBACK

Multiplying Feedthrough Error

V

REF

= 10V, 10kHz Sine Wave

1

mV

P-P

THD

Total Harmonic Distortion

(Note 9)

108

11

dB

Equivalent DAC Thermal Noise Voltage Density

(Note 10) f = 1kHz

nV/√Hz

Analog Outputs (Note 4)

l

C

Output Capacitance (Note 4)

DAC Register Loaded to All 1s, C

DAC Register Loaded to All 0s, C

115

70

130

80

pF

OUT

OUT1

Digital Inputs

l

V

Digital Input High Voltage

Digital Input Low Voltage

Digital Input Current

2.4

V

IH

IL

0.8

1

I

0.001

µA

pF

IN

C

Digital Input Capacitance

(Note 4) V = 0V

8

IN

Digital Outputs: SRO (LTC1596/LTC1596-1)

l

V

Digital Output High Voltage

Digital Output Low Voltage

I

= 200µA

= 1.6mA

4

V

OH

OL

OH

OL

0.4

159561fc

4

For more information www.linear.com/LTC1595

LTC1595/LTC1596/LTC1596-1

ELECTRICAL CHARACTERISTICS ^Thel denotes the specifications which apply over the full operating

temperature range, otherwise specifications are at T_A= 25°C. V_DD= 5V 1ꢀ0, V_REF= 1ꢀV, V_OUT1= GND = ꢀV, T_A= T_MINto T_MAX

unless otherwise noted.

,

SYMBOL

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

Timing Characteristics (LTC1595)

l

t

Serial Input to CLK Setup Time

Serial Input to CLK Hold Time

Serial Input Data Pulse Width

Clock Pulse Width High

30

60

0

5

ns

DS

DH

SRI

CH

CL

Clock Pulse Width Low

Load Pulse Width

LD

LSB Clocked into Input Register to DAC Register Load Time

ASB

V_DD= 5V 1ꢀ0, V_REF= 1ꢀV, V_OUT1= V_OUT2= AGND = ꢀV, T_A= T_MINto T_MAX, unless otherwise noted.

SYMBOL

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

Timing Characteristics (LTC1596/LTC1596-1)

l

t

Serial Input to Strobe Setup Time

Serial Input to Strobe Hold Time

STB1 Used as the Strobe

STB2 Used as the Strobe

STB3 Used as the Strobe

STB4 Used as the Strobe

STB1 Used as the Strobe

STB2 Used as the Strobe

STB3 Used as the Strobe

STB4 Used as the Strobe

30

20

25

20

30

40

35

40

60

0

5

ns

DS1

DS2

DS3

DS4

DH1

DH2

DH3

DH4

SRI

–5

0

–5

5

15

10

15

Serial Input Data Pulse Width

Strobe Pulse Width

LD Pulse Width

to t

(Note 11)

(Note 12)

STB1

STB4

, t

LD1 LD2

LSB Strobed Into Input Register to Load DAC

Register Time

ASB

l

t

Clear Pulse Width

100

30

ns

CLR

PD1

PD

STB1 to SRO Propagation Delay

STB2, STB3, STB4 to SRO Propagation Delay

C = 50pF

150

200

L

C = 50pF

L

30

Power Supply

l

V

Supply Voltage

Supply Current

4.5

5

5.5

10

V

DD

I

DD

Digital Inputs = 0V or V

1.5

µA

DD

Note 1: Stresses beyond those listed under Absolute Maximum Ratings

may cause permanent damage to the device. Exposure to any Absolute

Maximum Rating condition for extended periods may affect device

reliability and lifetime.

Note 8: To 0.0015ꢀ for a full-scale change, measured from the falling

edge of LD1, LD2 or LD.

Note 9: V = 6V

at 1kHz. DAC register loaded with all 1s;

REF

RMS

op amp = LT1007.

Note 2: 1LSB = 0.0015ꢀ of full-scale = 15.3ppm of full-scale.

Note 3: Using internal feedback resistor.

Note 1ꢀ: Calculation from e = √4kTRB where: k = Boltzmann constant

(J/°K); R = resistance (Ω); T = temperature (°K); B = bandwidth (Hz).

n

Note 4: Guaranteed by design, not subject to test.

Note 11: Minimum high time for STB1, STB2, STB4. Minimum low time

for STB3.

Note 5: I

with DAC register loaded with all 0s.

OUT1

Note 12: Minimum low time for STB1, STB2, STB4. Minimum high time

for STB3.

Note 6: Typical temperature coefficient is 100ppm/°C.

Note 7: OUT1 load = 100Ω in parallel with 13pF.

159561fc

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For more information www.linear.com/LTC1595

LTC1595/LTC1596/LTC1596-1

TYPICAL PERFORMANCE CHARACTERISTICS

Mid-Scale Glitch Impulse

Integral Nonlinearity (INL)

Differential Nonlinearity (INL)

1.0

0.8

1.0

0.8

1nV-s TYP

USING LT1122 OP AMP

+10

0

C

V

= 33pF

FEEDBACK

REF

0.6

= 10V

0.4

0.2

0

LD FALLING EDGE

–0.2

–0.4

–0.6

–0.8

–1.0

–0.2

–0.4

–0.6

–0.8

–1.0

–10

0

1

2

3

4

0

32768

49152

16384

65535

0

16384

32768

49152

65535

TIME (s)

DIGITAL INPUT CODE

1595/96 G01

1595/96 G03

1595/96 G02

Integral Nonlinearity

vs Reference Voltage

Differential Nonlinearity

vs Reference Voltage

Full-Scale Settling Waveform

1.0

0.5

1.0

0.5

DAC

OUTPUT

5V/DIV

GATED

SETTLING

WAVEFORM

500µV/DIV

1595/96 G04

1µs/DIV

USING LT1122 OP AMP

FEEDBACK

0

C

= 33pF

–10 –8 –6 –4 –2

0

2

4

6

8

10

–10 –8 –6 –4 –2

0

2

4

6

8

10

REFERENCE VOLTAGE (V)

1595/96 G06

1595/96 G05

Multiplying Mode Frequency

Response vs Digital Code

Integral Nonlinearity

vs Supply Voltage

Differential Nonlinearity

vs Supply Voltage

2

1

0

1.0

0.5

0

–20

D15

D14

D13

D12

D11

D10

D9

D8

D7

D6

ALL

BITS

ON

–40

V

= 10V

REF

–60

D5

D4

D3

–80

D2

D1

D0

–100

ALL

BITS OFF

USING LT1122 OP AMP

= 33pF

V

= 2.5V

4

REF

C

FEEDBACK

–120

2

6

8

9

1k

10k

100k

1M

10M

3

5

7

10

2

6

8

9

100

3

4

5

7

10

SUPPLY VOLTAGE (V)

FREQUENCY (Hz)

1595/96 G08

1595/96 G07

1595/96 G09

159561fc

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For more information www.linear.com/LTC1595

LTC1595/LTC1596/LTC1596-1

TYPICAL PERFORMANCE CHARACTERISTICS

Supply Current

vs Logic Input Voltage

Logic Threshold

vs Supply Voltage

1.0

0.9

0.8

0.7

0.6

0.5

0.4

0.3

0.2

0.1

0

3.0

2.5

V

= 5V

DD

2.0

1.5

1.0

0.5

0

1

2

3

4

5

0

1

2

3

4

5

6

7

8

9

10

SUPPLY VOLTAGE (V)

INPUT VOLTAGE (V)

1595/96 G10

1595/96 G11

PIN FUNCTIONS

LTC1595

STB1, STB2, STB3, STB4 (Pins 4, 8, 1ꢀ, 11): Serial

Interface Clock Inputs. STB1, STB2 and STB4 are rising

edge triggered inputs. STB3 is a falling edge triggered

input (see Truth Tables).

V

(Pin 1): Reference Input.

REF

R (Pin2):FeedbackResistor.Normallytiedtotheoutput

FB

of the current to voltage converter op amp.

LD1,LD2(Pins5,9):SerialInterfaceLoadControlInputs.

When LD1 and LD2 are pulled low, data is loaded from

the shift register into the DAC register, updating the DAC

output (see Truth Tables).

OUT1 (Pin 3): Current Output Pin. Tie to inverting input

of current to voltage converter op amp.

GND (Pin 4): Ground Pin.

SRO (Pin 6): The Output of the Shift Register. Becomes

LD (Pin 5): The Serial Interface Load Control Input. When

LD is pulled low, data is loaded from the shift register into

the DAC register, updating the DAC output.

valid on the active edge of the serial clock.

SRI (Pin 7): The Serial Data Input. Data on the SRI pin

is latched into the shift register on the active edge of the

serial clock. Data is loaded MSB first.

SRI (Pin 6): The Serial Data Input. Data on the SRI pin

is latched into the shift register on the rising edge of the

serial clock. Data is loaded MSB first.

DGND (Pin 12): Digital Ground Pin.

CLK (Pin 7): The Serial Interface Clock Input.

CLR (Pin 13): The Clear Pin for the DAC. Clears DAC to

zero-scale when pulled low on LTC1596. Clears DAC to

mid-scalewhenpulledlowonLTC1596-1. Thispinshould

V

(Pin 8): The Positive Supply Input. 4.5V ≤ V ≤ 5.5V.

DD

Requires a bypass capacitor to ground.

be tied to V for normal operation.

DD

LTC1596/LTC1596-1

V

(Pin 14): The Positive Supply Input. 4.5V ≤ V

≤

DD

OUT1 (Pin 1): True Current Output Pin. Tie to inverting

input of current to voltage converter op amp.

5.5V. Requires a bypass capacitor to ground.

V

REF

(Pin 15): Reference Input.

OUT2 (Pin 2): Complement Current Output Pin. Tie to

analog ground.

R

(Pin 16): Feedback Resistor. Normally tied to the

FB

output of the current to voltage converter op amp.

AGND (Pin 3): Analog Ground Pin.

159561fc

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For more information www.linear.com/LTC1595

LTC1595/LTC1596/LTC1596-1

TRUTH TABLES

Table 1. LTC1596/LTC1596-1 Input Register

Table 2. LTC1596/LTC1596-1 DAC Register

CONTROL INPUTS

STB1 STB2 STB3 STB4 INPUT REGISTER AND SRO OPERATION

CLR

LD1

LD2 DAC Register Operation

0

1

0

Serial Data Bit on SRI Loaded Into Input

Register, MSB First

0

X

Reset DAC Register and Input Register to

All 0s (LTC1596) or to Mid-Scale (LTC1596-1)

(Asynchronous Operation)

0

1

X

Data Bit or SRI Appears on SRO Pin After

16 Clocked Bits

0

X

1

X

1

X

0

X

1

0

No DAC Register Operation

1

X

0

X

1

No Input Register Operation

No SRO Operation

Load DAC Register with the Contents of Input

Register

BLOCK DIAGRAM

(LTC1595)

56k

V

R

FB

1

2

REF

7k

56k

112k

3

4

OUT1

GND

V

DD

8

DECODER

D15

(MSB)

D14

D13

D12

D11

• • •

D0

(LSB)

DAC REGISTER

LOAD

LD

5

7

CLK

INPUT 16-BIT SHIFT REGISTER

IN

SRI

CLK

6

1595 BD

TIMING DIAGRAM

(LTC1595)

t

DH

t

DS

t

CL

t

CH

CLK INPUT

t

SRI

D0

LSB

D15

MSB

D14

D1

SRI

t

ASB

LD

t

LD

1595 TD

159561fc

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For more information www.linear.com/LTC1595

LTC1595/LTC1596/LTC1596-1

BLOCK DIAGRAM (LTC1596/LTC1596-1)

56k

V

R

FB

15

16

REF

7k

56k

112k

1

2

3

OUT1

OUT2

AGND

V

14

DD

DECODER

D15

CLR 13

D14

D13

D12

D11

• • •

D0

(LSB)

CLR

LOAD

(MSB)

5

9

LD1

LD2

DAC REGISTER

CLR

CLK

OUT

4

8

STB1

STB2

IN

SRI

INPUT 16-BIT SHIFT REGISTER

7

1596 BD

STB3 10

STB4

11

SRO

6

12

DGND

TIMING DIAGRAM ^{(LTC1596/LTC1596-1)}

t

DS1 DH1

t

DS2 DH2

t

DS3 DH3

t

STB1

STB2

STB3

t

DS4 DH4

t

STROBE INPUT

STB1, STB2, STB4

(INVERT FOR STB3)

t

STB4

STB1

STB2

STB3

STB4

D15

MSB

D0

LSB

SRI

D14

D13

D1

t

ASB

SRI

t

LD1

LD2

LD1, LD2

t

PD

t

PD1

D15 (MSB)

PREVIOUS WORD

D14

D13

D0 (LSB)

PREVIOUS WORD

D15 (MSB)

CURRENT WORD

SRO

PREVIOUS WORD PREVIOUS WORD

1596 TD

159561fc

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LTC1595/LTC1596/LTC1596-1

APPLICATIONS INFORMATION

Description

The 16-pin LTC1596 can operate in identical fashion to

the LTC1595 but offers additional pins for flexibility. Four

clockpinsareavailableSTB1,STB2,STB3andSTB4.STB1,

STB2 and STB4 operate like the CLK pin of the LTC1595,

capturing data on their rising edges. STB3 captures data

on its falling edge (see Truth Table 1).

TheLTC1595/LTC1596are16-bitmultiplyingDACswhich

have serial inputs and current outputs. They use preci-

sion R/2R technology to provide exceptional linearity and

stability. The devices operate from a single 5V supply and

provide 10V reference input and voltage output ranges

when used with an external op amp. These devices have

a proprietary deglitcher that reduces glitch impulse to

1nV-s over a 0V to 10V output range.

TheLTC1596hastwoloadpins,LD1andLD2.Toloaddata,

bothpinsmustbetakenlow.Ifoneofthepinsisgrounded,

the other pin will operate identically to LTC1595’s LD pin.

An asynchronous clear input (CLR) resets the LTC1596 to

zero-scale (and the LTC1596-1 to mid-scale) when pulled

low (see Truth Table 2).

Serial I/O

TheLTC1595/LTC1596haveSPI/MICROWIREcompatible

serialportsthataccept16-bitserialwords.Dataisaccepted

MSB first and loaded with a load pin.

The LTC1596 also has a data output pin SRO that can be

connected to the SRI input of another DAC to daisy chain

multiple DACs on one 3-wire interface (see LTC1596

Timing Diagram).

The 8-pin LTC1595 has a 3-wire interface. Data is shifted

into the SRI data input on the rising edge of the CLK pin.

At the end of the data transfer, data is loaded into the DAC

register by pulling the LD pin low (see LTC1595 Timing

Diagram).

Unipolar (2-Quadrant Multiplying) Mode

(V

= ꢀV to –V )

REF

OUT

The LTC1595/LTC1596 can be used with a single op amp

to provide 2-quadrant multiplying operation as shown in

Figure 1. With a fixed –10V reference, the circuits shown

give a precision unipolar 0V to 10V output swing.

V

REF

–10V TO 10V

5V

0.1µF

13

14

15

16

10

4

7

5

6

9

8

11

33pF

R

V

REF

CLR

STB3

STB1

SRI

LD1

SRO

LD2

DD

FB

–

1

µP

OUT1

V

OUT

LT1001

LTC1596

0V TO –V

REF

+

OUT2

2

STB2

STB4

DGND

12

AGND

3

1595/96 F01a

TO NEXT DAC

FOR DAISY-CHAINING

(a)

V

5V

REF

–10V TO 10V

Table 1. Unipolar Binary Code Table

DIGITAL INPUT BINARY NUMBER

0.1µF

8

1

2

R

FB

33pF

V

DD

CLK

REF

IN DAC REGISTER

ANALOG OUTPUT V

OUT

7

6

5

–

3

MSB

1111

1000

0000

LSB

1111 –V (65,535/65,536)

OUT1

SRI

P

LTC1595

V

LD

OUT

0V TO –V

1111

0000

1111

0000

LT1001

REF

+

GND

4

0000 –V (32,768/65,536) = –V /2

REF

1595/96 F01b

0001 –V (1/65,536)

REF

0000 0V

(b)

Figure 1. Unipolar Operation (2-Quadrant Multiplication) V_OUT= ꢀV to –V_REF

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LTC1595/LTC1596/LTC1596-1

APPLICATIONS INFORMATION

Bipolar (4-Quadrant Multiplying) Mode

INLdegradationand0.15LSBDNLdegradationwitha10V

full-scale range. The main effects of op amp offset will

be a degradation of zero-scale error equal to the op amp

offset, and a degradation of full-scale error equal to twice

the op amp offset. For example, the same 500µV op amp

offset will cause a 3.3LSB zero-scale error and a 6.5LSB

full-scale error with a 10V full-scale range.

(V

= –V

to V

)

REF

OUT

REF

The LTC1595/LTC1596 can be used with a dual op amp

and three external resistors to provide 4-quadrant multi-

plying operation as shown in Figure 2 (last page). With a

fixed 10V reference, the circuits shown give a precision

bipolar –10V to 10V output swing. Using the LTC1596-1

will cause the power-on reset and clear pin to reset the

DAC to mid-scale (bipolar zero).

Op amp input bias current (I

scale error equal to I

) contributes only a zero-

BIAS

(R ) = I

BIAS FB

(R ) = I

BIAS REF

(7k).

BIAS

Table 2 shows a selection of LTC op amps which are

suitable for use with the LTC1595/LTC1596. For a thor-

ough discussion of 16-bit DAC settling time and op amp

selection, refer to Application Note 74, “Component and

MeasurementAdvancesEnsure16-BitDACSettlingTime.”

Op Amp Selection

Because of the extremely high accuracy of the 16-bit

LTC1595/LTC1596, thought should be given to op amp

selection in order to achieve the exceptional performance

of which the part is capable. Fortunately, the sensitivity of

INL and DNL to op amp offset has been greatly reduced

compared to previous generations of multiplying DACs.

Grounding

As with any high resolution converter, clean grounding

is important. A low impedance analog ground plane and

Op amp offset will contribute mostly to output offset and

gain and will have minimal effect on INL and DNL. For

example, a 500µV op amp offset will cause about 0.55LSB

star grounding should be used. I

(LTC1596) and GND

OUT2

(LTC1595) must be tied to the star ground with as low a

resistance as possible.

Table 2. 16-Bit Settling Time for Various Amplifiers Driven by the LT1595 DAC. LT1468 (Shaded) Offers Fastest Settling Time While

Maintaining Accuracy Over Temperature

AMPLIFIER

LT1001

LT1007

LT1013

LT1077

LT1097

LT1112

LT1178

LT1468

CONSERVATIVE SETTLING TIME AND COMPENSATION VALUE

COMMENTS

120µs

19µs

100pF

150pF

100pF

75pF

Good Low Speed Choice

I Gives ≈1LSB Error at 25°C

B

75µs

≈1LSB Error Due to V Over Temperature

OS

200µs

120µs

450µs

2.5µs

Good Low Speed Choice

100pF

30pF

Good Low Speed Choice Dual

Low Power Dual

Fastest Settling with 16-Bit Performance

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11

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LTC1595/LTC1596/LTC1596-1

PACKAGE DESCRIPTION

Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.

N8 Package

8-Lead PDIP (Narrow .3ꢀꢀ Inch)

(Reference LTC DWG # 05-08-1510 Rev I)

.400*

(10.160)

MAX

8

7

6

5

4

.255 ± .015*

(6.477 ± 0.381)

1

2

3

.130 ± .005

.300 – .325

.045 – .065

(3.302 ± 0.127)

(1.143 – 1.651)

(7.620 – 8.255)

.065

(1.651)

TYP

.008 – .015

(0.203 – 0.381)

.120

.020

(0.508)

MIN

(3.048)

MIN

+.035

.325

–.015

.018 ± .003

(0.457 ± 0.076)

.100

(2.54)

BSC

+0.889

8.255

N8 REV I 0711

(

)

–0.381

NOTE:

INCHES

1. DIMENSIONS ARE

MILLIMETERS

*THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.

MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .010 INCH (0.254mm)

159561fc

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LTC1595/LTC1596/LTC1596-1

PACKAGE DESCRIPTION

Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.

S8 Package

8-Lead Plastic Small Outline (Narrow .150 Inch)

(Reference LTC DWG # 05-08-1610 Rev G)

.189 – .197

(4.801 – 5.004)

.045 ±.005

NOTE 3

.050 BSC

7

5

8

6

.245

MIN

.160 ±.005

.150 – .157

(3.810 – 3.988)

NOTE 3

.228 – .244

(5.791 – 6.197)

.030 ±.005

TYP

1

3

4

2

RECOMMENDED SOLDER PAD LAYOUT

.010 – .020

(0.254 – 0.508)

× 45°

.053 – .069

(1.346 – 1.752)

.004 – .010

(0.101 – 0.254)

.008 – .010

(0.203 – 0.254)

0°– 8° TYP

.016 – .050

(0.406 – 1.270)

.050

(1.270)

BSC

.014 – .019

(0.355 – 0.483)

TYP

NOTE:

INCHES

1. DIMENSIONS IN

(MILLIMETERS)

2. DRAWING NOT TO SCALE

3. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.

MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm)

4. PIN 1 CAN BE BEVEL EDGE OR A DIMPLE

SO8 REV G 0212

159561fc

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LTC1595/LTC1596/LTC1596-1

PACKAGE DESCRIPTION

Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.

SW Package

16-Lead Plastic Small Outline (Wide .3ꢀꢀ Inch)

(Reference LTC DWG # 05-08-1620)

.050 BSC .045 .005

.030 .005

TYP

.398 – .413

(10.109 – 10.490)

NOTE 4

15 14

12

10

9

N

16

N

13

11

.325 .005

.420

MIN

.394 – .419

(10.007 – 10.643)

NOTE 3

N/2

8

1

2

3

N/2

RECOMMENDED SOLDER PAD LAYOUT

2

3

5

7

1

4

6

.291 – .299

(7.391 – 7.595)

NOTE 4

.037 – .045

(0.940 – 1.143)

.093 – .104

(2.362 – 2.642)

.010 – .029

¥ 45∞

(0.254 – 0.737)

.005

(0.127)

RAD MIN

0 – 8 TYP

.050

(1.270)

BSC

.004 – .012

.009 – .013

(0.102 – 0.305)

NOTE 3

(0.229 – 0.330)

.014 – .019

.016 – .050

(0.356 – 0.482)

TYP

(0.406 – 1.270)

NOTE:

1. DIMENSIONS IN

INCHES

(MILLIMETERS)

S16 (WIDE) 0502

2. DRAWING NOT TO SCALE

3. PIN 1 IDENT, NOTCH ON TOP AND CAVITIES ON THE BOTTOM OF PACKAGES ARE THE MANUFACTURING OPTIONS.

THE PART MAY BE SUPPLIED WITH OR WITHOUT ANY OF THE OPTIONS

4. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.

MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm)

159561fc

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LTC1595/LTC1596/LTC1596-1

REVISION HISTORY ^{(Revision history begins at Rev B)}

REV

DATE

02/12 Removed 16-Lead PDIP

8/15 Fixed errors in Table 3

DESCRIPTION

PAGE NUMBER

B

1, 2

16

C

159561fc

Information furnished by Linear Technology Corporation is believed to be accurate and reliable.

However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-

tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.

15

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LTC1595/LTC1596/LTC1596-1

TYPICAL APPLICATION

R2

20k

R3

20k

V

REF

–10V TO 10V

5V

0.1µF

13

14

15

16

10

4

7

5

6

9

8

11

33pF

R

V

REF

CLR

STB3

STB1

SRI

LD1

SRO

LD2

DD

FB

–

1

2

R1

10k

µP

OUT1

OUT2

–

1/2 LT1112

+

LTC1596-1

(20k 2)

V

OUT

–V

1/2 LT1112

+

TO V

REF

STB2

STB4

DGND

12

AGND

3

RESISTORS: CADDOCK T914-20K-010-02

(OR EQUIVALENT) 20k, 0.01%, TC TRACK = 2ppm/°C

TO NEXT DAC

FOR DAISY-CHAINING

1595/96 F02a

(a)

R3

20k

R2

20k

V

Table 3. Bipolar Offset Binary Code Table

DIGITAL INPUT BINARY NUMBER

REF

–10V TO 10V

5V

IN DAC REGISTER

ANALOG OUTPUT V

OUT

0.1F

8

1

2

R

FB

MSB

1111

1000

0111

0000

LSB

1111

0001

33pF

V

DD

REF

7

6

5

1111

0000

1111

0000

1111

0000

1111

0000

V

(32,767/32,768)

(1/32,768)

REF

CLK

SRI

LD

–

3

R1

LTC1595

OUT1

µP

10k

–

1/2 LT1112

+

0000 0V

1111 –V (1/32,768)

0000 –V

GND

4

(20k 2)

V

OUT

–V

1/2 LT1112

+

TO V

REF

1595/96 F02b

(b)

Figure 2. Bipolar Operation (4-Quadrant Multiplication) V_OUT= –V_REFto V_REF

RELATED PARTS

PART NUMBER

DACs

DESCRIPTION

COMMENTS

LTC1590

LTC1597

LTC1650

LTC1658

LTC7543/LTC8143/LTC8043

ADCs

Dual Serial I/O Multiplying I

12-Bit DAC

16-Pin SO and PDIP, SPI Interface

OUT

Parallel 16-Bit Current Output DAC

Serial 16-Bit Voltage Output DAC

Serial 14-Bit Voltage Output DAC

Low Glitch, 1LSB Maximum INL, DNL

Low Noise and Glitch Rail-to-Rail V

OUT

Low Power, 8-Lead MSOP Rail-to-Rail V

OUT

Serial I/O Multiplying I

12-Bit DACs

Clear Pin and Serial Data Output (LTC8143)

OUT

LTC1418

LTC1604

LTC1605

LTC2400

Op Amps

LT1001

14-Bit, 200ksps 5V Sampling ADC

16-Bit, 333ksps Sampling ADC

Single 5V, 16-Bit 100ksps ADC

24-Bit, ∆∑ ADC in SO-8

16mW Dissipation, Serial and Parallel Outputs

2.5V Input, SINAD = 90dB, THD = 100dB

Low Power, 10V Inputs

1ppm (4ppm) Offset (Full-Scale), Internal 50Hz/60Hz Notches

Precision Operational Amplifier

Low Offset, Low Drift

LT1112

Dual Low Power, Precision Picoamp Input Op Amp Low Offset, Low Drift

LT1468

90MHz, 22V/µs, 16-Bit Accurate Op Amp

Precise, 1µs Settling to 0.0015ꢀ

References

LT1236

Precision Reference

Ultralow Drift, 5ppm/°C, High Accuracy 0.05ꢀ

Ultralow Drift, 10ppm/°C, High Accuracy 0.05ꢀ

LT1634

Micropower Reference

159561fc

LT 0815 REV C • PRINTED IN USA

LinearTechnology Corporation

1630 McCarthy Blvd., Milpitas, CA 95035-7417

16

For more information www.linear.com/LTC1595

(408)432-1900 FAX: (408) 434-0507 www.linear.com/LTC1595

●

 LINEAR TECHNOLOGY CORPORATION 1997


型号：	LTC1595ACN8#PBF
厂家：	Linear
描述：	LTC1595 - Serial 16-Bit Multiplying DACs; Package: PDIP; Pins: 8; Temperature Range: 0°C to 70°C 光电二极管转换器
文件：	总16页 (文件大小：323K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

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