LTC1606AC_技术文档

Final Electrical Specifications

LTC1606

16-Bit, 250ksps,

Single Supply ADC

March 2000

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DESCRIPTION

FEATURES

The LTC^®1606 is a 250ksps, sampling 16-bit A/D con-

verter that draws only 75mW (typical) from a single 5V

supply. This easy-to-use device includes sample-and-

hold, precision reference, switched capacitor successive

approximation A/D and trimmed internal clock.

■

Sample Rate: 250ksps

■

Single 5V Supply

■

Bipolar Input Range: ±10V

■

Signal-to-Noise Ratio: 90dB Typ

Power Dissipation: 75mW Typ

Integral Nonlinearity: ±2.0LSB Max

Guaranteed No Missing Codes

Operates with Internal or External Reference

Internal Synchronized Clock

The LTC1606’s input range is an industry standard ±10V.

Maximum DC specs include ±2.0LSB INL and 16 bits no

missing codes over temperature. An external reference

can be used if greater accuracy over temperature is

needed.

28-Pin SSOP Package

Improved 2nd Source to AD976A and ADS7805

The 90dB signal-to-noise ratio offers an improvement of

3dBovercompetingdevices,andtheRMStransitionnoise

is reduced (0.65LSB vs 1LSB) relative to competitive

parts.

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APPLICATIONS

■

Industrial Process Control

■

Multiplexed Data Acquisition Systems

The ADC has a microprocessor compatible, 16-bit or two

byte parallel output port. A convert start input and a data

ready signal (BUSY) ease connections to FIFOs, DSPs and

■

High Speed Data Acquisition for PCs

■

Digital Signal Processing

microprocessors.

, LTC and LT are registered trademarks of Linear Technology Corporation.

Low Power, 250kHz, 16-Bit Sampling ADC on 5V Supply

5V

10µF

0.1µF

28

27

V

DIG ANA

6 TO 13

15 TO 22

16-BIT

200Ω

7.35k

V

IN

1

±10V

INPUT

16-BIT

SAMPLING ADC

OR 2 BYTE

PARALLEL

BUS

D15 TO D0

33.2k

2.5k

9k

CAP

REF

4

3

4.096V

26

25

BUSY

CS

10µF

1.64x

BUFFER

DIGITAL

CONTROL

SIGNALS

CONTROL

LOGIC AND

TIMING

4k

R/C 24

2.5V

REFERENCE

BYTE

23

2.2µF

AGND1 AGND2

DGND

14

1606 TA01

2

5

Information furnished by Linear Technology Corporation is believed to be accurate and reliable.

However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-

tationthattheinterconnectionofitscircuitsasdescribedhereinwillnotinfringeonexistingpatentrights.

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LTC1606

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/O

PACKAGE RDER I FOR ATIO

ABSOLUTE AXI U RATI GS

(Notes 1, 2)

ORDER PART

TOP VIEW

V_ANA.......................................................................... 7V

V_DIGto V_ANA........................................................... 0.3V

NUMBER

V

1

2

3

4

5

6

7

8

9

28

27

V

IN

DIG

AGND1

REF

ANA

LTC1606ACG

LTC1606AIG

LTC1606CG

LTC1606IG

V

_DIG........................................................................... 7V

26 BUSY

25 CS

24 R/C

23 BYTE

22 D0

21 D1

20 D2

19 D3

18 D4

17 D5

16 D6

15 D7

Ground Voltage Difference

DGND, AGND1 and AGND2 .............................. ±0.3V

Analog Inputs (Note 3)

CAP

AGND2

D15 (MSB)

D14

V_IN..................................................................... ±25V

CAP ............................ V_ANA+ 0.3V to AGND2 – 0.3V

REF....................................Indefinite Short to AGND2

Momentary Short to V_ANA

D13

D12

D11 10

D10 11

D9 12

Digital Input Voltage (Note 4) ........ V_DGND– 0.3V to 10V

Digital Output Voltage........ V_DGND– 0.3V to V_DIG+ 0.3V

Power Dissipation.............................................. 500mW

Operating Ambient Temperature Range

D8 13

DGND 14

LTC1606AC/LTC1606C............................ 0°C to 70°C

LTC1606AI/LTC1606I ......................... – 40°C to 85°C

Storage Temperature Range ................. –65°C to 150°C

Lead Temperature (Soldering, 10 sec).................. 300°C

G PACKAGE

28-LEAD PLASTIC SSOP

T_JMAX= 125°C, θ_JA= 95°C/W

Consult factory for Military grade parts.

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CONVERTER CHARACTERISTICS

The ● indicates specifications which apply over the full operating

temperature range, otherwise specifications are at T_A= 25°C. (Notes 5, 6)

LTC1606

TYP

LTC1606A

TYP

PARAMETER

CONDITIONS

MIN

16

MAX

MIN

16

MAX

UNITS

Resolution

●

Bits

No Missing Codes

Transition Noise

15

16

0.65

LSB

RMS

Integral Linearity Error

Bipolar Zero Error

Bipolar Zero Error Drift

Full-Scale Error Drift

Full-Scale Error

(Note 7)

●

±3

±2

LSB

Ext. Reference = 2.5V (Note 8)

±10

mV

±2

±7

±2

±5

ppm/°C

%

Ext. Reference = 2.5V (Notes 12, 13)

Ext. Reference = 2.5V

●

±0.50

±8

±0.25

±8

Full-Scale Error Drift

Power Supply Sensitivity

±2

ppm/°C

V

= V = V

V = 5V ±5% (Note 9)

DD

LSB

ANA

DIG

DD

2

LTC1606

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The ● indicates specifications which apply over the full operating temperature range, otherwise

ANALOG INPUT

specifications are at T_A= 25°C. (Note 5)

LTC1606/LTC1606A

SYMBOL PARAMETER

CONDITIONS

4.75V ≤ V

MIN

TYP

±10

10

MAX

UNITS

V

C

Analog Input Range (Note 9)

Analog Input Capacitance

Analog Input Impedance

≤ 5.25V, 4.75V ≤ V ≤ 5.25V

●

IN

ANA

DIG

pF

R

IN

10

kΩ

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DYNAMIC ACCURACY ^{(Notes 5, 14)}

LTC1606

TYP

LTC1606A

SYMBOL PARAMETER

CONDITIONS

MIN

MAX

MIN

TYP

MAX

UNITS

S/(N + D) Signal-to-(Noise + Distortion) Ratio 1kHz Input Signal (Note 14)

10kHz Input Signal

90

30

90

30

dB

87

20kHz, –60dB Input Signal

THD

Total Harmonic Distortion

1kHz Input Signal, First 5 Harmonics

10kHz Input Signal, First 5 Harmonics

–102

–94

– 102

–94

dB

–89

Peak Harmonic or Spurious Noise 1kHz Input Signal

10kHz Input Signal

–102

–94

–102

–94

dB

Full-Power Bandwidth

Aperture Delay

(Note 15)

275

40

275

40

kHz

ns

Aperture Jitter

Sufficient to Meet AC Specs Sufficient to Meet AC Specs

Transient Response

Overvoltage Recovery

Full-Scale Step (Note 9)

(Note 16)

2

µs

150

ns

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INTERNAL REFERENCE CHARACTERISTICS ^The● indicates specifications which apply over the full

operating temperature range, otherwise specifications are at T_A= 25°C. (Note 5)

LTC1606/LTC1606A

PARAMETER

CONDITIONS

MIN

TYP

2.500

±5

MAX

UNITS

V

Output Voltage

Output Tempco

I

= 0

●

2.470

2.520

V

REF

OUT

ppm/°C

Internal Reference Source Current

External Reference Voltage for Specified Linearity

External Reference Current Drain

CAP Output Voltage

1

µA

V

(Notes 9, 10)

2.30

2.50

2.70

100

Ext. Reference = 2.5V (Note 9)

●

µA

V

I

= 0

4.096

OUT

3

LTC1606

DIGITAL INPUTS AND DIGITAL OUTPUTS

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The ● indicates specifications which apply over the full

operating temperature range, otherwise specifications are at T_A= 25°C. (Note 5)

LTC1606/LTC1606A

SYMBOL PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

V

High Level Input Voltage

Low Level Input Voltage

Digital Input Current

V

= 5.25V

DD

= 4.75V

DD

= 0V to V

IN

●

2.4

IH

IL

0.8

V

I

±10

µA

pF

V

IN

DD

C

V

Digital Input Capacitance

High Level Output Voltage

5

IN

V

= 4.75V

I = –10µA

4.5

OH

DD

O

I = –200µA

O

●

4.0

V

Low Level Output Voltage

I = 160µA

O

0.05

0.10

V

OL

DD

I = 1.6mA

O

●

0.4

±10

15

V

I

Hi-Z Output Leakage D15 to D0

Hi-Z Output Capacitance D15 to D0

Output Source Current

= 0V to V , CS High

µA

pF

mA

OZ

OUT

DD

C

CS High (Note 9)

OZ

I

V

= 0V

–10

10

SOURCE

SINK

OUT

Output Sink Current

= V

DD

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TIMING CHARACTERISTICS ^The● indicates specifications which apply over the full operating temperature

range, otherwise specifications are at T_A= 25°C. (Note 5)

LTC1606/LTC1606A

SYMBOL

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

kHz

µs

f

t

Maximum Sampling Frequency

Conversion Time

●

250

SAMPLE(MAX)

2.5

1.5

CONV

Acquisition Time

µs

ACQ

1

Convert Pulse Width

Data Valid Delay After R/C↓

BUSY Delay from R/C↓

BUSY Low

(Note 11)

(Note 9)

40

ns

2.5

65

µs

2

C = 30pF

L

ns

3

2.5

µs

4

BUSY Delay After End of Conversion

Aperture Delay

100

40

15

90

2

ns

5

ns

6

Bus Relinquish Time

BUSY Delay After Data Valid

Previous Data Valid After R/C↓

R/C to CS Setup Time

Time Between Conversions

Bus Access

●

50

ns

7

20

ns

8

µs

9

(Notes 9, 10)

●

5

4

ns

10

11

12

µs

C = 30pF, (Notes 10)

L

15

60

ns

Byte Delay

C = 30pF, (Notes 9, 10)

L

ns

4

LTC1606

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POWER REQUIREMENTS ^The● indicates specifications which apply over the full operating temperature

range, otherwise specifications are at T_A= 25°C. (Note 5)

LTC1606/LTC1606A

SYMBOL

PARAMETER

CONDITIONS

MIN

TYP

MAX

5.25

20

UNITS

V

Positive Supply Voltage

Positive Supply Current

Power Dissipation

(Notes 9, 10)

4.75

DD

I

●

15

75

mA

DD

P

100

mW

DIS

Note 1: Absolute Maximum Ratings are those values beyond which the life

of a device may be impaired.

Note 9: Guaranteed by design, not subject to test.

Note 10: Recommended operating conditions.

Note 2: All voltage values are with respect to ground with DGND, AGND1

and AGND2 wired together (unless otherwise noted).

Note 11: With CS low the falling R/C edge starts a conversion. If R/C

returns high at a critical point during the conversion, it can create errors.

For best results, ensure that R/C returns high within 1µs after the start of

the conversion.

Note 3: When these pin voltages are taken below ground or above V

=

ANA

V

= V , they will be clamped by internal diodes. This product can

DIG

DD

handle input currents of greater than 100mA below ground or above V

without latch-up.

DD

Note 12: As measured with fixed resistors shown in Figure 4. Adjustable to

zero with external potentiometer.

Note 4: When these pin voltages are taken below ground, they will be

clamped by internal diodes. This product can handle input currents of

90mA below ground without latchup. These pins are not clamped to V

Note 13: Full-scale error is the worst-case of –FS or +FS untrimmed

deviation from ideal first and last code transitions, divided by the transition

voltage (not divided by the full-scale range) and includes the effect of

offset error.

.

DD

Note 5: V = 5V, f

= 250kHz, t = t = 5ns unless otherwise

r f

DD

SAMPLE

specified.

Note 14: All specifications in dB are referred to a full-scale ±10V input.

Note 6: Linearity, offset and full-scale specifications apply for a V input

with respect to ground.

Note 7: Integral nonlinearity is defined as the deviation of a code from a

straight line passing through the actual end points of the transfer curve.

The deviation is measured from the center of the quantization band.

IN

Note 15: Full-power bandwidth is defined as full-scale input frequency at

which a signal-to-(noise + distortion) degrades to 60dB or 10 bits of

accuracy.

Note 16: Recovers to specified performance after (2• FS) input

overvoltage.

Note 8: Bipolar offset is the offset voltage measured from –0.5 LSB when

the output code flickers between 0000 0000 0000 0000 and 1111 1111

1111 1111.

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PIN FUNCTIONS

V_IN(Pin 1): Analog Input. Connect through a 200Ω

resistor to the analog input. Full-scale input range is

±10V.

DGND (Pin 14): Digital Ground.

D7 to D0 (Pins 15 to 22): Three-State Data Outputs.

Hi-Z state when CS is high or when R/C is low.

AGND1 (Pin 2): Analog Ground. Tie to analog ground

plane.

BYTE (Pin 23): Byte Select. With BYTE low, data will be

output with Pin 6 (D15) being the MSB and Pin 22 (D0)

being the LSB. With BYTE high the upper eight bits and

the lower eight bits will be switched. The MSB is output

on Pin 15 and bit 8 is output on Pin 22. Bit 7 is output on

Pin 6 and the LSB is output on Pin 13.

REF (Pin 3): 2.5V Reference Output. Bypass with 2.2µF

tantalum capacitor. Can be driven with an external refer-

ence.

CAP (Pin 4): Reference Buffer Output. Bypass with 10µF

tantalumcapacitor.Thecapacitoroutputvoltageis4.096V

when REF = 2.5V.

R/C (Pin 24): Read/Convert Input. With CS low, a falling

edge on R/C puts the internal sample-and-hold into the

hold state and starts a conversion. With CS low, a rising

edge on R/C enables the output data bits.

AGND2 (Pin 5): Analog Ground. Tie to analog ground

plane.

D15 to D8 (Pins 6 to 13): Three-State Data Outputs.

Hi-Z state when CS is high or when R/C is low.

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LTC1606

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PIN FUNCTIONS

CS (Pin 25): Chip Select. Internally OR’d with R/C. With

R/C low, a falling edge on CS will initiate a conversion.

With R/C high, a falling edge on CS will enable the output

data.

or another conversion will start without time for signal

acquisition.

V

_ANA(Pin 27): 5V Analog Supply. Bypass to ground with

a 0.1µF ceramic and a 10µF tantalum capacitor.

BUSY (Pin 26): Output Shows Converter Status. It is low

when a conversion is in progress. Data valid on the rising

edge of BUSY. CS or R/C must be high when BUSY rises

V_DIG(Pin 28): 5V Digital Supply. Connect directly to Pin

27.

TEST CIRCUITS

Load Circuit for Output Float Delay

Load Circuit for Access Timing

5V

1k

DBN

1k

30pF

1k

30pF

1606 TC02

1606 TC01

A. Hi-Z TO V AND V TO V

B. Hi-Z TO V AND V TO V

OL OH

A. V TO Hi-Z

OH

B. V TO Hi-Z

OL

OH

OL

OH

OL

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FUNCTIONAL BLOCK DIAGRA

C

SAMPLE

7.35k

V

IN

V

ANA

9k

2.5k

SAMPLE

DIG

ZEROING SWITCHES

4k

REF

2.5V REF

+

REF BUF

1.64x

COMP

16-BIT CAPACITIVE DAC

–

CAP

(4.096V)

16

D15

D0

SUCCESSIVE APPROXIMATION

REGISTER

•

OUTPUT LATCHES

AGND1

AGND2

DGND

INTERNAL

CLOCK

CONTROL LOGIC

1606 BD

CS

R/C

BYTE

BUSY

6

LTC1606

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APPLICATIONS INFORMATION

Conversion Details

Driving the Analog Inputs

The LTC1606 uses a successive approximation algorithm

and an internal sample-and-hold circuit to convert an

analog signal to a 16-bit or two byte parallel output. The

ADC is complete with a precision reference and an internal

clock. The control logic provides easy interface to micro-

processors and DSPs. (Please refer to the Digital Interface

section for the data format.)

The nominal input range for the LTC1606 is ±10V or

(±4•V_REF)andtheinputisovervoltageprotectedto±25V.

Theinputimpedanceistypically10kΩ,therefore,itshould

be driven with a low impedance source. Wideband noise

coupling into the input can be minimized by placing a

1000pF capacitor at the input as shown in Figure 2. An

NPO-type capacitor gives the lowest distortion. Place the

capacitor as close to the device input pin as possible. If an

amplifier is to be used to drive the input, care should be

takentoselectanamplifierwithadequateaccuracy,linear-

ity and noise for the application. The following list is a

summary of the op amps that are suitable for driving the

LTC1606. More detailed information is available in the

LinearTechnologydatabooksandLinearView^TMCD-ROM.

Conversion start is controlled by the CS and R/C inputs. At

the start of conversion the successive approximation

register (SAR) is reset. Once a conversion cycle has

begun, it cannot be restarted.

During the conversion, the internal 16-bit capacitive DAC

output is sequenced by the SAR from the most significant

bit (MSB) to the least significant bit (LSB). Referring to

Figure 1, V_INis connected through the resistor divider to

the sample-and-hold capacitor during the acquire phase

andthecomparatoroffsetisnulledbytheautozeroswitches.

In this acquire phase, a minimum delay of 1.5µs will

provide enough time for the sample-and-hold capacitor to

acquire the analog signal. During the convert phase, the

autozero switches open, putting the comparator into the

compare mode. The input switch switches C_SAMPLEto

ground, injecting the analog input charge onto the sum-

ming junction. This input charge is successively com-

pared with the binary-weighted charges supplied by the

capacitive DAC. Bit decisions are made by the high speed

comparator. At the end of a conversion, the DAC output

balances the V_INinput charge. The SAR contents (a 16-bit

data word) that represents the V_INare loaded into the

16-bit output latches.

200Ω

A

IN

V

IN

1000pF

33.2k

CAP

1606 • F02

Figure 2. Analog Input Filtering

LT1007 - Low noise precision amplifier. 2.7mA supply

current ±5V to ±15V supplies. Gain bandwidth product

8MHz. DC applications.

LT1097 - Low cost, low power precision amplifier. 300µA

supply current. ±5V to ±15V supplies. Gain bandwidth

product 0.7MHz. DC applications.

LT1227-140MHzvideocurrentfeedbackamplifier. 10mA

supply current. ±5V to ±15V supplies. Low noise and low

distortion.

SAMPLE

SI

C

SAMPLE

R

SAMPLE

HOLD

IN1

LT1360 - 37MHz voltage feedback amplifier. 3.8mA sup-

ply current. ±5V to ±15V supplies. Good AC/DC specs.

V

IN

–

+

R

IN2

LT1363 - 50MHz voltage feedback amplifier. 6.3mA sup-

ply current. Good AC/DC specs.

C

V

DAC

COMPARATOR

DAC

S

A

R

LT1364/LT1365 - Dual and quad 50MHz voltage feedback

amplifiers. 6.3mA supply current per amplifier. Good AC/

DC specs.

16-BIT

LATCH

LT1468 - 90MHz 22V/µs 16-bit accurate amplifier.

1606 • F01

Figure 1. LTC1606 Simplified Equivalent Circuit

LinearView is a trademark of Linear Technology Corporation

7

LTC1606

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APPLICATIONS INFORMATION

is applied to V_INand R4 is adjusted until the output code

is changing between 0111 1111 1111 1110 and 0111

1111 1111 1111. Figure 6 shows the bipolar transfer

characteristic of the LTC1606.

Internal Voltage Reference

The LTC1606 has an on-chip, temperature compensated,

curvature corrected, bandgap reference, which is factory

trimmed to 2.50V. The full-scale range of the ADC is equal

to (±4 • V_REF) or nominally ±10V. The output of the

reference is connected to the input of a buffer (1.64x)

througha4kresistor(seeFigure3). Theinputtothebuffer

or the output of the reference is available at REF (Pin 3).

The internal reference can be overdriven with an external

reference if more accuracy is needed. The buffer output

drives the internal DAC and is available at CAP (Pin 4). The

CAP pin can be used to drive a steady DC load of less than

2mA. Driving an AC load is not recommended because it

can cause the performance of the converter to degrade.

1

V

±10V INPUT

IN

2

200Ω

1%

AGND1

2.2µF

+

LTC1606

33.2k

1%

3

4

REF

CAP

+

10µF

5

AGND2

1606 • F04

Figure 4. ±10V Input Without Trim

4k

3

REF

(2.5V)

BANDGAP

REFERENCE

1

2.2µF

V

±10V INPUT

IN

2

+

–

200Ω

AGND1

R

1%

2.2µF

+

3

0.64R

33.2k

REF

5V

1%

LTC1606

4

CAP

(4.096V)

576k

R4

50k

INTERNAL

CAPACITOR

DAC

4

5

CAP

+

10µF

R3

50k

10µF

AGND2

1606 • F03

1606 • F05

Figure 3. Internal or External Reference Source

Figure 5. ±10V Input with Offset and Gain Trim

For minimum code transition noise, the REF pin and the

CAP pin should each be decoupled with a capacitor to

filter wideband noise from the reference and the buffer

(2.2µFtantalumfortheREFpinand10µFtantalumforthe

CAP pin).

011...111

BIPOLAR

011...110

ZERO

000...001

000...000

111...111

111...110

Offset and Gain Adjustments

TheLTC1606offsetandfull-scaleerrorshavebeentrimmed

at the factory with the external resistors shown in Figure

4. This allows for external adjustment of offset and full

scale in applications where absolute accuracy is impor-

tant. See Figure 5 for the offset and gain trim circuit. First,

adjust the offset to zero by adjusting resistor R3. Apply an

input voltage of –152.6µV (–0.5LSB) and adjust R3 so the

codeischangingbetween1111111111111111and0000

0000 0000 0000. The gain error is trimmed by adjusting

resistorR4. Aninputvoltageof9.999542V(+FS–1.5LSB)

100...001

FS = 20V

100...000

1LSB = FS/65536

–1 0V

LSB

INPUT VOLTAGE (V)

1

LSB

–FS/2

FS/2 – 1LSB

1606 • F06

Figure 6. LTC1606 Bipolar Transfer Characteristics

8

LTC1606

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APPLICATIONS INFORMATION

DC Performance

Timing and Control

Onewayofmeasuringthetransitionnoiseassociatedwith

a high resolution ADC is to use a technique where a DC

signal is applied to the input of the ADC and the resulting

output codes are collected over a large number of conver-

sions. For example in Figure 7, the distribution of output

code is shown for a DC input that has been digitized 4096

times. The distribution is Gaussian and the RMS code

transition is about 0.65LSB.

Conversion start and data read are controlled by two

digital inputs: CS and R/C. To start a conversion and put

the sample-and-hold into the hold mode, bring CS and

R/C low for no less than 40ns. Once initiated, it cannot be

restarted until the conversion is complete. Converter

statusisindicatedbytheBUSYoutputandthisislowwhile

the conversion is in progress.

Therearetwomodesofoperation.Thefirstmodeisshown

in Figure 8. The digital input R/C is used to control the start

of conversion. CS is tied low. When R/C goes low, the

sample-and-hold goes into the hold mode and a conver-

sion is started. BUSY goes low and stays low during the

conversion and will go back high after the conversion has

been completed and the internal output shift registers

havebeenupdated.R/Cshouldremainlowfornolessthan

40ns. During the time R/C is low, the digital outputs are in

a Hi-Z state. R/C should be brought back high within 1µs

after the start of the conversion to ensure that no errors

occur in the digitized result. The second mode, shown in

Figure 9, uses the CS signal to control the start of a

conversion and the reading of the digital output. In this

mode the R/C input signal should be brought low no less

than 10ns before the falling edge of CS. The minimum

pulse width for CS is 40ns. When CS falls, BUSY goes low

and will stay low until the end of the conversion. BUSY will

go high after the conversion has been completed. The new

data is valid when CS is brought back low again to initiate

2500

2000

1500

1000

500

0

–3 –2 –1

0

1

2

3

4

CODE

1606 • F07

Figure 7. Histogram for 4096 Conversions

DIGITAL INTERFACE

Internal Clock

The ADC has an internal clock that is trimmed to achieve

a typical conversion time of 2.3µs. No external adjust-

mentsarerequiredand, withthetypicalacquisitiontimeof a read. Again, it is recommended that both R/C and CS

1µs, throughput performance of 250ksps is assured.

return high within 1µs after the start of the conversion.

t

1

R/C

t

11

t

2

t

4

t

3

BUSY

MODE

t

6

5

ACQUIRE

CONVERT

ACQUIRE

CONVERT

Hi-Z

t

ACQ

CONV

t

9

DATA

VALID

DATA

VALID

Hi-Z

NOT VALID

DATA MODE

1606 • F08

t

7

8

Figure 8. Conversion Timing with Outputs Enabled After Conversion (CS Tied Low)

9

LTC1606

APPLICATIONS INFORMATION

U

W U U

t

10

R/C

t

1

CS

t

3

t

4

BUSY

MODE

t

6

ACQUIRE

CONVERT

ACQUIRE

t

CONV

HI-Z

Hi-Z

DATA

VALID

DATA BUS

t

7

12

1606 • F09

Figure 9. Using CS to Control Conversion and Read Timing

t

10

R/C

CS

BYTE

Hi-Z

PINS 6 TO 13

PINS 15 TO 22

HIGH BYTE

LOW BYTE

HIGH BYTE

t

7

12

1606 • F10

Figure 10. Using CS and BYTE to Control Data Bus Read Timing

10

LTC1606

U

W U U

APPLICATIONS INFORMATION

Output Data

expressed as:

The output data can be read as a 16-bit word or it can be

read as two 8-bit bytes. The format of the output data is

two’s complement. The digital input pin BYTE is used to

control the two byte read. With the BYTE pin low, the first

eight MSBs are output on the D15 to D8 pins and the eight

LSBs are output on the D7 to D0 pins. When the BYTE pin

is taken high, the eight LSBs replace the eight MSBs

(Figure 10).

2

√V₂+ V₃+ V₄... + V_N

THD = 20log

V₁

where V₁is the RMS amplitude of the fundamental fre-

quency and V₂through V_Nare the amplitudes of the

second through Nth harmonics.

Board Layout, Power Supplies and Decoupling

Wire wrap boards and molded sockets are not recom-

mended for high resolution or high speed A/D converters.

To obtain the best performance from the LTC1606, a

printed circuit board is required. Layout for the printed

circuit board should ensure the digital and analog signal

linesareseparatedasmuchaspossible. Inparticular, care

should be taken not to run any digital track alongside an

analog signal track or underneath the ADC. The analog

input should be screened by AGND.

Dynamic Performance

FFT (Fast Fourier Transform) test techniques are used to

test the ADC’s frequency response, distortion and noise at

the rated throughput. By applying a low distortion sine

wave and analyzing the digital output using an FFT algo-

rithm, the ADC’s spectral content can be examined for

frequencies outside the fundamental.

Signal-to-Noise Ratio

Pay particular attention to the design of the analog and

digital ground planes. The DGND pin of the LTC1606

should be tied to the analog ground plane. Placing the

bypasscapacitorascloseaspossibletothepowersupply,

the reference and reference buffer output is very impor-

tant. Low impedance common returns for these bypass

capacitors are essential to low noise operation of the ADC,

and the foil width for these tracks should be as wide as

possible. Also, since any potential difference in grounds

between the signal source and ADC appears as an error

voltage in series with the input signal, attention should be

paid to reducing the ground circuit impedance as much as

possible.

The Signal-to-Noise and Distortion Ratio (SINAD) is the

ratiobetweentheRMSamplitudeofthefundamentalinput

frequency to the RMS amplitude of all other frequency

components at the A/D output. The output is band limited

tofrequenciesfromaboveDCandbelowhalfthesampling

frequency. A typical LTC1606 has a SINAD of 90dB and

THD of –102dB with a 250kHz sampling rate and a 1kHz

input.

Total Harmonic Distortion

Total Harmonic Distortion (THD) is the ratio of the RMS

sumofallharmonicsoftheinputsignaltothefundamental

itself. The out-of-band harmonics alias into the frequency

band between DC and half the sampling frequency. THD is

11

LTC1606

U

PACKAGE DESCRIPTION ^{Dimensions in inches (millimeters) unless otherwise noted.}

G Package

28-Lead Plastic SSOP (0.209)

(LTC DWG # 05-08-1640)

10.07 – 10.33*

(0.397 – 0.407)

28 27 26 25 24 23 22 21 20 19 18

16 15

17

7.65 – 7.90

(0.301 – 0.311)

5

7

8

1

2

3

4

6

9 10 11 12 13 14

5.20 – 5.38**

(0.205 – 0.212)

1.73 – 1.99

(0.068 – 0.078)

0° – 8°

0.65

(0.0256)

BSC

0.13 – 0.22

0.55 – 0.95

(0.005 – 0.009)

(0.022 – 0.037)

0.05 – 0.21

(0.002 – 0.008)

0.25 – 0.38

(0.010 – 0.015)

NOTE: DIMENSIONS ARE IN MILLIMETERS

*DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH

SHALL NOT EXCEED 0.152mm (0.006") PER SIDE

**DIMENSIONS DO NOT INCLUDE INTERLEAD FLASH. INTERLEAD

FLASH SHALL NOT EXCEED 0.254mm (0.010") PER SIDE

G28 SSOP 1098

RELATED PARTS

PART NUMBER

LTC1274/LTC1277

LTC1415

DESCRIPTION

COMMENTS

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Single 5V, 12-Bit, 1.25Msps ADC

14-Bit, 200ksps ADC

10mW Power Dissipation, Parallel/Byte Interface

55mW Power Dissipation, 72dB SINAD

15mW, Serial or Parallel Interface

LTC1418

LTC1419

Low Power 14-Bit, 800ksps ADC

Micropower Precision Series Reference

Precision Bandgap Reference

Micropower 4-/8-Channel 12-Bit ADCs

16-Bit, 333ksps ADC

True 14-Bit Linearity, 81.5dB SINAD, 150mW Dissipation

0.075% Max, 10ppm/°C Max, Only 130µA Supply Current

0.04% Max, 3ppm/°C Max

LT1460-2.5

LT1461

LTC1594/LTC1598

LTC1604

Serial I/O, 3V and 5V Versions

±2.5V Input, 90dB SINAD, 100dB THD, No Missing Codes

Pin Compatible

LTC1605

16 Bits, 100kHz ADC

LTC1605-1/LTC1605-2 16 Bits, 100kHz ADC

0V to 4V/±4V Input Range, Pin Compatible with LTC1606

1606i LT/TP 0300 4K • PRINTED IN THE USA

LinearTechnology Corporation

1630 McCarthy Blvd., Milpitas, CA 95035-7417

12

●

(408)432-1900 FAX:(408)434-0507 www.linear-tech.com

LINEAR TECHNOLOGY CORPORATION 2000


型号：	LTC1606AC
厂家：	Linear
描述：	16-Bit, 250ksps, Single Supply ADC 16位， 250ksps的，单电源ADC
文件：	总12页 (文件大小：173K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

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