LTC1658CS8#TRPBF [Linear]
LTC1658 - 14-Bit Rail-to-Rail Micropower DAC; Package: SO; Pins: 8; Temperature Range: 0°C to 70°C;
| 型号： | LTC1658CS8#TRPBF |
| 厂家： | 
Linear |
| 描述： | LTC1658 - 14-Bit Rail-to-Rail Micropower DAC; Package: SO; Pins: 8; Temperature Range: 0°C to 70°C 转换器 光电二极管 |
| 文件： | 总12页 (文件大小：265K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LTC1658
14-Bit Rail-to-Rail
Micropower DAC in MSOP
U
DESCRIPTION
FEATURES
■
14-Bit Resolution
The LTC®1658 is a single supply, rail-to-rail voltage out-
put, 14-bit digital-to-analog converter (DAC) in an 8-lead
MSOP package. It includes an output buffer amplifier and
an easy-to-use 3-wire cascadable serial interface.
■
8-Lead MSOP Package
■
Buffered True Rail-to-Rail Voltage Output
■
3V or 5V Single Supply Operation
■
Very Low Power: ICC(TYP) = 270µA
The LTC1658 output swings from 0V to VREF. The REF pin
canbetiedtoVCC forrail-to-railoutputswing.TheLTC1658
operates from a single 2.7V to 5.5V supply. The typical
power supply current is 270µA.
■
Power-On Reset
■
3-Wire Cascadable Serial Interface is Compatible
with SPI and MICROWIRETM
■
Maximum DNL Error: 1LSB
Low Cost
■
The low power supply current makes the LTC1658 ideal
forbattery-poweredapplications.ThespacesavingMSOP
provides the smallest 14-bit DAC system available.
, LTC and LT are registered trademarks of Linear Technology Corporation.
MICROWIRE is a trademark of National Semiconductor Corporation.
U
APPLICATIONS
■
Digital Calibration
■
Industrial Process Control
■
Automatic Test Equipment
Cellular Telephones
■
U
TYPICAL APPLICATION
Functional Block Diagram: 14-Bit Rail-to-Rail DAC
Differential Nonlinearity
vs Input Code
2.7V TO 5.5V
8
6
1.0
0.8
0.6
V
REF
CC
2
1
D
IN
+
–
V
OUT
RAIL-TO-RAIL
VOLTAGE
7
CLK
16-BIT
SHIFT
REG
14
0.4
0.2
µP
OUTPUT
14-BIT
DAC
3
CS/LD
AND
0
DAC
LATCH
–0.2
–0.4
–0.6
–0.8
–1.0
4
D
OUT
POWER-ON
RESET
TO
OTHER
DACS
GND
1658 TA01
0
4096
8192
CODE
12288
16383
5
1658 TA02
1
LTC1658
ABSOLUTE MAXIMUM RATINGS
VCC to GND .............................................. –0.5V to 7.5V
TTL Input Voltage .................................... –0.5V to 7.5V
W W U W
(Note 1)
Operating Temperature Range
Commercial ............................................ 0°C to 70°C
Industrial ............................................. –40°C to 85°C
Storage Temperature Range ................ –65°C to 150°C
Lead Temperature (Soldering, 10 sec)................. 300°C
V
REF ..........................................................–0.5V to 7.5V
VOUT ........................................... –0.5V to (VCC + 0.5V)
Junction Temperature.......................... –65°C to 125°C
W
U
/O
PACKAGE RDER I FOR ATIO
ORDER PART
ORDER PART
TOP VIEW
NUMBER
NUMBER
TOP VIEW
CLK
1
2
3
4
V
V
8
7
6
5
CC
LTC1658CN8
LTC1658IN8
LTC1658CS8
LTC1658IS8
LTC1658CMS8
LTC1658IMS8
CLK
1
2
3
4
8 V
7 V
6 REF
CC
OUT
D
IN
OUT
D
IN
CS/LD
REF
CS/LD
5 GND
D
OUT
D
GND
OUT
MS8 PACKAGE
8-LEAD PLASTIC MSOP
MS8 PART MARKING
N8 PACKAGE
8-LEAD PDIP
S8 PACKAGE
8-LEAD PLASTIC SO
S8 PART MARKING
TJMAX = 150°C, θJA = 250°C/W
LTCW
LTFW
TJMAX = 125°C, θJA = 100°C/W(N8)
TJMAX = 125°C, θJA = 150°C/W(S8)
1658
1658I
Consult factory for Military grade parts.
ELECTRICAL CHARACTERISTICS
VCC = 2.7V to 5.5V, VOUT unloaded, REF ≤ VCC, TA = TMIN to TMAX, unless otherwise noted.
SYMBOL PARAMETER
DAC
CONDITIONS
MIN
TYP
MAX
UNITS
Resolution
●
●
●
●
14
14
Bits
Bits
LSB
LSB
Monotonicity
DNL
INL
Differential Nonlinearity
V
V
≤ V – 0.1V (Note 2)
±1.0
±8.0
REF
REF
CC
Integral Nonlinearity
Zero Scale Error
≤ V – 0.1V (Note 2)
CC
T = 25°C, N8 and S8 Package
1.5
4.0
7.0
mV
mV
mV
A
T = T
to T
to T
, N8 and S8 Package
, MSOP Package
●
●
A
MIN
MIN
MAX
MAX
T = T
A
Offset Error
T = 25°C, N8 and S8 Package, (Note 7)
±1.5
±4.0
±7.0
mV
mV
mV
A
T = T
to T
to T
, N8 and S8 Package, (Note 7)
, MSOP Package, (Note 7)
●
●
A
MIN
MIN
MAX
MAX
T = T
A
V
TC
OS
Offset Error Temperature
Coefficient
±5
µV/°C
Gain Error
●
±20
LSB
Gain Error Drift
±2.5
ppm/°C
Power Supply
V
Positive Supply Voltage
Supply Current
For Specified Performance
2.7V ≤ V ≤ 5.5V (Note 4)
●
●
2.7
5.5
V
CC
I
270
550
µA
CC
CC
Op Amp DC Performance
Short-Circuit Current Low
Short-Circuit Current High
V
V
Shorted to GND
●
●
55
55
120
120
mA
mA
OUT
OUT
Shorted to V
CC
2
LTC1658
ELECTRICAL CHARACTERISTICS
VCC = 2.7V to 5.5V, VOUT unloaded, REF ≤ VCC, TA = TMIN to TMAX, unless otherwise noted.
SYMBOL PARAMETER
Output Impedance to GND
Output Line Regulation
AC Performance
Voltage Output Slew Rate
CONDITIONS
MIN
TYP
MAX
200
1.5
UNITS
Ω
Input Code = 0
●
●
70
Input Code = 16383, V = 2.7V to 5.5V, REF = 2.5V
mV/V
CC
●
0.35
1.0
12
V/µs
µs
Voltage Output Settling Time (Note 3) to ±0.5LSB
Digital Feedthrough
0.3
nV• s
Reference Input
R
REF Input Resistance
REF Input Range
●
●
30
0
60
kΩ
IN
V
(Notes 5, 6)
V
V
REF
CC
Digital I/O
V
V
V
V
V
V
V
V
Digital Input High Voltage
Digital Input Low Voltage
Digital Output High Voltage
Digital Output Low Voltage
Digital Input High Voltage
Digital Input Low Voltage
Digital Output High Voltage
Digital Output Low Voltage
Digital Input Leakage
V
V
V
V
V
V
V
V
V
= 5V
●
●
●
●
●
●
●
●
●
●
2.4
V
V
IH
IL
CC
CC
CC
CC
CC
CC
CC
CC
IN
= 5V
0.8
0.4
0.6
= 5V, I
= 5V, I
= 3V
= –1mA, D
Only
V
V
– 0.7
CC
V
OH
OL
IH
OUT
OUT
OUT
= 1mA, D
Only
V
OUT
OUT
2.0
V
= 3V
V
IL
= 3V, I
= 3V, I
= –1mA, D
Only
Only
– 0.7
CC
V
OH
OL
LEAK
OUT
= 1mA, D
0.4
±10
10
V
OUT
OUT
I
= GND to V
µA
pF
CC
C
Digital Input Capacitance
(Note 6)
IN
Switching (V = 4.5V to 5.5V)
CC
t
t
t
t
t
t
t
t
t
D
D
Valid to CLK Setup
Valid to CLK Hold
●
●
●
●
●
●
●
●
●
40
0
ns
ns
ns
ns
ns
ns
ns
ns
ns
1
2
3
4
5
6
7
8
9
IN
IN
CLK High Time
(Note 6)
(Note 6)
(Note 6)
(Note 6)
(Note 6)
40
40
50
40
20
5
CLK Low Time
CS/LD Pulse Width
LSB CLK to CS/LD
CS/LD Low to CLK
D
OUT
Output Delay
C
= 15pF
LOAD
100
CLK Low to CS/LD Low
(Note 6)
20
Switching (V = 2.7V to 5.5V)
CC
t
t
t
t
t
t
t
t
t
D
D
Valid to CLK Setup
Valid to CLK Hold
●
●
●
●
●
●
●
●
●
60
0
ns
ns
ns
ns
ns
ns
ns
ns
ns
1
2
3
4
5
6
7
8
9
IN
IN
CLK High Time
(Note 6)
(Note 6)
(Note 6)
(Note 6)
(Note 6)
60
60
80
60
30
10
30
CLK Low Time
CS/LD Pulse Width
LSB CLK to CS/LD
CS/LD Low to CLK
D
OUT
Output Delay
C
= 15pF
LOAD
150
CLK Low to CS/LD Low
(Note 6)
3
LTC1658
ELECTRICAL CHARACTERISTICS
The
●
denotes specifications which apply over the full operating
Note 3: DAC switched between code 16383 and code 50.
Note 4: Digital inputs at 0V or V
temperature range.
.
CC
Note 1: Absolute Maximum Ratings are those values beyond which the life
a device may be impaired.
Note 5: V
can only swing from (GND +
V
) to (V
–
V
OS
) when
OUT
OS
CC
output is unloaded. See Applications Information.
Note 2: Nonlinearity is defined from code 50 to code 16383 (full scale).
See Applications Information.
Note 6: Guaranteed by design. Not subject to test.
Note 7: Measured at code 50.
U W
TYPICAL PERFOR A CE CHARACTERISTICS
Integral Nonlinearity (INL) vs
Input Code
Differential Nonlinearity (DNL) vs
Input Code
Supply Current vs Logic Input
Voltage
3
2
1
0
1.0
0.8
5
4
ALL DIGITAL INPUTS
TIED TOGETHER
0.6
3
0.4
2
0.2
1
0
0
–0.2
–0.4
–0.6
–0.8
–1.0
–1
–2
–3
–4
–5
0
1
2
3
4
5
0
4096
8192
12288
16383
0
4096
8192
12288
16383
LOGIC INPUT VOLTAGE (V)
CODE
CODE
1658 G03
1658 G02
1658 G01
Minimum Supply Headroom for
Full Output Swing vs Load Current
Minimum Output Voltage vs
Output Sink Current
Offset Error vs Temperature
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
1.0
0
–0.5
–1.0
–1.5
–2.0
–2.5
–3.0
–3.5
–4.0
–4.5
–5.0
∆V
< 1LSB
CODE: ALL ZEROS
OUT
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
CODE: ALL 1s
= 4.096V
25°C
V
OUT
125°C
125°C
–55°C
25°C
–55°C
0
5
10
15
0
5
10
15
–55
–25
5
35
65
95
125
LOAD CURRENT (mA)
OUTPUT SINK CURRENT (mA)
TEMPERATURE (°C)
1658 G04
1658 G05
1658 G06
4
LTC1658
U W
TYPICAL PERFOR A CE CHARACTERISTICS
Gain Error vs Temperature
Broadband Noise
5
4
3
2
1LSB/DIV
1
0
–1
–2
–3
–4
–5
BW = 1Hz TO
100kHz
200µs/DIV
1658 G08
–55
–25
5
35
65
95
125
TEMPERATURE (°C)
1658 G06
U
U
U
PIN FUNCTIONS
CLK (Pin 1): The TTL Level Input for the Serial Interface
Clock.
DOUT (Pin 4): Output of the Shift Register Which Becomes
Valid on the Rising Edge of the Serial Clock.
DIN (Pin 2): The TTL Level Input for the Serial Interface
Data. Data on the DIN pin is latched into the shift register
on the rising edge of the serial clock and is loaded MSB
first. The LTC1658 requires a 16-bit word to be loaded in.
The last two bits are don’t cares.
GND (Pin 5): Ground.
REF (Pin 6): Reference Input. There is a gain of one from
this pin to the output. When tied to VCC the output will
swing from GND to VCC. The output can only swing to
within it’s offset specification of VCC (see Applicatons
Information).
CS/LD (Pin 3): The TTL Level Input for the Serial Inter-
face Enable and Load Control. When CS/LD is low the
CLK signal is enabled, so the data can be clocked in.
When CS/LD is pulled high, data is loaded from the shift
register into the DAC register, updating the DAC output.
VOUT (Pin 7): Buffered Rail-to-Rail DAC Output.
VCC (Pin 8): Positive Supply Input. 2.7V ≤ VCC ≤ 5.5V.
5
LTC1658
W U
W
TI I G DIAGRA
t
1
t
t
t
t
t
7
2
4
3
6
CLK
t
9
B13
MSB
B0
LSB
BX
DUMMY
BX
DUMMY
B12
B11
D
IN
CS/LD
t
t
5
8
B13
PREVIOUS WORD
B13
D
B12
B11
BX
BX
OUT
CURRENT WORD
1658 TD
U U
DEFI ITIO S
Differential Nonlinearity (DNL): The difference between
the measured change and the ideal 1LSB change for any
twoadjacentcodes. TheDNLerrorbetweenanytwocodes
is calculated as follows:
than zero. The INL error at a given input code is calculated
as follows:
INL = [VOUT – VOS – (VFS – VOS)(code/16383)]/LSB
Where VOUT is the output voltage of the DAC measured at
the given input code.
DNL = (∆VOUT – LSB)/LSB
Where ∆VOUT is the measured voltage difference between
two adjacent codes.
Least Significant Bit (LSB): The ideal voltage difference
between two successive codes.
DigitalFeedthrough: Theglitchthatappearsattheanalog
outputcausedbyACcouplingfromthedigitalinputswhen
they change state. The area of the glitch is specified in
(nV)(sec).
LSB = VREF/16384
Resolution (n): Defines the number of DAC output states
(2n) that divide the full-scale range. Resolution does not
imply linearity.
Gain Error:Gain error is the difference between the output
ofaDACfromitsidealfull-scalevalueafteroffseterrorhas
been adjusted.
Voltage Offset Error (VOS): Nominally, the voltage at the
output when the DAC is loaded with all zeros. A single
supply DAC can have a true negative offset, but the output
cannot go below zero (see Applications Information).
Integral Nonlinearity (INL): The deviation from a straight
line passing through the endpoints of the DAC transfer
curve(EndpointINL).Becausetheoutputcannotgobelow
zero, the linearity is measured between full scale and the
lowest code which guarantees the output will be greater
For this reason, single supply DAC offset is measured at
the lowest code that guarantees the output will be greater
than zero.
6
LTC1658
U
OPERATIO
Serial Interface
the chips then the CS/LD signal is pulled high to update all
of them simultaneously.
The data on the DIN input is loaded into the shift register
ontherisingedgeoftheclock.TheMSBisloadedfirst.The
DAC register loads the data from the shift register when
CS/LD is pulled high. The clock is disabled internally when
CS/LD is high. Note: CLK must be low before CS/LD is
pulled low to avoid an extra internal clock pulse. The input
word must be 16 bits wide. The last two bits are don’t
cares.
Voltage Output
TheLTC1658rail-to-railbufferedoutputcansourceorsink
5mA over the entire operating temperature range while
pulling to within 400mV of the positive supply voltage or
ground. The output swings to within a few millivolts of ei-
ther supply rail when unloaded and has an equivalent out-
putresistanceof40Ω,at5VVCC,whendrivingaloadtothe
rails. The output can drive 1000pF without going into os-
cillation.
The buffered output of the 16-bit shift register is available
on the DOUT pin which swings from GND to VCC.
Multiple LTC1658s may be daisy-chained together by
connecting the DOUT pin to the DIN pin of the next chip
while the clock and CS/LD signals remain common to all
chips in the daisy chain. The serial data is clocked to all of
The output swings from 0V to the voltage at the REF pin,
i.e., there is a gain of 1 from REF to VOUT. Please note, if
REFistiedtoVCC theoutputcanonlyswingto(VCC –VOS).
See Applications Information.
7
LTC1658
U
W U U
APPLICATIONS INFORMATION
(FSE) is positive, the output for the highest codes limits at
VCC as shown in Figure 1c. No full-scale limiting can occur
if VREF is less than VCC – FSE.
Rail-to-Rail Output Considerations
In any rail-to-rail DAC, the output swing is limited to
voltages within the supply range.
Offset and linearity are defined and tested over the region
of the DAC transfer function where no output limiting can
occur.
If the DAC offset is negative, the output for the lowest
codes limits at 0V as shown in Figure 1b.
Similarly, limiting can occur near full scale when the REF
pin is tied to VCC. If VREF = VCC and the DAC full-scale error
POSITIVE
FSE
V
= V
CC
REF
OUTPUT
VOLTAGE
INPUT CODE
(c)
V
= V
CC
REF
OUTPUT
VOLTAGE
0
8192
16383
INPUT CODE
(a)
OUTPUT
VOLTAGE
0V
NEGATIVE
OFFSET
INPUT CODE
(b)
1658 F01
Figure 1. Effects of Rail-to-Rail Operation On a DAC Transfer Curve. (a) Overall Transfer Function (b) Effect of Negative
Offset for Codes Near Zero Scale (c) Effect of Positive Full-Scale Error for Input Codes Near Full Scale When VREF = VCC
8
LTC1658
U
TYPICAL APPLICATIO S
An Optoisolated 4mA to 20mA Process Controller
V
LOOP
3.8V TO 30V
237k
®
LT 1121-3.3
20k
5k
1%
IN
OUT
+
1µF
V
REF
CC
60.4k
1%
CLK
FROM
OPTO-
V
OUT
LTC1658
D
IN
+
–
ISOLATED
INPUTS
1k
Q1
2N3440
3.01k
1%
LT1077
CS/LD
R
S
10Ω
I
3.3V
3.6k
OUT
1658 TA04
OPTOISOLATORS
CLK
IN
CS/LD
D
4N28
500Ω
CLK
IN
CS/LD
D
This circuit shows how to use an LTC1658 to make an
optoisolated digitally controlled 4mA to 20mA process
controller. The controller circuitry, including the
optoisolation, ispoweredbytheloopvoltagethatcanhave
a wide range of 3.8V to 30V. The 3.3V output of the
LT1121-3.3 is used for the 4mA offset current and VOUT is
used for the digitally controlled 0mA to 16mA current. RS
is a sense resistor and the op amp modulates the transis-
tor Q1 to provide the 4mA to 20mA current through this
resistor. The potentiometers allow for offset and full-scale
adjustment. Thecontrolcircuitrydissipateswellunderthe
4mA budget at zero-scale.
9
LTC1658
TYPICAL APPLICATIO S
U
A 14-Bit Analog Input/Output Channel for a PC
5V
U1
D1
510Ω
D2
D4
LTC1417
1µF
510Ω
510Ω
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
A
A
V
V
+
–
V
V
IN
CC
DIFFERENTIAL
INPUT
510Ω
IN
SS
D3
BUSY
REF
1µF
CONVST
RD
REFCOMP
10µF
AGND
EXTCLKIN
SCLK
SHDN
DGND
CLKOUT
D
OUT
U2
LTC1658
U3
1/2 74HC74
U4
6
2
1µF
LT1021-5
1
2
3
4
8
7
6
5
2
4
3
5
1
6
C5
47µF
C4
CLK
V
D
PR
CK
Q
CC
150µF
4
D
V
CLR
Q
5V
IN
OUT
CS/LD
REF
D6
D5
D
GND
OUT
ANALOG
OUTPUT
51k
51k
51k
4
8
3
9
2
1
5
SELECT
TX
D
IN
6
RTS
U3
1/2 74HC74
12
13
SCLK
DTR
CTS
12
10
11
9
D
Q
CLR
Q
13
8
PR
CK
D
5V
OUT
11
10
C3
0.1µF
1658 TA05
1658 TA05
5V
10
LTC1658
U
PACKAGE DESCRIPTION Dimensions in inches (millimeters) unless otherwise noted.
MS8 Package
8-Lead Plastic MSOP
(LTC DWG # 05-08-1660)
0.118 ± 0.004*
(3.00 ± 0.102)
8
7
6
5
0.040 ± 0.006
(1.02 ± 0.15)
0.034 ± 0.004
(0.86 ± 0.102)
0.007
(0.18)
0° – 6° TYP
0.118 ± 0.004**
(3.00 ± 0.102)
SEATING
PLANE
0.192 ± 0.004
(4.88 ± 0.10)
0.012
(0.30)
REF
0.021 ± 0.006
(0.53 ± 0.015)
0.006 ± 0.004
(0.15 ± 0.102)
0.0256
(0.65)
TYP
MSOP (MS8) 1197
1
2
3
4
*
DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH,
PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
** DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
N8 Package
8-Lead PDIP (Narrow 0.300)
(LTC DWG # 05-08-1510)
0.400*
(10.160)
MAX
0.130 ± 0.005
0.300 – 0.325
0.045 – 0.065
(3.302 ± 0.127)
(1.143 – 1.651)
(7.620 – 8.255)
8
7
6
5
0.065
(1.651)
TYP
0.255 ± 0.015*
(6.477 ± 0.381)
0.009 – 0.015
(0.229 – 0.381)
0.125
(3.175)
MIN
0.020
(0.508)
MIN
+0.035
–0.015
1
2
4
3
0.325
0.100 ± 0.010
(2.540 ± 0.254)
0.018 ± 0.003
(0.457 ± 0.076)
+0.889
8.255
(
)
N8 1197
–0.381
*THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.010 INCH (0.254mm)
S8 Package
8-Lead Plastic Small Outline (Narrow 0.150)
(LTC DWG # 05-08-1610)
0.189 – 0.197*
(4.801 – 5.004)
0.010 – 0.020
(0.254 – 0.508)
7
5
8
6
× 45°
0.053 – 0.069
(1.346 – 1.752)
0.004 – 0.010
(0.101 – 0.254)
0.008 – 0.010
(0.203 – 0.254)
0°– 8° TYP
0.150 – 0.157**
(3.810 – 3.988)
0.228 – 0.244
(5.791 – 6.197)
0.016 – 0.050
0.406 – 1.270
0.050
(1.270)
TYP
0.014 – 0.019
(0.355 – 0.483)
*DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
SO8 0996
**DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
1
3
4
2
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tationthattheinterconnectionofitscircuitsasdescribedhereinwillnotinfringeonexistingpatentrights.
11
LTC1658
TYPICAL APPLICATION
U
14-Bit, 3V to 5V Single Supply, Voltage Output DAC
2.7V TO 5.5V
0.1µF
V
REF
D
IN
CC
CLK
CS/LD
OUTPUT
0V TO REF
µP
V
OUT
LTC1658
GND
D
OUT
TO NEXT DAC FOR
DAISY-CHAINING
1658 TA03
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
LTC1257
Single 12-Bit V
Reference Can Be Overdriven Up to 12V, i.e., FS
DAC, Full Scale: 2.048V, V : 4.75V to 15.75V,
5V to 15V Single Supply, Complete V
SO-8 Package
DAC in
OUT
OUT
CC
= 12V
MAX
LTC1446/LTC1446L Dual 12-Bit V
DACs in SO-8 Package
LTC1446: V = 4.5V to 5.5V, V
= 0V to 4.095V
= 0V to 2.5V
OUT
OUT
OUT
CC
OUT
LTC1446L: V = 2.7V to 5.5V, V
CC
LTC1448
Dual 12-Bit V
DAC, V : 2.7V to 5.5V
Output Swings from GND to REF. REF Input
Can Be Tied to V
CC
CC
LTC1450/LTC1450L Single 12-Bit V
DACs with Parallel Interface
LTC1450: V = 4.5V to 5.5V, V
= 0V to 4.095V
= 0V to 2.5V
OUT
OUT
CC
OUT
LTC1450L: V = 2.7V to 5.5V, V
CC
LTC1451
LTC1452
LTC1453
Single Rail-to-Rail 12-Bit DAC, Full Scale: 4.095V, V : 4.5V to 5.5V,
Internal 2.048V Reference Brought Out to Pin
5V, Low Power Complete V
DAC in SO-8 Package
CC
OUT
Single Rail-to-Rail 12-Bit V
Multiplying DAC, V : 2.7V to 5.5V
Low Power, Multiplying V
DAC with Rail-to-Rail
OUT
OUT
CC
Buffer Amplifier in SO-8 Package
Single Rail-to-Rail 12-Bit V
DAC, Full Scale: 2.5V, V : 2.7V to 5.5V
3V, Low Power, Complete V DAC in SO-8 Package
OUT
CC
OUT
LTC1454/LTC1454L Dual 12-Bit V
DACs in SO-16 Package with Added Functionality
LTC1454: V = 4.5V to 5.5V, V
= 0V to 4.095V
= 0V to 2.5V
OUT
OUT
CC
OUT
LTC1454L: V = 2.7V to 5.5V, V
CC
LTC1456
Single Rail-to-Rail Output 12-Bit DAC with Clear Pin,
Full Scale: 4.095V, V : 4.5V to 5.5V
Low Power, Complete V
Package with Clear Pin
DAC in SO-8
OUT
CC
LTC1458/LTC1458L Quad 12 Bit Rail-to-Rail Output DACs with Added Functionality
LTC1458: V = 4.5V to 5.5V, V
= 0V to 4.095V
= 0V to 2.5V
OUT
CC
OUT
LTC1458L: V = 2.7V to 5.5V, V
CC
LTC1659
Single Rail-to-Rail 12-Bit V
DAC in 8-Pin MSOP, V : 2.7V to 5.5V
Low Power, Multiplying V
DAC in MS8 Package.
OUT
OUT
CC
Output Swings from GND to REF. REF Input Can Be
Tied to V
.
CC
References
LT1019
Precision Voltage Reference
Ultralow Drift 5ppm/°C, Initial Accuracy: 0.05%
Low Drift 10ppm/°C, Initial Accuracy: 0.05%
LT1634
Micropower Precision Reference
1658f LT/TP 0299 4K • PRINTED IN USA
LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
12
LINEAR TECHNOLOGY CORPORATION 1998
●
●
(408)432-1900 FAX:(408)434-0507 www.linear-tech.com
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