LTC1693-5CMS8#PBF [Linear]
LTC1693-5 - High Speed Single P-Channel MOSFET Driver; Package: MSOP; Pins: 8; Temperature Range: 0°C to 70°C;
| 型号： | LTC1693-5CMS8#PBF |
| 厂家： | 
Linear |
| 描述： | LTC1693-5 - High Speed Single P-Channel MOSFET Driver; Package: MSOP; Pins: 8; Temperature Range: 0°C to 70°C 驱动器 接口集成电路 光电二极管 |
| 文件： | 总8页 (文件大小：152K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LTC1693-5
High Speed Single
P-Channel MOSFET Driver
U
FEATURES
DESCRIPTIO
The LTC®1693-5 drives power P-channel MOSFETs at
high speed. The 1.5A peak output current reduces switch-
ing losses in MOSFETs with high gate capacitance.
■
Single MOSFET Driver in MSOP Package
■
1.5A Peak Output Current
■
16ns Rise/Fall Times at VCC = 12V, CL = 1nF
■
Wide VCC Range: 4.5V to 13.2V
The LTC1693-5 is a single driver with an output polarity
select pin. The MOSFET driver offers VCC independent
CMOS input thresholds with 1.2V of typical hysteresis. It
can level-shift the input logic signal up or down to the rail-
to-rail VCC drive for the external MOSFET.
■
CMOS Compatible Input with Hysteresis
■
Input Threshold Is Independent of VCC
■
Driver Input Can Be Driven Above VCC
■
Undervoltage Lockout
Thermal Shutdown
■
The LTC1693-5 contains an undervoltage lockout circuit
and a thermal shutdown circuit that disables the external
P-channel MOSFET gate drive if activated.
U
APPLICATIO S
■
Power Supplies
The LTC1693-5 comes in an 8-lead MSOP package.
■
High Side Drivers
, LTC and LT are registered trademarks of Linear Technology Corporation.
■
Motor/Relay Control
Line Drivers
Battery Chargers
■
■
U
TYPICAL APPLICATIO
High Efficiency 1.5A Li-Ion Battery Charger
V
IN
5V TO 6V
MBRS130LT3
POSITION CAPACITOR CLOSE TO LTC1732
1µF
332Ω
332Ω
0.47µF
4.7Ω
0.082Ω
0.25W
22µF
CERAMIC
8
V
CC
9
7
SENSE
POSITION CAPACITOR
CLOSE TO SENSE RESISTOR
LTC1732
8
4
3
3
1
7
CHRG
DRV
Si2305DS
LTC1693-5CMS8
10
4
1
6
ACPR
BAT
MBRS130LT3
TIMER
PROG
18.2k
GND SEL
22µF
CDRH6D38-220NC
5
2
V
CC
0.1µF
AVX 0603ZC104KAT1A
SEL
USE LOW TEMPERATURE
COEFFICIENT CAPACITOR
+
–
+
1-CELL
Li-Ion BATTERY
100µF
1693-5 TA01
CHARGE RATE ≈1.5A (DEPENDING ON V AND BATTERY VOLTAGE)
IN
1
LTC1693-5
W W U W
U
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ABSOLUTE MAXIMUM RATINGS
PACKAGE/ORDER INFORMATION
(Note 1)
ORDER PART
NUMBER
Supply Voltage (VCC) .............................................. 14V
Inputs (IN, PHASE) ................................... –0.3V to 14V
Driver Output ................................. –0.3V to VCC + 0.3V
Junction Temperature.......................................... 150°C
Operating Temperature Range ..................... 0°C to 70°C
Storage Temperature Range ................. –65°C to 150°C
Lead Temperature (Soldering, 10 sec).................. 300°C
TOP VIEW
IN 1
NC 2
PHASE 3
GND 4
8 V
CC
7 OUT
6 NC
5 NC
LTC1693-5CMS8
MS8 PACKAGE
8-LEAD PLASTIC MSOP
MS8 PART
MARKING
TJMAX = 150°C, θJA = 200°C/ W
LTSG
Consult factory for parts specified with wider operating temperature ranges.
The ● denotes specifications which apply over the full operating
ELECTRICAL CHARACTERISTICS
temperature range, otherwise specifications are at TA = 25°C. VCC = 12V, unless otherwise noted.
SYMBOL PARAMETER
CONDITIONS
MIN
4.5
TYP
MAX
13.2
550
10
UNITS
V
V
Supply Voltage Range
Quiescent Current
CC
I
I
PHASE = 12V, IN = 0V
●
●
200
360
7.2
µA
CC
CC(SW)
Switching Supply Current
C
= 4.7nF, f = 100kHz
mA
OUT
IN
Input
V
V
High Input Threshold
●
●
●
●
●
2.2
1.1
2.6
1.4
3.1
1.7
±10
6.5
45
V
V
IH
IL
Low Input Threshold
I
Input Pin Bias Current
±0.01
5.5
µA
V
IN
V
PHASE Pin High Input Threshold
PHASE Pin Pull-Up Current
4.5
10
PH
I
PHASE = 0V
20
µA
PH
Output
V
V
High Output Voltage
I
I
= –10mA
= 10mA
●
●
11.92
11.97
30
V
mV
Ω
OH
OL
OUT
OUT
Low Output Voltage
75
R
R
Output Pull-Down Resistance
Output Pull-Up Resistance
Output Low Peak Current
Output High Peak Current
2.85
3.00
1.70
1.40
ONL
ONH
PKL
Ω
I
I
A
A
PKH
Switching Timing (Note 2)
t
t
t
t
Output Rise Time
C
C
= 1nF
= 4.7nF
●
●
17.5
48.0
35
85
ns
ns
RISE
FALL
PLH
PHL
OUT
OUT
Output Fall Time
C
C
= 1nF
= 4.7nF
●
●
16.5
42.0
35
75
ns
ns
OUT
OUT
Output Low-High Propagation Delay
Output High-Low Propagation Delay
C
C
= 1nF
= 4.7nF
●
●
38.0
40.0
70
75
ns
ns
OUT
OUT
C
C
= 1nF
= 4.7nF
●
●
32
35
70
75
ns
ns
OUT
OUT
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: All AC timing specificatons are guaranteed by design and are not
production tested.
2
LTC1693-5
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TYPICAL PERFOR A CE CHARACTERISTICS
IN Threshold Voltage
vs Ambient Temperature
IN Threshold Hysteresis
vs Ambient Temperature
IN Threshold Voltage vs VCC
2.75
2.50
3.00
1.4
1.3
1.2
1.1
V
CC
= 12V
T
= 25°C
V
CC
= 12V
A
2.75
2.50
V
IH
V
IH
2.25
2.00
1.75
1.50
1.25
2.25
2.00
1.75
1.50
1.25
V -V
IH IL
1.0
0.9
0.8
V
IL
V
IL
1.00
1.00
9
11
12
5
6
7
8
10
–25
0
50
75 100 125
–50
25
–50 –25
0
25
50
75 100 125
V
CC
(V)
AMBIENT TEMPERATURE (°C)
AMBIENT TEMPERATURE (°C)
1693-5 G01
1693-5 G02
1693-5 G03
Rise/Fall Time vs Ambient
Temperature
PHASE Threshold Voltage vs VCC
Rise/Fall Time vs VCC
20
19
18
17
16
15
14
13
12
11
10
6
5
4
3
24
22
T
= 25°C
OUT
= 100kHz
V
C
f
= 12V
OUT
= 100kHz
T
= 25°C
A
CC
A
C
f
= 1nF
= 1nF
t
RISE
IN
IN
V
PH(H)
20
18
16
14
12
t
FALL
t
RISE
V
PH(L)
t
FALL
2
1
0
10
–50
0
25
50
75 100 125
–25
9
11
12
5
6
7
8
10
9
11
12
5
6
7
8
10
AMBIENT TEMPERATURE (°C)
V
CC
(V)
V
CC
(V)
1693-5 G06
1693-5 G04
1693-5 G05
Propagation Delay vs Ambient
Temperature
Rise/Fall Time vs COUT
Propagation Delay vs VCC
120
100
80
60
40
20
0
55
50
45
40
35
30
25
20
15
50
45
40
35
T
= 25°C
CC
= 100kHz
T
= 25°C
OUT
= 100kHz
A
V
C
f
= 12V
= 1nF
A
CC
OUT
V
f
= 12V
C
f
= 1nF
IN
= 100kHz
IN
IN
t
PLH
t
PHL
t
PLH
t
PHL
30
25
20
t
RISE
t
FALL
10
1
10
100
(pF)
1000
10000
5
6
7
8
V
9
10
11
12
50
100 125
–50 –25
0
25
75
C
(V)
OUT
AMBIENT TEMPERATURE (°C)
CC
1693-5 G07
1693-5 G08
1693-5 G09
3
LTC1693-5
U W
TYPICAL PERFOR A CE CHARACTERISTICS
Output Saturation Voltage
vs Temperature
Propagation Delay vs COUT
Quiescent Current vs VCC
50
350
300
250
200
150
100
200
150
100
50
T
= 25°C
CC
= 100kHz
V
CC
= 12V
T
= 25°C
IN
A
A
V
= 12V
V
= 0V
f
IN
V
OH
(50mA) wrt V
CC
40
30
20
V
(50mA)
OL
t
PLH
t
PHL
V
OH
(10mA) wrt V
CC
V
OL
(10mA)
0
1
10
100
(pF)
1000
10000
–55 –35 –15
5
25 45 65 85 105 125
5
6
7
8
9
10
11
12
C
TEMPERATURE (°C)
V
CC
(V)
OUT
1693-5 G10
1693-5 G11
1693-5 G12
Switching Supply Current vs COUT
VOL vs Output Current
100
90
80
70
60
50
40
30
20
10
0
300
250
T
= 25°C
CC
T
= 25°C
CC
A
A
V
= 12V
V
= 12V
200
150
V
OL
200kHz
100kHz
25kHz
100
50
0
750kHz
500kHz
1
10
100
(pF)
1000
10000
0
10 20 30 40 50 60 70 80 90 100
OUTPUT CURRENT (mA)
C
OUT
1693-5 G13
1693-5 G14
VOH vs Output Current
Thermal Derating Curve
1400
1200
1000
800
600
400
200
0
350
300
T
= 25°C
CC
A
T = 125°C
J
V
= 12V
250
V
OH
200
150
100
50
0
0
30
50 60 70 80 90 100
10 20
40
–55 –35 –15
5
25 45 65 85 105 125
OUTPUT CURRENT (mA)
AMBIENT TEMPERATURE (°C)
1693-5 G15
1693-5 G16
4
LTC1693-5
U
U
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PIN FUNCTIONS
IN (Pin 1): Driver Input. The input has VCC independent
GND (Pin 4): Driver Ground. Connect to a low impedance
ground. The VCC bypass capacitor should connect directly
to this pin.
thresholds with hysteresis to improve noise immunity.
NC (Pins 2, 5, 6): No Connect.
OUT (Pin 7): Driver Output.
PHASE (Pin 3): Output Polarity Select. Connect this pin to
V
CC or leave it floating for noninverting operation. Ground
VCC (Pin 8): Power Supply Input. The source of the exter-
this pin for inverting operation. The typical PHASE pin
nal P-MOSFET should also connect directly to this pin.
This minimizes the AC current path and improves signal
integrity.
input current when pulled low is 20µA.
W U
W
TI I G DIAGRA
INPUT RISE/FALL TIME <10ns
V
IH
INPUT
V
IL
NONINVERTING
OUTPUT OPERATION
90%
10%
t
r
t
f
t
t
PHL
PLH
90%
10%
INVERTING
OUTPUT OPERATION
t
f
t
r
t
t
PHL
PLH
1693-5 TD
5
LTC1693-5
U
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APPLICATIONS INFORMATION
Overview
The LTC1693-5’s peak output currents are 1.4A (P1) and
1.7A (N1) respectively. The N-channel MOSFET (N1) has
higher current drive capability so it can charge the power
MOSFET’s gate capacitance during high-to-low signal
transitions. When the power MOSFET’s gate is pulled high
bytheLTC1693-5, itsdrainvoltageispulledlowbyitsload
(e.g., a resistor or inductor). The slew rate of the drain
voltage causes current to flow back to the MOSFETs gate
through its gate-to-drain capacitance. If the MOSFET
driver does not have sufficient source current capability
(low output impedance), the current through the power
MOSFET’s Miller capacitance (CGD) can momentarily pull
the gate low, turning the MOSFET back on.
The LTC1693-5 single driver allows 3V- or 5V-based digi-
tal circuits to drive power P-channel MOSFETs at high
speeds.ApowerMOSFET’sgate-chargelossincreaseswith
switching frequency and transition time. The LTC1693-5
iscapableofdrivinga1nFloadwith16nsriseandfalltimes
using a VCC of 12V. This eliminates the need for higher
voltage supplies, such as 18V, to reduce the gate charge
losses.
The LTC1693-5’s 360µA quiescent current is an order of
magnitude lower than most other drivers/buffers. This
improves system efficiency in both standby and switching
operation. Since a power MOSFET generally accounts for
the majority of power loss in a converter, addition of the
LT1693-5 to a high power converter design greatly im-
proves efficiency, using very little board space.
Rise/Fall Time
Since the power MOSFET generally accounts for the ma-
jority of power lost in a converter, it’s important to quickly
turniteitherfully“on”or“off”therebyminimizingthetran-
sition time in its linear region. The LTC1693-5 has rise and
falltimesontheorderof16ns,deliveringabout1.4Ato1.7A
of peak current to a 1nF load with a VCC of only 12V.
Input Stage
TheLTC1693-5employs3VCMOScompatibleinputthresh-
oldsthatallowalowvoltagedigitalsignaltodrivestandard
power P-channel MOSFETs. The LTC1693-5 incorporates
a 4V internal regulator to bias the input buffer. This allows
the 3V CMOS compatible input thresholds (VIH = 2.6V, VIL
= 1.4V) to be independent of variations in VCC. The 1.2V
hysteresis between VIH and VIL eliminates false triggering
due to ground noise during switching transitions. The
LTC1693-5’s input buffer has a high input impedance and
draws less than 10µA during standby.
The LTC1693-5 rise and fall times are determined by the
peak current capabilities of P1 and N1. The predriver,
shown in Figure 1 driving P1 and N1, uses an adaptive
method to minimize cross-conduction currents. This is
done with a 6ns nonoverlapping transition time. N1 is fully
turnedoffbeforeP1isturned-onandvice-versausingthis
6ns buffer time. This minimizes any cross-conduction
currents while N1 and P1 are switching on and off yet is
short enough to not prolong their rise and fall times.
Output Stage
V
CC
The LTC1693-5’s output stage is essentially a CMOS
inverter, as shown by the P- and N-channel MOSFETs in
Figure 1 (P1 and N1). The CMOS inverter swings rail-to-
rail, giving maximum voltage drive to the load. This large
voltage swing is important in driving external power
P-channel MOSFETs, whose RDS(ON) is inversely propor-
tional to its gate overdrive voltage (VGS – VT).
LTC1693-5
C
C
GS
GD
P1
OUT
POWER
MOSFET
N1
GND
LOAD
1693-5 F01
Figure 1. Capacitance Seen by OUT During Switching
6
LTC1693-5
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APPLICATIONS INFORMATION
UVLO and Thermal Shutdown
Bypassing and Grounding
The LTC1693-5’s UVLO detector disables the input buffer
and pulls the output pin to VCC if VCC < 4V. The output
remains off from VCC = 1V to VCC = 4V. This ensures that
during start-up or improper supply voltage values, the
LTC1693-5willkeeptheoutputpowerP-channelMOSFET
off.
LTC1693-5 requires proper VCC bypassing and grounding
due to its high speed switching (ns) and large AC currents
(A).CarelesscomponentplacementandPCBtracerouting
may cause excessive ringing and under/overshoot.
To obtain the optimum performance from the LTC1693-5:
A. Mountthebypasscapacitorsascloseaspossibletothe
The LTC1693-5 also has a thermal detector that similarly
disables the input buffer and pulls the output pin to VCC if
junction temperature exceeds 145°C. The thermal shut-
down circuit has 20°C of hysteresis. This thermal limit
helps to shut down the system should a fault condition
occur.
V
CC and GND pins. The leads should be shortened as
much as possible to reduce lead inductance. It is
recommended to have a 0.1µF ceramic in parallel with
a low ESR 4.7µF bypass capacitor.
Forhighvoltageswitchinginaninductiveenvironment,
ensure that the bypass capacitors’ VMAX ratings are
high enough to prevent breakdown. This is especially
important for floating driver applications.
Input Voltage Range
LTC1693-5’s input pin is a high impedance node and
essentially draws neligible input current. This simplifies
the input drive circuitry required for the input.
B. Use a low inductance, low impedance ground plane to
reduce any ground drop and stray capacitance. Re-
member that the LTC1693-5 switches 1.5A peak cur-
rents and any significant ground drop will degrade
signal integrity.
The LTC1693-5 typically has 1.2V of hysteresis between
its low and high input thresholds. This increases the
driver’s robustness against any ground bounce noises.
However, care should still be taken to keep this pin from
any noise pickup, especially in high frequency switching
applications.
C. Planthegroundroutingcarefully.Knowwherethelarge
load switching current is coming from and going to.
Maintain separate ground return paths for the input pin
and output pin. Terminate these two ground traces only
at the GND pin of the driver (STAR network).
In applications where the input signal swings below the
GND pin potential, the input pin voltage must be clamped
to prevent the LTC1693-5’s parastic substrate diode from
turning on. This can be accomplished by connecting a
seriescurrentlimitingresistorR1andashuntingSchottky
diode D1 to the input pin (Figure 2). R1 ranges from 100Ω
to 470Ω while D1 can be a BAT54 or 1N5818/9.
D. Keepthecoppertracebetweenthedriveroutputpinand
the load short and wide.
V
CC
LTC1693-5
INPUT SIGNAL
GOING BEL0W
GND PIN
IN
R1
D1
POTENTIAL
PARASITIC
SUBSTRATE
DIODE
1693-5 F02
GND
Figure 2. Input Protection Against Negative Input Signals
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will notinfringe onexisting patent rights.
7
LTC1693-5
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PACKAGE DESCRIPTION
Dimensions in inches (millimeters) unless otherwise noted.
MS8 Package
8-Lead Plastic MSOP
(LTC DWG # 05-08-1660)
0.118 ± 0.004*
(3.00 ± 0.102)
8
7
6
5
0.118 ± 0.004**
(3.00 ± 0.102)
0.193 ± 0.006
(4.90 ± 0.15)
1
2
3
4
0.043
(1.10)
MAX
0.034
(0.86)
REF
0.007
(0.18)
0° – 6° TYP
SEATING
PLANE
0.009 – 0.015
(0.22 – 0.38)
0.021 ± 0.006
(0.53 ± 0.015)
0.005 ± 0.002
(0.13 ± 0.05)
0.0256
(0.65)
BSC
MSOP (MS8) 1100
* DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH,
PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
** DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
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16935f LT/TP 0101 4K • PRINTED IN USA
LINEAR TECHNOLOGY CORPORATION 2001
LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
8
●
●
(408)432-1900 FAX:(408)434-0507 www.linear-tech.com
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