LTC1701_15 [Linear]
1MHz Step-Down DC/DC Converters in SOT-23;
| 型号： | LTC1701_15 |
| 厂家： | 
Linear |
| 描述： | 1MHz Step-Down DC/DC Converters in SOT-23 |
| 文件： | 总12页 (文件大小：189K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LTC1701/LTC1701B
1MHz Step-Down
DC/DC Converters in SOT-23
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FEATURES
DESCRIPTIO
The LTC®1701/LTC1701B are the industry’s first SOT-23
step-down,currentmode,DC/DCconverters.Intendedfor
lowtomediumpowerapplications,theyoperatefrom2.5V
to 5.5V input voltage range and switch at 1MHz, allowing
the use of tiny, low cost capacitors and inductors 2mm or
less in height. The output voltage is adjustable from 1.25V
to 5V. A built-in 0.28Ω switch allows up to 0.5A of output
current at high efficiency. OPTI-LOOPTM compensation
allows the transient response to be optimized over a wide
range of loads and output capacitors.
■
Tiny 5-Lead SOT-23 Package
■
Uses Tiny Capacitors and Inductor
■
High Frequency Operation: 1MHz
■
High Output Current: 500mA
■
Low RDS(ON) Internal Switch: 0.28Ω
■
High Efficiency: Up to 94%
■
Current Mode Operation for Excellent Line
and Load Transient Response
Short-Circuit Protected
■
■
Low Quiescent Current: 135µA (LTC1701)
■
Low Dropout Operation: 100% Duty Cycle
The LTC1701 incorporates automatic power saving Burst
ModeTM operation to reduce gate charge losses when the
load current drops below the level required for continuous
operation. The LTC1701B operates continuously to very
low load currents to provide low ripple at the expense of
lightloadefficiency.Withnoload,theLTC1701drawsonly
135µA. In shutdown, both devices draw less than 1µA,
making them ideal for current sensitive applications.
■
Ultralow Shutdown Current: IQ < 1µA
■
Peak Inductor Current Independent of Inductor Value
■
Output Voltages from 5V Down to 1.25V
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APPLICATIO S
■
PDAs/Palmtop PCs
■
Digital Cameras
Their small size and switching frequency enables a
complete DC/DC converter function to consume less than
0.3 square inches of PC board area.
, LTC and LT are registered trademarks of Linear Technology Corporation.
Burst Mode and OPTI-LOOP are trademarks of Linear Technology Corporation.
■
Cellular Phones
■
Portable Media Players
■
PC Cards
■
Handheld Equipment
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TYPICAL APPLICATION
Efficiency Curve
L1
4.7µH
V
V
OUT
100
IN
2.5V TO
5.5V
(2.5V/
V
SW
V
V
= 3.3V
= 2.5V
IN
IN
OUT
95
90
85
80
75
70
65
60
55
50
500mA)
D1
R4
R2
LTC1701
1M
121k
LTC1701
GND
+
C1
10µF
+
C2
47µF
I
TH
/RUN
V
FB
R3
5.1k
C3
R1
121k
LTC1701B
330pF
C1: TAIYO YUDEN JMK316BJ106ML
C2: SANYO POSCAP 6TPA47M
D1: MBRM120L
1701 F01a
L1: SUMIDA CD43-4R7
1
10
100
1000
LOAD CURRENT (mA)
Figure 1. 2.5V/500mA Step-Down Regulator
1701 F01b
1
LTC1701/LTC1701B
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ABSOLUTE AXI U RATI GS
PACKAGE/ORDER I FOR ATIO
(Note 1)
ORDER PART
(Voltages Referred to GND Pin)
TOP VIEW
NUMBER
VIN Voltage (Pin 5).......................................–0.3V to 6V
ITH/RUN Voltage (Pin 4) ..............................–0.3V to 3V
VFB Voltage (Pin 3) ......................................–0.3V to 3V
VIN – SW (Max Switch Voltage)................8.5V to –0.3V
Operating Temperature Range (Note 2) .. –40°C to 85°C
Junction Temperature (Note 5)............................. 125°C
Storage Temperature Range ................. –65°C to 150°C
Lead Temperature (Soldering, 10 sec).................. 300°C
SW 1
5 V
IN
GND 2
LTC1701ES5
LTC1701BES5
V
3
4 I /RUN
TH
FB
S5 PACKAGE
5-LEAD PLASTIC SOT-23
S5 PART
MARKING
TJMAX = 125°C, θJA = 250°C/W
LTKG
LTUD
SEE THE APPLICATION
INFORMATION SECTION
Consult factory for parts specified with wider operating temperature ranges.
ELECTRICAL CHARACTERISTICS
The ● denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VIN = 3.3V, RITH/RUN = 1Meg (from VIN to ITH/RUN) unless otherwise
specified. (Note 2)
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
5.5
UNITS
V
V
Operating Voltage Range
Feedback Pin Input Current
Feedback Voltage
2.5
IN
I
(Note 3)
(Note 3)
±0.1
1.28
0.1
µA
FB
V
●
1.22
1.25
0.04
V
FB
∆V
∆V
Reference Voltage Line Regulation
Output Voltage Load Regulation
V
= 2.5V to 5V (Note 3)
IN
%/V
LINE REG
Measured in Servo Loop, V = 1.5V, (Note 3)
Measured in Servo Loop, V = 1.9V, (Note 3)
0.01
–0.80
0.70
–1.50
%
%
LOAD REG
ITH
ITH
Input DC Supply Current (Note 4)
Active Mode
Sleep Mode
V
V
V
= 0V
185
135
0.25
300
200
1
µA
µA
µA
FB
= 1.4V (LTC1701 only)
ITH/RUN
FB
Shutdown
= 0V
V
Run Threshold High
Run Threshold Low
I
I
Ramping Down
Ramping Up
1.4
0.6
1.6
V
V
ITH/RUN
TH/RUN
TH/RUN
0.3
50
I
I
Run Pullup Current
V
V
= 1V
ITH/RUN
100
1.1
300
µA
ITH/RUN
Peak Switch Current Threshold
Switch ON Resistance
= 0V
0.9
A
SW(PEAK)
FB
R
V
V
V
= 5V, V = 0V
0.28
0.30
0.35
Ω
Ω
Ω
DS(ON)
IN
IN
IN
FB
= 3.3V, V = 0V
FB
= 2.5V, V = 0V
FB
I
t
Switch Leakage Current
Switch Off-Time
V
= 5V, V
= 0V, V = 0V
0.01
500
1
µA
SW(LKG)
OFF
IN
ITH/RUN
FB
400
600
ns
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 3: The LTC1701/LTC1701B are tested in a feedback loop which
servos V to the midpoint for the error amplifier without R = 1MHz
FB
ITH/RUN
(V = 1.7V unless otherwise specified).
Note 4: Dynamic supply current is higher due to the internal gate charge
being delivered at the switching frequency.
ITH
Note 2: The LTC1701E/LTC1701BE guaranteed to meet performance
specifications from 0°C to 70°C. Specifications over the –40°C to 85°C
operating temperature range are assured by design, characterization and
correlation with statistical process controls.
Note 5: T is calculated from the ambient T and power dissipation P
J
A
D
according to the following formula:
LTC1701ES5/LTC1701BES5: T = T + (P • 250°C/W)
J
A
D
2
LTC1701/LTC1701B
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TYPICAL PERFORMANCE CHARACTERISTICS
Efficiency vs Load Current
Efficiency vs Input Voltage
DC Supply Current
100
95
90
85
80
75
70
100
95
90
85
80
75
70
65
60
300
V
= 2.5V
V
OUT
= 2.5V
OUT
V
= 3.3V
IN
I
=100mA
LOAD
250
ACTIVE
SLEEP
200
150
100
50
I
=10mA
V
= 5.0V
LOAD
IN
LTC1701
LTC1701B
LTC1701
LTC1701B
0
1
10
100
1000
4
2
2
3
5
6
3
4
5
6
INPUT VOLTAGE (V)
LOAD CURRENT (mA)
INPUT VOLTAGE (V)
1701 • G01
1701 • G03
1701 • G02
Switch Resistance vs
Supply Voltage
Load Regulation
Line Regulation
0.60
0.40
370
350
330
310
290
270
250
0.30
0.25
0.20
0.15
0.10
0.05
0
V
= 5.0V
OUT
0.20
I
= 200mA
LOAD
0.00
–0.20
–0.40
–0.60
–0.80
–1.00
–1.20
–1.40
V
= 3.3V
OUT
I
= 400mA
LOAD
2
4
5
3
6
2
4
5
3
6
0
400
200
LOAD CURRENT (mA)
600
SUPPLY VOLTAGE (V)
V
(V)
IN
1701 • G04
1701 • G06
1701 • G05
Transient Response
Dropout Characteristics
Start-Up
3.4
3.3
3.2
3.1
3.0
2.9
2.8
2.7
2.6
I
= 100mA
LOAD
V
OUT
1V/DIV
V
OUT
50mV/DIV
AC COUPLED
I
= 200mA
LOAD
I
TH
2V/DIV
I
L
200mA/DIV
I
= 500mA
LOAD
I
L
500mA/DIV
V
= 3.3V
OUT
FIGURE 1
V
= 3.3V, V
= 2.5V
OUT
3.4
(V)
V
= 3.3V, V
= 2.5V
OUT
3.0
3.2
3.6
3.8
IN
IN
CIRCUIT OF FIGURE 1
= 6Ω
CIRCUIT OF FIGURE 1
= 100mA TO 500mA STEP
V
IN
I
R
LOAD
LOAD
1701 G09
1701 G08
701 • G07
3
LTC1701/LTC1701B
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PI FU CTIO S
SW (Pin 1): The Switch Node Connection to the Inductor.
This pin swings from VIN to a Schottky diode (external)
voltage drop below ground. The cathode of the Schottky
diode must be closely connected to this pin.
ITH/RUN (Pin 4): Combination of Error Amplifier Compen-
sation Point and Run Control Input. The current compara-
tor threshold increases with this control voltage. Nominal
voltage range for this pin is 1.25V to 2.25V. Forcing this
pin below 0.8V causes the device to be shut down. In
shutdown all functions are disabled.
GND (Pin 2): Ground Pin. Connect to the (–) terminal of
C
OUT, the Schottky diode and (–) terminal of CIN.
VIN (Pin 5): Main Supply Pin and the (+) Input to the
CurrentComparator.Mustbecloselydecoupledtoground.
VFB (Pin 3): Receives the feedback voltage from the
external resistive divider across the output. Nominal volt-
age for this pin is 1.25V.
Pin Limit Table
NOMINAL (V)
TYP MAX
ABSOLUTE MAX (V)
MIN MAX
PIN
1
NAME
SW
DESCRIPTION
MIN
Switch Node
–0.3
V
IN
V
–8.5 + 0.3
V
IN
IN
2
GND
Ground Pin
0
3
V
Output Feedback Pin
Error Amplifier Compensation and RUN Pin
Main Power Supply
0
0
1.25
1.35
2.25
5.5
–0.3
–0.3
–0.3
3
3
6
FB
4
I /RUN
TH
5
V
2.5
IN
W
BLOCK DIAGRA
V
V
IN
IN
V
IN
1.25V
BANDGAP
REFERENCE
V
REF
(1.25V)
50µA
+
V
+
–
REF
CURRENT
SENSE
I
/REF
+
TH
CLAMP
CURRENT
COMP
AMP
–
+
1.5V
–
I
TH
COMP
V
REF
SHDN
I
TH
/RUN
–
V
REF
+
(LTC1701 only)
(1.25V TO 2.25V)
ERROR
AMP
V
FB
–
SW
+
OFF-TIMER
AND GATE
CONTROL LOGIC
GATE
DRIVER
OVER
VOLTAGE
COMP
1.4V
–
PULSE
GND
STRETCHER
V
<0.6V
FB
1701 BD
4
LTC1701/LTC1701B
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OPERATIO
TheLTC1701usesacontantoff-time, currentmodearchi-
tecture.Theoperatingfrequencyisthendeterminedbythe
loop is enabled and the error amplifier drives the ITH/RUN
pin. Soft-startcanbeimplementedbyrampingthevoltage
on the ITH/RUN pin (see Applications Information sec-
tion).
off-time and the difference between VIN and VOUT
.
The output voltage is set by an external divider returned to
theVFB pin. Anerroramplfiercomparesthedividedoutput
voltage with a reference voltage of 1.25V and adjusts the
peak inductor current accordingly.
Low Current Operation
To optimize efficiency when the load is relatively light, the
LTC1701 automatically switches to Burst Modeoperation
in which the internal PMOS switch operates intermittently
based on load demand. The main control loop is inter-
rupted when the output voltage reaches the desired regu-
lated value. The hysteretic voltage comparator trips when
ITH/RUN is below 1.5V, shutting off the switch and reduc-
ing the power consumed. The output capacitor and the
inductor supply the power to the load until the output
voltage drops slightly and the ITH/RUN pin exceeds 1.5V,
turning on the switch and the main control loop which
starts another cycle.
Main Control Loop
During normal operation, the internal PMOS switch is
turned on when the VFB voltage is below the reference
voltage. The current into the inductor and the load in-
creases until the current limit is reached. The switch turns
off and energy stored in the inductor flows through the
external Schottky diode into the load. After the constant
off-timeinterval,theswitchturnsonandthecyclerepeats.
The peak inductor current is controlled by the voltage on
the ITH/RUN pin, which is the output of the error
amplifier.This amplifier compares the VFB pin to the 1.25V
reference. Whentheloadcurrentincreases, theFBvoltage
decreases slightly below the reference. This decrease
causes the error amplifier to increase the ITH/RUN voltage
until the average inductor current matches the new load
current.
For reduced output ripple, the LTC1701B doesn't use
Burst Mode operation and operates continuously down to
very low currents where the part starts skipping cycles.
Dropout Operation
Indropout, theinternalPMOSswitchisturnedoncontinu-
ously (100% duty cycle) providing low dropout operation
with VOUT at VIN. Since the LTC1701 does not incorporate
an under voltage lockout, care should be taken to shut
down the LTC1701 for VIN < 2.5V.
The main control loop is shut down by pulling the ITH/RUN
pintoground.Whenthepinisreleasedanexternalresistor
is used to charge the compensation capacitor. When the
voltage at the ITH/RUN pin reaches 0.8V, the main control
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APPLICATIO S I FOR ATIO
V − VOUT
V + VD
IN
1
TOFF
The basic LTC1701 application circuit is shown in
Figure 1. External component selection is driven by the
loadrequirementandbeginswiththeselectionofL1.Once
L1 is chosen, the Schottky diode D1 can be selected
IN
fO =
Although the inductor does not influence the operating
frequency, the inductor value has a direct effect on ripple
current. The inductor ripple current ∆IL decreases with
followed by CIN and COUT
.
L Selection and Operating Frequency
higher inductance and increases with higher VIN or VOUT
:
The operating frequency is fixed by VIN, VOUT and the
constant off-time of about 500ns. The complete expres-
sion for operating frequency is given by:
V − VOUT
V
OUT + VD
IN
∆IL =
fL
V + VD
IN
where VD is the output Schottky diode forward drop.
5
LTC1701/LTC1701B
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APPLICATIO S I FOR ATIO
Accepting larger values of ∆IL allows the use of low
inductances, but results in higher output voltage ripple
and greater core losses. A reasonable starting point for
setting ripple current is ∆IL = 0.4A.
Catch Diode Selection
The diode D1 shown in Figure 1 conducts during the off-
time. It is important to adequately specify the diode peak
current and average power dissipation so as not to exceed
the diode ratings.
The inductor value also has an effect on low current
operation. Lower inductor values (higher ∆IL) will cause
Burst Mode operation to begin at higher load currents,
which can cause a dip in efficiency in the upper range of
low current operation. In Burst Mode operation, lower
inductance values will cause the burst frequency to de-
crease.
Losses in the catch diode depend on forward drop and
switching times. Therefore, Schottky diodes are a good
choice for low drop and fast switching times.
Since the catch diode carries the load current during the
off-time, the average diode current is dependent on the
switch duty cycle. At high input voltages, the diode con-
ducts most of the time. As VIN approaches VOUT, the diode
conducts only a small fraction of the time. The most
stressful condition for the diode is when the regulator
output is shorted to ground.
Inductor Core Selection
Once the value for L is selected, the type of inductor must
be chosen. Basically, there are two kinds of losses in an
inductor —core and copper losses.
Under short-circuit conditions (VOUT = 0V), the diode
must safely handle ISC(PK) at close to 100% duty cycle.
Under normal load conditions, the average current con-
ducted by the diode is simply:
Core losses are dependent on the peak-to-peak ripple
current and core material. However, it is independent of
the physical size of the core. By increasing inductance, the
peak-to-peak inductor ripple current will decrease, there-
fore reducing core loss. Unfortunately, increased induc-
tance requires more turns of wire and, therefore, copper
losses will increase.
V − VOUT
IN
IDIODE(avg) = ILOAD(avg)
V + VD
IN
Remember to keep lead lengths short and observe proper
grounding (see Board Layout Considerations) to avoid
ringing and increased dissipation.
Highefficiencyconvertersgenerallycannotaffordthecore
loss found in low cost powdered iron cores, forcing the
use of more expensive ferrite, molypermalloy or Kool Mµ®
cores. Ferrite designs have very low core loss and are
preferred at high switching frequencies. Ferrite core ma-
terial saturates “hard,” which means that inductance col-
lapses abruptly when the peak design current is exceeded.
Thisresultsinanabruptincreaseininductorripplecurrent
and consequent output voltage ripple. Do not allow the
core to saturate!
Theforwardvoltagedropallowedinthediodeiscalculated
from the maximum short-circuit current as:
PD
ISC(avg)
V + VD
IN
VD ≈
V
IN
where PD is the allowable diode power dissipation and will
be determined by efficiency and/or thermal requirements
(see Efficiency Considerations).
Molypermalloy (from Magnetics, Inc.) is a very good, low
losscorematerialfortoroids,butitismoreexpensivethan
ferrite. A reasonable compromise from the same manu-
facturer is Kool Mµcore material. Toroids are very space
efficient, expecially when you can use several layers of
wire. Because they generally lack a bobbin, mounting is
more difficult. However, surface mount designs that do
not increase the height significantly are available
Most LTC1701 circuits will be well served by either an
MBR0520L or an MBRM120L. An MBR0520L is a good
choice for IOUT(MAX) ≤ 500mA, as long as the output
doesn’t need to sustain a continuous short.
Kool Mµ is a registered trademark of Magnetics, Inc.
6
LTC1701/LTC1701B
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APPLICATIO S I FOR ATIO
Input Capacitor (CIN) Selection
When the capacitance of COUT is made too small, the
outputrippleatlowfrequencieswillbelargeenoughtotrip
the ITH comparator. This causes Burst Mode operation to
be activated when the LTC1701 would normally be in
continuousmodeoperation. Theeffectcanbeimprovedat
higher frequencies with lower inductor values.
In continuous mode, the input current of the converter is
a square wave with a duty cycle of approximately VOUT
VIN. To prevent large voltage transients, a low equivalent
series resistance (ESR) input capacitor sized for the maxi-
mum RMS current must be used. The maximum RMS
capacitor current is given by:
/
In surface mount applications, multiple capacitors may
have to be paralleled to meet the capacitance, ESR or RMS
current handling requirement of the application. Alumi-
num electrolyte and dry tantulum capacitors are both
available in surface mount configurations. In the case of
tantalum, it is critical that the capacitors are surge tested
for use in switching power supplies. An excellent choice is
the AVX TPS, AVX TPSV and KEMET T510 series of
surfacemounttantalums, avalableincaseheightsranging
from2mmto4mm.OthercapacitortypesincludeNichicon
PL series, Sanyo POSCAP and Panasonic SP.
VOUT V − VOUT
(
IN
)
IRMS ≈IMAX
V
IN
where the maximum average output current IMAX equals
the peak current (1 Amp) minus half the peak-to-peak
ripple current, IMAX = 1 – ∆IL/2.
This formula has a maximum at VIN = 2VOUT, where IRMS
= IOUT/2. This simple worst-case is commonly used to
design because even significant deviations do not offer
much relief. Note that capacitor manufacturer’s ripple
current ratings are often based on only 2000 hours life-
time. This makes it advisable to further derate the capaci-
tor, or choose a capacitor rated at a higher temperature
thanrequired. Severalcapacitorsmayalsobeparalleledto
meet the size or height requirements of the design. An
additional 0.1µF to 1µF ceramic capacitor is also recom-
mended on VIN for high frequency decoupling.
Ceramic Capacitors
Higher value, lower cost ceramic capacitors are now
becomingavailableinsmallercasesizes.Thesearetempt-
ing for switching regulator use because of their very low
ESR. Unfortunately, the ESR is so low that it can cause
loop stability problems. Solid tantalum capacitor ESR
generatesaloop“zero”at5kHzto50kHzthatisinstrumen-
tal in giving acceptable loop phase margin. Ceramic ca-
pacitors remain capacitive to beyond 300kHz and usually
resonate with their ESL before ESR becomes effective.
Also, ceramic caps are prone to temperature effects which
requires the designer to check loop stability over the
operating temperature range.
Output Capacitor (COUT) Selection
The selection of COUT is driven by the required ESR.
Typically, once the ESR requirement is satisfied, the
capacitance is adequate for filtering. The output ripple
(∆VOUT) is determined by:
For these reasons, most of the input and output capaci-
tance should be composed of tantalum capacitors for
stability combined with about 0.1µF to 1µF of ceramic
capacitorsforhighfrequencydecoupling. Greatcaremust
betakenwhenusingonlyceramicinputandoutputcapaci-
tors. The OPTI-LOOP compensation allows transient re-
sponse to be optimized for all types of output capacitors,
including low ESR ceramics.
1
∆VOUT ≈ ∆IL ESR +
8fCOUT
where f = operating frequency, COUT = output capacitance
and ∆IL = ripple current in the inductor. With ∆IL = 0.4
IOUT(MAX) the output ripple will be less than 100mV with:
ESRCOUT < 100mΩ
Setting the Output Voltage
Once the ESR requirements for COUT have been met, the
RMS current rating generally far exceeds the IRIPPLE(P-P)
requirement.
The LTC1701 develops a 1.25V reference voltage between
the feedback pin, VFB, and the signal ground as shown in
7
LTC1701/LTC1701B
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APPLICATIO S I FOR ATIO
Figure 2. The output voltage is set by a resistive divider
according to the following formula:
of 20% to 100% of full-load current having a rise time of
1µs to 10µs will produce output voltage and ITH pin
waveforms that will give a sense of the overall loop
stability without breaking the feedback loop.
V
OUT = 1.25V(1 + R2/R1)
To prevent stray pickup, a capacitor of about 5pF can be
added across R1, located close to the LTC1701. Unfortu-
nately, the load step response is degraded by this capaci-
tor. Using a good printed circuit board layout eliminates
the need for this capacitor. Great care should be taken to
route the VFB line away from noise sources, such as the
inductor or the SW line.
The initial output voltage step may not be within the
bandwidth of the feedback loop, so the standard second-
order overshoot/DC ratio cannot be used to determine
phase margin. The gain of the loop increases with R3 and
the bandwidth of the loop increases with decreasing C3. If
R3 is increased by the same factor that C3 is decreased,
the zero frequency will be kept the same, thereby keeping
the phase the same in the most critical frequency range of
the feedback loop. In addition, a feed-forward capacitor,
CF, can be added to improve the high frequency response,
as shown in Figure 2. Capacitor CF provides phase lead by
creatingahighfrequencyzerowithR2whichimprovesthe
phase margin.
V
OUT
R2
1%
C
F
LTC1701
SGND
V
FB
R1
1%
5pF
1701 F02
The output voltage settling behavior is related to the
stability of the closed-loop system and will demonstrate
the actual overall supply performance. For a detailed
explanation of optimizing the compensation components,
including a review of control loop theory, refer to Applica-
tion Note 76.
Figure 2. Setting the Output Voltage
Transient Response
The OPTI-LOOP compensation allows the transient re-
sponse to be optimized for a wide range of loads and
output capacitors. The availability of the ITH pin not only
allows optimization of the control loop behavior but also
provides a DC coupled and AC filtered closed-loop re-
sponsetestpoint.TheDCstep,risetimeandsettlingatthis
test point truly reflects the closed-loop response. Assum-
ing a predominately second order system, phase margin
and/ordampingfactorcanbeestimatedusingthepercent-
age of overshoot seen at this pin. The bandwidth can also
be estimated by examining the rise time at the pin.
RUN Function
The ITH/RUN pin is a dual purpose pin that provides the
loopcompensationandameanstoshutdowntheLTC1701.
Soft-startcanalsobeimplementedwiththispin.Soft-start
reduces surge currents from VIN by gradually increasing
theinternalpeakinductorcurrent. Powersupplysequenc-
ing can also be accomplished using this pin.
An external pull-up is required to charge the external
capacitor C3 in Figure 1. Typically, a 1M resistor between
The ITH external components shown in the Figure 1 circuit
will provide an adequate starting point for most applica-
tions. The series R3-C3 filter sets the dominant pole-zero
loop compensation. The values can be modified slightly
(from 0.5 to 2 times their suggested values) to optimize
transient response once the final PC layout is done and the
particular output capacitor type and value have been
determined. The output capacitors need to be selected
because the various types and values determine the loop
feedback factor gain and phrase. An output current pulse
V
IN and ITH/RUN is used. When the voltage on ITH/RUN
reaches about 0.8V the LTC1701 begins operating. At this
point the error amplifier pulls up the ITH/RUN pin to the
normal operating range of 1.25V to 2.25V.
Soft-start can be implemented by ramping the voltage on
ITH/RUN during start-up as shown in Figure 3(b). As the
voltage on ITH/RUN ramps through its operating range the
internal peak current limit is also ramped at a proportional
linear rate.
8
LTC1701/LTC1701B
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APPLICATIO S I FOR ATIO
During normal operation the voltage on the ITH/RUN pin
will vary from 1.25V to 2.25V depending on the load
current. Pulling the ITH/RUN pin below 0.8V puts the
LTC1701 into a low quiescent current shutdown mode
(IQ < 1µA). This pin can be driven directly from logic as
shown in Figures 3(a).
continuous mode, IGATECHG = f • QP, where QP is the gate
charge of the internal MOSFET switch.
3) I2R Losses are predicted from the DC resistances of the
MOSFET and inductor. In continuous mode the average
output current flows through L, but is “chopped” between
the topside internal MOSFET and the Schottky diode. At
low supply voltages where the switch on-resistance is
higher and the switch is on for longer periods due to the
higher duty cycle, the switch losses will dominate. Using
a larger inductance helps minimize these switch losses. At
high supply voltages, these losses are proportional to the
load. I2R losses cause the efficiency to drop at high output
currents.
I
/RUN
TH
I /RUN
TH
R1
D1
C
C
C
C
C1
R
C
R
C
(a)
(b)
1701 F03
Figure 3. ITH/RUN Pin Interfacing
4) The Schottky diode is a major source of power loss at
high currents and gets worse at low output voltages. The
diode loss is calculated by multiplying the forward voltage
drop times the diode duty cycle multiplied by the load
current.
Efficiency Considerations
The percent efficiency of a switching regulator is equal to
the output power divided by the input power times 100%.
It is often useful to analyze individual losses to determine
what is limiting the efficiency and what change would
produce the most improvement. Percent efficiency can be
expressed as:
Other “hidden” losses such as copper trace and internal
battery resistances can account for additional efficiency
degradations in portable systems. It is very important to
include these “system” level losses in the design of a
system. The internal battery and fuse resistance losses
can be minimized by making sure that CIN has adequate
charge storage and very low ESR at the switching fre-
quency.OtherlossesincludingSchottkyconductionlosses
during dead-time and inductor core losses generally ac-
count for less than 2% total additional loss.
%Efficiency = 100% – (L1 + L2 + L3 + ...)
whereL1, L2, etc. aretheindividuallossesasapercentage
of input power.
Although all dissipative elements in the circuit produce
losses, 4 main sources usually account for most of the
losses in LTC1701 circuits: 1) LTC1701 VIN current,
2) switching losses, 3) I2R losses, 4) Schottky diode
losses.
THERMAL CONSIDERATIONS
The power handling capability of the device at high ambi-
ent temperatures will be limited by the maximum rated
junction temperature (125°C). It is important to give
careful consideration to all sources of thermal resistance
fromjunctiontoambient.Additionalheatsourcesmounted
nearby must also be considered.
1) The VIN current is the DC supply current given in the
electrical characteristics which excludes MOSFET driver
andcontrolcurrents.VIN currentresultsinasmall(<0.1%)
loss that increases with VIN, even at no load.
2)TheswitchingcurrentisthesumoftheinternalMOSFET
driver and control currents. The MOSFET driver current
results from switching the gate capacitance of the power
MOSFET. Each time a MOSFET gate is switched from low
tohightolowagain, apacketofchargedQmovesfromVIN
to ground. The resulting dQ/dt is a current out of VIN that
is typically much larger than the control circuit current. In
For surface mount devices, heat sinking is accomplished
by using the heat spreading capabilities of the PC board
and its copper traces. Copper board stiffeners and plated
through-holes can also be used to spread the heat gener-
ated by power devices.
9
LTC1701/LTC1701B
U
W
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APPLICATIO S I FOR ATIO
The following table lists thermal resistance for several
different board sizes and copper areas. All measurements
were taken in still air on 3/32" FR-4 board with one ounce
copper.
Remembering that the above junction temperature is ob-
tained from a R at 25°C, we might recalculate the
DS(ON)
junction temperature based on a higher R
since it
DS(ON)
increases with temperature. However, we can safely as-
sume that the actual junction temperature will not exceed
the absolute maximum junction temperature of 125°C.
Table 1. Measured Thermal Resistance
COPPER AREA
THERMAL RESISTANCE
TOPSIDE* BACKSIDE
BOARD AREA
θ
JA
Board Layout Considerations
2
2
2
2
2
2
2
2500mm
1000mm
2500mm
2500mm
2500mm
2500mm
2500mm
2500mm
125°C/W
125°C/W
130°C/W
135°C/W
150°C/W
2
2
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of the
LTC1701. These items are also illustrated graphically in the
layout diagram of Figure 4. Check the following in your
layout:
2500mm
2
2
225mm
100mm
2500mm
2
2
2500mm
2
2
50mm
2500mm
*Device is mounted on topside.
1. Does the capacitor C connect to the power V (Pin 5)
IN
IN
Calculating Junction Temperature
and GND (Pin 2) as close as possible? This capacitor
provides the AC current to the internal P-channel MOSFET
and its driver.
In a majority of applications, the LTC1701 does not dissi-
pate much heat due to its high efficiency. However, in
applications where the switching regulator is running at
high duty cycles or the part is in dropout with the switch
turned on continuously (DC), some thermal analysis is
required. The goal of the thermal analysis is to determine
whether the power dissipated by the regulator exceeds the
maximum junction temperature. The temperature rise is
given by:
2. Is the Schottky diode closely connected between the
ground (Pin 2) and switch output (Pin 1)?
3.AretheC ,L1andD1closelyconnected?The Schottky
OUT
anodeshouldconnectdirectlytotheinputcapacitorground.
4. The resistor divider, R1 and R2, must be connected
between the (+) plate of C
and a ground line terminated
OUT
near GND (Pin 2). The feedback signal FB should be routed
away from noisy components and traces, such as the SW
line (Pin 1).
T
= P • θ
D JA
RISE
where P is the power dissipated by the regulator and θ
D
JA
is the thermal resistance from the junction of the die to the
5. Keep sensitive components away from the SW pin. The
ambient temperature.
input capacitor C , the compensation capacitor C and all
IN
C
The junction temperature is given by:
theresistorsR1, R2, R andR shouldberoutedawayfrom
C
S
the SW trace and the components L1 and D1.
T = T
+ T
AMBIENT
J
RISE
As an example, consider the case when the LTC1701 is in
dropout at an input voltage of 3.3V with a load current of
0.5A. The ON resistance of the P-channel switch is approxi-
mately 0.30Ω. Therefore, power dissipated by the part is:
L1
1
2
3
5
V
V
IN
SW
V
IN
OUT
+
+
LTC1701
D1
C
C
IN
OUT
GND
2
R2
R1
P = I • R
= 75mW
DS(ON)
R
D
S
4
V
I /RUN
TH
FB
The SOT package junction-to-ambient thermal resistance,
R
C
θ , will be in the range of 125°C/W to 150°C/W. Therefore,
JA
C
C
the junction temperature of the regulator operating in a
1701 F04
25°C ambient temperature is approximately:
BOLD LINES INDICATE HIGH CURRENT PATHS
T = 0.075 • 150 + 25 = 36°C
J
Figure 4. LTC1701 Layout Diagram (See Board Layout Checklist)
10
LTC1701/LTC1701B
U
TYPICAL APPLICATIO S
2mm Nominal Height 1.5V Converter
Efficiency Curve
L1
90
4.7µH
V
IN
V
= 2.5V
IN
V
OUT
2.5V TO
5.5V
V
SW
85
80
75
70
65
60
55
50
IN
(1.5V/0.5A)
V
= 3.3V
IN
D1
R4
LTC1701
GND
1M
+
+
R2
20k
C1
15µF
C4
C2
22µF
C5
4.7µF
1µF
I
/RUN
V
TH
FB
R3
5.1k
R1
100k
C3
330pF
C1: AVX TAJA156M010R
C2: AVX TAJA226M006R
C4: TAIYO YUDEN LMK212BJ105MG D1: MBRM120L
C5: TAIYO YUDEN JMK212BJ475MG L1: MURATA LQH3C4R7M24
1701 TA01a
LTC1701
LTC1701B
V
= 1.5V
OUT
1
10
100
1000
LOAD CURRENT (mA)
1701TA01b
Efficiency Curve
All Ceramic Capacitor 2.5V Converter
L1
100
95
90
85
80
75
70
4.7µH
V
= 2.5V
V
OUT
IN
V
OUT
2.5V TO
5.5V
V
SW
IN
(2.5V/0.5A)
V
= 3.3V
IN
D1
R4
1M
LTC1701
GND
R2
121k
C1
10µF
C4
C2
10µF
C5
1µF
V
= 5.0V
IN
1µF
I
TH
/RUN
V
FB
R3
5.1k
C6
33pF
R1
121k
C3
180pF
LTC1701
C1, C2: TAIYO YUDEN JMK316BJ106ML
C4, C5: TAIYO YUDEN LMK212BJ105MG
L1: MURATA LQH3C4R7M24
D1: MBRM120L
LTC1701B
1701 TA02
1
10
100
1000
LOAD CURRENT (mA)
1701 TA02b
LTC1701B Low Current Pulse Skip
5V to 3.3V Converter with Push-Button On/Off
L1
4.7µH
V
V
IN
OUT
3.3V TO
5.5V
(3.3V/
0.5A)
V
SW
IN
V
OUT
20mV/DIV
D1
ON
LTC1701
GND
+
R4
1M
R2
C2
22µF
C5
1µF
+
C1
15µF
C4
1µF
34k
I
/RUN
V
FB
TH
R3
5.1k
R1
20.5k
OFF
R5
5.1M
C3
330pF
I
L
50mA/DIV
C1: AVX TAJA156M010R
C2: AVX TAJA226M006R
C4, C5: TAIYO YUDEN LMK212BJ105MG
D1: MBRM120L
L1: MURATA LQH3C4R7M24
1701 TA03a
V
V
= 5V
5µs/DIV
IN
OUT
1701 TA03b
= 2.5V
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tationthattheinterconnectionofitscircuitsasdescribedhereinwillnotinfringeonexistingpatentrights.
11
LTC1701/LTC1701B
U
TYPICAL APPLICATIO
Single Cell Li-Ion to 3.3V Zeta Converter
C6
4.7µF
L1
4.7µH
V
V
OUT
IN
V
SW
IN
V
I
OUT(MAX)
2.5V TO 4.2V
(3.3V)
IN
R4
2.5V
3.0V
3.5V
4.0V
4.2V
200mA
1M
L2
D1
225mA
250mA
280mA
290mA
+
+
LTC1701
GND
C1
22µF
C2
22µF
R2
34k
C4
1µF
×5R
I
/RUN
V
FB
TH
R3
5.1k
R1
20.5k
C3
330pF
D1: MBR0520L
L1, L2: SUMIDA CLQ72-4R7
DRG NO 6333-JPS-010
C1, C2: AVX TAJA226M006R
C6: TAIYO YUDEN JMK212BJ475MG
1701 TA04
U
Dimensions in inches (millimeters) unless otherwise noted.
PACKAGE DESCRIPTIO
S5 Package
5-Lead Plastic SOT-23
(LTC DWG # 05-08-1633)
2.60 – 3.00
(0.102 – 0.118)
2.80 – 3.00
(0.110 – 0.118)
(NOTE 3)
1.50 – 1.75
(0.059 – 0.069)
0.00 – 0.15
0.90 – 1.45
(0.00 – 0.006)
(0.035 – 0.057)
0.35 – 0.55
(0.014 – 0.022)
0.95
(0.037)
REF
0.35 – 0.50
(0.014 – 0.020)
FIVE PLACES (NOTE 2)
0.90 – 1.30
(0.035 – 0.051)
0.09 – 0.20
(0.004 – 0.008)
(NOTE 2)
1.90
(0.074)
REF
S5 SOT-23 0599
NOTE:
1. DIMENSIONS ARE IN MILLIMETERS
2. DIMENSIONS ARE INCLUSIVE OF PLATING
3. DIMENSIONS ARE EXCLUSIVE OF MOLD FLASH AND METAL BURR
4. MOLD FLASH SHALL NOT EXCEED 0.254mm
5. PACKAGE EIAJ REFERENCE IS SC-74A (EIAJ)
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1701Bfa LT/TP 1100 REV A 2K • PRINTED IN USA
LINEAR TECHNOLOGY CORPORATION 1999
LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
12
●
●
(408)432-1900 FAX:(408)434-0507 www.linear-tech.com
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