LTC1821-1AIGW [Linear]
16-Bit, Ultra Precise, Fast Settling VOUT DAC; 16位，超精密，快速建立DAC VOUT
| 型号： | LTC1821-1AIGW |
| 厂家： | 
Linear |
| 描述： | 16-Bit, Ultra Precise, Fast Settling VOUT DAC |
| 文件： | 总16页 (文件大小：221K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LTC1821
16-Bit, Ultra Precise,
Fast Settling V DAC
OUT
U
FEATURES
DESCRIPTIO
The LTC®1821 is a parallel input 16-bit multiplying voltage
output DAC that operates from analog supply voltages of
±5V up to ±15V. INL and DNL are accurate to 1LSB over the
industrial temperature range in both unipolar 0V to 10V and
bipolar±10Vmodes.Precise16-bitbipolar±10Voutputsare
achieved with on-chip 4-quadrant multiplication resistors.
The LTC1821 is available in a 36-lead SSOP package and is
specified over the industrial temperature range.
■
2µs Settling to 0.0015% for 10V Step
■
1LSB Max DNL and INL Over Industrial
Temperature Range
■
On-Chip 4-Quadrant Resistors Allow Precise 0V to
10V, 0V to –10V or ±10V Outputs
■
Low Glitch Impulse: 2nV•s
■
Low Noise: 13nV/√Hz
■
36-Lead SSOP Package
■
Power-On Reset
Thedeviceincludesaninternaldeglitchercircuitthatreduces
the glitch impulse to less than 2nV•s (typ). The LTC1821
settles to 1LBS in 2µs with a full-scale 10V step. The
combinationoffast,precisesettlingandultralowglitchmake
the LTC1821 ideal for precision industrial control applica-
tions.
■
Asynchronous Clear Pin
LTC1821: Reset to Zero Scale
LTC1821-1: Reset to Midscale
U
APPLICATIO S
The asynchronous CLR pin resets the LTC1821 to zero scale
and resets the LTC1821-1 to midscale.
■
Process Control and Industrial Automation
■
Precision Instrumentation
■
Direct Digital Waveform Generation
■
Software-Controlled Gain Adjustment
, LTC and LT are registered trademarks of Linear Technology Corporation.
■
Automatic Test Equipment
U
TYPICAL APPLICATIO
16-Bit, 4-Quadrant Multiplying DAC with a
Minimum of External Components
V
REF
–V
LTC1821/LTC1821-1
Integral Nonlinearity
REF
5V
3
2
+
0.1µF
6
1.0
LT®1468
–
0.8
0.6
15pF
15pF
0.4
12 14
10
R1
9
R
8
2
V
CC
11
R
0.2
REF
R
I
OUT
COM
R2
OFS
FB
+
V
15
0
15V
R
R
OFS
FB
R1
–0.2
–0.4
–0.6
–0.8
–1.0
0.1µF
–
+
V
REF
16
13
V
V
=
OUT
LTC1821-1
DATA
16-BIT DAC
OUT
INPUTS
–V
REF
3 TO 6,
25 TO 36
–15V
0.1µF
–
V
20
0
32768
49152
16384
65535
DIGITAL INPUT CODE
WR LD CLR
24 23
DNC* DNC* DNC* NC
18 19 21 22
DGND
1
AGNDF AGNDS
17 16
1821 TA02
7
WR
LD
1821 TA01
CLR
*DO NOT CONNECT
1
LTC1821
W W
U W
U
W U
ABSOLUTE MAXIMUM RATINGS
(Note 1)
PACKAGE/ORDER INFORMATION
TOP VIEW
ORDER PART
NUMBER
VCC to AGNDF, AGNDS ............................... – 0.3V to 7V
DGND
1
2
3
4
5
6
7
8
9
36 D4
35 D5
34 D6
33 D7
32 D8
31 D9
30 D10
29 D11
28 D12
27 D13
26 D14
25 D15
24 WR
23 LD
22 NC
V
CC to DGND .............................................. –0.3V to 7V
V
CC
Total Supply Voltage (V+ to V–) ............................... 36V
AGNDF, AGNDS to DGND ............................. VCC + 0.3V
DGND to AGNDF, AGNDS ............................. VCC + 0.3V
REF, RCOM to AGNDF, AGNDS, DGND .................. ±15V
ROFS, RFB, R1, to AGNDF, AGNDS, DGND ............ ±15V
Digital Inputs to DGND ............... –0.3V to (VCC + 0.3V)
IOUT to AGNDF, AGNDS............... –0.3V to (VCC + 0.3V)
Maximum Junction Temperature .......................... 150°C
Operating Temperature Range
D3
D2
LTC1821ACGW
LTC1821BCGW
LTC1821-1ACGW
LTC1821-1BCGW
LTC1821AIGW
LTC1821BIGW
LTC1821-1AIGW
LTC1821-1BIGW
D1
D0
CLR
REF
R
COM
R1 10
R
11
12
OFS
R
FB
V
OUT 13
I
14
15
OUT
+
V
LTC1821C/LTC1821-1C.......................... 0°C to 70°C
LTC1821I/LTC1821-1I ....................... –40°C to 85°C
Storage Temperature Range ................ –65°C to 150°C
Lead Temperature (Soldering, 10 sec)................. 300°C
AGNDS 16
AGNDF 17
DNC* 18
21 DNC*
–
20
V
19 DNC*
GW PACKAGE
36-LEAD PLASTIC SSOP WIDE
TJMAX = 125°C, θJA = 80°C/ W
*DO NOT CONNECT
Consult factory for parts specified with wider operating temperature ranges.
ELECTRICAL CHARACTERISTICS
V+ = 15V, V– = –15V, VCC = 5V, VREF = 10V, AGNDF = AGNDS = DGND = 0V.
The ● denotes specifications which apply over the full operating temperature range, otherwise specifications are TA = TMIN to TMAX
,
LTC1821B/-1B
LTC1821A/-1A
SYMBOL PARAMETER
Accuracy
CONDITIONS
MIN
TYP
MAX
MIN
TYP
MAX
UNITS
Resolution
●
●
16
16
16
16
Bits
Bits
Monotonicity
INL
DNL
GE
Integral Nonlinearity
T = 25°C (Note 2)
±2
±2
±0.25
±0.35
±1
±1
LSB
LSB
A
T
to T
●
●
MIN
MAX
Differential Nonlinearity
Gain Error
T = 25°C
±1
±1
±0.2
±0.2
±1
±1
LSB
LSB
A
T
to T
MIN
MAX
Unipolar Mode
T = 25°C (Note 3)
±16
±24
±5
±8
±16
±16
LSB
LSB
A
T
to T
●
MIN
MAX
Bipolar Mode
T = 25°C (Note 3)
±16
± 24
±2
±5
±16
±16
LSB
LSB
A
T
to T
●
●
MIN
MAX
Gain Temperature Coefficient
Unipolar Zero-Scale Error
∆Gain/∆Temperature (Note 4)
1
3
1
3
ppm/°C
T = 25°C
±3
±6
±0.25
±0.50
±2
±4
LSB
LSB
A
T
to T
●
●
MIN
MAX
Bipolar Zero Error
T = 25°C
±12
±16
±2
±3
±8
±10
LSB
LSB
A
T
to T
MIN
MAX
PSRR
Power Supply Rejection Ratio
V
= 5V ±10%
●
●
2
±2
0.7
±0.1
2
±2
LSB/V
LSB/V
CC
+
–
V , V = ±4.5V to ±16.5V
2
LTC1821
ELECTRICAL CHARACTERISTICS
The ● denotes specifications which apply over the full operating temperature range, otherwise specifications are TA = TMIN to TMAX
V+ = 15V, V– = –15V, VCC = 5V, VREF = 10V, AGNDF = AGNDS = DGND = 0V.
,
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Reference Input
R
DAC Input Resistance (Unipolar)
R1/R2 Resistance (Bipolar)
(Note 6)
●
●
●
4.5
9
6
12
12
10
20
20
kΩ
kΩ
kΩ
REF
R1/R2
, R
(Notes 6, 11)
(Note 6)
R
Feedback and Offset Resistances
9
OFS FB
AC Performance (Note 4)
Output Voltage Settling Time
∆V
= 10V (Notes 7, 8)
2
2
µs
nV•s
nV•s
OUT
Midscale Glitch Impulse
Digital-Feedthrough
(Note 10)
(Note 9)
2
Multiplying Feedthrough Error
Multiplying Bandwidth
V
= ±10V, 10kHz Sine Wave (Note 7)
1
mV
P-P
REF
Code = Full Scale (Note 7)
600
kHz
Output Noise Voltage Density
1kHz to 100kHz (Note 7)
Code = Zero Scale
Code = Full Scale
13
20
nV/√Hz
nV/√Hz
Output Noise Voltage
1/f Noise Corner
0.1Hz to 10Hz (Note 7)
Code = Zero Scale
Code = Full Scale
0.45
1
µV
µV
RMS
RMS
(Note 7)
30
Hz
Analog Outputs (Note 4)
+
+
–
V
DAC Output Swing
R = 2k, V = 15V, V = –15V
●
●
±12.6
±2.6
V
V
OUT
L
–
R = 2k, V = 5V, V = –5V
L
+
–
DAC Output Load Regulation
Short-Circuit Current
Slew Rate
V = 15V, V = –15V, ±5mA Load
●
●
0.02
40
0.2
LSB/mA
mA
+
–
I
V
OUT
= 0V, V = 15V, V = –15V
12
SC
+
+
–
SR
R = 2k, V = 15V, V = –15V
20
14
V/µs
V/µs
L
L
–
R = 2k, V = 5V, V = –5V
Digital Inputs
V
V
Digital Input High Voltage
Digital Input Low Voltage
Digital Input Current
●
●
●
●
2.4
V
V
IH
IL
0.8
±1
8
I
0.001
µA
pF
IN
C
Digital Input Capacitance
(Note 4 ) V = 0V
IN
IN
Timing Characteristics
t
t
t
t
t
t
Data to WR Setup Time
Data to WR Hold Time
WR Pulse Width
●
●
●
●
●
●
60
0
20
–12
25
ns
ns
ns
ns
ns
ns
DS
DH
60
110
60
0
WR
LD
LD Pulse Width
55
Clear Pulse Width
WR to LD Delay Time
40
CLR
LWD
Power Supply
I
I
Supply Current, V
Digital Inputs = 0V or V
CC
●
1.5
10
µA
CC
S
CC
+
–
Supply Current, V , V
±15V
±5V
●
●
4.5
4.0
7.0
6.8
mA
mA
V
V
V
Supply Voltage
Supply Voltage
Supply Voltage
●
●
●
4.5
4.5
5
5.5
V
V
V
CC
+
16.5
–4.5
–
–16.5
3
LTC1821
ELECTRICAL CHARACTERISTICS
Note 1: Absolute Maximum Ratings are those values beyond which the life
Note 8: To 0.0015% for a full-scale change, measured from the rising
of a device may be impaired.
edge of LD.
Note 2: ±1LSB = ±0.0015% of full scale = ±15.3ppm of full scale.
Note 3: Using internal feedback resistor.
Note 4: Guaranteed by design, not subject to test.
Note 9: REF = 0V. DAC register contents changed from all 0s to all 1s or all
1s to all 0s. LD low and WR high.
Note 10: Midscale transition code: 0111 1111 1111 1111 to
1000 0000 0000 0000. Unipolar mode, C
= 33pF.
FEEDBACK
Note 5: I
with DAC register loaded to all 0s.
OUT
Note 11: R1 and R2 are measured between R1 and R , REF and R
COM
.
COM
Note 6: Typical temperature coefficient is 100ppm/°C.
Note 7: Measured in unipolar mode.
U W
TYPICAL PERFOR A CE CHARACTERISTICS
Unipolar Multiplying Mode
Signal-to-(Noise + Distortion)
vs Frequency
Midscale Glitch Impulse
Full-Scale Setting Waveform
–40
–50
40
30
20
10
V
C
= 5V
C
V
= 30pF
CC
FEEDBACK
FEEDBACK
= 10V
REF
= 30pF
REFERENCE = 6V
RMS
LD PULSE
5V/DIV
–60
–70
GATED
SETTLING
WAVEFORM
500µV/DIV
0
–80
1nV-s TYPICAL
–10
500kHz FILTER
–90
–20
–30
–40
1821 G02
80kHz FILTER
500ns/DIV
VREF = –10V
CFEEDBACK = 20pF
0V TO 10V STEP
–100
–110
30kHz FILTER
10k 100k
0.2
0.4
TIME (µs)
0.8
10
100
1k
0
1.0
0.6
FREQUENCY (Hz)
1821 G03
1821 G01
Bipolar Multiplying Mode
Signal-to-(Noise + Distortion)
vs Frequency, Code = All Zeros
Bipolar Multiplying Mode
VCC Supply Current vs Digital
Input Voltage
Signal-to-(Noise + Distortion)
vs Frequency, Code = All Ones
5
–40
–50
–40
–50
V = 5V
CC
ALL DIGITAL INPUTS
TIED TOGETHER
V
C
= 5V USING AN LT1468
FEEDBACK
REFERENCE = 6V
V
C
= 5V USING AN LT1468
FEEDBACK
CC
CC
= 15pF
= 15pF
REFERENCE = 6V
RMS
RMS
4
3
2
1
0
–60
–60
–70
–70
–80
–80
500kHz FILTER
500kHz FILTER
–90
–90
80kHz FILTER
30kHz FILTER
–100
–110
–100
–110
80kHz FILTER
30kHz
FILTER
0
1
2
3
4
5
10
100
1k
10k
100k
10
100
1k
10k
100k
FREQUENCY (Hz)
FREQUENCY (Hz)
INTPUT VOLTAGE (V)
1821 G04
1821 G05
1821 G06
4
LTC1821
U W
TYPICAL PERFOR A CE CHARACTERISTICS
Logic Threshold vs VCC Supply
Voltage
Integral Nonlinearity (INL)
Differential Nonlinearity (DNL)
1.0
0.8
1.0
0.8
3.0
2.5
2.0
1.5
1.0
0.5
0
0.6
0.6
0.4
0.4
0.2
0.2
0
0
–0.2
–0.4
–0.6
–0.8
–1.0
–0.2
–0.4
–0.6
–0.8
–1.0
0
2
3
4
5
6
7
0
16384
32768
49152
65535
0
32768
49152
1
16384
65535
SUPPLY VOLTAGE (V)
DIGITAL INPUT CODE
DIGITAL INPUT CODE
1821 G07
1821 G08
1821 G09
Integral Nonlinearity vs Reference
Voltage in Bipolar Mode
Differential Nonlinearity vs
Reference Voltage in Unipolar Mode
Integral Nonlinearity vs Reference
Voltage in Unipolar Mode
1.0
0.8
1.0
0.8
1.0
0.8
0.6
0.6
0.6
0.4
0.4
0.4
0.2
0.2
0.2
0
0
0
–0.2
–0.4
–0.6
–0.8
–1.0
–0.2
–0.4
–0.6
–0.8
–1.0
–0.2
–0.4
–0.6
–0.8
–1.0
–10 –8 –6 –4 –2
0
2
4
6
8
10
–10 –8 –6 –4 –2
0
2
4
6
8
10
–10 –8 –6 –4 –2
0
2
4
6
8
10
REFERENCE VOLTAGE (V)
REFERENCE VOLTAGE (V)
REFERENCE VOLTAGE (V)
1821 G10
1821 G12
1821 G11
Differential Nonlinearity vs
Reference Voltage in Bipolar Mode
Integral Nonlinearity vs VCC Supply
Voltage in Unipolar Mode
Integral Nonlinearity vs VCC Supply
Voltage in Bipolar Mode
1.0
0.8
1.0
0.8
2.0
1.5
0.6
0.6
1.0
0.4
0.4
V
V
= 10V
= 10V
REF
0.5
V
REF
= 10V
0.2
0.2
V
V
= 2.5V
= 2.5V
REF
V
REF
= 2.5V
0
0
0
REF
V
REF
= 10V
–0.2
–0.4
–0.6
–0.8
–1.0
–0.2
–0.4
–0.6
–0.8
–1.0
– 0.5
–1.0
–1.5
–2.0
REF
V
REF
= 2.5V
–10 –8 –6 –4 –2
0
2
4
6
8
10
2
3
4
5
6
7
4
SUPPLY VOLTAGE (V)
7
2
3
5
6
REFERENCE VOLTAGE (V)
SUPPLY VOLTAGE (V)
1821 G13
1821 G14
1821 G15
5
LTC1821
U W
TYPICAL PERFOR A CE CHARACTERISTICS
Differential Nonlinearity vs VCC
Supply Voltage in Bipolar Mode
Differential Nonlinearity vs VCC
Supply Voltage in Unipolar Mode
1.0
0.8
1.0
0.8
0.6
0.6
0.4
0.4
V
REF
= 10V
= 2.5V
REF
0.2
0.2
V
V
= 10V
= 10V
V
REF
0
0
V
V
= 2.5V
= 2.5V
REF
REF
–0.2
–0.4
–0.6
–0.8
–1.0
–0.2
–0.4
–0.6
–0.8
–1.0
V
= 10V
REF
REF
REF
V
= 2.5V
2
3
4
5
6
7
2
3
4
5
6
7
SUPPLY VOLTAGE (V)
SUPPLY VOLTAGE (V)
1821 G16
1821 G17
Bipolar Multiplying Mode Frequency
Response vs Digital Code
Bipolar Multiplying Mode Frequency
Response vs Digital Code
Unipolar Multiplying Mode Frequency
Response vs Digital Code
0
–20
–40
–60
–80
0
–20
0
ALL BITS ON
ALL BITS ON
D15 ON
D14 ON
D13 ON
D12 ON
D11 ON
D10 ON
D9 ON
D8 ON
D7 ON
D6 ON
D5 ON
ALL BITS OFF
D14 ON
D15 AND D14 ON
D15 AND D13 ON
D15 AND D12 ON
D15 AND D11 ON
D15 AND D10 ON
D15 AND D9 ON
D15 AND D8 ON
D15 AND D7 ON
D15 AND D6 ON
D14 AND D13 ON
D14 TO D12 ON
D14 TO D11 ON
D14 TO D10 ON
D14 TO D9 ON
D14 TO D8 ON
D14 TO D7 ON
D14 TO D6 ON
D14 TO D5 ON
–20
–40
–40
–60
–60
D15 AND D5 ON
D15 AND D4 ON
D15 AND D3 ON
D15 AND D2 ON
D4 ON
D3 ON
D2 ON
D1 ON
CODES FROM
–80
CODES FROM
MIDSCALE
D14 TO D4 ON
D14 TO D3 ON
D14 TO D2 ON
D14 TO D1 ON
MIDSCALE
TO FULL SCALE
–80
TO ZERO SCALE
–100
–120
D0 ON
D15 AND D1 ON
D15 AND D0 ON
D14 TO D0 ON
D15 ON
ALL BITS OFF
D15 ON
*
*
–100
–100
10
100
1k
10k
100k 1M
10M
100
1k
10k
100k
1M
10M
10
100
1k
10k
100k 1M 10M
FREQUENCY (Hz)
FREQUENCY (Hz)
FREQUENCY (Hz)
1821 G19
1821 G18
1821 G20
*DAC ZERO VOLTAGE OUTPUT LIMITED BY BIPOLAR
ZERO ERROR TO –96dB TYPICAL (–78dB MAX, A GRADE)
*DAC ZERO VOLTAGE OUTPUT LIMITED BY BIPOLAR
ZERO ERROR TO –96dB TYPICAL (–78dB MAX, A GRADE)
V
REF
VREF
V
REF
3
2
30pF
3
2
+
+
8
9 10 11 12
14
6
6
LT1468
–
LT1468
–
VOUT
LTC1821 13
12pF
12pF
12pF
12pF
1 16 17
15pF
15pF
10
9
8 1112
10
9
8 1112
14
13
14
13
V
OUT
LTC1821
1 16 17
V
OUT
LTC1821
1 16 17
6
LTC1821
U
U
U
PIN FUNCTIONS
DGND (Pin 1): Digital Ground. Connect to analog ground.
IOUT (Pin 14): DAC Current Output. Normally tied through
a 22pF feedback capacitor in unipolar mode (15pF in
VCC (Pin 2): Positive Supply Input. 4.5V ≤ VCC ≥ 5.5V.
Requires a bypass capacitor to ground.
bipolar mode) to VOUT
.
V+ (Pin 15): Amplifier Positive Supply. Range is 4.5V to
16.5V.
D3 (Pin 3): Digital Input Data Bit 3.
D2 (Pin 4): Digital Input Data Bit 2.
D1 (Pin 5): Digital Input Data Bit 1.
D0 (Pin 6): LSB or Digital Input Data Bit 0.
AGNDS (Pin 16): Analog Ground Sense. Connect to
analog ground.
AGNDF (Pin 17): Analog Ground Force. Connect to
analog ground.
CLR (Pin 7): Digital Clear Control Function for the DAC.
When CLR is taken to a logic low, it sets the DAC output
andallinternalregistersto:zerocodefortheLTC1821and
midscale code for the LTC1821-1.
DNC (Pin 18, 19, 21): Connected internally. Do not
connect external circuitry to these pins.
V– (Pin 20): Amplifier Negative Supply. Range is –4.5V
to –16.5V.
REF (Pin 8):ReferenceInput and4-QuadrantResistorR2.
Typically ±10V, accepts up to ±15V. In 2-quadrant mode,
tie this pin to the external reference signal. In 4-quadrant
mode, this pin is driven by external inverting reference
amplifier.
NC (Pin 22): No Connection.
LD (Pin 23): DAC Digital Input Load Control Input. When
LD is taken to a logic high, data is loaded from the input
register into the DAC register, updating the DAC output.
RCOM (Pin 9): Center Tap Point of the Two 4-Quadrant
Resistors R1 and R2. Normally tied to the inverting input
of an external amplifier in 4-quadrant operation. Other-
wise this pin is shorted to the REF pin. See Figures 1
and 2.
WR (Pin 24): DAC Digital Write Control Input. When WR
is taken to a logic low, data is written from the digital input
pins into the 16-bit wide input reigster.
D15 (Pins 25): MSB or Digital Input Data Bit 15.
D14 (Pin 26): Digital Input Data Bit 14.
D13 (Pin 27): Digital Input Data Bit 13.
D12 (Pin 28): Digital Input Data Bit 12.
D11 (Pin 29): Digital Input Data Bit 11.
D10 (Pin 30): Digital Input Data Bit 10.
D9 (Pin 31): Digital Input Data Bit 9.
D8 (Pin 32): Digital Input Data Bit 8.
D7 (Pin 33): Digital Input Data Bit 7.
D6 (Pin 34): Digital Input Data Bit 6.
D5 (Pin 35): Digital Input Data Bit 5.
D4 (Pin 36): Digital Input Data Bit 4.
R1 (Pin 10): 4-Quadrant Resistor R1. In 2-quadrant
operation, short this pin to the REF pin. In 4-quadrant
mode, tie this pin to the external reference signal.
ROFS (Pin 11): Bipolar Offset Resistor. Typically swings
±10V, accepts up to ±15V. For 2-quadrant operation, tie
this pin to RFB and for 4-quadrant operation, tie this pin to
R1.
RFB (Pin12): Feedback Resistor. Normally connected to
VOUT. Typically swings ±10V. The voltage at this pin
swings 0 to VREF in unipolar mode and ±VREF in bipolar
mode.
VOUT (Pin 13): DAC Voltage Output. Normally connected
to RFB and to IOUT through a 22pF feedback capacitor in
unipolar mode (15pF in bipolar mode). Typically swings
±10V.
7
LTC1821
TRUTH TABLE
Table 1
CONTROL INPUTS
CLR WR
LD
REGISTER OPERATION
0
1
1
1
1
X
0
1
0
X
Reset Input and DAC Register to All 0s for LTC1821 and Midscale for LTC1821-1 (Asynchronous Operation)
Write Input Register with All 16 Data Bits
0
1
Load DAC Register with the Contents of the Input Register
Input and DAC Register Are Transparent
1
CLK = LD and WR Tied Together. The 16 Data Bits Are Written Into the Input Register on the Falling Edge of the CLK and Then
Loaded Into the DAC Register on the Rising Edge of the CLK
1
1
0
No Register Operation
W
BLOCK DIAGRA
48k
48k
REF
R
FB
8
12
11
12k
12k
12k
96k
12k
48k
48k
48k
48k
48k
48k
48k
96k
96k
96k
R
OFS
R
COM
9
14
15
I
OUT
+
R1 10
V
V
V
–
+
13
OUT
–
V
2
CC
20
16
17
DECODER
AGNDS
AGNDF
CLR
D15
(MSB)
D14
D13
D12
D11
• • •
D0
(LSB)
LOAD
RST
RST
7
LD
23
24
DAC REGISTER
18 DNC*
19
21
DNC*
DNC*
WR
INPUT REGISTER
WR
22 NC
1
1821 BD
DGND
*CONNECTED INTERNALLY.
DO NOT CONNECT EXTERNAL
CIRCUITRY TO THESE PINS
25
26
36
3
4
5
6
• • • •
D15
D14
D4
D3
D2
D1
D0
8
LTC1821
W U
W
TI I G DIAGRA
t
WR
WR
DATA
LD
t
DS
t
DH
t
LWD
t
LD
t
CLR
CLR
1821 TD
U
W U U
APPLICATIONS INFORMATION
Description
The LTC1821 contains an onboard precision high speed
amplifier. This amplifier together with the feedback resis-
tor(RFB)formaprecisioncurrent-to-voltageconverterfor
theDAC’scurrentoutput.Theamplifierhasverylownoise,
offset, input bias current and settles in less than 2µs to
0.0015% for a 10V step. It can sink and source 22mA
(±15V) typically and can drive a 300pF capacitive load. An
added feature of these devices, especially for waveform
generation, is a proprietary deglitcher that reduces glitch
impulsetobelow2nV-sovertheDACoutputvoltagerange.
The LTC1821 is a 16-bit voltage output DAC with a full
parallel 16-bit digital interface. The device can operate
from 5V and ±15 supplies and provides both unipolar 0V
to–10Vor0Vto10Vandbipolar±10Voutputrangesfrom
a 10V or –10V reference input. Additionally, the power
suppliesfortheLTC1821cangoaslowas4.5Vand±4.5V.
Inthiscasefora2.5Vor–2.5Vreference, theoutputrange
is 0V to –2.5V, 0V to 2.5V and ±2.5V. The LTC1821 has
three additional precision resistors on chip for bipolar
operation. Refer to the block diagram regarding the fol-
lowing description.
Digital Section
The LTC1821 has a 16-bit wide full parallel data bus input.
The device is double-buffered with two 16-bit registers.
The double-buffered feature permits the update of several
DACs simultaneously. The input register is loaded directly
from a 16-bit microprocessor bus when the WR pin is
brought to a logic low level. The second register (DAC
register) is updated with the data from the input register
when the LD signal is brought to a logic high. Updating the
DACregisterupdatestheDACoutputwiththenewdata.To
make both registers transparent in flowthrough mode, tie
WR low and LD high. However, this defeats the deglitcher
operation and output glitch impulse may increase. The
deglitcher is activated on the rising edge of the LD pin. The
The 16-bit DAC consists of a precision R-2R ladder for the
13 LSBs. The three MSBs are decoded into seven seg-
ments of resistor value R. Each of these segments and the
R-2R ladder carries an equally weighted current of one
eighth of full scale. The feedback resistor RFB and
4-quadrant resistor ROFS have a value of R/4. 4-quadrant
resistors R1 and R2 have a magnitude of R/4. R1 and R2
together with an external op amp (see Figure 2) inverts the
reference input voltage and applies it to the 16-bit DAC
input REF, in 4-quadrant operation. The REF pin presents
a constant input impedance of R/8 in unipolar mode and
R/12 in bipolar mode.
9
LTC1821
U
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APPLICATIONS INFORMATION
versatility of the interface also allows the use of the input Unipolar Mode
and DAC registers in a master slave or edge-triggered (2-Quadrant Multiplying, VOUT = 0V to –VREF
configuration. This mode of operation occurs when WR
and LD are tied together. The asynchronous clear pin
resets the LTC1821 to zero scale and the LTC1821-1 to
midscale. CLR resets both the input and DAC registers.
These devices also have a power-on reset. Table 1 shows
the truth table for the LTC1821.
)
The LTC1821 can be used to provide 2-quadrant multiply-
ing operation as shown in Figure 1. With a fixed –10V
reference, the circuit shown gives a precision unipolar 0V
to 10V output swing.
5V
22pF
0.1µF
V
REF
12
R
9
14
I
10
R1
8
REF
2
11
R
R
V
COM
R2
FB
CC
OFS
OUT
+
15
V
15V
0.1µF
R
R
FB
OFS
R1
–
V
=
OUT
16
13
16-BIT DAC
0V TO
–V
DATA
V
OUT
+
INPUTS
REF
LTC1821
–
25 TO 36,
3 TO 6
V
20
–15V
0.1µF
WR
24
LD CLR DNC* DNC* DNC* NC
23
18 19 21 22
DGND
AGNDF AGNDS
17 16
7
1
WR
LD
CLR
*DO NOT CONNECT
Unipolar Binary Code Table
DIGITAL INPUT
BINARY NUMBER
IN DAC REGISTER
ANALOG OUTPUT
V
OUT
MSB
LSB
1111 1111 1111 1111
1000 0000 0000 0000
0000 0000 0000 0001
0000 0000 0000 0000
–V
REF
–V
REF
–V
REF
0V
(65,535/65,536)
(32,768/65,536) = –V /2
REF
(1/65,536)
1821 F01
Figure 1. Unipolar Operation (2-Quadrant Multiplication) VOUT = 0V to –VREF
10
LTC1821
U
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APPLICATIONS INFORMATION
Bipolar Mode
operation can be achieved with a minimum of external
components—a capacitor and a single op amp, as shown
in Figure 2. With a fixed 10V reference, the circuit shown
gives a precision bipolar –10V to 10V output swing.
(4-Quadrant Multiplying, VOUT = –VREF to VREF
)
The LTC1821 contains on chip all the 4-quadrant resistors
necessary for bipolar operation. 4-quadrant multiplying
V
REF
3
2
+
–
5V
6
LT1001
0.1µF
22pF
12
R
9
14
I
10
R1
8
REF
2
V
CC
11
R
R
COM
R2
FB
OFS
OUT
+
15
V
15V
0.1µF
R
R
R1
OFS
FB
–
V
–V
TO V
=
OUT
16
13
16-BIT DAC
DATA
REF
V
OUT
+
INPUTS
REF
LTC1821
–
25 TO 36,
3 TO 6
V
20
–15V
0.1µF
WR
24
LD CLR DNC* DNC* DNC* NC
23
18 19 21 22
DGND
AGNDF AGNDS
17 16
7
1
WR
LD
*DO NOT CONNECT
CLR
Bipolar Offset Binary Code Table
DIGITAL INPUT
BINARY NUMBER
IN DAC REGISTER
ANALOG OUTPUT
VOUT
MSB
LSB
1111 1111 1111 1111 VREF (32,767/32,768)
1000 0000 0000 0001 VREF (1/32,768)
1000 0000 0000 0000 0V
0111 1111 1111 1111 –VREF (1/32,768)
0000 0000 0000 0000 –VREF
1821 F02
Figure 2. Bipolar Operation (4-Quadrant Multiplication) VOUT = –VREF to VREF
11
LTC1821
U
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APPLICATIONS INFORMATION
Precision Voltage Reference Considerations
reference with as low an output noise voltage as practical
for the system resolution desired. Precision voltage refer-
ences, like the LT1236, produce low output noise in the
0.1Hz to 10Hz region, well below the 16-bit LSB level in 5V
or 10V full-scale systems. However, as the circuit band-
widths increase, filtering the output of the reference may
be required to minimize output noise.
Because of the extremely high accuracy of the 16-bit
LTC1821, careful thought should be given to the selection
of a precision voltage reference. As shown in the section
describing the basic operation of the LTC1821, the output
voltageoftheDACcircuitisdirectlyaffectedbythevoltage
reference; thus, any voltage reference error will appear as
a DAC output voltage error.
Grounding
There are three primary error sources to consider when
selecting a precision voltage reference for 16-bit applica-
tions: output voltage initial tolerance, output voltage tem-
perature coefficient (TC), and output voltage noise.
As with any high resolution converter, clean grounding is
important. A low impedance analog ground plane and star
grounding should be used. AGNDF and AGNDS must be
tiedtothestargroundwithaslowaresistanceaspossible.
When it is not possible to locate star ground close to
AGNDF and AGNDS, separate traces should be used to
route these pins to the star ground. This minimizes the
voltage drop from these pins to ground due to the code
dependent current flowing into the ground plane. If the
resistance of these separate circuit board traces exceeds
1Ω, the circuit of Figure 3 eliminates this code dependent
voltage drop error for high resistance traces.
Initial reference output voltage tolerance, if uncorrected,
generates a full-scale error term. Choosing a reference
with low output voltage initial tolerance, like the LT1236
(±0.05%), minimizes the gain error due to the reference;
however, a calibration sequence that corrects for system
zero- and full-scale error is always recommended.
A reference’s output voltage temperature coefficient af-
fects not only the full-scale error, but can also affect the
circuit’s INL and DNL performance. If a reference is
chosen with a loose output voltage temperature coeffi-
cient, then the DAC output voltage along its transfer
characteristic will be very dependent on ambient condi-
tions. Minimizing the error due to reference temperature
coefficient can be achieved by choosing a precision refer-
ence with a low output voltage temperature coefficient
and/or tightly controlling the ambient temperature of the
circuit to minimize temperature gradients.
To calculate PC track resistance in squares, divide the
length of the PC track by the width and multiply this result
by the sheet resistance of copper foil. For 1 oz copper
(≈1.4 mils thick), the sheet resistance is 0.045Ω per
square.
Table 2. Partial List of LTC Precision References Recommended
for Use with the LTC1821, with Relevant Specifications
INITIAL
TOLERANCE
TEMPERATURE
DRIFT
0.1Hz to 10Hz
NOISE
REFERENCE
LT1019A-5,
LT1019A-10
±0.05%
±0.05%
±0.075%
±0.05%
5ppm/°C
5ppm/°C
10ppm/°C
10ppm/°C
12µV
P-P
As precision DAC applications move to 16-bit and higher
performance, reference output voltage noise may contrib-
ute a dominant share of the system’s noise floor. This in
turn can degrade system dynamic range and signal-to-
noise ratio. Care should be exercised in selecting a voltage
LT1236A-5,
LT1236A-10
3µV
P-P
LT1460A-5,
LT1460A-10
20µV
12µV
P-P
P-P
LT1790A-2.5
12
LTC1821
U
W U U
APPLICATIONS INFORMATION
5V
22pF
15
0.1µF
2
4
6
10V
15V
LT1236A-10
12
R
9
10
R1
8
REF
2
11
R
14
I
R
V
COM
FB
CC
OFS
OUT
+
V
15V
0.1µF
R
R1
R
FB
R2
OFS
16
DATA
INPUTS
–
+
13
V
=
OUT
LTC1821
16-BIT DAC
0V TO –10V
V
OUT
25 TO 36,
3 TO 6
–
V
20
–15V
AGNDS
16
0.1µF
WR
LD CLR DNC* DNC* DNC* NC
23
18 19 21 22
DGND
19
AGNDF
17
24
7
WR
LD
CLR
–
2
*DO NOT CONNECT
6
LT1001
+ 3
ERA82.004
ALTERNATE AMPLIFIER FOR OPTIMUM SETTLING TIME PERFORMANCE
16
AGNDS
AGNDF
200Ω
17
200Ω
–
2
6
1000pF
LT1468
+ 3
ERA82.004
1821 F03
Figure 3. Driving AGNDF and AGNDS with a Force/Sense Amplifier
13
LTC1821
TYPICAL APPLICATION
U
17-Bit Sign Magnitude Output Voltage DAC with Bipolar Zero Error of 140µV (0.92LSB at 17 Bits)
16
15
14
LTC203AC
3
2
4
15V
1
2
0.1µF
0.1µF
LT1236A-10
+
V
6
+
3
5V
6
0.1µF
LT1468
2
–
–
V
22pF
15pF
10
9
12
14
I
8
REF
2
11
R
R
R1
V
R
COM
CC
OFS
FB
OUT
SIGN
BIT
+
V
15
15V
0.1µF
R
R
OFS
FB
R1
R2
–
+
16
DATA
INPUTS
13
16-BIT DAC
V
LTC1821
OUT
V
OUT
–
25 TO 36,
3 TO 6
V
20
–15V
0.1µF
DGND
1
AGNDF AGNDS
17
16
WR
24
LD CLR DNC* DNC* DNC* NC
23
18 19 21 22
7
WR
LD
*DO NOT CONNECT
CLR
1821 TA03
14
LTC1821
U
PACKAGE DESCRIPTION
Dimensions in inches (millimeters) unless otherwise noted.
GW Package
36-Lead Plastic SSOP (Wide 0.300)
(LTC DWG # 05-08-1642)
15.290 – 15.544*
(0.602 – 0.612)
36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19
10.160 – 10.414
(0.400 – 0.410)
7.417 – 7.595**
(0.292 – 0.299)
1
2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18
2.286 – 2.387
(0.090 – 0.094)
2.463 – 2.641
(0.097 – 0.104)
0.254 – 0.406
(0.010 – 0.016)
× 45°
0° – 8° TYP
0.127 – 0.305
(0.005 – 0.0115)
0.610 – 1.016
(0.024 – 0.040)
0.800
(0.0315)
BSC
0.231 – 0.3175
(0.0091 – 0.0125)
0.304 – 0.431
(0.012 – 0.017)
NOTE: DIMENSIONS ARE IN MILLIMETERS
*DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH **DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
SHALL NOT EXCEED 0.152mm (0.006") PER SIDE
FLASH SHALL NOT EXCEED 0.254mm (0.010") PER SIDE
GW36 SSOP 1098
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tationthattheinterconnectionofitscircuitsasdescribedhereinwillnotinfringeonexistingpatentrights.
15
LTC1821
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
ADCs
LTC1417
Low Power 400ksps, 14-Bit ADC
20mW, Single or ±5V, Serial I/O
LTC1418
14-Bit, 200ksps, Single 5V ADC
15mW, Serial/Parallel ±10V
LTC1604/LTC1608
LTC1605/LTC1606
LTC1609
16-Bit, 333ksps/500ksps, ±5V ADC
16-Bit, 100ksps/250ksps, Single 5V ADC
16-Bit, 200ksps, Single 5V ADC
90dB SINAD, 100dB THD, ±2.5V Inputs
±10V Inputs, 55mW/75mW, Byte or Parallel I/O
±10V Inputs, 65mW, Serial I/O
LTC2400
24-Bit, Micropower ∆Σ ADC in SO-8
24-Bit, Fully Differential, No Latency ∆Σ ADC
Parallel 14-/16-Bit Current Output DACs
Serial 16-Bit Current Output DACs in SO-8/S16
Parallel 2 Byte 16-Bit Current Output DAC
Serial 16-Bit ±5V Voltage Output DAC
0.3ppm Noise, 4ppm INL, 10ppm Total Unadjusted Error, 200µA
0.16ppm Noise, 2ppm INL, 10ppm Total Unadjusted Error, 200µA
On-Chip 4-Quadrant Resistors
LTC2410
DACs
LTC1591/LTC1597
LTC1595/LTC1596
LTC1599
Low Glitch, ±1LSB Maximum INL, DNL
On-Chip 4-Quadrant Resistors
LTC1650
Low Noise and Low Glitch Rail-to-Rail V
OUT
LTC1654
Dual 14-Bit Rail-to-Rail V
DAC
Programmable Speed/Power, 3.5µs/750µA, 8µs/450µA
OUT
LTC1655/LTC1655L Serial 5V/3V 16-Bit Voltage Output DAC in SO-8
LTC1657/LTC1657L Parallel 5V/3V 16-Bit Voltage Output DAC
Low Power, Deglitched, Rail-to-Rail V
Low Power, Deglitched, Rail-to-Rail V
OUT
OUT
LTC1658
LT1001
LT1468
Serial 14-Bit Voltage Output DAC
Precision Operational Amplifier
90MHz, 22V/µs, 16-Bit Accurate Op Amp
Bandgap Reference
Low Power, 8-Lead MSOP Rail-to-Rail V
Low Offset, Low Drift
OUT
Op Amps
Precise, 1µs Settling to 0.0015%
±0.05% Initial Tolerance, 5ppm/°C
References LT1019
LT1236
Precision Buried Zener Reference
Micropower Bandgap Reference
SOT-23 Micropower, Low Dropout Reference
±0.05% Initial Tolerance, Low Noise 3µV
±0.075% Initial Tolerance, 10ppm/°C
±0.05% Initial Tolerance, 10ppm/°C
P-P
LT1460
LT1790
1821f LT/TP 0401 4K • PRINTED IN USA
LINEAR TECHNOLOGY CORPORATION 2000
16 LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
●
●
(408)432-1900 FAX:(408)434-0507 www.linear-tech.com
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