LTC1876EG_技术文档

LTC1876

High Efficiency, 2-Phase,

Dual Synchronous Step-Down Switching

Controller and Step-Up Regulator

U

FEATURES

DESCRIPTIO

Step-Down Controller

The LTC^®1876 isahigh performance triple output switching

■

regulator. It incorporates a dual step-down switching con-

trollerthatdrivesallN-channelsynchronouspowerMOSFET

stages.Astep-upregulatorwithaninternal1A,36Vswitch

provides the third output.

Out-of-Phase Controllers Reduce Required Input

Capacitance and Power Supply Induced Noise

■

Power Good Output Voltage Indicator

OPTI-LOOP^TMCompensation Minimizes C_OUT

■

DC Programmed Fixed Frequency 150kHz to 300kHz

The step-down controllers minimize power loss and noise

by operating the output stage of each controller out of

phase. OPTI-LOOP compensation allows the transient

response to be optimized over a wide range of output

capacitance and ESR values. A RUN/SS pin for each

controller provides both soft-start and an optional timed,

short-circuit shutdown that can be configured to latch off

one or both controllers. Current foldback provides

additional short-circuit protection. In an overvoltage

condition, the bottom MOSFET is latched on until V_OUT

returns to normal. The FCB pin can be used to inhibit Burst

Mode operation or to enable regulation of a secondary

output voltage.

■

Wide V_INRange: 3.5V to 36V Operation

■

Very Low Dropout Operation: 99% Duty Cycle

■

Adjustable Soft-Start Current Ramping

■

Latched Short-Circuit Shutdown with Defeat Option

■

Remote Output Voltage Sense and OV Protection

■

5V and 3.3V Standby Regulators

Selectable Const. Freq. or Burst Mode^TMOperation

■

Step-Up Regulator

■

High Operating Switching Frequency of 1.2MHz

■

Low Internal V_CESATSwitch: 400mV @ 1A, V_IN= 3V

■

Wide V_INRange: 2.6V to 16V Operation

■

^{High Output Volt}U^{age: Up to 34V}

The step-up regulator operates at 1.2MHz, allowing the

use of tiny low cost capacitors and inductors. In addition,

its internal 1A switch allows high current outputs to be

generated. Its current mode control scheme provides

excellent line and load regulation.

APPLICATIO S

■

3.3V Input Step-Down Converter

Notebook and Palmtop Computers, PDAs

■

Battery-Operated Digital Devices

, LTC and LT are registered trademarks of Linear Technology Corporation.

Burst Mode and OPTI-LOOP are trademarks of Linear Technology Corporation.

U

TYPICAL APPLICATIO

10µH

V

IN

5.2V

+

10µF

35V

33µF

35V

TO 28V

+

10V

V

OUT3

1µF

4.7µF

12V

CER

ALUM

INTV

TG2

AUXV

V

CC

IN

200mA

+

M3

M1

M2

10µF

TG1

20V

0.1µF

BOOST2

SW2

BOOST1

SW1

6.3µH

6.8µH

LTC1876

M4

BG2

BG1

AUXSW

PGND

AUXV

FB

PGOOD

AUXSD

86.6k, 1%

+

SENSE1

SENSE2

0.01Ω

1000pF

0.01Ω

1000pF

–

V

5V

4A

SENSE1

OUT1

V

OUT2

3.3V

5A

V

OSENSE1

OSENSE2

63.4k

1%

105k

1%

I

TH1

TH2

+

56µF

4V

SP

+

47µF

220pF

15k

RUN/SS2 SGND RUN/SS1

220pF

15k

6.3V

SP

20k

1%

10.2k

1%

20k

1%

0.1µF

M1, M2, M3, M4: FDS6680A

1876 TA01

Figure 1. High Efficiency Triple 5V/3.3V/12V Power Supply

1876fa

1

LTC1876

W W U W

U

W

U

ABSOLUTE AXI U RATI GS

(Note 1)

PACKAGE/ORDER I FOR ATIO

Input Supply Voltage (V_IN).........................36V to –0.3V

Topside Driver Voltages

ORDER PART

NUMBER

TOP VIEW

RUN/SS1

1

2

36 PGOOD

35 TG1

(BOOST1, BOOST2) ...................................42V to –0.3V

Switch Voltage (SW1, SW2) .........................36V to –5V

INTV_CC,EXTV_CC, RUN/SS1, RUN/SS2, PGOOD,

(BOOST1-SW1), (BOOST2-SW2), ...............7V to –0.3V

SENSE1⁺, SENSE2⁺, SENSE1^–, SENSE2^–

Voltages ................................... (1.1)INTV_CCto –0.3V

FREQSET, STBYMD, FCB, PGOOD

+

SENSE1

LTC1876EG

–

SENSE1

3

34 SW1

V

4

33 BOOST1

OSENSE1

FREQSET

STBYMD

FCB

5

32

V

IN

6

31 BG1

30 EXTV

29 INTV

7

CC

I

8

TH1

9

28 PGND

SGND

10

11

12

27 BG2

3.3V

OUT

ITH2

Voltages ..................................................7V to –0.3V

_TH1,I_TH2, V_OSENSE1, V_OSENSE2Voltages ...2.7V to –0.3V

I

26 BOOST2

25 SW2

I

V

OSENSE2

–

SENSE2 13

24 TG2

Peak Output Current <10µs (TG1, TG2, BG1, BG2) ... 3A

INTV_CCPeak Output Current ................................ 50mA

AUXV_IN.................................................................. 16V to –0.3V

AUXSD..................................................................... 10V

AUXSW..................................................... 36V to –0.3V

AUXV_FBVoltage ....................................... 2.5V to –0.3V

Current into AUXV_FB....................................................... ±1mA

Operating Temperature Range (Note 2) ...–40°C to 85°C

Junction Temperature (Note 3)............................. 125°C

Storage Temperature Range ..................–65°C to 150°C

Lead Temperature (Soldering, 10 sec).................. 300°C

+

SENSE2 14

23 RUN/SS2

22 AUXSD

AUXSGND 15

AUXV

16

21 AUXV

IN

FB

AUXSW 17

AUXSW 18

20 AUXPGND

19 AUXPGND

G PACKAGE

36-LEAD PLASTIC SSOP

T_JMAX= 125°C, θ_JA= 95°C/W

Consult factory for parts specified with wider operating temperature ranges.

ELECTRICAL CHARACTERISTICS

The ● denotes the specifications which apply over the full operating

temperature range, otherwise specifications are at T_A= 25°C. V_IN= 15V, V_{RUN/SS1, 2}= 5V, AUXV_IN= 3V unless otherwise noted.

SYMBOL

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

Main Control Loops

V

Regulated Feedback Voltage

Feedback Current

I

Voltage = 1.2V (Note 4)

TH1, 2

●

0.792

0.800

–5

0.808

–50

V

nA

OSENSE1, 2

I

(Note 4)

= 3.6V to 30V (Note 4)

VOSENSE1, 2

V

Reference Voltage Line Regulation

Output Voltage Load Regulation

V

0.002

0.02

%/V

REFLNREG

LOADREG

IN

(Note 4)

Measured in Servo Loop; ∆I Voltage = 1.2V to 0.7V

Measured in Servo Loop; ∆I Voltage = 1.2V to 2V

●

0.1

–0.1

0.5

–0.5

%

TH

g

Transconductance Amplifier g

I

= 1.2V; Sink/Source 5µA; (Note 4)

1.3

3

mmho

MHz

m1, 2

m

TH1, 2

Transconductance Amplifier GBW

= 1.2V; (Note 4)

mOL1, 2

I

Input DC Supply Current

Normal Mode

Standby

(Note 5)

Q

V

= 15V; EXTV Tied to V ; V = 5V

RUN/SS1, 2

350

125

20

µA

IN

CC

= 0V, V

OUT1 OUT1

> 2V

= Open

STBYMD

Shutdown

35

V

Forced Continuous Threshold

Forced Continuous Current

●

0.76

–0.3

0.800

–0.18

4.3

0.84

–0.1

4.8

V

µA

V

FCB

I

V

= 0.85V

FCB

V

Burst Inhibit (Constant Frequency)

Threshold

Measured at FCB pin

BINHIBIT

1876fa

2

LTC1876

ELECTRICAL CHARACTERISTICS

The ● denotes the specifications which apply over the full operating

temperature range, otherwise specifications are at T_A= 25°C. V_IN= 15V, V_{RUN/SS1, 2}= 5V, AUXV_IN= 3V unless otherwise noted.

SYMBOL

PARAMETER

CONDITIONS

Ramping Down

MIN

TYP

3.5

0.86

–60

0.6

1.5

99.4

1.2

1.5

4.1

2

MAX

4

UNITS

V

UVLO

Undervoltage Lockout

V

●

IN

V

Overvoltage Feedback Threshold

Sense Pins Total Source Current

Master Shutdown Threshold

Keep-Alive Power On-Threshold

Maximum Duty Factor

Measured at V

0.84

–85

0.4

0.88

V

OVL

OSENSE1, 2

–

+

I

(Each Channel); V

= V

= 0V

µA

V

SENSE

SENSE1 , 2

V

MS

KA

V

Ramping Down

STBYMD

Ramping Up, RUN

= 0V

2

V

SS1, 2

DF

MAX

In Dropout

98

0.5

1.0

%

µA

V

I

Soft-Start Charge Current

V

= 1.9V

RUN/SS1, 2

V

ON RUN/SS Pin ON Threshold

LT RUN/SS Pin Latchoff Arming Threshold

RUN/SS Discharge Current

V Rising

RUN/SS1, RUN/SS2

1.9

4.5

4

RUN/SS1, 2

SCL1, 2

V

Rising from 3V

V

RUN/SS1, RUN/SS2

I

Soft Short Condition V

= 0.5V;

0.5

62

µA

OSENSE1, 2

V

= 4.5V

RUN/SS1, 2

OSENSE1, 2

I

Shutdown Latch Disable Current

Maximum Current Sense Threshold

=0.5V

1.6

75

5

µA

SDLHO

–

V

= 0.7V V

= 5V

●

88

mV

SENSE(MAX)

,

SENSE1 , 2

TG Transition Time:

Rise Time

TG1, 2 t

C

= 3300pF

50

90

ns

r

f

LOAD

Fall Time

BG Transition Time:

Rise Time

BG1, 2 t

C

= 3300pF

40

90

80

ns

r

f

LOAD

Fall Time

TG/BG t

Top Gate Off to Bottom Gate On Delay

Synchronous Switch-On Delay Time

1D

C

= 3300pF Each Driver

90

ns

LOAD

BG/TG t

Bottom Gate Off to Top Gate On Delay

Top Switch-On Delay Time

2D

90

ns

LOAD

t

Minimum ON-Time

Tested with a Square Wave (Note 7)

180

ON(MIN)

INTV Linear Regulator

CC

V

Internal V Voltage

6V < V < 30V, V = 4V

EXTVCC

4.8

4.5

5.0

0.2

80

5.2

1.0

160

V

%

INTVCC

CC

IN

INT

INTV Load Regulation

I

= 0 to 20mA, V

= 4V

EXTVCC

LDO

CC

EXT

EXTV Voltage Drop

= 20mA, V

= 5V

mV

V

CC

EXTVCC

EXTV Switchover Voltage

= 20mA, EXTV Ramping Positive

●

4.7

0.2

EXTVCC

LDOHYS

CC

EXTV Hysteresis

V

CC

Oscillator

f

I

Oscillator frequency

Lowest Frequency

V

= Open (Note 8)

= 0V

190

120

280

220

140

310

–2

250

160

360

–1

kHz

µA

OSC

FREQSET

LOW

Highest Frequency

FREQSET Input Current

= 2.4V

HIGH

= 2.4V

FREQSET

1876fa

3

LTC1876

ELECTRICAL CHARACTERISTICS

The ● denotes the specifications which apply over the full operating

temperature range, otherwise specifications are at T_A= 25°C. V_IN= 15V, V_{RUN/SS1, 2}= 5V, AUXV_IN= 3V unless otherwise noted.

SYMBOL

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

3.3V Linear Regulator

V

3.3V Regulator Output Voltage

3.3V Regulator Load Regulation

3.3V Regulator Line Regulation

No Load

●

3.25

3.35

0.5

3.45

2

V

%

3.3OUT

3.3IL

I

= 0mA to 10mA

3.3

6V < V < 30V

0.05

0.2

3.3VL

IN

PGOOD Output

V

PGOOD Voltage Low

I

= 2mA

= 5V

0.1

0.3

V

PGL

PGOOD

I

PGOOD Leakage Current

PGOOD Trip Level, Either Controller

V

±1

µA

PGOOD

V

with Respect to Set Output Voltage

PG

OSENSE

V

Ramping Negative

Ramping Positive

–6

6

–7.5

7.5

–9.5

9.5

%

OSENSE

Aux Output

AUXV

AUX Minimum Operating Voltage

AUX Regulated Feedback Voltage

AUX Feedback Pin Bias Current

●

2.4

1.26

120

2.6

1.28

360

V

INMIN

FB

1.23

AUXI

nA

FB

AUX Input DC Supply Current

Normal Mode

Shutdown

Q

V

= 2.4V, Not Switching

= 0V

4

0.01

mA

µA

AUXSD

1

AUXV

AUX Line Regulation

2.6V ≤ AUXV ≤ 16V

0.01

1.2

0.05

1.6

%/V

MHz

%

LINEREG

IN

AUXf

AUX Oscillator Frequency

AUX Oscillator Maximum Duty Cycle

AUX Switch Current Limit

AUX Switch Saturation Voltage

AUX Switch Leakage Current

●

0.8

84

1

OSC

AUXDC

86

MAX

AUXI

(Note 9)

1.4

2

550

1

A

LIMIT

AUXV

I

= 900mA (Note 10)

= 5V

330

0.01

mV

µA

CESAT

SW

AUXI

V

SW

LEAKAGE

AUXV

AUX Shutdown Input Voltage

AUX Shutdown Upper Trip Point

AUX Shutdown Lower Trip Point

AUXSD

2.4

V

0.5

I

AUXSD Pin Bias Current

AUXSD

V

= 3V

= 0V

16

0.01

32

0.1

µA

AUXSD

Note 1: Absolute Maximum Ratings are those values beyond which the life

of a device may be impaired.

Note 5: Dynamic supply current is higher due to the gate charge being

delivered at the switching frequency. See Applications Information.

Note 2: The LTC1876E is guaranteed to meet performance specifications

from 0°C to 70°C. Specifications over the –40°C to 85°C operating

temperature range are assured by design, characterization and correlation

with statistical process controls.

Note 6: Rise and fall times are measured using 10% and 90% levels.

Delay times are measured using 50% levels.

Note 7: The minimum on-time condition is specified for an inductor peak-

to-peak ripple current ≥40% of I

(see Minimum On-Time

MAX

Note 3: T is calculated from the ambient temperature T and power

Considerations in the Applications Information section).

J

A

dissipation P according to the following formulas:

D

Note 8: V pin internally tied to 1.19V reference through a large

FREQSET

LTC1876EG: T = T + (P • 95°C/W)

resistance.

J

A

D

Note 4: The LTC1876 is tested in a feedback loop that servos V

to a

Note 9: Current limit guaranteed by design and/or correlation to static test.

Note 10: 100% tested at wafer level.

ITH1, 2

specified voltage and measures the resultant V

OSENSE1, 2.

1876fa

4

LTC1876

U W

TYPICAL PERFOR A CE CHARACTERISTICS

Efficiency vs Output Current

(Figure 1)

Efficiency vs Input Voltage

(Figure 1)

Efficiency vs Output Current and

Mode (Figure 1)

100

90

80

70

60

50

40

30

20

10

0

100

90

80

70

60

50

100

90

80

70

60

50

V

= 5V

V

I

= 5V

= 3A

Burst Mode

OPERATION

OUT

V

= 7V

IN

V

= 10V

IN

FORCED

CONTINUOUS

MODE

V

= 15V

IN

V

= 20V

IN

CONSTANT

FREQUENCY

(BURST DISABLE)

V

= 15V

OUT

IN

= 5V

0.001

0.01

0.1

1

10

0.001

0.01

0.1

1

5

15

25

35

10

OUTPUT CURRENT (A)

INPUT VOLTAGE (V)

1876 G01

1876 G02

1876 G03

V_INSupply Current vs Input

Voltage and Mode (Figure 1)

INTV_CCand EXTV_CCSwitch

Voltage vs Temperature

EXTV_CCVoltage Drop

1000

800

600

400

200

0

5.05

5.00

4.95

4.90

4.85

4.80

4.75

4.70

250

INTV VOLTAGE

CC

200

150

100

50

BOTH

CONTROLLERS ON

EXTV SWITCHOVER THRESHOLD

CC

STANDBY

SHUTDOWN

0

5

10

15

20

25

30

35

–50 –25

0

25

50

75

100 125

0

10

20

30

40

50

INPUT VOLTAGE (V)

TEMPERATURE (°C)

CURRENT (mA)

1876 G04

1876 G06

1876 G05

Maximum Current Sense

Threshold vs Percent of Nominal

Output Voltage (Foldback)

Maximum Current Sense

Threshold vs Duty Factor

Internal 5V LDO Line Regulation

5.1

5.0

80

70

60

50

40

30

20

10

0

75

50

25

0

I

= 1mA

LOAD

4.9

4.8

4.7

4.6

4.5

4.4

20

INPUT VOLTAGE (V)

30

35

0

5

10

15

25

50

0

25

75

100

0

20

40

60

80

100

PERCENT ON NOMINAL OUTPUT VOLTAGE (%)

DUTY FACTOR (%)

1876 G07

1876 G09

1876 G08

1876fa

5

LTC1876

U W

TYPICAL PERFOR A CE CHARACTERISTICS

Maximum Current Sense

Threshold vs Sense Common

Mode Voltage

Maximum Current Sense

Threshold vs V_RUN/SS(Soft-Start)

Current Sense Threshold

vs I_THVoltage

80

60

40

20

80

76

72

68

64

60

90

80

V

= 1.6V

SENSE(CM)

70

60

50

40

30

20

10

0

–10

–20

–30

0

1

2

3

4

5

6

0

1

2

3

4

5

0

0.5

1

1.5

(V)

2

2.5

V

(V)

RUN/SS

COMMON MODE VOLTAGE (V)

V

ITH

1876 G10

1876 G11

1876 G12

V_ITHvs V_RUN/SS

Load Regulation (Controller)

SENSE Pins Total Source Current

0.0

–0.1

–0.2

–0.3

–0.4

2.5

2.0

1.5

1.0

100

50

V

= 0.7V

FCB = 0V

= 15V

OSENSE

V

IN

FIGURE 1

0

–50

–100

0.5

0

1

2

3

4

5

0

2

3

4

5

6

0

2

4

6

1

V

(V)

LOAD CURRENT (A)

V

COMMON MODE VOLTAGE (V)

RUN/SS

SENSE

1876 G13

1876 G14

1876 G15

Maximum Current Sense

Threshold vs Temperature

Current Sense Pin Input Current

vs Temperature

RUN/SS Current vs Temperature

1.8

1.6

1.4

1.2

1.0

0.8

0.6

0.4

0.2

80

78

76

74

72

70

35

33

31

29

27

25

V

= 5V

OUT

0

–50 –25

0

25

125

–50 –25

0

25

50

75 100 125

50

75 100

–50 –25

0

25

50

75 100 125

TEMPERATURE (°C)

1876 G18

1876 G16

1876 G17

1876fa

6

LTC1876

U W

TYPICAL PERFOR A CE CHARACTERISTICS

Undervoltage Lockout vs

Temperature (Controller)

EXTV_CCand Switch Resistance vs

Temperature

Oscillator Frequency vs

Temperature (Controller)

10

8

350

300

3.50

3.45

3.40

3.35

V

= 5V

FREQSET

250

200

150

100

50

V

= OPEN

= 0V

FREQSET

6

V

FREQSET

4

3.30

3.25

3.20

2

0

–50 –25

0

25

50

75 100 125

–50 –25

0

25

50

75

100 125

–50 –25

0

25

50

75

100 125

TEMPERATURE (°C)

1876 G19

1876 G20

1876 G21

Shutdown Latch Thresholds vs

Temperature

Quiescent Current for Auxillary

Regulator

Shutdown Pin Current (I_AUXVFB

)

4.5

4.0

3.5

3.0

2.5

2.0

1.5

1.0

0.5

4.6

4.5

40

35

30

25

V

= 1.3V

FB

NOT SWITCHING

LATCH ARMING

4.4

4.3

4.2

T

= 25°C

A

LATCHOFF

THRESHOLD

T

= 100°C

A

20

15

4.1

4.0

V

= 5V

V

IN

= 3.3V

IN

3.9

3.8

3.7

3.6

10

5

0

–50 –25

0

25

125

0

1

2

4

5

6

–50

50

0

TEMPERATURE (°C)

100

50

75 100

3

TEMPERATURE (°C)

SHUTDOWN PIN VOLTAGE (V)

1876 G22

1876 G23

1876 G24

Auxillary Regulator Switch

Oscillator Frequency

Current Limit for Auxillary

Regulator

Feedback Pin Voltage (AUXV_FB

)

1.28

1.27

1.26

1.25

1.24

1.23

1.22

1.35

1.30

1.25

1.20

1.15

1.10

1.05

1.6

1.4

1.2

1.0

0.8

0.6

0.4

0.2

0

–50

0

25

50

75

100

–50 –30 –10 10 30 50 70 90 110

–25

50 60

10 20 30 40

DUTY CYCLE (%)

70 80 90

TEMPERATURE (°C)

1876 G25

1876 G28

1876 G26

1876fa

7

LTC1876

U W

TYPICAL PERFOR A CE CHARACTERISTICS

Input Source/Capacitor

Instantaneous Current (Figure 1)

Load Step (Figure 1)

I_IN

2A/DIV

V_OUT

200mV/DIV

V_OUT

200mV/DIV

V_IN

200mV/DIV

V_SW1

10V/DIV

I_OUT

2A/DIV

I_OUT

2A/DIV

V_SW2

10V/DIV

1876 G31

1876 G30

V

_IN= 15V

V_OUT= 5V

_OUT5= I_OUT3.3= 2A

1µs/DIV

V_IN= 15V

_OUT= 5V

LOAD STEP = 0A TO 3A

Burst Mode OPERATION

20µs/DIV

V_OUT= 5V

V

I

LOAD STEP = 0A TO 3A

CONTINUOUS MODE

Constant Frequency (Burst

Inhibit) Operation (Figure 1)

Burst Mode Operation (Figure 1)

V_OUT

20mV/DIV

V_OUT

20mV/DIV

I_OUT

0.5A/DIV

I_OUT

0.5A/DIV

1876 G32

1876 G33

V_IN= 15V

10µs/DIV

V_IN= 15V

V_OUT= 5V

V_FCB= 5V

2µs/DIV

V_OUT= 5V

V_FCB= OPEN

I_OUT= 20mA

U

PIN FUNCTIONS

RUN/SS1,RUN/SS2(Pins1,23):CombinationofSoft-Start,

Run Control Inputs and Short-Circuit Detection Timers. A

capacitor to ground at each of these pins sets the ramp time

to full output current. Forcing either of these pins back below

1V causes the IC to shut down the circuitry required for that

particular controller. Latchoff overcurrent protection is also

invoked via this pin as described in the Applications Informa-

tion section.

SENSE1⁺, SENSE2⁺(Pins 2, 14): The (+) Input to each

Differential Current Comparator. The I_THpin voltage and

controlled offsets between the SENSE^–and SENSE⁺pins in

conjunction with R_SENSEset the current trip threshold.

SENSE1^–, SENSE2^–(Pins 3, 13): The (–) Input to the

Differential Current Comparators.

V_OSENSE1, V_OSENSE2(Pins 4, 12): Receives the remotely-

sensed feedback voltage for each controller from an external

resistive divider across the output.

FREQSET (Pin 5): Frequency Control Input to the Oscillator.

This pin can be left open, tied to ground, tied to INTV_CCor

drivenbyanexternalvoltagesource.Thispincanalsobeused

with an external phase detector to build a true phase-locked

loop.

STBYMD (Pin 6): Control pin that determines which circuitry

remains active when the controllers are shut down and/or

1876fa

8

LTC1876

U

PIN FUNCTIONS

provides a common control point to shut down both control-

lers. See the Operation section for details.

TG1, TG2 (Pins 35, 24): High Current Gate Drives for Top

N-Channel MOSFETs. These are the outputs of floating

drivers with a voltage swing equal to INTV_CC– 0.5V superim-

posed on the switch node voltage SW.

FCB(Pin7):ForcedContinuousControlInput.Thisinputacts

on both controllers and is normally used to regulate a

secondary winding. Pulling this pin below 0.8V will force

continuous synchronous operation on both controllers. Do

not leave this pin floating.

SW1, SW2 (Pins 34, 25): Switch Node Connections to

Inductors. Voltage swing at these pins is from a Schottky

diode (external) voltage drop below ground to V_IN.

I

_TH1,I_TH2(Pins 8, 11): Error Amplifier Output and Switching

BOOST1, BOOST2 (Pins 33, 26): Bootstrapped Supplies to

the Top Side Floating Drivers. Capacitors are connected

between the boost and switch pins and Schottky diodes are

tied between the boost and INTV_CCpins. Voltage swing at the

boost pins is from INTV_CCto (V_IN+ INTV_CC).

Regulator Compensation Point. Each associated channel’s

current comparator trip point increases with this control

voltage.

SGND(Pin9):Smallsignalgroundcommontobothcontrol-

lers, must be routed separately from high current grounds to

the common (–) terminals of the C_OUTcapacitors.

BG1,BG2(Pins31,27):HighCurrentGateDrivesforBottom

(synchronous) N-Channel MOSFETs. Voltage swing at these

pins is from ground to INTV_CC.

3.3V_OUT(Pin 10): Output of a linear regulator capable of

supplying up to 10mA DC with peak currents as high as

50mA.

PGND (Pin 28): Driver Power Ground. Connects to sources

of bottom (synchronous) N-channel MOSFETs, anode of the

Schottky rectifier and the (–) terminal(s) of C_IN.

AUXSGND (Pin 15): Small Signal Ground of the Auxiliary

Boost Regulator.

INTV_CC(Pin 29): Output of the Internal 5V Linear Low

Dropout Regulator and the EXTV_CCSwitch. The driver and

control circuits are powered from this voltage source. Must

be decoupled to power ground with a minimum of 4.7µF

tantalum or other, low ESR capacitor. The INTV_CCregulator

standby operation is determined by the STBYMD pin.

AUXV_FB(Pin 16): Auxiliary Boost Regulator Feedback Volt-

age. This pin receives the feedback voltage from an external

resistive divider across the auxiliary output.

AUXSW(Pins17, 18):SwitchNodeConnectionstoInductor

for the Auxiliary Regulator. Voltage swing at these pins are

from ground to (V_OUT+ voltage across Shottky diode).

Minimize trace area at these pins to keep EMI down.

EXTV_CC(Pin 30): External Power Input to an Internal Switch

Connected to INTV_CC. This switch closes and supplies V_CC

power, bypassing the internal low dropout regulator, when-

ever EXTV_CCis higher than 4.7V. See EXTV_CCconnection in

Applications section. Do not exceed 7V on this pin.

AUXPGND (Pins 19, 20): The Auxiliary Power Ground Pins.

Its gate drive currents are returned to these pin.

AUXV_IN(Pin 21): Auxiliary Boost Regulator Controller Sup-

ply Pin. Must be closely decoupled to AUXPGND.

V_IN(Pin 32): Main Supply Pin. A bypass capacitor should be

tied between this pin and the signal ground pin.

AUXSD (Pin 22): Shutdown Pin for the Auxiliary Regulator.

Connect to 2.4V or more to enable the auxiliary regulator or

ground to shut the auxiliary regulator off.

PGOOD(Pin36):Open-DrainLogicOutput. PGOODispulled

togroundwhenthevoltageoneitherV_OSENSEpinisnotwithin

7.5% of its setpoint.

1876fa

9

LTC1876

U

U W

FUNCTIONAL DIAGRA

INTV

CC

V

IN

D

C

DUPLICATE FOR SECOND

CONTROLLER CHANNEL

B

1.19V

BOOST

TG

1M

FREQSET

B

DROP

OUT

DET

+

CLK1

TOP

BOT

C

IN

D

1

OSCILLATOR

CLK2

BOT

FCB

SW

TOP ON

S

Q

PGOOD

SWITCH

LOGIC

INTV

CC

R

RUN/SS1

BG

V

WINDOW

COMPARATOR

OSENSE1

OSENSE2

OUT

PGND

V

B

SEC

+

–

0.55V

V

OUT

–

+

4.5V

0.18µA

FCB

BINH

FCB

SHDN

R

SENSE

R6

+

–

INTV

CC

I1

I2

R5

+

–

+

–

+ +

–

+

–

SENSE

D

C

SEC

30k

3.3V

OUT

0.8V

3mV

+

–

V

REF

0.86V

4(V

–

)

FB

SLOPE

COMP

V

IN

45k

V

IN

2.4V

V

OSENSE

R2

V

FB

+

–

4.8V

–

+

5V

LDO

REG

EA

EXTV

CC

0.80V

0.86V

R1

OV

+

–

INTV

CC

5V

+

C

I

TH

1.2µA

INTERNAL

SUPPLY

SGND

SHDN

RST

RUN

SOFT

START

R

C

C2

6V

4(V

FB

)

STBYMD

RUN/SS

C

SS

BOOST

REGULATOR

AUXV

IN

AUXSD

L3

D5

EA

AUX

+

AUXV

OUT

A1

–

1.26V

REF

AUX

V

AUXSW

+

Q

R

S

–

C

+

C

OUTAUX

Q

AUXV

R

FB

+

–

Σ

R7

R8

1.2MHz

RAMP

GENERATOR

OSCILLATOR

OSC

AUX

AUXPGND

1876 FD/F02

Figure 2

1876fa

10

LTC1876

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OPERATIO (Refer to Functional Diagram)

Main Control Loop

AUX Regulator

The auxiliary boost regulator is completely independent

from other LTC1876 circuits. It can be operated even

though the LTC1876 step-down controllers are in shut-

down. Theoperationoftheboostregulatorissimilartothe

controllers. The oscillator, OSC_AUX, sets the R_Slatch and

turns on the monolithic power switch. A voltage propor-

tional to the switch current is added to a stabilizing ramp

andtheresultingsumisfedintothepositiveterminalofthe

PWM comparator, A1_AUX. When this voltage exceeds the

level at the negative input of A1_AUX, the SR latch is reset,

turningoffthepowerswitch.Thelevelatthenegativeinput

of A1_AUXis set by the error amplifier EA_AUXand is simply

an amplified version of the difference between the feed-

back voltage and the reference voltage. Hence the error

amplifier sets the correct peak current level to keep the

output in regulation. To protect the power switch from

excessive current, a 1A minimum limit is internally set.

When the switch reaches this limit, it will force the latch to

reset, turning it off. Applying a voltage less than 0.5V on

theshutdownpinwillputtheboostregulatorinshutdown.

The LTC1876 uses a constant frequency, current mode

scheme to provide excellent line and load regulation for all

its outputs. The step-down controllers have two of its

switch drivers operating at 180 degrees out of phase from

each other. During normal operation, each top MOSFET is

turnedonwhentheclockforthatchannelsetstheR_Slatch,

and turned off when the main current comparator, I1,

resets the R_Slatch. The peak inductor current at which I1

resets the R_Slatch is controlled by the voltage on the I_TH

pin, which is the output of each error amplifier EA. The

V

_OSENSEpin receives the voltage feedback signal, which is

compared to the internal reference voltage by the EA.

When the load current increases, it causes a slight de-

crease in V_OSENSErelative to the 0.8V reference, which in

turn causes the I_THvoltage to increase until the average

inductor current matches the new load current. After the

top MOSFET has turned off, the bottom MOSFET is turned

on until either the inductor current starts to reverse, as

indicatedbycurrentcomparatorI2, orthebeginningofthe

next cycle.

The top MOSFET drivers are biased from floating boot-

strap capacitor C_B, which normally is recharged during

each off cycle through an external diode when the top

MOSFET turns off. As V_INdecreases to a voltage close to

V_OUT, the loop may enter dropout and attempt to turn on

the top MOSFET continuously. The dropout detector de-

tects this and forces the top MOSFET off for about 500ns

every tenth cycle to allow C_Bto recharge.

Low Current Operation

TheFCBpinisamultifunctionpinprovidingtwofunctions:

1) to provide regulation for a secondary winding by

temporarily forcing continuous PWM operation on both

controllers; and 2) select between two modes of low

currentoperation.WhentheFCBpinvoltageisbelow0.8V,

the controller forces continuous PWM current operation.

In this mode, the top and bottom MOSFETs are alternately

turned on to maintain the output voltage independent of

direction of inductor current. When the FCB pin is below

V_INTVCC– 2V but greater than 0.8V, the controller enters

Burst Mode operation. Burst Mode operation sets a mini-

mum output current level before turning off the top switch

and turns off the synchronous MOSFET(s) when the

inductor current goes negative. This combination of re-

quirements will, at low currents, force the I_THpin below a

voltage threshold that will temporarily inhibit turn-on of

both output MOSFETs until the output voltage drops

slightly. Thereis60mVofhysteresisintheburstcompara-

tor B tied to the I_THpin. This hysteresis produces output

signals to the MOSFETs that turn them on for several

The main control loop is shut down by pulling the RUN/SS

pin low. Releasing RUN/SS allows an internal 1.2µA

current source to charge soft-start capacitor C_SS. When

C_SSreaches1.5V,themaincontrolloopisenabledwiththe

I_THvoltageclampedatapproximately30%ofitsmaximum

value. As C_SScontinues to charge, the I_THpin voltage is

gradually released allowing normal, full-current opera-

tion. When both RUN/SS1 and RUN/SS2 are low, all

LTC1876 controller functions are shut down, and the

STBYMD pin determines if the standby 5V and 3.3V

regulators are kept alive.

1876fa

11

LTC1876

U

OPERATIO (Refer to Functional Diagram)

cycles, followed by a variable “sleep” interval depending

upon the load current. The resultant output voltage ripple

is held to a very small value by having the hysteretic

comparator after the error amplifier gain block.

This allows the INTV_CCpower to be derived from a high

efficiency external source such as the output of the regu-

lator itself or a secondary winding, as described in Appli-

cations Information.

Constant Frequency Operation

Standby Mode Pin

When the FCB pin is tied to INTV_CC, Burst Mode operation

is disabled and the forced minimum output current re-

quirement is removed. This provides constant frequency,

discontinuous (preventing reverse inductor current) cur-

rent operation over the widest possible output current

range.Thisconstantfrequencyoperationisnotasefficient

as Burst Mode operation, but does provide a lower noise,

constant frequency operating mode down to approxi-

mately 1% of designed maximum output current.

The STBYMD pin is a three-state input that controls

common circuitry within the IC as follows: When the

STBYMD pin is held at ground, both controller RUN/SS

pins are pulled to ground providing a single control pin to

shut down both controllers. When the pin is left open, the

internal RUN/SS currents are enabled to charge the

RUN/SS capacitor(s), allowing the turn-on of either con-

troller and activating necessary common internal biasing.

When the STBYMD pin is taken above 2V, both internal

linear regulators are turned on independent of the state of

the two switching regulator controllers, providing output

power to “wake-up” other circuitry. Decouple the pin with

a small capacitor (0.01µF) to ground if the pin is not

connected to a DC potential.

Constant Current (PWM) Operation

Tying the FCB pin to ground will force continuous current

operation. This is the least efficient operating mode, but

may be desirable in certain applications. The output can

source or sink current in this mode. When sinking current

while in forced continuous operation, current will be

forced back into the main power supply potentially boost-

ing the input supply to dangerous voltage levels—

BEWARE!

Output Overvoltage Protection

An overvoltage comparator, OV, guards against transient

overshoots (>7.5%) as well as other more serious condi-

tions that may overvoltage the output. In this case, the top

MOSFETisturnedoffandthebottomMOSFETisturnedon

until the overvoltage condition is cleared.

Frequency Setting

The FREQSET pin provides frequency adjustment to the

controllers’internaloscillatorfromapproximately140kHz

to 310kHz. This input is nominally biased through an

internal resistor to the 1.19V reference, setting the oscil-

lator frequency to approximately 220kHz. This pin can be

driven from an external AC or DC signal source to control

theinstantaneousfrequencyoftheoscillator.Theauxillary

boost regulator operates at a constant 1.2MHz frequency.

Power Good (PGOOD) Pin

ThePGOODpinisconnectedtoanopendrainofaninternal

MOSFET.TheMOSFETturnsonandpullsthepinlowwhen

both the outputs are not within ±7.5% of their nominal

output levels as determined by their resistive feedback

dividers. When both controller outputs meet the ±7.5%

requirement,theMOSFETisturnedoffwithin10µsandthe

pin is allowed to be pulled up by an external resistor to a

source of up to 7V. The auxiliary regulator’s output is not

monitored.

INTV_CC/EXTV_CCPower

Power for the top and bottom MOSFET drivers and most

other internal circuitry is derived from the INTV_CCpin.

When the EXTV_CCpin is left open, an internal 5V low

dropoutlinearregulatorsuppliesINTV_CCpower.IfEXTV_CC

is taken above 4.7V, the 5V regulator is turned off and an

internalswitchisturnedonconnectingEXTV_CCtoINTV_CC.

Foldback Current, Short-Circuit Detection and Short-

Circuit Latchoff

TheRUN/SScapacitorsareusedinitiallytolimittheinrush

current of each step-down switching regulator. After the

1876fa

12

LTC1876

U

OPERATIO (Refer to Functional Diagram)

controller has been started and been given adequate time

to charge up the output capacitors and provide full-load

current, the RUN/SS capacitor is used as a short-circuit

time-outcircuit. Iftheoutputvoltagefallstolessthan70%

of its nominal output voltage, the RUN/SS capacitor be-

ginsdischargingontheassumptionthattheoutputisinan

overcurrentand/orshort-circuitcondition.Ifthecondition

lasts for a long enough period as determined by the size of

the RUN/SS capacitor, both controllers will be shut down

until the RUN/SS pin(s) voltage(s) are recycled. This built-

in latchoff can be overridden by providing a >5µA pull-up

at a compliance of 5V to the RUN/SS pin(s). This current

shortens the soft start period but also prevents net dis-

charge of the RUN/SS capacitor(s) during an overcurrent

and/orshort-circuitcondition. Foldbackcurrentlimitingis

also activated when the output voltage falls below 70% of

its nominal level whether or not the short-circuit latchoff

circuit is enabled. Even if a short is present and the short-

circuit latchoff is not enabled, a safe, low output current is

providedduetointernalcurrentfoldbackandactualpower

wasted is low due to the efficient nature of the current

mode switching regulator.

Why the need for 2-phase operation? In most dual con-

stant-frequency switching regulators, both regulators are

operated in phase (i.e., single-phase operation). This

means that both switches turned on at the same time,

causing current pulses of up to twice the amplitude of

those for one regulator to be drawn from the input capaci-

tor and battery. These large amplitude current pulses

increased the total RMS current flowing from the input

capacitor, requiring the use of more expensive input

capacitorsandincreasingbothEMIandlossesintheinput

capacitor and battery.

With 2-phase operation, the two channels of the dual-

switching regulator are operated 180 degrees out of

phase. This effectively interleaves the current pulses

coming from the switches, greatly reducing the overlap

time where they add together. The result is a significant

reduction in total RMS input current, which in turn allows

lessexpensiveinputcapacitorstobeused,reducesshield-

ing requirements for EMI and improves real world operat-

ing efficiency.

Figure 3 compares the input waveforms for a representa-

tive single-phase dual switching regulator to the LTC1876

2-phase dual switching regulator. An actual measurement

of the RMS input current under these conditions shows

that 2-phase operation dropped the input current from

2.53A_RMSto 1.55A_RMS. While this is an impressive reduc-

tion in itself, remember that the power losses are propor-

tional to I_RMS², meaning that the actual power wasted is

reduced by a factor of 2.66. The reduced input ripple

voltage also means less power is lost in the input power

Theory and Benefits of 2-Phase Operation

The LTC1876 dual high efficiency DC/DC controller brings

the considerable benefits of 2-phase operation to portable

applicationsforthefirsttime.Notebookcomputers,PDAs,

handheld terminals and automotive electronics will all

benefitfromthelowerinputfilteringrequirement, reduced

electromagnetic interference (EMI) and increased effi-

ciency associated with 2-phase operation.

5V SWITCH

20V/DIV

5V SWITCH

20V/DIV

3.3V SWITCH

20V/DIV

3.3V SWITCH

20V/DIV

INPUT CURRENT

5A/DIV

INPUT CURRENT

5A/DIV

INPUT VOLTAGE

500mV/DIV

INPUT VOLTAGE

500mV/DIV

1876 F03b

1876 F03a

I_IN(MEAS)= 1.55A_RMS

I_IN(MEAS)= 2.53A_RMS

(b) 2-Phase

(a) Single-Phase

Figure 3. Input Waveforms Comparing Single-Phase (a) and 2-Phase (b) Operation for Dual Switching Regulators

Converting 12V to 5V and 3.3V at 3A Each. The Reduced Input Ripple with the LTC1876 2-Phase Regulator Allows

Less Expensive Input Capacitors, Reduces Shielding Requirements for EMI and Improves Efficiency

1876fa

13

LTC1876

U

OPERATIO

(Refer to Functional Diagram)

path, which could include batteries, switches, trace/con-

nectorresistancesandprotectioncircuitry.Improvements

inbothconductedandradiatedEMIalsodirectlyaccrueas

a result of the reduced RMS input current and voltage.

theinputcapacitorrequirementtothatforjustonechannel

operating at maximum current and 50% duty cycle.

3.0

SINGLE PHASE

DUAL CONTROLLER

2.5

2.0

1.5

1.0

0.5

0

Of course, the improvement afforded by 2-phase opera-

tion is a function of the dual switching regulator’s relative

duty cycles which, in turn, are dependent upon the input

voltage V_IN(Duty Cycle = V_OUT/V_IN). Figure 4 shows how

theRMSinputcurrentvariesforsingle-phaseand2-phase

operation for 3.3V and 5V regulators over a wide input

voltage range.

2-PHASE

DUAL CONTROLLER

V

= 5V/3A

O1

O2

= 3.3V/3A

It can readily be seen that the advantages of 2-phase

operation are not just limited to a narrow operating range,

but in fact extend over a wide region. A good rule of thumb

for most applications is that 2-phase operation will reduce

0

10

20

30

40

INPUT VOLTAGE (V)

1876 F04

Figure 4. RMS Input Current Comparison

U

W U U

APPLICATIO S I FOR ATIO

Figure 1 on the first page is a basic LTC1876 application

circuit. For the step-down regulators, the external compo-

nent selection is driven by the load requirement, and

begins with the selection of R_SENSE. Once R_SENSEis

known,Lcanbechosen.Next,thepowerMOSFETsandD1

areselected. Finally, C_INandC_OUTareselected. Thecircuit

shown in Figure 1 can be configured for operation up to an

input voltage of 28V (limited by the external MOSFETs).

Forthestep-upregulator,itscomponentselectionismuch

simpler. A 4.7µH or 10µH inductor that can handle at least

1A without saturating will work well with most design. A

Shottky diode is recommended and a MBR0520 from ON

Semiconductor is a very good choice.

Allowing a margin for variations in the LTC1876 and

external component values yields:

50mV

I_MAX

R_SENSE

=

2.5

2.0

1.5

1.0

0.5

0

R_SENSESelection For Output Current

R_SENSEis chosen based on the required output current.

The LTC1876 current comparator has a maximum thresh-

old of 75mV/R_SENSEand an input common mode range of

SGND to 1.1(INTV_CC). The current comparator threshold

sets the peak of the inductor current, yielding a maximum

average output current I_MAXequal to the peak value less

half the peak-to-peak ripple current, ∆I_L.

120

170

220

270

320

OPERATING FREQUENCY (kHz)

1876 F05

Figure 5. FREQSET Pin Voltage vs Frequency

1876fa

14

LTC1876

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APPLICATIO S I FOR ATIO

Selection of Operating Frequency

operation, lower inductance values will cause the burst

frequency to decrease.

The LTC1876 uses a constant frequency architecture with

the frequency determined by an internal oscillator

capacitor. This internal capacitor is charged by a fixed

current plus an additional current that is proportional to

the voltage applied to the FREQSET pin.

Inductor Core Selection

Once the value for L is known, the type of inductor must be

selected. High efficiency converters generally cannot af-

ford the core loss found in low cost powdered iron cores,

forcing the use of more expensive ferrite, molypermalloy,

or Kool Mµ^®cores. Actual core loss is independent of core

size for a fixed inductor value, but it is very dependent on

inductance selected. As inductance increases, core losses

go down. Unfortunately, increased inductance requires

more turns of wire and therefore copper losses will in-

crease.

A graph for the voltage applied to the FREQSET pin vs

frequency is given in Figure 5. As the operating frequency

isincreasedthegatechargelosseswillbehigher,reducing

efficiency (see Efficiency Considerations). The maximum

switching frequency is approximately 310kHz.

Inductor Value Calculation

The operating frequency and inductor selection are inter-

related in that higher operating frequencies allow the use

of smaller inductor and capacitor values. So why would

anyone ever choose to operate at lower frequencies with

larger components? The answer is efficiency. A higher

frequency generally results in lower efficiency because of

MOSFET gate charge losses. In addition to this basic

trade-off, the effect of inductor value on ripple current and

low current operation must also be considered.

Ferrite designs have very low core loss and are preferred

at high switching frequencies, so design goals can con-

centrate on copper loss and preventing saturation. Ferrite

core material saturates “hard,” which means that induc-

tance collapses abruptly when the peak design current is

exceeded. This results in an abrupt increase in inductor

ripple current and consequent output voltage ripple. Do

not allow the core to saturate!

Molypermalloy (from Magnetics, Inc.) is a very good, low

losscorematerialfortoroids,butitismoreexpensivethan

ferrite. A reasonable compromise from the same manu-

facturer is Kool Mµ. Toroids are very space efficient,

especially when you can use several layers of wire. Be-

cause they generally lack a bobbin, mounting is more

difficult. However, designsforsurfacemountareavailable

that do not increase the height significantly.

Theinductorvaluehasadirecteffectonripplecurrent.The

inductor ripple current ∆I_Ldecreases with higher induc-

tance or frequency and increases with higher V_INor V_OUT

:

1

(f)(L)

V_OUT

V

IN

∆I_L=

V_OUT1–

Accepting larger values of ∆I_Lallows the use of low

inductances, but results in higher output voltage ripple

and greater core losses. A reasonable starting point for

setting ripple current is ∆I_L=0.3(I_MAX). Remember, the

maximum ∆I_Loccurs at the maximum input voltage.

Power MOSFET and D1 Selection

Two external power MOSFETs must be selected for each

controller with the LTC1876: One N-channel MOSFET for

the top (main) switch, and one N-channel MOSFET for the

bottom (synchronous) switch.

The inductor value also has secondary effects. The transi-

tion to Burst Mode operation begins when the average

inductor current required results in a peak current below

25% of the current limit determined by R_SENSE. Lower

inductor values (higher ∆I_L) will cause this to occur at

lower load currents, which can cause a dip in efficiency in

the upper range of low current operation. In Burst Mode

The peak-to-peak drive levels are set by the INTV_CCvolt-

age. This voltage is typically 5V during start-up (see

EXTV_CCPinConnection).Consequently,logic-levelthresh-

old MOSFETs must be used in most applications. The only

exception is if low input voltage is expected (V_IN< 5V);

Kool Mµ is a registered trademark of Magnetics, Inc.

1876fa

15

LTC1876

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W U U

APPLICATIO S I FOR ATIO

then, sub-logic level threshold MOSFETs (V_GS(TH)< 3V)

should be used. Pay close attention to the BV_DSSspecifi-

cation for the MOSFETs as well; most of the logic level

MOSFETs are limited to 30V or less.

The term (1 + δ) is generally given for a MOSFET in the

form of a normalized R_DS(ON)vs temperature curve, but

δ = 0.005/°C can be used as an approximation for low

voltage MOSFETs. C_RSSis usually specified in the MOS-

FET characteristics. The constant k = 1.7 can be used to

estimate the contributions of the two terms in the main

switch dissipation equation.

SelectioncriteriaforthepowerMOSFETsincludethe“ON”

resistance R_DS(ON), reverse transfer capacitance C_RSS

,

input voltage and maximum output current. When the

LTC1876 is operating in continuous mode the duty cycles

for the top and bottom MOSFETs are given by:

The Schottky diode D1 shown in Figure 1 conducts during

the dead-time between the conduction of the two power

MOSFETs. This prevents the body diode of the bottom

MOSFET from turning on, storing charge during the dead-

time and requiring a reverse recovery period that could

cost as much as 3% in efficiency at high V_IN. A 1A to 3A

Schottky is generally a good compromise for both regions

of operation due to the relatively small average current.

Larger diodes result in additional transition losses due to

their larger junction capacitance.

V_OUT

V

IN

Main SwitchDuty Cycle =

V – V_OUT

IN

Synchronous SwitchDuty Cycle =

V

IN

The MOSFET power dissipations at maximum output

current are given by:

C_INSelection

The selection of C_INis simplified by the multiphase archi-

tecture and its impact on the worst-case RMS current

drawnthroughtheinputnetwork(battery/fuse/capacitor).

It can be shown that the worst case RMS current occurs

when only one controller is operating. The controller with

the highest (V_OUT)(I_OUT) product needs to be used in the

formula below to determine the maximum RMS current

requirement. Increasing the output current, drawn from

the other out-of-phase controller, will actually decrease

the RMS ripple current from this maximum value (see

Figure 4). The out-of-phase technique typically reduces

theinputcapacitor’sRMSripplecurrentbyafactorof30%

to 70% when compared to a single phase power supply

solution.

2

) (

V_OUT

P_MAIN

=

I_MAX1+ δ R_DS(ON)

+

(

)

V

IN

2

k V

I_MAXC_RSS

f

(

^IN) (

)(

)( )

2

) (

V – V_OUT

IN

P

SYNC

=

I_MAX1+ δ R_DS(ON)

(

)

V

IN

where δ is the temperature dependency of R_DS(ON)and k

is a constant inversely related to the gate drive current.

BothMOSFETshaveI²RlosseswhilethetopsideN-channel

equation includes an additional term for transition losses,

which are highest at high input voltages. For V_IN< 20V the

high current efficiency generally improves with larger

MOSFETs, while for V_IN> 20V the transition losses rapidly

increasetothepointthattheuseofahigherR_DS(ON)device

with lower C_RSSactually provides higher efficiency. The

synchronous MOSFET losses are greatest at high input

voltage when the top switch duty factor is low or during a

short-circuit when the synchronous switch is on close to

100% of the period.

The type of input capacitor, value and ESR rating have

efficiency effects that need to be considered in the selec-

tion process. The capacitance value chosen should be

sufficient to store adequate charge to keep high peak

battery currents down. 20µF to 40µF is usually sufficient

for a 25W output supply operating at 200kHz. The ESR of

the capacitor is important for capacitor power dissipation

as well as overall battery efficiency. All of the power (RMS

ripple current • ESR) not only heats up the capacitor but

wastes power from the battery.

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Medium voltage (20V to 35V) ceramic, tantalum, OS-CON

and switcher-rated electrolytic capacitors can be used as

inputcapacitors,buteachhasdrawbacks:ceramicvoltage

coefficients are very high and may have audible piezoelec-

tric effects; tantalums need to be surge-rated; OS-CONs

suffer from higher inductance, larger case size and limited

surface-mount applicability; electrolytics’ higher ESR and

dryout possibility require several to be used. Multiphase

systems allow the lowest amount of capacitance overall.

As little as one 22µF or two to three 10µF ceramic capaci-

tors are an ideal choice in a 20W to 35W power supply due

to their extremely low ESR. Even though the capacitance

at 20V is substantially below their rating at zero-bias, very

low ESR loss makes ceramics an ideal candidate for

highest efficiency battery operated systems. Also con-

sider parallel ceramic and high quality electrolytic capaci-

tors as an effective means of achieving ESR and bulk

capacitance goals.

controllers are operating due to the reduced overlap of

currentpulsesrequiredthroughtheinputcapacitor’sESR.

This is why the input capacitor’s requirement calculated

above for the worst-case controller is adequate for the

dual controller design. Remember that protection fuse

resistance, battery resistance and PC board trace resis-

tance losses are also reduced due to the reduced peak

currents in a multiphase system. The overall benefit of a

multiphase design will only be fully realized when the

source impedance of the power supply/battery is included

intheefficiencytesting.ThedrainsofthetwotopMOSFETS

should be placed within 1cm of each other and share a

common C_IN(s). Separating the drains and C_INmay pro-

duce undesirable voltage and current resonances at V_IN.

For the boost regulator, the ripple requirement for the

input capacitor is less stringent. If the supply to the

regulator is obtained from one of the LTC1876 step-down

outputs, a 1µF to 4.7µF ceramic capacitor is sufficient.

However, ifthestep-downoutputiswithincloseproximity

(< 1cm) to the boost supply input, there is no need for the

capacitor.

Incontinuousmode, thesourcecurrentofthetopN-chan-

nel MOSFET is a square wave of duty cycle V_OUT/V_IN. To

preventlargevoltagetransients, alowESRinputcapacitor

sized for the maximum RMS current of one channel must

beused. ThemaximumRMScapacitorcurrentisgivenby:

C_OUTSelection

The selection of C_OUTis driven by the required effective

series resistance (ESR). Typically once the ESR require-

ment is satisfied the capacitance is adequate for filtering.

For the step-down regulators, the output ripple (∆V_OUT) is

determined by:

1/2

]

V_OUTV − V_OUT

(

IN

)

[

C_INRequired I_RMS≈ I_MAX

V

IN

This formula has a maximum at V_IN= 2V_OUT, where

I_RMS= I_OUT/2. This simple worst case condition is com-

monlyusedfordesignbecauseevensignificantdeviations

donotoffermuchrelief.Notethatcapacitormanufacturer’s

ripple current ratings are often based on only 2000 hours

of life. This makes it advisable to further derate the

capacitor, or to choose a capacitor rated at a higher

temperaturethanrequired.Severalcapacitorsmayalsobe

paralleled to meet size or height requirements in the

design. Always consult the manufacturer if there is any

question.

1

∆V_OUT≈ ∆I_LESR +

8fC_OUT

Wheref=operatingfrequency,C_OUT=outputcapacitance,

and ∆_L= ripple current in the inductor. The output ripple is

highest at maximum input voltage since ∆I_Lincreases

with input voltage. With ∆I_L= 0.4I_OUT(MAX)the output

ripple will typically be less than 50mV at max V_INassum-

ing:

C

_OUTRecommended ESR < 2 R_SENSE

The benefit of the LTC1876 multiphase controllers can be

calculated by using the equation above for the higher

power controller and then calculating the loss that would

have resulted if both controller channels switch on at the

same time. The total RMS power lost is lower when both

and C_OUT> 1/(8fR_SENSE

)

ThefirstconditionrelatestotheripplecurrentintotheESR

of the output capacitance while the second term guaran-

tees that the output capacitance does not significantly

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discharge during the operating frequency period due to

ripple current. The choice of using smaller output capaci-

tance increases the ripple voltage due to the discharging

term but can be compensated for by using capacitors of

very low ESR to maintain the ripple voltage at or below

50mV. The I_THpin OPTI-LOOP compensation compo-

nents can be optimized to provide stable, high perfor-

mance transient response regardless of the output

capacitors selected.

KEMET T510 series of surface mount tantalums, available

in case heights ranging from 2mm to 4mm. Aluminum

electrolytic capacitors can be used in cost-driven applica-

tionsprovidingthatconsiderationisgiventoripplecurrent

ratings, temperature and long term reliability. A typical

application will require several to many aluminum electro-

lytic capacitors in parallel. A combination of the above

mentioned capacitors will often result in maximizing per-

formance and minimizing overall cost. Other capacitor

types include Nichicon PL series, NEC Neocap, Pansonic

SP and Sprague 595D series. For high value of ceramic

capacitors, Taiyo Yuden has a series of them. Select the

X5R or X7R series as these retain the capacitance over

wide voltage and temperature range. Consult manufactur-

ers for other specific recommendations.

For the boost regulator, the output ripple (∆V_OUT) is

determined by:

1.5I_OUT

∆V_OUT≈ I_PKESR +

fC_OUT

Since the boost regulator is operating at high frequency,

the second term will be small even with a small value of

C_OUT. Hence, all efforts can be concentrated on finding a

lowESRcapacitor.Aceramiccapacitorcanbeusedforthe

output capacitor.

INTV_CCRegulator

An internal P-channel low dropout regulator produces 5V

at the INTV_CCpin from the V_INsupply pin. INTV_CCpowers

the drivers and internal circuitry within the LTC1876 step-

down controllers. The INTV_CCpin regulator can supply a

peak current of 50mA and must be bypassed to ground

with a minimum of 4.7µF tantalum, 10µF special polymer,

or low ESR type electrolytic capacitor. A 1µF ceramic

capacitorplaceddirectlyadjacenttotheINTV_CCandPGND

IC pins is highly recommended. Good bypassing is neces-

sary to supply the high transient currents required by the

MOSFET gate drivers and to prevent interaction between

channels.

Manufacturers such as Nichicon, United Chemicon and

Sanyo can be considered for high performance through-

hole capacitors. The OS-CON semiconductor dielectric

capacitoravailablefromSanyohasthelowest(ESR)(size)

product of any aluminum electrolytic at a somewhat

higher price. An additional ceramic capacitor in parallel

with OS-CON capacitors is recommended to reduce the

inductance effects.

In surface mount applications multiple capacitors may

need to be used in parallel to meet the ESR, RMS current

handling and load step requirements of the application.

Aluminum electrolytic, dry tantalum and special polymer

capacitors are available in surface mount packages. Spe-

cial polymer surface mount capacitors offer very low ESR

buthavelowerstoragecapacityperunitvolumethanother

capacitor types. These capacitors offer a very cost-effec-

tiveoutputcapacitorsolutionandareanidealchoicewhen

combined with a controller having high loop bandwidth.

Tantalum capacitors offer the highest capacitance density

and are often used as output capacitors for switching

regulators having controlled soft-start. Several excellent

surge-tested choices are the AVX TPS, AVX TPSV or the

Higher input voltage applications in which large MOSFETs

are being driven at high frequencies may cause the maxi-

mum junction temperature rating for the LTC1876 to be

exceeded. The system supply current is normally domi-

nated by the gate charge current. Additional external

loading of the INTV_CCand 3.3V linear regulators also

needs to be taken into account for the power dissipation

calculations. The total INTV_CCcurrent can be supplied by

either the 5V internal linear regulator or by the EXTV_CC

input pin. When the voltage applied to the EXTV_CCpin is

less than 4.7V, all of the INTV_CCcurrent is supplied by the

internal 5V linear regulator. Power dissipation for the IC in

this case is highest: (V_IN)(I_INTVCC), and overall efficiency

is lowered. The gate charge current is dependent on

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operatingfrequencyasdiscussedintheEfficiencyConsid-

erations section. The junction temperature can be esti-

mated by using the equations given in Note 3 of the

Electrical Characteristics. For example, the LTC1876 V_IN

current is limited to less than 24mA from a 24V supply

when not using the EXTV_CCpin as follows:

The following list summarizes the four possible connec-

tions for EXTV_CC. Make sure the voltage applied to the

EXTV_CCdoes not exceed 7V.

1. EXTV_CCLeftOpen(orGrounded).ThiswillcauseINTV_CC

to be powered from the internal 5V regulator resulting in

an efficiency penalty of up to 10% at high input voltages.

T_J= 70°C + (24mA)(24V)(95°C/W) = 125°C

2. EXTV_CCConnected directly to V_OUT. This is the normal

connection for a 5V regulator and provides the highest

efficiency.

UseoftheEXTV_CCinputpinreducesthejunctiontempera-

ture to:

T_J= 70°C + (24mA)(5V)(95°C/W) = 81°C

3. EXTV_CCConnected to the output of the boost regulator.

If the LTC1876 auxillary boost regulator is set up for

output voltage between 4.7V and 7V, the EXTV_CCcan be

connected to this output.

Dissipation should be calculated and added for current

drawn from the internal 3.3V linear regulator. To prevent

maximum junction temperature from being exceeded, the

input supply current must be checked operating in con-

tinuous mode at maximum V_IN.

4. EXTV_CCConnected to an Output-Derived Boost Net-

work. For3.3Vandotherlowvoltageregulators, efficiency

gains can still be realized by connecting EXTV_CCto an

output-derived voltage that has been boosted to greater

than 4.7V. This can be done with either the inductive boost

winding as shown in Figure 6a or the capacitive charge

pump shown in Figure 6b. The charge pump has the

advantage of simple magnetics.

EXTV_CCConnection

The LTC1876 contains an internal P-channel MOSFET

switch connected between the EXTV_CCand INTV_CCpins.

When the voltage applied to EXTV_CCrises above 4.7V, the

internal regulator is turned off and the switch closes,

connecting the EXTV_CCpin to the INTV_CCpin thereby

supplying internal power. The switch remains closed as

longasthevoltageappliedtoEXTV_CCremainsabove4.5V.

This allows the MOSFET driver and control power to be

derived from the output during normal operation (4.7V <

V_OUT<7V)andfromtheinternalregulatorwhentheoutput

is out of regulation (start-up, short-circuit). If more cur-

rent is required through the EXTV_CCswitch than is speci-

fied, an external Schottky diode can be added between the

EXTV_CCand INTV_CCpins. Do not apply greater than 7V to

the EXTV_CCpin and ensure that EXTV_CC< V_IN.

5. EXTV_CCConnected to an External supply. If an external

supply is available in the 5V to 7V range, it may be used to

powerEXTV_CCprovidingitiscompatiblewiththeMOSFET

gate drive requirements.

V

IN

OPTIONAL EXTV

CONNECTION

CC

+

5V < V

< 7V

SEC

C

IN

V

SEC

IN

+

N-CH

LTC1876

1µF

TG1

SW

R

SENSE

Significant efficiency gains can be realized by powering

INTV_CCfrom the output, since the V_INcurrent resulting

from the driver and control currents will be scaled by a

factor of ((Duty Cycle)/efficiency). For 5V regulators this

V

OUT

T1

1:N

EXTV

CC

R6

R5

+

C

FCB

BG1

OUT

N-CH

supply means connecting the EXTV_CCpin directly to V_OUT

.

SGND

PGND

However, for 3.3V and other lower voltage regulators,

additional circuitry is required to derive INTV_CCpower

from the output.

1876 F06a

Figure 6a. Secondary Output Loop and EXTV_CCConnection

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+

the internal precision 0.8V voltage reference by the error

amplifier. The output voltage is given by the equation:

V

IN

1µF

+

C

IN

R2

R1

0.22µF

BAT85

V_OUT= 0.8V 1+

V

IN

N-CH

LTC1876

VN2222LL

TG1

SW

R

For the auxillary boost regulator, the resultant feedback

signal is compared with the internal precision 1.26V

voltage reference by the error amplifier. The output volt-

age is given by the equation:

SENSE

V

OUT

L1

EXTV

CC

+

C

BG1

OUT

N-CH

PGND

R8

R7

V_OUTAUX= 1.26V 1+

1876 F06b

SENSE⁺/SENSE^–Pins

Figure 6b. Capacitive Charge Pump for EXTV_CC

The common mode input range of the current comparator

SENSE pins is from 0V to (1.1)INTV_CC. Continuous linear

operation is guaranteed throughout this range allowing

output voltage setting from 0.8V to 7.7V, depending upon

the voltage applied to EXTV_CC. A differential NPN input

stageisbiasedwithinternalresistorsfromaninternal2.4V

source as shown in the Functional Diagram. This requires

that current either be sourced or sunk from the SENSE

pinsdependingontheoutputvoltage. Iftheoutputvoltage

is below 2.4V current will flow out of both SENSE pins to

the main output. The output can be easily preloaded by the

V_OUTresistive divider to compensate for the current

comparator’s negative input bias current. The maximum

current flowing out of each pair of SENSE pins is:

Topside MOSFET Driver Supply (C_B, D_B)

External bootstrap capacitors C_Bconnected to the BOOST

pins supply the gate drive voltages for the topside MOS-

FETs. Capacitor C_Bin the functional diagram is charged

though external diode D_Bfrom INTV_CCwhen the SW pin is

low. When one of the topside MOSFETs is to be turned on,

the driver places the C_Bvoltage across the gate-source of

the desired MOSFET. This enhances the MOSFET and

turns on the topside switch. The switch node voltage, SW,

rises to V_INand the BOOST pin follows. With the topside

MOSFET on, the boost voltage is above the input supply:

V_BOOST= V_IN+ V_INTVCC. The value of the boost capacitor

C_Bneedstobe100timesthatofthetotalinputcapacitance

of the topside MOSFET(s). The reverse breakdown of the

I_SENSE⁺+ I_SENSE^–= (2.4V – V_OUT)/24k

SinceV_OSENSEisservoedtothe0.8Vreferencevoltage, we

can choose R1 in Figure 2 to have a maximum value to

absorb this current.

external Schottky diode must be greater than V_IN(MAX)

.

When adjusting the gate drive level, the final arbiter is the

total input current for the regulator. If a change is made

and the input current decreases, then the efficiency has

improved. If there is no change in input current, then there

is no change in efficiency.

0.8V

2.4V – V_OUT

R1

= 24k

(MAX)

Output Voltage

for V_OUT< 2.4V

The LTC1876 output voltages are each set by an external

feedback resistive divider carefully placed across the

output capacitor as shown in Figure 2. For the step-down

controller, the resultant feedback signal is compared with

Regulating an output voltage of 1.8V, the minimum value

of R1 should be 32k. Note that for an output voltage above

2.4V, R1 has no maximum value since the SENSE pins

load the output.

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Soft-Start/Run Function

Fault Conditions: Overcurrent Latchoff

The RUN/SS1 and RUN/SS2 pins are multipurpose pins

that provide a soft-start function and a means to shut

down the LTC1876 step-down controllers. Soft-start re-

duces the input power source’s surge currents by gradu-

ally increasing the controller’s current limit (proportional

to V_ITH). This pin can also be used for power supply

sequencing.

The RUN/SS pins also provide the ability to latch off the

controller(s) when an overcurrent condition is detected.

The RUN/SS capacitor, C_SS, is used initially to turn on and

limit the inrush current of the controller. After the control-

ler has been started and been given adequate time to

charge up the output capacitor and provide full load

current, the RUN/SS capacitor is used for a short-circuit

timer. If the regulator’s output voltage falls to less than

70% of its nominal value after C_SSreaches 4.1V, C_SS

begins discharging on the assumption that the output is in

an overcurrent condition. If the condition lasts for a long

enoughperiodasdeterminedbythesizeoftheC_SSandthe

specified discharge current, the controller will be shut

down until the RUN/SS pin voltage is recycled. If the

overload occurs during start-up, the time can be approxi-

mated by:

An internal 1.2µA current source charges up the C_SS

capacitor_.When the voltage on RUN/SS1 (RUN/SS2)

reaches 1.5V, the particular controller is permitted to start

operating. As the voltage on RUN/SS increases from 1.3V

to 3.0V, the internal current limit is increased from 25mV/

R_SENSEto 75mV/R_SENSE. The output current limit ramps

up slowly, taking an additional 1.2s/µF to reach full cur-

rent. The output current thus ramps up slowly, reducing

the starting surge current required from the input power

supply. If RUN/SS has been pulled all the way to ground

there is a delay before starting of approximately:

T_LO1[C_SS(4.1 – 1.5 + 4.1 – 3.5)]/(1.2µA)

= 2.7 • 10⁶(C_SS)

If the overload occurs after start-up the voltage on C_SSwill

begin discharging from the zener clamp voltage:

1.5V

1.2µA

t_DELAY

=

C_SS= 1.25s /µF C_SS

(

)

T_LO2[C_SS(6 – 3.5)]/(1.2µA) = 2.1 • 10⁶(C_SS)

3V − 1.5V

1.2µA

If an overload occurs on one channel, it will also latch off

the other channel. This built-in overcurrent latchoff can be

overridden by providing a pull-up resistor to the RUN/SS

pinasshowninFigure7.Thisresistanceshortensthesoft-

start period and prevents the discharge of the RUN/SS

capacitorduringanovercurrentcondition. Tyingthispull-

up resistor to V_INas in Figure 7a, defeats overcurrent

latchoff. Diode-connectingthispull-upresistortoINTV_CC,

as in Figure 7b, eliminates any extra supply current during

controller shutdown while eliminating the INTV_CCloading

from preventing controller start-up.

t_IRAMP

C_SS= 1.25s /µF C_SS

(

)

BypullingbothRUN/SSpinsbelow1.0Vand/orpullingthe

STBYMD pin below 0.2V, the controllers are put into low

current shutdown (I_Q= 20µA). The RUN/SS pins can be

driven directly from logic as shown in Figure 7. Diode D1

in Figure 7 reduces the start delay but allows C_SSto ramp

up slowly providing the soft-start function. Each RUN/SS

pin has an internal 6V Zener clamp (See Functional Dia-

gram).

V

INTV

IN

CC

3.3V OR 5V

RUN/SS

*

Why should you defeat overcurrent latchoff? During the

prototype stage of a design, there may be a problem with

noise pickup or poor layout causing the protection circuit

to latch off. Defeating this feature will easily allow trouble-

shooting of the circuit and PC layout. The internal short-

circuit and foldback current limiting still remains active,

thereby protecting the power supply system from failure.

After the design is complete, a decision can be made

R

*

SS

D1

RUN/SS

C

SS

C

SS

*OPTIONAL TO DEFEAT OVERCURRENT LATCHOFF

(a)

1876 F07

(b)

Figure 7. RUN/SS Pin Interfacing

whether to enable the latchoff feature.

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The value of the soft-start capacitor C_SSmay need to be

scaled with output voltage, output capacitance and load

current characteristics. The minimum soft-start capaci-

tance is given by:

to protect against a shorted top MOSFET if the short

occurs while the controller is operating.

A comparator monitors the output for overvoltage condi-

tions. The comparator (OV) detects overvoltage faults

greater than 7.5% above the nominal output voltage.

When this condition is sensed, the top MOSFET is turned

off and the bottom MOSFET is turned on until the overvolt-

age condition is cleared. The output of this comparator is

only latched by the overvoltage condition itself and will

thereforeallowaswitchingregulatorsystemhavingapoor

PC layout to function while the design is being debugged.

The bottom MOSFET remains on continuously for as long

as the OV condition persists; if V_OUTreturns to safe level,

normal operation automatically resumes. A shorted top

MOSFET will result in a high current condition which will

open the system fuse. The switching regulator will regu-

late properly with a leaky top MOSFET by altering the duty

cycle to accommodate the leakage.

C

_SS> (C_OUT)(V_OUT) (10^–4) (R_SENSE

)

The minimum recommended soft-start capacitor of

C_SS= 0.1µF will be sufficient for most applications.

Fault Conditions: Current Limit and Current Foldback

The LTC1876 step-down controllers current comparator

has a maximum sense voltage of 75mV resulting in a

maximum MOSFET current of 75mV/R_SENSE. The maxi-

mum value of current limit generally occurs with the

largestV_INatthehighestambienttemperature, conditions

thatcausethehighestpowerdissipationinthetopMOSFET.

The controllers include current foldback to help further

limit load current when the output is shorted to ground.

The foldback circuit is active even when the overload

shutdown latch described above is overridden. If the

outputfallsbelow70%ofitsnominaloutputlevel,thenthe

maximum sense voltage is progressively lowered from

75mV to 25mV. Under short-circuit conditions with very

low duty cycles, the step-down regulators will begin cycle

skipping in order to limit the short-circuit current. In this

situation the bottom MOSFET will be dissipating most of

the power but less than in normal operation. The short-

circuit ripple current is determined by the minimum on-

time t_ON(MIN)(less than 200ns), the input voltage and

inductor value:

The Standby Mode (STBYMD) Pin Function

TheStandbyMode(STBYMD)pinprovidesseveralchoices

for start-up and standby operational modes. If the pin is

pulled to ground, the RUN/SS pins for both controllers are

internallypulledtoground,preventingstart-upandthereby

providing a single control pin for turning off both control-

lers at once. If the pin is left open or decoupled with a

capacitor to ground, the RUN/SS pins are each internally

provided with a starting current enabling external control

for turning on each controller independently. If the pin is

provided with a current of >3µA at a voltage greater than

2V, both internal linear regulators (INTV_CCand 3.3V) will

be on even when both controllers are shut down. In this

mode, the onboard 3.3V and 5V linear regulators can

provide power to keep-alive functions such as a keyboard

controller.Thispincanalsobeusedasalatching“on”and/

or latching “off” power switch if so designed.

∆I_L(SC)= t_ON(MIN)(V_IN/L)

The resulting short-circuit current is:

25mV

R_SENSE

1

2

I_SC

=

+ ∆I_L(SC)

Frequency of Operation

Fault Conditions: Overvoltage Protection (Crowbar)

The LTC1876 stepdown controllers have an internal volt-

age controlled oscillator. The frequency of this oscillator

can be varied over a 2 to 1 range. The pin is internally self-

biased at 1.19V, resulting in a free-running frequency of

The overvoltage crowbar is designed to blow a system

input fuse when the output voltage of the step-down

regulator rises much higher than nominal levels. The

crowbar causes huge currents to flow, that blow the fuse

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approximately220kHz.TheFREQSETpincanbegrounded

to lower this frequency to approximately 140kHz or tied to

theINTV_CCpintoyieldapproximately310kHz.TheFREQSET

pin may be driven with a voltage from 0 to INTV_CCto fix or

modulate the oscillator frequency as shown in Figure 5.

synchronous switch duty factor. Thus, the FCB input pin

removes the requirement that power must be drawn from

the inductor primary in order to extract power from the

auxiliary windings. With the loop in continuous mode, the

auxiliary outputs may nominally be loaded without regard

to the primary output load.

Minimum On-Time Considerations

The secondary output voltage V_SECis normally set as

shown in Figure 6a by the turns ratio N of the transformer:

Minimum on-time t_ON(MIN)is the smallest time duration

that the step down controller is capable of turning on the

topMOSFET.Itisdeterminedbyinternaltimingdelaysand

the gate charge required to turn on the top MOSFET. Low

duty cycle applications may approach this minimum on-

time limit and care should be taken to ensure that.

V_SEC(N + 1) V_OUT

However, if the controller goes into Burst Mode operation

and halts switching due to a light primary load current,

then V_SECwill droop. An external resistive divider from

V_SECto the FCB pin sets a minimum voltage V_SEC(MIN)

:

V_OUT

V (f)

IN

t_ON(MIN)

<

R6

R5

V_SEC(MIN)≈ 0.8V 1+

Ifthedutycyclefallsbelowwhatcanbeaccommodatedby

the minimum on-time, the controller will begin to skip

cycles. The output voltage will continue to be regulated,

but the ripple voltage and current will increase.

If V_SECdrops below this level, the FCB voltage forces

temporary continuous switching operation until V_SECis

again above its minimum.

The minimum on-time for each controller is generally less

than200ns.However,asthepeaksensevoltagedecreases

the minimum on-time gradually increases up to about

300ns. This is of particular concern in forced continuous

applications with low ripple current at light loads. If the

duty cycle drops below the minimum on-time limit in this

situation, a significant amount of cycle skipping can occur

with correspondingly larger current and voltage ripple.

In order to prevent erratic operation if no external connec-

tions are made to the FCB pin, the FCB pin has a 0.18µA

internal current source pulling the pin high. Include this

current when choosing resistor values R5 and R6.

The following table summarizes the possible states avail-

able on the FCB pin:

Table 1

FCB Pin

Condition

FCB Pin Operation

0V to 0.75V

Forced Continuous (Current Reversal

Allowed—Burst Inhibited)

The FCB pin can be used to regulate a secondary winding

or as a logic level input. Continuous operation is forced

when the FCB pin drops below 0.8V. During continuous

mode, current flows continuously in the transformer pri-

mary. The secondary winding(s) draw current only when

the bottom, synchronous switch is on. When primary load

currents are low and/or the V_IN/V_OUTratio is low, the

synchronous switch may not be on for a sufficient amount

of time to transfer power from the output capacitor to the

secondary load. Forced continuous operation will support

secondary windings providing there is sufficient

0.85V < V < 4.3V

Minimum Peak Current Induces

Burst Mode Operation

No Current Reversal Allowed

FB

Feedback Resistors

>4.8V

Regulating a Secondary Winding

Burst Mode Operation Disabled

Constant Frequency Mode Enabled

No Current Reversal Allowed

No Minimum Peak Current

Remember that both controllers are temporarily forced

into continuous mode when the FCB pin falls below 0.8V.

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Voltage Positioning

1. The V_INcurrent has two components: the first is the DC

supply current given in the Electrical Characteristics table,

which excludes MOSFET driver and control currents; the

second is the current drawn from the 3.3V linear regulator

output. V_INcurrent typically results in a small (<0.1%)

loss.

Voltage positioning can be used to minimize peak-to-peak

output voltage excursions under worst-case transient

loading conditions. The open loop DC gain of the control

loop is reduced depending upon the maximum load step

specifications. Voltage positioning can be easily added to

the LTC1876 by loading the I_THpin with a resistive divider

having a Thevenin equivalent voltage source equal to the

midpoint operating voltage of the error amplifier, or 1.2V

(see Figure 8).

2. INTV_CCcurrent is the sum of the MOSFET driver and

control currents. The MOSFET driver current results from

switching the gate capacitance of the power MOSFETs.

Each time a MOSFET gate is switched from low to high to

low again, a packet of charge dQ moves from INTV_CCto

ground. The resulting dQ/dt is a current out of INTV_CCthat

is typically much larger than the control circuit current. In

continuous mode, I_GATECHG=f(Q_T+Q_B), where Q_Tand Q_B

are the gate charges of the topside and bottom side

MOSFETs.

The resistive load reduces the DC loop gain while main-

taining the linear control range of the error amplifier. The

maximum output voltage deviation can theoretically be

reduced to half or alternatively the amount of output

capacitance can be reduced for a particular application. A

complete explanation is included in Design Solutions 10.

(See: www.linear-tech.com)

SupplyingINTV_CCpowerthroughtheEXTV_CCswitchinput

from an output-derived source will scale the V_INcurrent

required for the driver and control circuits by a factor of

(Duty Cycle)/(Efficiency). For example, in a 20V to 5V

application, 10mA of INTV_CCcurrent results in approxi-

mately 3mA of V_INcurrent. This reduces the mid-current

loss from 10% or more (if the driver was powered directly

from V_IN) to only a few percent.

INTV

CC

R

T2

T1

I

TH

LTC1876

R

C

1876 F08

3. I²R losses are predicted from the DC resistances of the

fuse (if used), MOSFET, inductor, current sense resistor,

and input and output capacitor ESR. In continuous mode

Figure 8. Active Voltage Positioning Applied to the LTC1876

Efficiency Considerations

the average output current flows through L and R_SENSE

,

The percent efficiency of a switching regulator is equal to

the output power divided by the input power times 100%.

It is often useful to analyze individual losses to determine

what is limiting the efficiency and which change would

produce the most improvement. Percent efficiency can be

expressed as:

but is “chopped” between the topside MOSFET and the

synchronous MOSFET. If the two MOSFETs have approxi-

mately the same R_DS(ON), then the resistance of one

MOSFET can simply be summed with the resistances of L,

R_SENSEand ESR to obtain I²R losses. For example, if each

R_DS(ON)= 30mΩ, R_L= 50mΩ, R_SENSE= 10mΩ and R_ESR

= 40mΩ (sum of both input and output capacitance

losses), then the total resistance is 130mΩ. This results in

losses ranging from 3% to 13% as the output current

increases from 1A to 5A for a 5V output, or a 4% to 20%

loss for a 3.3V output. Efficiency varies as the inverse

square of V_OUTfor the same external components and

output power level. The combined effects of increasingly

lower output voltages and higher currents required by

high performance digital systems is not doubling but

1876fa

%Efficiency = 100% – (L1 + L2 + L3 + ...)

whereL1, L2, etc. aretheindividuallossesasapercentage

of input power.

Although all dissipative elements in the circuit produce

losses, four main sources usually account for most of the

losses in LTC1876 circuits: 1) LTC1876 V_INcurrent (in-

cluding loading on the 3.3V internal regulator), 2) INTV_CC

regulator current, 3) I²R losses, 4) topside MOSFET

transition losses.

24

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quadrupling the importance of loss terms in the switching

regulator system!

damping factor can be estimated using the percentage of

overshoot seen at this pin. The bandwidth can also be

estimated by examining the rise time at the pin. The I_TH

external components shown in the Figure 1 circuit will

provide an adequate starting point for most applications.

4. Transition losses apply only to the topside MOSFET(s),

and only when operating at high input voltages (typically

20V or greater). Transition losses can be estimated from:

2

The I_THseries R_C-C_Cfilter sets the dominant pole-zero

loop compensation. The values can be modified slightly

(from 0.5 to 2 times their suggested values) to maximize

transient response once the final PC layout is done and the

particular output capacitor type and value have been

determined. The output capacitors need to be selected

because the various types and values determine the loop

feedbackfactorgainandphase. Anoutputcurrentpulseof

20% to 100% of full-load current having a rise time of 1µs

to10µswillproduceoutputvoltageandI_THpinwaveforms

that will give a sense of the overall loop stability without

breaking the feedback loop. The initial output voltage step

resulting from the step change in output current may not

bewithinthebandwidthofthefeedbackloop,sothissignal

cannot be used to determine phase margin. This is why it

is better to look at the I_THpin signal which is in the

feedback loop and is the filtered and compensated control

loop response. The gain of the loop will be increased by

increasing R_Cand the bandwidth of the loop will be

increased by decreasing C_C. If R_Cis increased by the same

factor that C_Cis decreased, the zero frequency will be kept

the same, thereby keeping the phase the same in the most

critical frequency range of the feedback loop. The output

voltage settling behavior is related to the stability of the

closed-loop system and will demonstrate the actual over-

all supply performance.

Transition Loss = (1.7) V_INI_O(MAX)C_RSS

f

Other “hidden” losses such as copper trace and internal

battery resistances can account for an additional 5% to

10% efficiency degradation in portable systems. It is very

important to include these “system” level losses in the

design of a system. The internal battery and fuse resis-

tancelossescanbeminimizedbymakingsurethatC_INhas

adequate charge storage and very low ESR at the switch-

ing frequency. A 25W supply will typically require a

minimum of 20µF to 40µF of capacitance having a maxi-

mum of 20mΩ to 50mΩ of ESR. The LTC1876 step-down

controllers 2-phase architecture typically halves this input

capacitance requirement over competing solutions. Other

lossesincludingSchottkyconductionlossesduringdead-

time and inductor core losses generally account for less

than 2% total additional loss.

Checking Transient Response

The regulator loop response can be checked by looking at

the load current transient response. Switching regulators

take several cycles to respond to a step in DC (resistive)

load current. When a load step occurs, V_OUTshifts by an

amount equal to ∆I_LOAD(ESR), where ESR is the effective

series resistance of C_OUT. ∆I_LOADalso begins to charge or

discharge C_OUTgenerating the feedback error signal that

forces the regulator to adapt to the current change and

return V_OUTto its steady-state value. During this recovery

time V_OUTcan be monitored for excessive overshoot or

ringing, which would indicate a stability problem. OPTI-

LOOP compensation allows the transient response to be

optimized over a wide range of output capacitance and

ESR values. The availability of the I_THpin not only allows

optimization of control loop behavior but also provides a

DC coupled and AC filtered closed loop response test

point. The DC step, rise time and settling at this test point

truly reflects the closed loop response. Assuming a pre-

dominantly second order system, phase margin and/or

A second, more severe transient is caused by switching in

loads with large (>1µF) supply bypass capacitors. The

dischargedbypasscapacitorsareeffectivelyputinparallel

with C_OUT, causing a rapid drop in V_OUT. No regulator can

alter its delivery of current quickly enough to prevent this

sudden step change in output voltage if the load switch

resistance is low and it is driven quickly. If the ratio of

C

_LOADto C_OUTis greater than 1:50, the switch rise time

should be controlled so that the load rise time is limited to

approximately 25 • C_LOAD. Thus a 10µF capacitor would

require a 250µs rise time, limiting the charging current to

about 200mA.

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+

–

TO SENSE1

AND SENSE1

Low V_INApplications

INPUT

SUPPLY

V

IN

L1

R

In applications where the input supply is low (<5V), the

LTC1876 auxiliary regulator can be used to step-up the

input to provide the gate drive to the external MOSFETs as

shown in Figure 9.

S1

I

TH1

I

TH2

C

EXTERNAL

MOSFETs

R

C

V

OUT

LTC1876

V

L2

OSENSE1

OSENSE2

S2

R1

+

SGND

Shown in the Typical Application section of the data sheet

is a circuit (3.3V_INDual-Phase High Efficiency Power

Supply)withinputsupplyof3.3V. Theboostsectionofthe

LTC1876issetuptogenerate5Vandisusedtoprovidethe

gate drive to the external MOSFETs. The circuit provides

dual outputs, a 2.5V/15A and 1.8V/15A. Both drawing

power directly from V_IN.

+

–

TO SENSE2

AND SENSE2

R2

1876 F10

Figure 10. Single Output Configuration

Auxiliary Regulator’s Inductor Value Calculation

Since the current limit for the auxiliary regulator is inter-

nally set at 1A, it makes the selection of components

easier. For the boost regulator, the duty cycle is given by:

INPUT

SUPPLY

L1

AUXV

IN

AUXSW

V

IN

LTC1876

V_IN

Duty Cycle = 1–

V_OUT

LTC1876

D1

EXTERNAL

MOSFETs

BOOST

R8

+

STEP-DOWN

SECTION

C

AUXV

SGND

OUT

FB

R7

Since energy is only transferred to the output capacitor(s)

during the off-time, the maximum output current that can

be supplied by the regulator without losing regulation is:

1876 F09

Figure 9. Generating the Gate Drive

for Low Input Supply Applications

I_OUT= 0.5(2 • I_PK– ∆I_L)(1 – Duty Cycle)

where I_PK= peak inductor current and is internally set at

1A.

Single Output/High Current Applications

In applications that demand current much higher than a

single stage can supply (>20A), the LTC1876 can be

configured as a single output converter. Figure 10 shows

the block diagram of the configuration. Note that the

compensation pins (I_TH1and I_TH2) of the two channels are

connected together, saving a set of passive components.

In addition, the output voltage sense pins (V_OSENSE1and

V_OSENSE2) are shorted together, using only one resistor

divider to set the output voltage.

∆I_L= inductor’s ripple current

With the required ripple current determined, the value of

the inductor is:

(V •Duty Cycle)

IN

L =

(f • ∆I_L)

where f = operating frequency (1.2MHz)

In most cases, a larger value of inductance is used. This is

done to account for component variation. It also lowers

the inductor ripple current and results in lower core

losses. In addition, lower ripple also translates into lower

ESR losses in the output capacitors and smaller output

voltage ripple.

Although the output current requirement is high, the input

capacitors ripple current requirement is not much differ-

ent compared to the dual outputs circuit. This is attributed

to the fact that the current is shared between two channels

and an out-of-phase architecture is implemented for the

controllers (See Theory and Benefits of 2-Phase

Operation).

1876fa

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Once the value of L is known, select an inductor that can

handle at least 1A without saturating. In addition, ensure

that the inductor has a low DCR (copper wire resistance)

to minimize I²R power losses.

between V_OUT3and AUXV_FBas shown in Figure 11. The

frequency of the zero is determined by the following

equation.

1

f_Z=

Auxiliary Regulator’s Capacitor Selection

2π •R8•C3

Low ESR (equivalent series resistance) capacitors should

beusedattheoutputtominimizetheoutputripplevoltage.

Multilayer ceramic capacitors are an excellent choice, as

they have extremely low ESR and are available in very

small packages. X5R dielectrics are preferred, followed by

X7R, as these materials retain the capacitance over wide

voltage and temperature ranges. A 4.7µF to 10µF output

capacitor is sufficient for most applications, but systems

with very low output current may need only a 1µF or 2.2µF

output capacitor. Solid tantalum or OS-CON capacitors

can be used, but they will occupy more board area than a

ceramicandwillhaveahigherESR.Alwaysuseacapacitor

with a sufficient voltage rating.

By choosing the appropriate values for the resistor and

capacitor, the zero frequency can be designed to slightly

improve the phase margin of the overall converter. The

typical target value for the zero frequency is between

50kHz to 150kHz.

V

OUT3

R8

LTC1876

AUXV

C3

FB

R7

1876 F11

Figure 11. Adding a Phase Lead Zero

Ceramic capacitors also make a good choice for the input

decoupling capacitor, and should be placed as close as

possible to the AUXV_INpin. A 1µF to 4.7µF input capacitor

is sufficient for most applications. Table 2 shows a list of

several ceramic capacitor manufacturers. Consult the

manufacturers for detailed information on their entire

selection of ceramic parts.

Auxiliary Regulator’s Diode Selection

A Schottky diode is recommended for use with the auxil-

iary regulator. The ON Semiconductor MBR0520 is a very

goodchoice. Wheretheinputtooutputvoltagedifferential

exceeds 20V, use the MBR0530 (a 30V diode). These

diodes are rated to handle an average forward current of

0.5A. In applications where the average forward current of

the diode exceeds 0.5A, a Microsemi UPS5817 rated at 1A

is recommended.

Table 2. Ceramic Capacitor Manufacturers

Taiyo Yuden

AVX

(408) 573-4150

(803) 448-9411

(714) 852-2001

www.t-yuden.com

www.avxcorp.com

www.murata.com

Murata

Driving AUXSD Above 10V

ThedecisiontouseeitherlowESR(ceramic)capacitorsor

higher ESR (tantalum or OS-CON) capacitors can affect

the stability of the overall system. The ESR of any capaci-

tor, along with the capacitance itself, contributes a zero to

the system. For the tantalum and OS-CON capacitors, this

zero is located at a lower frequency due to the higher value

of the ESR, while the zero of a ceramic capacitor is a much

higher frequency and can generally be ignored.

The maximum voltage allowed on the AUXSD pin is 10V.

In some applications if the applied voltage on this pin is

going to exceed 10V, then a series resistor can be con-

nected to this pin. The value for this resistor is given by:

(V_AUXSD– 10)

(60•10^–6)

R_SERIES

=

By placing this series resistor, it ensures that the voltage

seen by the pin will not exceed 10V.

A phase lead zero can be intentionally introduced by

placing a capacitor (C3) in parallel with the resistor (R8)

1876fa

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Automotive Considerations: Plugging into the

Cigarette Lighter

Design Example

As a design example for one channel, assume V_IN= 12V

As battery-powered devices go mobile, there is a natural (nominal), V_IN= 22V(max), V_OUT= 1.8V, I_MAX= 5A, and

interest in plugging into the cigarette lighter in order to f = 300kHz, R_SENSEcan immediately be calculated:

conserveorevenrechargebatterypacksduringoperation.

R

_SENSE= 50mV/5A = 0.01Ω

But before you connect, be advised: you are plugging into

thesupplyfromhell.Themainbatterylineinanautomobile

is the source of a number of nasty potential transients,

including load-dump, reverse-battery, and double-bat-

tery.

Tie the FREQSET pin to the INTV_CCpin for 300kHz opera-

tion.

Assume a 4.7µH inductor and check the actual value of the

ripple current. The following equation is used:

Load-dump is the result of a loose battery cable. When the

cablebreaksconnection, thefieldcollapseinthealternator

can cause a positive spike as high as 60V which takes

several hundred milliseconds to decay. Reverse-battery is

just what it says, while double-battery is a consequence of

tow-truck operators finding that a 24V jump start cranks

cold engines faster than 12V.

V_OUT

(f)(L)

V_OUT

V

IN

∆I_L=

1–

The highest value of the ripple current occurs at the

maximum input voltage:

1.8V

22V

The network shown in Figure 12 is the most straight

forward approach to protect a DC/DC converter from the

ravages of an automotive battery line. The series diode

prevents current from flowing during reverse-battery,

while the transient suppressor clamps the input voltage

during load-dump. Note that the transient suppressor

should not conduct during double-battery operation, but

must still clamp the input voltage below breakdown of the

converter. Although the LTC1876 step-down controllers

have a maximum input voltage of 36V, most applications

will be limited to 30V by the MOSFET BVDSS.

∆I_L=

1–

= 1.17A

300kHz(4.7µH)

The ripple current is 23% of maximum output current,

whichisbelowthe30%guideline.Thismeansthata3.3µH

inductor can be used.

Increasing the ripple current will also help ensure that the

minimum on-time of 200ns is not violated. The minimum

on-time occurs at maximum V_IN:

V_OUT

1.8V

t_ON(MIN)

=

= 273ns

V

_IN(MAX)f 22V(300kHz)

50A I RATING

PK

Since the output voltage is below 2.4V the output resistive

divider will need to be sized to not only set the output

voltage but also to absorb the SENSE pins current.

V

IN

12V

LTC1876

TRANSIENT VOLTAGE

SUPPRESSOR

GENERAL INSTRUMENT

1.5KA24A

0.8V

2.4V – V_OUT

R1

= 24k

(MAX)

1876 F09

0.8V

2.4V – 1.8V

= 32k

Figure 12. Automotive Application Protection

1876fa

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Choosing 1% resistors; R1 = 25.5k and R2 = 32.4k yields

an output voltage of 1.816V.

Since the required output current is 300mA, the ripple

current of the inductor is calculated to be 0.57A.

The power dissipation on the top side MOSFET can be

easily estimated. Choosing a Siliconix Si4412DY results

in; R_DS(ON)= 0.042Ω, C_RSS= 100pF. At maximum input

voltage with T(estimated) = 50°C:

Hence the required inductor is:

(V •Duty Cycle)

IN

L =

(f • ∆I_L)

With the boost regulator operating at 1.2MHz,

1.8V

22V

P_MAIN

=

(

5 ²1+ (0.005)(50°C – 25°C)

( )

[

]

L = 4.24µH

2

A 10µH inductor is selected for the circuit for lower ripple

inductor current. Since the output current is only 300mA,

a 0.5A MBR0520 Schottky is selected. The completed

circuit along with its efficiency curve is shown in Figure 13

and Figure 14 respectively.

0.042Ω + 1.7 22V 5A 100pF 300kHz

)

(

) ( )(

)(

)

= 220mW

A short-circuit to ground will result in a folded back

current of:

L3

10µH

D1

V

OUT3

25mV 1 200ns(22V)

V

IN3

5V

12V

I_SC

=

+

= 3.2A

300mA

0.01Ω

2

3.3µH

R8

113k

C3*

10pF

C

IN3

AUXV

AUXSW

IN

2.2µF

LTC1876

AUXSD AUXV

SGND

with a typical value of R_DS(ON)and δ = (0.005/°C)(20)

= 0.1. The resulting power dissipated in the bottom

MOSFET is:

SHDN

FB

+

R7

13.3k

C

OUT3

4.7µF

C1: TAIYO YUDEN X5R LMK212BJ225MG

C2: TAIYO YUDEN X5R EMK316BJ475ML

D1: ON SEMICONDUCTOR MBR0520

L1: SUMIDA CR43-100

2

1876 F13

22V – 1.8V

22V

= 434mW

P

SYNC

=

3.2A 1.1 0.042Ω

(

) ( )(

)

*OPTIONAL

which is less than under full-load conditions.

Figure 13. Design Example Schematic

C_INis chosen for an RMS current rating of at least 3A at

temperature assuming only this channel is on. C_OUTis

chosen with an ESR of 0.02Ω for low output ripple. The

output ripple in continuous mode will be highest at the

maximum input voltage. The output voltage ripple due to

ESR is approximately:

90

V

= 5V

IN

85

80

75

70

65

60

55

50

V

= 3.3V

IN

V_ORIPPLE= R_ESR(∆I_L) = 0.02Ω(1.67A) = 33mV_P–P

Design Example for Auxiliary Regulator

Assume the requirements are V_IN= 5V, V_OUT= 12V and

I_OUTMAX= 300mA. The duty cycle is given by:

100

LOAD CURRENT (mA)

200

0

400

300

1876 F14

V_IN

Duty Cycle = 1–

= 0.58

Figure 14. Efficiency Curve for Design Example

V_OUT

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1. Are the top N-channel MOSFETs M1 and M3 located

within 1cm of each other with a common drain connection

at C_IN? Do not attempt to split the input decoupling for the

two channels as it can cause a large resonant loop.

PC Board Layout Checklist

When laying out the printed circuit board, the following

checklist should be used to ensure proper operation of the

LTC1876. These items are also illustrated graphically in

the layout diagram of Figure 15. The Figure 16 illustrates

the current waveforms present in the various branches of

the 2-phase synchronous regulators operating in the

continuous mode. Check the following in your layout:

2. Is the ground of the step-down controller kept separate

from the ground of the step-up regulator? The regulator

ground should join the controller ground at the combined

C_OUT(–) plates. Within the controller circuitry, are the

signal and power grounds kept separate? The controller

1

2

36

35

34

33

32

31

30

29

28

27

26

25

24

23

22

21

20

19

V

PULL-UP

RUN/SS1

PGOOD

TG1

(<7V)

L1

3

4

R

SENSE

+

V

SENSE1

OUT1

1

2

R2

3

–

SENSE1

SW1

C

B1

R1

4

D1

M1

M2

V

BOOST1

OSENSE1

5

FREQSET

STBYMD

FCB

V

IN

C

OUT1

6

BG1

R

IN

7

C

IN

INTV

EXTV

CC

C

VIN

LTC1876

8

I

INTV

TH1

V

IN

C

INTVCC

9

SGND

PGND

BG2

C

OUT2

10

11

12

13

14

15

16

17

18

3.3V

OUT

D2

M3

M4

I

BOOST2

SW2

TH2

C

B2

V

OSENSE2

–

R

R3

R4

SENSE

1

2

SENSE2

TG2

V

OUT2

L2

3

4

+

RUN/SS2

AUXSD

SHUTDOWN

AUXSGND

AUXV

R7

R8

AUXV

FB

IN

C

AUXIN

AUXSW

AUXPGND

V

OUT3

D3

L3

C

OUT3

1876 F15

Figure 15. LTC1876 Recommended Printed Circuit Layout Diagram

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signal ground pin and the ground return of C_INTVCCmust the (–) plates of the C_OUT3(–) plates by placing the

return to the combined C_OUT(–) plates. Within the regula- capacitors next to each other and away from the D3 loop

tor circuitry, are the signal and power grounds kept described above.

separate? The regulator signal ground pin must return to

4. If the input supply to the boost regulator is obtain from

the C_AUXIN(–) plates.

oneoftheotheroutputs, isthisconnectionshort(<1cm)?

3. Does the path formed by the top N-Channel MOSFET

Schottky diode (D1, D2) and the C_INcapacitor have short

5. Do the LTC1876 V_OSENSEand AUXV_FBpins resistive

dividers connect to the (+) plates of its respective C_OUT

?

leads and PC trace lengths? The output capacitor (–)

plates should be connected as close as possible to the

(–) plates of the input capacitor by placing the capacitors

next to each other and away from the Schottky loop

described above. Also, the path formed by the AUXSW

pins, Schottky diode (D3) and the C_OUT3capacitor should

have short leads and PC trace lengths. The C_AUXINcapaci-

tor (–) plates should be connected as close as possible to

The resistive divider must be connected between the (+)

plate of C_OUTand signal ground and a small V_OSENSE

decoupling capacitor should be as close as possible to the

LTC1876 SGND pin. A feedforward capacitor across R8

can be connected to enhance the transient response of the

boost regulator. The R2, R4 and R8 connections should

not be along the high current input feeds from the input

capacitor(s).

SW1

D1

L1

R

SENSE1

V

OUT1

+

C

OUT1

R

L1

V

IN

R

IN

+

C

IN

SW2

L2

R

SENSE2

V

OUT2

+

D2

C

OUT2

R

L2

BOLD LINES INDICATE

HIGH, SWITCHING

CURRENT LINES.

KEEP LINES TO A

MINIMUM LENGTH.

1876 F16

Figure 16. Branch Current Waveforms

1876fa

31

LTC1876

U

W U U

APPLICATIO S I FOR ATIO

6. Are the SENSE^–and SENSE⁺leads routed together with

minimum PC trace spacing? The filter capacitor between

SENSE⁺and SENSE^–should be as close as possible to the

IC.

The duty cycle percentage should be maintained from

cycle to cycle in a well-designed, low noise PCB imple-

mentation. Variation in the duty cycle at a subharmonic

rate can suggest noise pickup at the current or voltage

sensing inputs or inadequate loop compensation. Over-

compensation of the loop can be used to tame a poor PC

layout if regulator bandwidth optimization is not required.

Only after each controller is checked for their individual

performance should both controllers be turned on at the

same time. A particularly difficult region of operation is

when one controller channel is nearing its current com-

parator trip point when the other channel is turning on its

topMOSFET. Thisoccursaround50%dutycycleoneither

channel due to the phasing of the internal clocks and may

cause minor duty cycle jitter.

7. Is the INTV_CCdecoupling capacitor connected close to

the IC, between the INTV_CCand the power ground pins?

This capacitor carries the MOSFET drivers current peaks.

An additional 1µF ceramic capacitor placed immediately

next to the INTV_CCand PGND pins can help improve noise

performance substantially.

8. Keep the switching nodes (SW1, SW2, AUXSW), top

gate nodes (TG1, TG2), and boost nodes (BOOST1,

BOOST2) away from sensitive small-signal nodes, espe-

cially from the opposites channel’s voltage and current

sensing feedback pins. All of these nodes have very large

and fast moving signals and therefore should be kept on

the“outputside”oftheLTC1876andoccupyminimumPC

trace area.

Short-circuit testing can be performed to verify proper

overcurrent latchoff, or 5µA can be provided to the

RUN/SS pin(s) by resistors from V_INor INTV_CC(depend-

ing upon the STBYMD pin programming), to prevent the

short-circuit latchoff from occurring.

9. Use a modified “star ground” technique: a low imped-

ance, large copper area central grounding point on the

same side of the PC board as the input and output

capacitors with tie-ins for the bottom of the INTV_CC

decoupling capacitor, the bottom of the voltage feedback

resistive divider and the SGND pin of the IC.

ReduceV_INfromitsnominalleveltoverifyoperationofthe

regulatorindropout.Checktheoperationoftheundervolt-

age lockout circuit by further lowering V_INand monitoring

the outputs to verify operation.

Investigate whether any problems exist only at higher

output currents or only at higher input voltages. If prob-

lems coincide with high input voltages and low output

currents,lookforcapacitivecouplingbetweentheBOOST,

SW, TG, and possibly BG connections and the sensitive

voltage and current pins. The capacitor placed across the

current sensing pins needs to be placed immediately

adjacent to the pins of the IC. This capacitor helps to

minimize the effects of differential noise injection due to

high frequency capacitive coupling. If problems are en-

countered with high current output loading at lower input

voltages, look for inductive coupling between C_IN, Schot-

tky and the top MOSFET components to the sensitive

currentandvoltagesensingtraces.Inaddition,investigate

common ground path voltage pickup between these com-

ponents and the SGND pin of the IC.

PC Board Layout Debugging

Start with one regulator on at a time. It is best to first start

with one of the step-down regulator and it is helpful to use

a DC-50MHz current probe to monitor the current in the

inductor while testing the circuit. Monitor the output

switching node (SW pin) to synchronize the oscilloscope

to the internal oscillator and probe the actual output

voltage as well. Check for proper performance over the

operating voltage and current range expected in the

application. The frequency of operation should be main-

tained over the input voltage range down to dropout and

untiltheoutputloaddropsbelowthelowcurrentoperation

threshold—typically 10% to 20% of the maximum de-

signed current level in Burst Mode operation.

1876fa

32

LTC1876

U

W U U

APPLICATIO S I FOR ATIO

An embarrassing problem, which can be missed in an

otherwise properly working switching regulator, results

when the current sensing leads are hooked up backwards.

Theoutputvoltageunderthisimproperhookupwillstillbe

maintained but the advantages of current mode control

will not be realized. Compensation of the voltage loop will

be much more sensitive to component selection. This

behavior can be investigated by temporarily shorting out

the current sensing resistor—don’t worry, the regulator

will still maintain control of the output voltage.

U

TYPICAL APPLICATIO S

Low Voltage 3.3V to 1.8V, 2.5V and 5V Power Supply

0.1µF

100k

1

2

36

35

34

33

32

31

30

29

28

27

26

25

24

23

22

21

20

19

RUN/SS1

PGOOD

TG1

L1

2µH

3

4

PGOOD

V

2.5V

4A

OUT1

+

SENSE1

42.5k

1%

1

2

R

SENSE

0.008Ω

1000pF

3

–

SENSE1

SW1

20k

1%

0.1µF

4

D1

M1

M2

V

BOOST1

OSENSE1

0.01µF

5

47µF

6.3V

SP

FREQSET

STBYMD

FCB

V

IN

0.01µF

10Ω

6

+

BG1

33µF

6.3V, SP

220pF

7

EXTV

CC

4.7µF

0.1µF

LTC1876

D3

D4

8

I

INTV

TH1

CC

+

6.8k

1µF

+

470pF

9

SGND

PGND

BG2

220pF

47µF

6.3V

SP

10

11

12

13

14

15

16

17

18

3.3V

OUT

3.3V

OUT

D2

M3

M4

1

I

BOOST2

SW2

TH2

6.8k

0.1µF

V

OSENSE2

20k

1%

25k

1%

V

OUT2

2

–

1.8V

SENSE2

TG2

R

0.1µF

SENSE

0.008Ω

5A

1000pF

L2

2µH

3

4

+

RUN/SS2

AUXSD

SHUTDOWN

AUXSGND

10k

V

IN

3.3V

AUXV

FB

AUXV

IN

1µF

31.6k

AUXSW

AUXPGND

D5

V

OUT3

5V

M1, M2, M3, M4: FDS6912A

L1, L2: SUMIDA CEP123-2RO

L3: SUMIDA CDRH5D18

D1, D2: MBRM140T3

D3, D4: BAT54A

400mA

10µF

16V

×5R

L3, 5.4µH

+

10µF

20V

D5: MBR0520

1876 TA02

1876fa

33

LTC1876

U

TYPICAL APPLICATIO S

3.3V_INDual-Phase High Efficiency Power Supply

100pF

1

36

35

34

33

32

31

30

29

28

27

26

25

24

23

22

21

20

19

V

PULL-UP

(<7V)

RUN/SS1

PGOOD

TG1

L1

0.9µH

100k

3

4

V

2.5V

15A

OUT1

2

+

SENSE1

17.4k

1

2

R

SENSE

0.003Ω

1000pF

1%

3

4

5

6

7

8

9

–

SENSE1

SW1

8.25k

1%

M2

×2

M1

×2

0.47µF

C4

D1

1µF

V

BOOST1

OSENSE1

0.01µF

6.3V

FREQSET

STBYMD

FCB

V

IN

V

IN

3.3V

0.01µF

+

C

1µF

6.3V

BG1

OUT1

220µF, 4V, ×3

100pF

EXTV

CC

1µF

6.3V

10Ω

LTC1876

D4

+

I

INTV

TH1

C

IN

+

2.2µF

6.3V

47k

10µF

6.3V

330µF

6V, ×3

+

OUT2

330µF, 2.5V, ×3

6800pF

SGND

PGND

BG2

C

100pF

10

11

12

13

3.3V

OUT

M3

×2

M4

×2

C26

I

BOOST2

SW2

TH2

1µF

47k

D2

0.47µF

6.3V

V

OSENSE2

–

SENSE2

TG2

0.1µF

8.06k

1%

10k

1%

1000pF

14

V

OUT2

1

2

4

+

1.8V

SENSE2

RUN/SS2

AUXSD

15A

R

L2

0.9µH

3

SENSE

0.003Ω

15

16

17

18

SHUTDOWN

AUXSGND

AUXV

FB

IN

10.2k

1%

1µF

6.3V

30.9k

1%

AUXSW

AUXPGND

1µF

D3

6.3V

L3, 47µH

+

10µF

10V

1876 TA04

D1, D2: MBRS340T3

D3: CMDSH-3

D4: BAT54A

L1, L2: SUMIDA CEP134-OR9

L3: TOKO FSLB2520-470K

M1, M2, M3, M4: FDS7764A

1876fa

34

LTC1876

U

PACKAGE DESCRIPTIO

G Package

36-Lead Plastic SSOP (5.3mm)

(Reference LTC DWG # 05-08-1640)

12.50 – 13.10*

(.492 – .516)

1.25 ±0.12

36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19

7.8 – 8.2

5.3 – 5.7

7.40 – 8.20

(.291 – .323)

0.42 ±0.03

0.65 BSC

5

7

8

RECOMMENDED SOLDER PAD LAYOUT

1

2

3

4

6

9 10 11 12 13 14 15 16 17 18

5.00 – 5.60**

(.197 – .221)

2.0

(.079)

0° – 8°

0.65

(.0256)

BSC

0.09 – 0.25

(.0035 – .010)

0.55 – 0.95

(.022 – .037)

0.05

0.22 – 0.38

(.009 – .015)

(.002)

NOTE:

G36 SSOP 0802

1. CONTROLLING DIMENSION: MILLIMETERS

MILLIMETERS

2. DIMENSIONS ARE IN

(INCHES)

3. DRAWING NOT TO SCALE

*DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH

SHALL NOT EXCEED .152mm (.006") PER SIDE

**DIMENSIONS DO NOT INCLUDE INTERLEAD FLASH. INTERLEAD

FLASH SHALL NOT EXCEED .254mm (.010") PER SIDE

1876fa

Information furnished by Linear Technology Corporation is believed to be accurate and reliable.

However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-

tationthattheinterconnectionofitscircuitsasdescribedhereinwillnotinfringeonexistingpatentrights.

35

LTC1876

U

TYPICAL APPLICATION

High Efficiency Triple 5V/ 3.3V/12V Power Supply

0.1µF

100k

1

36

35

34

33

32

31

30

29

28

27

26

25

24

23

22

21

20

19

V

PULL-UP

(<7V)

RUN/SS1

PGOOD

TG1

L1

4.6µH

3

4

V

3.3V

5A

OUT1

2

+

SENSE1

63.4k

1

2

R

SENSE

0.008Ω

1000pF

1%

3

4

–

SENSE1

SW1

20k

1%

M1

M2

0.1µF

D1

V

BOOST1

OSENSE1

0.01µF

5

47µF

6.3V

SP

V

IN

FREQSET

STBYMD

FCB

V

IN

5.2V TO 28V

0.01µF

6

BG1

10µF

35V

10Ω

220pF

7

INTV

4.7µF

10V

EXTV

CC

0.1µF

LTC1876

D3

D4

8

I

INTV

TH1

CC

33µF

35V

+

6.8k

1µF

470pF

9

SGND

PGND

BG2

220pF

56µF

4V

SP

10

11

12

13

14

15

16

17

18

3.3V

OUT

D2

I

BOOST2

SW2

TH2

6.8k

0.1µF

M3

M4

V

OSENSE2

20k

1%

105k

1%

R

SENSE

0.008Ω

V

OUT2

1

2

–

5V

SENSE2

TG2

0.1µF

5A

L2

4.6µH

1000pF

3

4

+

RUN/SS2

AUXSD

SHUTDOWN

AUXSGND

10.2k

AUXV

FB

AUXV

IN

86.6k

AUXSW

AUXPGND

D5

V

OUT3

12V

M1, M2, M3, M4: FDS6912A

L1, L2: SUMIDA CEP123-4R6

L3: TOKO A920CY-100M

D1, D2: MBRM140T3

D3, D4: BAT54A

200mA

+

L3, 10µH

10µF

20V

D5: CMDSH-3

1876 TA03

RELATED PARTS

PART NUMBER

DESCRIPTION

No R

^TMCurrent Mode Synchronous Step-Down Controllers

COMMENTS

LTC1625/LTC1775

Burst Mode Operation, GN-16

SENSE

LTC1628/LTC1628-PG High Efficiency, Dual, 2 Phase Synchronous Step-Down Controllers

Constant Frequency, Standby, 5V and 3.3V LDO

LTC1708-PG

Dual, 2 Phase Synchronous Controller with Mobile VID Control

36V Input; V

for CPU Core Voltage;

OUT1

V

for Memory, Chipset I/O

OUT2

LTC1709

LTC1735

LTC1736

LTC1772

2 Phase, 5-Bit Adustable, High Efficiency, Synchronous Step-Down Controller Constant Frequency, VID, up to 42A

High Efficiency Synchronous Step-Down Switching Regulator

High Efficiency Synchronous Controller with Mobile VID Control

SOT-23 Step-Down Controller

Output Fault Protection, GN-16

Output Fault Protection, G-24

2.5V ≤ V ≤ 9.8V; I

Up to 4.5A; 550kHz

OUT

IN

Operation for Smallest PCB Area

LTC1778

LTC3713

No R

Wide Input Range Synchronous Step-Down Controller

SENSE

Up to 97% Efficiency; 4V ≤ V ≤ 36V

IN

0.8V ≤ V

≤ (0.9)(V ); Input up to 20A

OUT

IN

Low Input Voltage Synchronous Step-Down Controller

1.5V ≤ V , No R

, Standard 5V-Logic Level

SENSE

IN

MOSFETs

LTC3714

LTC3716

LTC3728

No R DC/DC Controller for Mobile Pentium Processors

Supports up to 25A; Sense Resistor Optional

Small, Low Profile Design; Supports up to 30A

Phase-Lockable from 250kHz to 550kHz,

SENSE

2-Phase DC/DC Controller for Mobile Pentium Processors

Dual, 2-Phase 550kHz Synchronous Step-Down Controller

5mm × 5mm QFN and SSOP-28, 3.5V ≤ V ≤ 36V

IN

Adaptive Power and No R_SENSEare trademarks of Linear Technology Corporation.

1876fa

LT/TP 1002 1K REV A • PRINTED IN USA

36 ^{LinearTechnology Corporation}

1630 McCarthy Blvd., Milpitas, CA 95035-7417

●

LINEAR TECHNOLOGY CORPORATION 2000

(408) 432-1900 FAX: (408) 434-0507 www.linear.com


型号：	LTC1876EG
厂家：	Linear
描述：	High Efficiency, 2-Phase, Dual Synchronous Step-Down Switching Controller and Step-Up Regulator 高效率，两相，双通道同步降压开关控制器和升压稳压器稳压器开关控制器
文件：	总36页 (文件大小：417K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

LTC1876EG [Linear]

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