LTC2919IDDB-2.5#TRMPBF [Linear]
LTC2919 - Precision Triple/Dual Input UV, OV and Negative Voltage Monitor; Package: DFN; Pins: 10; Temperature Range: -40°C to 85°C;
| 型号： | LTC2919IDDB-2.5#TRMPBF |
| 厂家： | 
Linear |
| 描述： | LTC2919 - Precision Triple/Dual Input UV, OV and Negative Voltage Monitor; Package: DFN; Pins: 10; Temperature Range: -40°C to 85°C 光电二极管 |
| 文件： | 总20页 (文件大小：552K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LTC2919
Precision Triple/Dual Input
UV, OV and Negative
Voltage Monitor
FEATURES
DESCRIPTION
The LTC®2919 is a triple/dual input monitor intended for a
variety of system monitoring applications. Polarity selec-
tion and a buffered reference output allow the LTC2919 to
monitor positive and negative supplies for undervoltage
(UV) and overvoltage (OV) conditions.
n
Two Low Voltage Adjustable Inputs (0.5V)
n
Accurate UVLO Provides a Third Monitor Input
n
Open-Drain RST, OUT1 and OUT2 Outputs
Pin Selectable Input Polarity Allows Negative, UV
n
and OV Monitoring
Guaranteed Threshold Accuracy: 1.5%
n
The two adjustable inputs have a nominal 0.5V threshold,
featuring tight 1.5% threshold accuracy over the entire
operating temperature range. Glitch filtering ensures out-
puts operate reliably without false triggering. An accurate
threshold at the VCC pin provides a third input supply
monitor for a 2.5V, 3.3V or 5V supply.
n
6.5V Shunt Regulator for High Voltage Operation
n
Low 50µA Quiescent Current
n
Buffered 1V Reference for Negative Supply Offset
n
Input Glitch Rejection
Adjustable Reset Timeout Period
n
n
Selectable Internal Timeout Saves Components
n
n
Two independent output pins indicate the status of each
adjustable input. A third common output provides a
configurable reset timeout that may be set by an accu-
rate internal 200ms timer, programmed with an external
capacitor, or disabled for a fast response. A three-state
input pin sets the input polarity of each adjustable input
without requiring any external components.
Outputs Guaranteed Low with V = 0.5V
CC
Space Saving 10-Lead 3mm × 2mm DFN and MSOP
Packages
n
AEC-Q100 Qualified for Automotive Applications
APPLICATIONS
n
Desktop and Notebook Computers
The LTC2919 provides a highly versatile, precise, space-
conscious, micropower solution for supply monitoring.
All registered trademarks and trademarks are the property of their respective owners. Protected
by U.S. patents, including 6949965, 7292076.
n
Network Servers
n
Core, I/O Monitor
Automotive
n
TYPICAL APPLICATION
3.3V UV/OV (Window) Monitor Application with
200ms Internal Timeout (3.3V Logic Out)
SEL Pin Connection for Input Polarity
Combinations
ꢔ.ꢔꢀ
POLARITY
ꢐ.ꢆꢘꢌ
ꢀ
ꢁꢁ
ꢓꢈꢔꢑ
ꢆꢐꢑ
ADJ1
+
ADJ2
+
SEL PIN
ꢂꢃꢁꢄꢅꢆꢅꢇꢄ.ꢈ
ꢆꢐꢑ
Aꢉꢊꢆ
ꢍꢎꢃꢆ
ꢍꢎꢃꢄ
RST
V
UV
CC
ꢆꢐꢑ
ꢆꢐ.ꢕꢑ
ꢕꢖ.ꢗꢑ
Rꢋꢌ
OV
FAULT
OPEN
GND
+
–
Aꢉꢊꢄ
ꢏꢋꢂ
ꢃꢙR
–
–
ꢚꢛꢉ
ꢄꢅꢆꢅ ꢃAꢐꢆꢒ
Rev. A
1
Document Feedback
For more information www.analog.com
LTC2919
ABSOLUTE MAXIMUM RATINGS (Notes 1, 2)
Terminal Voltages
Operating Temperature Range
V
(Note 3)............................................. –0.3V to 6V
LTC2919C ................................................ 0°C to 70°C
LTC2919I .............................................–40°C to 85°C
LTC2919H.......................................... –40°C to 125°C
Maximum Junction Temperature .......................... 150°C
Storage Temperature Range ..................–65°C to 150°C
Lead Temperature (Soldering, 10 sec)
CC
OUT1, OUT2, RST ..................................–0.3V to 7.5V
ADJ1, ADJ2............................................–0.3V to 7.5V
TMR, SEL..................................–0.3V to (V + 0.3V)
CC
Terminal Currents
I
(Note 3)...................................................... 10mA
CC
I
.................................................................... 1mA
MSOP-10...........................................................300°C
REF
ADJ1, ADJ2........................................................–1mA
PIN CONFIGURATION
ꢀꢁꢂ ꢃꢄꢅꢆ
ꢌꢊꢘ ꢈꢙꢆꢚ
ꢇ
ꢕ
ꢒ
ꢧ
ꢝ
ꢇꢎ
ꢦ
ꢗꢅꢐ
Aꢊꢙꢇ
Aꢊꢙꢕ
ꢀꢚR
Rꢅꢘ
ꢅꢆꢇ
ꢉꢉ
ꢊꢋꢌꢀ
ꢊꢋꢌꢁ
RST
ꢀ
ꢁ
ꢂ
ꢃ
ꢄ
ꢀꢍ Aꢒꢓꢀ
ꢃ
ꢌꢌ
ꢈ
ꢎ
ꢏ
ꢐ
ꢑ
Aꢒꢓꢁ
ꢌꢔR
Rꢆꢕ
ꢇꢇ
ꢈꢉꢊ
ꢥ
ꢁꢤꢀꢇ
ꢁꢤꢀꢕ
Rꢗꢀ
ꢠ
ꢖꢗꢒ
ꢡ
ꢈꢉꢊ
ꢔꢅ ꢘAꢉꢛAꢖꢆ
ꢀꢍꢜꢇꢆAꢒ ꢘꢇAꢅꢌꢙꢉ ꢔꢅꢊꢘ
ꢞ ꢀꢄꢍꢟꢉꢠ θ ꢞ ꢀꢁꢍꢟꢉꢡꢚ
ꢊꢊꢋ ꢂAꢌꢍAꢈꢅ
ꢇꢎꢏꢐꢅAꢊ ꢑꢒꢓꢓ ꢔ ꢕꢓꢓꢖ ꢂꢐAꢗꢀꢄꢌ ꢊꢘꢉ
ꢜ ꢇꢝꢎꢞꢌꢟ θ ꢜ ꢠꢡꢞꢌꢢꢆ
ꢌ
ꢓꢔAꢝ
ꢓA
ꢀ
ꢙꢚAꢛ
ꢙA
ꢅꢛꢂꢁꢗꢅꢊ ꢂAꢊ ꢑꢂꢄꢉ ꢇꢇꢖ ꢚAꢣ ꢋꢅ ꢐꢅꢘꢀ ꢁꢂꢅꢉ ꢁR ꢀꢄꢅꢊ ꢀꢁ ꢈꢉꢊ
ORDER INFORMATION
LEAD FREE FINISH
TAPE AND REEL
PART MARKING* PACKAGE DESCRIPTION
TEMPERATURE RANGE
10-Lead (3mm × 2mm) Plastic DFN 0°C to 70°C
10-Lead (3mm × 2mm) Plastic DFN –40°C to 85°C
LTC2919CDDB-2.5#TRMPBF
LTC2919IDDB-2.5#TRMPBF
LTC2919HDDB-2.5#TRMPBF
LTC2919CDDB-3.3#TRMPBF
LTC2919IDDB-3.3#TRMPBF
LTC2919HDDB-3.3#TRMPBF
LTC2919CDDB-5#TRMPBF
LTC2919IDDB-5#TRMPBF
LTC2919HDDB-5#TRMPBF
LTC2919CMS-2.5#PBF
LTC2919CDDB-2.5#TRPBF
LTC2919IDDB-2.5#TRPBF
LTC2919HDDB-2.5#TRPBF
LTC2919CDDB-3.3#TRPBF
LTC2919IDDB-3.3#TRPBF
LTC2919HDDB-3.3#TRPBF
LTC2919CDDB-5#TRPBF
LTC2919IDDB-5#TRPBF
LTC2919HDDB-5#TRPBF
LTC2919CMS-2.5#TRPBF
LTC2919IMS-2.5#TRPBF
LTC2919HMS-2.5#TRPBF
LTC2919CMS-3.3#TRPBF
LTC2919IMS-3.3#TRPBF
LTC2919HMS-3.3#TRPBF
LDGT
LDGT
LDGT
10-Lead (3mm × 2mm) Plastic DFN –40°C to 125°C
10-Lead (3mm × 2mm) Plastic DFN 0°C to 70°C
10-Lead (3mm × 2mm) Plastic DFN –40°C to 85°C
10-Lead (3mm × 2mm) Plastic DFN –40°C to 125°C
10-Lead (3mm × 2mm) Plastic DFN 0°C to 70°C
10-Lead (3mm × 2mm) Plastic DFN –40°C to 85°C
10-Lead (3mm × 2mm) Plastic DFN –40°C to 125°C
LDMW
LDMW
LDMW
LDMX
LDMX
LDMX
LTDGS
LTDGS
LTDGS
LTDMT
LTDMT
LTDMT
10-Lead Plastic MSOP
10-Lead Plastic MSOP
10-Lead Plastic MSOP
10-Lead Plastic MSOP
10-Lead Plastic MSOP
10-Lead Plastic MSOP
0°C to 70°C
LTC2919IMS-2.5#PBF
–40°C to 85°C
–40°C to 125°C
0°C to 70°C
LTC2919HMS-2.5#PBF
LTC2919CMS-3.3#PBF
LTC2919IMS-3.3#PBF
–40°C to 85°C
–40°C to 125°C
LTC2919HMS-3.3#PBF
Rev. A
2
For more information www.analog.com
LTC2919
LEAD FREE FINISH
TAPE AND REEL
PART MARKING* PACKAGE DESCRIPTION
TEMPERATURE RANGE
0°C to 70°C
LTC2919CMS-5#PBF
LTC2919CMS-5#TRPBF
LTC2919IMS-5#TRPBF
LTC2919HMS-5#TRPBF
LTDMV
LTDMV
LTDMV
10-Lead Plastic MSOP
10-Lead Plastic MSOP
10-Lead Plastic MSOP
LTC2919IMS-5#PBF
–40°C to 85°C
LTC2919HMS-5#PBF
–40°C to 125°C
AUTOMOTIVE PRODUCTS**
LTC2919IDDB-2.5#WTRMPBF
LTC2919HDDB-2.5#WTRMPBF
LTC2919IDDB-3.3#WTRMPBF
LTC2919HDDB-3.3#WTRMPBF
LTC2919IDDB-5#WTRMPBF
LTC2919HDDB-5#WTRMPBF
LTC2919IDDB-2.5#WTRPBF
LTC2919HDDB-2.5#WTRPBF
LTC2919IDDB-3.3#WTRPBF
LTC2919HDDB-3.3#WTRPBF
LTC2919IDDB-5#WTRPBF
LTC2919HDDB-5#WTRPBF
LDGT
10-Lead (3mm × 2mm) Plastic DFN –40°C to 85°C
10-Lead (3mm × 2mm) Plastic DFN –40°C to 125°C
10-Lead (3mm × 2mm) Plastic DFN –40°C to 85°C
10-Lead (3mm × 2mm) Plastic DFN –40°C to 125°C
10-Lead (3mm × 2mm) Plastic DFN –40°C to 85°C
10-Lead (3mm × 2mm) Plastic DFN –40°C to 125°C
LDGT
LDMW
LDMW
LDMX
LDMX
Contact the factory for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
Tape and reel specifications. Some packages are available in 500 unit reels through designated sales channels with #TRMPBF suffix.
**Versions of this part are available with controlled manufacturing to support the quality and reliability requirements of automotive applications. These
models are designated with a #W suffix. Only the automotive grade products shown are available for use in automotive applications. Contact your
local Analog Devices account representative for specific product ordering information and to obtain the specific Automotive Reliability reports for
these models.
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VCC = 2.5V (LTC2919-2.5), VCC = 3.3V (LTC2919-3.3), VCC = 5V
(LTC2919-5), ADJ1 = ADJ2 = 0.55V, SEL = floating, unless otherwise noted. (Note 2)
SYMBOL
PARAMETER
CONDITIONS
MIN
0.5
TYP
MAX
UNITS
l
l
V
V
Operating Supply Voltage
RST, OUT1, OUT2 in Correct State
V
V
CC(MIN)
V
V
Shunt Regulation Voltage
Input Current
I
= 1mA, I = 0
6.0
6.5
7.1
CC(SHUNT)
CC
CC
CC
REF
l
l
I
2.175V < V < 6V (C-Grade, I-Grade)
50
50
220
280
µA
µA
CC
CC
2.175V < V < 6V (H-Grade)
CC
V
ADJ Input Threshold
495.0
492.5
500
500
505.0
507.5
mV
mV
RT
l
DV
ADJ Hysteresis (Note 4)
ADJ Input Current
TMR = V
1.5
3.5
10.0
mV
RT
CC
l
l
I
V
ADJ
V
ADJ
= 0.55V (C-Grade, I-Grade)
= 0.55V (H-Grade)
0
0
15
40
nA
nA
ADJ
l
l
l
V
V
–10% UVLO Threshold
CC
LTC2919-2.5
LTC2919-3.3
LTC2919-5
2.175
2.871
4.350
2.213
2.921
4.425
2.250
2.970
4.500
V
V
V
CC(UVLO)
DV
UVLO Hysteresis (Note 4)
Buffered Reference Voltage
TMR = V
0.3
0.7
2.0
%
CC(UVLO)
CC
V
V
> 2.175V, I =
REF
1mA
0.990
0.985
1.000
1.000
1.010
1.015
V
V
REF
CC
l
l
l
l
l
I
I
t
t
TMR Pull-Up Current
V
TMR
V
TMR
C
TMR
V
TMR
= 1V
–1.5
1.5
15
–2.2
2.2
20
–2.9
2.9
27
µA
µA
TMR(UP)
TMR Pull-Down Current
= 1V
TMR(DOWN)
RST(EXT)
RST(INT)
Reset Timeout Period, External
Reset Timeout Period, Internal
= 2.2nF
= 0V
ms
ms
140
200
280
Rev. A
3
For more information www.analog.com
LTC2919
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VCC = 2.5V (LTC2919-2.5), VCC = 3.3V (LTC2919-3.3), VCC = 5V
(LTC2919-5), ADJ1 = ADJ2 = 0.55V, SEL = floating, unless otherwise noted. (Note 2)
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
l
V
Timer Disable Voltage
V
TMR
Rising
V
V
V
CC
– 0.10
V
TMR(DIS)
CC
CC
– 0.40
– 0.20
l
l
l
l
DV
Timer Disable Hysteresis
V
V
V
Falling
Falling
Rising
40
100
160
mV
V
TMR(DIS)
TMR
TMR
TMR
V
Timer Internal Mode Voltage
Timer Internal Mode Hysteresis
0.10
40
0.20
100
0.40
160
TMR(INT)
DV
mV
µs
TMR(INT)
t
ADJx Comparator Propagation Delay to ADJx Driven Beyond Threshold (V ) by
50
150
800
PROP
RTX
OUT
5mV
X
l
t
V
Undervoltage Detect to RST
V
CC
CC(UVLO)
Less Than UVLO Threshold
50
150
800
µs
UV
CC
(V
) by 1%
l
l
l
V
Output Voltage Low
V
CC
V
CC
V
CC
= 0.5V, I = 5µA
= 1V, I = 100µA
= 3V, I = 2500µA
0
0
0
0.01
0.01
0.10
0.15
0.15
0.30
V
V
V
OL
l
l
I
Output Voltage High Leakage
Output = V (C-Grade, I-Grade)
0
0
1
5
µA
µA
OH
CC
Output = V (H-Grade)
CC
Three-State Input SEL
l
l
V
V
V
Low Level Input Voltage
0
0.4
V
V
IL
High Level Input Voltage
Pin Voltage when Left in Open State
Allowable Leakage When Open
SEL Input Current
1.4
0.8
V
CC
IH
I
= 0µA
0.9
17
1.0
5
V
Z
SEL
l
l
I
I
µA
µA
SEL(Z)
SEL
SEL = V or SEL = GND
25
CC
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
which exceeds 6V may exceed the rated terminal current. Operation
from higher voltage supplies requires a series dropping resistor. See
Applications Information.
Note 4: Threshold voltages have no hysteresis unless the part is in
Note 2: All currents into pins are positive; all voltages are referenced to
GND unless otherwise noted.
comparator mode. Hysteresis is one-sided, affecting only invalid-to-valid
transitions. See Applications Information.
Note 3: V maximum pin voltage is limited by input current. Since the
CC
V
pin has an internal 6.5V shunt regulator, a low impedance supply
CC
Rev. A
4
For more information www.analog.com
LTC2919
TA = 25°C, unless otherwise noted.
TYPICAL PERFORMANCE CHARACTERISTICS
ADJ Threshold Voltage
vs Temperature
VCC UVLO Threshold Variation
vs Temperature
REF Output Voltage
vs Temperature
ꢘ.ꢊ
ꢘ.ꢋ
ꢋ.ꢊ
ꢋ
ꢊꢋꢚ
ꢒ.ꢋꢒꢊ
ꢒ.ꢋꢒꢋ
ꢒ.ꢋꢋꢊ
ꢒ.ꢋꢋꢋ
ꢘ
ꢙ ꢋA
Rꢁꢌ
ꢊꢋꢕ
ꢊꢋꢙ
ꢊꢋꢖ
ꢊꢋꢋ
ꢙꢗꢚ
ꢙꢗꢕ
ꢙꢗꢙ
ꢉꢋ.ꢊ
ꢉꢘ.ꢋ
ꢉꢘ.ꢊ
ꢋ.ꢕꢕꢊ
ꢋ.ꢕꢕꢋ
ꢋ.ꢕꢗꢊ
ꢙꢗꢖ
ꢊꢋ
ꢘꢋꢋ ꢘꢗꢊ ꢘꢊꢋ
ꢉꢊꢋ ꢉꢗꢊ
ꢋ
ꢗꢊ
ꢙꢊ
ꢉꢖꢊ
ꢋ
ꢊꢋ ꢛꢊ ꢘꢋꢋ ꢘꢖꢊ ꢘꢊꢋ
ꢖꢊ
ꢀꢁꢂꢃꢁRAꢀꢄRꢁ ꢅꢆꢇꢈ
ꢉꢊꢋ
ꢊꢋ
ꢒꢋꢋ ꢒꢓꢊ ꢒꢊꢋ
ꢉꢊꢋ ꢉꢓꢊ
ꢋ
ꢓꢊ
ꢔꢊ
ꢀꢁꢂꢃꢁRAꢀꢄRꢁ ꢅꢆꢇꢈ
ꢀꢁꢂꢃꢁRAꢀꢄRꢁ ꢅꢆꢇꢈ
ꢗꢚꢘꢚ ꢒꢋꢗ
ꢖꢗꢘꢗ ꢒꢋꢘ
ꢓꢕꢒꢕ ꢐꢋꢖ
Quiescent Supply Current
vs Temperature
REF Output Load Regulation
REF Output Line Regulation
ꢔꢋ
ꢛꢋ
ꢜꢋ
ꢘꢋ
ꢊꢋ
ꢙꢋ
ꢚꢋ
ꢕꢋ
ꢍ.ꢎ
ꢍ.ꢘ
ꢎ.ꢏ
ꢎ.ꢘ
ꢐ
ꢙ ꢕ.ꢖꢐ
ꢑ
ꢙ ꢎA
Aꢝꢞꢖ ꢟ ꢋ.ꢊꢊꢠ
Aꢝꢞꢕ ꢟ ꢋ.ꢙꢊꢠ
ꢎꢁꢐ ꢟ ꢡꢃꢁꢏ
ꢃꢃ
Rꢉꢐ
ꢇ
ꢙ ꢜꢔꢎꢖꢗ
ꢇ
ꢙ ꢌꢖꢍꢗꢃ
A
A
ꢍ.ꢕ
ꢍ.ꢍ
ꢎ.ꢌ
ꢎ.ꢎ
ꢠ
ꢟ ꢊꢠ
ꢠ
ꢇꢇ
ꢟ ꢚ.ꢚꢠ
ꢇꢇ
ꢇ
ꢙ ꢕꢖꢗꢃ
ꢇ
ꢙ ꢌꢔꢖꢗ
A
A
ꢇ
A
ꢙ ꢜꢌꢔꢖꢗ
ꢇ
ꢙ ꢌꢕꢖꢗꢃ
A
ꢠ
ꢟ ꢕ.ꢊꢠ
ꢇꢇ
ꢋꢍ.ꢕ
ꢋꢍ.ꢘ
ꢋꢍ.ꢎ
ꢍꢎ.ꢌ
ꢍꢎ.ꢘ
ꢍꢎ.ꢏ
ꢇ
A
ꢙ ꢍꢘꢎꢖꢗ
ꢇ
ꢙ ꢋꢘꢍꢗꢃ
A
ꢋꢌ
ꢋꢍ.ꢖ
ꢍ
ꢍ.ꢖ
ꢌ
ꢉꢊꢋ ꢉꢕꢊ
ꢋ
ꢕꢊ ꢊꢋ ꢜꢊ ꢖꢋꢋ ꢖꢕꢊ ꢖꢊꢋ
ꢀꢁꢂꢃꢁRAꢀꢄRꢁ ꢅꢆꢇꢈ
ꢌ
ꢚ
ꢘ
ꢔ
ꢏ
ꢀꢁAꢂ ꢃꢄRRꢅꢆꢇ ꢈꢉAꢊ
ꢀꢁꢂꢂꢃꢄ ꢅꢆꢃꢇAꢈꢉ ꢊꢅꢋ
ꢕꢚꢌꢚ ꢑꢍꢘ
ꢕꢔꢖꢔ ꢗꢋꢘ
ꢌꢛꢜꢛ ꢈꢎꢔ
Reset Timeout Period
vs Capacitance
Reset Timeout Period
vs Temperature
Propagation Delay vs Overdrive
ꢗꢏꢏ
ꢖꢏꢏ
ꢕꢏꢏ
ꢑꢏꢏ
ꢚꢏꢏ
ꢘꢏꢏ
ꢐꢏꢏ
ꢏ
ꢔꢖꢋ
ꢔꢕꢋ
ꢔꢔꢋ
ꢔꢋꢋ
ꢌꢍꢍꢍꢍ
ꢌꢍꢍꢍ
ꢌꢍꢍ
ꢍꢜꢀꢁRꢜAꢝ
ꢁꢞꢀꢁRꢜAꢝꢐ ꢇ
ꢟ ꢔꢔꢠꢡ
ꢀꢂR
ꢙꢛꢋ
ꢙꢖꢋ
ꢙꢕꢋ
ꢌꢍ
ꢌ
ꢏ.ꢐ
ꢐ
ꢐꢏ
ꢐꢏꢏ
ꢍ.ꢌ
ꢌ
ꢌꢍ
ꢌꢍꢍ
ꢈꢉꢊꢋ
ꢌꢍꢍꢍ
ꢊꢋ
ꢙꢋꢋ ꢙꢔꢊ ꢙꢊꢋ
ꢉꢊꢋ ꢉꢔꢊ
ꢋ
ꢔꢊ
ꢗꢊ
ꢀꢁꢂꢃꢄꢅ ꢆꢇRꢄꢇꢈꢃAꢀꢇ ꢆAꢉꢃ ꢃꢅRꢇꢉꢅꢊꢁꢋ ꢌꢍꢎ
ꢀꢁR ꢂꢃꢄ ꢅAꢂAꢅꢃꢀAꢄꢅꢆꢇ ꢅ
ꢀꢁR
ꢀꢁꢂꢃꢁRAꢀꢄRꢁ ꢅꢆꢇꢈ
ꢘꢙꢐꢙ ꢀꢏꢗ
ꢕꢖꢌꢖ ꢗꢍꢘ
ꢔꢘꢙꢘ ꢚꢋꢘ
Rev. A
5
For more information www.analog.com
LTC2919
TA = 25°C, unless otherwise noted.
TYPICAL PERFORMANCE CHARACTERISTICS
Shunt Regulation Voltage
vs Temperature
Shunt Regulation Voltage
vs Supply Current
OUT1, OUT2, RST Output Voltage
vs VCC
ꢖ.ꢋ
ꢌ.ꢚ
ꢌ.ꢌ
ꢌ.ꢕ
ꢌ.ꢗ
ꢌ.ꢋ
ꢔ.ꢒ
ꢔ.ꢕ
ꢒ.ꢖ
ꢑ
ꢐ
ꢏ
ꢒ
ꢔ
ꢎ
ꢈ
A
ꢚ ꢕꢛꢜꢅ
Aꢖꢗꢔ ꢘ ꢎ.ꢑꢑꢅ
Aꢖꢗꢒ ꢘ ꢎ.ꢐꢑꢅ
ꢀꢉꢃ ꢘ ꢆꢂꢉꢙ
ꢔꢎꢚ ꢂꢁꢃꢃꢕꢁꢂ R ꢇꢆ ꢅ
ꢋꢋ
ꢛ
ꢇꢇ
ꢜ ꢙꢋꢝA
ꢛ
ꢇꢇ
ꢜ ꢙꢝA
ꢛ
ꢇꢇ
ꢜ ꢙꢋꢋꢞA
ꢃꢇꢋꢒꢓꢔꢓꢕꢒ.ꢑ
ꢃꢇꢋꢒꢓꢔꢓꢕꢏ.ꢏ
ꢃꢇꢋꢒꢓꢔꢓꢕꢑ
ꢒ.ꢓ
ꢒ.ꢗ
ꢉꢊꢋ
ꢋ
ꢗꢊ ꢊꢋ ꢖꢊ ꢙꢋꢋ ꢙꢗꢊ ꢙꢊꢋ
ꢀꢁꢂꢃꢁRAꢀꢄRꢁ ꢅꢆꢇꢈ
ꢉꢗꢊ
ꢗ.ꢗꢘ
ꢗ.ꢘ
ꢘ
ꢘꢗ
ꢘꢗꢗ
ꢎ
ꢔ
ꢏ
ꢐ
ꢑ
ꢒ
ꢀꢁꢂꢂꢃꢄ ꢅꢁRRꢆꢇꢈꢉ ꢊ ꢋꢌAꢍ
ꢀꢁꢂꢂꢃꢄ ꢅꢆꢃꢇAꢈꢉꢊ ꢅ ꢌꢅꢍ
ꢅꢅ
ꢋꢋ
ꢕꢙꢘꢙ ꢏꢘꢘ
ꢗꢘꢙꢘ ꢐꢙꢋ
ꢒꢓꢔꢓ ꢈꢔꢒ
OUT1, OUT2, RST Output Voltage
vs VCC
OUT1, OUT2, RST Pull-Down
Current vs VCC
OUT1, OUT2, RST Pull-Down
Current vs VCC
ꢏ
ꢎ.ꢏ
ꢎ.ꢒ
ꢎ.ꢑ
ꢎ.ꢐ
ꢎ.ꢏ
ꢙ
ꢘ
Aꢐꢛꢔ ꢜ ꢎ.ꢗꢘꢅ
Aꢐꢛꢕ ꢜ ꢎ.ꢘꢘꢅ
ꢀꢉꢃ ꢜ ꢆꢂꢉꢒ
ꢆꢁꢇꢂꢁꢇ Aꢇ ꢏꢚꢎꢔꢅ
ꢆꢁꢇꢂꢁꢇ Aꢇ ꢚꢎꢔꢅ
ꢗ
ꢖ
ꢅ
ꢋꢋ
ꢆꢁꢇꢂꢁꢇ Aꢇ ꢔꢘꢎꢓꢅ
ꢆꢁꢇꢂꢁꢇ Aꢇ ꢘꢎꢓꢅ
ꢎ.ꢎꢏ
ꢘꢙꢇꢚ ꢏꢎꢛ ꢂꢁꢃꢃꢜꢁꢂ
ꢕ
ꢔ
ꢎ
ꢎ.ꢎꢎꢏ
ꢘꢙꢇꢚ ꢏꢎꢎꢛ ꢂꢁꢃꢃꢜꢁꢂ
ꢎ.ꢎꢎꢎꢏ
ꢎ
ꢎ
ꢎ.ꢏ ꢎ.ꢐ ꢎ.ꢑ ꢎ.ꢒ ꢎ.ꢔ ꢎ.ꢕ ꢎ.ꢖ ꢎ.ꢗ
ꢎ
ꢔ
ꢕ
ꢖ
ꢗ
ꢘ
ꢎ
ꢎ.ꢘ
ꢎ.ꢕ
ꢎ.ꢖ
ꢎ.ꢗ
ꢏ
ꢀꢁꢂꢂꢃꢄ ꢅꢆꢃꢇAꢈꢉꢊ ꢅ ꢌꢅꢍ
ꢀꢁꢂꢂꢃꢄ ꢅꢆꢃꢇAꢈꢉꢊ ꢅ ꢌꢅꢍ
ꢀꢁꢂꢂꢃꢄ ꢅꢆꢃꢇAꢈꢉꢊ ꢅ ꢌꢅꢍ
ꢋꢋ
ꢋꢋ
ꢋꢋ
ꢘꢙꢏꢙ ꢈꢏꢚ
ꢐꢓꢏꢓ ꢈꢏꢑ
OUT1, OUT2, RST VOL vs Output
Sink Current
ISEL vs Temperature
ISEL vs Temperature
ꢉꢑꢋ
ꢉꢑꢌ
ꢉꢑꢖ
ꢉꢑꢗ
ꢉꢑꢒ
ꢉꢌꢋ
ꢉꢌꢌ
ꢌꢌ
ꢓ.ꢍ
ꢍ.ꢒ
ꢍ.ꢑ
ꢍ.ꢗ
ꢍ.ꢔ
ꢍ
ꢏꢁꢐ ꢘ ꢙ
ꢎꢁꢏ ꢘ ꢕꢙꢚ
ꢇꢇ
ꢏ
ꢚ ꢙꢏ
ꢈꢈ
ꢆꢀ ꢃꢁꢐꢐꢜꢁꢃ R
ꢌꢋ
ꢍꢖ
ꢍꢗ
ꢍꢒ
ꢍꢌ
ꢍꢋ
ꢂ ꢚ ꢓꢘꢍꢛꢈ
A
ꢂ ꢚ ꢔꢘꢛꢈ
A
ꢂ ꢚ ꢓꢔꢘꢛꢈ
A
ꢂ ꢚ ꢝꢗꢍꢛꢈ
A
ꢉꢊꢋ ꢉꢌꢊ
ꢋ
ꢌꢊ ꢊꢋ ꢓꢊ ꢑꢋꢋ ꢑꢌꢊ ꢑꢊꢋ
ꢀꢁꢂꢃꢁRAꢀꢄRꢁ ꢅꢆꢇꢈ
ꢉꢊꢋ ꢉꢌꢊ
ꢋ
ꢌꢊ ꢊꢋ ꢓꢊ ꢍꢋꢋ ꢍꢌꢊ ꢍꢊꢋ
ꢀꢁꢂꢃꢁRAꢀꢄRꢁ ꢅꢆꢇꢈ
ꢍ
ꢘ
ꢓꢍ
ꢓꢘ
ꢔꢍ
ꢔꢘ
ꢙꢍ
ꢀꢁꢂꢃꢁꢂ ꢄꢅꢆꢇ ꢈꢁRRꢉꢆꢂ ꢊꢋAꢌ
ꢌꢔꢑꢔ ꢕꢑꢓ
ꢌꢔꢍꢔ ꢕꢍꢖ
ꢔꢕꢓꢕ ꢖꢓꢑ
Rev. A
6
For more information www.analog.com
LTC2919
PIN FUNCTIONS (DFN/MSOP)
SEL (Pin 1): Input Polarity Select Three-State Input.
REF (Pin 7): Buffered Reference Output. 1V nominal refer-
ence used for the offset of negative-monitoring applica-
tions. The buffered reference can source and sink up to
1mA. The reference can drive a capacitive load of up to
1000pF. Larger capacitance may degrade transient per-
formance. This pin does not require a bypass capacitor,
nor is one recommended. Leave open if unused.
Connect to V , GND or leave unconnected in open state
CC
to select one of three possible input polarity combinations
(refer to Table 1).
V
(Pin 2): Power Supply. Bypass this pin to ground with
aC0C.1μF (or greater) capacitor. Operates as a direct supply
input for voltages up to 6V. Operates as a shunt regulator
for supply voltages greater than 6V and should have a
resistor between this pin and the supply to limit V input
current to no greater than 10mA. When used wCitChout a
current-limiting resistor, pin voltage must not exceed 6V.
TMR (Pin 8): Reset Timeout Control. Attach an external
capacitor (CTMR) to GND to set a reset timeout period
of 9ms/nF. A low leakage ceramic capacitor is recom-
mended for timer accuracy. Capacitors larger than 1μF
(9 second timeout) are not recommended. See
Applications Information for further details. Leaving this
pin open generates a minimum timeout of approximately
400μs. A 2.2nF capacitor will generate a 20ms timeout.
Tying this pin to ground will enable the internal 200ms
UVLO options allow V to be used as an accurate third
fixed -10% UV supply monitor.
CC
OUT1 (Pin 3): Open-Drain Logic Output 1. Asserts low
when positive polarity ADJ1 voltage is below threshold or
negative polarity ADJ1 voltage is above threshold. Requires
timeout. Tying this pin to V will disable the reset timer
CC
an external pull-up resistor and may be pulled above V .
CC
and put the part in comparator mode. Signals from the
OUT2 (Pin 4): Open-Drain Logic Output 2. Asserts low
when positive polarity ADJ2 voltage is below threshold
or negative polarity ADJ2 voltage is above threshold.
Requires an external pull-up resistor and may be pulled
comparator outputs will then go directly to RST.
ADJ2 (Pin 9): Adjustable Voltage Input 2. Input to volt-
age monitor comparator 2 (0.5V nominal threshold). The
polarity of the input is selected by the state of the SEL
pin (refer to Table 1). Tie to GND if unused (with SEL =
GND or Open).
above V .
CC
RST (Pin 5): Open-Drain Inverted Reset Logic Output.
Asserts low when any positive polarity input voltage is
below threshold or any negative polarity input voltage is
ADJ1 (Pin 10): Adjustable Voltage Input 1. Input to volt-
age monitor comparator 1 (0.5V nominal threshold). The
polarity of the input is selected by the state of the SEL
pin (refer to Table 1). Tie to REF if unused (with SEL =
above threshold or V is below UVLO threshold. Held
CC
low for a timeout period after all voltage inputs are valid.
Requires an external pull-up resistor and may be pulled
V
or Open).
CC
above V .
CC
Exposed Pad (Pin 11, DFN Only): The Exposed Pad may
be left unconnected. For better thermal contact, tie to a
PCB trace. This trace must be grounded or unconnected.
GND (Pin 6): Device Ground.
Rev. A
7
For more information www.analog.com
LTC2919
BLOCK DIAGRAM
ꢅꢉꢈ
ꢙ
ꢐꢐ
ꢙ
ꢐꢐ
ꢚ.ꢛꢙ
ꢆꢎRꢉꢉꢏꢅꢆAꢆꢉ
ꢂꢉꢐꢍꢂꢉ
ꢍꢄꢆꢒ
ꢆꢑR
ꢐꢍꢌꢆRꢍꢈ ꢓ
ꢐꢍꢌꢆRꢍꢈ ꢒ
Aꢂꢃꢒ
ꢁ
ꢀ
ꢙ
ꢐꢐ
ꢆꢎRꢉꢉꢏꢅꢆAꢆꢉ
ꢂꢉꢐꢍꢂꢉ
AꢂꢃꢄꢅꢆAꢇꢈꢉ
ꢊꢄꢈꢅꢉ
Rꢅꢆ
ꢋꢉꢌꢉRAꢆꢍR
ꢁ
ꢀ
ꢉꢌ
ꢋꢌꢂ
ꢓꢕꢕꢖꢗ
ꢊꢄꢈꢅꢉ
ꢋꢉꢌꢉRAꢆꢍR
ꢍꢄꢆꢓ
Aꢂꢃꢓ
ꢁ
ꢀ
SEL CONTROL 1 CONTROL 2
ꢁ
ꢛꢕꢕꢖꢙ
ꢋꢌꢂ
ꢍꢊꢉꢌ
ꢙ
ꢐꢐ
ꢎ
ꢈ
ꢈ
ꢎ
ꢎ
ꢈ
ꢀ
ꢁ
ꢀ
Rꢉꢘ
ꢁ
ꢀ
ꢒ.ꢕꢕꢕꢙ
ꢐꢍꢌꢆRꢍꢈ ꢜ ꢎ ꢜ ꢌꢉꢋAꢆꢝꢙꢉ ꢊꢍꢈARꢝꢆꢞ
ꢐꢍꢌꢆRꢍꢈ ꢜ ꢈ ꢜ ꢊꢍꢅꢝꢆꢝꢙꢉ ꢊꢍꢈARꢝꢆꢞ
ꢓꢔꢒꢔ ꢇꢂ
TIMING DIAGRAM
Positive Polarity Input Timing
ꢅ
Rꢃ
ꢌ Δꢅ
Rꢃ
ꢅ
Aꢄꢑ
ꢅ
Rꢃ
ꢍ
ꢍ
Rꢏꢃ
ꢎRꢊꢎ
ꢂꢅ
Rꢏꢃ
ꢊꢈꢃ
ꢍ
ꢎRꢊꢎ
ꢍ
ꢎRꢊꢎ
ꢂꢅ
Negative Polarity Input Timing
ꢅ
Rꢃ
ꢅ
Aꢄꢑ
ꢅ
Rꢃ
ꢐ Δꢅ
Rꢃ
ꢍ
ꢍ
Rꢏꢃ
ꢎRꢊꢎ
Rꢏꢃ
ꢊꢈꢃ
ꢂꢅ
ꢂꢅ
ꢍ
ꢎRꢊꢎ
ꢍ
ꢎRꢊꢎ
UVLO Timing
ꢅ
ꢅ
ꢅ
ꢌ Δꢅ
ꢆꢆ ꢆꢆꢇꢈꢅꢉꢊꢋ
ꢆꢆꢇꢈꢅꢉꢊꢋ ꢆꢆꢇꢈꢅꢉꢊꢋ
ꢍ
ꢈꢅ
ꢍ
Rꢏꢃ
Rꢏꢃ
ꢊꢈꢃ
ꢂꢅ
ꢂꢅ
NOTES:
Rꢃ
ꢆꢛꢜꢘꢝꢞꢝꢍꢛꢞ ꢟꢛꢠe
ꢍ
ꢍ
ꢎRꢊꢎ
ꢎRꢊꢎ
ꢂ. Δꢅ Aꢒꢄ Δꢅ
ꢓ ꢔꢕ eꢖꢗeꢘꢍ ꢙꢚ
ꢆꢆꢇꢈꢅꢉꢊꢋ
ꢀ. ꢡꢒ ꢆꢊꢟꢎARAꢃꢊR ꢟꢊꢄꢢꢕ ꢍ .
ꢓ ꢍ
ꢀꢁꢂꢁ ꢃꢄ
Rꢏꢃ ꢎRꢊꢎ
Rev. A
8
For more information www.analog.com
LTC2919
APPLICATIONS INFORMATION
The LTC2919 is a low power, high accuracy triple/dual
supply monitor with two adjustable inputs and an accurate
UVLO that can monitor a third supply. Reset timeout may
be selected with an external capacitor, set to an internally
generated 200ms, or disabled entirely.
Shunt Regulator
The LTC2919 contains an internal 6.5V shunt regulator on
the V pin to allow operation from a high voltage supply.
CC
To operate the part from a supply higher than 6V, the V
CC
pin must have a current-limiting series resistor, R , to
CC
the supply. This resistor should be sized according to the
following equation:
The three-state polarity select pin (SEL) chooses one of
three possible polarity combinations for the adjustable
input thresholds, as described in Table 1. An individual
output is released when its corresponding ADJ input is
valid (above threshold if configured for positive polarity,
below threshold if configured for negative polarity).
V
– 6.2V
V
– 6.8V
S(MAX)
S(MIN)
≤ R
≤
CC
10mA
200µA + I
REF
where VS(MIN) and VS(MAX) are the operating minimum
and maximum of the supply, and IREF is the maximum cur-
rent the user expects to draw from the reference output.
Both input voltages (V
CC
and V
) must be valid and
ADJ1
ADJ2
V
above the UVLO threshold for longer than the reset
timeout period before RST is released. The LTC2919
asserts the reset output during power-up, power-down
and brownout conditions on any of the voltage inputs.
As an example, consider operation from an automobile bat-
tery which might dip as low as 10V or spike to 60V. Assume
that the user will be drawing 100μA from the reference. We
must then pick a resistance between 5.4k and 10.7k.
Power-Up
When the VCC pin is connected to a low impedance supply,
it is important that the supply voltage never exceed 6V,
or the shunt regulator may begin to draw large currents.
Some supplies may have a nominal value sufficiently
close to the shunt regulation voltage to prevent sizing of
the resistor according to the above equation. For such
supplies, a 470Ω series resistor may be used.
The LTC2919 uses proprietary low voltage drive circuitry
for the RST, OUT1 and OUT2 pins which holds them low
with V as low as 200mV. This helps prevent indeter-
CC
minate voltages from appearing on the outputs during
power-up.
In applications where the low voltage pull-down capabil-
ity is important, the supply to which the external pull-up
resistor connects should be the same supply which pow-
ers the part. Using the same supply for both ensures that
RST, OUT1 and OUT2 never float above 200mV during
power-up, as the pull-down ability of the pin will then
increase as the required pull-down current to maintain a
logic low increases.
Adjust Polarity Selection
The external connection of the SEL pin selects the polari-
ties of the LTC2919 adjustable inputs. SEL may be con-
nected to GND, connected to VCC or left unconnected
during normal operation. When left unconnected, the
maximum leakage allowable from the pin is 5µA. Table 1
shows the three possible selections of polarity based on
SEL connection.
Once V passes the UVLO threshold, polarity selection
CC
and timer initialization will occur. If the monitored ADJ
input is valid, the corresponding OUT will be released.
When both ADJ1 and ADJ2 are valid, the appropriate
timeout delay will begin, after which RST will be released.
Table 1. Voltage Threshold Selection
ADJ1 INPUT
ADJ2 INPUT
SEL
Positive Polarity
(+) UV or (–) OV
Positive Polarity
(+) UV or (–) OV
V
CC
Power-Down
Positive Polarity
(+) UV or (–) OV
Negative Polarity
(–) UV or (+) OV
Open
On power-down, once V drops below the UVLO thresh-
CC
Negative Polarity
(–) UV or (+) OV
Negative Polarity
(–) UV or (+) OV
old or either V becomes invalid, RST asserts logic low.
Ground
ADJ
V
CC
of at least 0.5V guarantees a logic low of 0.15V at RST.
Note: Open = open circuit or driven by a three-state buffer in high impedance
state with leakage current less than 5μA.
Rev. A
9
For more information www.analog.com
LTC2919
APPLICATIONS INFORMATION
If the user’s application requires, the SEL pin may be
opposite is true for a “positive polarity” input (–OV or
+UV). These polarity definitions are also shown in Table 1.
For purposes of this data sheet, a negative voltage is con-
sidered “undervoltage” if it is closer to ground than it
should be (e.g., –4.3V for a –5V supply).
driven using a three-state buffer which satisfies the V ,
IL
V and leakage conditions of this three-state input pin.
IH
If the state of the SEL pin configures a given input as
“negative polarity,” the voltage at that ADJ pin must be
below the trip point (0.5V nominal), or the correspond-
ing OUT and RST output will be pulled low. Conversely,
if a given input is configured as “positive polarity”, the
ADJ pin voltage must be above the trip point or the cor-
responding OUT and RST will assert low.
Proper configuration of the SEL pin and setting of the
trip-points via external resistors allows for any two fault
conditions to be detected. For example, the LTC2919 may
monitor two supplies (positive, negative or one of each)
for UV or for OV (or one UV and one OV). It may also
monitor a single supply (positive or negative) for both
UV and OV. Table 2a and Table 2b show example con-
figurations for monitoring possible combinations of fault
condition and supply polarity.
Thus, a “negative polarity” input may be used to deter-
mine whether a monitored negative voltage is smaller in
absolute value than it should be (–UV), or a monitored
positive voltage is larger than it should be (+OV). The
Table 2a. Possible Combinations of Supply Monitoring. For Example Purposes, All Supplies are Monitored at 5% Tolerance and
Connections are Shown Only for ADJ1, ADJ2, REF, SEL, OUT1 and OUT2. Output Pull-up Resistors are Omitted for Clarity.
SEL = V
SEL = GND
CC
ꢂꢊꢋ
ꢊꢋ
ꢕꢂꢊꢋ
ꢕꢊꢋ
R
R
R
R
ꢖꢃꢍ
ꢂꢏꢐꢎ
ꢌꢃA
ꢌꢃꢍ
ꢖꢃA
ꢏꢑꢒꢎ
ꢂꢂꢊꢎ
ꢏꢑꢒꢎ
Aꢀꢁꢂ ꢄꢅꢆꢂ
Aꢀꢁꢃ ꢄꢅꢆꢃ
ꢂꢁ ꢙꢂꢊꢋꢚ
ꢂꢁ ꢙꢊꢋꢚ
Aꢀꢁꢂ ꢄꢅꢆꢂ
Aꢀꢁꢃ ꢄꢅꢆꢃ
ꢂꢁ ꢙꢕꢂꢊꢋꢚ
ꢂꢁ ꢙꢕꢊꢋꢚ
R
R
R
R
ꢖꢂꢍ
ꢂꢏ.ꢏꢎ
ꢌꢂA
ꢌꢂꢍ
ꢖꢂA
ꢂꢂ.ꢊꢎ
ꢂꢏ.ꢐꢎ
ꢂꢑ.ꢐꢎ
Rꢈꢓ
ꢇꢈꢉ
Rꢈꢓ
ꢇꢈꢉ
2 Positive UV
2 Negative UV
ꢕꢂꢊꢋ
ꢕꢊꢋ
ꢂꢊꢋ
ꢊꢋ
R
R
R
R
ꢌꢃꢍ
ꢂꢏꢏꢎ
ꢖꢃA
ꢖꢃꢍ
ꢌꢃA
ꢂ.ꢑꢃꢘ
ꢂꢏꢐꢎ
ꢔꢂꢒꢎ
Aꢀꢁꢂ ꢄꢅꢆꢂ
Aꢀꢁꢃ ꢄꢅꢆꢃ
ꢀꢁ ꢙꢕꢂꢊꢋꢚ
ꢀꢁ ꢙꢕꢊꢋꢚ
Aꢀꢁꢂ ꢄꢅꢆꢂ
Aꢀꢁꢃ ꢄꢅꢆꢃ
ꢀꢁ ꢙꢂꢊꢋꢚ
ꢃꢁ ꢙꢊꢋꢚ
R
R
R
R
ꢌꢂꢍ
ꢂꢏ.ꢐꢎ
ꢖꢂA
ꢖꢂꢍ
ꢌꢂA
ꢏꢑ.ꢒꢎ
ꢂꢂ.ꢗꢎ
ꢃꢑꢎ
Rꢈꢓ
ꢇꢈꢉ
Rꢈꢓ
ꢇꢈꢉ
2 Negative OV
2 Positive OV
ꢂꢊꢋ
ꢕꢂꢊꢋ
ꢂꢊꢋ
ꢕꢂꢊꢋ
R
R
R
R
ꢖꢃ
ꢏꢑꢒꢎ
ꢌꢃ
ꢖꢃ
ꢌꢃ
ꢏꢑꢒꢎ
ꢂ.ꢑꢃꢘ
ꢔꢂꢒꢎ
Aꢀꢁꢂ ꢄꢅꢆꢂ
Aꢀꢁꢃ ꢄꢅꢆꢃ
ꢂꢁ ꢙꢂꢊꢋꢚ
Aꢀꢁꢂ ꢄꢅꢆꢂ
Aꢀꢁꢃ ꢄꢅꢆꢃ
ꢀꢁ ꢙꢂꢊꢋꢚ
ꢀꢁ ꢙꢕꢂꢊꢋꢚ
ꢂꢁ ꢙꢕꢂꢊꢋꢚ
R
R
R
R
ꢖꢂ
ꢂꢑ.ꢐꢎ
ꢌꢂ
ꢖꢂ
ꢌꢂ
ꢂꢂ.ꢊꢎ
ꢏꢑ.ꢒꢎ
ꢃꢑꢎ
Rꢈꢓ
ꢇꢈꢉ
Rꢈꢓ
ꢇꢈꢉ
1 Positive UV, 1 Negative OV
1 Positive OV, 1 Negative UV
Rev. A
10
For more information www.analog.com
LTC2919
APPLICATIONS INFORMATION
Table 2b. Possible Combinations of Supply Monitoring. For Example Purposes, All Supplies are Monitored at 5% Tolerance and
Connections are Shown Only for ADJ1, ADJ2, REF, SEL, OUT1 and OUT2. Output Pull-up Resistors are Omitted for Clarity.
SEL OPEN
ꢂꢊꢋ
ꢚꢂꢊꢋ
R
R
ꢛꢍ
ꢂ.ꢑꢃꢐ
ꢌꢍ
ꢃ.ꢎꢏꢐ
Aꢀꢁꢂ ꢄꢅꢆꢂ
Aꢀꢁꢃ ꢄꢅꢆꢃ
ꢀꢁ
ꢂꢁ
Aꢀꢁꢂ ꢄꢅꢆꢂ
Aꢀꢁꢃ ꢄꢅꢆꢃ
ꢂꢁ
ꢀꢁ
R
R
ꢛꢊ
ꢓ.ꢑꢃꢒ
ꢌꢊ
ꢂꢑ.ꢏꢒ
R
ꢌꢓ
R
ꢛꢓ
ꢎꢑ.ꢙꢒ
ꢏꢍ.ꢔꢒ
Rꢈꢕ
ꢇꢈꢉ
Rꢈꢕ
ꢇꢈꢉ
1 Positive UV and OV
1 Negative UV and OV
ꢂꢊꢋ
ꢚꢂꢊꢋ
ꢚꢂꢊꢋ
ꢂꢊꢋ
R
R
R
R
ꢌꢃ
ꢍꢂꢙꢒ
ꢌꢃ
ꢛꢃ
ꢛꢃ
ꢎꢑꢙꢒ
ꢎꢑꢙꢒ
ꢂ.ꢑꢃꢐ
Aꢀꢁꢂ ꢄꢅꢆꢂ
Aꢀꢁꢃ ꢄꢅꢆꢃ
ꢀꢁ ꢖꢂꢊꢋꢗ
Aꢀꢁꢂ ꢄꢅꢆꢂ
Aꢀꢁꢃ ꢄꢅꢆꢃ
ꢂꢁ ꢖꢚꢂꢊꢋꢗ
ꢂꢁ ꢖꢂꢊꢋꢗ
ꢀꢁ ꢖꢚꢂꢊꢋꢗ
R
R
R
R
ꢌꢂ
ꢃꢑꢒ
ꢌꢂ
ꢛꢂ
ꢛꢂ
ꢂꢂ.ꢊꢒ
ꢂꢑ.ꢏꢒ
ꢎꢑ.ꢙꢒ
Rꢈꢕ
ꢇꢈꢉ
Rꢈꢕ
ꢇꢈꢉ
1 Positive UV, 1 Negative UV
1 Negative OV, 1 Positive OV
ꢂꢊꢋ
ꢊꢋ
ꢚꢂꢊꢋ
ꢚꢊꢋ
R
R
ꢌꢃꢘ
ꢂꢎꢎꢒ
R
R
ꢛꢃꢘ
ꢂꢎꢏꢒ
ꢌꢃA
ꢛꢃA
ꢎꢑꢙꢒ
ꢂ.ꢑꢃꢐ
Aꢀꢁꢂ ꢄꢅꢆꢂ
Aꢀꢁꢃ ꢄꢅꢆꢃ
ꢀꢁ ꢖꢂꢊꢋꢗ
ꢂꢁ ꢖꢊꢋꢗ
Aꢀꢁꢂ ꢄꢅꢆꢂ
Aꢀꢁꢃ ꢄꢅꢆꢃ
ꢂꢁ ꢖꢚꢂꢊꢋꢗ
ꢀꢁ ꢖꢚꢊꢋꢗ
R
R
R
R
ꢌꢂA
ꢌꢂꢘ
ꢛꢂA
ꢛꢂꢘ
ꢂꢂ.ꢊꢒ
ꢂꢎ.ꢏꢒ
ꢎꢑ.ꢙꢒ
ꢂꢎ.ꢎꢒ
Rꢈꢕ
ꢇꢈꢉ
Rꢈꢕ
ꢇꢈꢉ
1 Positive UV, 1 Positive OV
1 Negative UV, 1 Negative OV
Adjust Input Trip Point
To prevent nuisance resets, the supervisor threshold must
be guaranteed to lie outside the power supply tolerance
band. To ensure that the threshold lies outside the power
supply tolerance range, the nominal threshold must lie
outside that range by the monitor’s accuracy specification.
The trip threshold for the supplies monitored by the
adjustable inputs is set with an external resistor divider,
allowing the user complete control over the trip point.
Selection of this trip voltage is crucial to the monitoring
of the system.
All three of the LTC2919 inputs (ADJ1, ADJ2, V UVLO)
CC
have the same maximum threshold accuracy of 1.5%
of the programmed nominal input voltage (over the
full operating temperature range). Therefore, using the
LTC2919, the typical 10% UV threshold is at 11.5% below
the nominal input voltage level. For a 5V input, the thresh-
old is nominally 4.425V. With 1.5% accuracy, the trip
Any power supply has some tolerance band within which
it is expected to operate (e.g., 5V 10%). It is gener-
ally undesirable that a supervisor issue a reset when the
power supply is inside this tolerance band. Such a “nui-
sance” reset reduces reliability by preventing the system
from functioning under normal conditions.
Rev. A
11
For more information www.analog.com
LTC2919
APPLICATIONS INFORMATION
threshold range is 4.425V 75mV over temperature (i.e.,
10% to 13% below 5V). The monitored system must thus
operate reliably down to 4.35V or 13% below 5V over
temperature.
TMR pin to V ). If hysteresis is desired in other modes,
it may be added externally. See 48V Telecom UV/OV with
Hysteresis Applications on page 14 for an example.
CC
Selecting External Resistors
The above discussion is concerned only with the DC value
of the monitored supply. Real supplies also have relatively
high frequency variations from sources such as load tran-
sients, noise and pickup.
In a typical positive supply monitoring application, the
ADJx pin connects to a tap point on an external resistive
divider between a positive voltage being monitored and
ground, as shown in Figure 1.
The LTC2919 uses two techniques to combat spurious
outputs toggling from high frequency variation. First,
the timeout period helps prevent high frequency varia-
When monitoring a negative supply, the ADJx pin con-
nects to a tap point on a resistive divider between the
negative voltage being monitored and the buffered refer-
ence (REF), as shown in Figure 2.
tion whose frequency is above 1/ t
from appearing at
RST
the RST output. Second, the propagation delay versus
overdrive function filters short glitches before the OUT1,
OUT2 toggling or RST pulling low.
ꢄ
ꢌꢍꢎ
When an ADJ becomes invalid, the corresponding OUT
and RST pin assert low. When the supply recovers past
the valid threshold, the reset timer starts (assuming it is
not disabled) and RST does not go high until it finishes.
If the supply becomes invalid any time during the timeout
period, the timer resets and starts fresh when the supply
next becomes valid.
R
ꢏꢅ
ꢏꢇ
Aꢉꢊꢋ
ꢂ.ꢃꢄ
ꢁ
ꢀ
R
ꢁ
ꢀ
ꢅꢆꢇꢆ ꢈꢂꢇ
To reduce sensitivity of short glitches from toggling the
output pins, the comparator outputs go through a low-
pass filter before triggering the output logic. Any transient
at the input of a comparator needs to be of sufficient
magnitude and duration to pass the filter before it can
change the monitor state.
Figure 1. Setting Positive Supply Trip Point
Rꢌꢈ
R
R
ꢏꢇ
ꢏꢅ
Aꢉꢊꢋ
ꢂ.ꢃꢄ
ꢁ
ꢀ
The combination of the reset timeout and comparator
filtering prevents spurious changes in the output state
without sacrificing threshold accuracy. If further supply
glitch immunity is needed, the user may place an external
capacitor from the ADJ input to ground. The resultant RC
lowpass filter with the resistor divider will further reject
high frequency components of the supply, at the cost of
slowing the monitor’s response to fault conditions.
ꢄ
ꢍꢎꢏ
ꢁ
ꢀ
ꢅꢆꢇꢆ ꢈꢂꢅ
Figure 2. Setting Negative Supply Trip Point
Normally the user will select a desired trip voltage based
on their supply and acceptable tolerances, and a value of
A common solution to the problem of spurious reset is
to introduce hysteresis around the nominal threshold.
However, this hysteresis degrades the effective accuracy
of the monitor and increases the range over which the
system must operate. The LTC2919 therefore does not
have hysteresis, except in comparator mode (by tying
R
or R based on current draw. Current used by the
N1
P1
resistive divider will be approximately:
0.5V
0.5V
I =
.OR =
R
R
P1
N1
Rev. A
12
For more information www.analog.com
LTC2919
APPLICATIONS INFORMATION
To minimize errors arising from ADJ input bias and to
Rꢌꢈ
minimize loading on REF choose resistor RP1 (for positive
Aꢊꢋꢇ
ꢓꢎꢔꢕꢖ
ꢗ
ꢎꢘꢌꢏ
ꢊRAꢕꢏ
ꢍꢎꢙꢈꢌꢒ
ꢁ
ꢀ
supply monitoring) or R (for negative supply monitor-
N1
ꢎꢑꢒꢇ
ꢀꢁ
ing) in the range of 5k to 100k.
R
R
ꢏꢉ
For a positive-monitoring application, R is then chosen
P2
ꢏꢃ
ꢏꢐ
by:
Aꢊꢋꢅ
ꢂ.ꢃꢄ
ꢓꢎꢔꢕꢖ
ꢗ
ꢎꢘꢌꢏ
ꢊRAꢕꢏ
ꢍꢎꢙꢈꢌꢒ
ꢁ
ꢀ
ꢎꢑꢒꢅ
R
ꢂꢁ
R
P2
= R (2V
– 1)
P1
TRIP
ꢀꢄ
ꢍꢎꢏ
For a negative-monitoring application:
ꢁ
ꢀ
R
N2
= R (1 – 2V
)
N1
TRIP
ꢅꢆꢇꢆ ꢈꢂꢉ
Note that the value V
tive application.
should be negative for a nega-
TRIP
Figure 4. Setting UV and OV Trip Point for a Negative Supply
For example, consider monitoring a –5V supply at 10%.
For this supply application: VOV = –5.575V and VUV
The LTC2919 can also be used to monitor a single sup-
ply for both UV and OV. This may be accomplished with
three resistors, instead of the four required for two inde-
pendent supplies. Configurations are shown in Figure 3 and
Figure 4. RP4 or RN4 may be chosen as is RP1 or RN1 above.
=
–4.425V. Suppose we wish to consume about 5μA in the
divider, so R = 100k. We then find R = 21.0k, R
=
N6
N4
N5
1.18M (nearest 1% standard values have been chosen).
V Monitoring/UVLO
CC
For a given R , monitoring a positive supply:
P4
The LTC2919 contains an accurate third -10% undervolt-
age monitor on the VCC pin. This monitor is fixed at a
V
– V
UV
OV
R
R
= R
= R
P5
P6
P4
P4
V
UV
nominal 11.5% below the V specified in the part num-
CC
V
OV
ber. The standard part (LTC2919-2.5) is configured to
monitor a 2.5V supply (UVLO threshold of 2.213V), but
versions to monitor 3.3V and 5.0V (UVLO of 2.921V and
4.425V, respectively) are available.
2V – 1
(
)
UV
V
UV
For monitoring a negative supply with a given R :
N4
For applications that do not need VCC monitoring, the 2.5V
version should be used, and the UVLO will simply guaran-
tee that the VCC is above the minimum required for proper
threshold and timer accuracy before the timeout begins.
V
– V
OV
UV
R
R
= R
= R
N5
N6
N4
N4
1– V
UV
1– V
OV
1– 2V
(
)
UV
1– V
UV
Setting the Reset Timeout
Aꢊꢋꢇ
ꢔꢌꢕꢖꢗ
ꢘ
ꢌꢑꢙꢐ
ꢊRAꢖꢐ
ꢏꢌꢚꢈꢙꢎ
RST goes high after a reset timeout period set by the TMR
pin when the VCC and ADJ inputs are valid. This reset
timeout may be configured in one of three ways: internal
200ms, programmed by external capacitor and no timeout
(comparator mode).
ꢁ
ꢀ
ꢄ
ꢏꢌꢐ
ꢌꢍꢎꢇ
ꢌꢍꢎꢅ
ꢀꢁ
ꢂꢁ
R
ꢑꢒ
R
ꢑꢃ
ꢑꢓ
Aꢊꢋꢅ
ꢂ.ꢃꢄ
ꢔꢌꢕꢖꢗ
ꢘ
ꢌꢑꢙꢐ
ꢊRAꢖꢐ
ꢏꢌꢚꢈꢙꢎ
ꢁ
ꢀ
R
In externally-controlled mode, the TMR pin is connected
by a capacitor to ground. The value of that capacitor allows
for selection of a timeout ranging from about 400μs to 9
seconds. See the following section for details.
ꢁ
ꢀ
ꢅꢆꢇꢆ ꢈꢂꢉ
Figure 3. Setting UV and OV Trip Point for a Positive Supply
Rev. A
13
For more information www.analog.com
LTC2919
APPLICATIONS INFORMATION
If the user wishes to avoid having an external capacitor,
the TMR pin should be tied to ground, switching the part
to an internal 200ms timer.
Leaving the TMR pin open with no external capacitor gen-
erates a reset timeout of approximately 400μs.
Maximum length of the reset timeout is limited by the
ability of the part to charge a large capacitor on start-up.
Initially, with a large (discharged) capacitor on the TMR
pin, the part will assume it is in internal timer mode (since
the pin voltage will be at ground). If the 2.2μA flowing
out of the TMR pin does not charge the capacitor to the
ground-sense threshold within the first 200ms after sup-
plies become good, the internal timer cycle will complete
and RST will go high too soon.
If the user requires a shorter timeout than 400μs, or
wishes to perform application-specific processing of the
reset output, the part may be put in comparator mode by
tying the TMR pin to V . In comparator mode, the timer
CC
is bypassed and comparator outputs go straight to the
reset output.
The current required to hold TMR at ground or VCC is
about 2.2μA. To force the pin from the floating state to
ground or V may require as much as 100μA during the
CC
This imposes a practical limit of 1μF (9 second timeout) if
the length of timeout during power-up needs to be longer
than 200ms. If the power-up timeout is not important,
larger capacitors may be used, subject to the limitation
that the capacitor leakage current must not exceed 500nA,
or the function of the timer will be impaired.
transition.
When the part is in comparator mode, one of the two
means of preventing false reset has been removed, so
a small amount of one-sided hysteresis is added to
the inputs to prevent oscillation as the monitored volt-
age passes through the threshold. This hysteresis is
such that the valid-to-invalid transition threshold is
unchanged, but the invalid-to-valid threshold is moved
by about 0.7%. Thus, when the ADJ input polarity is posi-
tive, the threshold voltage is 500mV nominal when the
input is above 500mV. As soon as the input drops below
500mV, the threshold moves up to 503.5mV nominal.
Conversely, when configured as a negative-polarity input,
the threshold is 500mV when the input is below 500mV,
and switches to 496.5mV when the input goes above
500mV.
Output Pins Characteristics
The DC characteristics of the OUT1, OUT2 and RST pull-
down strength are shown in the Typical Performance
Characteristics section. OUT1, OUT2 and RST are open-
drain pins and thus require external pull-up resistors to
the logic supply. They may be pulled above V , providing
the absolute maximum rating of the pin areCoCbserved.
As noted in the discussion of power up and power down,
the circuits that drive OUT1, OUT2 and RST are powered
by V . During a fault condition, V of at least 0.5V guar-
CC
CC
The comparator mode feature is enabled by directly short-
antees a V of 0.15V.
OL
ing the TMR pin to the V pin. Connecting the pin to any
CC
The open-drain nature of the RST pin allows for wired-OR
connection of several LTC2919s to monitor more than two
supplies (see Typical Applications). Other logic with open-
drain outputs may also connect to the RST line, allowing
other logic-determined conditions to issue a reset.
other voltage may have unpredictable results.
Selecting the Reset Timing Capacitor
Connecting a capacitor, C
, between the TMR pin and
TMR
ground sets the reset timeout, t . The following for-
RST
mula approximates the value of capacitor needed for a
particular timeout:
C
TMR
= t
• 110 [pF/ms]
RST
Rev. A
14
For more information www.analog.com
LTC2919
TYPICAL APPLICATIONS
Six Supply Undervoltage Monitor with 2.5V Reset Output and 20ms Timeout
ꢄꢊꢀ
ꢊꢀ
ꢖꢊꢀ
ꢍꢚꢍꢆꢋꢘ
ꢖꢄꢊꢀ
ꢒ.ꢒꢀ
ꢇ.ꢊꢀ
ꢁ
ꢁ
ꢗꢚꢎꢇ
ꢄꢐꢐꢙꢌ
ꢗꢚꢎꢄ
R
R
R
ꢎꢏꢓ
ꢄꢐꢑ
ꢎꢏꢄ
ꢎꢏꢊ
ꢄꢐꢐꢙꢌ
ꢄꢐꢑ
ꢄꢐꢑ
R
R
ꢎꢏꢒ
ꢄꢐꢑ
ꢎꢏꢇ
ꢄꢐꢑ
ꢍꢚꢍꢆꢋꢘꢝꢛꢞ
R
R
ꢎꢇA
ꢔꢇA
ꢀ
ꢀ
ꢁꢁ
ꢁꢁ
ꢄꢒꢕꢑ
ꢄꢄꢊꢑ
Aꢂꢃꢄ
ꢍꢋꢅ
Aꢂꢃꢄ
ꢍꢋꢅ
R
R
ꢄꢒ.ꢒꢑ
R
R
ꢎꢇꢗ
ꢒꢐꢈꢑ
ꢔꢇꢗ
ꢔꢄA
ꢎꢄA
ꢅꢆꢁꢇꢈꢄꢈꢉꢇ.ꢊ
ꢅꢆꢁꢇꢈꢄꢈꢉꢒ.ꢒ
RST
Rꢋꢌ
ꢒꢐꢈꢑ
ꢄꢒ.ꢕꢑ
Rꢋꢌ
RST
R
R
ꢎꢄꢗ
ꢔꢄꢗ
ꢄꢐ.ꢕꢑ
ꢄꢄ.ꢊꢑ
ꢖꢊꢀꢝꢛꢞ
ꢊꢀꢝꢛꢞ
Aꢂꢃꢇ
ꢆꢘR
ꢛꢏꢆꢄ
ꢛꢏꢆꢇ
ꢛꢏꢆꢄ
ꢛꢏꢆꢇ
Aꢂꢃꢇ
ꢆꢘR
ꢇꢈꢄꢈ ꢆAꢐꢇ
ꢖꢄꢊꢀꢝꢛꢞ
ꢄꢊꢀꢝꢛꢞ
ꢁ
ꢁ
ꢆꢘRꢄ
ꢆꢘRꢇ
ꢇ.ꢇꢙꢌ
ꢜꢔꢂ
ꢜꢔꢂ
ꢇ.ꢇꢙꢌ
Rev. A
15
For more information www.analog.com
LTC2919
TYPICAL APPLICATIONS
48V Telecom UV/OV Monitor with Hysteresis
ꢀ
ꢛꢗ
ꢋꢡꢋꢆꢌꢔ
ꢘꢏꢀ ꢆꢒ ꢙꢇꢀ
R
ꢁ
ꢎꢡꢍ
ꢁꢁ
R
R
ꢍꢇꢎ
ꢍꢇA
ꢇꢙꢑ ꢄꢟꢟꢢꢕ
ꢟ.ꢇꢊꢠ
ꢄ.ꢈꢄꢔ
ꢄ.ꢞꢘꢔ
ꢊꢀ
R
ꢍꢇAꢇ
ꢔꢇ
ꢄꢏꢈꢑ
R
ꢍꢓꢘ
ꢄꢟꢑ
ꢀ
ꢁꢁ
R
Aꢂꢃꢄ
RST
ꢍꢓꢄ
ꢀ
ꢝ ꢞꢘ.ꢘꢀ
ꢝ ꢘꢐ.ꢙꢀ
ꢓꢀꢚRꢛꢋꢛꢗꢖꢜ
ꢄꢟꢑ
ꢍꢠRꢖꢂ
ꢀ
ꢓꢀꢚꢕAꢅꢅꢛꢗꢖꢜ
ꢅꢆꢁꢇꢈꢄꢈꢉꢇ.ꢊ
R
ꢍꢓꢇ
ꢀ
ꢝ ꢙꢄ.ꢏꢀ
ꢒꢀꢚRꢛꢋꢛꢗꢖꢜ
ꢝ ꢙꢟ.ꢇꢀ
ꢒꢓꢆꢄ
ꢄꢟꢑ
Aꢂꢃꢇ
ꢀ
ꢒꢀꢚꢕAꢅꢅꢛꢗꢖꢜ
ꢂꢁ
R
R
R
ꢍꢄꢎꢇ
ꢏꢐꢄꢑ
ꢍꢄA
ꢍꢄꢎ
ꢄꢐ.ꢙꢑ
ꢄꢘ.ꢙꢑ
Rꢌꢕ
ꢋꢌꢅ
ꢒꢓꢆꢇ
ꢆꢔR
ꢀꢁ
ꢔꢄ
ꢖꢗꢂ
ꢔꢄꢣ ꢔꢇꢝ ꢕꢂꢖꢏꢘꢟꢄꢗ ꢒR ꢋꢛꢔꢛꢅAR
ꢇꢈꢄꢈ ꢆAꢟꢘ
12V UV Monitor Powered from
12V, 20ms Timeout (1.8V Logic Out)
ꢁ
ꢟꢠꢔ
R
ꢁꢁ
ꢄꢑꢑꢗꢍ
ꢄꢑꢓ
ꢄ.ꢋꢀ
ꢄꢇꢀ
R
R
ꢔꢏꢕ
ꢔꢇ
ꢀ
ꢁꢁ
ꢄꢑꢓ
ꢄ.ꢑꢒꢖ
ꢄꢑꢓꢛ
R
Aꢂꢃꢄ
RST
R
ꢔꢏꢄ
ꢄꢑꢓ
ꢖAꢐꢏAꢅ
Rꢌꢝꢌꢆ
R
R
ꢔꢄ
ꢅꢆꢁꢇꢈꢄꢈꢉꢇ.ꢊ
ꢔꢏꢇ
ꢚꢈ.ꢈꢓ
ꢄꢑꢓ
ꢔꢏꢝꢞꢟꢏꢆꢆꢎꢐ
Rꢌꢍ
ꢎꢏꢆꢄ
R
ꢐꢄ
ꢐꢇ
ꢄꢇꢀꢢꢎꢣ
ꢄꢑ.ꢒꢓ
ꢇꢚꢈꢓ
ꢙꢄꢇꢀ
Aꢂꢃꢇ
ꢝꢌꢅ
ꢎꢏꢆꢇ
ꢆꢖR
ꢙꢄꢇꢀꢢꢎꢣ
ꢁ
ꢡꢐꢂ
ꢆꢖR
ꢇ.ꢇꢗꢍ
ꢇꢈꢄꢈ ꢆAꢑꢄꢘ
ꢛꢎꢔꢆꢜꢎꢐAꢅ ꢍꢎR ꢌꢝꢂ
Rev. A
16
For more information www.analog.com
LTC2919
PACKAGE DESCRIPTION
DDB Package
10-Lead Plastic DFN (3mm × 2mm)
ꢃReꢩeꢪeꢫꢬe ꢘꢋꢏ ꢆꢍꢎ ꢭ ꢁꢠꢓꢁꢮꢓꢂꢥꢀꢀ Rev ꢨꢈ
ꢁ.ꢣꢛ ±ꢁ.ꢁꢠ
ꢃꢀ ꢄꢅꢆꢇꢄꢈ
ꢁ.ꢥꢁ ±ꢁ.ꢁꢠ
ꢀ.ꢠꢠ ±ꢁ.ꢁꢠ
ꢂ.ꢂꢠ ±ꢁ.ꢁꢠ
ꢕAꢏꢖAꢎꢇ
ꢊꢗꢋꢘꢅꢉꢇ
ꢁ.ꢀꢠ ±ꢁ.ꢁꢠ
ꢁ.ꢠꢁ ꢝꢄꢏ
ꢀ.ꢚꢙ ±ꢁ.ꢁꢠ
ꢃꢀ ꢄꢅꢆꢇꢄꢈ
Rꢇꢏꢊꢑꢑꢇꢉꢆꢇꢆ ꢄꢊꢘꢆꢇR ꢕAꢆ ꢕꢅꢋꢏꢞ Aꢉꢆ ꢆꢅꢑꢇꢉꢄꢅꢊꢉꢄ
R ꢦ ꢁ.ꢂꢂꢠ
ꢁ.ꢛꢁ ±ꢁ.ꢂꢁ
ꢚ.ꢁꢁ ±ꢁ.ꢂꢁ
ꢃꢀ ꢄꢅꢆꢇꢄꢈ
ꢋꢢꢕ
ꢣ
R ꢦ ꢁ.ꢁꢠ
ꢋꢢꢕ
ꢂꢁ
ꢀ.ꢁꢁ ±ꢁ.ꢂꢁ
ꢕꢅꢉ ꢂ ꢝAR
ꢃꢀ ꢄꢅꢆꢇꢄꢈ
ꢋꢊꢕ ꢑARꢖ
ꢕꢅꢉ ꢂ
R ꢦ ꢁ.ꢀꢁ ꢊR
ꢃꢄꢇꢇ ꢉꢊꢋꢇ ꢣꢈ
ꢁ.ꢀꢠ × ꢛꢠ°
ꢁ.ꢣꢛ ±ꢁ.ꢁꢠ
ꢃꢀ ꢄꢅꢆꢇꢄꢈ
ꢁ.ꢀꢠ ±ꢁ.ꢁꢠ
ꢏꢞAꢑꢐꢇR
ꢠ
ꢂ
ꢃꢆꢆꢝꢂꢁꢈ ꢆꢐꢉ ꢁꢙꢁꢠ Rꢇꢒ ꢨ
ꢁ.ꢥꢠ ±ꢁ.ꢁꢠ
ꢁ.ꢀꢁꢁ Rꢇꢐ
ꢁ.ꢠꢁ ꢝꢄꢏ
ꢀ.ꢚꢙ ±ꢁ.ꢁꢠ
ꢃꢀ ꢄꢅꢆꢇꢄꢈ
ꢁ ꢧ ꢁ.ꢁꢠ
ꢝꢊꢋꢋꢊꢑ ꢒꢅꢇꢍꢤꢇꢜꢕꢊꢄꢇꢆ ꢕAꢆ
ꢉꢊꢋꢇꢌ
ꢂ. ꢆRAꢍꢅꢉꢎ ꢏꢊꢉꢐꢊRꢑꢄ ꢋꢊ ꢒꢇRꢄꢅꢊꢉ ꢃꢍꢇꢏꢆꢓꢂꢈ ꢅꢉ ꢔꢇꢆꢇꢏ ꢕAꢏꢖAꢎꢇ ꢊꢗꢋꢘꢅꢉꢇ ꢑꢁꢓꢀꢀꢙ
ꢀ. ꢆRAꢍꢅꢉꢎ ꢉꢊꢋ ꢋꢊ ꢄꢏAꢘꢇ
ꢚ. Aꢘꢘ ꢆꢅꢑꢇꢉꢄꢅꢊꢉꢄ ARꢇ ꢅꢉ ꢑꢅꢘꢘꢅꢑꢇꢋꢇRꢄ
ꢛ. ꢆꢅꢑꢇꢉꢄꢅꢊꢉꢄ ꢊꢐ ꢇꢜꢕꢊꢄꢇꢆ ꢕAꢆ ꢊꢉ ꢝꢊꢋꢋꢊꢑ ꢊꢐ ꢕAꢏꢖAꢎꢇ ꢆꢊ ꢉꢊꢋ ꢅꢉꢏꢘꢗꢆꢇ
ꢑꢊꢘꢆ ꢐꢘAꢄꢞ. ꢑꢊꢘꢆ ꢐꢘAꢄꢞꢟ ꢅꢐ ꢕRꢇꢄꢇꢉꢋꢟ ꢄꢞAꢘꢘ ꢉꢊꢋ ꢇꢜꢏꢇꢇꢆ ꢁ.ꢂꢠꢡꢡ ꢊꢉ Aꢉꢢ ꢄꢅꢆꢇ
ꢠ. ꢇꢜꢕꢊꢄꢇꢆ ꢕAꢆ ꢄꢞAꢘꢘ ꢝꢇ ꢄꢊꢘꢆꢇR ꢕꢘAꢋꢇꢆ
ꢣ. ꢄꢞAꢆꢇꢆ ARꢇA ꢅꢄ ꢊꢉꢘꢢ A RꢇꢐꢇRꢇꢉꢏꢇ ꢐꢊR ꢕꢅꢉ ꢂ ꢘꢊꢏAꢋꢅꢊꢉ ꢊꢉ ꢋꢞꢇ ꢋꢊꢕ Aꢉꢆ ꢝꢊꢋꢋꢊꢑ ꢊꢐ ꢕAꢏꢖAꢎꢇ
Rev. A
17
For more information www.analog.com
LTC2919
PACKAGE DESCRIPTION
MS Package
10-Lead Plastic MSOP
(Reference LTC DWG # 05-08-1ꢀꢀ1 Rev F)
0.889 0.127
(.035 .005)
5.10
(.201)
MIN
3.20 – 3.45
(.12ꢀ – .13ꢀ)
3.00 0.102
(.118 .004)
(NOTE 3)
(.0197)
0.497 0.07ꢀ
(.019ꢀ .003)
REF
0.50
0.305 0.038
(.0120 .0015)
TYP
10 9
8
7 ꢀ
BSC
RECOMMENDED SOLDER PAD LAYOUT
3.00 0.102
(.118 .004)
(NOTE 4)
4.90 0.152
(.193 .00ꢀ)
DETAIL “A”
0.254
(.010)
0° – ꢀ° TYP
GAUGE PLANE
1
2
3
4 5
0.53 0.152
(.021 .00ꢀ)
0.8ꢀ
(.034)
REF
1.10
(.043)
MAX
DETAIL “A”
0.18
(.007)
SEATING
PLANE
0.17 – 0.27
(.007 – .011)
TYP
0.101ꢀ 0.0508
(.004 .002)
0.50
(.0197)
BSC
MSOP (MS) 0213 REV F
NOTE:
1. DIMENSIONS IN MILLIMETER/(INCH)
2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.00ꢀ") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.00ꢀ") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
Rev. A
18
For more information www.analog.com
LTC2919
REVISION HISTORY (Revision history begins at Rev B)
REV
DATE
DESCRIPTION
PAGE NUMBER
A
08/19 Added AEC-Q100.
1, 3
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog
Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications
subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
19
LTC2919
TYPICAL APPLICATION
Powered from 12V, +5VOUT is Sequenced to Start-up First,
Followed by –5VOUT, with 5V UV Monitor, 200ms Timeout
ꢗꢆꢄꢀ
R
ꢜ.ꢝꢛ
ꢁꢁ
ꢁ
ꢐ.ꢆꢚꢌ
ꢘꢙꢕ
ꢗꢈꢀ
ꢀ
ꢁꢁ
R
ꢆꢆꢈꢛ
ꢕꢄ
ꢂꢃꢁꢄꢅꢆꢅꢇꢄ.ꢈ
R
ꢆꢐꢛ
ꢕꢎꢄ
ꢗꢈꢀ
ꢉꢁꢠꢉꢁ
Aꢉꢊꢆ
ꢏꢋꢂ
ꢁꢍꢔꢀꢋRꢃꢋR
R
ꢆꢞ.ꢝꢛ
ꢕꢆ
ꢕꢖRꢓꢉ
R
ꢆꢐꢛ
ꢕꢎꢞ
Rꢋꢌ
ꢍꢎꢃꢄ
R
ꢆꢞ.ꢞꢛ
ꢔꢆ
R
ꢔꢄ
ꢆꢞꢝꢛ
ꢏꢙꢏꢡRꢋꢏꢋꢃ
ꢟꢈꢀ
ꢉꢁꢠꢉꢁ
ꢁꢍꢔꢀꢋRꢃꢋR
RST
Aꢉꢊꢄ
ꢍꢎꢃꢆ
ꢃꢒR
Sꢀꢁꢂ
ꢄꢅꢆꢅ ꢃAꢐꢑ
ꢓꢔꢉ
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PART NUMBER
DESCRIPTION
COMMENTS
4.725V, 3.118V, 1V Threshold ( 0.75%)
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Individual Monitor Outputs in MSOP/5-Lead SOT-23
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1 Adjustable
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CC
LTC2908
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Precision Six Supply Monitor (Four Fixed and
2 Adjustable)
8-Lead SOT-23 and DFN Packages
8-Lead SOT-23 and DFN Packages
Precision, Dual Input UV, OV and Negative Voltage
Monitor
LTC2912-LTC2914
LTC2915-LTC2918
Single/Dual/Quad UV and OV Voltage Monitors
Single Voltage Monitor with 27 Unique Thresholds
Separate V Pin, Adjustable Reset Timer, H-Grade Temperature Range
CC
Manual Reset, Watchdog, TSOT-8/MSOP-10 and 3mm × 2mm DFN
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Rev. A
08/19
www.analog.com
20
ANALOG DEVICES, INC. 2008-2019
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