LTC3026_1208_技术文档

LTC3026

1.5A Low Input Voltage

VLDO Linear Regulator

FeaTures

DescripTion

TheLTC^®3026isaverylowdropout(VLDO™)linearregula-

tor that can operate at input voltages down to 1.14V. The

device is capable of supplying 1.5A of output current with

a typical dropout voltage of only 100mV. To allow opera-

tion at low input voltages the LTC3026 includes a boost

converter that provides the necessary headroom for the

internal LDO circuitry.

n

Input Voltage Range:

1.14V to 3.5V (with Boost Enabled)

1.14V to 5.5V (with External 5V Boost)

n

Low Dropout Voltage: 100mV at I

= 1.5A

OUT

n

Adjustable Output Range: 0.4V to 2.6V

Output Current: Up to 1.5A

Excellent Supply Rejection Even Near Dropout

Shutdown Disconnects Load from V and V

IN

BST

Output current comes directly from the input supply to

maximize efficiency. The boost converter requires only a

small chip inductor and ceramic capacitor for operation.

Additionally, the boosted output voltage of one LTC3026

can supply the boost voltage for other LTC3026s, thus

requiring a single inductor for multiple LDOs. A user sup-

plied boost voltage can be used eliminating the need for

an inductor altogether.

Low Operating Current: I = 950µA at V = 1.5V

IN

Low Shutdown Current:

I < 1µA (Typ), I = 0.1µA (Typ)

IN

BST

n

Stable with 10µF or Greater Ceramic Capacitors

Short-Circuit, Reverse Current Protected

Overtemperature Protected

Available in 10-Lead MSOP and 10-Lead

(3mm × 3mm) DFN Packages

The LTC3026 regulator is stable with 10µF or greater

ceramic output capacitors. The device has a low 0.4V

reference voltage which is used to program the output

voltage via two external resistors. The device also has

internal current limit, overtemperature shutdown, and

reverse output current protection. The LTC3026 is avail-

able in a small 10-lead MSOP or low profile (0.75mm)

10-lead 3mm × 3mm DFN package.

applicaTions

n

High Efficiency Linear Regulator

n

Post Regulator for Switching Supplies

n

Microprocessor Supply

L, LT, LTC, LTM, Linear Technology, the Linear logo and Burst Mode are registered trademarks

and ThinSOT, VLDO are trademarks of Linear Technology Corporation. All other trademarks are

the property of their respective owners.

Typical applicaTion

1.2V Output Voltage from 1.5V Input Supply

Dropout Voltage vs Output Current

150

L1

10µH

SW

BST

5V BOOST

CONVERTER

4.7µF

100

IN

0.4V

1.2V

1.5V

2.0V

2.6V

V

IN

= 1.5V

4.7µF

+

–

V

= 1.2V,

OUT

ADJ

OUT

50

0

1.5A

8.06k

C

OUT

10µF

OFF ON

SHDN

LTC3026

100k

4.02k

1.0

1.5

0

0.5

GND

PG

I

(A)

OUT

3026 TA01a

3026 TA01b

L1: MURATA LQH2MCN100K02

3026ff

1

LTC3026

absoluTe MaxiMuM raTings

(Note 1)

V

to GND................................................. –0.3V to 6V

Output Short-Circuit Duration.......................... Indefinite

Operating Junction Temperature Range

(Note 8) .............................................–40°C to 125°C

Storage Temperature Range .................. –65°C to 125°C

Lead Temperature (MSE, Soldering, 10 sec) .........300°C

BST

V to GND................................................... –0.3V to 6V

IN

PG to GND ................................................... –0.3V to 6V

SHDN to GND............................................ –0.3V to 6.3V

ADJ to GND.................................. –0.3V to (V + 0.3V)

IN

pin conFiguraTion

TOP VIEW

IN

1

2

3

4

5

10 OUT

IN

GND

SW

BST

1

2

3

4

5

10 OUT

9

8

7

6

OUT

ADJ

PG

9

8

7

6

OUT

ADJ

PG

11

GND

11

GND

SW

BST

GND

SHDN

MSE PACKAGE

10-LEAD PLASTIC MSOP

= 125°C, θ = 40°C/W

JA

EXPOSED PAD (PIN 11) IS GND, MUST BE SOLDERED TO PCB

DD PACKAGE

T

JMAX

10-LEAD (3mm × 3mm) PLASTIC DFN

= 125°C, θ = 40°C/W

EXPOSED PAD (PIN 11) IS GND, MUST BE SOLDERED TO PCB

T

JMAX

JA

orDer inForMaTion

LEAD FREE FINISH

LTC3026EDD#PBF

LTC3026IDD#PBF

LTC3026EMSE#PBF

LTC3026IMSE#PBF

LEAD BASED FINISH

LTC3026EDD

TAPE AND REEL

PART MARKING

LBHW

PACKAGE DESCRIPTION

TEMPERATURE RANGE

LTC3026EDD#TRPBF

LTC3026IDD#TRPBF

LTC3026EMSE#TRPBF

LTC3026IMSE#TRPBF

TAPE AND REEL

–40°C to 125°C

TEMPERATURE RANGE

–40°C to 125°C

10-Lead (3mm × 3mm) Plastic DFN

10-Lead Plastic MSOP

LBHW

LTBJB

10-Lead Plastic MSOP

PART MARKING

LBHW

PACKAGE DESCRIPTION

LTC3026EDD#TR

10-Lead (3mm × 3mm) Plastic DFN

10-Lead Plastic MSOP

LTC3026IDD

LTC3026IDD#TR

LBHW

LTC3026EMSE

LTC3026EMSE#TR

LTC3026IMSE#TR

LTBJB

LTC3026IMSE

LTBJB

10-Lead Plastic MSOP

Consult LTC Marketing for parts specified with wider operating temperature ranges.

For more information on lead free part marking, go to: http://www.linear.com/leadfree/

For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/

3026ff

2

LTC3026

elecTrical characTerisTics ^{(BOOST ENABLED, L}_SW= 10µH)

The l denotes the specifications which apply over the full operating junction temperature range, otherwise specifications are at

T_J= 25°C. V_IN= 1.5V, V_OUT= 1.2V, C_IN= C_BST= 4.7µF, C_OUT= 10µF (all capacitors ceramic) unless otherwise noted.

SYMBOL

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

l

V

Operating Voltage

Operating Current

(Note 2)

1.14

3.5

V

IN

I

IN

I

= 0mA, V

= 0.8V, V

= 1.2V, V

= V , V = 1.2V

1160

950

640

400

µA

OUT

SHDN

IN IN

= V , V = 1.5V

IN IN

= V , V = 2.5V

IN IN

= V , V = 3.5V

IN IN

l

I

Shutdown Current

V

= 0V, V = 3.5V

0.6

10

20

40

µA

INSHDN

SHDN

IN

Inductor Size Requirement

Inductor Peak Current Requirement

4.7

150

µH

mA

V

Boost Output Voltage Range

Boost Undervoltage Lockout

Boost Output Drive (Note 3)

V

= V

4.8

4.0

5

5.2

4.4

V

BST

SHDN

IN

l

4.2

BSTUVLO

V

< 1.4V

≥ 1.4V

7

10

mA

IN

(BOOST DISABLED, V_SW= 0V or Floating)

The l denotes the specifications which apply over the full operating junction temperature range, otherwise specifications are at

T_J= 25°C. V_IN= 1.5V, V_OUT= 1.2V, V_BST= 5V, C_IN= C_BST= 1µF, C_OUT= 10µF (all capacitors ceramic) unless otherwise noted.

SYMBOL

PARAMETER

CONDITIONS

MIN

TYP

MAX

5.5

200

20

UNITS

V

l

V

Operating Voltage

(Note 2)

1.14

IN

I

Operating Current

I

= 100µA, V

= V , 1.2V ≤ V ≤ 5V

95

0.6

5

µA

V

IN

INSHDN

OUT

SHDN

IN

Shutdown Current

V

= 0V, V = 3.5V

IN

SHDN

V

Boost Operating Voltage (Note 7)

Undervoltage Lockout

Boost Operating Current

Boost Shutdown Current

= V

4.5

4.0

5.5

4.4

275

5

BST

IN

4.25

175

1

V

BSTUVLO

BST

I

= 100µA, V

= V

µA

OUT

SHDN

IN

V

= 0V

SHDN

BSTSHDN

(BOOST ENABLED or DISABLED)

The l denotes the specifications which apply over the full operating junction temperature range, otherwise specifications are at

T_J= 25°C. V_IN= 1.5V, V_OUT= 1.2V, C_IN= C_BST= 1µF, C_OUT= 10µF (all capacitors ceramic) unless otherwise noted.

SYMBOL PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

V

Regulation Voltage (Note 5)

1mA ≤ I

≤ 1.5A, 1.14V ≤ V ≤ 3.5V, V

= 5V, V

= 0.8V

0.397

0.395

0.4

0.403

0.405

V

ADJ

OUT

IN

BST

OUT

l

≤ 1.5A, 1.14V ≤ V ≤ 3.5V, V

IN

OUT

Programming Range

0.4

2.6

250

100

V

mV

nA

A

Dropout Voltage (Note 6)

ADJ Input Current

V

= 1.5V, V

= 0.38, I = 1.5A

OUT

100

IN

ADJ

I

= 0.4V

–100

1.5

ADJ

OUT

LIM

ADJ

SHDN

Continuous Output Current

Output Current Current Limit

Output Voltage Noise

= V

IN

3

A

e

n

f = 10Hz to 100kHz, I = 800mA

Boost Disabled

Boost Enabled

L

110

210

µV

RMS

3026ff

3

LTC3026

elecTrical characTerisTics

T_J= 25°C. V_IN= 1.5V, V_OUT= 1.2V, C_IN= C_BST= 1µF, C_OUT= 10µF (all capacitors ceramic) unless otherwise noted.

(BOOST ENABLED or DISABLED)

The l denotes the specifications which apply over the full operating junction temperature range, otherwise specifications are at

SYMBOL PARAMETER

CONDITIONS

1.14V ≤ V ≤ 3.5V

MIN

TYP

MAX

UNITS

l

V

SHDN Input High Voltage

1.0

1.2

V

IHSHDN

IN

3.5V ≤ V ≤ 5.5V

IN

l

V

SHDN Input Low Voltage

SHDN Input High Current

SHDN Input Low Current

PG Output Low Voltage

1.14V ≤ V ≤ 5.5V

0.4

1

V

µA

V

ILSHDN

IHSHDN

ILSHDN

IN

I

SHDN = V

–1

IN

SHDN = 0V

1

V

OLPG

I

= 2mA

= 5.5V

0.1

0.4

1

PG

I

PG Output High Leakage Current

Output Threshold (Note 4)

V

0.01

µA

OHPG

PG

PG High to Low

PG Low to High

–12

–10

–9

–7

–6

–4

%

Note 1: Stresses beyond those listed under Absolute Maximum Ratings

may cause permanent damage to the device. Exposure to any Absolute

Maximum Rating condition for extended periods may affect device

reliability and lifetime. This IC has overtemperature protection that is

intended to protect the device during momentary overload conditions.

Junction temperatures will exceed 125°C when overtemperature is active.

Continuous operation above the specified maximum operating junction

temperature may impair device reliability.

Note 6: Dropout voltage is minimum input to output voltage differential

needed to maintain regulation at a specified output current. In dropout, the

output voltage will be equal to V – V

.

IN

DROPOUT

Note 7: To maintain correct regulation

V

OUT

≤ V

– 2.4V

BST

Note 8: The LTC3026 is tested under pulsed load conditions such

that T ≈ T . The LTC3026E is guaranteed to meet specifications from

J

A

0°C to 125°C junction temperature. Specifications over the –40°C to

125°C operating junction temperature range are assured by design,

characterization and correlation with statistical process controls. The

LTC3026I is guaranteed over the –40°C to 125°C operating junction

temperature range. Note that the maximum ambient temperature

consistent with these specifications is determined by specific operating

conditions in conjunction with board layout, the rated package thermal

impedance and other environmental factors. The junction temperature

Note 2: Minimum Operating Voltage required for regulation is:

V

IN

≥ V

+ V

OUT(MIN) DROPOUT

Note 3: When using BST to drive loads other than LTC3026s, the load

must be high impedance during start-up (i.e. prior to PG going high).

Note 4: PG threshold expressed as a percentage difference from the

“V Regulation Voltage” as given in the table.

ADJ

Note 5: Operating conditions are limited by maximum junction temperature.

The regulated output voltage specification will not apply for all possible

combinations of input voltage and output current. When operating at

maximum input voltage, the output current range must be limited. When

operating at maximum output current, the input voltage range must be limited.

(T , in °C) is calculated from the ambient temperature (T , in °C) and

J

A

power dissipation (P , in watts) according to the formula:

D

T = T + (P • θ ), where θ (in °C/W) is the package thermal

J

A

D

JA

impedance.

Typical perForMance characTerisTics

IN Supply Current with Boost

Converter Enabled

BST Supply Current with Boost

Converter Disabled

IN Supply Current with Boost

Converter Disabled

1.50

1.25

1.00

0.75

0.50

0.25

0

200

150

100

50

200

150

100

50

V

= 5V

V

BST

= 5V

BST

–40°C

25°C

–40°C

25°C

–40°C

25°C

85°C

125°C

85°C

125°C

0

1.0

1.5

2.0

2.5

(V)

3.0

3.5

2.0 2.5

3.0 3.5 4.0 4.5 5.0 5.5

1.0 1.5

3.0 3.5 4.0 4.5 5.0 5.5

(V)

1.0 1.5

V

(V)

IN

3026 G01

3026 G02

3026 G03

3026ff

4

LTC3026

Typical perForMance characTerisTics

ADJ Voltage vs Temperature

IN Shutdown Current

BST Voltage vs Temperature

5.050

5.025

5.000

4.975

4.950

5.0

4.5

4.0

3.5

3.0

2.5

2.0

1.5

1.0

0.5

0

404

403

402

401

400

399

398

397

396

V

= 1.5V

IN

1mA

1.5A

3.5V

1.2V

V

= 5V

BST

IN

OUT

= 1.5V

2.5V

=1.2V

0

25

50

100 125

–50 –25

75

0

25

50

100 125

–50 –25

75

0

25

50

100 125

–50 –25

75

TEMPERATURE (°C)

3026 G06

3026 G04

3026 G05

Dropout Voltage vs Input Voltage

Ripple Rejection

200

180

160

140

120

100

80

60

50

40

30

20

10

0

70

60

50

40

30

20

10

0

V

OUT

= 0.38V

FB

10kHz

1MHz

I

=1.5A

100kHz

60

V

I

= 5V

= 1.5V

=1.2V

= 800mA

= 10µF

BST

IN

OUT

–40°C

25°C

85°C

125°C

V

I

= 5V

BST

OUT

40

=1.2V

= 800mA

= 10µF

20

C

OUT

0

1.2 1.4

1.6 1.8 2.0

(V)

2.2 2.4 2.6

2.0

(V)

2.4

2.6

1000

10000 100000 1000000 1E+07

1.2 1.4

1.6 1.8

V

2.2

100

V

FREQUENCY (Hz)

IN

3026 G07

3026 G08

3026 G09

Shutdown Threshold

Output Current Limit

BST to OUT Headroom Voltage

2.22

2.20

2.18

2.16

2.14

2.12

2.10

2.08

2.06

2.04

2.02

1200

900

600

300

5.0

4.5

4.0

3.5

3.0

2.5

2.0

1.5

1.0

V

T

= 0V

OUT

A

= 25°C

RISE

FALL

RISE

FALL

CURRENT LIMIT

–40°C

25°C

125°C

THERMAL LIMIT

–50

0

25

50

75 100 125

–25

1.5

2.0

3.0

2.5

1

2

3

4

5

6

1.0

3.5

TEMPERATURE (°C)

V

(V)

V

(V)

IN

3026 G12

3026 G10

3026 G11

3026ff

5

LTC3026

Typical perForMance characTerisTics

Delay from Enable to PG with

Boost Disabled

Delay from Enable to PG with

Boost Enabled

Output Load Transient Response

5.0

4.5

4.0

3.5

3.0

2.5

2.0

1.5

1.0

0.5

0

1.5A

2mA

400

375

350

325

300

275

250

V

= 0.8V

OUT

I

OUT

R

= 8Ω

–40°C

25°C

85°C

OUT

AC 20mV/DIV

V

= 0.8V

OUT

R

= 8Ω

–40°C

25°C

85°C

3026 G15

1.0

1.5

2.0

V

2.5

(V)

3.0

3.5

50µs/DIV

1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5

V

C

V

= 1.5V

= 10µF

OUT

IN

V

(V)

IN

3026 G14

3026 G13

= 1.7V

= 5V

BST

BST Ripple and Feedthrough

to OUT

IN Supply Transient Response

BST/OUT Start-Up

HI

LO

5V

SHDN

2V

V

IN

V

1.5V

BST

AC 20mV/DIV

BST

1V

1.5V

V

OUT

AC

V

OUT

AC 5mV/DIV

10mV/DIV

OUT

0V

3026 G17

3026 G16

3026 G18

200µs/DIV

10µs/DIV

20µs/DIV

T

= 25°C

A

V

= 1.2V

= 800mA

= 10µF

= 5V

V

OUT

C

= 1.2V

OUT

R

= 1Ω

OUT

I

= 1.5V

IN

V

= 1.7V

IN

C

V

T

I

= 1A

OUT

BST

= 10µF

OUT

= 25°C

L

T

= 10µH

A

SW

A

= 25°C

3026ff

6

LTC3026

pin FuncTions

IN (Pins 1, 2): Input Supply Voltage. Output load current

is supplied directly from IN. The IN pin should be locally

bypassed to ground if the LTC3026 is more than a few

inches away from another source of bulk capacitance.

In general, the output impedance of a battery rises with

frequency, so it is usually advisable to include an input

bypass capacitor when supplying IN from a battery. A

capacitorintherangeof0.1µFto4.7µFisusuallysufficient.

has been achieved. When providing an external BST volt-

age (i.e. boost converter disabled) a 1µF low ESR ceramic

capacitor can be used.

SHDN (Pin 6): Shutdown Input Pin, Active Low. This pin

is used to put the LTC3026 into shutdown. The SHDN pin

current is typically less than 10nA. The SHDN pin cannot

be left floating and must be tied to a valid logic level (such

as IN) if not used.

GND (Pin 3, Exposed Pad Pin 11): Ground and Heat Sink.

Connect the exposed pad to the PCB ground plane or large

pad for optimum thermal performance.

PG (Pin 7): Power Good Pin. When PG is high impedance

OUT is in regulation, and low impedance when OUT is in

shutdown or out of regulation.

SW(Pin4):BoostSwitchingPin.Thisistheboostconverter

ADJ(Pin8):OutputAdjustPin.Thisistheinputtotheerror

amplifier. It has a typical bias current of 0.1nA flowing into

the pin. The ADJ pin reference voltage is 0.4V referenced

to ground. The output voltage range is 0.4V to 2.6V and is

typically set by connecting ADJ to a resistor divider from

OUT to GND. See Figure 2.

switching pin. A 4.7µH to 40µH inductor able to handle a

peak current of 150mA is connected from this pin to V .

IN

The boost converter can be disabled by floating this pin.

This allows the use of an external boosted supply from

a second LTC3026 or other source. See Operating with

Boost Converter Disabled section for more information.

OUT(Pins9,10):RegulatedOutputVoltage.TheOUTpins

supply power to the load. A minimum output capacitance

of5µFisrequiredtoensurestability. Largeroutputcapaci-

tors may be required for applications with large transient

loads to limit peak voltage transients. See the Applica-

tions Information section for more information on output

capacitance.

BST (Pin 5): Boost Output Voltage Pin. With boost con-

verter enabled bypass the BST pin with a ≥4.7µF low ESR

ceramic capacitor to GND (C ). BST does not load V

BST

IN

when in shutdown, but is diode connected to IN through

the external inductor, thus, will not go to ground with V

IN

present. Users should not present any loads to the BST

pin (with boost enabled) until PG signals that regulation

3026ff

7

LTC3026

block DiagraM

BOOST

CONVERTER

SW

4

6

5 BST

–

+

SHDN

SWITCHING

LOGIC

EN

IN

1,2

SHDN

REFERENCE

0.4V

+

–

UVLO

OUT

9,10

V

OFF

–

+

PG

–

7

–

+

0.372V

8

ADJ

OVERSHOOT DETECT

GND

3,11

3026 BD

3026ff

8

LTC3026

operaTion

TheLTC3026isaVLDO(verylowdropout)linearregulator

which operates from input voltages as low as 1.14V. The

LDO uses an internal NMOS transistor as the pass device

in a source-follower configuration. The BST pin provides

thehighersupplynecessaryfortheLDOcircuitrywhilethe

output current comes directly from the IN input for high

efficiency regulation. The BST pin can either be supplied

off-chip by an external 5V source or it can be generated

through the internal boost converter of the LTC3026.

Care must be taken not to short the BST pin to GND, since

the body diode of the internal PMOS transistor connects

the BST and SW pins. Shorting BST to GND with an induc-

tor connected between IN and SW can ramp the inductor

current to destructive levels, potentially destroying the

inductor and/or the part.

Operating with Boost Converter Disabled

The LTC3026 has an option to disable the internal boost

converter. With the boost converter disabled, the LTC3026

becomes a bootstrapped device and the BST pin must be

driven by an external 5V supply, or driven by the BST pin

ofasecondLTC3026withtheboostconverterenabled.The

recommended method for disabling the boost converter

is to simply float the SW pin. With the SW pin floating no

energycanbetransferredtoBSTwhicheffectivelydisables

the boost converter.

Boost Converter Operation

For applications where an external 5V supply is not avail-

able, the LTC3026 contains an internal boost converter to

produce the necessary 5V supply for the LDO. The boost

converter utilizes Burst Mode^®operation to achieve high

efficiency for the relatively low current levels needed for

the LDO circuitry. The boost converter requires only a

small chip inductor between the IN and SW pins and a

small 4.7µF capacitor at BST.

A single LTC3026 boost converter can be used to drive

multiple bootstrapped LTC3026s with the internal boost

converters disabled. Thus a single inductor can be used

to power two (or possibly more) functioning LTC3026s.

In cases where all LTC3026s have the same input supply

(IN) the internal boost converters of the bootstrapped

LTC3026s can be disabled by floating the SW pin. If the

LTC3026s are not all connected to the same input supply

then the internal boost converters of the bootstrapped

LTC3026s are disabled by floating the SW pin.

The operation of the boost converter is described as fol-

lows.Duringthefirsthalfoftheswitchingcycle,aninternal

NMOS switch between SW and GND turns on, ramping

the inductor current. A peak comparator senses when the

inductorcurrentreaches100mA,atwhichpointtheNMOS

is turned off and an internal PMOS between SW and BST

turns on, transferring the inductor current to the BST pin.

The PMOS switch continues to deliver power to BST until

the inductor current approaches zero, at which point the

PMOS turns off and the NMOS turns back on, repeating

the switching cycle.

LDO Operation

An undervoltage lockout comparator (UVLO) senses the

BST pin voltage to ensure that the bias supply for the LDO

is greater than 4.2V before enabling the LDO. If BST is

below 4.2V, the UVLO shuts down the LDO, and OUT is

pulled to GND through the external divider.

A burst comparator with hysteresis monitors the voltage

on the BST pin. When BST is above the upper threshold

of the comparator, no switching occurs. When BST falls

below the comparator’s lower threshold, switching com-

mencesandtheBSTpingetscharged.Theupperandlower

thresholdsoftheburstcomparatoraresettomaintaina5V

supplyatBSTwithapproximately40mVto50mVofripple.

3026ff

9

LTC3026

operaTion

HI

LO

The LDO provides a high accuracy output capable of

supplying 1.5A of output current with a typical dropout

voltage of only 100mV. A single ceramic capacitor as

small as 10µF is all that is required for output bypassing.

A low reference voltage allows the LTC3026 output to be

programmed to much lower voltages than available in

common LDOs (range of 0.4V to 2.6V).

SHDN

1.5V

OUT

0V

1.5V

0V

Thedevicesalsoincludecurrentlimitandthermaloverload

protection, and will survive an output short-circuit indefi-

nitely. The fast transient response of the follower output

stageovercomesthetraditionaltrade-offbetweendropout

voltage, quiescent current and load transient response

inherentinmostLDOregulatorarchitectures,seeFigure1.

PG

3026 F02

T

= 25°C

100µs/DIV

A

R

= 1Ω

OUT

V

= 1.7V

IN

= 5V

B

Figure 2. Soft-Start with Boost Disable

1.5A

I

OUT

Adjustable Output Voltage

0mA

The output voltage is set by the ratio of two external resis-

tors as shown in Figure 3. The device servos the output

to maintain the ADJ pin voltage at 0.4V (referenced to

ground). Thus, the current in R1 is equal to 0.4V/R1. For

goodtransientresponse,stabilityandaccuracythecurrent

in R1 should be at least 80µA, thus, the value of R1 should

be no greater than 5k. The current in R2 is the current in

R1 plus the ADJ pin bias current. Since the ADJ pin bias

current is typically <10nA it can be ignored in the output

voltage calculation. The output voltage can be calculated

using the formula in Figure 3. Note that in shutdown the

output is turned off and the divider current will be zero

OUT

AC 20mV/DIV

3026 F01

V

C

V

= 1.5V

= 10µF

100µs/DIV

OUT

IN

B

= 1.7V

= 5V

Figure 1. Output Load Step Response

once C

is discharged.

OUT

The LTC3026 also includes a soft-start feature to prevent

excessive current flow at V during start-up. When the

LDOisenabled, thesoft-startcircuitrygraduallyincreases

the LDO reference voltage from 0V to 0.4V over a period

of approximately 200µs, see Figure 2.

IN

R2

R1





V

= 0.4V 1+

V

OUT









OUT

LTC3026

R2

R1

C

ADJ

OUT

GND

3026 F03

Figure 3. Programming the LTC3026

3026ff

10

LTC3026

operaTion

The LTC3026 operates at a relatively high gain of

270µV/A referred to the ADJ input. Thus, a load current

change of 1mA to 1.5A produces a 400µV drop at the ADJ

input. To calculate the change in the output, simply mul-

tiply by the gain of the feedback network (i.e. 1 + R2/R1).

For example, to program the output for 1.2V choose

R2/R1 = 2. In this example an output current change of

1mA to 1.5A produces –400µV • (1 + 2) = 1.2mV drop at

the output.

The LTC3026 is a micropower device and output transient

response will be a function of output capacitance. Larger

values of output capacitance decrease the peak deviations

and provide improved transient response for larger load

current changes. Note that bypass capacitors used to

decouple individual components powered by the LTC3026

will increase the effective output capacitor value. High

ESR tantalum and electrolytic capacitors may be used,

but a low ESR ceramic capacitor must be in parallel at the

output. There is no minimum ESR or maximum capacitor

size requirements.

Power Good Operation

The LTC3026 includes an open-drain power good (PG)

output pin with hysteresis. If the chip is in shutdown or

Extra consideration must be given to the use of ceramic

capacitors. Ceramic capacitors are manufactured with a

variety of dielectrics, each with different behavior across

temperature and applied voltage. The most common di-

electrics used are Z5U, Y5V, X5R and X7R. The Z5U and

Y5V dielectrics are good for providing high capacitances

in a small package, but exhibit strong voltage and tem-

perature coefficients as shown in Figures 4 and 5. When

used with a 2V regulator, a 10µF Y5V capacitor can exhibit

an effective value as low as 1µF to 2µF over the operating

temperature range. The X5R and X7R dielectrics result in

more stable characteristics and are more suitable for use

as the output capacitor. The X7R type has better stability

across temperature, while the X5R is less expensive and

is available in higher values.

under UVLO conditions (V

< 4.25V), PG is low im-

BST

pedance to ground. PG becomes high impedance when

rises to 93% of its regulation voltage. PG stays high

V

OUT

impedanceuntilV

fallsbackdownto91%ofitsregula-

OUT

tion value. A pull-up resistor can be inserted between PG

and a positive logic supply (such as IN, OUT, BST, etc.)

to signal a valid power good condition. V should be the

IN

minimum operating voltage (1.14V) or greater for PG to

function correctly.

Output Capacitance and Transient Response

The LTC3026 is designed to be stable with a wide range

of ceramic output capacitors. The ESR of the output

capacitor affects stability, most notably with small ca-

pacitors. An output capacitor of 10µF or greater with an

ESR of 0.05Ω or less is recommended to ensure stability.

A minimum capacitance of 5µF must be maintained at all

times on the LTC3026 LDO output.

20

BOTH CAPACITORS ARE 10µF,

6.3V, 0805 CASE SIZE

0

X5R

0

X5R

–20

Y5V

–40

–60

Y5V

–80

BOTH CAPACITORS ARE 10µF,

6.3V, 0805 CASE SIZE

–100

0

1

2

3

4

5

6

50

–50

–25

0

25

75

DC BIAS VOLTAGE (V)

TEMPERATURE (°C)

3026 F04

3026 F05

Figure 5. Ceramic Capacitor Temperature Characteristics

Figure 4. Ceramic Capacitor DC Bias Characteristics

3026ff

11

LTC3026

operaTion

Boost Converter Component Selection

For surface mount devices, heat sinking is accomplished

by using the heat-spreading capabilities of the PC board

and its copper traces. Copper board stiffeners and plated

through holes can also be used to spread the heat gener-

ated by power devices.

A 10µH chip inductor with a peak saturation current (I

)

SAT

ofatleast150mAisrecommendedforusewiththeinternal

boost converter. The inductor value can range between

4.7µH to 40µH, but values less than 10µH result in higher

switchingfrequency,increasedswitchinglosses,andlower

max output current available at the BST pin. See Table 1

for a list of component suppliers.

A junction-to-ambient thermal coefficient of 40°C/W is

achieved by connecting the exposed pad of the MSOP or

2

DFNpackagedirectlytoagroundplaneofabout2500mm .

Table 1. Inductor Vendor Information

Calculating Junction Temperature

SUPPLIER

Coilcraft

Murata

PART NUMBER

0603PS-103KB

WEBSITE

Example: Given an output voltage of 1.2V, an input voltage

of 1.8V 4%, an output current range of 0mA to 1A and

a maximum ambient temperature of 50°C, what will the

maximum junction temperature be?

www.coilcraft.com

www.murata.com

www.t-yuden.com

www.TDK.com

LQH2MCN100K02

LB2016T100M

Taiyo Yuden

TDK

NLC252018T-100K

The power dissipated by the device will be approximately:

It is also recommended that the BST pin be bypassed to

ground with a 4.7µF or greater ceramic capacitor. Larger

values of capacitance will not reduce the size of the BST

ripplemuch,butwilldecreasetheripplefrequencypropor-

tionally. The BST pin should maintain 1µF of capacitance

at all times to ensure correct operation (See the “Output

Capacitance and Transient Response” section about

capacitor selection). High ESR tantalum and electrolytic

capacitors may be used, but a low ESR ceramic must be

used in parallel for correct operation.

I

(V

– V

)

OUT(MAX) IN(MAX)

OUT

where:

I

= 1A

OUT(MAX)

V

= 1.87V

IN(MAX)

so:

P = 1A(1.87V – 1.2V) = 0.67W

Even under worst-case conditions LTC3026’s BST pin

powerdissipationisonlyabout1mW, thuscanbeignored.

The junction to ambient thermal resistance will be on the

order of 40°C/W. The junction temperature rise above

ambient will be approximately equal to:

Thermal Considerations

The power handling capability of the device will be limited

by the maximum rated junction temperature (125°C).

The majority of the power dissipated in the device will be

the output current multiplied by the input/output voltage

0.67W(40°C/W) = 26.8°C

The maximum junction temperature will then be equal to

the maximum junction temperature rise above ambient

plus the maximum ambient temperature or:

differential: (I )(V – V ). Note that the BST current

OUT

IN

OUT

is less than 200µA even under heavy loads, so its power

consumption can be ignored for thermal calculations.

T = 26.8°C + 50°C = 76.8°C

A

The LTC3026 has internal thermal limiting designed to

protectthedeviceduringmomentaryoverloadconditions.

For continuous normal conditions, the maximum junction

temperature rating of 125°C must not be exceeded. It is

important to give careful consideration to all sources of

thermal resistance from junction to ambient. Additional

heat sources mounted nearby must also be considered.

Short-Circuit/Thermal Protection

The LTC3026 has built-in output short-circuit current

limiting as well as overtemperature protection. During

short-circuit conditions, internal circuitry automatically

limits the output current to approximately 3A. At higher

3026ff

12

LTC3026

operaTion

temperatures, or in cases where internal power dissipa-

tion cause excessive self heating on-chip, the thermal

shutdowncircuitrywillshutdowntheboostconverterand

LDOwhenthejunctiontemperatureexceedsapproximately

150°C. It will reenable the converter and LDO once the

junction temperature drops back to approximately 140°C.

The LTC3026 will cycle in and out of thermal shutdown

without latchup or damage until the overstress condition

Layout Considerations

Connection from BST and OUT pins to their respec-

tive ceramic bypass capacitor should be kept as short

as possible. The ground side of the bypass capacitors

should be connected directly to the ground plane for best

results or through short traces back to the GND pin of the

part. Long traces will increase the effective series ESR

and inductance of the capacitor which can degrade

performance.

is removed. Long term overstress (T > 125°C) should

J

be avoided as it can degrade the performance or shorten

With the boost converter enabled, the SW pin will be

switching between ground and 5V whenever the BST pin

needstoberecharged. ThetransitionedgeratesoftheSW

pin can be quite fast (~10ns). Thus care must be taken to

make sure the SW node does not couple capacitively to

other nodes (especially the ADJ pin). Additionally, stray

capacitancetothisnodereducestheefficiencyandamount

of current available from the boost converter. For these

reasons it is recommended that the SW pin be connected

to the switching inductor with as short a trace as possible.

If the user has any sensitive nodes near the SW node, a

ground shield may be placed between the two nodes to

reduce coupling.

the life of the part.

Reverse Input Current Protection

The LTC3026 features reverse input current protection to

limit current draw from any supplementary power source

at the output. Figure 6 shows the reverse output current

limit for constant input and output voltages cases. Note:

Positive input current represents current flowing into the

V pin of LTC3026.

IN

With V

held at or below the output regulation voltage

OUT

andV varied,INcurrentflowwillfollowFigure6’scurves.

IN

I

reverse current ramps up to about 16µA as the V

IN

approaches V . Reverse input current will spike up as

OUT

BecausetheADJpinisrelativelyhighimpedance(depend-

ing on the resistor divider used), stray capacitance at this

pin should be minimized (<10pF) to prevent phase shift

in the error amplifier loop. Additionally special attention

should be given to any stray capacitances that can couple

external signals onto the ADJ pin producing undesirable

output ripple. For optimum performance connect the ADJ

pin to R1 and R2 with a short PCB trace and minimize all

other stray capacitance to the ADJ pin.

V approaches within about 30mV of V

as the reverse

IN

OUT

current protection circuitry is disabled and normal opera-

tion resumes. As V transitions above V the reverse

IN

OUT

current transitions into short-circuit current as long as

V

is held below the regulation voltage.

OUT

30

IN CURRENT

LIMIT ABOVE 1.45V

20

10

C

OUT

IN

1

2

3

4

5

IN

OUT 10

0

IN

9

8

7

6

OUT

ADJ

R2

R1

GND

SW

BST

–10

–20

–30

PG

SHDN

C

BST

3026 F07

0

0.9

INPUT VOLTAGE (V)

1.5

0.3

0.6

1.2

1.8

VIA CONNECTION TO GND PLANE

3026 F06

Figure 6. Input Current vs Input Voltage

Figure 7. Suggested Layout

3026ff

13

LTC3026

Typical applicaTions

Using 1 Boost with Multiple Regulators

V

= 2.5V

IN

TO ADDITIONAL

REGULATORS

10µH

BST

OUT

BST

OUT

SW

IN

NC

SW

IN

4.7µF

14k

1µF

LTC3026

V

OUT2

1.5V, 1.5A

OUT1

1.8V, 1.5A

11k

C

OUT1

OUT2

ADJ

PG

ADJ

PG

SHDN

10µF

100k

4.02k

4.7µF

1µF

PG1

PG2

GND

LTC3026 WITH BOOST ENABLED FANOUT:

3-LTC3026 FOR V <1.4V

BOOT STRAPPED LTC3026

(BOOST DISABLED)

IN

3026 TA02

5-LTC3026 FOR V >1.4V

IN

2.5V Output from 3.3V Supply with External 5V Bias

V

= 5V

BIAS

BST

OUT

SW*

IN

N/C

1µF

LTC3026

V

OUT

V

= 3.3V

IN

2.5V, 1.5A

21k

C

OUT

ADJ

PG

SHDN

10µF

100k

4.02k

1µF

PG

GND

3026 TA03

* SEE OPERATING WITH BOOST CONVERTER

DISABLED SECTION FOR INFORMATION ON

DISABLING BOOST CONVERTER.

3026ff

14

LTC3026

package DescripTion

Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.

MSE Package

10-Lead Plastic MSOP, Exposed Die Pad

(Reference LTC DWG # 05-08-1664 Rev H)

BOTTOM VIEW OF

EXPOSED PAD OPTION

1.88

(.074)

1.88 ±0.102

(.074 ±.004)

0.889 ±0.127

(.035 ±.005)

1

0.29

REF

1.68

(.066)

0.05 REF

5.23

(.206)

MIN

1.68 ±0.102

3.20 – 3.45

DETAIL “B”

(.066 ±.004) (.126 – .136)

CORNER TAIL IS PART OF

THE LEADFRAME FEATURE.

FOR REFERENCE ONLY

DETAIL “B”

10

NO MEASUREMENT PURPOSE

0.50

(.0197)

BSC

0.305 ± 0.038

(.0120 ±.0015)

TYP

3.00 ±0.102

(.118 ±.004)

(NOTE 3)

0.497 ±0.076

(.0196 ±.003)

10 9

8

7 6

RECOMMENDED SOLDER PAD LAYOUT

REF

3.00 ±0.102

(.118 ±.004)

(NOTE 4)

4.90 ±0.152

(.193 ±.006)

DETAIL “A”

0.254

(.010)

0° – 6° TYP

1

2

3

4 5

GAUGE PLANE

0.53 ±0.152

(.021 ±.006)

0.86

(.034)

REF

1.10

(.043)

MAX

DETAIL “A”

0.18

(.007)

SEATING

PLANE

0.17 – 0.27

(.007 – .011)

TYP

0.1016 ±0.0508

(.004 ±.002)

0.50

(.0197)

BSC

MSOP (MSE) 0911 REV H

NOTE:

1. DIMENSIONS IN MILLIMETER/(INCH)

2. DRAWING NOT TO SCALE

3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.

MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE

4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.

INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE

5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX

6. EXPOSED PAD DIMENSION DOES INCLUDE MOLD FLASH. MOLD FLASH ON E-PAD

SHALL NOT EXCEED 0.254mm (.010") PER SIDE.

3026ff

15

LTC3026

package DescripTion

Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.

DD Package

10-Lead Plastic DFN (3mm × 3mm)

(Reference LTC DWG # 05-08-1699 Rev C)

0.70 ±0.05

3.55 ±0.05

2.15 ±0.05 (2 SIDES)

1.65 ±0.05

PACKAGE

OUTLINE

0.25 ±0.05

0.50

BSC

2.38 ±0.05

(2 SIDES)

RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS

R = 0.125

0.40 ±0.10

TYP

6

10

3.00 ±0.10

(4 SIDES)

1.65 ±0.10

(2 SIDES)

PIN 1 NOTCH

R = 0.20 OR

PIN 1

TOP MARK

(SEE NOTE 6)

0.35 × 45°

CHAMFER

(DD) DFN REV C 0310

5

1

0.25 ±0.05

0.50 BSC

0.75 ±0.05

0.200 REF

2.38 ±0.10

(2 SIDES)

0.00 – 0.05

BOTTOM VIEW—EXPOSED PAD

NOTE:

1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-2).

CHECK THE LTC WEBSITE DATA SHEET FOR CURRENT STATUS OF VARIATION ASSIGNMENT

2. DRAWING NOT TO SCALE

3. ALL DIMENSIONS ARE IN MILLIMETERS

4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE

MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE

5. EXPOSED PAD SHALL BE SOLDER PLATED

6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE

TOP AND BOTTOM OF PACKAGE

3026ff

16

LTC3026

revision hisTory ^{(Revision history begins at Rev D)}

REV

DATE

DESCRIPTION

PAGE NUMBER

D

3/10

Addition to Absolute Maximum Ratings

Changes to Electrical Characteristics

Changes to Pin Functions

1

3, 4

7,

Changes to Operation Section

Changes to Typical Applications

Additions to Related Parts

Remove I-grade in Note 8.

9

14, 18

18

E

F

5/11

8/12

4

Added I-grade ordering information

2

4

Updated I-grade testing assurances, Note 8

Modified boost converter disablement methodology

Modified Boost with Multiple Regulators schematic and deleted note

7, 9

14

3026ff

Information furnished by Linear Technology Corporation is believed to be accurate and reliable.

However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-

tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.

17

LTC3026

Typical applicaTion

Efficient, Low Noise 1.5V Output from 1.8V DC/DC Buck Converter

(LTC3026 Boost Converter Disabled)

4.5V ≤ V ≤ 5.5V

IN

33pF

200pF

30k

1

2

3

4

5

10

I

SW

–

TH

R

SENSE

0.04Ω

0.1µF

LTC1773

9

8

7

6

RUN/SS SENSE

1µF

V

1.8V

2A

BUCK

SYNC/FCB

V

IN

SW

IN

BST

OUT

ADJ

PG

N/C

L1

LTC3026

2.5µH

V

1.5V

1.5A

V

TG

BG

OUT

FB

C

IN

11k

GND

47µF

10V

C

OUT

SHDN

10µF

1µF

4.02k

Si9942DY

100k

C

47µF

10V

BUCK

PG

GND

100k

1%

80.6k

1%

3026 TA04

C

, C

: TAIYO YUDEN LMK550BJ476MM

IN BUCK

L1: CDRH5D28

R

: IRC LR1206-01-R040-F

SENSE

relaTeD parTs

PART NUMBER

LT1761

DESCRIPTION

COMMENTS

100mA, Low Noise LDO in ThinSOT™

150mA, Low Noise LDO

300mV Dropout Voltage, Low Noise: 20µV

, V = 1.8V to 20V, ThinSOT Package

RMS IN

LT1762

, V = 1.8V to 20V, MS8 Package

RMS IN

LT1763

500mA, Low Noise LDO

, V = 1.8V to 20V, SO-8 Package

RMS IN

LT1764A

3A, Fast Transient Response, Low Noise LDO 340mV Dropout Voltage, Low Noise: 40µV

, V = 2.7V to 20V,

RMS IN

TO-220 and DD Packages

LT1844

150mA, Very Low Dropout LDO

300mA, Low Noise LDO

80mV Dropout Voltage, Low Noise <30µV

, V = 1.6V to 6.5V,

RMS IN

Stable with 1µF Output Capacitors, ThinSOT Package

LT1962

270mV Dropout Voltage, Low Noise 20µV , V = 1.8V to 20V, MS8 Package

RMS IN

LT1963A

1.5A Low Noise, Fast Transient Response LDO 340mV Dropout Voltage, Low Noise: 40µV

, V = 2.5V to 20V,

RMS IN

TO-220, DD, SOT-223 and SO-8 Packages

LT1964

200mA, Low Noise, Negative LDO

340mV Dropout Voltage, Low Noise 30µV

, V = –1.8V to –20V,

RMS IN

ThinSOT Package

LT1965

1.1A, Low Noise, Low Dropout Linear

Regulator

290mV Dropout Voltage, Low Noise 40µV

, V = 1.8V to 20V, TO-220, DDPak,

RMS IN

MSOP and 3mm × 3mm DFN Packages

LTC3025

300mA Micropower VLDO Linear Regulator

45mV Dropout Voltage, Low Noise 80µV

, V = 0.9V to 5.5V,

RMS IN

Low I : 54µA, 2mm × 2mm 6-Lead DFN Package

Q

LT3080/LT3080-1

1.1A, Parallelable, Low Noise, Low Dropout

Linear Regulator

300mV Dropout Voltage (2 Supply), Low Noise 40µV

, V = 1.2V to 36V,

RMS IN

V

= 0V to 35.7V, Directly Parallelable, TO-220, SOT-223, MSOP-8 and

OUT

3mm × 3mm DFN Packages

LT3150

Fast Transient Response, VLDO Regulator

Controller

0.035mV Dropout Voltage via External FET, V = 1.3V to 10V

IN

3026ff

LT 0812 REV F • PRINTED IN USA

18 ^{LinearTechnology Corporation}

1630 McCarthy Blvd., Milpitas, CA 95035-7417

●

 LINEAR TECHNOLOGY CORPORATION 2005

(408) 432-1900 FAX: (408) 434-0507 www.linear.com


型号：	LTC3026_1208
厂家：	Linear
描述：	1.5A Low Input Voltage VLDO Linear Regulator 1.5A低输入电压VLDO线性稳压器稳压器
文件：	总18页 (文件大小：265K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

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