LTC3101EUF-TRPBF_技术文档

LTC3101

Wide V , Multi-Output

IN

DC/DC Converter and

PowerPath Controller

FEATURES

DESCRIPTION

The LTC^®3101 is a complete power management solution

for low power portable devices. It provides three high

efﬁciency switching DC/DC converters which seamlessly

transition from battery to USB/wall adapter power when

available. A synchronous buck-boost regulator provides

complete ﬂexibility, allowing operation from a single

Li-Ion/Polymer battery, 2 to 3 AA cells, a USB port or any

other power source operating from 1.8V to 5.5V.

n

Low Loss PowerPath™ Control: Seamless,

Automatic Transition from Battery to USB or

Wall Adapter Power

n

Wide V Range: 1.8V to 5.5V

IN

n

Buck-Boost V

:

1.5V to 5.25V

OUT

n

Buck-Boost Generates 3.3V at 300mA for

V ≥ 1.8V, 3.3V at 800mA for V ≥ 3V

IN

n

Dual 350mA Buck Regulators, V

:

0.6V to V

OUT IN

38μA Quiescent Current in Burst Mode^®Operation

1.8V, 50mA Always-On LDO

Two always-alive outputs, a 50mA LDO and a 200mA MAX

output that tracks the higher voltage input supply, provide

power for critical functions or additional external regula-

tors. Flash memory cards can be directly powered from

theprotected100mAHotSwapoutput.Pushbuttoncontrol

logic and a programmable-duration microprocessor reset

generator simplify interfacing to a microprocessor while

internal sequencing and independent enable pins provide

ﬂexiblepower-upoptions.TheLTC3101isavailableinalow

proﬁle (0.75mm) 24-lead 4mm × 4mm QFN package.

™

Protected 100mA Hot Swap Output

Pushbutton On/Off Control

Current Limited 200mA MAX Output

Programmable Power-Up Sequencing

24-lead 4mm × 4mm × 0.75mm QFN Package

APPLICATIONS

n

Ultra-Portable Digital Video Cameras

Personal Handheld GPS Navigators

Portable Medical Instruments

L, LT, LTC, LTM and Burst Mode are registered trademarks of Linear Technology Corporation.

Hot Swap and PowerPath are trademarks of Linear Technology Corporation.

All other trademarks are the property of their respective owners.

TYPICAL APPLICATION

V

= 3.3V

OUT3

300mA FOR V ≥ 1.8V

IN

+

800mA FOR V ≥ 3V

IN

2 AA

10μF

1M

CELLS

4.7μH

Efﬁciency vs V_BAT

96

94

221k

BUCK-BOOST

= 150mA

BAT1 BAT2 SW3A SW3B OUT3

USB/WALL

I

OUT

USB1

USB2

FB3

HSO

MAX

LDO

ADAPTER

4.3V TO 5.5V

Hot Swap OUTPUT: 3.3V AT 100mA

TRACKING OUTPUT: 200mA

1.8V AT 50mA

10μF

C

92

90

RS

4.7μF

0.1μF

BUCK2

4.7μH

V

OUT2

ENA1

ENA2

ENA3

I

= 150mA

OUT

SW2

FB2

1.8V

DIS ENA

BUCK1

= 150mA

350mA

10μF

LTC3101

221k

I

OUT

88

86

84

ON/OFF

110k

PWRKEY

4.7μH

V

OUT1

PBSTAT

PWM

PWRON

1.5V

SW1

FB1

350mA

μP

10μF

1.5

2.5

3.5

(V)

4.5

5.5

221k

147k

V

RESET

BAT

GND

3101 TA01b

3101 TA01a

3101f

1

LTC3101

ABSOLUTE MAXIMUM RATINGS

PIN CONFIGURATION

(Note 1)

V

, V

......................... –0.3V to 6V

TOP VIEW

BAT1 BAT2 USB1 USB2

, V

SW1 SW2 SW3A SW3B

DC............................................................ –0.3V to 6V

Pulsed (<100ns) ...................................... –1.0V to 7V

24 23 22 21 20 19

PWM

SW1

1

2

3

4

5

6

18 HSO

Voltage (All Other Pins)................................ –0.3V to 6V

Operating Temperature Range (Note 2).... –40°C to 85°C

Maximum Junction Temperature (Note 5)............. 125°C

Storage Temperature Range................... –65°C to 150°C

OUT3

USB2

17

16

BAT1

25

USB1

SW2

15 SW3A

14 BAT2

13 RESET

PWRON

7

8

9 10 11 12

UF PACKAGE

24-LEAD (4mm s 4mm) PLASTIC QFN

T

JMAX

= 125°C, θ = 37°C/W

JA

EXPOSED PAD (PIN 25) IS GND, MUST BE SOLDERED TO PCB

ORDER INFORMATION

LEAD FREE FINISH

TAPE AND REEL

PART MARKING

PACKAGE DESCRIPTION

24-Lead (4mm × 4mm) Plastic QFN

TEMPERATURE RANGE

–40°C to 85°C

LTC3101EUF#PBF

LTC3101EUF#TRPBF

3101

Consult LTC Marketing for parts speciﬁed with wider operating temperature ranges. *The temperature grade is identiﬁed by a label on the shipping container.

Consult LTC Marketing for information on non-standard lead based ﬁnish parts.

For more information on lead free part marking, go to: http://www.linear.com/leadfree/

For more information on tape and reel speciﬁcations, go to: http://www.linear.com/tapeandreel/

ELECTRICAL CHARACTERISTICS ^Thel denotes the speciﬁcations which apply over the full operating

temperature range, otherwise speciﬁcations are at T_A= 25°C. V_USB1= V_USB2= V_BAT1= V_BAT2= 3V and V_OUT3= 3.3V, unless

otherwise noted.

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

l

Input Operating Voltage

Battery Powered

USB Powered

1.8

5.5

V

l

Undervoltage Lockout Threshold

Battery Powered, V Rising

1.7

1.8

V

BAT

USB Powered, V

Rising

USB

Input Quiescent Current in Standby

V

= 0V, V

= 3V

PWRKEY

15

38

μA

PWRON

Input Quiescent Current in Burst Mode Operation All Converters Enabled, V

Oscillator Frequency

= V

= 0.66V

FB1

FB2

FB3

l

1.02

583

1.27

1.52

MHz

Buck Converter 1

Feedback Voltage (FB1 Pin)

596

1

609

50

mV

nA

Feedback Pin Input Current (FB1 Pin)

P-Channel Current Limit

Battery Powered (Note 3)

USB Powered (Note 3)

440

540

mA

l

Maximum Duty Cycle

100

%

3101f

2

LTC3101

ELECTRICAL CHARACTERISTICS ^Thel denotes the speciﬁcations which apply over the full operating

temperature range, otherwise speciﬁcations are at T_A= 25°C. V_USB1= V_USB2= V_BAT1= V_BAT2= 3V and V_OUT3= 3.3V, unless

otherwise noted.

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

%

l

Minimum Duty Cycle

0

ENA1 Input Logic Threshold

ENA1 Pull-Down Resistance

N-Channel Switch Resistance

P-Channel Switch Resistance

0.3

0.7

4.0

1.0

V

= 3V or V

= 0V

MΩ

Ω

PWRON

PWRKEY

0.34

Battery Powered

USB Powered

0.55

0.58

Ω

N-Channel Switch Leakage

P-Channel Switch Leakage

Power Good Threshold

V

= V

= V = 5.5V

BAT1,2

0.1

–8

5

μA

%

SW1

FB1

USB1,2

= 0V, V

Falling

= V

= 5.5V

BAT1,2

10

–5

USB1,2

l

–11

583

Power Good Hysteresis

Buck Converter 2

2.5

%

Feedback Voltage (FB2 Pin)

Feedback Pin Input Current (FB2 Pin)

P-Channel Current Limit

596

1

609

50

mV

nA

Battery Powered (Note 3)

USB Powered (Note 3)

440

540

mA

l

Maximum Duty Cycle

100

%

Minimum Duty Cycle

0

ENA2 Input Logic Threshold

ENA2 Pull-Down Resistance

N-Channel Switch Resistance

P-Channel Switch Resistance

0.3

0.7

4.0

1.0

V

= 3V or V

= 0V

MΩ

Ω

PWRON

PWRKEY

0.34

Battery Powered

USB Powered

0.55

0.58

Ω

N-Channel Switch Leakage

P-Channel Switch Leakage

Power Good Threshold

V

SW2

V

SW2

V

FB2

= V

= V = 5.5V

BAT1,2

0.1

–8

5

μA

%

USB1,2

= 0V, V

Falling

= V

= 5.5V

BAT1,2

10

–5

USB1,2

l

–11

Power Good Hysteresis

2.5

%

Buck-Boost Converter

l

Operating Output Voltage

Feedback Voltage (FB3 Pin)

Feedback Pin Input Current (FB3 Pin)

Inductor Current Limit

1.5

5.25

614

50

V

mV

nA

A

584

599

1

BAT or USB Powered (Note 3)

(Note 3)

1.2

1.5

400

450

87

Reverse Inductor Current Limit

Burst Mode Inductor Current Limit

Maximum Duty Cycle

mA

%

(Note 3)

l

Percentage of Period SW3B is Low in Boost Mode

Percentage of Period SW3A is High in Buck Mode

82

Minimum Duty Cycle

0

%

ENA3 Input Logic Threshold

ENA3 Pull-Down Resistance

N-Channel Switch Resistance

0.3

0.7

4.0

1.0

V

= 3V or V

= 0V

MΩ

PWRON

PWRKEY

Switch B (From SW3A to GND)

Switch C (From SW3B to GND)

0.150

0.140

Ω

P-Channel Switch Resistance

Switch A´ (From BAT2 to SW3A)

Switch A (From USB2 to SW3A)

Switch D (From OUT3 to SW3B)

0.150

0.180

0.195

Ω

3101f

3

LTC3101

ELECTRICAL CHARACTERISTICS ^Thel denotes the speciﬁcations which apply over the full operating

temperature range, otherwise speciﬁcations are at T_A= 25°C. V_USB1= V_USB2= V_BAT1= V_BAT2= 3V and V_OUT3= 3.3V, unless

otherwise noted.

PARAMETER

CONDITIONS

MIN

–11.5

200

TYP

0.1

MAX

5

UNITS

μA

N-Channel Switch Leakage

P-Channel Switch Leakage

Power Good Threshold

Power Good Hysteresis

MAX Output

V

= V

= 5.5V

OUT3

SW3A,B

USB1,2

BAT1,2

= 0V, V

= V

= V = 5.5V

OUT3

0.1

10

μA

USB1,2

BAT1,2

l

Falling

–8.5

2.5

–5.5

%

FB3

%

Current Limit

V

MAX

= 2.0V

300

mA

Switch Resistance

From BAT2 to MAX

From USB2 to MAX

0.890

0.930

Ω

Load Dependent Supply Current

LDO Output

1.0

μA/mA

l

Output Voltage

I

= 1mA

= 1.0V

1.755

50

1.800

110

0.1

0.9

0.1

12

1.845

V

mA

LDO

Current Limit

V

LDO

Line Regulation

Input Voltage (V

) = 1.8V to 5.5V, I

= 1mA

%

MAX

LDO

Load Regulation

I

= 1mA to 50mA

%

LDO

Reverse Current in Shutdown

Load Dependent Supply Current

Dropout Voltage

V

= V

= 0V, V = 1.8V

LDO

1

μA

BAT1,2

USB1,2

μA/mA

mV

V

= 1.75V, I

= 10mA

LDO

25

MAX

HSO

Hot Swap Output

Switch Resistance

0.730

150

Ω

l

Switch Current Limit

Pushbutton Logic and μP Reset Generator

PBSTAT Deglitching Duration

PBSTAT Low Voltage

RESET Low Voltage

V

= 2.0V

100

15

mA

24

20

ms

mV

μA

V

I

= 1mA

50

PBSTAT

20

RESET

C

RS

C

RS

Pin Charging Current

Pin Threshold Voltage

0.9

1.0

1.1

V

Rising

1.176

1.200

1.224

CRS

Logic Inputs

l

PWRKEY, PWRON, PWM Input Logic Threshold

PWRKEY Pull-Up Resistance

PWRON Pull-Down Resistance

0.3

0.7

400

4.0

1.0

V

kΩ

MΩ

Note 1: Stresses beyond those listed under Absolute Maximum Ratings

may cause permanent damage to the device. Exposure to any Absolute

Maximum Rating condition for extended periods may affect device

reliability and lifetime.

Note 2: The LTC3101 is guaranteed to meet performance speciﬁcations

from 0°C to 85°C. Speciﬁcations over the –40°C to 85°C operating

Note 4: The LTC3101 is tested in a proprietary non-switching test mode

that internally connects the error ampliﬁers in a closed-loop conﬁguration.

Note 5: This IC includes overtemperature protection that is intended

to protect the device during momentary overload conditions. Junction

temperature will exceed 125°C when overtemperature protection is active.

Continuous operation above the speciﬁed maximum operating junction

temperature may impair device reliability.

temperature range are ensured by design, characterization and correlation

with statistical process controls.

Note 3: Current measurements are performed when the LTC3101 is

not switching. The current limit values measured in operation will be

somewhat higher due to the propagation delay of the comparators.

3101f

4

LTC3101

TYPICAL PERFORMANCE CHARACTERISTICS ^(T_A^{= 25°C unless otherwise speciﬁed)}

Buck Efﬁciency

2 AA Cells to 1.5V

Buck Efﬁciency

2 AA Cells to 1.2V

Buck Efﬁciency

USB (5V) to 1.8V

100

90

80

70

60

50

40

30

20

10

0

100

90

80

70

60

50

40

30

20

10

0

100

90

80

70

60

50

40

30

20

10

0

Burst Mode OPERATION

L = 4.7μH

Burst Mode OPERATION

Burst Mode

OPERATION

PWM Mode

L = 4.7μH

V

BAT

V

BAT

= 3.2V

= 1.8V

V

BAT

V

BAT

= 3.2V

= 1.8V

0.1

1

10

100

1000

0.1

1

10

100

1000

0.1

1

10

100

1000

LOAD CURRENT (mA)

3101 G01

3101 G02

3101 G03

Buck-Boost Efﬁciency

2 AA Cells to 3.3V

Buck-Boost Efﬁciency

USB (5V) to 3.3V

Buck-Boost Efﬁciency

Li-Ion to 3.3V

100

90

80

70

60

50

40

30

20

10

0

100

90

80

70

60

50

40

30

20

10

0

100

90

80

70

60

50

40

30

20

10

0

L = 4.7μH

Burst Mode

OPERATION

Burst Mode

OPERATION

Burst Mode

OPERATION

PWM Mode

L = 4.7μH

V

BAT

V

BAT

= 3.2V

= 1.8V

V

BAT

V

BAT

= 3.0V

= 4.2V

1

10

100

1000

1

10

100

1000

1

10

100

1000

LOAD CURRENT (mA)

3101 G06

3101 G04

3101 G05

No-Load Quiescent Current in

Burst Mode Operation

Buck Burst Mode Threshold

Standby Quiescent Current

20

18

16

14

12

10

8

70

60

35

30

25

L = 4.7μH

BUCK1, BUCK2 AND

BUCK-BOOST ENABLED

V

= 0.8V

OUT

50

40

30

20

10

0

V

= 1.2V

OUT

20

15

10

5

BUCK-BOOST ENABLED

BOTH BUCKS DISABLED

V

= 1.8V

6

4

LDO AND HSO OUTPUTS ACTIVE

PWRON = 0V, PWRKEY= FLOATING

2

0

2

3

4

6

2

4

1

5

1

3

5

6

2.5

3.5

5.5

1.5

4.5

OR V

SUPPLY VOLTAGE, V

OR V

(V)

SUPPLY VOLTAGE, V

OR V

(V)

USB

SUPPLY VOLTAGE, V

(V)

USB

BAT

USB

BAT

3101 G08

3101 G09

3101 G07

3101f

5

LTC3101

TYPICAL PERFORMANCE CHARACTERISTICS ^(T_A^{= 25°C unless otherwise speciﬁed)}

Current Limit Thresholds vs

Temperature

Buck-Boost P-Channel Switch

R_DS(ON)

Buck Switch R_DS(ON)

10

8

240

220

200

800

700

600

500

400

300

200

100

0

PMOS

BUCK P-CHANNEL

CURRENT LIMIT

6

SWITCH D

4

SWITCH A

2

180

160

140

120

100

BUCK-BOOST

INDUCTOR

CURRENT LIMIT

NMOS

0

–2

–4

–6

–8

–10

SWITCH A´

50

TEMPERATURE (°C)

0

50

TEMPERATURE (°C)

150

–50

0

50

100

–50

0

100

150

–50

100

TEMPERATURE (°C)

3101 G10

3101 G11

3101 G12

Buck-Boost N-Channel Switch

R_DS(ON)

Buck-Boost P-Channel Switch

R_DS(0N)

Buck Switch R_DS(0N)

0.9

0.8

0.7

0.6

0.5

0.4

0.3

0.2

0.1

0.30

0.28

0.26

0.24

0.22

0.20

0.18

0.16

0.14

0.12

0.10

250

200

150

100

50

PMOS SWITCHES

SWITCH B

SWITCH C

SWITCH A

SWITCH D

NMOS SWITCHES

SWITCH A´

0

1

2

3

4

5

6

0

50

100

1

5

6

–50

150

2

3

4

SUPPLY VOLTAGE, V

OR V

(V)

SUPPLY VOLTAGE, V , V

OR V

(V)

OUT3

TEMPERATURE (°C)

BAT

USB

BAT USB

3101 G15

3101 G13

3101 G14

Buck-Boost N-Channel Switch

R_DS(0N)

Feedback Voltages

LDO Output Voltage

0.5

0.4

1.0

0.8

0.20

0.19

0.18

0.17

0.16

0.15

0.14

0.13

0.12

0.11

0.10

0.3

0.6

0.2

0.4

0.1

0.2

FB3

0

SWITCH B

SWITCH C

FB1, FB2

–0.1

–0.2

–0.3

–0.4

–0.5

–0.2

–0.4

–0.6

–0.8

–1.0

2

3

4

5

6

–50

0

50

100

150

50

TEMPERATURE (°C)

150

1

–50

0

100

TEMPERATURE (°C)

SUPPLY VOLTAGE, V

OR V

(V)

USB

BAT

3101 G16

3101 G17

3101 G18

3101f

6

LTC3101

TYPICAL PERFORMANCE CHARACTERISTICS ^(T_A^{= 25°C unless otherwise speciﬁed)}

Buck-Boost Maximum Load

Current, PWM Mode

Buck-Boost Maximum Load

Buck Output Voltage vs

Load Current

Current, Burst Mode Operation

1200

1000

120

100

0.20

0.15

0.10

0.05

0

V

OUT3

= 3.3V

V

OUT3

= 3.3V

800

600

80

60

V

OUT3

= 5V

V

OUT3

= 5V

–0.05

–0.10

–0.15

–0.20

400

200

0

40

20

0

200

LOAD CURRENT (mA)

0

100

300

400

1

2

3

4

5

6

1

2

3

4

5

6

SUPPLY VOLTAGE, V

OR V

(V)

SUPPLY VOLTAGE, V

OR V

(V)

USB

BAT

USB

BAT

3101 G21

3101 G19

3101 G20

Buck-Boost Output Voltage

vs Load Current

C_RSPin Current

Hot Swap Switch R_DS(0N)

0.5

0.4

1.0

0.8

1.2

1.0

0.3

0.6

0.2

0.4

0.8

0.6

0.1

0.2

0

–0.1

–0.2

–0.3

–0.4

–0.5

–0.2

–0.4

–0.6

–0.8

–1.0

0.4

0.2

0

200

400

600

800

1

2

3

4

5

6

1

2

3

4

5

6

BUCK-BOOST OUTPUT VOLTAGE (V)

LOAD CURRENT (mA)

SUPPLY VOLTAGE, V

OR V

(V)

USB

BAT

3101 G22

3101 G23

3101 G24

LDO Output Voltage vs

Supply Voltage

LDO Output Voltage vs

Load Current

MAX Output Switch R_DS(0N)

0.5

0.4

1.5

1.0

1.6

1.4

1.2

1.0

0.3

0.2

0.5

0.1

0.8

0.6

0

–0.1

–0.2

–0.3

–0.4

–1.5

–0.5

–1.0

–1.5

0.4

0.2

0

2

3

5

2

4

0

20

40

60

1

6

1

3

5

6

4

LDO LOAD CURRENT (mA)

SUPPLY VOLTAGE, V

OR V

(V)

SUPPLY VOLTAGE, V

OR V

(V)

BAT

USB

BAT

USB

3101 G25

3101 G26

3101 G27

3101f

7

LTC3101

TYPICAL PERFORMANCE CHARACTERISTICS ^(T_A^{= 25°C unless otherwise speciﬁed)}

Buck-Boost Load Step,

0mA to 800mA

PBSTAT Deglitch Duration

30

28

26

24

22

20

18

16

14

12

10

25

24

23

22

21

20

OUTPUT

VOLTAGE

200mV/DIV

INDUCTOR

CURRENT

500mA/DIV

3101 G30

V

= 3V

50μs/DIV

BAT

OUT

= 3.3V

L = 4.7μH

C

= 10μF

OUT

–50

0

50

100

150

1

2

3

4

5

6

TEMPERATURE (°C)

SUPPLY VOLTAGE, V

OR V

(V)

BAT

USB

3101 G28

3101 G29

Buck-Boost Load Step,

0mA to 300mA

Buck Load Step, Burst Mode

Operation, 10mA to 350mA

Buck Load Step, PWM Mode,

35mA to 350mA

OUTPUT

VOLTAGE

100mV/DIV

OUTPUT

VOLTAGE

100mV/DIV

OUTPUT

VOLTAGE

200mV/DIV

INDUCTOR

CURRENT

500mA/DIV

INDUCTOR

CURRENT

200mA/DIV

INDUCTOR

CURRENT

200mA/DIV

3101 G32

3101 G33

3101 G31

V

= 3V

50μs/DIV

V

= 3V

50μs/DIV

V

= 1.8V

= 3.3V

50μs/DIV

BAT

OUT

BAT

OUT

BAT

OUT

L = 4.7μH

= 1.2V

L = 4.7μH

C

= 10μF

= 18pF

C

= 10μF

= 18pF

C

OUT

= 10μF

OUT

FF

OUT

FF

Buck-Boost Burst Mode Ripple

Buck Burst Mode Ripple

OUTPUT

VOLTAGE

20mV/DIV

OUTPUT

VOLTAGE

10mV/DIV

INDUCTOR

CURRENT

200mA/DIV

INDUCTOR

CURRENT

50mA/DIV

3101 G35

3101 G34

V

= 3V

20μs/DIV

V

= 3V

20μs/DIV

BAT

OUT

BAT

OUT

= 1.2V

= 3.3V

L = 4.7μH

C

= 10μF

C

I

= 10μF

= 10mA

OUT

FF

OUT

= 18pF

LOAD

I

= 5mA

LOAD

3101f

8

LTC3101

TYPICAL PERFORMANCE CHARACTERISTICS ^(T_A^{= 25°C unless otherwise speciﬁed)}

Buck-Boost Burst to PWM Mode

Transient

Buck Output Voltage Transient on

USB Hot Plug

Buck-Boost Output Voltage

Transient on USB Hot Plug

V

OUT3

V

USB

50mV/DIV

= 5.5V

2V/DIV

V

BAT

V

OUT3

INDUCTOR

CURRENT

200mA/DIV

OUTPUT

VOLTAGE

200mV/DIV

INDUCTOR

CURRENT

200mA/DIV

OUTPUT

VOLTAGE

200mV/DIV

50mV/DIV

V

= 3V

BAT

V

50mV/DIV

= 1.8V

OUT3

V

BAT

3101 G38

3101 G37

3101 G36

V

I

= 3V

100μs/DIV

V

I

= 3V

100μs/DIV

V

= 3.3V

200μs/DIV

BAT

OUT

BAT

OUT

OUT3

= 3.3V

= 100mA

= 1.8V

= 100mA

L = 4.7μH

C

= 10μF

= 5mA

LOAD

OUT

I

LOAD

Buck-Boost Soft-Start, PWM Mode

Buck Soft-Start, PWM Mode

OUTPUT

VOLTAGE

1V/DIV

OUTPUT

VOLTAGE

500mV/DIV

INDUCTOR

CURRENT

200mA/DIV

INDUCTOR

CURRENT

200mA/DIV

3101 G39

3101 G40

V

= 3V

200μs/DIV

V

= 3V

200μs/DIV

BAT

OUT

BAT

OUT

= 3.3V

= 1.2V

L = 4.7μH

C

= 10μF

C

= 10μF

OUT

3101f

9

LTC3101

PIN FUNCTIONS

PWM (Pin 1): Pulse Width Modulation/Burst Mode Se-

lection Input. Forcing this pin high causes all switching

converters to operate in low noise ﬁxed frequency PWM

mode. Forcing this pin low enables Burst Mode operation

for all converters. With PWM held low, the buck-boost

converter will operate solely in Burst Mode operation and

can only support a minimal load current (typically 50mA).

With PWM low, the buck converters will automatically

transitionfromBurstModeoperationatlightloadcurrents

to PWM mode at heavy load currents.

PWRKEY (Pin 8): Pushbutton Power ON/OFF Key. Forcing

this pin to ground will turn on the LTC3101 DC/DC con-

verters in the internally controlled sequence and initiate a

microprocessor reset. This pin is usually connected to an

external momentary switch that is used to turn on the IC.

This pin has an internal pull-up resistor that is automati-

cally connected to the higher of the two input supplies,

battery or USB.

PBSTAT (Pin 9): Power ON/OFF Key Status Pin. This is a

debounced, open-drain output that indicates the state of

the PWRKEY pin to the microprocessor. In the typical ap-

plication, the microprocessor monitors this pin to detect

a second pushbutton activation indicating a power-down

request.

SW1(Pin2):BuckConverter1SwitchPin. Thispinshould

be connected to one side of the buck inductor.

BAT1(Pin3):BatteryPowerInputforBothBuckConverters.

A 4.7ꢀF or larger bypass capacitor should be connected

betweenthispinandground. Thebypasscapacitorshould

be located as close to the IC as possible and should via

directly down to the ground plane. Pins BAT1 and BAT2

must be connected together in the application.

LDO (Pin 10): Always-Alive LDO Output. This output is

internally regulated to 1.8V (typical) and is guaranteed to

supply an external load of up to 50mA. The LDO output

is always active whenever either supply, battery or USB

power, is present (independent of the states of all enables

and the pushbutton interface). This output can be utilized

to power an external real time clock or charge a superca-

pacitor for temporary memory backup when both power

sources are removed.

USB1 (Pin 4): USB or Wall Adapter Power Input for Both

BuckConverters.A4.7ꢀForlargerbypasscapacitorshould

beconnectedfromthispintoground.Thebypasscapacitor

shouldbelocatedasclosetotheICaspossibleandshould

viadirectlydowntothegroundplane.PinsUSB1andUSB2

must be connected together in the application.

MAX(Pin11):PowerOutputThatTrackstheHigherVoltage

Input Supply. This output is driven to the higher of the two

power inputs, USB2 or BAT2. This output can support a

loadcurrentofupto200mAandisshort-circuitprotected.

The MAX output can be used to power an LCD display or

external LDOs. The MAX output is operational whenever

either supply, BAT2 or USB2, is present, independent of

the state of all enables and the pushbutton interface.

SW2(Pin5):BuckConverter2SwitchPin. Thispinshould

be connected to one side of the buck inductor.

PWRON (Pin 6): Power-On Input. Forcing this input high

enables the IC. Typically, the PWRKEY input is used to

initially enable the LTC3101 while the microprocessor is

powering up. Once the microprocessor is initialized, it

forcesPWRONhightokeeptheLTC3101enabledwhenthe

momentarypushbuttonconnectedtoPWRKEYisreleased.

In applications that do not require pushbutton control, the

IC can be enabled directly by forcing PWRON high.

C

(Pin 12): Power-on Reset Duration Programming

RS

Capacitor. An external capacitor is connected from C to

RS

ground to set the duration of the microprocessor power-

on reset signal.

FB3 (Pin 7): Feedback Voltage Input for the Buck-Boost

Converter. The resistor divider connected to this pin sets

the output voltage for buck-boost converter.

3101f

10

LTC3101

PIN FUNCTIONS

ENA3 (Pin 19): Enable Pin for Buck-Boost Converter.

Forcing this pin above 1V will turn on the buck-boost

converter when the IC is enabled (via the pushbutton

interface). Forcing this pin below 0.3V will disable the

buck-boost converter.

RESET (Pin 13): Active-Low μP Reset and Fault Signal.

This pin provides an active-low microprocessor reset

signal. During the power-up sequence, the μP reset sig-

nal is held low until all converters are in regulation for a

duration programmed by the C capacitor. In addition,

RS

this pin is held low during a fault condition and when the

IC is disabled in order to prevent spurious turn-on of the

microprocessor.

SW3B (Pin 20): Buck-Boost Switch Pin. This pin should

be connected to one side of the buck-boost inductor.

ENA1 (Pin 21): Enable Pin for Buck Converter 1. Forcing

this pin above 1V will turn on the buck converter when the

IC is enabled (via the pushbutton interface). Forcing this

pin below 0.3V will disable buck converter 1.

BAT2 (Pin 14): Battery Power Input for the Buck-Boost

Converter.A10ꢀForlargerbypasscapacitorshouldbecon-

nectedbetweenthispinandground. Thebypasscapacitor

shouldbelocatedasclosetotheICaspossibleandshould

viadirectlydowntothegroundplane. PinsBAT1andBAT2

must be connected together in the application.

FB2(Pin22):FeedbackVoltageInputforBuckConverter 2.

The resistor divider connected to this pin sets the output

voltage for buck converter 2.

SW3A (Pin 15): Buck-Boost Switch Pin. This pin should

be connected to one side of the buck-boost inductor.

FB1(Pin23):FeedbackVoltageInputforBuckConverter 1.

The resistor divider connected to this pin sets the output

voltage for buck converter 1.

USB2 (Pin 16): USB or Wall Adapter Power Input for the

Buck-Boost Converter. A 10ꢀF or larger bypass capacitor

should be connectedfromthispinto ground. Thebypass

capacitor should be located as close to the IC as pos-

sible and should via directly down to the ground plane.

Pins USB1 and USB2 must be connected together in

the application.

ENA2 (Pin 24): Enable Pin for Buck Converter 2. Forcing

this pin above 1V will turn on the buck converter when the

IC is enabled (via the pushbutton interface). Forcing this

pin below 0.3V will disable buck converter 2.

Exposed Pad (Pin 25): Small-Signal and Power Ground

for the IC. The Exposed Pad must be soldered to the PCB

andelectricallyconnectedtogroundthroughtheshortest

and lowest impedance connection possible.

OUT3 (Pin 17): Buck-Boost Output Voltage. This pin is the

power output for the buck-boost regulator. It should be

connected to a low ESR capacitor with a value of at least

10ꢀF. For higher output current applications (>400mA), it

is recommended that a 22μF or larger output capacitor be

used. The capacitor should be placed as close to the IC as

possible and should have a short return path to ground.

HSO(Pin18):HotSwapOutput.Aninternalcurrent-limited

switch connects the HSO output to the buck-boost output

voltage after the buck-boost output reaches regulation.

With the buck-boost operating in PWM mode, this output

is guaranteed to support a 100mA load and is short-circuit

protected.

3101f

11

LTC3101

BLOCK DIAGRAM

14

16

15

SW3A

20

SW3B

17

BAT2* USB2*

OUT3

WELL

CONTROL

MAX

CONTROL

AND

D

HSO

18

CURRENT

LIMIT

A

MAX

11

B

C

Hot Swap

CONTROL

A´

ALWAYS-ON

LDO

CONTROL

LDO

10

3

BAT1*

USB1*

FB3

7

BUCK-BOOST

CONTROL

4

ENA3

19

4M

V

CC

WELL

CONTROL

400k

PWRKEY

PBSTAT

24ms

DEGLITCH

SW1

8

9

1.27MHz

OSCILLATOR

2

PUSHBUTTON

CONTROL

LOGIC

BANDGAP

BUCK 1

CONTROL

REFERENCE

PWM

OVERTEMPERATURE

SHUTDOWN AND

UNDERVOLTAGE

LOCKOUT

1

6

FB1

PWRON

23

21

ENA1

4M

RESET

WELL

CONTROL

13

12

1μA

1.20V

+

–

SW2

5

C

RS

DISABLED

FB1 POWER BAD (IF ENABLED)

FB2 POWER BAD (IF ENABLED)

FB3 POWER BAD (IF ENABLED)

UNDERVOLTAGE FAULT

BUCK 2

CONTROL

4M

ENA2

FB2

OVERTEMPERATURE FAULT

24

22

GND

(EXPOSED PAD)

25

3101 BD

*BAT1 AND BAT2 MUST BE CONNECTED TOGETHER IN THE APPLICATION

USB1 AND USB2 MUST BE CONNECTED TOGETHER IN THE APPLICATION

3101f

12

LTC3101

OPERATION

INTRODUCTION

An always-alive LDO provides a ﬁxed 1.8V output at 50mA

which can be utilized to power critical functions such as a

realtimeclock.ReverseblockingallowstheLDOtobeused

tochargeasupercapacitorformemoryretentionwhenboth

power sources are removed. The MAX output generates

a secondary always-alive, current-limited output rail that

tracks the higher voltage input power source (battery or

USB) and is convenient for powering additional external

LDOs and circuitry that can function directly from a wide

input voltage range.

The LTC3101 provides a complete power management

solution for low power portable devices. It generates a

total of six output voltage rails and provides a seamless,

automatic transition between two input power sources.

The LTC3101 contains three high efﬁciency synchronous

DC/DC converters: a 5-switch buck-boost DC/DC con-

verter and two synchronous 3-switch step-down DC/DC

converters. The buck-boost DC/DC converter is typically

utilized to provide a 3V or 3.3V rail that lies within the

input voltage range. The two step-down converters can

be conﬁgured to provide two lower voltage output rails,

such as a 1.8V rail for SDRAM and a 1.2V rail to supply

the system microprocessor.

A pushbutton interface and internal supply sequencing

complete the LTC3101 as a total power supply solution

while requiring only a minimal number of supporting

external components. Integral to the pushbutton control

is an internal microprocessor reset generator with a reset

duration that can be easily programmed using a single

external capacitor allowing the interface to be customized

to each particular application.

The LTC3101 can operate from any power source over the

wideinputvoltagerangeof1.8Vto5.5V.Allthreeswitching

DC/DCconvertersoperatefromacommon1.27MHzoscil-

lator and a single pin can be used to place all three DC/DC

converters into Burst Mode operation to reduce the total

no-load quiescent current with all six output voltage rails

active to only 38μA (typical). In standby operation, with

only the LDO and MAX outputs active, the input current

is reduced to 15μA (typical).

The extensive functionality and ﬂexibility of the LTC3101,

along with its small size and high efﬁciency, make it an

excellent power solution for a wide variety of low power

portable electronic products.

PUSHBUTTON INTERFACE

The 5-switch buck-boost DC/DC converter generates a

user-programmable output voltage rail that can lie within

the voltage range of the input power sources. Utilizing

a proprietary switching algorithm, the buck-boost con-

verter maintains high efﬁciency and low noise operation

with input voltages that are above, below, or even equal

to the required output rail. A protected Hot Swap output

powered by the buck-boost output voltage rail is enabled

once the buck-boost reaches regulation. This provides a

current-limitedoutputthatcanbeshortedwithoutaffecting

the primary buck-boost output. One use of the Hot Swap

output is to power external ﬂash memory cards that need

to be hot-plugged without disrupting the primary buck-

boost output rail.

The LTC3101 includes a pushbutton interface that allows

a single momentary pushbutton to control the sequenced

power-up and power-down of all output rails in coordina-

tion with an external microprocessor. In addition, three

independentenablepinsallowanunusedDC/DCconverter

to be independently disabled and also provide the means

to manually implement an alternate power-up sequence.

The LTC3101 can be enabled by either forcing PWRON

highorbyforcingPWRKEYlow. Ineithercase, theDC/DC

converters (if enabled by their respective enable pin)

will power up in the internally ﬁxed default sequence:

buck converter 1, buck converter 2, and ﬁnally the buck-

boost converter. In the typical application, the power-on

sequenceisinitiatedwhenthePWRKEYisdrivenlowbyan

external momentary pushbutton. Once the microproces-

sor is powered up it must assert PWRON high before the

pushbutton is released, thereby forcing the LTC3101 to

The synchronous buck converters are typically used to

provide two high efﬁciency lower voltage rails and sup-

port 100% duty cycle operation to extend battery life. The

output voltage of each buck converter is independently

user programmable and can be set as low as 0.6V.

3101f

13

LTC3101

OPERATION

remainenabled. Power-downisusuallyaccomplishedby

having the microprocessor monitor PBSTAT to detect an

additional push of the pushbutton. Once this is detected,

the microprocessor disables the LTC3101 by forcing

PWRON low (or simply releasing PWRON and allowing

it be pulled low by its internal pull-down resistor). In

this manner, a single external momentary pushbutton is

all that is required to provide sequenced power-up and

power-down control.

duration that is longer than the 24ms (typical) internal

debouncing duration. Once the PWRKEY is held low for

the debouncing duration, PBSTAT is driven low to indicate

the pushbutton status. In addition, buck converter 1 is

enabled and its output begins rising into regulation. Once

thefeedbackvoltageofbuckconverter1reachesitspower

good threshold, buck converter 2 is enabled. After buck

converter 2 reaches its power good threshold, the buck-

boost converter is enabled. Finally, once the buck-boost

output reaches its power good threshold, the Hot Swap

output is enabled and simultaneously the microprocessor

resetdurationbeginswhena1μA(nominal)currentbegins

Figure 1 depicts the waveforms in the standard power-up

sequence. In this example, it is assumed that all three

DC/DC converter rails are used in the application and

therefore ENA1, ENA2 and ENA3 are driven high (or tied

totheMAXoutput).Anexternalnormally-openpushbutton

is connected between ground and the PWRKEY pin. When

the pushbutton is not pressed, PWRKEY is pulled high

via an internal 400k pull-up resistor. Until the power-up

sequence is initiated, the IC is in the standby state, and

only the LDO and MAX outputs are active.

charging the external C capacitor. The microprocessor

RS

reset output, RESET, is driven low throughout this entire

power-up sequence until the C pin is charged to 1.2V

RS

(typical). Once RESET goes high, the microprocessor in

the application initializes and must drive the PWRON input

of the LTC3101 high in order to keep the LTC3101 enabled.

If PWRON is not driven high by the time PWRKEY returns

high (i.e., the pushbutton is released) then the LTC3101

will be disabled and all outputs will be actively discharged

to ground.

The standard power-up sequence is initiated when

the pushbutton is pressed, forcing PWRKEY low for a

PWRKEY

PBSTAT

24ms BLANKING

V

BUCK 1

BUCK 2

OUT

V

OUT

BUCK-BOOST

HSO

C

RS

RESET

PWRON

3101 F01

Figure 1. Power-Up Sequence Waveforms

3101f

14

LTC3101

OPERATION

Independent Enables

automatically re-enable even if the fault condition clears.

Instead,theLTC3101willhavetoberestartedviarepeating

the normal power-up sequence. Alternatively, if PWRON is

held high until the fault condition clears, then any enabled

converters will power up in the default sequence once the

fault clears and the microprocessor reset will clear after

its programmed delay.

Each of the buck converters and the buck-boost converter

have independent enable pins (ENA1, ENA2 and ENA3).

These provide an additional degree of ﬂexibility by allow-

ing any unused channels to be independently disabled

and skipped in the power-up sequence. For example, if

the additional low voltage rail generated by the second

buck converter is not required, it can be disabled by

simply forcing ENA2 to ground. The power-up sequence

will be unaffected except that second buck converter will

be skipped. As a result, buck converter 1 will power up

and the buck-boost will be enabled as soon as buck con-

verter 1 reaches regulation. Any unused channels can be

disabled in this fashion and they will simply be skipped

in the power-up sequence.

Ifthepowergoodcomparatorforanyconverterindicatesa

fault condition (loss of regulation), the C pin and RESET

RS

pins are driven low. In a typical application, this will place

themicroprocessorintheresetconditionwhichwillrelease

the force on PWRON and therefore disable the LTC3101.

However, if PWRON is maintained high, all converters will

remain enabled through the fault condition. Once the fault

conditionclears,theaffectedconverteroutputwillrecover,

and C will begin charging. After the programmed reset

RS

Manual Power-Up Via The PWRON Pin

duration, RESET will be released.

If the pushbutton interface is not required, the LTC3101

can be manually enabled by simply forcing the PWRON

pin high. When PWRON is forced high any channels that

are enabled via their independent enable pin will power

up in the standard sequence (buck converter 1, buck con-

verter 2 and then the buck-boost converter). An arbitrary

power-up sequence can be forced manually, by forcing all

enables (ENA1, ENA2, ENA3) low while bringing PWRON

high. Then, after waiting 10ꢀs for the logic to initialize,

theindividualconverterscanbemanuallyenabledviatheir

independentenablepinsinanyorderrequired.Forexample,

a simultaneous power-up is initiated by bringing PWRON

high while holding ENA1, ENA2 and ENA3 low. Then after

a 10μs or longer delay, ENA1, ENA2 and ENA3 can be

brought high simultaneously causing the two buck rails

and the buck-boost rail to begin rising simultaneously.

LDO OUTPUT

The LDO output generates a regulated 1.8V (nominal)

output voltage rail that is guaranteed to support a 50mA

load. The LDO output remains active whenever a valid

supply is present on either the USB2 or BAT2 inputs and

is unaffected by the pushbutton interface. Its always-on

status allows the LDO to power critical functions such as

a real time clock which must remain powered under all

conditions.

The LDO output is reverse blocking in shutdown (i.e.,

whenundervoltagelockoutthresholdisreached)allowing

its output to stay charged when both input supplies are

removedwithreverseleakageguaranteedtobeunder1μA.

This allows the LDO to be used to charge a supercapaci-

tor for memory retention purposes or powering standby

functions during times when both power sources are

removed. The LDO is speciﬁcally designed to be stable

with a small 4.7μF capacitor, but to also maintain stable

operationwitharbitrarilylargecapacitancesupercapacitors

without requiring a series isolation resistor.

Fault Conditions

On an overtemperature or input undervoltage fault condi-

tion, all DC/DC converters, the LDO, and the MAX output

are disabled and the C pin is driven low which results

RS

in the microprocessor reset output, RESET, being driven

low as well. In the standard application, this will cause

the microprocessor to release the PWRON pin, thereby

disablingtheLTC3101.Consequently,theLTC3101willnot

The LDO output is current-limit protected. On an

undervoltageorovertemperaturefault,theLDOisdisabled

until the fault condition clears.

3101f

15

LTC3101

OPERATION

MAX OUTPUT

be utilized in Burst Mode operation to improve light-load

efﬁciency and no-load standby current or in PWM mode

to ensure low noise operation. Each buck converter has

dual P-channel power switches and a single N-channel

synchronous rectiﬁer. The dual P-channel power switches

allow the buck converters to operate directly from either

the battery or USB inputs (BAT1 or USB1). The buck

converters will automatically and seamlessly transition

to operate from the higher voltage supply. Both buck

converters feature short-circuit protection and frequency

foldback to prevent inductor current run-away during low

resistance output short conditions.

TheMAXoutputgeneratesaprotectedoutputrailthattracks

the higher of the two input supplies, BAT2 or USB2. The

MAX output is current-limit protected and is guaranteed

to support a 200mA load.

The MAX output is an always-alive output, meaning it is

alwaysenabledindependentofthestateofthepushbutton

interface. This allows the MAX output to power additional

LDOs or critical circuitry that must remain powered in

standby. In addition, the MAX output can be used to

efﬁciently power additional application circuits that can

operate directly from a wide input voltage range without

burdeningoneoftheswitchingconverters.TheMAXoutput

is also a convenient supply for forcing logic inputs (such

as PWM, ENA1, ENA2 and ENA3) high since it is powered

whenever either input supply is present.

PWM Mode Operation

If the PWM pin is forced high, both buck converters will

operate in ﬁxed frequency pulse width modulation mode

using current mode control. At the start of each oscillator

cycle,theactiveP-channelswitchisturnedonandremains

on until the inductor current with superimposed slope

compensation ramp exceeds the error ampliﬁer output.

At this point, the synchronous rectiﬁer is turned on and

remains on until the inductor current falls to zero or a new

switching cycle is initiated. As a result, the buck converter

operateswithdiscontinuousinductorcurrentatlightloads

in order to improve efﬁciency. At extremely light loads, the

minimum on-time of the P-channel switch will be reached

and the buck converter will begin turning off for multiple

cycles in order to maintain regulation.

The MAX output is disabled in undervoltage lockout and

during overtemperature shutdown. Since the MAX output

serves as the input to the LDO, it is recommended that

it be bypassed with a 1μF or greater ceramic capacitor if

the LDO is to be used in the application.

Hot Swap (HSO) OUTPUT

The HSO output is generated by a protected power switch

from the output of the buck-boost converter. It provides

a current-limited output that can be shorted to ground

without disrupting the buck-boost output voltage. This

is primarily intended to be used as a supply rail for ﬂash

memory cards which can be hot-plugged in the applica-

tion. When a card is hot-plugged into the HSO output,

the supply bypass capacitors on the card are gradually

charged via the current-limited output without affecting

the buck-boost output rail. The HSO output is not enabled

until the buck-boost is enabled and the buck-boost power

good comparator indicates it is in regulation.

Burst Mode Operation

When the PWM pin is forced low, both buck converters

will automatically and independently transition between

Burst Mode operation at sufﬁciently light loads (below

approximately 10mA) and PWM mode at heavier loads.

Burst Mode entry is determined by the peak inductor cur-

rent and therefore the load current at which Burst Mode

operation will be entered depends on the input voltage,

the output voltage and the inductor value. Typical curves

for Burst Mode entry threshold are provided in the Typical

Performance Characteristics section of this data sheet.

In dropout operation, the active P-channel switch will

remain on continuously and Burst Mode operation will

not be entered.

BUCK CONVERTER OPERATION

The LTC3101 contains two independent buck DC/DC

converters each capable of supplying a 350mA load. Each

has an adjustable output voltage that can be set as low as

0.6V. In addition, each buck converter supports low drop-

out operation to extend battery life. These converters can

3101f

16

LTC3101

OPERATION

Low Dropout Operation

Internal Voltage Mode Soft-Start

As the input voltage decreases to a value approaching

the output regulation voltage, the duty cycle increases to

the maximum on-time of the P-channel switch. Further

reduction of the supply voltage will force the main switch

to remain on for more than one cycle and subharmonic

switchingwilloccurtoprovideahighereffectivedutycycle.

Iftheinputvoltageisdecreasedfurther,thebuckconverter

will enter 100% duty cycle operation and the P-channel

switch will remain on continuously. In this dropout state,

the output voltage is determined by the input voltage less

theresistivevoltagedropacrosstheP-channelswitchand

series resistance of the inductor.

Each buck converter has an independent internal voltage

mode soft-start circuit with a nominal duration of 800ꢀs.

The buck converters remain in regulation during soft-start

and will therefore respond to output load transients which

occurduringthistime. Inaddition, theoutputvoltagerise-

time has minimal dependency on the size of the output

capacitor or load current during start-up.

Error Ampliﬁer and Internal Compensation

TheLTC3101buckconvertersutilizeinternaltransconduc-

tanceerrorampliﬁers.Compensationofthebuckconverter

feedback loops is performed internally to reduce the size

of the application circuit and simplify the design process.

Thecompensationnetworkhasbeendesignedtoallowuse

of a wide range of output capacitors while simultaneously

ensuring a rapid response to load transients.

Slope Compensation

Currentmodecontrolrequirestheuseofslopecompensa-

tion to prevent sub-harmonic oscillations in the inductor

currentwaveformathighdutycycleoperation.Thisfunction

isperformedinternallyontheLTC3101throughtheaddition

of a compensating ramp to the current sense signal. In

some current mode ICs, current limiting is performed by

clamping the error ampliﬁer voltage to a ﬁxed maximum.

This leads to a reduced output current capability at low

step-down ratios. In contrast, the LTC3101 performs cur-

rent-limiting prior to addition of the slope compensation

ramp and therefore achieves a peak inductor current limit

that is independent of duty cycle.

Power Good Comparator Operation

Eachbuckconverterhasaninternalpowergoodcompara-

tor that monitors the respective feedback pin voltage (FB1

or FB2). The power good comparator outputs are used at

power-upforsequencingpurposes. Duringnormalopera-

tion, the power good comparators are used to monitor

the output rails for a fault condition. If either buck power

good comparator indicates a fault condition, the C and

RS

RESET pins are driven low. This can be used to reset a

microprocessorintheapplicationcircuitwheneitherbuck

converter output rail loses regulation.

Output Short-Circuit Operation

When the output is shorted to ground, the error ampliﬁer

will saturate high and the P-channel switch will turn on

at the start of each cycle and remain on until the current

limit trips. During this minimum on-time of the P-channel

switch, the inductor current will increase rapidly but will

decrease very slowly during the remainder of the period

due to the very small reverse voltage produced by a hard

outputshort.Toeliminatethepossibilityofinductorcurrent

runaway in this situation, the switching frequency of the

buck converters is reduced by a factor of four when the

voltage on the respective feedback pin (FB1 or FB2) falls

below 0.3V. This provides additional time for the inductor

current to reset and thereby protects against a build-up

of current in the inductor.

The buck power good comparator will trip when the

respective feedback pin falls 8% (nominally) below the

regulation voltage. With a rising output voltage, the power

good comparator will typically clear when the respective

feedback voltage rises to within 5.5% of the regulation

voltage. In addition, there is a 60ꢀs typical deglitching

delay in the power good comparators in order to prevent

false trips due to brief voltage transients occurring on

load steps.

3101f

17

LTC3101

OPERATION

switch A remains on for a larger portion of the switching

cycle. When the duty cycle reaches approximately 85%,

the switch pair AC begins turning on for a small fraction

of the switching period. As the input voltage decreases

further, the AC switch pair remains on for longer durations

andthedurationoftheBDphasedecreasesproportionally.

As the input voltage drops below the output voltage, the

AC phase will eventually increase to the point that there is

no longer any BD phase. At this point, switch A remains on

continuously while switch pair CD is pulse width modu-

lated to obtain the desired output voltage. At this point,

the converter is operating solely in boost mode.

BUCK-BOOST CONVERTER OPERATION

The buck-boost converter is a synchronous 5-switch

DC/DC converter with the capability to operate efﬁciently

with input voltages that are above, below or equal to

the output regulation voltage. A proprietary switching

algorithm provides a smooth transition between opera-

tional modes while maintaining high efﬁciency and low

noise performance. Referring to the Block Diagram, the

buck-boost converter has two P-channel input power

switches, A and A´. This provides the capability for the

buck-boost converter to operate directly from either input

power source, USB or battery. The buck-boost converter

automatically and seamlessly transitions to the higher

voltage input supply.

This switching algorithm provides a seamless transition

between operating modes and eliminates discontinuities

in average inductor current, inductor current ripple, and

loop transfer function throughout all three operational

modes. These advantages result in increased efﬁciency

and stability in comparison to the traditional 4-switch

buck-boost converter.

PWM Mode Operation

When the PWM pin is held high, the LTC3101 buck-boost

converteroperatesinaﬁxedfrequencypulsewidthmodu-

lation mode using voltage mode control. A proprietary

switching algorithm allows the converter to transition

between buck, buck-boost, and boost modes without

discontinuity in inductor current or loop characteristics.

Theswitchtopologyforthebuck-boostconverterisshown

in Figure 2.

Error Ampliﬁer and Internal Compensation

The buck-boost converter utilizes a voltage mode error

ampliﬁerwithaninternalcompensationnetworkasshown

in Figure 3.

Notice that resistor R2 of the external resistor divider

networkplaysanintegralroleindeterminingthefrequency

response of the compensation network. The ratio of R2 to

R1 is set to program the desired output voltage but this

still allows the value of R2 to be adjusted to optimize the

When the input voltage is signiﬁcantly greater than the

output voltage, the buck-boost converter operates in

buck mode. Switch D turns on continuously and switch

C remains off. Switches A (or A´) and B are pulse width

modulatedtoproducetherequireddutycycletosupportthe

output regulation voltage. As the input voltage decreases,

LTC3101

V

OUT3

L

V

OUT3

USB2 BAT2

A´

SW3A

SW3B

D

V

OUT3

R2

R1

+

–

0.599V

FB3

A

B

C

GND (EXPOSED PAD)

LTC3101

3101 F02

Figure 2. Buck-Boost Switch Topology

Figure 3. Buck-Boost Error Ampliﬁer and Compensation

3101f

18

LTC3101

OPERATION

transient response of the converter. Increasing the value

of R2 generally leads to greater stability at the expense of

reduced transient response speed. Increasing the value of

R2 can yield substantial transient response improvement

in cases where the phase margin has been reduced due to

use of a small value output capacitor or a large inductance

(particularly with large boost step-up ratios). Conversely,

decreasing the value of R2 increases the loop bandwidth

which can improve the speed of the converter’s transient

response. This can be useful in improving the transient

response if a large value output capacitor is utilized. In

this case, the increased bandwidth created by decreasing

R2 is used to counteract the reduced converter bandwidth

caused by the large output capacitor.

Reverse Current Limit

A reverse current comparator on switch D monitors the

current entering the OUT3 pin. When this current exceeds

400mA (typical) switch D will be turned off for the re-

mainder of the switching cycle. This feature protects the

buck-boostconverterfromexcessivereversecurrentifthe

buck-boost output is held above the regulation voltage by

an external source.

Burst Mode Operation

With the PWM pin held low, the buck-boost converter

operatesutilizingavariablefrequencyswitchingalgorithm

designed to improve efﬁciency at light load and reduce

the standby current at zero load. In Burst Mode operation,

the inductor is charged with ﬁxed peak amplitude current

pulses. These current pulses are repeated as often as

necessary to maintain the output regulation voltage. The

maximum output current, I

Burst Mode operation is dependent upon the input and

output voltage as given by the following formula:

Current Limit Operation

The buck-boost converter has two current limit circuits.

The primary current limit is an average current limit cir-

cuit which injects an amount of current into the feedback

node which is proportional to the extent that the switch A

(or A´) current exceeds the current limit value. Due to the

high gain of the feedback loop, the injected current forces

the error ampliﬁer output to decrease until the average

current through switch A decreases approximately to the

current limit value. The average current limit utilizes the

error ampliﬁer in an active state and thereby provides a

smoothrecoverywithlittleovershootoncethecurrentlimit

fault condition is removed. Since the current limit is based

on the average current through switch A (or A´), the peak

inductor current in current limit will have a dependency

on the duty cycle (i.e., on the input and output voltages)

in the overcurrent condition.

, which can be supplied in

MAX

0.15 • V

IN

I_MAX

=

A

( )

V + V_OUT

IN

If the buck-boost load exceeds the maximum Burst Mode

currentcapability,theoutputrailwillloseregulationandthe

power good comparator will indicate a fault condition.

InBurstModeoperation,theerrorampliﬁerisnotusedbut

is instead placed in a low current standby mode to reduce

supply current and improve light load efﬁciency.

Internal Voltage Mode Soft-Start

The speed of the average current limit circuit is limited by

thedynamicsoftheerrorampliﬁer. Onahardoutputshort,

itwouldbepossiblefortheinductorcurrenttoincreasesub-

stantially beyond current limit before the average current

limit circuit would react. For this reason, there is a second

current limit circuit which turns off switch A (and A´) if the

current ever exceeds approximately 165% of the average

current limit value. This provides additional protection in

the case of an instantaneous hard output short.

The buck-boost converter has an internal voltage mode

soft-start circuit with a nominal duration of 800ꢀs. The

converter remains in regulation during soft-start and will

therefore respond to output load transients that occur

during this time. In addition, the output voltage rise time

has minimal dependency on the size of the output capaci-

tor or load. During soft-start, the buck-boost converter is

forced into PWM mode operation regardless of the state

of the PWM pin.

3101f

19

LTC3101

OPERATION

Power Good Comparator Operation

may be cases at the boundary of reaching current limit

when the buck-boost converter is continuously in current

limit, causing the power good comparator to indicate a

fault, but the output voltage may be slightly above the

actual power good threshold.

The buck-boost converter contains an internal power

good comparator that continuously monitors the voltage

of the feedback pin FB3. The output of this comparator

is used during power-up for sequencing purposes. In ad-

dition, during operation, if the power good comparator

COMMON FUNCTIONS

Thermal Shutdown

indicates a fault condition, C and RESET will be driven

RS

low. This feature can be used to reset a microprocessor

in the application circuit if the buck-boost output loses

regulation.

Ifthedietemperatureexceeds150°CallDC/DCconverters

will be disabled. In addition, the LDO and MAX outputs are

disabled. All power devices are turned off and all switch

nodeswillbehighimpedance. Thesoft-startcircuitsforall

converters are reset during thermal shutdown to provide

a smooth recovery once the overtemperature condition is

eliminated. All DC/DC converters (if enabled) and the LDO

and MAX outputs will restart when the die temperature

drops to approximately 140°C.

In Burst Mode operation (PWM = low), the buck-boost

power good comparator will indicate a fault when the

feedbackvoltagefallsapproximately8.5%belowtheregu-

lation voltage. There is approximately 2.5% hysteresis in

this threshold when the output voltage is returning good.

In addition, there is a 60ꢀs typical deglitching delay in

order to prevent false trips due to short duration voltage

transients in response to load steps.

In PWM mode, operation of the power good comparator

is complicated by the fact that the feedback pin voltage

is driven to the reference voltage independent of the

output voltage through the action of the voltage mode

error ampliﬁer. Since the soft-start is voltage mode, the

feedback voltage will track the output voltage correctly

during soft-start, and the power good comparator output

will correctly indicate the point at which the buck-boost

attains regulation at the end of soft-start. However, once

in regulation, the feedback voltage will no longer track the

output voltage and the power good comparator will not

immediately respond to a loss of regulation in the output.

For this reason, the power good comparator output is also

designed to indicate a fault condition if the buck-boost

converter enters current limit. The only means by which a

loss of regulation can occur is if the current limit has been

reachedtherebypreventingthebuck-boostconverterfrom

delivering the required output current. In such cases, the

occurrence of current limit will directly cause the power

good comparator to indicate a fault state. However, there

Undervoltage Lockout

If the supply voltage decreases below 1.65V (typical) then

allDC/DCconverterswillbedisabledandallpowerdevices

are turned off. In addition, the MAX and LDO outputs are

disabled. The LDO is forced into its reverse blocking state,

allowing the LDO output to remain powered with less

than 1μA reverse current being drawn by the LTC3101.

The soft-start circuits for all DC/DC converters are reset

during undervoltage lockout to provide a smooth restart

once the input voltage rises above the undervoltage

lockout threshold.

Active Output Discharge

All three DC/DC converter outputs are actively discharged

to ground when disabled through 1kΩ (typical) imped-

ances.Thebuckconverteroutputsaredischargedthrough

the inductor via a pull-down resistor on the respective

switch pin.

3101f

20

LTC3101

APPLICATIONS INFORMATION

The basic LTC3101 application circuit is shown as the

Typical Application on the front page of this data sheet.

The external component selection is dependent upon the

required performance of the IC in each particular appli-

cation given considerations and tradeoffs such as PCB

area, output voltages, output currents, ripple voltages

and efﬁciency. This section of the data sheet provides

some basic guidelines and considerations to aid in the

selection of external components and the design of the

application circuit.

application, it is recommended that it be bypassed with

a 1ꢀF or larger ceramic capacitor. There is no limit to the

maximumcapacitanceonthispin.However,thesoft-start

duration is formed by the current-limited output charg-

ing the capacitance attached to the pin so larger output

capacitors will result in proportionally longer soft-start

durations.

Buck Inductor Selection

The choice of buck inductor value inﬂuences both the ef-

ﬁciency and the magnitude of the output voltage ripple.

Larger inductance values will reduce inductor current

ripple and will therefore lead to lower output voltage

ripple. For a ﬁxed DC resistance, a larger value inductor

will yield higher efﬁciency by lowering the peak current to

be closer to the average output current. However, a larger

inductor within a given inductor family will generally have

a greater series resistance, thereby counteracting this

efﬁciency advantage.

C

Capacitor Selection

RS

A capacitor from the C pin to ground is used to pro-

RS

gram the duration of the microprocessor reset signal on

the RESET pin. A low leakage ceramic capacitor should

be utilized to ensure reliable temperature independent

operation. At the start of the active-low reset pulse, a 1ꢀA

(typical) current begins charging the C capacitor. The

RS

RESET pulse ends when the voltage at the C pin reaches

RS

1.20V(typical).Therefore,therequiredC capacitorvalue,

RS

Given a desired peak-to-peak current ripple, ΔI , the

L

C , is given by the following equation where t

is the

RS

RESET

required inductance can be calculated via the following

expression, where f represents the switching frequency

in MHz:

desired reset duration in milliseconds:

t_RESET

1200

C_RS

=

μF

( )

⎛

⎞

V_OUT

f • ΔI_L

V_OUT

L =

1–

μH

(

)

⎜

⎟

V

If the microprocessor reset function of the LTC3101 is

⎝

⎠

IN

unused, the C pin can be left unconnected.

RS

A reasonable choice for ripple current is ΔI = 140mA

L

LDO Output Capacitance

which represents 40% of the maximum 350mA load

current. The DC current rating of the inductor should be

at least equal to the maximum load current plus half the

ripple current in order to prevent core saturation and loss

of efﬁciency during operation. To optimize efﬁciency the

inductor should have a low DC resistance (DCR).

The LDO has been speciﬁcally designed for stable opera-

tion with a wide range of output capacitors. For most ap-

plications, a low ESR ceramic capacitor of at least 4.7μF

should be utilized. Large valued supercapacitors can be

connected directly to the LDO output without requiring a

series isolation resistor for loop stability. However, if the

supercapacitor has signiﬁcant ESR, it may be necessary

to place a small 4.7ꢀF ceramic in parallel with the super-

capacitor to maintain an adequate phase margin.

In particularly space-restricted applications it may be

advantageous to use a much smaller value inductor at

the expense of larger ripple current. In such cases, the

converter will operate in discontinuous conduction for a

wider range of output loads and efﬁciency will be reduced.

In addition, there is a minimum inductor value required

to maintain stability of the current loop as determined by

the ﬁxed internal slope compensation. Speciﬁcally, if the

MAX Capacitor Selection

The MAX output serves as the input to the LDO. There-

fore, even if the MAX output is unused directly in the

3101f

21

LTC3101

APPLICATIONS INFORMATION

buck converter is going to be utilized at duty cycles over

Table 2. Representative Buck Inductors

40%, the inductance value must be at least equal to L

VALUE DCR

MAX DC

CURRENT (A)

SIZE (mm)

W × L × H

MIN

PART NUMBER

(ꢀH)

(Ω)

as given by the following equation:

Coilcraft

LPS3015

EPL2014

EPL2010

LPS4018

L

= 2.5 • V

(μH)

4.7

0.20

0.23

1.2

0.88

0.65

1.9

3.0 × 3.0 × 1.5

2.0 × 2.0 × 1.4

2.0 × 2.0 × 1.0

4.0 × 4.0 × 1.8

MIN

OUT

Table 1 depicts the minimum required inductance for

several common output voltages.

0.43

0.125

Cooper-Bussmann

SD3118

Table 1. Buck Minimum Inductance

4.7

0.162

0.246

0.285

0.154

1.31

0.80

0.68

1.08

3.1 × 3.1 × 1.8

3.1 × 3.1 × 1.2

3.1 × 3.1 × 1.0

5.2 × 5.2 × 1.0

SD3112

OUTPUT VOLTAGE

MINIMUM INDUCTANCE

SD3110

SD10

0.8V

1.2V

1.8V

2.0V

2.7V

2.0ꢀH

3.0ꢀH

4.7ꢀH

5.0ꢀH

6.8ꢀH

Murata

LQH3NP

LQM31PN

LQH32CN

4.7

0.26

0.30

0.15

0.80

0.70

0.65

3.0 × 3.0 × 0.9

3.2 × 1.6 × 0.85

3.2 × 2.5 × 2.0

Panasonic

ELLVEG

ELL4G

4.7

0.24

0.16

0.09

0.70

0.86

1.10

3.0 × 3.0 × 1.0

3.8 × 3.8 × 1.1

3.8 × 3.8 × 1.8

A large variety of low ESR, high current power inductors

areavailablethatarewellsuitedtoLTC3101buckconverter

applications. The tradeoff generally involves PCB area,

application height, required output current and efﬁciency.

Table 2 provides a representative sampling of small sur-

face mount inductors that are well suited for use with

the LTC3101 buck converters. All inductor speciﬁcations

are listed at an inductor value of 4.7μH for comparison

purposes but other values within these inductor families

are generally well suited to this application as well. Within

eachfamily(i.e.,ataﬁxedinductorsize),theDCresistance

generally increases and the maximum current generally

decreases with increased inductance.

ELL4LG

Sumida

CDRH2D09

CDRH3D16/LD

CDRH2D09B

4.7

0.167

0.081

0.218

0.42

0.62

0.70

3.2 × 3.2 × 1.0

3.2 × 3.2 × 1.8

3.0 × 2.8 × 1.0

Taiyo-Yuden

CBC2518

CBC3225T

NR3010T

4.7

0.2

0.1

0.19

0.68

1.01

0.75

2.5 × 1.8 × 1.8

3.2 × 2.5 × 2.5

3.0 × 3.0 × 1.0

TOKO

DE2812C

D310F

4.7

0.13

0.26

0.09

1.2

0.9

3.0 × 3.2 × 1.2

3.8 × 3.8 × 1.0

3.2 × 3.2 × 1.8

DB3015C

0.86

Wurth

744028004

744032004

744029003

4.7

0.265

0.280

0.170

0.90

0.49

0.80

2.8 × 2.8 × 1.1

3.2 × 2.5 × 2.0

2.8 × 2.8 × 1.35

Buck Output Capacitor Selection

margin. In addition, the wider bandwidth produced by a

smalloutputcapacitorwillmaketheloopmoresusceptible

to switching noise. Table 3 depicts the minimum recom-

mended output capacitance for several typical output

voltages. At the other extreme, if the output capacitor is

too large, the crossover frequency can decrease too far

below the compensation zero and also lead to degraded

phase margin. In such cases, the phase margin and tran-

sient performance can be improved by simply increasing

the size of the feedforward capacitor in parallel with the

upper resistor divider resistor. (See Buck Output Voltage

Programming section for more details).

A low ESR output capacitor should be utilized at the buck

converteroutputinordertominimizeoutputvoltageripple.

Multilayer ceramic capacitors are an excellent choice as

they have low ESR and are available in small footprints. In

addition to controlling the ripple magnitude, the value of

theoutputcapacitoralsosetstheloopcrossoverfrequency

and therefore can impact loop stability. In general, there is

bothaminimumandmaximumcapacitancevaluerequired

to ensure stability of the loop. If the output capacitance is

too small, the loop crossover frequency will increase to

the point where switching delay and the high frequency

parasiticpolesoftheerrorampliﬁerwilldegradethephase

3101f

22

LTC3101

APPLICATIONS INFORMATION

capacitance of the feedback pin produce a parasitic pole

that can reduce the loop phase margin if it becomes too

low in frequency. For these reasons, it is recommended

that the resistance of R1 in parallel with R2 be kept under

300k. A reasonable compromise between noise immu-

nity and quiescent current is provided by choosing R2 =

221k. The required value for R1 can then be calculated

via Equation 1.

Table 3. Buck Minimum Recommended Output Capacitance

MINIMUM RECOMMENDED

OUTPUT VOLTAGE

OUTPUT CAPACITANCE

0.6V

0.8V

1.2V

1.8V

2.7V

3.3V

22ꢀF

10ꢀF

4.7ꢀF

To further increase the noise immunity of the feedback pin

and improve the transient response of the buck converter,

Buck Input Capacitor Selection

a small value feedforward capacitor, C , can be added in

FF

parallel with the upper feedback divider resistor, R2. This

reducestheimpedanceofthefeedbackpinathighfrequen-

cies thereby increasing its immunity from picking up stray

noise. In addition, this adds a pole-zero pair to the loop

dynamicswhichgeneratesaphaseboostthatcanimprove

the phase margin and increase the speed of the transient

response, resulting in smaller voltage deviation on load

transients. The zero frequency depends not only on the

value of the feedforward capacitor, but also on the upper

resistor divider resistor. Speciﬁcally, the zero frequency,

The BAT1 and USB1 pins provides current to the power

stages of both buck converters. It is recommended that a

low ESR ceramic capacitor with a value of at least 4.7μF

be used to bypass each of these pins. These capacitors

should be placed as close to the respective pin as pos-

sible and should have a short return path to the backpad

of the IC.

Buck Output Voltage Programming

The buck output voltages are programmed via external

resistor dividers connected to the respective feedback pin

(FB1 or FB2) as shown in Figure 4.

f

, is given by the following equation:

ZERO

1

f_ZERO

=

2 • π •R2 •C_FF

The resistor divider resistors control the output voltage

according to the following formula:

Ideally, the phase boost generated by the pole-zero pair

shouldbecenteredattheloopcrossoverfrequency.Table 4

providestherecommendedfeedbackdividerresistorvalues

and corresponding feedforward capacitors for several

commonly utilized output voltages.

⎛

⎞

R2

R1

(1)

V_OUT1,2= 0.596 1+

V

( )

⎜

⎝

⎟

⎠

If the impedance of the resistor divider is too high it will

increase noise sensitivity due to coupling of stray noise

to the feedback pin. In addition, the parallel resistance

of the resistor divider resistors in series with the input

Table 4. Buck Resistor Divider and Feedforward Capacitor

Values

V

R1

R2

C

OUT

FF

0.6V

0.8V

1.0V

1.2V

1.5V

1.8V

2.0V

2.7V

3.3V

–

0

–

22μF

10μF

4.7μF

V

≥ 0.600V

OUT1,2

649k

324k

221k

147k

110k

86.6k

56.2k

48.7k

221k

205k

200k

221k

18pF

R2

C

FF

FB1,2

LTC3101

R1

GND

3101 F04

Figure 4. Setting the Buck Output Voltages

3101f

23

LTC3101

APPLICATIONS INFORMATION

If a substantially larger output capacitor is utilized, the

bandwidth of the loop will be reduced. In such cases, the

feedforward capacitor can be increased in value in order

to lower the zero frequency and improve the transient

response.

buck-boost inductor must have a saturation current rat-

ing that is greater than the worst-case average inductor

current plus half the ripple current. The peak-to-peak

inductor current ripple will be larger in buck and boost

mode then in the buck-boost region. The peak-to-peak

inductor current ripple for each mode can be calculated

from the following formulas, where f is the frequency in

MHz and L is the inductance in ꢀH:

Buck-Boost Output Voltage Programming

Thebuck-boostoutputvoltageissetviaanexternalresistor

divider connected to the FB3 pin as shown in Figure 5.

⎛

⎞

⎟

V_OUTV – V_OUT

IN

ΔI_L(P-P)(BUCK)

=

⎜

f •L

V

5.25 ≥ V

≥ 1.5V

⎝

⎠

OUT3

IN

R2

⎛

⎜

⎝

⎞

V_OUT– V

V

f •L

IN

ΔI_{L(P-P)(BOOST)}

=

FB3

⎟

V_OUT

⎠

LTC3101

GND

R1

In addition to affecting output current ripple, the size of

the inductor can also impact the stability of the feedback

loop. In boost mode, the converter transfer function has

a right half plane zero at a frequency that is inversely

proportional to the value of the inductor. As a result, a

large inductor can move this zero to a frequency that is

low enough to degrade the phase margin of the feedback

loop. It is recommended that the inductor value be chosen

less than 10ꢀH if the buck-boost converter is to be used

in the boost region.

3101 F05

Figure 5. Setting the Buck-Boost Output Voltage

Theresistordividervaluesdeterminethebuck-boostoutput

voltage according to the following formula:

⎛

⎞

R2

R1

V_OUT3= 0.599 1+

V

( )

(2)

⎜

⎝

⎟

⎠

In addition to affecting the efﬁciency of the buck-boost

converter, the inductor DC resistance can also impact the

maximum output capability of the buck-boost converter

at low input voltage. In buck mode, the buck-boost output

current is limited only by the inductor current reaching the

current limit value. However, in boost mode, especially at

large step-up ratios, the output current capability can also

be limited by the total resistive losses in the power stage.

These include switch resistances, inductor resistance,

and PCB trace resistance. Use of an inductor with high

DC resistance can degrade the output current capability

from that shown in the graph in the Typical Performance

Characteristics section of this data sheet.

The buck-boost converter utilizes voltage mode control

and in addition to setting the output voltage, the value of

R2 plays an integral role in the dynamics of the feedback

loop. In general, a larger value for R2 will increase stability

and reduce the speed of the transient response. A smaller

value of R2 will reduce stability but increase the speed of

the transient response. A good starting point is to choose

R2 = 1M and then calculate the required value of R1 to

set the desired output voltage according to Equation 2.

If a large output capacitor is used, the bandwidth of the

converter is reduced. In such cases R2 can be reduced

to improve the transient response. If a large inductor or

smalloutputcapacitorisutilizedtheloopwillbelessstable

and the phase margin can be improved by increasing the

value of R2.

Differentinductorcorematerialsandstyleshaveanimpact

on the size and price of an inductor at any given current

rating. Shielded construction is generally preferred as it

minimizes the chances of interference with other circuitry.

Thechoiceofinductorstyledependsupontheprice,sizing,

Buck-Boost Inductor Selection

To achieve high efﬁciency, a low ESR inductor should

be utilized for the buck-boost converter. In addition, the

and EMI requirements of a particular application. Table 5

3101f

24

LTC3101

APPLICATIONS INFORMATION

provides a small sampling of inductors that are well suited

to many LTC3101 buck-boost converter applications. All

inductor speciﬁcations are listed at an inductance value

of 4.7μH for comparison purposes but other values within

these inductor families are generally well suited to this ap-

plication. Within each family (i.e., at a ﬁxed size), the DC

resistance generally increases and the maximum current

generally decreases with increased inductance.

capacitance in ꢀF, L is the inductance in ꢀH, and I

the output current in Amps.

is

LOAD

V – V

V

(

)

1

IN

OUT OUT

ΔV_P-P(BUCK)

=

•

8 •L •C_OUT• f²

V

IN

I_LOAD

V_OUT– V

IN

(

)

ΔV_P-P(BOOST)

=

C_OUT• V_OUT• f

Table 5. Representative Buck-Boost Surface Mount Inductors

Given that the output current is discontinuous in boost

mode, therippleinthismodewillgenerallybemuchlarger

than the magnitude of the ripple in buck mode. In addi-

tion to controlling the ripple magnitude, the value of the

output capacitor also affects the location of the resonant

frequency in the open-loop converter transfer function.

If the output capacitor is too small, the bandwidth of the

converter will extend high enough to degrade the phase

margin.Topreventthisfromhappening,itisrecommended

that a minimum value of 10ꢀF be used for the buck-boost

output capacitor. If the required buck-boost load current

is greater than 400mA, it is recommended that the output

capacitor be increased to 22μF to improve output voltage

ripple and loop stability.

VALUE DCR

MAX DC

SIZE (mm)

W × L × H

PART NUMBER

(ꢀH)

(mΩ) CURRENT (A)

Coilcraft

LPS4018

LPS4012

ME3220

MSS5121

4.7

125

175

190

95

1.9

1.8

4.0 × 4.0 × 1.8

4.0 × 4.0 × 1.2

3.2 × 2.5 × 2.0

5.4 × 5.4 × 2.1

1.5

1.66

Cooper-Bussmann

SD12

SD14

4.7

4.5

118

94

1.29

1.74

5.2 × 5.2 × 1.2

5.2 × 5.2 × 1.4

Panasonic

ELL6PG

ELL5PS

4.7

58

61

1.5

6.0 × 6.0 × 2.0

5.0 × 5.0 × 1.85

Sumida

CDRH3D18

CDRH4D15/S

CDRH4D22/HP

4.7

86

103

66

1.35

1.4

2.2

4.0 × 4.0 × 2.0

4.7 × 4.7 × 1.7

5.0 × 5.0 × 2.4

Taiyo-Yuden

NR6020T

NP04SZB

Buck-Boost Input Capacitor Selection

4.7

58

75

2.0

1.8

6.0 × 6.0 × 2.0

5.0 × 5.0 × 2.0

Thesupplycurrenttothebuck-boostconverterisprovided

bytheUSB2andBAT2pins. Inaddition, thesepinsprovide

power to the internal circuitry of the LTC3101. It is recom-

mended that a low ESR ceramic capacitor with a value of

at least 10ꢀF be located as close to each of these pins as

possible. In addition, the return trace from each pin to the

ground plane should be made as short as possible.

TOKO

DE2815C

DP418C

DE4514C

4.7

100

50

1.3

1.50

1.9

3.0 × 2.8 × 1.5

4.2 × 4.2 × 1.8

4.7 × 4.9 × 1.4

100

Wurth

744042004

7447785004

7447745056

4.7

82

78

57

1.65

2.20

2.40

4.8 × 4.8 × 1.8

5.9 × 6.2 × 3.3

5.2 × 5.8 × 2.0

Buck-Boost Output Capacitor Selection

Capacitor Vendor Information

A low ESR output capacitor should be utilized at the buck-

boost converter output in order to minimize output volt-

age ripple. Multilayer ceramic capacitors are an excellent

choice as they have low ESR and are available in small

footprints. The capacitor should be chosen large enough

to reduce the output voltage ripple to acceptable levels.

Neglecting the capacitor ESR and ESL, the peak-to-peak

output voltage ripple can be calculated by the following

Both the input bypass capacitors and DC/DC converter

outputcapacitorsusedwiththeLTC3101mustbelowESR

and designed to handle the large AC currents generated

by switching converters. This is important to maintain

proper functioning of the IC and to reduce output ripple.

Many modern low voltage ceramic capacitors experience

signiﬁcant loss in capacitance from their rated value

with increased DC bias voltages. For example, it is not

uncommon for a small surface mount ceramic capacitor

formulas, where f is the frequency in MHz, C

is the

OUT

3101f

25

LTC3101

APPLICATIONS INFORMATION

to lose 45% of its rated capacitance when operated near

its rated voltage. As a result, it is sometimes necessary to

use a larger value capacitance or a capacitor with a higher

voltage rating than required in order to actually realize

the intended capacitance at the full operating voltage. For

details,consultthecapacitorvendor’scurveofcapacitance

versus DC bias voltage.

Figure 6 presents a representative PCB layout to outline

some of the primary considerations. A few key guidelines

are listed:

1. All circulating high current paths should be kept as

short as possible. This can be accomplished by keep-

ing the routes to all components in Figure 6 as short

and as wide as possible. Capacitor ground connections

should via down to the ground plane in the shortest

route possible. The bypass capacitors on USB1, USB2,

BAT1 and BAT2 should be placed as close to the IC as

possible and should have the shortest possible paths

to ground.

ThecapacitorslistedinTable6provideasamplingofsmall

surface mount ceramic capacitors that are well suited to

LTC3101applicationcircuits.Alllistedcapacitorsareeither

X5R or X7R dielectric in order to ensure that capacitance

loss over temperature is minimized.

Table 6. Representative Bypass and Output Capacitors

2. The Exposed Pad is the small-signal and power ground

connection for the LTC3101. Multiple vias should con-

nect the backpad directly to the ground plane. In ad-

dition maximization of the metallization connected to

the backpad will improve the thermal environment and

increase the power handling capabilities of the IC.

VALUE

(ꢀF)

VOLTAGE

(V)

SIZE (mm)

L × W × H (FOOTPRINT)

PART NUMBER

AVX

12106D475K

12104D106K

12106D106K

12106D226K

4.7

10

22

6.3

4

6.3

1.6 × 0.8 × 0.86 (0603)

1.6 × 0.8 × 1.02 (0603)

2.0 × 1.25 × 1.4 (0805)

3. The components shown in bold and their connections

should all be placed over a complete ground plane to

minimize loop cross-sectional areas. This minimizes

EMI and reduces inductive drops.

Kemet

C0603C475K9P

C0603C106K9P

C0805C476K9P

4.7

10

47

6.3

1.6 × 0.8 × 0.8 (0603)

2.0 × 1.25 × 1.25 (0805)

Murata

GRM18

GRM21

4.7

10

6.3

10

1.6 × 0.8 × 0.8 (0603)

2.0 × 1.25 × 1.25 (0805)

4. Connections to all of the components shown in bold

shouldbemadeaswideaspossibletoreducetheseries

resistance.Thiswillimproveefﬁciencyandmaximizethe

output current capability of the buck-boost converter.

10

22

6.3

Samsung

CL10A475KP5LNN

CL10A106KQ8NNN

CL21A226MQCLRN

CL21A476MQYNNN

4.7

10

22

47

10

6.3

1.6 × 0.8 × 0.55 (0603)

1.6 × 0.8 × 0.90 (0603)

2.0 × 1.25 × 0.95 (0805)

2.0 × 1.25 × 1.45 (0805)

5. To prevent large circulating currents from disrupting

theoutputvoltagesensing, thegroundforeachresistor

divider should be returned to the ground plane using

a via placed close to the IC and away from the power

connections.

Taiyo Yuden

JMK107BJ

LMK107BJ

JMK212BJ

10

4.7

22

47

6.3

10

6.3

1.6 × 0.8 × 0.8 (0603)

2.0 × 1.25 × 0.85 (0805)

6. Keep the connection from the resistor dividers to the

feedback pins FB1 and FB2 as short as possible and

away from the switch pin connections.

TDK

C1608X5ROJ

C1608X5R0J

C2012X5R0J

4.7

6.8

10

6.3

1.6 × 0.8 × 0.8 (0603)

2.0 × 1.25 × 0.85 (0805)

7. Crossover connections (such as the one shown from

SW3A to the inductor) should be made on inner copper

layers if available. If it is necessary to place these on

the ground plane, make the trace on the ground plane

as short as possible to minimize the disruption to the

ground plane.

15

PCB Layout Considerations

The LTC3101 switches large currents at high frequencies.

Special attention should be paid to the PCB layout to en-

sure a stable, noise-free and efﬁcient application circuit.

3101f

26

LTC3101

APPLICATIONS INFORMATION

R S

E N A 3

( 1 9 )

C

( 1 2 )

S W 3 B

( 2 0 )

M A X

( 1 1 )

E N A 1

( 2 1 )

L D O

( 1 0 )

F B 2

( 2 2 )

T A

P B S T

( 9 )

F B 1

( 2 3 )

R K W E P Y

( 8 )

E N A 2

( 2 4 )

F B 3

( 7 )

3101f

27

LTC3101

TYPICAL APPLICATIONS

2 AA Cell/USB/Wall Adapter Power Supply with Six Output Rails and Pushbutton On/Off

V

= 3.3V

OUT3

300mA FOR V ≥ 1.8V

IN

+

C3

10μF

C4

10μF

800mA FOR V ≥ 3V

IN

2 AA

CELLS

R8

1M

L3

4.7μH

R7

BAT1 BAT2 SW3A SW3B OUT3

221k

USB POWER

USB1

USB2

FB3

HSO

Hot Swap OUTPUT

4.3V TO 5.5V

C5

10μF

3.3V

WALL ADAPTER

4.0V TO 5.5V

C8

100mA

4.7μF

TRACKING OUTPUT

200mA

MAX

ENA3

ENA2

ENA1

C7

4.7μF

0.22μF

C

RS

1.8V

LDO

50mA

LTC3101

C6

4.7μF

L2

ON/OFF

4.7μH

V

OUT2

SW2

FB2

1.8V

PWRKEY

C2

10μF

C9

22pF

R6

221k

350mA

V

OUT1

μP

R5

110k

L1

4.7μH

R1

R2

V

OUT1

50k 50k

1.5V

SW1

FB1

PBSTAT

PWRON

RESET

PWM

C1

10μF

R4

221k

C10

22pF

350mA

R3

147k

GND

C1-C5: MURATA GRM31CR71A106KA01

L1, L2: TAIYO YUDEN NR3010T4R7M

L3: COILCRAFT LPS4018-472ML

3101 TA02a

Buck-Boost Converter Efﬁciency

vs Load Current

Buck Converter Efﬁciency

Waveforms During Power-Up

vs Load Current, V_BAT= 3V

100

90

100

90

PWRKEY

5V/DIV

Burst Mode

OPERATION

Burst Mode

OPERATION

V

2V/DIV

80

70

60

80

70

60

OUT1

2V/DIV

5V/DIV

OUT2

OUT3

PWM MODE

HSO 5V/DIV

50

40

50

40

C

100mV/DIV

RS

3101 TA02b

5ms/DIV

30

20

10

0

30

20

10

0

V

BAT

V

BAT

= 2V

BUCK1 (1.5V)

BUCK2 (1.8V)

= 3V

1

100

10

LOAD CURRENT (mA)

1000

1

100

10

LOAD CURRENT (mA)

1000

3101 TA02c

3101 TA02d

3101f

28

LTC3101

TYPICAL APPLICATIONS

Manual Enable with Simultaneous Start-Up

V

= 3.3V

OUT3

300mA FOR V ≥ 1.8V

IN

+

C4

10μF

C3

10μF

800mA FOR V ≥ 3V

IN

2 AA

CELLS

R1

1M

4.7μH

R2

221k

BAT1 BAT2 SW3A SW3B OUT3

USB POWER

4.3V TO 5.5V

USB1

USB2

FB3

HSO

Hot Swap OUTPUT

C2

10μF

3.3V

C5

4.7μF

100mA

TRACKING OUTPUT

200mA

MAX

PWM

C6

4.7μF

PWRON

1.8V

50mA

LDO

C7

4.7μF

LTC3101

4.7μH

ENA1

ENA2

ENA3

V

OUT2

DISABLE ENABLE

SW2

FB2

1.8V

C9

10μF

C8

22pF

R3

221k

350mA

CRS

C1

R4

110k

0.22μF

4.7μH

V

OUT1

1.5V

SW1

FB1

C11

10μF

C10

22pF

R5

221k

350mA

R6

147k

GND

3101 TA03a

Power-Up Waveforms

RESET Timing During Power Up

ENABLE

5V/DIV

ENABLE

5V/DIV

C

RS

V

OUT3

2V/DIV

OUT2

OUT1

OUTPUT

VOLTAGES

1V/DIV

RESET 5V/DIV

V

2V/DIV

OUT1

HSO

2V/DIV

V

5V/DIV

OUT2

OUT3

3101 TA03b

3101 TA03c

200μs/DIV

50ms/DIV

3101f

29

LTC3101

TYPICAL APPLICATIONS

Li-Ion/USB-Powered Six Output Power Supply with Pushbutton Control

V

= 3.3V

OUT3

300mA FOR V ≥ 1.8V

IN

+

C4

10μF

C3

10μF

Li-Ion

1.8V TO 4.2V

800mA FOR V ≥ 3V

IN

R3

1M

L3

4.7μH

R4

221k

BAT1 BAT2 SW3A SW3B OUT3

USB POWER

4.3V TO 5.5V

USB1

USB2

FB3

HSO

Hot Swap OUTPUT

C2

10μF

3.3V

C5

4.7μF

100mA

TRACKING OUTPUT

200mA

MAX

ENA3

ENA2

ENA1

C1

0.22μF

C6

4.7μF

C

RS

1.8V

LDO

50mA

LTC3101

C7

4.7μF

L2

ON/OFF

4.7μH

V

OUT2

SW2

FB2

1.2V

PWRKEY

C9

R5

221k

C8

350mA

10μF

V

22pF

OUT2

R6

221k

R1

50k

R2

50k

L1

4.7μH

V

OUT1

PBSTAT

PWRON

RESET

PWM

0.8V

SW1

FB1

C11

22μF

R7

C10

22pF

350mA

μP

221k

R8

GND

649k

L1, L2: WURTH 744031004

L3: TAIYO YUDEN NR4018T4R7M

3101 TA04a

Buck-Boost Efﬁciency

vs Load Current

Buck Converter 1 Efﬁciency

vs Load Current

Buck Converter 2 Efﬁciency

vs Load Current

100

90

100

90

100

90

Burst Mode

OPERATION

Burst Mode

OPERATION

Burst Mode

OPERATION

80

70

60

80

70

60

80

70

60

PWM MODE

50

40

50

40

50

40

30

20

10

0

30

20

10

0

30

20

10

0

V

= 3.0V

V

= 3.0V

= 4.2V

V

= 3.0V

= 4.2V

BAT

= 4.2V

1

100

LOAD CURRENT (mA)

1000

1

100

LOAD CURRENT (mA)

1000

10

1

100

LOAD CURRENT (mA)

1000

10

3101 TA02c

3101 TA04d

3101 TA04b

3101f

30

LTC3101

TYPICAL APPLICATIONS

Sequenced Start-Up, Buck-Boost Followed by Buck Converters

V

= 3.3V

OUT3

300mA FOR V ≥ 1.8V

IN

+

C4

10μF

C3

10μF

800mA FOR V ≥ 3V

IN

2 AA

CELLS

R3

1M

4.7μH

R5

100k

R4

221k

BAT1 BAT2 SW3A SW3B OUT3

USB POWER

4.3V TO 5.5V

USB1

USB2

FB3

ENA2

ENA3

HSO

C5

Power-Up Waveforms

C2

10μF

0.1μF

Hot Swap OUTPUT

3.3V

PWRKEY 5V/DIV

PBSTAT 2V/DIV

C6

100mA

4.7μF

V

C1

0.033μF

OUT2

TRACKING OUTPUT

200mA

MAX

PWM

ENA1

OUTPUT

VOLTAGES

1V/DIV

C7

4.7μF

V

OUT3

C

RS

V

OUT1

1.8V

50mA

LDO

C

2V/DIV

RS

LTC3101

C8

4.7μF

ON/OFF

RESET 2V/DIV

4.7μH

V

OUT2

SW2

FB2

1.8V

PWRKEY

3101 TA05b

C10

10μF

R6

C9

350mA

10ms/DIV

221k

22pF

V

OUT1

μP

R7

110k

4.7μH

R1

50k

R2

50k

V

OUT1

1.2V

SW1

FB1

PBSTAT

PWRON

RESET

C12

10μF

R8

221k

C11

22pF

350mA

R9

221k

GND

3101 TA05a

PACKAGE DESCRIPTION

UF Package

24-Lead Plastic QFN (4mm × 4mm)

(Reference LTC DWG # 05-08-1697)

BOTTOM VIEW—EXPOSED PAD

R = 0.115

PIN 1 NOTCH

R = 0.20 TYP

OR 0.35 s 45o

CHAMFER

0.75 p 0.05

4.00 p 0.10

(4 SIDES)

TYP

23 24

0.70 p0.05

PIN 1

TOP MARK

(NOTE 6)

0.40 p 0.10

1

4.50 p 0.05

3.10 p 0.05

2.45 p 0.05

(4 SIDES)

2

2.45 p 0.10

(4-SIDES)

PACKAGE

OUTLINE

(UF24) QFN 0105

0.200 REF

0.25 p 0.05

0.25 p0.05

0.50 BSC

0.00 – 0.05

0.50 BSC

RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS

NOTE:

1. DRAWING PROPOSED TO BE MADE A JEDEC PACKAGE OUTLINE MO-220 VARIATION (WGGD-X)—TO BE APPROVED

2. DRAWING NOT TO SCALE

3. ALL DIMENSIONS ARE IN MILLIMETERS

4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE

MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE, IF PRESENT

5. EXPOSED PAD SHALL BE SOLDER PLATED

6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION

ON THE TOP AND BOTTOM OF PACKAGE

3101f

Information furnished by Linear Technology Corporation is believed to be accurate and reliable.

However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-

tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.

31

LTC3101

RELATED PARTS

PART NUMBER DESCRIPTION

COMMENTS

LT3009

3ꢀA I , 20mA Low Dropout Linear Regulator

V : 1.6V to 20V, V

as Low as 0.6V, I = 3ꢀA, I < 1ꢀA, SC70 and

OUT Q SD

Q

IN

DFN Packages

LTC3100

LTC3409

LTC3440

LTC3441

LTC3442

LTC3444

LTC3455

LTC3456

LTC3520

LTC3522

LTC3523

LTC3527

LTC3530

700mA Synchronous Step-Up, 250mA Step-Down DC/DC

Converters, 100mA LDO

V : 0.65V to 5V, Step-Up V : 1.5V to 5.25V, Step-Down V

as Low

IN

OUT

as 0.6V, I = 15ꢀA, I < 1ꢀA, QFN Package

Q

SD

600mA, Low V , 2.6MHz Synchronous Step-Down DC/DC

V : 1.6V to 5.5V, V

as Low as 0.61V, I = 65ꢀA, I < 1ꢀA,

OUT Q SD

IN

Converter

DFN Package

600mA (I ), 2MHz Synchronous Buck-Boost DC/DC

V : 2.5V to 5.5V, V : 2.5V to 5.25V, I = 25ꢀA, I < 1ꢀA, MSOP and

OUT

Converter

IN

OUT

Q

SD

DFN Packages

1.2A (I ), 1MHz Synchronous Buck-Boost DC/DC Converter V : 2.4V to 5.5V, V : 2.4V to 5.25V, I = 25ꢀA, I < 1ꢀA ,

OUT

IN

OUT

Q

SD

DFN Package

1.2A (I ), 2MHz Synchronous Buck-Boost DC/DC Converter V : 2.4V to 5.5V, V : 2.4V to 5.25V, I = 35ꢀA, I < 1ꢀA, DFN Package

OUT

IN

OUT

Q

SD

with Programmable Burst Mode Operation

400mA (I ), 1.5MHz Synchronous Buck-Boost DC/DC

V : 2.75V to 5.5V, V : 0.5V to 5V, I < 1ꢀA, DFN Package

IN OUT SD

OUT

Converter

Dual DC/DC Converter with USB Power Manager and Li-Ion

Battery Charger

V : 3V to 5.5V, Transition Between Inputs, I = 110ꢀA, I < 2ꢀA,

IN

Q

SD

QFN Package

2-Cell, Multi-Output DC/DC Converter with USB Power

Manager

V : 1.8V to 5.5V, Dual DC/DC Converter and Hot Swap Outputs,

IN

Seamless Transition Between Inputs, I = 180ꢀA, I < 1ꢀA, QFN Package

Q

SD

1A (I ) Synchronous Buck-Boost and 600mA Step-Down

V : 2.2V to 5.5V, Buck-Boost V : 2.2V to 5.25V, Step-Down V

as

OUT

IN

OUT

DC/DC Converters with LDO Controller

Low as 0.8V, I = 55ꢀA, I < 1ꢀA, QFN Package

Q SD

400mA (I ) Synchronous Buck-Boost and 200mA

V : 2.4V to 5.5V, Buck-Boost V : 2.2V to 5.25V, Step-Down V

IN OUT

Low as 0.6V, I = 25ꢀA, I < 1ꢀA, QFN Package

Q SD

as

OUT

Step-Down DC/DC Converters

Synchronous 600mA Step-Up and 400mA Step-Down

2.4MHz DC/DC Converters

V : 1.8V to 5.5V, Step-Up V : 1.8V to 5.25V, Step-Down V

as Low

IN

OUT

as 0.6V, I = 45ꢀA, I < 2ꢀA, QFN Package

Q

SD

Dual 2.2MHz 800mA/400mA Synchronous Step-Up DC/DC

Converters

V : 0.5V to5V, V : 1.6V to 5.25V, I = 40ꢀA, I < 1ꢀA, DFN Package

IN OUT Q SD

600mA (I ), 2MHz Synchronous Buck-Boost DC/DC

V : 1.8V to 5.5V, V : 1.8V to 5.25V, I = 12ꢀA, I < 2ꢀA, QFN Package

IN OUT Q SD

OUT

Converter

LTC3533

LTC3537

2A (I ), 2MHz Synchronous Buck-Boost DC/DC Converter V : 1.8V to 5.5V, V : 1.8V to 5.25V, I = 40ꢀA, I < 1ꢀA, DFN Package

OUT IN OUT Q SD

600mA, 2.2MHz Synchronous Step-Up DC/DC Converter and V : 0.68V to 5V, V : 1.5V to 5.25V, I = 30ꢀA, I < 1ꢀA, QFN Package

IN

OUT

Q

SD

100mA LDO

LTC3549

LTC3555

LTC3556

LTC3557

250mA, Low V , 2.25MHz Synchronous Step-Down DC/DC

V : 1.6V to 5.5V, V

as Low as 0.61V, I = 50ꢀA, I < 1ꢀA,

IN

OUT Q SD

Converter

DFN Package

High Efﬁciency USB Power Manager, Li-Ion/Polymer Battery

Charger and Triple Step-Down DC/DC Converters

V : 2.7V to 5.5V, 1.5A Maximum Charge Current, 180mΩ Ideal Diode,

IN

Two 400mA and One 1A Buck DC/DC, I = 20ꢀA, QFN Package

Q

High Efﬁciency USB Power Manager with Dual Step-Down

and Buck-Boost DC/DC Converters

V : 2.7V to 5.5V, 1.5A Maximum Charge Current, 1A Buck-Boost DC/DC,

IN

Dual 400mA Step-Down DC/DC, I = 20ꢀA, QFN Package

Q

USB Power Manager with Li-Ion Charger and Three

Step-Down Regulators

V : 2.7V to 5.5V, Seamless Transition Between Inputs, 1.5A Charging

IN

Current, Two 400mA and One 600mA Step-Down DC/DC, QFN Package

LTC3566/

LTC3567

Switching USB Power Manager with Li-Ion/Polymer Charger, Multi-Function PMIC: Switchmode Power Manager and 1A Buck-Boost

1A Buck-Boost Converter Plus LDO

Regulator Plus LDO, Charge Current Programmable up to 1.5A from Wall

Adapter Input, Synchronous Buck-Boost Converters Efﬁciency: >95%,

2

ADJ Output: Down to 0.8V at 1A, LTC3567 Has I C Interface,

4mm × 4mm QFN-24 Package

LTC3586

Switching USB Power Manager with Li-Ion/Polymer Charger Maximizes Available Power from USB Port, “Instant On” Operation,

Plus Dual Buck Plus Buck-Boost Plus Boost DC/DC

1.5A Max Charge Current, 180mΩ Ideal Diode with <50mΩ Option, Two

400mA Synchronous Buck Regulators, One 1A Buck-Boost Regulator,

One 600mA Boost Regulator, 4mm × 6mm 38-Pin QFN Package

3101f

LT 1208 • PRINTED IN USA

LinearTechnology Corporation

1630 McCarthy Blvd., Milpitas, CA 95035-7417

32

●

(408) 432-1900 FAX: (408) 434-0507 www.linear.com


型号：	LTC3101EUF-TRPBF
厂家：	Linear
描述：	Wide VIN, Multi-Output DC/DC Converter and PowerPath Controller 宽VIN ，多输出DC / DC转换器和控制器的PowerPath 转换器控制器
文件：	总32页 (文件大小：416K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

LTC3101EUF-TRPBF [Linear]

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