LTC3410BESC6-1.5#TRMPBF

LTC3410B

2.25MHz, 300mA

Synchronous Step-Down

Regulator in SC70

U

DESCRIPTIO

FEATURES

■

High Efficiency: Up to 96%

The LTC^®3410B is a high efficiency monolithic synchro-

nous buck regulator using a constant frequency, current

mode architecture. The device is available in adjustable

and fixed output voltage versions. Supply current during

operation is only 200µA, dropping to <1µA in shutdown.

The2.5Vto5.5VinputvoltagerangemakestheLTC3410B

ideally suited for single Li-Ion battery-powered applica-

tions. 100% duty cycle provides low dropout operation,

extending battery life in portable systems. PWM pulse

skipping mode operation provides very low output ripple

voltage for noise sensitive applications.

■

300mA Output Current at V_IN= 3V

■

380mA Minimum Peak Switch Current

■

2.5V to 5.5V Input Voltage Range

■

2.25MHz Constant Frequency Operation

■

No Schottky Diode Required

■

Low Dropout Operation: 100% Duty Cycle

■

Stable with Ceramic Capacitors

■

0.8V Reference Allows Low Output Voltages

■

Shutdown Mode Draws <1µA Supply Current

■

±2% Output Voltage Accuracy

■

Current Mode Operation for Excellent Line and

Switching frequency is internally set at 2.25MHz, allowing

the use of small surface mount inductors and capacitors.

The LTC3410B is specifically designed to work well with

ceramic output capacitors, achieving very low output

voltage ripple and a small PCB footprint.

Load Transient Response

■

Overtemperature Protected

■

Available in Low Profile SC70 Package

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APPLICATIO S

The internal synchronous switch increases efficiency and

eliminates the need for an external Schottky diode. Low

output voltages are easily supported with the 0.8V feed-

back reference voltage. The LTC3410B is available in a

tiny, low profile SC70 package.

■

Cellular Telephones

■

Personal Information Appliances

■

Wireless and DSL Modems

■

Digital Still Cameras

■

MP3 Players

, LT, LTC and LTM are registered trademarks of Linear Technology Corporation. All

other trademarks are the property of their respective owners. Protected by U.S. Patents,

including 5481178, 5994885, 6580258, 6304066, 6127815, 6498466, 6611131.

■

Portable Instruments

U

Efficiency and Power Loss

vs Output Current

TYPICAL APPLICATIO

1

100

90

EFFICIENCY

4.7µH

V

80

IN

V

OUT

0.1

0.01

2.7V

V

SW

LTC3410B

RUN

IN

1.2V

70

10pF

C

TO 5.5V

IN

C

OUT

2.2µF

60

50

CER

POWER LOSS

V

FB

40

30

20

0

232k

GND

464k

0.001

3410 TA01

V

= 2.7V

= 3.6V

= 4.2V

IN

0.0001

1000

1

10

100

OUTPUT CURRENT (mA)

3410 TA01b

3410bfa

1

LTC3410B

ABSOLUTE AXI U RATI GS

W W

U W

(Note 1)

Input Supply Voltage .................................. –0.3V to 6V

RUN, V_FBVoltages ..................................... –0.3V to V_IN

SW Voltage (DC) ......................... –0.3V to (V_IN+ 0.3V)

P-Channel Switch Source Current (DC) ............. 500mA

N-Channel Switch Sink Current (DC) ................. 500mA

Peak SW Sink and Source Current .................... 630mA

Operating Temperature Range (Note 2) .. –40°C to 85°C

Junction Temperature (Note 3)............................ 125°C

Storage Temperature Range ................ –65°C to 150°C

Lead Temperature (Soldering, 10 sec)................. 300°C

U W

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PACKAGE/ORDER I FOR ATIO

TOP VIEW

RUN 1

GND 2

SW 3

6 V

RUN 1

GND 2

SW 3

6 V

OUT

FB

5 GND

4 V

5 GND

4 V

IN

SC6 PACKAGE

6-LEAD PLASTIC SC70

SC6 PACKAGE

6-LEAD PLASTIC SC70

T_JMAX= 125°C, θ_JA= 250°C/ W

ORDER PART NUMBER

LTC3410BESC6

ORDER PART NUMBER

SC6 PART MARKING

LBZY

SC6 PART MARKING

LTC3410BESC6-1.2

LTC3410BESC6-1.5

LTC3410BESC6-1.8

LTC3410BESC6-1.875

LCMX

LCMY

LCMZ

LCHZ

Order Options Tape and Reel: Add #TR

Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF

Lead Free Part Marking: http://www.linear.com/leadfree/

Consult LTC Marketing for parts specified with wider operating temperature ranges.

ELECTRICAL CHARACTERISTICS

The

IN

●

denotes specifications which apply over the full operating temperature range, otherwise specifications are T = 25°C.

A

V

= 3.6V unless otherwise specified.

SYMBOL PARAMETER

CONDITIONS

MIN

TYP

MAX

±30

6

UNITS

nA

I

Feedback Current

Adjustable Output Voltage

Fixed Output Voltage

●

VFB

VOUT

PK

Output Voltage Feedback Current

Peak Inductor Current

3.3

490

0.8

µA

V

= 3V, V = 0.7V or V = 90%, Duty Cycle < 35%

OUT

380

600

0.816

0.4

mA

V

IN

FB

V

Regulated Feedback Voltage

Reference Voltage Line Regulation

Regulated Output Voltage

Adjustable Output Voltage (LTC3410BE)

= 2.5V to 5.5V

●

0.784

FB

∆V

V

0.04

%/V

FB

IN

V

LTC3410B-1.2, I

LTC3410B-1.5, I

LTC3410B-1.8, I

= 100mA

●

1.176

1.47

1.764

1.837

1.2

1.5

1.8

1.224

1.53

1.836

1.913

V

OUT

LTC3410B-1.875, I

= 100mA

1.875

OUT

∆V

Output Voltage Line Regulation

Output Voltage Load Regulation

Input Voltage Range

V

= 2.5V to 5.5V

●

0.04

0.5

0.4

%/V

%

OUT

LOADREG

IN

V

I

= 50mA to 250mA

LOAD

●

2.5

5.5

2.3

V

Undervoltage Lockout Threshold

V

Rising

Falling

2.0

1.94

V

UVLO

IN

3410bfa

2

LTC3410B

ELECTRICAL CHARACTERISTICS

The

IN

●

denotes specifications which apply over the full operating temperature range, otherwise specifications are T = 25°C.

A

V

= 3.6V unless otherwise specified.

SYMBOL PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

I

f

Input DC Bias Current

Operating

Shutdown

(Note 4)

S

V

= 0.83V or V

= 104%, I = 0A

LOAD

200

0.1

300

1

µA

FB

OUT

= 0V

RUN

Oscillator Frequency

V

= 0.8V or V = 100%

OUT

= 0V or V

●

1.8

2.25

310

2.7

MHz

kHz

OSC

FB

= 0V

OUT

R

of P-Channel FET

of N-Channel FET

I

= 100mA

0.75

0.55

± 0.01

1

0.9

0.7

±1

1.5

±1

Ω

PFET

NFET

LSW

DS(ON)

SW

= –100mA

= 0V, V = 0V or 5V, V = 5V

I

SW Leakage

V

µA

V

RUN

SW

IN

V

RUN Threshold

RUN Leakage Current

●

0.3

RUN

I

± 0.01

µA

RUN

Note 1: Stresses beyond those listed under Absolute Maximum Ratings

may cause permanent damage to the device. Exposure to any Absolute

Maximum Rating condition for extended periods may affect device

reliability and lifetime.

Note 2: The LTC3410BE is guaranteed to meet performance specifications

from 0°C to 85°C. Specifications over the –40°C to 85°C operating

temperature range are assured by design, characterization and correlation

with statistical process controls.

Note 4: Dynamic supply current is higher due to the gate charge being

delivered at the switching frequency.

Note 5: This IC includes overtemperature protection that is intended to

protect the device during momentary overload conditions. Junction

temperature will exceed 125°C when overtemperature protection is active.

Continuous operation above the specified maximum operating junction

temperature may impair device reliability.

Note 3: T is calculated from the ambient temperature T and power

J

A

dissipation P according to the following formula:

D

LTC3410B: T = T + (P )(250°C/W)

J

A

D

U W

TYPICAL PERFOR A CE CHARACTERISTICS

(From Figure 1 Except for the Resistive Divider Resistor Values)

Reference Voltage vs

Temperature

Efficiency vs Input Voltage

Efficiency vs Output Current

0.814

0.809

0.804

0.799

100

90

100

90

V

= 3.6V

IN

I

= 100mA

= 1mA

OUT

80

70

I

= 250mA

OUT

70

60

50

I

= 10mA

OUT

60

50

I

OUT

40

30

20

10

0

0.794

0.789

0.784

40

30

20

V

IN

V

IN

V

IN

= 2.7V

= 3.6V

= 4.2V

V

= 1.2V

V

= 1.8V

OUT

50

TEMPERATURE (°C)

100 125

–50 –25

0

25

75

1

10

100

1000

3

3.5

4.5

2.5

5

5.5

4

OUTPUT CURRENT (mA)

INPUT VOLTAGE (V)

3410 G02

3410 G03

3410 G01

3410bfa

3

LTC3410B

TYPICAL PERFOR A CE CHARACTERISTICS

U W

(From Figure 1 Except for the Resistive Divider Resistor Values)

Oscillator Frequency vs

Temperature

Oscillator Frequency vs

Supply Voltage

Output Voltage vs Load Current

1.0

0.6

2.7

2.6

2.5

2.4

2.3

2.2

2.1

2.0

1.9

2.7

2.6

2.5

2.4

2.3

2.2

2.1

2.0

1.9

V

= 3.6V

V

= 3.6V

IN

OUT

IN

= 1.8V

0.2

–0.2

–0.6

–1.0

–1.4

–1.8

–2.2

–2.6

–3.0

1.8

0

100

200

300

400

500

–50 –25

0

25

125

2

6

50

75 100

3

4

5

LOAD CURRENT (mA)

TEMPERATURE (°C)

SUPPLY VOLTAGE (V)

3410 G06

3410 G04

3410 G05

R ) vs Input Voltage

DS(ON

R

vs Temperature

Dynamic Supply Current vs V

IN

DS(ON)

1.2

1.1

1.0

0.9

0.8

0.7

0.6

0.5

0.4

0.3

0.2

0.1

0

300

260

220

180

140

100

1.2

1.0

V

I

= 1.2V

0A

OUT

LOAD =

V

= 4.2V

IN

V

= 3.6V

IN

V

= 2.7V

IN

MAIN SWITCH

0.8

0.6

0.4

V

= 4.2V

SYNCHRONOUS SWITCH

IN

V

IN

= 3.6V

V

= 2.7V

IN

0.2

0

MAIN SWITCH

SYNCHRONOUS SWITCH

1

3

4

5

6

7

2

1

2

3

4

5

6

–50 –30 –10 10 30 50 70 90 110 130

INPUT VOLTAGE (V)

V

(V)

IN

TEMPERATURE (°C)

3410 G07

3410 G09

3410 G08

Dynamic Supply Current

vs Temperature

Switch Leakage vs Temperature

250

230

210

190

170

150

110

100

90

80

70

60

50

40

30

20

10

0

V

I

= 1.2V

0A

V

= 5.5V

OUT

LOAD =

IN

RUN = 0V

SYNCHRONOUS

SWITCH

MAIN

SWITCH

–50 –25

0

25

50

75 100 125

–50

0

25

50

75 100 125

–25

TEMPERATURE (°C)

3410 G10

3410 G11

3410bfa

4

LTC3410B

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TYPICAL PERFOR A CE CHARACTERISTICS

(From Figure 1 Except for the Resistive Divider Resistor Values)

Switch Leakage vs Input Voltage

Pulse Skipping

Start-Up from Shutdown

600

550

500

450

400

350

300

250

200

150

V

OUT

10mV/DIV

AC COUPLED

RUN

2V/DIV

MAIN

SWITCH

V

SW

OUT

1V/DIV

2V/DIV

I

L

I

L

200mA/DIV

100mA/DIV

SYNCHRONOUS

SWITCH

100

50

0

100µs/DIV

1µs/DIV

3410 G14

V

I

= 3.6V

3410 G13

V

I

= 3.6V

IN

= 1.8V

= 2mA

OUT

LOAD

= 128mA

LOAD

0

2

3

4

5

6

1

INPUT VOLTAGE (V)

3410 G12

Load Step

V

OUT

100mV/DIV

AC COUPLED

I

L

200mA/DIV

I

LOAD

200mA/DIV

4µs/DIV

= 30mA TO 300mA

4µs/DIV

= 0mA TO 300mA

3410 G16

V

I

= 3.6V

OUT

LOAD

3410 G15

V

I

= 3.6V

OUT

LOAD

IN

= 1.8V

3410bfa

5

LTC3410B

U

PI FU CTIO S

RUN (Pin 1): Run Control Input. Forcing this pin above

1.5V enables the part. Forcing this pin below 0.3V shuts

down the device. In shutdown, all functions are disabled

drawing <1µA supply current. Do not leave RUN floating.

V_IN(Pin 4): Main Supply Pin. Must be closely decoupled

to GND, Pin 2, with a 2.2µF or greater ceramic capacitor.

V_FB(Pin 6 on Adjustable Version): Feedback Pin. Re-

ceives the feedback voltage from an external resistive

divider across the output.

GND (Pins 2, 5): Ground Pin.

SW (Pin 3): Switch Node Connection to Inductor. This pin

connects to the drains of the internal main and synchro-

nous power MOSFET switches.

V_OUT(Pin 6 on Fixed Voltage Versions): Output Voltage

Feedback Pin. An internal resistive divider divides the

output voltage down for comparison to the internal refer-

ence voltage.

U

W

FU CTIO AL DIAGRA

SLOPE

COMP

OSC

V

4

IN

FREQ

–

+

SHIFT

V

/V

FB OUT

6

+

–

5Ω

0.8V

+

–

R1*

I

COMP

EA

R2

240k

Q

S

R

SWITCHING

LOGIC

RS LATCH

V

IN

ANTI-

SHOOT-

THRU

AND

BLANKING

CIRCUIT

RUN

1

0.8V REF

SW

3

5

+

–

SHUTDOWN

I

RCMP

V

OUT

*R1 = 240k

– 1

2

GND

(

)

0.8

3410 BD

3410bfa

6

LTC3410B

U

OPERATIO

(Refer to Functional Diagram)

Main Control Loop

frequency. This frequency foldback ensures that the in-

ductorcurrenthasmoretimetodecay,therebypreventing

runaway. The oscillator’s frequency will progressively

increase to 2.25MHz when V_FBrises above 0V.

The LTC3410B uses a constant frequency, current mode

step-down architecture. Both the main (P-channel

MOSFET)andsynchronous(N-channelMOSFET)switches

are internal. During normal operation, the internal top

power MOSFET is turned on each cycle when the oscillator

sets the RS latch, and turned off when the current com-

parator, I_COMP, resets the RS latch. The peak inductor

current at which I_COMPresets the RS latch, is controlled by

the output of error amplifier EA. The V_FBpin, described in

the Pin Functions section, allows EA to receive an output

feedback voltage from an external resistive divider. When

the load current increases, it causes a slight decrease in

the feedback voltage relative to the 0.8V reference, which

in turn, causes the EA amplifier’s output voltage to in-

crease until the average inductor current matches the new

load current. While the top MOSFET is off, the bottom

MOSFET is turned on until either the inductor current

starts to reverse, as indicated by the current reversal

comparatorI_RCMP,orthebeginningofthenextclockcycle.

Dropout Operation

Astheinputsupplyvoltagedecreasestoavalueapproach-

ingtheoutputvoltage, thedutycycleincreasestowardthe

maximum on-time. Further reduction of the supply volt-

ageforcesthemainswitchtoremainonformorethanone

cycle until it reaches 100% duty cycle. The output voltage

will then be determined by the input voltage minus the

voltage drop across the P-channel MOSFET and the

inductor.

Another important detail to remember is that at low input

supply voltages, the R_DS(ON)of the P-channel switch

increases (see Typical Performance Characteristics).

Therefore,theusershouldcalculatethepowerdissipation

when the LTC3410B is used at 100% duty cycle with low

input voltage (See Thermal Considerations in the Applica-

tions Information section).

Pulse Skipping Mode Operation

At light loads, the inductor current may reach zero or re-

verse on each pulse. The bottom MOSFET is turned off by

the current reversal comparator, I_RCMP, and the switch

voltage will ring. This is discontinuous mode operation,

and is normal behavior for the switching regulator. At very

light loads, the LTC3410B will automatically skip pulses in

pulse skipping mode operation to maintain output regula-

tion.RefertoLTC3410datasheetifBurstMode^®operation

is preferred.

Slope Compensation and Inductor Peak Current

Slope compensation provides stability in constant fre-

quency architectures by preventing subharmonic oscilla-

tions at high duty cycles. It is accomplished internally by

adding a compensating ramp to the inductor current

signal at duty cycles in excess of 40%. Normally, this

results in a reduction of maximum inductor peak current

for duty cycles >40%. However, the LTC3410B uses a

patented scheme that counteracts this compensating

ramp, which allows the maximum inductor peak current

to remain unaffected throughout all duty cycles.

Short-Circuit Protection

When the output is shorted to ground, the frequency of the

oscillator is reduced to about 310kHz, 1/7 the nominal

Burst Mode is a Registered Trademark of Linear Technology Corporation.

3410bfa

7

LTC3410B

W U U

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APPLICATIO S I FOR ATIO

4.7µH

Inductor Core Selection

V

IN

2.7V

V

OUT

V

SW

LTC3410B

RUN

IN

1.2V

10pF

C

TO 5.5V

IN

Different core materials and shapes will change the size/

current and price/current relationship of an inductor. Tor-

oid or shielded pot cores in ferrite or permalloy materials

aresmallanddon’tradiatemuchenergy, butgenerallycost

more than powdered iron core inductors with similar

electrical characteristics. The choice of which style induc-

tor to use often depends more on the price vs size require-

ments and any radiated field/EMI requirements than on

what the LTC3410B requires to operate. Table 1 shows

some typical surface mount inductors that work well in

LTC3410B applications.

C

OUT

2.2µF

CER

V

FB

232k

GND

464k

3410 F01

Figure 1. High Efficiency Step-Down Converter

The basic LTC3410B application circuit is shown in Fig-

ure 1. External component selection is driven by the load

requirement and begins with the selection of L followed by

Table 1. Representative Surface Mount Inductors

MAX DC

C_INand C_OUT

.

MANUFACTURER PART NUMBER

VALUE CURRENT DCR HEIGHT

Inductor Selection

Taiyo Yuden

CB2016T2R2M

CB2012T2R2M

LBC2016T3R3M

2.2µH 510mA 0.13Ω 1.6mm

2.2µH 530mA 0.33Ω 1.25mm

3.3µH 410mA 0.27Ω 1.6mm

For most applications, the value of the inductor will fall in

the range of 2.2µH to 4.7µH. Its value is chosen based on

the desired ripple current. Large value inductors lower

ripple current and small value inductors result in higher

ripplecurrents.HigherV_INorV_OUTalsoincreasestheripple

currentasshowninEquation1. Areasonablestartingpoint

for setting ripple current is ∆I_L= 120mA (40% of 300mA).

Panasonic

Sumida

ELT5KT4R7M

CDRH2D18/LD

4.7µH 950mA 0.2Ω 1.2mm

4.7µH 630mA 0.086Ω 2mm

Murata

LQH32CN4R7M23 4.7µH 450mA 0.2Ω 2mm

Taiyo Yuden

NR30102R2M

NR30104R7M

2.2µH 1100mA 0.1Ω 1mm

4.7µH 750mA 0.19Ω 1mm

FDK

FDKMIPF2520D

4.7µH 1100mA 0.11Ω 1mm

3.3µH 1200mA 0.1Ω 1mm

2.2µH 1300mA 0.08Ω 1mm

⎛

⎝

V_OUT

V

IN

⎞

1

∆I_L=

V_OUT1−

⎜

⎟

⎠

(1)

f L

( )( )

C_INand C_OUTSelection

The DC current rating of the inductor should be at least

equal to the maximum load current plus half the ripple

current to prevent core saturation. Thus, a 360mA rated

inductor should be enough for most applications (300mA

+ 60mA). For better efficiency, choose a low DC-resistance

inductor.

In continuous mode, the source current of the top MOS-

FET is a square wave of duty cycle V_OUT/V_IN. To prevent

large voltage transients, a low ESR input capacitor sized

for the maximum RMS current must be used. The maxi-

mum RMS capacitor current is given by:

1/2

⎦

⎡

⎤

OUT

V_OUTV − V

(

)

IN

⎣

C_INrequired I_RMS≅ I_OMAX

V

IN

3410bfa

8

LTC3410B

W U U

APPLICATIO S I FOR ATIO

U

Using Ceramic Input and Output Capacitors

This formula has a maximum at V_IN= 2V_OUT, where

_RMS= I_OUT/2. This simple worst-case condition is com-

I

Higher values, lower cost ceramic capacitors are now

becoming available in smaller case sizes. Their high ripple

current, high voltage rating and low ESR make them ideal

for switching regulator applications. Because the

LTC3410B’s control loop does not depend on the output

capacitor’s ESR for stable operation, ceramic capacitors

can be used freely to achieve very low output ripple and

small circuit size.

monlyusedfordesignbecauseevensignificantdeviations

do not offer much relief. Note that the capacitor

manufacturer’s ripple current ratings are often based on

2000hoursoflife.Thismakesitadvisabletofurtherderate

the capacitor, or choose a capacitor rated at a higher

temperature than required. Always consult the manufac-

turer if there is any question.

The selection of C_OUTis driven by the required effective

series resistance (ESR). Typically, once the ESR require-

ment for C_OUThas been met, the RMS current rating

generally far exceeds the I_RIPPLE(P-P)requirement. The

output ripple ∆V_OUTis determined by:

However, care must be taken when ceramic capacitors are

usedattheinputandtheoutput.Whenaceramiccapacitor

is used at the input and the power is supplied by a wall

adapter through long wires, a load step at the output can

induce ringing at the input, V_IN. At best, this ringing can

couple to the output and be mistaken as loop instability. At

worst, a sudden inrush of current through the long wires

can potentially cause a voltage spike at V_IN, large enough

to damage the part.

⎛

⎝

1

⎞

∆V_OUT≅ ∆I ESR +

⎜

⎟

⎠

L

8fC_OUT

where f = operating frequency, C_OUT= output capacitance

and ∆I_L= ripple current in the inductor. For a fixed output

voltage, the output ripple is highest at maximum input

voltage since ∆I_Lincreases with input voltage.

When choosing the input and output ceramic capacitors,

choose the X5R or X7R dielectric formulations. These

dielectrics have the best temperature and voltage charac-

teristics of all the ceramics for a given value and size.

If tantalum capacitors are used, it is critical that the

capacitors are surge tested for use in switching power

supplies. An excellent choice is the AVX TPS series of

surface mount tantalum. These are specially constructed

and tested for low ESR so they give the lowest ESR for a

given volume. Other capacitor types include Sanyo

POSCAP, KemetT510andT495series, andSprague593D

and 595D series. Consult the manufacturer for other

specific recommendations.

Output Voltage Programming (LTC3410B Only)

The output voltage is set by a resistive divider according

to the following formula:

R2

R1

⎛

⎝

⎞

⎟

⎠

V_OUT= 0.8V 1+

⎜

(2)

The external resistive divider is connected to the output,

allowing remote voltage sensing as shown in Figure 2.

0.8V ≤ V

≤ 5.5V

OUT

R2

V

FB

LTC3410B

R1

GND

3410 F02

Figure 2. Setting the LTC3410B Output Voltage

3410bfa

9

LTC3410B

W U U

U

APPLICATIO S I FOR ATIO

Efficiency Considerations

charge, dQ, moves from V_INto ground. The resulting

dQ/dtisthecurrentoutofV_INthatistypicallylargerthan

the DC bias current. In continuous mode,

I_GATECHG= f(Q_T+ Q_B) where Q_Tand Q_Bare the

gate charges of the internal top and bottom

switches. Both the DC bias and gate charge

losses are proportional to V_INand thustheir effectswill

be more pronounced at higher supply voltages.

The efficiency of a switching regulator is equal to the

output power divided by the input power times 100%. It is

oftenusefultoanalyzeindividuallossestodeterminewhat

is limiting the efficiency and which change would produce

the most improvement. Efficiency can be expressed as:

Efficiency = 100% – (L1 + L2 + L3 + ...)

2. I²R losses are calculated from the resistances of the

internal switches, R_SW, and external inductor R_L. In

continuous mode, the average output current flowing

through inductor L is “chopped” between the main

switch and the synchronous switch. Thus, the series

resistance looking into the SW pin is a function of both

top and bottom MOSFET R_DS(ON)and the duty cycle

(DC) as follows:

whereL1, L2, etc. aretheindividuallossesasapercentage

of input power.

Although all dissipative elements in the circuit produce

losses, two main sources usually account for most of the

lossesinLTC3410Bcircuits:V_INquiescentcurrentandI²R

losses. The V_INquiescent current loss dominates the

efficiency loss at very low load currents whereas the I²R

loss dominates the efficiency loss at medium to high load

currents. In a typical efficiency plot, the efficiency curve at

very low load currents can be misleading since the actual

power lost is of no consequence as illustrated in Figure 3.

R_SW= (R_DS(ON)TOP)(DC) + (R_DS(ON)BOT)(1 – DC)

The R_DS(ON)for both the top and bottom MOSFETs can

beobtainedfromtheTypicalPerformanceCharateristics

curves. Thus, to obtain I²R losses, simply add R_SWto

R_Land multiply the result by the square of the average

output current.

1. The V_INquiescent current is due to two components:

the DC bias current as given in the electrical character-

istics and the internal main switch and synchronous

switch gate charge currents. The gate charge current

results from switching the gate capacitance of the

internal power MOSFET switches. Each time the gate is

switched from high to low to high again, a packet of

Other losses including C_INand C_OUTESR dissipative

losses and inductor core losses generally account for less

than 2% total additional loss.

1

0.1

0.01

0.001

0.0001

V

= 1.2V

= 1.8V

= 2.5V

OUT

0.1

1

10

100

1000

LOAD CURRENT (mA)

3410 F03

Figure 3. Power Lost vs Load Current

3410bfa

10

LTC3410B

W U U

APPLICATIO S I FOR ATIO

U

For the SC70 package, the θ_JAis 250°C/W. Thus, the

Thermal Considerations

junction temperature of the regulator is:

In most applications the LTC3410B does not dissipate

much heat due to its high efficiency. But, in applications

where the LTC3410B is running at high ambient

temperature with low supply voltage and high duty

cycles, such as in dropout, the heat dissipated may

exceed the maximum junction temperature of the part. If

the junction temperature reaches approximately 150°C,

both power switches will be turned off and the SW node

will become high impedance.

T_J= 70°C + (90)(250) = 92.5°C

which is well below the maximum junction temperature

of 125°C.

Note that at higher supply voltages, the junction tempera-

ture is lower due to reduced switch resistance (R_DS(ON)).

Checking Transient Response

The regulator loop response can be checked by looking at

the load transient response. Switching regulators take

several cycles to respond to a step in load current. When

a load step occurs, V_OUTimmediately shifts by an amount

equal to (∆I_LOAD• ESR), where ESR is the effective series

resistance of C_OUT. ∆I_LOADalso begins to charge or

discharge C_OUT, which generates a feedback error signal.

The regulator loop then acts to return V_OUTto its steady-

state value. During this recovery time V_OUTcan be moni-

toredforovershootorringingthatwouldindicateastability

problem. For a detailed explanation of switching control

loop theory, see Application Note 76.

To avoid the LTC3410B from exceeding the maximum

junction temperature, the user will need to do some

thermal analysis. The goal of the thermal analysis is to

determine whether the power dissipated exceeds the

maximum junction temperature of the part. The tempera-

ture rise is given by:

T_R= (P_D)(θ_JA)

where P_Dis the power dissipated by the regulator and

θ_JAis the thermal resistance from the junction of the die to

the ambient temperature.

The junction temperature, T_J, is given by:

T_J= T_A+ T_R

A second, more severe transient is caused by switching in

loads with large (>1µF) supply bypass capacitors. The

dischargedbypasscapacitorsareeffectivelyputinparallel

with C_OUT, causing a rapid drop in V_OUT. No regulator can

deliver enough current to prevent this problem if the load

switch resistance is low and it is driven quickly. The only

solution is to limit the rise time of the switch drive so that

the load rise time is limited to approximately (25 • C_LOAD).

Thus, a 10µF capacitor charging to 3.3V would require a

250µs rise time, limiting the charging current to about

130mA.

where T_Ais the ambient temperature.

As an example, consider the LTC3410B in dropout at an

input voltage of 2.7V, a load current of 300mA and an

ambient temperature of 70°C. From the typical perfor-

mance graph of switch resistance, the R_DS(ON)of the

P-channel switch at 70°C is approximately 1.0Ω.

Therefore, power dissipated by the part is:

P_D= I_LOAD²• R_DS(ON)= 90mW

3410bfa

11

LTC3410B

W U U

U

APPLICATIO S I FOR ATIO

PC Board Layout Checklist

2. Does the V_FBpin connect directly to the feedback

resistors? The resistive divider R1/R2 must be con-

nected between the (+) plate of C_OUTand ground.

When laying out the printed circuit board, the following

checklist should be used to ensure proper operation of the

LTC3410B. These items are also illustrated graphically in

Figures 4 and 5. Check the following in your layout:

3. Does the (+) plate of C_INconnect to V_INas closely as

possible? This capacitor provides the AC current to the

internal power MOSFETs.

1. The power traces, consisting of the GND trace, the SW

trace and the V_INtrace should be kept short, direct and

wide.

4. Keep the (–) plates of C_INand C_OUTas close as possible.

5. Keep the switching node, SW, away from the sensitive

V_FBnode.

1

RUN

LTC3410B

LTC3410B-1.875

2

3

6

4

2

3

6

4

GND

V

FB

GND

V

OUT

–

+

–

+

C

V

OUT

R2

R1

OUT

C

V

OUT

SW

V

IN

SW

V

L1

IN

C

FWD

5

L1

C

IN

5

C

IN

V

IN

V

IN

3410B F04b

3410B F04a

BOLD LINES INDICATE HIGH CURRENT PATHS

Figure 4a. LTC3410B Layout Diagram

Figure 4b. LTC3410B-1.875 Layout Diagram

VIA TO GND

R1

V

IN

V

OUT

V

IN

OUT

VIA TO V

IN

VIA TO V

OUT

R2

PIN 1

L1

C

FWD

LTC3410B-

1.875

LTC3410B

SW

C

OUT

C

IN

C

OUT

C

IN

GND

3410B F05a

3410B F05b

Figure 5a. LTC3410B Suggested Layout

Figure 5b. LTC3410B Fixed Output Voltage

Suggested Layout

3410bfa

12

LTC3410B

W U U

APPLICATIO S I FOR ATIO

U

Design Example

For best efficiency choose a 300mA or greater inductor

with less than 0.3Ω series resistance.

As a design example, assume the LTC3410B is used in a

single lithium-ion battery-powered cellular phone

application. The V_INwill be operating from a maximum of

4.2V down to about 2.7V. The load current requirement

is a maximum of 0.3A but most of the time it will be in

standbymode, requiringonly2mA. Efficiencyatbothlow

and high load currents is important. Output voltage is

2.5V. With this information we can calculate L using

Equation (1),

C_INwill require an RMS current rating of at least 0.125A ≅

I_LOAD(MAX)/2 at temperature and C_OUTwill require an ESR

of less than 0.5Ω. In most cases, a ceramic capacitor will

satisfy this requirement.

For the feedback resistors, choose R1 = 412k. R2 can

then be calculated from equation (2) to be:

V

0.8

⎛

⎜

⎝

⎞

⎠

OUT

R2 =

− 1 R1= 875.5k; use 887k

⎟

⎛

⎜

⎝

⎞

V_OUT

V_IN

1

f ∆I

(

L =

V_OUT1−

(3)

⎟

Figure 6 shows the complete circuit along with its

efficiency curve.

( )

)

⎠

L

Substituting V_OUT= 2.5V, V_IN= 4.2V, ∆I_L= 100mA

and f = 2.25MHz in Equation (3) gives:

2.5V

2.25MHz(100mA)

2.5V

4.2V

⎛

⎜

⎝

⎞

⎟

⎠

L =

1−

= 4.5µH

4.7µH*

V

IN

4

1

3

6

V

OUT

2.5V

2.7V

V

SW

LTC3410B

RUN

IN

†

10pF

C

TO 4.2V

IN

†

C

2.2µF

CER

OUT

2.2µF

CER

V

FB

887k

GND

2, 5

^†TAIYO YUDEN JMK212BJ225

*MURATA LQH32CN4R7M23

412k

3410 F07a

Figure 6a

100

90

V

OUT

100mV/DIV

80

AC COUPLED

70

60

50

I

L

200mA/DIV

40

30

20

10

0

I

LOAD

200mA/DIV

V

IN

V

IN

V

IN

= 2.7V

= 3.6V

= 4.2V

4µs/DIV

3410 F07c

V

LOAD

= 3.6V

OUT

IN

= 2.5V

I

= 100mA TO 300mA

1

10

100

1000

OUTPUT CURRENT (mA)

3410 F07b

Figure 6b

Figure 6c

3410bfa

13

LTC3410B

U

TYPICAL APPLICATIO

4.7µH*

V

IN

4

1

3

6

V

OUT

2.7V

V

SW

LTC3410B

RUN

IN

1.5V

†

10pF

C

TO 4.2V

IN

†

C

2.2µF

OUT

2.2µF

V

3410 TA02

FB

402k

464k

GND

2, 5

^†TAIYO YUDEN JMK212BJ225

*MURATA LQH32CN4R7M23

100

90

80

70

60

50

40

30

20

10

0

V

IN

V

IN

V

IN

= 2.7V

= 3.6V

= 4.2V

1

10

100

1000

OUTPUT CURRENT (mA)

3410 TA03

V

OUT

100mV/DIV

AC COUPLED

IL

200mA/DIV

I

LOAD

200mA/DIV

4µs/DIV

3410 TA04

V

LOAD

= 3.6V

OUT

IN

= 1.5V

I

= 100mA TO 250mA

3410bfa

14

LTC3410B

U

PACKAGE DESCRIPTIO

SC6 Package

6-Lead Plastic SC70

(Reference LTC DWG # 05-08-1638)

0.47

MAX

0.65

REF

1.80 – 2.20

(NOTE 4)

1.00 REF

INDEX AREA

(NOTE 6)

1.15 – 1.35

(NOTE 4)

1.80 – 2.40

2.8 BSC 1.8 REF

PIN 1

RECOMMENDED SOLDER PAD LAYOUT

PER IPC CALCULATOR

0.15 – 0.30

6 PLCS (NOTE 3)

0.65 BSC

0.10 – 0.40

0.80 – 1.00

0.00 – 0.10

REF

1.00 MAX

GAUGE PLANE

0.15 BSC

0.26 – 0.46

SC6 SC70 1205 REV B

0.10 – 0.18

(NOTE 3)

NOTE:

1. DIMENSIONS ARE IN MILLIMETERS

2. DRAWING NOT TO SCALE

3. DIMENSIONS ARE INCLUSIVE OF PLATING

4. DIMENSIONS ARE EXCLUSIVE OF MOLD FLASH AND METAL BURR

5. MOLD FLASH SHALL NOT EXCEED 0.254mm

6. DETAILS OF THE PIN 1 IDENTIFIER ARE OPTIONAL,

BUT MUST BE LOCATED WITHIN THE INDEX AREA

7. EIAJ PACKAGE REFERENCE IS EIAJ SC-70

8. JEDEC PACKAGE REFERENCE IS MO-203 VARIATION AB

3410bfa

Information furnished by Linear Technology Corporation is believed to be accurate and reliable.

However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-

tationthattheinterconnectionofitscircuitsasdescribedhereinwillnotinfringeonexistingpatentrights.

15

LTC3410B

U

TYPICAL APPLICATIO

Using Low Profile Components, <1mm Height

4.7µH*

V

2.7V

IN

3

4

1

V

OUT

V

SW

IN

1.875V

†

TO 4.2V

†

C

OUT

C

LTC3410B-1.875

IN

4.7µF

RUN

CER

6

V

OUT

GND

2, 5

^†TAIYO YUDEN JMK212BJ475

*FDK MIPF2520D

3410B TA06a

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3410bfa

LT 0706 REV A • PRINTED IN USA

LinearTechnology Corporation

1630 McCarthy Blvd., Milpitas, CA 95035-7417

16

●

(408) 432-1900 FAX: (408) 434-0507 www.linear.com


型号：	LTC3410BESC6-1.5#TRMPBF
厂家：	Linear
描述：	LTC3410B - 2.25MHz, 300mA Synchronous Step-Down Regulator in SC70; Package: SC70; Pins: 6; Temperature Range: -40°C to 85°C 稳压器开关式稳压器或控制器电源电路开关式控制器光电二极管
文件：	总16页 (文件大小：282K)
中文：	中文翻译
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