LTC3422EDD#TRPBF [Linear]

LTC3422 - 1.5A, 3MHz Synchronous Step-Up DC/DC Converter with Output Disconnect; Package: DFN; Pins: 10; Temperature Range: -40°C to 85°C;
LTC3422EDD#TRPBF
型号: LTC3422EDD#TRPBF
厂家: Linear    Linear
描述:

LTC3422 - 1.5A, 3MHz Synchronous Step-Up DC/DC Converter with Output Disconnect; Package: DFN; Pins: 10; Temperature Range: -40°C to 85°C

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LTC3122  
15V, 2.5A Synchronous  
Step-Up DC/DC Converter  
with Output Disconnect  
DescripTion  
FeaTures  
The LTC®3122 is a synchronous step-up DC/DC converter  
withtrueoutputdisconnectandinrushcurrentlimiting.The  
2.5A current limit along with the ability to program output  
voltages up to 15V makes the LTC3122 well suited for a  
variety of demanding applications. Once started, opera-  
tion will continue with inputs down to 500mV, extending  
runtime in many applications.  
n
V Range: 1.8V to 5.5V, 500mV After Start-Up  
IN  
n
Output Voltage Range: 2.2V to 15V  
n
800mA Output Current for V = 5V and V  
= 12V  
IN  
OUT  
n
n
n
n
Output Disconnects from Input When Shut Down  
Synchronous Rectification: Up to 95% Efficiency  
Inrush Current Limit  
Up to 3MHz Adjustable Switching Frequency  
Synchronizable to External Clock  
The LTC3122 features output disconnect in shutdown,  
dramatically reducing input power drain and enabling  
Selectable Burst Mode® Operation: 25µA I  
n
n
n
n
n
Q
Output Overvoltage Protection  
Soft-Start  
V
OUT  
to completely discharge. Adjustable PWM switching  
from 100kHz to 3MHz optimizes applications for highest  
efficiency or smallest solution footprint. The oscillator  
can also be synchronized to an external clock for noise  
sensitive applications. Selectable Burst Mode operation  
reducesquiescentcurrentto25µA,ensuringhighefficiency  
across the entire load range. An internal soft-start limits  
inrush current during start-up.  
<1µA I in Shutdown  
Q
12-Lead, 3mm × 4mm × 0.75mm Thermally  
Enhanced DFN and MSOP Packages  
applicaTions  
n
RF Power  
n
Piezo Actuators  
Other features include a <1µA shutdown current and ro-  
bust protection under short-circuit, thermal overload, and  
output overvoltage conditions. The LTC3122 is offered in  
both a low profile 12-lead (3mm × 4mm × 0.75 mm) DFN  
packageanda12-leadthermallyenhancedMSOPpackage.  
n
Small DC Motors  
12V Analog Rail From Battery, 5V, or Backup Capacitor  
n
L, LT, LTC, LTM, Linear Technology, the Linear logo and Burst Mode are registered trademarks  
and ThinSOT is a trademark of Linear Technology Corporation. All other trademarks are the  
property of their respective owners.  
Typical applicaTion  
5V to 12V Synchronous Boost Converter with Output Disconnect  
Efficiency Curve  
100  
90  
80  
70  
60  
50  
40  
30  
20  
10  
0
10  
1
3.3µH  
V
IN  
Burst Mode  
OPERATION  
5V  
SW  
V
OUT  
V
V
OUT  
12V  
IN  
800mA  
LTC3122  
PWM  
SD  
OFF ON  
100nF  
4.7µF  
BURST PWM  
PWM/SYNC  
RT  
CAP  
FB  
1.02M  
113k  
22µF  
0.1  
PWM POWER LOSS  
V
V
C
CC  
SGND  
PGND  
210k  
390pF  
57.6k  
10pF  
4.7µF  
0
0.01  
0.1  
1
10  
100  
1000  
LOAD CURRENT (mA)  
3122 TA01b  
3122 TA01a  
3122f  
1
LTC3122  
absoluTe MaxiMuM raTings  
(Note 1)  
V Voltage .................................................. –0.3V to 6V  
OUT  
CAP Voltage  
< 5.7V ............................–0.3V to (V  
IN  
V
Voltage ............................................ –0.3V to 18V  
V
+ 0.3V)  
+ 0.3V)  
OUT  
5.7V ≤ V  
OUT  
OUT  
SW Voltage (Note 2) .................................. –0.3V to 18V  
SW Voltage (Pulsed < 100ns) (Note 2)....... –0.3V to 19V  
≤ 11.7V......(V  
– 6V) to (V  
OUT  
OUT  
V
OUT  
> 11.7V.................................(V  
All Other Pins............................................... –0.3V to 6V  
– 6V) to 12V  
OUT  
V , RT Voltage .......................................... –0.3V to V  
C
CC  
Operating Junction Temperature Range  
(Notes 3, 4)............................................ –40°C to 125°C  
Storage Temperature Range .................. –65°C to 150°C  
MSE Lead Temperature (Soldering, 10sec) ...........300°C  
pin conFiguraTion  
TOP VIEW  
TOP VIEW  
SW  
1
2
3
4
5
6
12 CAP  
11  
10 SGND  
1
2
3
4
5
6
SW  
PGND  
12 CAP  
11  
10 SGND  
PGND  
V
OUT  
V
OUT  
V
IN  
V
13  
13  
PGND  
IN  
PGND  
PWM/SYNC  
9
8
7
SD  
FB  
PWM/SYNC  
9
8
7
SD  
V
CC  
RT  
V
CC  
FB  
V
C
RT  
V
C
MSE PACKAGE  
12-LEAD PLASTIC MSOP  
DE PACKAGE  
T
= 125°C, θ = 40°C/W (NOTE 5), θ = 10°C/W  
JA JC  
EXPOSED PAD (PIN 13) IS PGND,  
MUST BE SOLDERED TO PCB FOR RATED THERMAL PERFORMANCE  
JMAX  
12-LEAD (4mm × 3mm) PLASTIC DFN  
T
JMAX  
= 125°C, θ = 43°C/W (NOTE 5), θ = 5°C/W  
JA JC  
EXPOSED PAD (PIN 13) IS PGND,  
MUST BE SOLDERED TO PCB FOR RATED THERMAL PERFORMANCE  
orDer inForMaTion  
LEAD FREE FINISH  
LTC3122EDE#PBF  
LTC3122IDE#PBF  
LTC3122EMSE#PBF  
LTC3122IMSE#PBF  
TAPE AND REEL  
PART MARKING*  
PACKAGE DESCRIPTION  
TEMPERATURE RANGE  
LTC3122EDE#TRPBF  
LTC3122IDE#TRPBF  
LTC3122EMSE#TRPBF  
LTC3122IMSE#TRPBF  
3122  
3122  
3122  
3122  
12-Lead (4mm × 3mm) Plastic DFN  
12-Lead (4mm × 3mm) Plastic DFN  
12-Lead Plastic MSOP  
–40°C to 125°C  
–40°C to 125°C  
–40°C to 125°C  
–40°C to 125°C  
12-Lead Plastic MSOP  
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.  
Consult LTC Marketing for information on non-standard lead based finish parts.  
For more information on lead free part marking, go to: http://www.linear.com/leadfree/  
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/  
3122f  
2
LTC3122  
elecTrical characTerisTics The l denotes the specifications which apply over the full operating  
temperature range, otherwise specifications are at TA = 25°C (Note 3). VIN = 3.6V, VOUT = 12V, RT = 57.6k unless otherwise noted.  
PARAMETER  
CONDITIONS  
= 0V  
MIN.  
TYP  
MAX  
1.8  
5.5  
15  
UNITS  
V
l
l
l
l
Minimum Start-Up Voltage  
Input Voltage Range  
V
OUT  
1.7  
After V  
≥ 2.2V  
0.5  
2.2  
V
OUT  
Output Voltage Adjust Range  
Feedback Voltage  
V
1.178  
1.202  
1
1.225  
50  
V
Feedback Input Current  
Quiescent Current, Shutdown  
Quiescent Current, Active  
Quiescent Current, Burst  
V
V
= 1.4V  
= 0V, V  
nA  
µA  
µA  
FB  
= 0V, Not Including Switch Leakage  
OUT  
0.01  
500  
1
SD  
V = 0V, Measured On V , Non-Switching  
C
700  
IN  
Measured on V , V > 1.4V  
Measured on V , V > 1.4V  
25  
10  
40  
20  
µA  
µA  
IN FB  
OUT FB  
N-channel MOSFET Switch Leakage Current  
P-channel MOSFET Switch Leakage Current  
N-channel MOSFET Switch On-Resistance  
P-channel MOSFET Switch On-Resistance  
N-channel MOSFET Current Limit  
Maximum Duty Cycle  
V
V
= 15V, V  
= 15V, V = 0V  
0.1  
0.1  
20  
20  
µA  
µA  
Ω
SW  
OUT  
C
= 0V, V  
= 15V, V = 0V  
SD  
SW  
OUT  
0.121  
0.188  
3.5  
Ω
l
l
l
l
l
l
l
2.5  
90  
4.5  
A
V
V
= 1.0V  
= 1.4V  
94  
%
FB  
Minimum Duty Cycle  
0
1.15  
3
%
FB  
Switching Frequency  
0.85  
0.1  
1
MHz  
MHz  
V
SYNC Frequency Range  
PWM/SYNC Input High  
0.9•V  
CC  
PWM/SYNC Input Low  
0.1•V  
V
CC  
PWM/SYNC Input Current  
V
V
V
= 5.5V  
0.01  
–5.6  
4.25  
95  
1
µA  
V
PWM/SYNC  
CAP Clamp Voltage  
> 6.1V, Referenced to V  
–5.2  
4
–6.0  
4.5  
OUT  
OUT  
V
CC  
Regulation Voltage  
< 2.8V, V > 5V  
OUT  
V
IN  
l
Error Amplifier Transconductance  
Error Amplifier Output Current  
Soft-Start Time  
70  
120  
µS  
µA  
ms  
V
25  
10  
l
l
SD Input High  
1.6  
SD Input Low  
0.25  
2
V
SD Input Current  
V
SD  
= 5.5V  
1
µA  
Note 1: Stresses beyond those listed under Absolute Maximum Ratings  
may cause permanent damage to the device. Exposure to any Absolute  
Maximum Rating condition for extended periods may affect device  
reliability and lifetime.  
Note 2: Voltage transients on the SW pin beyond the DC limit specified in  
the Absolute Maximum Ratings are non-disruptive to normal operations  
when using good layout practices, as shown on the demo board or  
described in the data sheet or application notes.  
to meet specifications over the full –40°C to 125°C operating junction  
temperature range. The junction temperature (T in °C) is calculated from  
J
the ambient temperature (T in °C) and power dissipation (P in Watts)  
A
D
according to the formula: T = T + (P θ ) where θ is the thermal  
J
A
D
JA  
JA  
impedance of the package.  
Note 4: The LTC3122 includes overtemperature protection that is intended  
to protect the device during momentary overload conditions. Junction  
temperature will exceed 125°C when overtemperature shutdown is active.  
Continuous operation above the specified maximum operating junction  
temperature may result in device degradation or failure.  
Note 3: The LTC3122 is tested under pulsed load conditions such that  
T ≈ T . The LTC3122E is guaranteed to meet performance specifications  
A
J
from 0°C to 85°C. Specifications over the –40°C to 125°C operating  
junction temperature range are assured by design, characterization and  
correlation with statistical process controls. The LTC3122I is guaranteed  
Note 5: Failure to solder the exposed backside of the package to the PC  
board ground plane will result in a thermal impedance much higher than  
the rated package specifications.  
3122f  
3
LTC3122  
Typical perForMance characTerisTics  
Configured as front page application unless otherwise specified.  
Efficiency vs Load Current,  
VOUT = 5V  
Efficiency vs Load Current,  
VOUT = 7.5V  
Efficiency vs Load Current,  
VOUT = 12V  
100  
90  
80  
70  
60  
50  
40  
30  
20  
10  
0
100  
90  
80  
70  
60  
50  
40  
30  
20  
10  
0
100  
90  
80  
70  
60  
50  
40  
30  
20  
10  
0
BURST  
BURST  
BURST  
PWM  
V
PWM  
PWM  
= 5.4V  
= 4.2V  
= 2.6V  
V
V
V
= 5.4V  
= 3.8V  
= 2.3V  
V
V
V
= 4.2V  
= 3.3V  
= 0.6V  
IN  
IN  
IN  
IN  
IN  
IN  
IN  
IN  
IN  
V
V
0.01  
0.1  
1
10  
100  
1000  
0.01  
0.1  
1
10  
100 1000 10000  
0.01  
0.1  
1
10  
100 1000 10000  
LOAD CURRENT (mA)  
LOAD CURRENT (mA)  
LOAD CURRENT (mA)  
3122 G03  
3122 G02  
3122 G01  
PWM Mode Operation  
Load Transient Response  
Inrush Current Control  
V
V
OUT  
SD  
5V/DIV  
OUT  
20mV/DIV  
500mV/DIV  
AC-COUPLED  
AC-COUPLED  
V
OUT  
INDUCTOR  
CURRENT  
1A/DIV  
800mA  
5V/DIV  
I
OUT  
500mA/DIV  
INPUT  
CURRENT  
1A/DIV  
80mA  
80mA  
I
= 200mA  
LOAD  
3122 G06  
3122 G04  
3122 G05  
2ms/DIV  
1µs/DIV  
500µs/DIV  
RDS(ON) vs Temperature,  
Both NMOS and PMOS  
Oscillator Frequency  
vs Temperature  
Feedback vs Temperature  
0.2  
0.1  
80  
60  
1.0  
0.5  
0
40  
0
–0.1  
–0.2  
–0.3  
–0.4  
–0.5  
–0.6  
20  
–0.5  
–1.0  
–1.5  
–2.0  
0
–20  
–40  
–60  
–10  
40  
90  
140  
–50  
–10  
30  
70  
110  
150  
–60  
–10  
40  
90  
140  
TEMPERATURE (°C)  
TEMPERATURE (°C)  
TEMPERATURE (°C)  
3122 G07  
3122 G08  
3122 G09  
3122f  
4
LTC3122  
Typical perForMance characTerisTics  
PWM Mode Maximum Output  
Current vs VIN  
Peak Current Limit Change  
vs Temperature  
PWM Operation No Load Input  
Current vs VIN  
2
1
2.0  
1.8  
1.6  
1.4  
1.2  
1.0  
0.8  
0.6  
0.4  
0.2  
0
70  
60  
50  
40  
30  
20  
10  
0
V
V
V
= 5V  
= 7.5V  
= 12V  
V
OUT  
V
OUT  
V
OUT  
= 5V  
= 7.5V  
= 12V  
OUT  
OUT  
OUT  
0
–1  
–2  
–3  
–4  
–50  
–10  
30  
70  
110  
150  
0.5  
1.5  
2.5  
V
3.5  
(V)  
4.5  
5.5  
0
1
2
3
4
5
6
TEMPERATURE (°C)  
V
(V)  
IN  
IN  
3122 G11  
3122 G10  
3122 G12  
Burst Mode Maximum Output  
Current vs VIN  
Burst Mode Quiescent Current  
Change vs Temperature  
Burst Mode IZERO Current vs VIN  
75  
60  
45  
30  
15  
0
350  
300  
250  
200  
150  
100  
50  
V
V
V
V
= 2.2V  
= 5V  
= 7.5V  
= 12V  
V
V
V
V
= 2.2V  
OUT  
OUT  
OUT  
OUT  
OUT  
OUT  
OUT  
OUT  
140  
120  
100  
80  
= 5V  
= 7.5V  
= 12V  
60  
40  
20  
–15  
0
0
–50  
–10  
30  
70  
110  
150  
0.5  
1.5  
2.5  
3.5  
4.5  
5.5  
0.5  
1.5  
2.5  
V , RISING(V)  
IN  
3.5  
4.5  
5.5  
TEMPERATURE (°C)  
V
, FALLING (V)  
IN  
3122 G14  
3122 G13  
3122 G14  
SD Pin Threshold  
Frequency vs RT  
Frequency Accuracy  
4
3
3.0  
2.5  
2.0  
1.5  
1.0  
0.5  
0
12  
10  
8
V
V
V
= 15V  
= 3.6V  
= 2.2V  
FREQUENCY  
PERIOD  
OUT  
OUT  
OUT  
V
OUT  
2
5V/DIV  
1
0
6
900mV  
–1  
–2  
–3  
–4  
400mV  
V
SD  
4
500mV/DIV  
3122 G16  
2
1s/DIV  
0
0
1
2
3
4
5
6
0
100  
200  
300  
(kΩ)  
400  
500  
600  
V
FALLING (V)  
R
T
IN  
3122 G18  
3122 G17  
3122f  
5
LTC3122  
Typical perForMance characTerisTics  
Efficiency vs Frequency  
CAP Pin Voltage vs VOUT  
VCC vs VIN  
0
–1  
–2  
–3  
–4  
–5  
–6  
–7  
4.5  
4.0  
3.5  
3.0  
2.5  
100  
90  
80  
70  
60  
50  
40  
30  
20  
10  
0
f
f
f
= 200kHz  
= 1MHz  
= 3MHz  
OSC  
OSC  
OSC  
V
V
FALLING  
RISING  
IN  
IN  
0
2
4
6
8
10  
12  
14  
0
1
2
3
4
5
6
10  
100  
1000  
V
(V)  
V
(V)  
IN  
LOAD CURRENT (mA)  
OUT  
3122 G20  
3122 G21  
3122 G19  
Burst Mode Operation  
to PWM Mode  
PWM Mode to Burst Mode  
Operation  
Burst Mode Operation  
V
OUT  
V
V
OUT  
100mV/DIV  
AC-COUPLED  
OUT  
100mV/DIV  
100mV/DIV  
AC-COUPLED  
AC-COUPLED  
V
SW  
V
10V/DIV  
PWM/SYNC  
2V/DIV  
INDUCTOR  
CURRENT  
0.5A/DIV  
V
PWM/SYNC  
2V/DIV  
I
= 70mA  
I
= 70mA  
I
= 50mA  
LOAD  
LOAD  
LOAD  
3122 G22  
3122 G23  
3122 G24  
5µs/DIV  
20µs/DIV  
20µs/DIV  
Burst Mode Transient  
Synchronized Operation  
Short-Circuit Response  
SHORT-CIRCUIT APPLIED  
V
OUT  
V
OUT  
5V/DIV  
200mV/DIV  
AC-COUPLED  
V
SW  
SHORT-CIRCUIT  
REMOVED  
5V/DIV  
100mA  
I
LOAD  
SYNCHRONIZED TO 1.3MHz  
INPUT  
CURRENT  
2A/DIV  
100mA/DIV  
V
PWM/SYNC  
5V/DIV  
10mA  
10mA  
3122 G25  
3122 G26  
3122 G27  
200µs/DIV  
1µs/DIV  
100µs/DIV  
3122f  
6
LTC3122  
pin FuncTions  
SW (Pin 1): Switch Pin. Connect an inductor from this  
V
(Pin 5): V Regulator Output. Connect a low-ESR  
CC CC  
filter capacitor of at least 4.7µF from this pin to GND to  
providearegulatedrailapproximatelyequaltothelowerof  
pin to V . Keep PCB trace lengths as short and wide as  
IN  
possible to reduce EMI and voltage overshoot. An internal  
V and 4.25V. When V  
below 3V, V will regulate to the lower of approximately  
is higher than V , and V falls  
anti-ringing resistor is connected between SW and V  
IN  
OUT  
IN IN  
IN  
after the inductor current has dropped to near zero, to  
minimize EMI. The anti-ringing resistor is also activated  
in shutdown and during the sleep periods of Burst Mode  
operation.  
CC  
V
and 4.25V. A UVLO event occurs if V drops below  
OUT  
CC  
1.6V. Switching is inhibited, and a soft-start is initiated  
when V returns above 1.7V.  
CC  
RT (Pin 6): Frequency Adjust Pin. Connect an external  
PGND (Pins 2, 13): Power Ground. When laying out your  
PCB, provide a short, direct path between PGND and the  
output capacitor and tie directly to the ground plane. The  
exposed pad is ground and must be soldered to the PCB  
ground plane for rated thermal performance.  
resistor (R ) from this pin to SGND to program the oscil-  
T
lator frequency according to the formula:  
R = 57.6/ƒ  
T
OSC  
where ƒ  
is in MHz and R is in kΩ.  
T
OSC  
V (Pin 3): Input Supply Pin. The device is powered from  
IN  
VC (Pin 7): Error Amplifier Output. A frequency compen-  
sation network is connected to this pin to compensate  
the control loop. See Compensating the Feedback Loop  
section for guidelines.  
V unless V  
exceeds V and V is less than 3V. Place  
IN  
OUT  
IN IN  
a low ESR ceramic bypass capacitor of at least 4.7µF from  
V
to PGND. X5R and X7R dielectrics are preferred for  
IN  
their superior voltage and temperature characteristics.  
FB (Pin 8): Feedback Input to the Error Amplifier. Connect  
PWM/SYNC (Pin 4): Burst Mode Operation Select and  
OscillatorSynchronization. Donotleavethispinfloating.  
the resistor divider tap to this pin. Connect the top of the  
divider to V  
and the bottom of the divider to SGND.  
OUT  
• PWM/SYNC = High. Disable Burst Mode Operation and  
The output voltage can be adjusted from 2.2V to 15V ac-  
cording to this formula:  
maintain low noise, constant frequency operation.  
• PWM/SYNC = Low. Enable Burst Mode operation.  
V
OUT  
= 1.202V • (1 + R1/R2)  
• PWM/SYNC = External CLK. The internal oscillator is  
synchronized to the external CLK signal. Burst Mode  
operation is disabled. A clock pulse width between  
100ns and 2µs is required to synchronize the oscillator.  
An external resistor must be connected between RT  
and GND to program the oscillator slightly below the  
desired synchronization frequency.  
SD(Pin9):LogicControlledShutdownInput.Bringingthis  
pin above 1.6V enables normal, free-running operation,  
forcingthispinbelow0.25VshutstheLTC3122down, with  
quiescentcurrentbelow1μA.Donotleavethispinfloating.  
SGND (Pin 10): Signal Ground. When laying out a PC  
board, provide a short, direct path between SGND and  
the (–) side of the output capacitor.  
In non-synchronized applications, repeated clocking of  
the PWM/SYNC pin to affect an operating mode change  
is supported with these restrictions:  
V
(Pin 11): Output Voltage Sense and the Source of  
OUT  
the Internal Synchronous Rectifier MOSFET. Driver bias  
is derived from V . Connect the output filter capacitor  
OUT  
from V  
to PGND, as close to the IC as possible. A  
• Boost Mode (V  
> V ): I  
<500µA: ƒ  
PWM/SYNC  
OUT  
OUT  
≥ 500µA: ƒ  
IN OUT  
minimum value of 10µF ceramic is recommended. V  
100Hz, I  
≤ 5kHz  
OUT  
OUT  
PWM/SYNC  
is disconnected from V when SD is low.  
IN  
• Buck Mode (V  
< V ): I  
PWM/SYNC  
<5mA: ƒ  
≤ 5Hz,  
OUT  
≥ 5mA: ƒ  
IN OUT  
PWM/SYNC  
CAP (Pin 12): Serves as the Low Reference for the Syn-  
I
≤ 5kHz  
OUT  
chronous Rectifier Gate Drive. Connect a low ESR filter  
capacitor(typically100nF)fromthispintoV  
toprovide  
OUT  
an elevated ground rail, approximately 5.6V below V  
used to drive the synchronous rectifier.  
,
OUT  
3122f  
7
LTC3122  
block DiagraM  
BULK CONTROL  
SIGNALS  
SW  
1
V
IN  
ANTI-RING  
V
OUT  
L1  
V
OUT  
11  
2.2V TO 15V  
V
IN  
V
IN  
3
C
OUT  
1.8V TO 5.5V  
TSD  
C
PWM  
LOGIC  
AND  
IN  
V
REF_UP  
OSC  
C1  
100nF  
DRIVERS  
SD  
16.2V  
OVLO  
+ –  
CURRENT  
SENSE  
SD  
SHUTDOWN  
SD  
9
4
+ –  
I
ZERO  
PGND  
COMP  
OVLO  
R
CAP  
FB  
PL  
12  
8
PWM  
BURST  
SYNC  
C
PL  
PWM/SYNC  
R1  
R2  
CONTROL  
+
– –  
V
+
C
1.202V  
V
V
IN OUT  
g
ERROR  
AMPLIFIER  
m
I
LIM  
REF  
V
BEST  
VC  
7
ADAPTIVE SLOPE COMPENSATION  
V
CC  
R
C
F
C
5
LDO  
SD  
TSD  
OVLO  
SOFT-START  
VC CLAMP  
C
VCC  
C
C
4.7µF  
V
REFERENCE  
UVLO  
REF_UP  
1.202V  
OSCILLATOR  
OSC  
RT  
SGND  
PGND  
6
10  
2
TSD  
THERMAL SD  
R
T
EXPOSED PAD 13  
LTC3122  
3122 BD  
THE VALUES OF RC, CC, AND CF ARE BASED UPON OPERATING CONDITIONS.  
PLEASE REFER TO COMPENSATING THE FEEDBACK LOOP SECTION FOR  
GUIDELINES TO DETERMINE OPTIMAL VALUES OF THESE COMPONENTS.  
3122f  
8
LTC3122  
operaTion  
The LTC3122 is an adjustable frequency, 100kHz to 3MHz  
synchronous boost converter housed in either a 12-lead  
4mm × 3mm DFN or a thermally enhanced MSOP pack-  
age. The LTC3122 offers the unique ability to start-up  
and regulate the output from inputs as low as 1.8V and  
continue to operate from inputs as low as 0.5V. Output  
voltages can be programmed between 2.2V and 15V. The  
device also features fixed frequency, current mode PWM  
control for exceptional line and load regulation. The cur-  
rent mode architecture with adaptive slope compensation  
provides excellent transient load response and requires  
minimal output filtering. An internal 10ms closed loop  
soft-start simplifies the design process while minimizing  
the number of external components.  
zero to its final programmed value. This limits the inrush  
current drawn from the input source. As a result, the du-  
ration of the soft-start is largely unaffected by the size of  
the output capacitor or the output regulation voltage. The  
closed loop nature of the soft-start allows the converter  
to respond to load transients that might occur during  
the soft-start interval. The soft-start period is reset by a  
shutdown command on SD, a UVLO event on V (V  
<
CC CC  
≥ 16.2V), or  
1.6V), an overvoltage event on V  
(V  
OUT OUT  
an overtemperature event (thermal shutdown is invoked  
when the die temperature exceeds 170°C). Upon removal  
of these fault conditions, the LTC3122 will soft-start the  
output voltage.  
Error Amplifier  
WithitslowR  
andlowgatechargeinternalN-channel  
DS(ON)  
The non-inverting input of the transconductance error  
amplifier is internally connected to the 1.202V reference  
and the inverting input is connected to FB. An external  
MOSFET switch and P-channel MOSFET synchronous  
rectifier, the LTC3122 achieves high efficiency over a wide  
range of load current. High efficiency is achieved at light  
loadswhenBurstModeoperationiscommanded.Operation  
can be best understood by referring to the Block Diagram.  
resistive voltage divider from V  
to ground programs  
OUT  
the output voltage from 2.2V to 15V via FB as shown in  
Figure 1.  
R1  
R2  
LOW VOLTAGE OPERATION  
VOUT = 1.202V 1+  
The LTC3122 is designed to allow start-up from input  
voltages as low as 1.8V. When V  
exceeds 2.2V, the  
OUT  
Selecting an R2 value of 121kΩ to have approximately  
10µA of bias current in the V  
the formula:  
LTC3122 continues to regulate its output, even when V  
IN  
resistor divider yields  
OUT  
falls to as low as 0.5V. The limiting factors for the applica-  
tion become the availability of the input source to supply  
sufficient power to the output at the low voltages, and  
the maximum duty cycle. Note that at low input voltages,  
small voltage drops due to series resistance become  
critical and greatly limit the power delivery capability of  
the converter. This feature extends operating times by  
maximizing the amount of energy that can be extracted  
from the input source.  
R1 = 100.67•(V  
– 1.202V)  
OUT  
where R1 is in kΩ.  
Power converter control loop compensation is set by a  
simple RC network between V and ground.  
C
V
OUT  
LTC3122  
R1  
+
FB  
1.202V  
LOW NOISE FIXED FREQUENCY OPERATION  
Soft-Start  
R2  
The LTC3122 contains internal circuitry to provide closed-  
loop soft-start operation. The soft-start utilizes a linearly  
increasing ramp of the error amplifier reference voltage  
from zero to its nominal value of 1.202V in approximately  
3122 F01  
Figure 1. Programming the Output Voltage  
10ms, with the internal control loop driving V  
from  
OUT  
3122f  
9
LTC3122  
operaTion  
Internal Current Limit  
shutdown, and draw no current from the input source. It  
also allows for inrush current limiting at turn-on, minimiz-  
ing surge currents seen by the input supply. Note that to  
obtain the advantages of output disconnect, there must  
not be an external Schottky diode connected between SW  
The current limit comparator shuts off the N-channel  
MOSFETswitchonceitsthresholdisreached. Peakswitch  
current is limited to 3.5A, independent of input or output  
voltage, except when V  
currentlimitbeingapproximatelyhalfofthenominalpeak.  
is below 1.5V, resulting in the  
OUT  
and V . The output disconnect feature also allows V  
OUT  
OUT  
to be pulled high, without reverse current being backfed  
Lossless current sensing converts the peak current sig-  
nal of the N-channel MOSFET switch into a voltage that  
is summed with the internal slope compensation. The  
summed signal is compared to the error amplifier output  
to provide a peak current control command for the PWM.  
into the power source connected to V .  
IN  
Shutdown  
The boost converter is disabled by pulling SD below 0.25V  
and enabled by pulling SD above 1.6V. Note that SD can  
be driven above V or V , as long as it is limited to less  
IN  
OUT  
Zero Current Comparator  
than the absolute maximum rating.  
Thezerocurrentcomparatormonitorstheinductorcurrent  
being delivered to the output and shuts off the synchro-  
nous rectifier when this current reduces to approximately  
50mA. This prevents the inductor current from reversing  
in polarity, improving efficiency at light loads.  
Thermal Shutdown  
If the die temperature exceeds 170°C typical, the LTC3122  
will go into thermal shutdown (TSD). All switches will be  
turnedoffuntilthedietemperaturedropsbyapproximately  
7°C, whenthedevicere-initiatesasoft-startandswitching  
can resume.  
Oscillator  
Theinternaloscillatorisprogrammedtothedesiredswitch-  
ing frequency with an external resistor from the RT pin to  
GND according to the following formula:  
Boost Anti-Ringing Control  
The anti-ringing control connects a resistor across the  
inductor to damp high frequency ringing on the SW pin  
during discontinuous current mode operation when the  
inductor current has dropped to near zero. Although  
57.6  
ƒOSC (MHz) =  
R (k)  
T
The oscillator also can be synchronized to an external  
frequency by applying a pulse train to the PWM/SYNC pin.  
An external resistor must be connected between RT and  
GNDtoprogramtheoscillatortoafrequencyapproximately  
25% below that of the externally applied pulse train used  
the ringing of the resonant circuit formed by L and C  
SW  
(capacitance on SW pin) is low energy, it can cause EMI  
radiation.  
V
CC  
Regulator  
for synchronization. R is selected in this case according  
T
An internal low dropout regulator generates the 4.25V  
(nominal) V rail from V or V , depending upon  
to this formula:  
CC  
IN  
OUT  
operating conditions. V is supplied from V when V  
CC  
IN  
IN  
IN  
OUT  
73.2  
(MHz)  
RT(k) =  
is greater than 3.5V, otherwise the greater of V and V  
ƒ
SYNC  
is used. The V rail powers the internal control circuitry  
CC  
and power MOSFET gate drivers of the LTC3122. The V  
CC  
Output Disconnect  
regulator is disabled in shutdown to reduce quiescent  
current and is enabled by forcing the SD pin above its  
threshold. A 4.7µF or larger capacitor must be connected  
The LTC3122’s output disconnect feature eliminates body  
diode conduction of the internal P-channel MOSFET  
between V and SGND.  
CC  
rectifier. This allows for V  
to discharge to 0V during  
OUT  
3122f  
10  
LTC3122  
applicaTions inForMaTion  
Overvoltage Lockout  
InBurstModeoperation, theLTC3122switchesasynchro-  
nously. The inductor current is first charged to 600mA  
by turning on the N-channel MOSFET switch. Once this  
current threshold is reached, the N-channel is turned off  
and the P-channel synchronous switch is turned on, de-  
livering current to the output. When the inductor current  
discharges to approximately zero, the cycle repeats. In  
Burst Mode operation, energy is delivered to the output  
until the nominal regulation value is reached, at which  
point the LTC3122 transitions to sleep mode. In sleep, the  
outputswitchesareturnedoffandtheLTC3122consumes  
only 25μA of quiescent current. When the output voltage  
droopsapproximately1%, switchingresumes. Thismaxi-  
mizesefficiencyatverylightloadsbyminimizingswitching  
and quiescent losses. Output voltage ripple in Burst Mode  
operation is typically 1% peak-to-peak. Additional output  
capacitance (10μF or greater), or the addition of a small  
feed-forwardcapacitor(10pFto50pF)connectedbetween  
An overvoltage condition occurs when V  
exceeds ap-  
OUT  
proximately 16.2V. Switching is disabled and the internal  
soft-start ramp is reset. Once V drops below approxi-  
OUT  
mately 15.6V, a soft-start cycle is initiated and switching  
is enabled. If the boost converter output is lightly loaded  
so that the time constant product of the output capaci-  
tance, C , and the output load resistance, R  
is near  
OUT  
OUT  
or greater than the soft-start time of approximately 10ms,  
thesoft-startrampmayendbeforeorsoonafterswitching  
resumes,defeatingtheinrushcurrentlimitingoftheclosed  
loop soft-start following an overvoltage event.  
Short-Circuit Protection  
The LTC3122 output disconnect feature allows output  
short-circuitprotection.Toreducepowerdissipationunder  
overload and short-circuit conditions, the peak switch  
current limit is reduced to 1.6A. Once V  
> 1.5V, the  
OUT  
V
and FB can help further reduce the output ripple.  
OUT  
current limit is set to its nominal value of 3.5A.  
The maximum output current (I ) capability in Burst  
OUT  
Mode operation varies with V and V , as shown in  
V > V Operation  
IN  
OUT  
IN  
OUT  
Figure 2.  
TheLTC3122step-upconverterwillmaintainvoltageregu-  
lation even when the input voltage is above the desired  
outputvoltage.Notethatoperatinginthismodewillexhibit  
lower efficiency and a reduced output current capability.  
Refer to the Typical Performance Characteristics section  
for details.  
350  
300  
250  
200  
150  
100  
50  
V
V
V
V
= 2.2V  
= 5V  
= 7.5V  
= 12V  
OUT  
OUT  
OUT  
OUT  
Burst Mode OPERATION  
When the PWM/SYNC pin is held low, the boost converter  
operates in Burst Mode operation to improve efficiency  
at light loads and reduce standby current at no load. The  
0
0.5  
1.5  
2.5  
3.5  
4.5  
5.5  
input thresholds for this pin are determined relative to V  
CC  
V
, FALLING (V)  
IN  
3122 F02  
with a low being less than 10% of V and a high being  
CC  
greater than 90% of V . The LTC3122 will operate in  
Figure 2. Burst Mode Maximum Output Current vs VIN  
CC  
fixed frequency PWM mode even if Burst Mode operation  
is commanded during soft-start.  
3122f  
11  
LTC3122  
applicaTions inForMaTion  
PCB LAYOUT GUIDELINES  
rent capability by reducingthe inductorripplecurrent. The  
minimum inductance value, L, is inversely proportional to  
operatingfrequencyandisgivenbythefollowingequation:  
The high switching frequency of the LTC3122 demands  
careful attention to board layout. A careless layout will  
result in reduced performance. Maximizing the copper  
area for ground will help to minimize die temperature rise.  
A multilayer board with a separate ground plane is ideal,  
but not absolutely necessary. See Figure 3 for an example  
of a two-layer board layout.  
V V  
ƒ Ripple VOUT  
V  
IN  
(
)
3
ƒ
IN  
OUT  
L >  
µH and L >  
where:  
Ripple = Allowable inductor current ripple (amps  
peak-to-peak)  
ƒ = Switching Frequency in MHz  
PGND  
The inductor current ripple is typically set for 20% to  
40% of the maximum inductor current. High frequency  
ferrite core inductor materials reduce frequency depen-  
dent power losses compared to cheaper powdered iron  
types, improving efficiency. The inductor should have  
low ESR (series resistance of the windings) to reduce the  
PGND  
CAP  
V
SW  
1
2
3
4
5
6
12  
OUT  
V
IN  
11  
10 SGND  
9
13  
PGND  
2
V
CC  
8
7
FB  
I R power losses, and must be able to support the peak  
inductor current without saturating. Molded chokes and  
some chip inductors usually do not have enough core  
area to support the peak inductor currents of 3A to 4A  
seen on the LTC3122. To minimize radiated noise, use a  
shielded inductor.  
V
C
RT  
See Table 1 for suggested components and suppliers.  
3122 F02  
Table 1. Recommended Inductors  
MAX DC  
Figure 3. Traces Carrying High Current Are Direct (PGND, SW, VIN  
and VOUT). Trace Area at FB and VC Are Kept Low. Trace Length to  
Input Supply Should Be Kept Short. VIN and VOUT Ceramic Capacitors  
Should Be Placed as Close to the LTC3122 Pins as Possible  
VALUE DCR CURRENT  
SIZE (mm)  
W × L × H  
PART NUMBER  
(µH) (mΩ)  
(A)  
Coilcraft LPS4018  
Coilcraft MSS7341  
Coilcraft MSS1260T  
1
3.3  
33  
42  
20  
54.9  
3.8  
3.72  
4.34  
4 × 4 × 1.8  
7.3 × 7.3 × 4.1  
12.3 × 12.3 × 6.2  
SCHOTTKY DIODE  
Coiltronics DRQ73  
Coiltronics SD7030  
Coiltronics DR125  
0.992  
3.3  
33  
24  
24  
59  
3.99  
3
3.84  
7.6 × 7.6 × 3.55  
7 × 7 × 3  
12.5 × 12.5 × 6  
Although it is not required, adding a Schottky diode from  
SW to V  
can improve the converter efficiency by about  
OUT  
4%.Notethatthisdefeatstheoutputdisconnectandshort-  
circuit protection features of the LTC3122.  
Murata LQH6PP  
Murata LQH6PP  
1
9
4.3  
3.8  
6 × 6 × 4.3  
6 × 6 × 4.3  
3.3  
16  
Sumida CDRH50D28RNP 1.2  
Sumida CDRH8D28NP  
Sumida CDRH129HF  
13  
18  
53  
4.8  
4
4.25  
5 × 5 × 2.8  
8 × 8 × 3  
12 × 12 × 10  
3.3  
33  
COMPONENT SELECTION  
Inductor Selection  
Taiyo-Yuden NR6045  
3
31  
3.2  
6 × 6 × 4.5  
TDK LTF5022T  
TDK SPM6530T  
TDK VLF12060T  
1.2  
3.3  
33  
25  
20  
53  
4.2  
4.1  
3.4  
5 × 5.2 × 2.2  
7 × 7 × 3.2  
11.7 × 12 × 6  
The LTC3122 can utilize small surface mount inductors  
due to its high switching frequency (up to 3MHz). Larger  
values of inductance will allow slightly greater output cur-  
Würth WE-PD  
3.3  
32.5  
3.1  
7.3 × 7.3 × 2  
3122f  
12  
LTC3122  
applicaTions inForMaTion  
Output and Input Capacitor Selection  
of its rated capacitance when operated near its rated volt-  
age. As a result it is sometimes necessary to use a larger  
capacitor value or a capacitor with a larger value and case  
size, such as 1812 rather than 1206, in order to actually  
realize the intended capacitance at the full operating volt-  
age. Be sure to consult the vendor’s curve of capacitance  
vsDCbiasvoltage. Table2showsasamplingofcapacitors  
suited for LTC3122 applications.  
Low ESR (equivalent series resistance) capacitors should  
be used to minimize the output voltage ripple. Multilayer  
ceramic capacitors are an excellent choice as they have  
extremely low ESR and are available in small footprints.  
X5R and X7R dielectric materials are preferred for their  
ability to maintain capacitance over wide voltage and tem-  
perature ranges. Y5V types should not be used. Although  
ceramic capacitors are recommended, low ESR tantalum  
capacitors may be used as well.  
Table 2. Representative Output Capacitors  
MANUFACTURER,  
PART NUMBER  
VALUE VOLTAGE SIZE L × W × H (mm)  
(µF)  
(V)  
TYPE, ESR (mΩ)  
When selecting output capacitors, the magnitude of the  
peak inductor current, together with the ripple voltage  
specification, determine the choice of the capacitor. Both  
theESR(equivalentseriesresistance)ofthecapacitorand  
the charge stored in the capacitor each cycle contribute  
to the output voltage ripple.  
AVX,  
22  
25  
3.2 × 2.5 × 2.79,  
X5R Ceramic  
12103D226MAT2A  
Kemet,  
C2220X226K3RACTU  
22  
22  
25  
16  
25  
25  
25  
25  
16  
25  
25  
25  
4.5  
2.5  
2.5  
5.7 × 5.0 × 2.4,  
X7R Ceramic  
Kemet,  
A700D226M016ATE030  
7.3 × 4.3 × 2.8,  
Alum. Polymer, 30mΩ  
Murata,  
GRM32ER71E226KE15L  
22  
3.2 × 2.5 × 2.5,  
X7R Ceramic  
The ripple due to the charge is approximately:  
Nichicon,  
PLV1E121MDL1  
82  
8 × 8 × 12,  
Alum. Polymer, 25mΩ  
IP VIN  
VRIPPLE(CHARGE)  
COUT VOUT ƒ  
where I is the peak inductor current.  
Panasonic,  
ECJ-4YB1E226M  
22  
3.2 × 2.5 × 2.5,  
X5R Ceramic  
P
Sanyo,  
25TQC22MV  
22  
7.3 × 4.3 × 3.1,  
POSCAP, 50mΩ  
The ESR of C  
is usually the most dominant factor for  
OUT  
Sanyo,  
16TQC100M  
100  
7.3 × 4.3 × 1.9,  
POSCAP, 45mΩ  
ripple in most power converters. The ripple due to the  
capacitor ESR is:  
Sanyo,  
25SVPF47M  
47  
6.6 × 6.6 × 5.9,  
OS-CON, 30mΩ  
VOUT  
VRIPPLE(ESR) =ILOAD RESR  
where R  
Taiyo Yuden,  
TMK325BJ226MM-T  
22  
3.2 × 2.5 × 2.5,  
X5R Ceramic  
V
IN  
TDK,  
47  
6.5 × 5.5 × 5.5,  
X5R Ceramic  
= capacitor equivalent series resistance.  
ESR  
CKG57NX5R1E476M  
Cap-XX  
GS230F  
1.2Farads  
1.5Farads  
50Farads  
39 × 17 × 3.8  
28mΩ  
Theinputfiltercapacitorreducespeakcurrentsdrawnfrom  
the input source and reduces input switching noise. A low  
ESR bypass capacitor with a value of at least 4.7µF should  
Cooper  
A1030-2R5155  
Ø = 10, L = 30  
60mΩ  
be located as close to the V pin as possible.  
IN  
Maxwell  
BCAP0050-P270  
Ø = 18, L = 40  
20mΩ  
Low ESR and high capacitance are critical to maintain low  
output voltage ripple. Capacitors can be used in parallel  
for even larger capacitance values and lower effective  
ESR. Ceramic capacitors are often utilized in switching  
converterapplicationsduetotheirsmallsize, lowESRand  
low leakage currents. However, many ceramic capacitors  
experience significant loss in capacitance from their rated  
value with increased DC bias voltage. It is not uncommon  
forasmallsurfacemountcapacitortolosemorethan50%  
For applications requiring a very low profile and very large  
capacitance, the GS, GS2 and GW series from Cap-XX  
and PowerStor Aerogel Capacitors from Cooper all offer  
very high capacitance and low ESR in various low profile  
packages.  
Amethodforimprovingtheconverter’stransientresponse  
usesasmallfeed-forwardseriesnetworkofacapacitorand  
3122f  
13  
LTC3122  
applicaTions inForMaTion  
a resistor across the top resistor of the feedback divider  
possible. If the junction temperature rises above ~170°C,  
the part will go into thermal shutdown, and all switching  
will stop until the temperature drops approximately 7°C.  
(from V  
to FB). This adds a phase-lead zero and pole  
OUT  
to the transfer function of the converter as calculated in  
the Compensating the Feedback Loop section.  
Compensating the Feedback Loop  
OPERATING FREQUENCY SELECTION  
The LTC3122 uses current mode control, with internal  
adaptiveslopecompensation.Currentmodecontrolelimi-  
natesthesecondorderfilterduetotheinductorandoutput  
capacitorexhibitedinvoltagemodecontrol,andsimplifies  
the power loop to a single pole filter response. Because  
of this fast current control loop, the power stage of the IC  
combined with the external inductor can be modeled by a  
Thereareseveralconsiderationsinselectingtheoperating  
frequencyoftheconverter.Typicallythefirstconsideration  
is to stay clear of sensitive frequency bands, which cannot  
tolerateanyspectralnoise.Forexample,inproductsincor-  
porating RF communications, the 455kHz IF frequency is  
sensitive to any noise, therefore switching above 600kHz  
is desired. Some communications have sensitivity to  
1.1MHz and in that case a 1.5MHz switching converter  
frequencymaybeemployed.Asecondconsiderationisthe  
physical size of the converter. As the operating frequency  
is increased, the inductor and filter capacitors typically  
can be reduced in value, leading to smaller sized external  
components. The smaller solution size is typically traded  
forefficiency,sincetheswitchinglossesduetogatecharge  
increase with frequency.  
transconductance amplifier g and a current controlled  
mp  
current source. Figure 4 shows the key equivalent small  
signal elements of a boost converter.  
The DC small-signal loop gain of the system shown in  
Figure 4 is given by the following equation:  
R2  
R1+R2  
GBOOST = GEA GMP GPOWER  
where G is the DC gain of the error amplifier, G is  
EA  
MP  
the modulator gain, and G  
is the inductor current  
POWER  
Anotherconsiderationiswhethertheapplicationcanallow  
pulse-skipping.Whentheboostconverterpulse-skips,the  
minimum on-time of the converter is unable to support  
the duty cycle. This results in a low frequency component  
to the output ripple. In many applications where physical  
size is the main criterion, running the converter in this  
mode is acceptable. In applications where it is preferred  
not to enter this mode, the maximum operating frequency  
is given by:  
to V  
gain.  
OUT  
+
V
OUT  
g
mp  
I
L
η • V  
IN  
• I  
R
R
L
L
ESR  
2 • V  
OUT  
C
OUT  
MODULATOR  
R
PL  
1.202V  
REFERENCE  
C
PL  
+
V
C
R1  
R2  
g
ma  
VOUT VIN  
FB  
ƒMAX _NOSKIP  
Hz  
R
R
O
C
ERROR  
AMPLIFIER  
C
F
VOUT tON(MIN)  
= minimum on-time = 100ns.  
C
C
where t  
3122 F04  
ON(MIN)  
C : COMPENSATION CAPACITOR  
C
C
C
: OUTPUT CAPACITOR  
OUT  
: PHASE LEAD CAPACITOR  
PL  
Thermal Considerations  
C : HIGH FREQUENCY FILTER CAPACITOR  
F
g
g
: TRANSCONDUCTANCE AMPLIFIER INSIDE IC  
: POWER STAGE TRANSCONDUCTANCE AMPLIFIER  
ma  
mp  
For the LTC3122 to deliver its full power, it is imperative  
that a good thermal path be provided to dissipate the heat  
generated within the package. This can be accomplished  
by taking advantage of the large thermal pad on the un-  
derside of the IC. It is recommended that multiple vias in  
the printed circuit board be used to conduct heat away  
from the IC and into a copper plane with as much area as  
R : COMPENSATION RESISTOR  
C
R : OUTPUT RESISTANCE DEFINED AS V /I  
L
OUT LOADMAX  
R : OUTPUT RESISTANCE OF g  
O
PL  
ma  
R
: PHASE LEAD RESISTOR  
R1, R2: FEEDBACK RESISTOR DIVIDER NETWORK  
R
: OUTPUT CAPACITOR ESR  
ESR  
η : CONVERTER EFFICIENCY (~90% AT HIGHER CURRENTS)  
Figure 4. Boost Converter Equivalent Model  
3122f  
14  
LTC3122  
applicaTions inForMaTion  
GEA = gma RO 950V/V  
The current mode zero (Z3) is a right half plane zero  
which can be an issue in feedback control design, but is  
manageable with proper external component selection.  
As a general rule, the frequency at which the open-loop  
gain of the converter is reduced to unity, known as the  
(Not Adjustable; gma = 95µS, RO 10M)  
IL  
GMP = gmp  
=
3.4S (Not Adjustable)  
VC  
crossover frequency ƒ , should be set to less than one  
C
ηVIN  
third of the right half plane zero (Z3), and under one eighth  
VOUT  
IL  
GPOWER  
=
=
of the switching frequency ƒ . Once ƒ is selected, the  
OSC  
C
2 IOUT  
valuesforthecompensationcomponentscanbecalculated  
using a bode plot of the power stage or two generally valid  
assumptions: P1 dominates the gain of the power stage  
Combining the two equations above yields:  
1.7 ηVIN  
for frequencies lower than ƒ and ƒ is much higher than  
C
C
GDC = GMP GPOWER  
V/V  
P2. First calculate the power stage gain at ƒ , G in V/V.  
IOUT  
C
ƒC  
AssumingtheoutputpoleP1dominatesG forthisrange,  
ƒC  
it is expressed by:  
Converter efficiency η will vary with I  
and switching  
OUT  
frequency ƒ  
as shown in the typical performance  
OSC  
GDC  
GƒC  
V/V  
characteristics curves.  
2  
ƒ
P1  
C   
1+  
2
Output Pole: P1 =  
Hz  
1
2 π RL COUT  
Decide how much phase margin (Φ ) is desired. Greater  
m
Error Amplifier Pole: P2 =  
Error Amplifier Zero: Z1=  
Hz  
phasemargincanoffermorestabilitywhilelowerphasemar-  
2 π RO (CC +CF )  
gincanyieldfastertransientresponse. Typically, Φ 60°  
m
1
is optimal for minimizing transient response time while  
Hz  
allowing sufficient margin to account for component vari-  
2 π RC CC  
ability. Φ is the phase boost of Z1, P2, and P5 while Φ is  
1
2
1
ESR Zero: Z2 =  
RHP Zero: Z3 =  
Hz  
the phase boost of Z5 and P4. Select Φ and Φ such that  
1
2
2 π RESR COUT  
VOUT  
1.2V  
V
2 RL  
2 π VOUT2 L  
Φ1 74°; Φ2 2 tan1  
90° and  
IN  
Hz  
ƒ
Z3  
C   
Φ1 + Φ2 = Φm + tan1  
ƒOSC  
3
High Frequency Pole: P3 >  
1
where V  
is in V and ƒ and Z3 are in kHz.  
C
OUT  
Phase Lead Zero: Z4 =  
Hz  
2 π (R1+RPL )CPL  
Setting Z1, P5, Z4, and P4 such that  
ƒC ƒC  
1
Phase Lead Pole: P4 =  
Hz  
Z1=  
, P5 = ƒC a1, Z4 =  
, P4 = ƒC a2  
R1R2  
R1+R2  
2 π •  
+R  
C  
PL  
a1  
a2  
PL   
allows a and a to be determined using Φ and Φ  
Error Amplifier Filter Pole:  
1
2
1
2
1
Φ + 90°  
Φ +90°  
a1 = tan2  
, a = tan2  
1
2
P5 =  
Hz  
2
2
2
CC CF  
2 π RC •  
C +C  
F   
C
3122f  
15  
LTC3122  
applicaTions inForMaTion  
The compensation will force the converter gain G  
Once the compensation values have been calculated, ob-  
taining a converter bode plot is strongly recommended to  
verify calculations and adjust values as required.  
BOOST  
to unity at ƒ by using the following expression for C :  
C
C
3
10 g R2 G  
a 1  
a
2
(
)
ma  
1
ƒC  
C =  
pF  
Using the circuit in Figure 5 as an example, Table 3 shows  
the parameters used to generate the bode plot shown in  
Figure 6.  
C
2π ƒ R1+ R2  
a
1
(
)
C
(g in µS, ƒ in kHz, G in V/V)  
ma  
C
ƒC  
Table 3. Bode Plot Parameters for Type II Compensation  
Once C is calculated, R and C are determined by:  
C
C
F
PARAMETER  
VALUE  
5
UNITS  
V
COMMENT  
App Specific  
App Specific  
App Specific  
App Specific  
App Specific  
App Specific  
Adjustable  
Adjustable  
Adjustable  
Fixed  
106 a1  
2π ƒC CC  
V
IN  
RC =  
kC in kHz, CC in pF)  
V
OUT  
12  
V
R
C
15  
Ω
L
CC  
a1 1  
22  
µF  
CF =  
OUT  
R
ESR  
5
mΩ  
µH  
MHz  
kΩ  
kΩ  
µS  
MΩ  
S
L
ƒ
3.3  
1
The values of the phase lead components are given by  
the expressions:  
OSC  
R1  
R2  
g
1020  
113  
95  
R1R2  
R1+R2  
a2 1  
R1a •  
2
ma  
RPL  
CPL  
=
kand  
R
O
10  
Fixed  
g
mp  
3.4  
80  
Fixed  
106 a 1 R1+R2  
(
)
)
pF  
(
2
%
App Specific  
Adjustable  
Adjustable  
Adjustable  
Optional  
η
=
2π ƒC R12 a2  
R
210  
390  
10  
kΩ  
pF  
C
C
F
C
C
where R1, R2, and R are in kΩ and ƒ is in kHz.  
PL  
C
pF  
R
0
kΩ  
pF  
PL  
PL  
Note that selecting Φ = 0° forces a = 1, and so the  
2
2
C
0
Optional  
converter will have Type II compensation and therefore  
no feedforward: R is open (infinite impedance) and C  
PL  
PL  
From Figure 6, the phase is 60° when the gain reaches  
0dB, so the phase margin of the converter is 60°. The  
crossover frequency is 15kHz, which is more than three  
times lower than the 108.4kHz frequency of the RHP zero  
to achieve adequate phase margin.  
= 0pF. If a = 0.833 • V  
(its maximum), feedforward is  
PL  
2
OUT  
maximized; R = 0 and C is maximized for this com-  
PL  
pensation method.  
3122f  
16  
LTC3122  
applicaTions inForMaTion  
L1  
3.3µH  
V
IN  
5V  
SW  
V
OUT  
V
V
OUT  
12V  
IN  
800mA  
LTC3122  
C1  
100nF  
C
IN  
SD  
OFF ON  
4.7µF  
R1  
1.02M  
BURST PWM  
PWM/SYNC  
RT  
CAP  
FB  
C
OUT  
22µF  
R2  
113k  
V
V
C
CC  
R
R
T
C
SGND  
PGND  
C
57.6k  
210k  
F
10pF  
C
C
390pF  
C
VCC  
4.7µF  
3122 F05a  
Transient Response with 400mA  
to 800mA Load Step  
Switching Waveforms with 800mA Load  
V
OUT  
100mV/DIV  
AC-COUPLED  
V
OUT  
500mV/DIV  
AC-COUPLED  
SW  
10V/DIV  
INDUCTOR  
CURRENT  
1A/DIV  
I
LOAD  
500mA/DIV  
3122 F05b  
3122 F05c  
200ns/DIV  
100µs/DIV  
Figure 5. 1MHz, 5V to 12V, 800mA Boost Converter  
170  
150  
130  
110  
90  
180  
140  
100  
60  
PHASE  
20  
70  
–20  
–60  
–100  
–140  
–180  
–220  
50  
30  
GAIN  
10  
10  
–10  
–30  
0.01  
0.1  
1
100  
1000  
FREQUENCY (kHz)  
3122 F06  
Figure 6. Bode Plot for Example Converter  
3122f  
17  
LTC3122  
applicaTions inForMaTion  
L1  
3.3µH  
V
IN  
5V  
V
OUT  
SW  
V
V
OUT  
12V  
IN  
800mA  
C1  
100nF  
LTC3122  
C
IN  
SD  
OFF ON  
R
PL  
4.7µF  
604k  
BURST PWM  
PWM/SYNC  
CAP  
FB  
1.02M  
C
PL  
10pF  
C
OUT  
22µF  
RT  
V
V
C
CC  
R2  
113k  
SGND  
PGND  
R
R
T
57.6k  
C
C
F
127k  
33pF  
C
C
C
VCC  
4.7µF  
220pF  
3122 F06  
Figure 7. Boost Converter with Phase Lead  
The circuit in Figure 7 shows the same application as  
that in Figure 5 with Type III compensation. This is ac-  
From Figure 8, the phase margin is still optimized at 60°  
and the crossover frequency remains 15kHz. Adding C  
PL  
complished by adding C and R and adjusting C , C ,  
and R provides some feedforward signal in Burst Mode  
PL  
PL  
C
F
PL  
and R accordingly. Table 4 shows the parameters used  
operation, leading to lower output voltage ripple.  
C
to generate the bode plot shown in Figure 8.  
170  
150  
130  
110  
90  
180  
140  
100  
60  
Table 4. Bode Plot Parameters for Type III Compensation  
PARAMETER  
VALUE  
5
UNITS  
V
COMMENT  
App Specific  
App Specific  
App Specific  
App Specific  
App Specific  
App Specific  
Adjustable  
Adjustable  
Adjustable  
Fixed  
PHASE  
V
V
IN  
12  
V
OUT  
20  
R
15  
Ω
L
70  
–20  
–60  
–100  
–140  
–180  
–220  
C
22  
µF  
OUT  
50  
GAIN  
R
L
5
mΩ  
µH  
MHz  
kΩ  
kΩ  
µS  
MΩ  
S
ESR  
30  
3.3  
1
10  
–10  
ƒ
OSC  
–30  
R1  
R2  
113  
1020  
95  
0.01  
0.1  
1
10  
100  
1000  
FREQUENCY (kHz)  
3122 F08  
g
ma  
Figure 8. Bode Plot Showing Phase Lead  
R
10  
Fixed  
O
g
3.4  
80  
Fixed  
mp  
%
App Specific  
Adjustable  
Adjustable  
Adjustable  
Adjustable  
Adjustable  
η
R
127  
220  
33  
kΩ  
pF  
C
C
F
C
C
pF  
R
604  
10  
kΩ  
pF  
PL  
C
PL  
3122f  
18  
LTC3122  
Typical applicaTions  
Single Li-Cell to 6V, 5W Synchronous Boost Converter for RF Transmitter  
L1  
3.3µH  
V
IN  
2.5V TO 4.2V  
V
= 3.6V  
SW  
IN  
V
OUT  
V
V
V
OUT  
6V  
IN  
OUT  
500mV/DIV  
833mA  
LTC3122  
C1  
100nF  
C
IN  
SD  
OFF ON  
AC-COUPLED  
4.7µF  
R1  
487k  
PWM/SYNC  
RT  
CAP  
FB  
C
OUT  
22µF  
833mA  
R2  
121k  
V
V
C
CC  
OUTPUT  
CURRENT  
500mA/DIV  
80mA  
80mA  
R
R
T
C
SGND  
PGND  
C
57.6k  
73.2k  
F
47pF  
C
C
560pF  
C
3122 TA02b  
VCC  
4.7µF  
100µs/DIV  
C
, C : 4.7µF, 16V, X7R, 1206  
3122 TA02a  
IN VCC  
C1: 100nF, 16V, X7R, 1206  
C
: 22µF, 16V, X7R, 1812  
OUT  
L1: TDK SPM6530T-3R3M  
2 AA Cell to 12V Synchronous Boost Converter, 180mA  
L1  
3.3µH  
V
IN  
1.8V TO 3V  
2.3  
100  
90  
80  
70  
60  
50  
40  
30  
20  
10  
0
SW  
V
OUT  
12V  
2.1  
1.9  
1.7  
1.5  
1.3  
1.1  
0.9  
0.7  
0.5  
V
V
OUT  
IN  
180mA  
LTC3122  
C1  
SD  
OFF ON  
100nF  
R1  
C
IN  
PWM/SYNC  
RT  
CAP  
FB  
1.02M  
4.7µF  
C
OUT  
22µF  
R2  
113k  
V
V
C
CC  
R
R
T
C
SGND  
PGND  
57.6k  
200k  
C
F
10pF  
C
VCC  
4.7µF  
C
C
560pF  
EFFICIENCY  
INPUT CURRENT  
C
, C : 4.7µF, 16V, X7R, 1206  
3122 TA03a  
1.6 1.8  
2
2.2 2.4 2.6 2.8  
(V)  
3
3.2  
IN VCC  
C1: 100nF, 16V, X7R, 1206  
: 22µF, 25V, X7R, 1812  
V
IN  
C
3122 TA03b  
OUT  
L1: TDK SPM6530T-3R3M  
3122f  
19  
LTC3122  
Typical applicaTions  
3.3V to 12V Synchronous Boost Converter with Output Disconnect, 500mA  
L1  
3.3µH  
V
IN  
3.3V  
SW  
V
OUT  
V
V
OUT  
12V  
IN  
500mA  
LTC3122  
C1  
100nF  
SD  
OFF ON  
R1  
1.02M  
C
IN  
PWM/SYNC  
RT  
CAP  
FB  
SW  
5V/DIV  
4.7µF  
C
OUT  
22µF  
R2  
113k  
V
V
C
INDUCTOR  
CURRENT  
1A/DIV  
CC  
R
R
T
C
SGND  
PGND  
57.6k  
232k  
C
F
10pF  
C
VCC  
4.7µF  
C
C
3122 TA04b  
500ns/DIV  
470pF  
C
, C : 4.7µF, 16V, X7R, 1206  
3122 TA04a  
IN VCC  
C1: 100nF, 16V, X7R, 1206  
C
: 22µF, 25V, X7R, 1812  
OUT  
L1: TDK SPM6530T-3R3M  
USB/Battery Powered Synchronous Boost Converter, 4.3V to 5V, 1A  
L1  
3.3µH  
V
IN  
4.3V TO 5.5V  
V
= 4.3V  
SW  
IN  
V
5V  
1A  
OUT  
V
V
OUT  
IN  
V
OUT  
LTC3122  
C1  
100nF  
500mV/DIV  
SD  
OFF ON  
AC-COUPLED  
R1  
383k  
C
IN  
PWM/SYNC  
RT  
CAP  
FB  
4.7µF  
C
OUT  
100µF  
1A  
R2  
121k  
OUTPUT  
CURRENT  
500mA/DIV  
V
V
C
CC  
100mA  
R
R
C
T
SGND  
PGND  
57.6k  
43.2k  
C
F
68pF  
C
VCC  
4.7µF  
C
C
3122 TA05b  
200µs/DIV  
1000pF  
C
, C : 4.7µF, 16V, X7R, 1206  
3122 TA05a  
IN VCC  
C1: 100nF, 16V, X7R, 1206  
: 100µF, 16V, X7R, 1812  
C
OUT  
L1: TDK SPM6530T-3R3M  
3122f  
20  
LTC3122  
Typical applicaTions  
5V to Dual Output Synchronous Boost Converter, 15V  
C2  
470nF  
L1  
3.3µH  
V
IN  
–15.1  
–15.0  
–14.9  
–14.8  
–14.7  
–14.6  
–14.5  
–14.4  
–14.3  
–14.2  
–14.1  
15.1  
5V  
15.0  
SW  
V
OUT1  
14.9  
V
OUT1  
V
V
OUT  
IN  
15V  
LTC3122  
C1  
100nF  
OFF ON  
U1  
14.8  
14.7  
14.6  
14.5  
14.4  
14.3  
14.2  
14.1  
SD  
R1  
C
C
IN  
PWM/SYNC  
RT  
CAP  
FB  
OUT1  
22µF  
1.3M  
4.7µF  
R2  
113k  
V
V
CC  
C
V
OUT2  
V
OUT2  
R
R
C
T
SGND  
PGND  
–15V  
57.6k  
365k  
C
F
C
Z1  
OUT2  
10pF  
C
VCC  
4.7µF  
C
C
47µF  
150pF  
0
50  
100  
150  
200  
C
C
, C : 4.7µF, 16V, X7R, 1206  
: 47µF, 25V, X7R, 1206  
C1: 100nF, 16V, X7R, 1206  
: 22µF, 25V, X7R, 1812  
C2: 470nF, 25V, X7R, 1206  
L1: TDK SPM6530T-3R3M  
3122 TA06a  
IN VCC  
OUTPUT CURRENT (mA)  
3122 TA06b  
OUT2  
C
OUT1  
U1: CENTRAL SEMICONDUCTOR CBAT54S  
Z1: DIODES, INC. DDZ16ASF-7  
Single Li-Cell 3-LED Driver, 2.5V/4.2V to 350mA  
L1  
3.3µH  
V
IN  
2.5V TO  
4.2V  
SW  
V
IN  
= 3.6V  
V
V
OUT  
IN  
LTC3122  
D1  
D2  
D3  
C1  
SD  
OFF ON  
SD  
100nF  
5V/DIV  
C
IN  
C
OUT1  
22µF  
V
PWM/SYNC  
RT  
CAP  
FB  
CC  
4.7µF  
LT1006  
+
V
V
C
CC  
R
LED  
CURRENT  
100mA/DIV  
S
0.1Ω  
R
R
C
2k  
T
SGND  
PGND  
57.6k  
C
VCC  
C
R1  
1.02M  
R2  
30.9k  
C
3122 TA07b  
4.7µF  
2ms/DIV  
3.9nF  
C
, C : 4.7µF, 6V, X7R, 1206  
3122 TA07a  
IN VCC  
C1: 100nF, 6V, X7R, 1206  
: 22µF, 16V, X7R, 1812  
C
OUT  
L1: TDK SPM6530T-3R3M  
D1, D2, D3: CREE XPGWHT-L1-0000-00G51  
3122f  
21  
LTC3122  
package DescripTion  
DE/UE Package  
12-Lead Plastic DFN (4mm × 3mm)  
(Reference LTC DWG # 05-08-1695 Rev D)  
0.70 ±0.05  
3.30 ±0.05  
3.60 ±0.05  
2.20 ±0.05  
1.70 ± 0.05  
PACKAGE OUTLINE  
0.25 ± 0.05  
0.50 BSC  
2.50 REF  
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS  
APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED  
0.40 ± 0.10  
4.00 ±0.10  
(2 SIDES)  
R = 0.115  
TYP  
7
12  
R = 0.05  
TYP  
3.30 ±0.10  
3.00 ±0.10  
(2 SIDES)  
1.70 ± 0.10  
PIN 1  
TOP MARK  
(NOTE 6)  
PIN 1 NOTCH  
R = 0.20 OR  
0.35 × 45°  
CHAMFER  
(UE12/DE12) DFN 0806 REV D  
6
1
0.25 ± 0.05  
0.75 ±0.05  
0.200 REF  
0.50 BSC  
2.50 REF  
BOTTOM VIEW—EXPOSED PAD  
0.00 – 0.05  
NOTE:  
1. DRAWING PROPOSED TO BE A VARIATION OF VERSION  
(WGED) IN JEDEC PACKAGE OUTLINE M0-229  
2. DRAWING NOT TO SCALE  
3. ALL DIMENSIONS ARE IN MILLIMETERS  
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE  
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE  
5. EXPOSED PAD SHALL BE SOLDER PLATED  
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION  
ON THE TOP AND BOTTOM OF PACKAGE  
3122f  
22  
LTC3122  
package DescripTion  
MSE Package  
12-Lead Plastic MSOP, Exposed Die Pad  
(Reference LTC DWG # 05-08-1666 Rev F)  
BOTTOM VIEW OF  
EXPOSED PAD OPTION  
2.845 ±0.102  
(.112 ±.004)  
2.845 ±0.102  
(.112 ±.004)  
0.889 ±0.127  
(.035 ±.005)  
1
6
0.35  
REF  
1.651 ±0.102  
(.065 ±.004)  
5.23  
(.206)  
MIN  
1.651 ±0.102  
(.065 ±.004)  
3.20 – 3.45  
(.126 – .136)  
0.12 REF  
DETAIL “B”  
CORNER TAIL IS PART OF  
THE LEADFRAME FEATURE.  
FOR REFERENCE ONLY  
NO MEASUREMENT PURPOSE  
DETAIL “B”  
12  
7
0.65  
(.0256)  
BSC  
0.42 ±0.038  
4.039 ±0.102  
(.159 ±.004)  
(NOTE 3)  
(.0165 ±.0015)  
TYP  
0.406 ±0.076  
RECOMMENDED SOLDER PAD LAYOUT  
(.016 ±.003)  
12 11 10 9 8 7  
REF  
DETAIL “A”  
0.254  
(.010)  
3.00 ±0.102  
(.118 ±.004)  
(NOTE 4)  
0° – 6° TYP  
4.90 ±0.152  
(.193 ±.006)  
GAUGE PLANE  
0.53 ±0.152  
(.021 ±.006)  
1
2 3 4 5 6  
DETAIL “A”  
0.86  
(.034)  
REF  
1.10  
(.043)  
MAX  
0.18  
(.007)  
SEATING  
PLANE  
0.22 – 0.38  
(.009 – .015)  
TYP  
0.1016 ±0.0508  
(.004 ±.002)  
MSOP (MSE12) 0911 REV F  
0.650  
(.0256)  
BSC  
NOTE:  
1. DIMENSIONS IN MILLIMETER/(INCH)  
2. DRAWING NOT TO SCALE  
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.  
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE  
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.  
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE  
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX  
6. EXPOSED PAD DIMENSION DOES INCLUDE MOLD FLASH. MOLD FLASH ON E-PAD SHALL  
NOT EXCEED 0.254mm (.010") PER SIDE.  
3122f  
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.  
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-  
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.  
23  
LTC3122  
Typical applicaTion  
Dual Supercapacitor Backup Power Supply, 0.5V to 5V  
L1  
3.3µH  
V
IN  
0.5V TO 5V  
V
OUT  
SW  
V
V
OUT  
IN  
V
OUT  
5V  
20mV/DIV  
AC-COUPLED  
C1  
100nF  
LTC3122  
SC1  
50F  
OFF ON  
SD  
SW  
R1  
383k  
SC2  
50F  
5V/DIV  
PWM/SYNC  
RT  
CAP  
FB  
C
OUT  
100µF  
C
IN  
V
V
C
R2  
121k  
4.7µF  
CC  
INDUCTOR  
CURRENT  
500mA/DIV  
R
T
R
C
SGND  
PGND  
57.6k  
43.2k  
C
F
C
VCC  
4.7µF  
68pF  
C
1nF  
C
3122 TA08b  
500ns/DIV  
OUTPUT CURRENT = 50mA  
V
IN  
= 0.5V  
C
, C : 4.7µF, 16V, X7R, 1206  
IN VCC  
3122 TA08a  
C1: 100nF, 16V, X7R, 1206  
: 100µF, 16V, X7R, 1812  
C
OUT  
L1: TDK SPM6530T-3R3M  
SC1, SC2: MAXWELL BCAP0050-P270  
relaTeD parTs  
PART NUMBER  
DESCRIPTION  
COMMENTS  
LTC3421  
3A I , 3MHz, Synchronous Step-Up DC/DC Converter  
95% Efficiency, V = 0.5V to 4.5V, V  
SD  
= 5.25V, I = 12μA,  
Q
SW  
IN  
OUT(MAX)  
OUT(MAX)  
OUT(MAX)  
with Output Disconnect  
I
< 1μA, QFN24 Package  
LTC3422  
LTC3112  
LTC3458  
LTC3528  
LTC3539  
LTC3459  
LTC3499  
LTC3115-1  
1.5A I , 3MHz Synchronous Step-Up DC/DC Converter  
95% Efficiency, V = 0.5V to 4.5V, V  
= 5.25V, I = 25μA,  
Q
SW  
IN  
with Output Disconnect  
I
SD  
< 1μA, 3mm × 3mm DFN Package  
2.5A I , 750kHz, Synchronous Buck-Boost DC/DC Converter 95% Efficiency, V = 2.7V to 15V, V  
= 14V, I = 50μA,  
Q
SW  
IN  
with Output Disconnect, Burst Mode Operation  
I
SD  
< 1μA, 4mm × 5mm DFN and TSSOP Packages  
1.4A I , 1.5MHz, Synchronous Step-Up DC/DC Converter/  
93% Efficiency, V = 1.5V to 6V, V  
SD  
= 7.5V, I = 15μA,  
OUT(MAX) Q  
SW  
IN  
Output Disconnect/Burst Mode Operation  
I
< 1μA, DFN12 Package  
1A I , 1MHz, Synchronous Step-Up DC/DC Converter  
94% Efficiency, V = 700mV to 5.25V, V  
= 5.25V, I = 12µA,  
Q
SW  
IN  
OUT(MAX)  
OUT(MAX)  
with Output Disconnect/Burst Mode Operation  
I
SD  
< 1µA, 3mm × 2mm DFN Package  
2A I , 1MHz/2MHz, Synchronous Step-Up DC/DC Converters 94% Efficiency, V = 700mV to 5.25V, V  
= 5.25V, I = 10µA,  
Q
SW  
IN  
with Output Disconnect/Burst Mode Operation  
I
SD  
< 1µA, 3mm × 2mm DFN Package  
70mA I , 10V Micropower Synchronous Boost Converter/  
V
= 1.5V to 5.5V, V  
= 10V, I = 10μA, I < 1μA,  
SW  
IN  
OUT(MAX)  
Q
SD  
Output Disconnect/Burst Mode Operation  
ThinSOT™ Package  
750mA Synchronous Step-Up DC/DC Converters with  
Reverse-Battery Protection  
94% Efficiency, V = 1.8V to 5.5V, V  
= 6V, I = 20µA,  
Q
IN  
OUT(MAX)  
I
SD  
< 1µA, 3mm × 3mm DFN and MSOP Packages  
40V, 2A Synchronous Buck-Boost DC/DC Converter  
95% Efficiency, V = 2.7V to 40V, V  
SD  
= 40V, I = 50µA,  
IN  
OUT(MAX) Q  
I
< 3µA, 4mm × 5mm DFN and TSSOP Packages  
3122f  
LT 0712 • PRINTED IN USA  
LinearTechnology Corporation  
1630 McCarthy Blvd., Milpitas, CA 95035-7417  
24  
ꢀLINEAR TECHNOLOGY CORPORATION 2012  
(408) 432-1900 FAX: (408) 434-0507 www.linear.com  

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