LTC3550EDHC#TRPBF [Linear]
LTC3550 - Dual Input USB/AC Adapter Li-Ion Battery Charger with 600mA Buck Converter; Package: DFN; Pins: 16; Temperature Range: -40°C to 85°C;
| 型号： | LTC3550EDHC#TRPBF |
| 厂家： | 
Linear |
| 描述： | LTC3550 - Dual Input USB/AC Adapter Li-Ion Battery Charger with 600mA Buck Converter; Package: DFN; Pins: 16; Temperature Range: -40°C to 85°C 电池 |
| 文件： | 总24页 (文件大小：312K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LTC3550
Dual Input USB/AC Adapter
Li-Ion Battery Charger with
600mA Buck Converter
U
DESCRIPTIO
FEATURES
TheLTC®3550isastandalonelinearchargerwitha600mA
monolithic synchronous buck converter. It is capable of
chargingasingle-cellLi-Ionbatteryfrombothwalladapter
and USB inputs. The charger automatically selects the
appropriate power source for charging.
■
Charges Single-Cell Li-Ion Battery from Wall
Adapter and USB Inputs
■
Automatic Input Power Detection and Selection
■
Charge Current Programmable Up to 950mA from
Wall Adapter Input
■
Adjustable Output, High Efficiency 600mA
Internal thermal feedback regulates the battery charge
currenttomaintainaconstantdietemperatureduringhigh
power operation or high ambient temperature conditions.
The float voltage is fixed at 4.2V and the charge currents
are programmed with external resistors. The LTC3550
terminates the charge cycle when the charge current
drops below the programmed termination threshold after
the final float voltage is reached. With power applied to
both inputs, the LTC3550 can be put into shutdown mode
reducing the DCIN supply current to 20μA, the USBIN
supply current to 10μA, and the battery drain current to
less than 2μA.
Synchronous DC/DC Converter
■
No External MOSFET, Sense Resistor or Blocking
Diode Needed
■
Thermal Regulation Maximizes Charge Rate Without
Risk of Overheating*
■
Preset Charge Voltage with 0.6ꢀ Accuracy
■
Programmable Charge Current Termination
■
1.5MHz Constant Frequency Operation (Step-Down
Converter)
18μA USB Suspend Current in Shutdown
■
■
“Power Present” Status Output
Charge Status Output
Automatic Recharge
■
■
■
The DC/DC converter switching frequency is internally
set at 1.5MHz, allowing the use of small surface mount
inductors and capacitors.
, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
*Protected by U.S. patents, includng 6522118, 6700364, 6580258, 5481178, 6304066,
6127815, 6498466, 6611131
Available in a Thermally Enhanced, Low Profile
(0.75mm) 16-LeUad (5mm × 3mm) DFN Package
APPLICATIO S
■
Cellular Telephones
U
TYPICAL APPLICATIO
Complete Charge Cycle
(1100mA Battery)
1000
800
Dual Input Battery Charger and DC/DC Converter
600
2.2µH
V
OUT
400
200
0
4.2
4.0
3.8
3.6
3.4
1.2V
SW
600mA
C
OUT
10µF
CONSTANT VOLTAGE
USBIN = 5V
LTC3550
22pF
301k
301k
CER
WALL
DCIN
V
FB
ADAPTER
RUN
T
= 25°C
A
IDC
IUSB
USB
PORT
R
R
= 1.24k
800mA (WALL)
500mA (USB)
USBIN
IUSB
IDC
V
CC
= 2k
1µF
BAT
5.0
2.5
0
2k
1%
4.7µF
ITERM
4.2V
+
1µF
GND
2k
1%
1.24k
1%
SINGLE-CELL
Li-Ion BATTERY
0
0.5
1.0
1.5
2.0
2.5
3.0
TIME (HR)
3550 TA01
3550 TA02
3550fa
1
LTC3550
W W U W
U
W
U
ABSOLUTE AXI U RATI GS
PACKAGE/ORDER I FOR ATIO
(Note 1)
TOP VIEW
DCIN, USBIN.............................................. –0.3V to 10V
USBIN
IUSB
1
2
3
4
5
6
7
8
16 DCIN
15 BAT
14 IDC
13 HPWR
12 EN
⎯
⎯
⎯
⎯
⎯
⎯
⎯
EN, CHRG, PWR, HPWR............................ –0.3V to 10V
BAT, IDC, IUSB, ITERM ................................ –0.3V to 7V
ITERM
PWR
V ............................................................... –0.3V to 6V
CC
RUN, V .....................................................–0.3V to V
17
FB
CC
CHRG
SW (DC)........................................–0.3V to (V + 0.3V)
CC
V
11 RUN
10 SW
FB
DCIN Pin Current (Note 2) ..........................................1A
USBIN Pin Current (Note 2) .................................700mA
BAT Pin Current (Note 2) ............................................1A
P-Channel SW Source Current (DC).....................800mA
N-Channel SW Source Current (DC) ....................800mA
Peak SW Sink and Source Current...........................1.3A
Operating Temperature Range (Note 3) ... –40°C to 85°C
Maximum Junction Temperature .......................... 125°C
Storage Temperature Range................... –65°C to 125°C
V
CC
GND
9
GND
DHC PACKAGE
16-LEAD (5mm × 3mm) PLASTIC DFN
= 125°C, θ = 40°C (NOTE 4)
JA
EXPOSED PAD (PIN 17) IS GND, MUST BE SOLDERED TO PCB
T
JMAX
ORDER PART NUMBER
LTC3550EDHC
DHC PART MARKING
3550
Order Options Tape and Reel: Add #TR
Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF
Lead Free Part Marking: http://www.linear.com/leadfree/
Consult LTC Marketing for parts specified with wider operating temperature ranges.
ELECTRICAL CHARACTERISTICS The
●
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T = 25°C. V
= 5V, V
= 5V, V = 3.6V unless otherwise noted.
USBIN CC
A
DCIN
SYMBOL
PARAMETER
CONDITIONS
MIN
4.3
4.3
2.5
0.4
1.2
0.3
TYP
MAX
8
UNITS
●
●
●
V
V
V
V
Wall Adapter Input Supply Voltage
USB Port Input Supply Voltage
Buck Regulator Input Supply Voltage
EN Input Threshold Voltage
EN Pull-Down Resistance
RUN Threshold Voltage
V
V
DCIN
USBIN
CC
8
5.5
1.0
5
V
0.7
2
V
EN
R
EN
MΩ
V
●
●
V
1
1.5
1
RUN
RUN
I
RUN Leakage Current
⎯ ⎯ ⎯ ⎯
0.01
0.35
0.35
0.7
2
µA
V
V
V
V
CHRG Output Low Voltage
I
= 5mA
= 5mA
0.6
0.6
1
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
CHRG
CHRG
⎯
⎯
⎯
PWR Output Low Voltage
I
V
⎯
⎯
⎯
⎯
⎯
⎯
PWR
PWR
HPWR Input Threshold Voltage
HPWR Pull-Down Resistance
DCIN Undervoltage Lockout Voltage
0.4
1
V
HPWR
●
R
5
MΩ
HPWR
UVDC
V
V
From Low to High
Hysteresis
4.0
4.15
200
4.3
V
mV
USBIN Undervoltage Lockout Voltage
From Low to High
Hysteresis
3.8
3.95
200
4.1
V
mV
UVUSB
V
V
V
– V Lockout Threshold Voltage
V
V
from Low to High, V = 4.2V
140
20
180
50
220
80
mV
mV
ASD-DC
DCIN
BAT
DCIN
DCIN
BAT
from High to Low, V = 4.2V
BAT
V
– V Lockout Threshold
USBIN
Voltage
V
USBIN
V
USBIN
from Low to High, V = 4.2V
140
20
180
50
220
80
mV
mV
ASD-USB
BAT
BAT
from High to Low, V = 4.2V
BAT
3550fa
2
LTC3550
ELECTRICAL CHARACTERISTICS The
●
denotes the specifications which apply over the full operating
= 5V, V = 5V, V = 3.6V unless otherwise noted.
temperature range, otherwise specifications are at T = 25°C. V
A
DCIN
USBIN
CC
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Battery Charger
I
DCIN Supply Current
Charge Mode (Note 5)
Standby Mode
DCIN
●
●
R
= 10k
250
50
20
800
100
40
µA
µA
µA
IDC
Charge Terminated
ENABLE = 5V
Shutdown Mode
I
USBIN Supply Current
Charge Mode (Note 6)
Standby Mode
USBIN
●
●
R
= 10k, V
= 0V
DCIN
250
50
800
100
36
µA
µA
µA
µA
IUSB
Charge Terminated
Shutdown Mode
V
V
= 0V, ENABLE = 0V
18
DCIN
DCIN
Shutdown Mode
> V
10
20
USBIN
V
FLOAT
Regulated Output (Float) Voltage
I
I
= 1mA
4.175
4.158
4.2
4.2
4.225
4.242
V
V
BAT
BAT
= 1mA, 0°C < T < 85°C
A
I
BAT Pin Current
BAT
●
●
●
Constant-Current Mode
Constant-Current Mode
Constant-Current Mode
Standby Mode
R
R
R
= 1.25k
IUSB
= 10k or R
Charge Terminated
Charger Disabled
760
450
93
800
476
100
–3
840
500
107
–6
mA
mA
mA
µA
IDC
= 2.1k
= 10k
IUSB
IDC
Shutdown Mode
Sleep Mode
–1
–2
µA
DCIN = 0V, USBIN = 0V
Constant-Current Mode
Constant-Current Mode
1
2
µA
V
V
IDC Pin Regulated Voltage
0.95
0.95
1.0
1.0
1.05
1.05
V
V
IDC
IUSB Pin Regulated Voltage
IUSB
●
●
●
●
I
Charge Current Termination Threshold
R
ITERM
R
ITERM
R
ITERM
R
ITERM
= 1k
90
45
8.5
4
100
50
10
5
110
55
11.5
6
mA
mA
mA
mA
TERMINATE
= 2k
= 10k
= 20k
I
Trickle Charge Current
V
V
< V ; R = 1.25k
TRIKL IDC
60
30
80
47.5
100
65
mA
mA
TRIKL
BAT
BAT
< V
; R = 2.1k
TRIKL IUSB
V
Trickle Charge Threshold Voltage
V
Rising
2.8
2.9
100
3
V
mV
TRIKL
BAT
Hysteresis
ΔV
Recharge Battery Threshold Voltage
Recharge Comparator Filter Time
Termination Comparator Filter Time
Soft-Start Time
V
V
– V
, 0°C < T < 85°C
65
3
100
6
135
9
mV
ms
ms
µs
RECHRG
FLOAT
RECHRG
A
t
t
t
from High to Low
RECHRG
BAT
BAT
I
I
Drops Below Termination Threshold
= 10ꢀ to 90ꢀ Full-Scale
0.8
175
1.5
250
400
2.2
325
TERMINATE
SS
BAT
R
Power FET On-Resistance (Between
DCIN and BAT)
mΩ
ON-DC
ON-USB
LIM
R
Power FET On-Resistance (Between
USBIN and BAT)
550
105
mΩ
T
Junction Temperature in Constant-
Temperature Mode
°C
Switching Regulator
V
Regulated Feedback Voltage
T = 25°C
0.5880
0.5865
0.5850
0.6
0.6
0.6
0.6120
0.6135
0.6150
V
V
V
FB
A
0°C ≤ T ≤ 85°C
A
●
●
–40°C ≤ T ≤ 85°C
A
ΔV
Reference Voltage Line Regulation
Peak Inductor Current
0.04
1
0.4
ꢀ/V
A
FB
I
PK
V
CC
= 3V, V = 0.5V
0.75
1.25
FB
V
Output Voltage Load Regulation
0.5
ꢀ
LOADREG
3550fa
3
LTC3550
ELECTRICAL CHARACTERISTICS The
●
denotes the specifications which apply over the full operating
= 5V, V = 5V, V = 3.6V unless otherwise noted.
temperature range, otherwise specifications are at T = 25°C. V
A
DCIN
USBIN
CC
SYMBOL
PARAMETER
Supply Current
Active Mode
Sleep Mode
Shutdown
CONDITIONS
MIN
TYP
MAX
UNITS
I
V
(Note 7)
S
CC
V
V
V
= 0.5V, I
= 0A
LOAD
300
20
0.1
400
35
1
µA
µA
µA
FB
= 0.62V, I
= 0A
FB
RUN
LOAD
= 0V, V = 5.5V
CC
f
Oscillator Frequency
V
FB
V
FB
= 0.6V
= 0V
1.2
1.5
210
1.8
MHz
kHz
OSC
Ω
Ω
R
R
R
R
of P-Channel FET
of N-Channel FET
0.4
PFET
NFET
LSW
DS(ON)
0.35
0.01
DS(ON)
I
SW Leakage Current
1
µA
Note 5: Supply Current includes IDC and ITERM pin current (approx-
imately 100μA each) but does not include any current delivered to the
battery through the BAT pin (approximately 100mA).
Note 6: Supply Current includes IUSB and ITERM pin current (approx-
imately 100μA each) but does not include any current delivered to the
battery through the BAT pin (approximately 100mA).
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: Guaranteed by long term current density limitations.
Note 3: The LTC3550E is guaranteed to meet the performance
specifications from 0°C to 85°C. Specifications over the –40°C to 85°C
operating temperature range are assured by design, characterization and
correlation with statistical process controls.
Note 7: Dynamic supply current is higher due to the gate charge being
delivered at the switching frequency.
Note 4: Failure to solder the exposed backside of the package to the PC
board will result in a thermal resistance much higher than 40°C/W. See
Thermal Considerations.
3550fa
4
LTC3550
U W
TYPICAL PERFOR A CE CHARACTERISTICS
T = 25°C, unless otherwise noted.
A
Regulated Charger Output (Float)
Voltage vs Charge Current
Regulated Charger Output (Float)
Voltage vs Temperature
IDC Pin Voltage vs Temperature
(Constant-Current Mode)
4.220
4.215
4.210
4.205
4.200
4.195
4.190
4.185
4.180
1.008
1.006
1.004
1.002
1.000
0.998
0.996
0.994
0.992
4.26
4.24
4.22
4.20
4.18
4.16
4.14
4.12
4.10
V
= V
= 5V
USBIN
V
= V
= 5V
USBIN
DCIN
DCIN
V
= 8V
DCIN
V
= 4.3V
DCIN
R
= 1.25k
R
= R
= 2k
IUSB
IDC
IDC
75
75
–50
–25
0
25
50
100
–50
–25
0
25
50
100
200
0
100
300 400 500 600 700 800
TEMPERATURE (°C)
TEMPERATURE (°C)
CHARGE CURRENT (mA)
3550 G02
3550 G03
3550 G01
IUSB Pin Voltage vs Temperature
(Constant-Current Mode)
IUSB Pin Voltage vs Temperature
(Constant-Current Mode)
Charge Current vs IDC Pin Voltage
900
800
700
600
500
400
300
200
100
0
0.208
0.206
0.204
0.202
0.200
0.198
0.196
0.194
0.192
1.008
1.006
1.004
1.002
1.000
0.998
0.996
0.994
0.992
HPWR = 0V
HPWR = 5V
V
= 5V
DCIN
R
= 1.25k
IDC
R
= 2k
IDC
V
= 8V
USBIN
V
= 8V
USBIN
V
= 4.3V
USBIN
V
= 4.3V
USBIN
R
= 10k
IDC
75
–50
–25
0
50
75
100
–50
–25
0
25
50
100
25
0
0.2
0.4
0.6
(V)
1.0
1.2
0.8
TEMPERATURE (°C)
TEMPERATURE (°C)
V
IDC
3550 G43
3550 G04
3550 G05
Charge Current
vs IUSB Pin Voltage
⎯
⎯
⎯
⎯ ⎯ ⎯ ⎯
CHRG Pin I-V Curve
PWR Pin I-V Curve
35
30
25
20
15
10
5
35
30
25
20
15
10
5
900
800
700
600
500
400
300
200
100
0
V
= V
= 5V
V
= V = 5V
USBIN
V
= 5V
DCIN
USBIN
DCIN
USBIN
T
= –40°C
T = –40°C
A
A
R
= 1.25k
IUSB
T
= 25°C
= 90°C
T
= 25°C
= 90°C
A
A
A
A
T
T
R
= 2k
IUSB
R
= 10k
IUSB
0
0
4
6
7
0
1
2
3
4
5
6
7
0
1
2
3
5
0
0.2
0.4
0.6
1.0
1.2
0.8
V
(V)
V
(V)
CHRG
V
IUSB
(V)
PWR
3550 G07
3550 G08
3550 G06
3550fa
5
LTC3550
U W
TYPICAL PERFOR A CE CHARACTERISTICS
T = 25°C, unless otherwise noted.
A
Charge Current
vs Ambient Temperature
Charge Current
vs DCIN Voltage
Charge Current vs Battery Voltage
1000
800
600
400
200
0
900
800
700
600
500
400
300
1000
800
600
400
200
0
ONSET OF
THERMAL REGULATION
ONSET OF
THERMAL REGULATION
R
= 1.25k
IDC
R
= R
= 2k
IDC
IUSB
= 5V
25
R
V
JA
= 1.25k
= 4V
V
V
θ
= V
USBIN
IDC
BAT
= 40°C/W
V
JA
R
= V
= 5V
USBIN
DCIN
BAT
JA
DCIN
= 4V
θ
= 40°C/W
θ
= 40°C/W
= 1.25k
IDC
4.0
6.0
7.0 7.5
4.5 5.0 5.5
6.5
(V)
8.0
2.4
3.0 3.3 3.6
(V)
3.9 4.2 4.5
2.7
50
100 125
–50 –25
0
75
V
DCIN
V
BAT
TEMPERATURE (°C)
3550 G11
3550 G10
3550 G12
DCIN Power FET On-Resistance
vs Temperature
USBIN Power FET On-Resistance
vs Temperature
EN Pin Threshold Voltage
(On-to-Off) vs Temperature
550
500
450
400
350
300
250
800
750
700
650
600
550
500
450
400
350
900
850
800
750
700
650
600
V
I
= 4V
= 200mA
V
I
= 4V
= 200mA
BAT
BAT
BAT
BAT
V
= V
= 5V
USBIN
DCIN
50
TEMPERATURE (°C)
100 125
–50 –25
0
25
75
50
TEMPERATURE (°C)
100 125
–50 –25
0
25
75
50
TEMPERATURE (°C)
100
–50 –25
0
25
75
3550 G13
3550 G14
3550 G15
HPWR Pin Threshold Voltage
(Rising) vs Temperature
DCIN Shutdown Current
vs Temperature
USBIN Shutdown Current
vs Temperature
50
45
40
35
30
25
20
15
10
5
45
40
35
30
25
20
15
10
5
900
850
800
750
700
650
600
V
= V
= 5V
USBIN
DCIN
V
V
= 8V
= 5V
DCIN
DCIN
V
V
= 8V
= 5V
USBIN
USBIN
V
= 4.3V
DCIN
V
= 4.3V
USBIN
ENABLE = 5V
50 100
TEMPERATURE (°C)
ENABLE = 0V
50 100
TEMPERATURE (°C)
0
0
–50 –25
0
25
75
–50
25
75
–25
0
50
TEMPERATURE (°C)
100
–50 –25
0
25
75
3550 G16
3550 G17
3550 G44
3550fa
6
LTC3550
U W
TYPICAL PERFOR A CE CHARACTERISTICS
T = 25°C, unless otherwise noted.
A
Undervoltage Lockout Threshold
vs Temperature
HPWR Pin Pull-Down Resistance
vs Temperature
EN Pin Pull-Down Resistance
vs Temperature
2.8
2.6
2.4
2.2
2.0
1.8
1.6
2.8
2.6
2.4
2.2
2.0
1.8
1.6
4.25
4.20
4.15
4.10
4.05
4.00
3.95
3.90
3.85
DCIN UVLO
USBIN UVLO
75
–50
–25
0
25
50
100
50
TEMPERATURE (°C)
100
–50 –25
0
25
75
50
TEMPERATURE (°C)
100
–50 –25
0
25
75
TEMPERATURE (°C)
3550 G45
3550 G19
3550 G18
Charge Current During Turn-On
and Turn-Off
Recharge Threshold Voltage
vs Temperature
Battery Drain Current
vs Temperature
5
4
4.16
4.14
4.12
4.10
4.08
4.06
4.04
V
V
= 4.2V
DCIN USBIN
BAT
, V
(NOT CONNECTED)
I
BAT
500mA/DIV
3
V
= V
= 4.3V
USBIN
DCIN
2
V
= V
= 8V
USBIN
DCIN
ENABLE
5V/DIV
1
0
–1
V = 5V
DCIN
100µs/DIV
–50
0
25
50
75
100
–25
75
–50
–25
0
25
50
100
R
= 1.25k
IDC
TEMPERATURE (°C)
TEMPERATURE (°C)
3550 G22
3550 G21
3550 G20
Buck Regulator Efficiency
vs Output Current
Buck Regulator Efficiency
vs Output Current
Buck Regulator Efficiency
vs V
CC
95
90
85
80
75
70
65
60
100
95
90
85
80
75
70
65
60
55
50
95
90
85
80
75
70
65
60
V
= 1.5V
V
= 1.8V
OUT
OUT
I
= 100mA
OUT
I
= 10mA
OUT
V
= 2.7V
CC
V
= 2.7V
CC
I
= 1mA
OUT
V
= 4.2V
CC
V
= 4.2V
I
= 600mA
CC
OUT
V
= 3.6V
V
= 3.6V
CC
CC
I
= 0.1mA
OUT
V
= 1.8V
3
OUT
0.1
1
10
100
1000
2
4
(V)
5
6
0.1
1
10
100
1000
OUTPUT CURRENT (mA)
OUTPUT CURRENT (mA)
V
CC
3550 G25
3550 G24
3550 G23
3550fa
7
LTC3550
U W
TYPICAL PERFOR A CE CHARACTERISTICS
T = 25°C, unless otherwise noted.
A
Oscillator Frequency
vs Temperature
1.70
Buck Regulator Reference
Voltage vs Temperature
Buck Regulator Efficiency
vs Output Current
0.614
0.609
0.604
0.599
0.594
0.589
0.584
100
95
90
85
80
75
70
65
60
V
= 2.5V
V
= 3.6V
OUT
V
= 3.6V
CC
CC
1.65
1.60
1.55
1.50
1.45
1.40
1.35
1.30
V
= 2.7V
CC
V
= 3.6V
CC
V
= 4.2V
CC
50
TEMPERATURE (°C)
100 125
–50 –25
0
25
75
50
TEMPERATURE (°C)
100 125
–50 –25
0
25
75
0.1
1
10
100
1000
OUTPUT CURRENT (mA)
3550 G26
3550 G28
3550 G27
Buck Regulator Output Voltage
vs Load Current
R
vs V
CC
Oscillator Frequency vs V
DS(ON)
CC
1.844
1.834
1.824
1.814
1.804
1.794
1.784
1.774
1.8
1.7
1.6
1.5
1.4
1.3
1.2
0.7
V
= 3.6V
CC
0.6
0.5
0.4
0.3
0.2
0.1
MAIN
SWITCH
SYNCHRONOUS
SWITCH
0
2
3
4
5
6
0
100
900
200 300 400 500 600 700 800
LOAD CURRENT (mA)
5
7
0
1
2
3
4
6
V
(V)
CC
V
(V)
CC
3550 G29
3550 G30
3550 G31
Buck Regulator Switches R
vs Temperature
Buck Regulator Supply
Current vs V
Buck Regulator Supply Current
vs Temperature
DS(0N)
CC
50
45
40
35
30
25
20
15
10
5
0.7
0.6
50
45
40
35
30
25
20
15
10
5
V
V
LOAD
= 3.6V
V
I
= 1.875V
= 0A
CC
OUT
LOAD
V
= 2.7V
CC
= 1.875V
OUT
I
= 0A
V
= 3.6V
CC
V
= 4.2V
CC
0.5
0.4
0.3
0.2
0.1
MAIN SWITCH
SYNCHRONOUS SWITCH
0
0
0
50
TEMPERATURE (°C)
100 125
–50
0
25
50
75
125
–50 –25
0
25
75
–25
100
2
3
4
5
6
TEMPERATURE (°C)
V
(V)
CC
3550 G32
3550 G34
3550 G33
3550fa
8
LTC3550
U W
TYPICAL PERFOR A CE CHARACTERISTICS
T = 25°C, unless otherwise noted.
A
Switch Leakage Current
vs Temperature
Switch Leakage Current vs V
CC
300
250
200
150
120
100
80
60
40
20
0
V
= 5.5V
RUN = 0V
CC
RUN = 0V
SYNCHRONOUS
SWITCH
MAIN
SWITCH
100
50
0
MAIN SWITCH
SYNCHRONOUS SWITCH
50
TEMPERATURE (°C)
100 125
–50 –25
0
25
75
0
2
3
4
5
6
1
V
(V)
CC
3550 G35
3550 G36
Burst Mode Operation
Start-Up from Shutdown
Load Step
RUN
V
OUT
SW
2V/DIV
100mV/DIV
5V/DIV
AC COUPLED
V
OUT
1V/DIV
V
OUT
I
L
100mV/DIV
500mA/DIV
AC COUPLED
I
LOAD
I
L
I
500mA/DIV
LOAD
200mA/DIV
500mA/DIV
3550 G39
3550 G38
3550 G37
V
V
= 3.6V
20µs/DIV
V
V
I
= 3.6V
= 1.8V
LOAD
40µs/DIV
CC
V
V
I
= 3.6V
= 1.8V
LOAD
4µs/DIV
CC
OUT
CC
OUT
= 1.8V
OUT
LOAD
I
= 0mA TO 600mA
= 600mA
= 50mA
Load Step
Load Step
Load Step
V
V
OUT
V
OUT
OUT
100mV/DIV
100mV/DIV
100mV/DIV
AC COUPLED
AC COUPLED
AC COUPLED
I
L
I
L
I
L
500mA/DIV
500mA/DIV
500mA/DIV
I
LOAD
I
I
LOAD
LOAD
500mA/DIV
500mA/DIV
500mA/DIV
3550 G41
3550 G40
3550 G42
V
V
I
= 3.6V
= 1.8V
LOAD
20µs/DIV
V
V
I
= 3.6V
= 1.8V
LOAD
20µs/DIV
CC
OUT
V
V
I
= 3.6V
= 1.8V
LOAD
20µs/DIV
CC
OUT
CC
OUT
= 100mA TO 600mA
= 50mA TO 600mA
= 200mA TO 600mA
3550fa
9
LTC3550
U
U
U
PI FU CTIO S
V
(Pin 6): Voltage Feedback Pin. Receives the feedback
USBIN (Pin 1): USB Input Supply Pin. Provides power to
thebatterycharger.Themaximumsupplycurrentis650mA.
This should be bypassed with a 1µF capacitor.
FB
voltage from an external resistor divider across the buck
regulator output.
V
(Pin 7): Buck Regulator Input Supply Pin. Must be
IUSB (Pin 2): USB Charge Current Program and Monitor
CC
closely decoupled to GND (Pins 8, 9) with a 2.2µF or
Pin. The charge current can be set by connecting a resis-
greater ceramic capacitor.
tor, R , to ground. When charging in constant-current
IUSB
mode, this pin servos to 1V. The voltage on this pin can
be used to measure the charge current delivered from the
USB input using the following formula:
GND (Pins 8, 9): Ground.
SW (Pin 10): Buck Regulator Switch Node Connection to
Inductor. This pin connects to the drains of the internal
main (top) and synchronous (bottom) power MOSFET
switches.
V
IUSB
IBAT
=
• 1000
RIUSB
RUN (Pin 11): Buck Regulator Run Control Input. Forcing
this pin above 1.5V enables the regulator. Forcing this pin
below 0.3V shuts it down. In shutdown, all buck regulator
functions are disabled drawing <1µA supply current from
ITERM (Pin 3): Termination Current Threshold Program
Pin. The current termination threshold, I
, can be
TERMINATE
setbyconnectingaresistor,R
,toground.I
ITERM
TERMINATE
is set by the following formula:
V . Do not leave RUN floating.
CC
100V
RITERM
ITERMINATE
=
EN (Pin 12): Charger Enable Input. A logic low on this pin
enables the charger. If this input is left floating, an internal
2MΩ pull-down resistor defaults the LTC3550 to charge
mode. Pull this pin high to disable the charger.
When the charge current, I , falls below the termination
BAT
⎯
⎯
⎯
⎯
threshold, charging stops and the CHRG output becomes
high impedance.
HPWR (Pin 13): USB High/Low Power Mode Select Input.
Used to control the amount of current drawn from the
USB port. A logic high on the HPWR pin sets the charge
current to 100ꢀ of the current programmed by the IUSB
pin. A logic low on the HPWR pin sets the charge current
to 20ꢀ of the current programmed by the IUSB pin. An
internal 2MΩ pull-down resistor defaults the charger to
its low current state.
This pin is internally clamped to approximately 1.5V. Driv-
ing this pin to voltages beyond the clamp voltage should
be avoided.
⎯
⎯
⎯
PWR (Pin 4): Open-Drain Power Supply Status Output.
When the DCIN or USBIN pin voltage is sufficient to
begin charging (i.e., when the supply is greater than
the undervoltage lockout threshold and at least 180mV
⎯
⎯
⎯
above the battery terminal), the PWR pin is pulled low by
IDC (Pin 14): Wall Adapter Charge Current Program and
⎯
⎯
⎯
an internal N-channel MOSFET. Otherwise, PWR is high
impedance. The output is capable of sinking up to 10mA,
making it suitable for driving an LED.
Monitor Pin. The charge current is set by connecting a
resistor, R , to ground. When charging in constant-
IDC
current mode, this pin servos to 1V. The voltage on this
pin can be used to measure the charge current using the
following formula:
⎯ ⎯ ⎯ ⎯
CHRG (Pin 5): Open-Drain Charge Status Output. When
⎯ ⎯ ⎯ ⎯
the LTC3550 is charging, the CHRG pin is pulled low by
an internal N-channel MOSFET. When the charge cycle is
V
RIDC
IDC
IBAT
=
• 1000
⎯
⎯
⎯
⎯
completed, CHRG becomes high impedance. This output
is capable of sinking up to 10mA, making it suitable for
driving an LED.
BAT (Pin 15): Charger Output. This pin provides charge
current to the battery and regulates the final float voltage
to 4.2V.
3550fa
10
LTC3550
U
U
U
PI FU CTIO S
DCIN (Pin 16): Wall Adapter Input Supply Pin. Provides
power to the battery charger. The maximum supply
current is 950mA. This should be bypassed with a 1µF
capacitor.
Exposed Pad (Pin 17): GND. The exposed backside of the
packageisgroundandmustbesolderedtothePCBground
for electrical connection and maximum heat transfer.
W
BLOCK DIAGRA
DCIN
16
BAT
15
USBIN
1
CC/CV
REGULATOR
CC/CV
REGULATOR
FREQ
SHIFT
V
6
OSC
FB
SLOPE
COMP
+
–
+
–
13
4
HPWR
PWR
+
–
0.6V
R
I
HPWR
TH
DC
SOFT-
START
USB
EA
4.15V
3.95V
BAT
SOFT-
START
BURST
CLAMP
DCIN UVLO
USBIN UVLO
10mA MAX
10mA MAX
+
–
+
–
V
7
CC
BAT
CHRG
5
5Ω
+
–
I
COMP
4.1V
+
Q
Q
S
R
RECHARGE
LOGIC
–
RECHRG
RS LATCH
ANTI-
SHOOT-
THRU
BAT
SW
10
SWITCHING
LOGIC
TRICKLE
–
+
DC_ENABLE
USB_ENABLE
T
+
DIE
AND
THERMAL
REGULATION
TRICKLE
CHARGE
CHARGER CONTROL
BLANKING
CIRCUIT
+
–
TERM
105°C
–
2.9V
I
RCMP
EN
12
100mV
+
R
EN
I
I
I
BAT
BAT
BAT
/1000
/1000
/1000
TERMINATION
–
3
14
2
11
3550 BD
RUN
8, 9, 17
GND
ITERM
IDC
IUSB
R
R
R
IUSB
ITERM
IDC
3550fa
11
LTC3550
U
OPERATIO
The LTC3550 consists of two main blocks: a lithium-ion
battery charger and a high-efficiency buck converter that
can be powered from the battery. The charger is designed
to efficiently manage charging of a single-cell lithium-ion
battery from two separate power sources: a wall adapter
and USB power bus. The internal P-channel MOSFETs
can supply up to 950mA from the wall adapter source
and 500mA from the USB power source. The final float
voltage accuracy is 0.6ꢀ.
Lithium-Ion Battery Charger
AchargecyclebeginswhenthevoltageateithertheDCINpin
or USBIN pin rises above the UVLO threshold level and the
chargerisenabledthroughtheENpin.Wheneitherinputis
supplyingpower,logiclowenablesthechargerandlogichigh
disables it (a 2MΩ pull-down defaults the charger to the
charging state). The DCIN input draws 20µA when the
charger is in shutdown. The USBIN input draws 18µA
duringshutdownifnopowerisappliedtoDCIN, butdraws
The buck converter uses a constant frequency, current
mode step-down architecture. Both the main (P-channel
MOSFET)andsynchronous(N-channelMOSFET)switches
for the buck converter are internal. The LTC3550 requires
no external diodes or sense resistors.
only 10µA when V
> V
.
DCIN
USBIN
Once the charger is enabled, it enters constant-current
mode, where the programmed charge current is supplied
to the battery. When the BAT pin approaches the final
float voltage (4.2V), the charger enters constant-voltage
STARTUP
DCIN POWER APPLIED
ONLY USB POWER APPLIED
POWER SELECTION
USBIN POWER
REMOVED OR
DCIN POWER
APPLIED
DCIN POWER
REMOVED
TRICKLE CHARGE
MODE
TRICKLE CHARGE
MODE
BAT < 2.9V
BAT < 2.9V
1/10th FULL CURRENT
1/10th FULL CURRENT
CHRG STATE: PULLDOWN
CHRG STATE: PULLDOWN
BAT > 2.9V
BAT > 2.9V
CHARGE
MODE
CHARGE
MODE
2.9V < BAT
2.9V < BAT
FULL CURRENT HPWR = HIGH
1/5 FULL CURRENT HPWR = LOW
FULL CURRENT
CHRG STATE: PULLDOWN
CHRG STATE: PULLDOWN
I
< I
BAT TERMINATE
I
< I
BAT TERMINATE
IN VOLTAGE MODE
IN VOLTAGE MODE
STANDBY
MODE
STANDBY
MODE
NO CHARGE CURRENT
CHRG STATE: Hi-Z
NO CHARGE CURRENT
CHRG STATE: Hi-Z
BAT < 4.1V
BAT < 4.1V
EN
EN
SHUTDOWN
MODE
DRIVEN HIGH
SHUTDOWN
MODE
DRIVEN HIGH
EN
EN
DRIVEN LOW
DRIVEN LOW
I
DROPS TO 20 A
I
DROPS TO 18 A
DCIN
USBIN
USBIN POWER
REMOVED OR
DCIN POWER
APPLIED
CHRG STATE: Hi-Z
CHRG STATE: Hi-Z
DCIN POWER
REMOVED
3550 F01
Figure 1. LTC3550 State Diagram of a Charge Cycle
3550fa
12
LTC3550
U
OPERATIO
mode and the charge current begins to decrease. Once
InBurstModeoperation,thepeakcurrentoftheinductoris
settoapproximately200mAregardlessoftheoutputload.
Each burst event can last from a few cycles at light loads
to almost continuously cycling with short sleep intervals
at moderate loads. In between these burst events, the
power MOSFETs and any unneeded circuitry are turned
off, reducing the quiescent current to 20µA. In this sleep
state, the load current is being supplied solely from the
output capacitor. As the output voltage droops, the EA
amplifier’soutputrisesabovethesleepthresholdsignaling
the BURST comparator to trip and turn the top MOSFET
on. This process repeats at a rate that is dependent on
the load demand.
the charge current drops below the programmed termina-
tion threshold (set by the external resistor R
), the
ITERM
internal P-channel MOSFET is shut off and the charger
enters standby mode.
In standby mode, the charger sits idle and monitors the
battery voltage using a comparator with a 6ms filter time
(t ). A charge cycle automatically restarts when the
RECHRG
batteryvoltagefallsbelow4.1V(whichcorrespondstoap-
proximately 80ꢀ to 90ꢀ battery capacity). This ensures
that the battery is kept near a fully charged condition and
eliminates the need for periodic charge cycle initiations.
Figure 1 uses a state diagram to describe the behavior of
the LTC3550 battery charger.
Dropout Operation
Astheinputsupplyvoltagedecreasestoavalueapproach-
ing the output voltage, the duty cycle increases toward the
maximumon-time.Furtherreductionofthesupplyvoltage
forcesthemainswitchtoremainonformorethanonecycle
until it reaches 100ꢀ duty cycle. The output voltage will
then be determined by the input voltage minus the voltage
drop across the P-channel MOSFET and the inductor.
600mA Step-Down Regulator
TheLTC3550regulatorusesaconstantfrequency, current
mode step-down architecture. Both the top (P-channel
MOSFET) and bottom (N-channel MOSFET) switches are
internal. During normal operation, the internal top power
MOSFET is turned on each cycle when the oscillator sets
the RS latch, and is turned off when the current com-
Animportantdetailtorememberisthatatlowinputsupply
parator, I
, resets the RS latch. The peak inductor
COMP
current at which I
voltages, the R
of the P-channel switch increases
resets the RS latch, is controlled
DS(ON)
COMP
(see Typical Performance Characteristics). Therefore,
the user should calculate the power dissipation when
the LTC3550 is used at 100ꢀ duty cycle with low input
voltage (See Thermal Considerations in the Applications
Information section).
by the output of error amplifier EA. When the load current
increases, it causes a slight decrease in the output voltage
(V ), relative to the internal reference, which in turn
OUT
causes the EA amplifier’s output voltage to increase until
the average inductor current matches the new load cur-
rent. While the top MOSFET is off, the bottom MOSFET is
turnedonuntileithertheinductorcurrentstartstoreverse,
Short-Circuit Protection
as indicated by the current reversal comparator I
the beginning of the next clock cycle.
, or
RCMP
When the regulator output is shorted to ground, the fre-
quency of the oscillator is reduced to about 210kHz, one
seventh the nominal frequency. This frequency foldback
ensures that the inductor current has more time to decay,
thereby preventing runaway. The oscillator’s frequency
Burst Mode® Operation
The LTC3550 buck regulator is capable of Burst Mode
operation in which the internal power MOSFETs operate
intermittently based on load current demand.
will progressively increase to 1.5MHz when V rises
FB
above 0V.
Burst Mode is a registered trademark of Linear Technology Corporation.
3550fa
13
LTC3550
U
OPERATIO
Battery Charger Power Source Selection
Low-Battery Charge Conditioning (Trickle Charge)
The LTC3550 can charge a battery from either the wall
adapterinputortheUSBportinput.Thechargerautomati-
cally senses the presence of voltage at each input. If both
powersourcesarepresent,thechargerdefaultstothewall
adaptersourceprovidedsufficientpowerispresentatthe
DCINinput. “Sufficientpower”isdefinedas:
This feature ensures that deeply discharged batteries are
gradually charged before applying full charge current . If
the BAT pin voltage is below 2.9V, the LTC3550 supplies
1/10th of the full charge current to the battery until the
BAT pin rises above 2.9V. For example, if the charger is
programmed to charge at 800mA from the wall adapter
input and 500mA from the USB input, the charge current
during trickle charge mode would be 80mA and 50mA,
respectively.
• Supply voltage is greater than the UVLO threshold.
• Supply voltage is greater than the battery voltage by
50mV (180mV rising, 50mV falling).
Thermal Limiting
Table 1 describes the behavior of the PWR status output.
Aninternalthermalfeedbackloopreducestheprogrammed
charge current if the die temperature attempts to rise
above a preset value of approximately 105°C. This feature
protects the LTC3550 from excessive temperature and
allows the user to push the limits of the power handling
capability of a given circuit board without risk of damag-
ing the device. The charge current can be set according
to typical (not worst-case) ambient temperature with the
assurance that the charger will automatically reduce the
current in worst case conditions. DFN package power
considerations are discussed further in the Applications
Information section.
Table 1. Power Source Selection
V
V
> 3.95V and
> BAT + 50mV
V
V
< 3.95V or
USBIN
USBIN
USBIN
USBIN
< BAT + 50mV
V
DCIN
V
DCIN
> 4.15V and
> BAT + 50mV
Charger Powered from Charger Powered
Wall Adapter Source; from Wall Adapter
USBIN Current < 25µA Source
⎯
⎯
⎯
⎯ ⎯ ⎯
PWR: LOW
PWR: LOW
V
DCIN
V
DCIN
< 4.15V or
< BAT + 50mV
Charger Powered from No Charging
USB Source;
⎯
⎯
⎯
⎯ ⎯ ⎯
PWR: Hi-Z
PWR: LOW
Status Indicators
⎯
⎯
⎯
⎯
The charge status output (CHRG) has two states: pull-
down and high impedance. The pull-down state indicates
that the LTC3550 is in a charge cycle. Once the charge
cycle has terminated or the LTC3550 is disabled, the pin
state becomes high impedance. The pull-down state is
strong enough to drive an LED and is capable of sinking
up to 10mA.
Charge Current Soft-Start and Soft-Stop
Thebatterychargerincludesasoft-startcircuittominimize
the inrush current at the start of a charge cycle. When a
charge cycle is initiated, the charge current ramps from
zero to full-scale current over a period of 250µs. Likewise,
internal circuitry ramps the charge current from full-scale
tozeroinapproximately30µswhenthechargershutsdown
orselfterminates.Thisminimizesthetransientcurrentload
on the power supply during start-up and shutdown.
⎯
⎯
⎯
Thepowersupplystatusoutput(PWR)hastwostates:pull-
down and high impedance. The pull-down state indicates
that power is present at either DCIN or USBIN. If no power
⎯
⎯
⎯
is applied at either pin, the PWR pin is high impedance,
indicatingthattheLTC3550lackssufficientpowertocharge
the battery. The pull-down state is strong enough to drive
an LED and is capable of sinking up to 10mA.
3550fa
14
LTC3550
U
W U U
APPLICATIO S I FOR ATIO
Figure 2 shows the basic LTC3550 application circuit.
External component selection is driven by the charging
requirements and the buck regulator load requirements.
Charge current out of the BAT pin can be determined at
any time by monitoring the IDC or IUSB pin voltage and
using the following equations:
V
RIDC
IDC
L1
V
OUT
IBAT
IBAT
IBAT
=
=
=
• 1000,(charging from wall adapter)
1.2V
SW
LTC3550
600mA
C
C
R2
R1
OUT
F
V
WALL
ADAPTER
IUSB
DCIN
V
FB
• 1000,(charging fromUSBsupply ,
RIUSB
RUN
HPWR = HIGH)
USB
USBIN
IUSB
IDC
V
CC
PORT
C2
V
BAT
IUSB
R
• 200,(charging fromUSBsupply,
IUSB
C
IN
ITERM
4.2V
SINGLE
CELL Li-Ion
BATTERY
RIUSB
HPWR = LOW)
+
C1
GND
R
R
ITERM
IDC
Programming Charge Termination
3550 F02
The charge cycle terminates when the charge current falls
belowtheprogrammedterminationthresholdduringcon-
stant-voltagemode.Thisthresholdissetbyconnectingan
Figure 2. LTC3550 Basic Circuit
Programming and Monitoring Charge Current
external resistor, R
, from the ITERM pin to ground.
ITERM
The charge current delivered to the battery from the wall
adaptersupplyisprogrammedusingasingleresistorfrom
the IDC pin to ground.
The charge termination current threshold (I
set by the following equation:
) is
TERMINATE
100V
ITERMINATE
100V
RITERM
1000V
ICHRG(DC)
1000V
RIDC
RITERM
=
,ITERMINATE =
RIDC
=
, ICHRG(DC) =
The termination condition is detected by using an internal
filtered comparator to monitor the ITERM pin. When the
ITERM pin voltage drops below 100mV* for longer than
Similarly, the charge current from the USB supply is
programmed using a single resistor from the IUSB pin
to ground. Setting HPWR pin to its high state will select
100ꢀ of the programmed charge current, while setting
HPWR to its low state will select 20ꢀ of the programmed
charge current.
t
(typically 1.5ms), charging is terminated. The
TERMINATE
charge current is latched off and the LTC3550 enters
standby mode.
When charging, transient loads on the BAT pin can cause
the ITERM pin to fall below 100mV for short periods of
time before the DC charge current has dropped below the
programmed termination current. The 1.5ms filter time
1000V
RIUSB
=
(HPWR = HIGH)
(HPWR = HIGH)
(HPWR = LOW)
ICHRG(USB)
1000V
(t
) on the termination comparator ensures that
TERMINATE
ICHRG(USB)
ICHRG(USB)
=
=
transient loads of this nature do not result in premature
chargecycletermination.Oncetheaveragechargecurrent
drops below the programmed termination threshold, the
LTC3550 terminates the charge cycle and stops providing
any current out of the BAT pin. In this state, any load on
the BAT pin must be supplied by the battery.
RIUSB
200V
RIUSB
*Any external sources that hold the ITERM pin above 100mV will prevent the LTC3550 from
terminating a charged cycle.
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Buck Regulator Inductor Selection
Table 2. Representative Surface Mount Inductors
PART
VALUE
(µH)
DCR
MAX DC
SIZE
For most applications, the value of the inductor will fall in
the range of 1µH to 4.7µH. Its value is chosen based on
the desired inductor ripple current. Large value inductors
lower ripple current and small value inductors result in
NUMBER
(Ω MAX) CURRENT (A) W × L × H (mm)
Sumida
CDRH3D16
1.5
2.2
3.3
4.7
0.043
0.075
0.110
0.162
1.55
1.20
1.10
0.90
3.8 × 3.8 × 1.8
higher ripple currents. Higher V or V
also increases
CC
OUT
Sumida
CMD4D06
2.2
3.3
4.7
0.116
0.174
0.216
0.950
0.770
0.750
3.5 × 4.3 × 0.8
the ripple current as shown in Equation 1. A reasonable
starting point for setting ripple current is ΔI = 240mA
L
(40ꢀ of 600mA).
Panasonic
ELT5KT
3.3
4.7
0.17
0.20
1.00
0.95
4.5 × 5.4 × 1.2
2.5 × 3.2 × 2.0
⎛
⎞
⎟
⎠
VOUT
fO •L
VOUT
VCC
Murata
LQH32CN
1.0
2.2
4.7
0.060
0.097
0.150
1.00
0.79
0.65
∆IL =
• 1−
⎜
⎝
(1)
The DC current rating of the inductor should be at least
equal to the maximum load current plus half the ripple
current to prevent core saturation. Thus, a 720mA rated
inductor should be enough for most applications (600mA
+120mA). Forbestefficiency, choosealowDC-resistance
inductor.
C and C
Selection
OUT
IN
Incontinuousmode,thesourcecurrentofthetopMOSFET
is a square wave of duty cycle V /V . To prevent large
voltage transients, a low ESR input capacitor sized for the
maximumRMScurrentmustbeused.ThemaximumRMS
capacitor current is given by:
OUT CC
TheinductorvaluealsohasaneffectonBurstModeopera-
tion. The transition to low current operation begins when
the inductor current peaks fall to approximately 200mA.
VOUT
VCC − VOUT
(
)
CIN required IRMS ≅ IOMAX
Lower inductor values (higher ΔI ) will cause this to occur
L
VCC
at lower load currents, which can cause a dip in efficiency
in the upper range of low current operation. In Burst Mode
operation, lower inductance values will cause the burst
frequency to increase.
(2)
This formula has a maximum at V = 2V , where I
CC
OUT
RMS
= I /2. This simple worst-case condition is commonly
OUT
usedfordesignbecauseevensignificantdeviationsdonot
offer much relief. Note that the capacitor manufacturer’s
ripple current ratings are often based on 2000 hours of
life. This makes it advisable to further derate the capaci-
tor, or choose a capacitor rated at a higher temperature
than required. Always consult the manufacturer if there
is any question.
Inductor Core Selection
Different core materials and shapes will change the
size/current and price/current relationship of an induc-
tor. Toroid or shielded pot cores in ferrite or permalloy
materials are small and don’t radiate much energy, but
generally cost more than powdered iron core inductors
with similar electrical characteristics. The choice of which
style inductor to use often depends more on the price vs
sizerequirementsandanyradiatedfield/EMIrequirements
than on what the LTC3550 requires to operate. Table 2
shows some typical surface mount inductors that work
well in LTC3550 applications.
The selection of C
series resistance (ESR).
is driven by the required effective
OUT
Typically, once the ESR requirement for C
has been
OUT
met, the RMS current rating generally far exceeds the
I
requirement. The output ripple ΔV
is
RIPPLE(P-P)
OUT
determined by:
⎛
⎜
⎝
⎞
⎠
1
(3)
∆VOUT ≅ ∆IL ESR +
⎟
8fCOUT
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where f = operating frequency, C
= output capacitance
0.6V ≤ V
≤ 5.5V
OUT
OUT
and ΔI = ripple current in the inductor. For a fixed output
L
R2
voltage, the output ripple voltage is highest at maximum
V
FB
input voltage since ΔI increases with input voltage.
L
LTC3550
R1
GND
Aluminum electrolytic and solid tantalum capacitors are
bothavailableinsurfacemountconfigurations.Inthecase
oftantalum,itiscriticalthatthecapacitorsaresurgetested
for use in switching power supplies. An excellent choice is
the AVX TPS series of surface mount tantalum. These are
specially constructed and tested for low ESR so they give
the lowest ESR for a given volume. Other capacitor types
include Sanyo POSCAP, Kemet T510 and T495 series, and
Sprague 593D and 595D series. Consult the manufacturer
for other specific recommendations.
3550 F03
Figure 3. Setting the LTC3550 Output Voltage
limiting the efficiency and which change would produce
the most improvement. Efficiency can be expressed as:
Efficiency = 100ꢀ – (L1 + L2 + L3 + ...)
where L1, L2, etc. are the individual losses as a percent-
age of input power.
Using Ceramic Input and Output Capacitors
Although all dissipative elements in the circuit produce
losses, two main sources usually account for most of
Higher capacitance values, lower cost ceramic capacitors
are now becoming available in smaller case sizes. Their
high ripple current, high voltage rating and low ESR make
them ideal for switching regulator applications. Because
the LTC3550’s control loop does not depend on the output
capacitor’s ESR for stable operation, ceramic capacitors
can be used freely to achieve very low output ripple and
small circuit size.
the losses in LTC3550 circuits: V quiescent current
CC
2
and I R losses. The V quiescent current loss dominates
CC
the efficiency loss at very low load currents whereas the
2
I R loss dominates the efficiency loss at medium to high
load currents. In a typical efficiency plot, the efficiency
curve at very low load currents can be misleading since
the actual power lost is of no consequence as illustrated
in Figure 4.
When choosing the input and output ceramic capacitors,
choose the X5R or X7R dielectric formulations. These
dielectrics have the best temperature and voltage charac-
teristics of all the ceramics for a given value and size.
1. The V quiescent current is due to two components:
CC
the DC bias current as given in the Electrical Charac-
teristics and the internal main switch and synchronous
Output Voltage Programming
1
0.1
The output voltage is set by a resistive divider according
to the following formula:
0.01
R2
R1
⎛
⎝
⎞
VOUT = 0.6V 1+
(4)
⎜
⎟
⎠
0.001
0.0001
0.00001
The external resistive divider is connected to the output,
allowing remote voltage sensing as shown in Figure 3.
Efficiency Considerations
0.1
1
10
100
1000
LOAD CURRENT (mA)
Theefficiencyofaswitchingregulatorisequaltotheoutput
power divided by the input power times 100ꢀ. It is often
useful to analyze individual losses to determine what is
3550 F04
Figure 4. Power Lost vs Load Current
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switch gate charge currents. The gate charge current
results from switching the gate capacitance of the
internal power MOSFET switches. Each time the gate
is switched from high to low to high again, a packet of
In most applications the buck regulator does not dissi-
pate much heat due to its high efficiency. The majority of
the LTC3550 power dissipation occurs when charging a
battery. Fortunately, the LTC3550 automatically reduces
the charge current during high power conditions using
a patented thermal regulation circuit. Thus, there is no
needtodesignforworst-casepowerdissipationscenarios
because the LTC3550 ensures that the battery charger
power dissipation never raises the junction temperature
above a preset value of 105°C. In the unlikely case that
the junction temperature is forced above 105°C (due to
abnormally high ambient temperatures or excessive buck
regulatorpowerdissipation),thebatterychargecurrentwill
bereducedtozeroandthusdissipatenoheat. Asanadded
measure of protection, even if the junction temperature
reaches approximately 150°C, the buck regulator’s power
switches will be turned off and the SW node will become
high impedance.
charge, dQ, moves from V to ground. The resulting
CC
dQ/dt is the current out of V that is typically larger
CC
than the DC bias current. In continuous mode, I
GATECHG
= f(Q + Q ) where Q and Q are the gate charges of
T
B
T
B
the internal top and bottom switches. Both the DC bias
and gate charge losses are proportional to V and
CC
thus their effects will be more pronounced at higher
supply voltages.
2
2. I R losses are calculated from the resistances of the
internal switches, R , and external inductor R . In
SW
L
continuous mode, the average output current flowing
through inductor L is “chopped” between the main
switch and the synchronous switch. Thus, the series
resistance looking into the SW pin is a function of both
top and bottom MOSFET R
(DC) as follows:
and the duty cycle
DS(ON)
The conditions that cause the LTC3550 to reduce charge
currentthroughthermalfeedbackcanbeapproximatedby
considering the power dissipated in the IC. The approxi-
mate ambient temperature at which the thermal feedback
begins to protect the IC is:
R
= (R )(DC) + (R
DS(ON)TOP
)(1 – DC)
DS(ON)BOT
SW
The R
for both the top and bottom MOSFETs can
DS(ON)
be obtained from the Typical Performance Characteristics
2
T = 105°C – T
curves. Thus, to obtain I R losses, simply add R to R
A
RISE
SW
L
and multiply the result by the square of the average output
T = 105°C – (P • θ )
A
D
JA
current. Other losses including C and C
ESR dissipa-
IN
OUT
T = 105°C – (P
A
+ P
) • θ
JA
(5)
D(CHARGER)
D(BUCK)
tive losses and inductor core losses generally account for
less than 2ꢀ total additional loss.
Most of the charger’s power dissipation is generated from
the internal charger MOSFET. Thus, the power dissipation
is calculated to be:
Thermal Considerations
The battery charger’s thermal regulation feature and the
buckregulator’shighefficiencymakeitunlikelythatenough
power will be dissipated to exceed the LTC3550 maximum
junction temperature. Nevertheless, it is a good idea to
do some thermal analysis for worst-case conditions.
P
= (V – V ) • I
(6)
D(CHARGER)
IN
BAT
BAT
V is the charger supply voltage (either DCIN or USBIN),
IN
BAT
rent.
V
is the battery voltage and I
is the charge cur-
BAT
The junction temperature, T , is given by: T = T + T
J
J
A
RISE
Example: An LTC3550 operating from a 5V wall adapter
(on the DCIN input) is programmed to supply 650mA
full-scale current to a discharged Li-Ion battery with a
voltage of 3V.
where T is the ambient temperature. The temperature
A
rise is given by:
T
= P • θ
D JA
RISE
The charger power dissipation is calculated to be:
where P is the power dissipated and θ is the thermal
D
JA
resistance from the junction of the die to the ambient
P
= (5V – 3V) • 650mA = 1.3W
D(CHARGER)
temperature.
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For simplicity, assume the buck regulator is disabled and
anexample, acorrectlysolderedLTC3550candeliverover
800mAtoabatteryfroma5Vsupplyatroomtemperature.
Withoutagoodbacksidethermalconnection, thisnumber
would drop to much less than 500mA.
dissipatesnopower(P
=0).Foraproperlysoldered
D(BUCK)
DHC16 package, the thermal resistance (θ ) is 40°C/W.
JA
Thus, the ambient temperature at which the LTC3550
charger will begin to reduce the charge current is:
Battery Charger Stability Considerations
T = 105°C – (1.3W • 40°C/W)
A
Theconstant-voltagemodefeedbackloopisstablewithout
any compensation provided a battery is connected to the
charger output. When the charger is in constant-current
mode, the charge current program pin (IDC or IUSB) is in
the feedback loop, not the battery. The constant-current
mode stability is affected by the impedance at the charge
current program pin. With no additional capacitance on
this pin, the charger is stable with program resistor val-
T = 105°C – 52°C
A
T = 53°C
A
The LTC3550 can be used above 53°C ambient, but the
charge current will be reduced from 650mA. Assum-
ing no power dissipation from the buck converter, the
approximate current at a given ambient temperature can
be approximated by:
ues as high as 20k (I
= 50mA); however, additional
CHG
105°C – TA
capacitanceonthesenodesreducesthemaximumallowed
program resistor value.
IBAT
=
(7)
(V – VBAT)• θJA
IN
Using the previous example with an ambient temperature
of 60°C, the charge current will be reduced to approxi-
mately:
Checking Regulator Transient Response
The regulator loop response can be checked by looking
at the load transient response. Switching regulators take
several cycles to respond to a step in load current. When
105°C – 60°C
(5V – 3V)• 40°C/W 80°C/A
45°C
IBAT
=
=
a load step occurs, V
immediately shifts by an amount
OUT
equal to (ΔI
• ESR), where ESR is the effective series
LOAD
IBAT = 563mA
resistance of C . ΔI
also begins to charge or dis-
OUT
LOAD
charge C , which generates a feedback error signal. The
Becausetheregulatortypicallydissipatessignificantlyless
power than the charger (even in worst-case situations),
the calculations here should work well as an approxima-
tion. However, the user may wish to repeat the previous
analysistotakethebuckregulator’spowerdissipationinto
account. Equation(7)canbemodifiedtotakeintoaccount
the temperature rise due to the buck regulator:
OUT
regulator loop then acts to return V
value. During this recovery time V
to its steady state
can be monitored
OUT
OUT
for overshoot or ringing that would indicate a stability
problem. For a detailed explanation of switching control
loop theory, see Application Note 76.
A second, more severe transient is caused by switching
in loads with large (>1µF) supply bypass capacitors. The
discharged bypass capacitors are effectively put in paral-
105°C – TA −(PD(BUCK) • θJA)
IBAT
=
(8)
(V – VBAT)• θJA
IN
lel with C , causing a rapid drop in V . No regulator
OUT
OUT
can deliver enough current to prevent this problem if the
load switch resistance is low and it is driven quickly. The
only solution is to limit the rise time of the switch drive
so that the load rise time is limited to approximately (25
For optimum performance, it is critical that the exposed
metal pad on the backside of the LTC3550 package is
properly soldered to the PC board ground. When correctly
2
solderedtoa2500mm doublesided1ozcopperboard,the
• C
). Thus, a 10µF capacitor charging to 3.3V would
LTC3550hasathermalresistanceofapproximately40°C/W.
Failure to make thermal contact between the exposed pad
on the backside of the package and the copper board will
result in thermal resistances far greater than 40°C/W. As
LOAD
require a 250µs rise time, limiting the charging current
to about 130mA.
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Protecting the USB Pin and Wall Adapter Input from
Overvoltage Transients
4.7µF ceramic capacitor to locally bypass the 5V input.
This trace shows the clean response resulting from the
addition of the 1Ω resistor.
Cautionmustbeexercisedwhenusingceramiccapacitors
to bypass the USBIN pin or the wall adapter inputs. High
voltage transients can be generated when the USB or wall
adapter is hot-plugged. When power is supplied via the
USB bus or wall adapter, the cable inductance along with
the self resonant and high Q characteristics of ceramic
capacitors can cause substantial ringing which could
exceed the maximum voltage ratings and damage the
LTC3550. Refer to Linear Technology Application Note 88,
entitled“CeramicInputCapacitorsCanCauseOvervoltage
Transients” for a detailed discussion of this problem. The
long cable lengths of most wall adapters and USB cables
makes them especially susceptible to this problem. To
bypass the USB and the wall adapter inputs, add a 1Ω
resistor in series with a ceramic capacitor to lower the
effective Q of the network and greatly reduce the ringing.
A tantalum, OS-CON, or electrolytic capacitor can be used
in place of the ceramic and resistor, as their higher ESR
reduces the Q, thus reducing the voltage ringing.
Evenwiththeadditional1Ωresistor,baddesigntechniques
and poor board layout can often make the overvoltage
problem even worse. System designers often add extra
inductance in series with input lines in an attempt to mini-
mize the noise fed back to those inputs by the application.
In reality, adding these extra inductances only makes the
overvoltage transients worse. Since cable inductance is
one of the fundamental causes of the excessive ringing,
adding a series ferrite bead or inductor increases the ef-
fective cable inductance, making the problem even worse.
For this reason, do not add additional inductance (ferrite
beads or inductors) in series with the USB or wall adapter
inputs.Forthemostrobustsolution,6Vtransorbsorzener
diodes may also be added to further protect the USB and
wall adapter inputs. Two possible protection devices are
the SM2T from STMicroelectronics and the EDZ series
devices from ROHM.
Always use an oscilloscope to check the voltage wave-
forms at the USBIN and DCIN pins during USB and wall
adapter hot-plug events to ensure that overvoltage
transients have been adequately removed.
The oscilloscope photograph in Figure 5 shows how seri-
ous the overvoltage transient can be for the USB and wall
adapterinputs.Forbothtraces,a5Vsupplyishot-plugged
using a three foot long cable. For the top trace, only a
4.7µF ceramic X5R capacitor (without the recommended
1Ω series resistor) is used to locally bypass the input.
This trace shows excessive ringing when the 5V cable
is inserted, with the overvoltage spike reaching 10V. For
the bottom trace, a 1Ω resistor is added in series with the
PC Board Layout Checklist
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of
the LTC3550. These items are also illustrated graphically
in Figures 6 and 7. Check the following in your layout:
BOLD LINES INDICATE
LTC3550
HIGH CURRENT PATHS
6
7
V
V
FB
4.7μF ONLY
10
9
2V/DIV
V
CC
SW
CC
+
–
C
IN
8
GND
GND
L1
–
+
R1
R2
17
C
OUT
V
OUT
4.7μF + 1Ω
2V/DIV
3550 F06
3550 F04
20μs/DIV
C
F
Figure 5. Waveforms Resulting from Hot-Plugging a 5V Input
Supply When Using Ceramic Bypass Capacitors
Figure 6. DC-DC Converter Layout Diagram
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C
F
VIA TO
V
OUT
R2
R1
VIA TO V
CC
VIA TO
GND
V
RUN
FB
SW
C
IN
L1
V
CC
GND
C
OUT
V
OUT
3550 F07
Figure 7. DC-DC Converter Suggested Layout
1. The power traces, consisting of the GND trace, the SW
Design Example
trace and the V trace should be kept short, direct
CC
As a design example, assume the LTC3550 is used in
a single lithium-ion battery-powered cellular phone
application. The battery is charged by either plugging
a wall adapter cable into the phone or putting the phone in
a USB cradle. The optimum charge current for this parti-
cular lithium-ion battery is determined to be 800mA. The
buck regulator output voltage needs to be 1.8V.
and wide.
2. Does the V pin connect directly to the feedback resis-
FB
tors? The resistive divider R1/R2 must be connected
between the (+) plate of C
and ground.
OUT
3. Does the (+) plate of C connect to V as closely as
IN
CC
possible? This capacitor provides the AC current to the
internal power MOSFETs.
Starting with the charger, choosing R
programs the charger for 806mA. Choosing R
to be 1.24k
IDC
to
IUSB
4. Keep the switching node, SW, away from the sensitive
be 2.1k programs the charger for 475mA when charging
from the USB cradle, ensuring that the charger never
exceeds the 500mA maximum current supplied by the
V
node.
FB
5. Keep the (–) plates of C and C
as close as
OUT
IN
possible.
USB port. A good rule of thumb for I
is one-
TERMINATE
tenth the full charge current, so R
is picked to be
ITERM
6. Solder the exposed pad on the backside of the package
to PC board ground for optimum thermal performance.
The thermal resistance of the package can be further
enhanced by increasing the area of the copper used for
PC board ground.
1.24k (I
= 80mA).
TERMINATE
Moving on to the step-down converter, V will be pow-
CC
ered from the battery which can range from a maximum
of 4.2V down to about 2.7V. The load current requirement
3550fa
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is a maximum of 600mA but most of the time it will be in
standby mode, requiring only 2mA. Efficiency at both low
and high load currents is important. With this information
we can calculate L using Equation (1),
A 2.2µH inductor works well for this application. For best
efficiency choose a 720mA or greater inductor with less
than 0.2Ω series resistance. C will require an RMS cur-
IN
rent rating of at least 0.3A = I
/2 at temperature
LOAD(MAX)
and C
will require an ESR of less than 0.25Ω. In most
cases, a ceramic capacitor will satisfy this requirement.
OUT
⎛
⎞
⎟
⎠
VOUT
fO •L
VOUT
VCC
∆IL =
• 1−
⎜
⎝
For the feedback resistors, choose R1 = 301k. R2 can then
be calculated from equation (4) to be:
Substituting V
O
= 1.8V, V = 4.2V, ΔI = 240mA and
OUT
CC
L
f = 1.5MHz in Equation (3) gives:
V
0.6
⎛
⎝
⎞
OUT
R2=R1
–1 = 604k
⎜
⎟
⎠
1.8V
1.5MHz •(240mA)
1.8V
4.2V
⎛
⎝
⎞
L =
• 1−
= 2.86µH
⎜
⎟
⎠
Figure 8 shows the complete circuit along with its ef-
ficiency curve.
95
V
= 1.8V
OUT
2.2µH*
V
OUT
1.8V
SW
LTC3550
DCIN
V
= 2.7V
90
85
80
75
70
65
60
CC
10µF**
600mA
CER
22pF
604k
301k
WALL
V
= 4.2V
V
FB
CC
ADAPTER
EN
RUN
V
= 3.6V
CC
USB
PORT
800mA (WALL)
475mA (USB)
USBIN
V
CC
1µF
BAT
IUSB
IDC
2.1k
1%
4.7µF†
ITERM
4.2V
+
1µF
GND
1.24k
1%
1.24k
1%
SINGLE-CELL
Li-Ion BATTERY
*MURATA LQH32CN2R2M33
3550 F08a
0.1
1
10
100
1000
**TAIYO YUDEN JMK316BJ106ML
OUTPUT CURRENT (mA)
† TAIYO YUDEN LMK212BJ475MG
3550 G24
Figure 8a. Design Example Circuit
Figure 8b. Buck Regulator Efficiency vs Output Current
U
TYPICAL APPLICATIO S
Full Featured Dual Input Charger Plus Step-Down Converter
800mA (WALL)
475mA (USB)
WALL
DCIN
LTC3550
BAT
ADAPTER
4.7 F
1k
4.2V
SINGLE-CELL
Li-Ion BATTERY
USB
POWER
+
USBIN
PWR
CHRG
RUN
1k
1 F
1 F
EN
V
IUSB
IDC
CC
V
OUT
1.8V
SW
2.2 H
600mA
10 F
CER
V
ITERM
FB
GND
2.1k
1%
1.24k
1%
1k
1%
22 F
604k
301k
3550 TA03
3550fa
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LTC3550
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PACKAGE DESCRIPTIO
DHC Package
16-Lead Plastic DFN (5mm × 3mm)
(Reference LTC DWG # 05-08-1706)
0.65 0.05
3.50 0.05
1.65 0.05
2.20 0.05 (2 SIDES)
PACKAGE
OUTLINE
0.25 0.05
0.50 BSC
4.40 0.05
(2 SIDES)
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
R = 0.115
TYP
0.40 0.10
5.00 0.10
(2 SIDES)
9
16
R = 0.20
TYP
3.00 0.10 1.65 0.10
(2 SIDES)
(2 SIDES)
PIN 1
TOP MARK
(SEE NOTE 6)
PIN 1
NOTCH
(DHC16) DFN 1103
8
1
0.25 0.05
0.50 BSC
0.75 0.05
0.200 REF
4.40 0.10
(2 SIDES)
0.00 – 0.05
BOTTOM VIEW—EXPOSED PAD
NOTE:
1. DRAWING PROPOSED TO BE MADE VARIATION OF VERSION (WJED-1) IN JEDEC
PACKAGE OUTLINE MO-229
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE
TOP AND BOTTOM OF PACKAGE
3550fa
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
23
LTC3550
U
TYPICAL APPLICATIO
™
Dual Input Charger Plus Step-Down Converter with Wall Adapter PowerPath
WALL
ADAPTER
EN
DCIN
LTC3550
RUN
1µF
USB
POWER
V
USBIN
CC
1k
4.7µF
1µF
800mA (WALL)
475mA (USB)
IUSB
BAT
SW
2.2µH
V
OUT
1.8V
IDC
+
600mA
4.2V
10µF
CER
V
ITERM
FB
SINGLE-CELL
Li-Ion BATTERY
GND
2.1k
1%
1.24k
1%
1k
1%
22pF
604k
301k
3550 TA04
PowerPath is a trademark of Linear Technology Corporation
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
V : 2.5V to 5.5V, V
LTC3406/LTC3406B 1.5MHz, 600mA Synchronous
) = 0.6V, I = 20µA, ThinSOT Package
IN
OUT(MIN
Q
Step-Down DC/DC Converter in ThinSOTTM
LTC3455
Dual DC/DC Converter with USB Power
Management and Li-Ion Battery Charger
Efficiency >96ꢀ, Accurate USB Current Limiting (500mA/100mA), 4mm × 4mm
QFN-24 Package
LTC3456
2-Cell Multi-Output DC/DC Converter
with USB Power Manager
Seamless Transition Between 2-Cell Battery, USB and AC Wall Adapter Input Power
Sources, QFN Package
LTC3550-1
LTC3552-1
Dual Input USB/AC Adapter Li-Ion Battery Synchronous Buck Converter, Efficiency = 93ꢀ, Output = 1.875V at 600mA, Charge
Charger with 600mA Buck Converter Current = 950mA Programmable 5mm × 3mm 16-Lead DFN Package
Standalone Linear Li-Ion Battery Charger Synchronous Buck Converter, Efficiency > 90ꢀ, Outputs = 1.8V at 800mA, 1.575V at
with Dual Synchronous Buck Converter
400mA, Charge Current Programmable up to 950mA, USB Compatible, 5mm × 3mm
16-Lead DFN Package
LTC4055
LTC4058
USB Power Controller and Battery Charger Charges Single-Cell Li-Ion Batteries Directly from USB Port, Thermal Regulation,
4mm × 4mm QFN-16 Package
Standalone 950mA Lithium-Ion Charger
in DFN
C/10 Charge Termination, Battery Kelvin Sensing, 7ꢀ Charge Accuracy
LTC4063
LTC4068
Standalone Li-Ion Charger Plus LDO
4.2V, 0.35ꢀ Float Voltage, Up to 1A Charge Current, 100mA LDO
Standalone Linear Li-Ion Battery Charger Charge Current up to 950mA, Thermal Regulation, 3mm × 3mm DFN-8 Package
with Programmable Termination
LTC4075
LTC4076
LTC4077
Dual Input Standalone Li-Ion Battery
Charger
Charges Single-Cell Li-Ion Batteries from Wall Adapter and USB Inputs with Automatic
Input Power Detection and Selection, 950mA Charger Current, Thermal Regulation,
C/X Charge Termination, 3mm × 3mm DFN Package
Dual Input Standalone Li-Ion Battery
Charger
Charges Single-Cell Li-Ion Batteries from Wall Adapter and USB Inputs with Automatic
Input Power Detection and Selection, 950mA Charger Current, Thermal Regulation, USB
Low Power Mode Select, C/X Charge Termination, 3mm × 3mm DFN Package
Dual Input Standalone Li-Ion Battery
Charger
Charges Single-Cell Li-Ion Batteries from Wall Adapter and USB Inputs with
Automatic Input Power Detection and Selection, 950mA Charger Current, Thermal
Regulation, Programmable USB Low Power Mode, C/10 Charge Termination,
3mm × 3mm DFN Package
ThinSOT is a trademark of Linear Technology Corporation.
3550fa
LT 0406 REV A • PRINTED IN USA
24 LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
●
●
© LINEAR TECHNOLOGY CORPORATION 2006
(408) 432-1900 FAX: (408) 434-0507 www.linear.com
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