LTC3555IUFD-3-TRPBF [Linear]
High Effi ciency USB Power Manager + Triple Step-Down DC/DC; 高艾菲效率USB电源管理器+三降压型DC / DC型号: | LTC3555IUFD-3-TRPBF |
厂家: | Linear |
描述: | High Effi ciency USB Power Manager + Triple Step-Down DC/DC |
文件: | 总32页 (文件大小:294K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
LTC3555/LTC3555-X
High Efficiency USB Power
Manager + Triple
Step-Down DC/DC
DESCRIPTION
FEATURES
The LTC®3555 family are highly integrated USB com-
patible power management and battery charger ICs for
Li-Ion/Polymer battery applications. They include a high
efficiency current limited switching PowerPath manager
withautomaticloadprioritization,abatterycharger,anideal
diode and three general purpose synchronous step-down
switching regulators.
Power Manager
n
High Efficiency Switching PowerPath™ Controller
with Bat-Track™ Adaptive Output Control
n
Programmable USB or Wall Current Limit
(100mA/500mA/1A)
n
Full Featured Li-Ion/Polymer Battery Charger
n
1.5A Maximum Charge Current
n
Internal 180mΩ Ideal Diode + External Ideal Diode
The LTC3555 family limits input current to either 100mA
or 500mA for USB applications or 1A for adapter-powered
applications. Unlike linear chargers, the LTC3555 family’s
switchingarchitecturetransmitsnearlyallofthepoweravail-
able from the USB port to the load with minimal loss and
heat which eases thermal constraints in small spaces.
Controller Powers Load in Battery Mode
n
Low No-Load Quiescent Current when Powered from
BAT (<32μA)
DC/DCs
n
Triple High Efficiency Step-Down DC/DCs
(1A/400mA/400mA I
)
OUT
Two of the three general purpose switching regulators can
provide up to 400mA and the third can deliver 1A. The
n
n
n
n
n
All Regulators Operate at 2.25MHz
Dynamic Voltage Scaling on Two Outputs
2
entire product can be controlled via I C or simple I/O. The
2
I C or Independent Enable, V
Controls
OUT
LTC3555-1/LTC3555-3 versions offer “instant-on” power
deliverytotheportableproductevenwithaverylowbattery
voltage.TheLTC3555-3versionalsohasareducedcharger
float voltage of 4.100V for battery safety and longevity.
Low No-Load Quiescent Current: 20μA
28-Pin (4mm × 5mm × 0.75mm) QFN Package
APPLICATIONS
The LTC3555 family is available in the low profile 28-pin
(4mm × 5mm × 0.75mm) QFN surface mount package.
L, LT, LTC and LTM are registered trademarks of Linear Technology Corporation. PowerPath
and Bat-Track are trademarks of Linear Technology Corporation. All other trademarks are the
property of their respective owners. Protected by U.S. Patents, including 6522118 and 6404251.
n
HDD-Based MP3 Players, PDAs, GPS, PMPs
n
Portable Medical Products
n
Handheld Instrumentation
Other USB-Based Handheld Products
n
TYPICAL APPLICATION
High Efficiency PowerPath Manager and Triple Step-Down Regulator
Switching Regulator Efficiency to
USB/WALL
4.35V TO 5.5V
TO OTHER
LOADS
USB COMPLIANT
STEP-DOWN
REGULATOR
System Load (POUT/PBUS
)
100
90
80
70
60
50
40
30
20
10
CC/CV
BATTERY
CHARGER
0V
OPTIONAL
CURRENT
CONTROL
BAT = 4.2V
BAT = 3.3V
CHARGE
+
Li-Ion
T
LTC3555/LTC3555-X
3.3V/25mA
RTC/LOW
ALWAYS ON LDO
1
POWER LOGIC
0.8V TO 3.6V/400mA
0.8V TO 3.6V/400mA
MEMORY
I/O
TRIPLE
5
HIGH EFFICIENCY
STEP-DOWN
V
I
= 5V
ENABLE
CONTROLS
BUS
= 0mA
2
3
BAT
0.8V TO 3.6V/1A
SWITCHING
10x MODE
CORE
μPROCESSOR
0
REGULATORS
RST
0.01
0.1
(A)
1
2
I
2
2
OUT
I C
I C PORT
3555 TA01b
3555 TA01
3555fd
1
LTC3555/LTC3555-X
ABSOLUTE MAXIMUM RATINGS
PIN CONFIGURATION
TOP VIEW
(Notes 1, 2, 3)
V
(Transient) t < 1ms,
BUS
Duty Cycle < 1% .......................................... –0.3V to 7V
, V , V , V (Static), DV ,
28 27 26 25 24 23
V
IN1 IN2 IN3 BUS
FB1, FB2, FB3, NTC, BAT, EN1, EN2, EN3,
CC
LDO3V3
CLPROG
NTC
1
2
3
4
5
6
7
8
22
21
20
19
18
17
16
15
GATE
CHRG
PROG
FB1
I
I
I
I
I
I
, I
CLPROG
, SCL, SDA, RST3, CHRG............ –0.3V to 6V
LIM0 LIM1
....................................................................3mA
FB2
29
, I
PROG
............................................................50mA
RST3 CHRG
V
V
IN2
IN1
........................................................................2mA
SW2
EN2
SW1
EN1
...................................................................30mA
LDO3V3
DV
CC
RST3
, I
............................................................600mA
SW1 SW2
9
10 11 12 13 14
UFD PACKAGE
I , I
, I , I
...................................................2A
SW SW3 BAT VOUT
Junction Temperature ........................................... 125°C
Operating Temperature Range (Note 2).... –40°C to 85°C
Storage Temperature Range................... –65°C to 125°C
28-LEAD (4mm × 5mm) PLASTIC QFN
= 125°C, θ = 37°C/W
T
JMAX
JA
EXPOSED PAD (PIN 29) IS GND, MUST BE SOLDERED TO PCB
ORDER INFORMATION
LEAD FREE FINISH
LTC3555EUFD#PBF
LTC3555IUFD#PBF
LTC3555EUFD-1#PBF
LTC3555IUFD-1#PBF
LTC3555EUFD-3#PBF
LTC3555IUFD-3#PBF
TAPE AND REEL
PART MARKING*
3555
PACKAGE DESCRIPTION
28-Lead (4mm x 5mm) Plastic QFN
TEMPERATURE RANGE
–40°C to 85°C
LTC3555EUFD#TRPBF
LTC3555IUFD#TRPBF
LTC3555EUFD-1#TRPBF
LTC3555IUFD-1#TRPBF
LTC3555EUFD-3#TRPBF
LTC3555IUFD-3#TRPBF
3555
28-Lead (4mm x 5mm) Plastic QFN
28-Lead (4mm x 5mm) Plastic QFN
28-Lead (4mm x 5mm) Plastic QFN
28-Lead (4mm x 5mm) Plastic QFN
28-Lead (4mm x 5mm) Plastic QFN
–40°C to 85°C
–40°C to 85°C
–40°C to 85°C
–40°C to 85°C
–40°C to 85°C
35551
35551
35553
35553
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
Consult LTC Marketing for information on non-standard lead based finish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VBUS = 5V, BAT = 3.8V, DVCC = 3.3V, RPROG = 1k, RCLPROG = 3k,
unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
PowerPath Switching Regulator
V
Input Supply Voltage
Total Input Current
4.35
5.5
V
BUS
l
l
l
l
I
1x Mode, V
5x Mode, V
= BAT
= BAT
OUT
87
95
100
500
1000
0.50
mA
mA
mA
mA
BUSLIM
OUT
OUT
436
800
0.31
460
860
0.38
10x Mode, V
= BAT
Suspend Mode, V
= BAT
OUT
I
V
Quiescent Current
1x Mode, I
5x Mode, I
= 0mA
= 0mA
7
15
mA
mA
mA
mA
VBUSQ
BUS
OUT
OUT
10x Mode, I
= 0mA
15
OUT
Suspend Mode, I
= 0mA
0.044
OUT
3555fd
2
LTC3555/LTC3555-X
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VBUS = 5V, BAT = 3.8V, DVCC = 3.3V, RPROG = 1k, RCLPROG = 3k,
unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
h
Ratio of Measured V
Current to
1x Mode
224
1133
2140
11.3
mA/mA
mA/mA
mA/mA
mA/mA
CLPROG
BUS
(Note 4)
CLPROG Program Current
5x Mode
10x Mode
Suspend Mode
I
V
Current Available Before
OUT
1x Mode, BAT = 3.3V
5x Mode, BAT = 3.3V
10x Mode, BAT = 3.3V
Suspend Mode
135
672
1251
0.32
mA
mA
mA
mA
OUT(POWERPATH)
Loading BAT
V
V
V
V
CLPROG Servo Voltage in Current
Limit
1x, 5x, 10x Modes
Suspend Mode
1.188
100
V
CLPROG
mV
V
Undervoltage Lockout
Rising Threshold
Falling Threshold
4.30
4.00
4.35
4.7
V
V
UVLO_VBUS
UVLO_VBUS-BAT
OUT
BUS
3.95
3.4
V
to BAT Differential Undervoltage Rising Threshold
200
50
mV
mV
BUS
Lockout
Voltage
Falling Threshold
V
1x, 5x, 10x Modes, 0V < BAT < 4.2V,
BAT + 0.3
V
OUT
I
= 0mA, Battery Charger Off
OUT
USB Suspend Mode, I
= 250μA
4.5
1.8
4.6
4.7
2.7
V
MHz
ꢀ
VOUT
f
Switching Frequency
PMOS On Resistance
NMOS On Resistance
Peak Switch Current Limit
2.25
0.18
0.30
OSC
R
R
PMOS_POWERPATH
NMOS_POWERPATH
PEAK_POWERPATH
ꢀ
I
1x, 5x Modes
10x
2
3
A
A
Battery Charger
V
BAT Regulated Output Voltage
LTC3555/LTC3555-1
LTC3555/LTC3555-1
LTC3555-3
4.179
4.165
4.079
4.065
4.200
4.200
4.100
4.100
4.221
4.235
4.121
4.135
V
V
V
V
FLOAT
l
l
LTC3555-3
I
I
Constant Current Mode Charge
Current
R
R
= 1k
= 5k
980
185
1022
204
1065
223
mA
mA
CHG
BAT
PROG
PROG
Battery Drain Current
V
V
> V
, Battery Charger Off, I = 0μA
VOUT
VOUT
2
3.5
5
μA
BUS
BUS
UVLO
= 0V, I
= 0μA (Ideal Diode Mode)
LTC3555
27
32
38
44
μA
μA
LTC3555-1/LTC3555-3
V
V
PROG Pin Servo Voltage
1.000
0.100
V
V
PROG
PROG Pin Servo Voltage in Trickle
Charge
BAT < V
PROG_TRKL
TRKL
TRKL
V
C/10 Threshold Voltage at PROG
100
1022
100
2.85
135
–100
4
mV
mA/mA
mA
C/10
PROG
TRKL
h
Ratio of I to PROG Pin Current
BAT
I
Trickle Charge Current
BAT < V
V
TRKL
Trickle Charge Threshold Voltage
Trickle Charge Hysteresis Voltage
Recharge Battery Threshold Voltage
Safety Timer Termination
BAT Rising
2.7
3.0
V
mV
ΔV
ΔV
TRKL
Threshold Voltage Relative to V
–75
3.3
–125
5
mV
FLOAT
RECHRG
t
t
Timer Starts when BAT = V
Hour
Hour
TERM
BADBAT
FLOAT
Bad Battery Termination Time
BAT < V
0.42
0.088
0.5
0.63
TRKL
h
End of Charge Indication Current Ratio (Note 5)
0.1
0.112 mA/mA
C/10
3555fd
3
LTC3555/LTC3555-X
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VBUS = 5V, BAT = 3.8V, DVCC = 3.3V, RPROG = 1k, RCLPROG = 3k,
unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
100
1
UNITS
mV
μA
V
CHRG Pin Output Low Voltage
CHRG Pin Leakage Current
Battery Charger Power FET On
I
= 5mA
= 5V
65
CHRG
CHRG
I
V
CHRG
CHRG
R
0.18
110
ꢀ
ON_CHG
Resistance (Between V
and BAT)
OUT
T
LIM
Junction Temperature in Constant
Temperature Mode
°C
NTC
V
V
V
Cold Temperature Fault Threshold
Voltage
Rising Threshold
Hysteresis
75.0
33.4
0.7
76.5
1.5
78.0
36.4
2.7
%V
%V
COLD
HOT
DIS
BUS
BUS
Hot Temperature Fault Threshold
Voltage
Falling Threshold
Hysteresis
34.9
1.5
%V
%V
BUS
BUS
NTC Disable Threshold Voltage
Falling Threshold
Hysteresis
1.7
50
%V
BUS
mV
I
NTC Leakage Current
V
NTC
= V = 5V
BUS
–50
50
nA
NTC
Ideal Diode
V
Forward Voltage
V
VOUT
= 0V, I
= 10mA
= 0V
BUS
= 10mA
< 25mA
2
mV
mV
FWD
BUS
VOUT
I
15
R
Internal Diode On Resistance, Dropout
Internal Diode Current Limit
V
0.18
ꢀ
A
DROPOUT
I
1.6
3.1
MAX_DIODE
Always On 3.3V LDO Supply
V
Regulated Output Voltage
Closed-Loop Output Resistance
Dropout Output Resistance
, EN1, EN2, EN3)
0mA < I
3.3
4
3.5
0.4
V
ꢀ
ꢀ
LDO3V3
LDO3V3
R
R
CL_LDO3V3
OL_LDO3V3
23
Logic (I
, I
LIM0 LIM1
V
V
Logic Low Input Voltage
Logic High Input Voltage
V
V
IL
IH
1.2
1.6
I
I
, I , EN1, EN2, EN3
LIM0 LIM1
2
μA
PD1
Pull-Down Currents
2
I C Port
DV
Input Supply Voltage
5.5
V
μA
V
CC
I
DV Current
CC
SCL/SDA = 0kHz
0.5
1.0
DVCC
V
DV UVLO
CC
DVCC_UVLO
2
ADDRESS
V , SDA, SCL
I C Address
0001 001[0]
Input High Threshold
Input Low Threshold
Pull-Down Current
70
%DV
%DV
IH
CC
V , SDA, SCL
IL
30
CC
I
SDA, SCL
2
μA
V
PD2
V
Digital Output Low (SDA)
Clock Operating Frequency
I
= 3mA
0.4
OL
SCL
BUF
PULLUP
f
t
400
kHz
μs
Bus Free Time Between Stop and Start
Condition
1.3
0.6
0.6
t
Hold Time After (Repeated) Start
Condition
μs
HD_STA
SU_STA
t
Repeated Start Condition Setup Time
μs
3555fd
4
LTC3555/LTC3555-X
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VBUS = 5V, BAT = 3.8V, DVCC = 3.3V, RPROG = 1k, RCLPROG = 3k,
unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
MIN
0.6
225
0
TYP
MAX
UNITS
μs
t
t
t
t
t
t
t
t
t
Stop Condition Time
Data Hold Time
SU_STD
ns
HD_DAT(OUT)
Input Data Hold Time
Data Setup Time
900
ns
HD_DAT(IN)
100
1.3
0.6
20
ns
SU_DAT
Clock Low Period
Clock High Period
Clock Data Fall Time
Clock Data Rise Time
Spike Suppression Time
μs
LOW
μs
HIGH
300
300
50
ns
f
20
ns
r
ns
SP
General Purpose Switching Regulators 1, 2 and 3
V
V
Input Supply Voltage
2.7
2.5
5.5
2.9
V
IN1,2,3
V
V
UVLO—V
UVLO—V
Falling
Rising
V
ConnectedtoV ThroughLow
OUT
2.6
2.8
V
V
OUTUVLO
OUT
OUT
OUT
OUT
IN1,2,3
Impedance.SwitchingRegulatorsareDisabledin
UVLO
f
I
Oscillator Frequency
FBx Input Current
1.8
–50
100
2.25
2.7
50
MHz
nA
OSC
V
= 0.85V
FB1,2,3
FB1,2,3
D
R
Maximum Duty Cycle
SWx Pull-Down in Shutdown
%
1,2,3
10
kꢀ
SW1,2,3_PD
General Purpose Switching Regulator 1
I
Pulse Skip Mode Input Current
Burst Mode Input Current
Forced Burst Mode® Input Current
LDO Mode Input Current
I
I
I
I
I
= 0μA (Note 6)
= 0μA (Note 6)
= 0μA (Note 6)
= 0μA (Note 6)
= 0μA, FB1 = 0V
225
35
μA
μA
μA
μA
μA
VIN1
OUT1
OUT1
OUT1
OUT1
OUT1
60
35
35
1
20
20
Shutdown Input Current
I
I
PMOS Switch Current Limit
Available Output Current
Pulse Skip/Burst Mode Operation
600
800
1100
mA
LIMSW1
OUT1
Pulse Skip/Burst Mode Operation (Note 7)
Forced Burst Mode Operation (Note 7)
LDO Mode (Note 7)
400
60
50
mA
mA
mA
l
V
V
Servo Voltage
FB1
(Note 8)
0.78
0.80
0.6
0.82
V
ꢀ
ꢀ
ꢀ
ꢀ
FB1
R
R
R
R
PMOS R
NMOS R
P1
DS(ON)
DS(ON)
0.7
N1
LDO Mode Closed-Loop R
0.25
2.5
LDO_CL1
LDO_OL1
OUT
LDO Mode Open-Loop R
(Note 9)
OUT
General Purpose Switching Regulator 2
I
Pulse Skip Mode Input Current
Burst Mode Input Current
Forced Burst Mode Input Current
LDO Mode Input Current
I
I
I
I
I
= 0μA (Note 6)
= 0μA (Note 6)
= 0μA (Note 6)
= 0μA (Note 6)
= 0μA, FB2 = 0V
225
35
μA
μA
μA
μA
μA
VIN2
OUT2
OUT2
OUT2
OUT2
OUT2
60
35
35
1
20
20
Shutdown Input Current
I
I
PMOS Switch Current Limit
Available Output Current
Pulse Skip/Burst Mode Operation
600
800
1100
mA
LIMSW2
OUT2
Pulse Skip/Burst Mode Operation (Note 7)
Forced Burst Mode Operation (Note 7)
LDO Mode (Note 7)
400
60
50
mA
mA
mA
Burst Mode is a registered trademark of Linear Technology Corporation.
3555fd
5
LTC3555/LTC3555-X
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VBUS = 5V, BAT = 3.8V, DVCC = 3.3V, RPROG = 1k, RCLPROG = 3k,
unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
MIN
0.78
TYP
0.80
0.425
25
MAX
0.82
UNITS
V
l
V
V
V
Maximum Servo Voltage
Minimum Servo Voltage
Full Scale (1, 1, 1, 1) (Note 8)
Zero Scale (0, 0, 0, 0) (Note 8)
FBHIGH2
FBLOW2
LSB2
0.405
0.445
V
V
FB2
Servo Voltage Step Size
mV
ꢀ
R
R
R
R
PMOS R
NMOS R
0.6
P2
DS(ON)
DS(ON)
0.7
ꢀ
N2
LDO Mode Closed-Loop R
0.25
2.5
ꢀ
LDO_CL2
LDO_OL2
OUT
LDO Mode Open-Loop R
(Note 9)
ꢀ
OUT
General Purpose Switching Regulator 3
I
Pulse Skip Mode Input Current
Burst Mode Input Current
Forced Burst Mode Input Current
LDO Mode Input Current
I
I
I
I
I
= 0μA (Note 6)
= 0μA (Note 6)
= 0μA (Note 6)
= 0μA (Note 6)
= 0μA, FB3 = 0V
225
35
μA
μA
μA
μA
μA
VIN3
OUT3
OUT3
OUT3
OUT3
OUT3
60
35
35
1
20
20
Shutdown Input Current
I
I
PMOS Switch Current Limit
Available Output Current
Pulse Skip/Burst Mode Operation
1500
2000
2800
mA
LIMSW3
Pulse Skip/Burst Mode Operation (Note 7)
Forced Burst Mode Operation (Note 7)
LDO Mode (Note 7)
1000
150
50
mA
mA
mA
OUT3
l
V
V
V
Maximum Servo Voltage
Minimum Servo Voltage
Full Scale (1, 1, 1, 1) (Note 8)
Zero Scale (0, 0, 0, 0) (Note 8)
0.78
0.80
0.425
25
0.82
V
V
FBHIGH3
FBLOW3
LSB3
0.405
0.445
V
FB
Servo Voltage Step Size
mV
ꢀ
R
R
R
R
PMOS R
NMOS R
0.18
0.30
0.25
2.5
P3
DS(ON)
DS(ON)
ꢀ
N3
LDO Mode Closed Loop R
ꢀ
LDOCL3
LDOOL3
RST3
OUT
LDO Mode Open Loop R
(Note 9)
ꢀ
OUT
t
Power On Reset Time for Switching
Regulator
V
FB3
Within 92% of Final Value to RST3 Hi-Z
230
ms
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 4: Total input current is the sum of quiescent current, I
measured current given by:
, and
VBUSQ
V
/R
• (h
+1)
CLPROG CLPROG
CLPROG
Note 5: h
is expressed as a fraction of measured full charge current
C/10
Note 2: The LTC3555E/LTC3555E-X are guaranteed to meet performance
specifications from 0°C to 85°C. Specifications over the –40°C to 85°C
operating temperature range are assured by design, characterization and
correlation with statistical process controls. The LTC3555I/LTC3555I-X are
guaranteed to meet performance specifications over the full –40°C to 85°C
operating temperature range.
Note 3: The LTC3555/LTC3555-X include overtemperature protection that
is intended to protect the device during momentary overload conditions.
Junction temperature will exceed 125°C when overtemperature protection
is active. Continuous operation above the specified maximum operating
junction temperature may impair device reliability.
with indicated PROG resistor.
Note 6: FBx above regulation such that regulator is in sleep. Specification
does not include resistive divider current reflected back to V
Note 7: Guaranteed by design but not explicitly tested.
Note 8: Applies to pulse skip, Burst Mode operation and forced Burst
Mode operation only.
Note 9: Inductor series resistance adds to open-loop R
.
INx
.
OUT
3555fd
6
LTC3555/LTC3555-X
TYPICAL PERFORMANCE CHARACTERISTICS
Ideal Diode Resistance
Output Voltage vs Output Current
(Battery Charger Disabled)
4.50
Ideal Diode V-I Characteristics
vs Battery Voltage
1.0
0.8
0.6
0.4
0.2
0
0.25
0.20
0.15
0.10
0.05
0
V
BUS
= 5V
INTERNAL IDEAL DIODE
WITH SUPPLEMENTAL
EXTERNAL VISHAY
Si2333 PMOS
BAT = 4V
5x MODE
4.25
4.00
3.75
3.50
3.25
INTERNAL IDEAL
DIODE
INTERNAL IDEAL
DIODE ONLY
BAT = 3.4V
INTERNAL IDEAL DIODE
WITH SUPPLEMENTAL
EXTERNAL VISHAY
Si2333 PMOS
V
V
= 0V
= 5V
BUS
BUS
0
0.04
0.08
0.12
0.16
0.20
2.7
3.0
3.3
3.6
3.9
4.2
0
200
400
600
800
1000
FORWARD VOLTAGE (V)
BATTERY VOLTAGE (V)
OUTPUT CURRENT (mA)
3555 G01
3555 G02
3555 G03
Battery Drain Current
vs Battery Voltage
USB Limited Battery Charge
Current vs Battery Voltage
USB Limited Battery Charge
Current vs Battery Voltage
150
125
700
600
25
20
15
10
5
LTC3555
I
= 0μA
VOUT
LTC3555
V
= 0V
BUS
LTC3555-1/
LTC3555-3
LTC3555-1/
LTC3555-3
V
R
R
= 5V
V
R
R
= 5V
BUS
500
400
300
200
100
0
BUS
100
75
= 1k
= 1k
PROG
CLPROG
PROG
CLPROG
= 3k
= 3k
LTC3555-3
LTC3555-3
50
25
0
V
= 5V
BUS
(SUSPEND MODE)
1x USB SETTING,
BATTERY CHARGER SET FOR 1A
5x USB SETTING,
BATTERY CHARGER SET FOR 1A
0
2.7 3.0 3.3 3.6
BATTERY VOLTAGE (V)
3.9
4.2
3.0 3.3 3.6
BATTERY VOLTAGE (V)
4.2
2.7
3.9
2.7
3.0
3.3
3.6
3.9
4.2
BATTERY VOLTAGE (V)
3555 G05
3555 G04
3555 G06
Battery Charging Efficiency vs
Battery Voltage with No External
Load (PBAT/PBUS
PowerPath Switching Regulator
Efficiency vs Output Current
VBUS Current vs VBUS Voltage
(Suspend)
)
100
90
80
70
60
50
40
100
90
80
70
60
50
40
30
20
10
0
BAT = 3.8V
R
R
I
= 3k
CLPROG
PROG
VOUT
BAT = 3.8V
5x, 10x MODE
= 1k
I
= 0mA
1x MODE
VOUT
= 0mA
LTC3555-1/
LTC3555-3
LTC3555-3
1x CHARGING EFFICIENCY
5x CHARGING EFFICIENCY
0.01
0.1
1
2.7
3.0
3.3
3.6
3.9
4.2
0
1
2
3
4
5
OUTPUT CURRENT (A)
BATTERY VOLTAGE (V)
BUS VOLTAGE (V)
3555 G07
3555 G08
3555 G09
3555fd
7
LTC3555/LTC3555-X
TYPICAL PERFORMANCE CHARACTERISTICS
Output Voltage vs Load Current in
Suspend
VBUS Current vs Load Current in
Suspend
3.3V LDO Output Voltage vs Load
Current, VBUS = 0V
5.0
4.5
4.0
3.5
3.0
2.5
3.4
3.2
3.0
2.8
2.6
0.5
0.4
0.3
0.2
0.1
0
BAT = 3.5V
V
= 5V
BAT = 3.9V, 4.2V
BUS
BAT = 3.4V
BAT = 3.6V
BAT = 3.3V
= 3k
R
CLPROG
BAT = 3V
BAT = 3.1V
BAT = 3.2V
BAT = 3.3V
V
= 5V
BUS
BAT = 3.3V
= 3k
R
CLPROG
0
0.1
0.2
0.3
0.4
0.5
0
5
10
15
20
25
0
0.1
0.2
0.3
0.4
0.5
LOAD CURRENT (mA)
LOAD CURRENT (mA)
LOAD CURRENT (mA)
3555 G10
3555 G12
3555 G11
Battery Charge Current vs
Temperature
Normalized Battery Charger Float
Voltage vs Temperature
Low-Battery (Instant-On) Output
Voltage vs Temperature
3.68
3.66
3.64
3.62
3.60
1.001
1.000
0.999
0.998
0.997
0.996
600
500
400
300
200
100
0
BAT = 2.7V
I
= 100mA
VOUT
5x MODE
THERMAL REGULATION
R
= 2k
PROG
10x MODE
60 80
20 40
TEMPERATURE (°C)
–40
–15
10
35
60
85
–40 –20
0
100 120
–40
–15
10
35
60
85
TEMPERATURE (°C)
TEMPERATURE (°C)
3555 G15
3555 G13
3555 G14
Oscillator Frequency vs
Temperature
V
BUS Quiescent Current in
VBUS Quiescent Current vs
Temperature
Suspend vs Temperature
2.6
2.4
2.2
2.0
1.8
15
12
9
70
60
50
40
30
V
VOUT
= 5V
= 0μA
I
= 0μA
BUS
VOUT
I
5x MODE
BAT = 3.6V
= 0V
V
= 5V
BUS
V
BUS
BAT = 3V
= 0V
1x MODE
V
BUS
6
BAT = 2.7V
= 0V
V
BUS
3
–40
–15
10
35
60
85
–40
–15
10
35
60
85
–40
–15
10
35
60
85
TEMPERATURE (°C)
TEMPERATURE (°C)
TEMPERATURE (°C)
3555 G16
3555 G17
3555 G18
3555fd
8
LTC3555/LTC3555-X
TYPICAL PERFORMANCE CHARACTERISTICS
RST3, CHRG Pin Current vs
3.3V LDO Step Response
(5mA to 15mA)
Battery Drain Current vs
Temperature
Voltage (Pull-Down State)
100
80
60
40
20
0
50
V
= 5V
BAT = 3.8V
BUS
BAT = 3.8V
V
= 0V
BUS
BUCK REGULATORS OFF
I
LDO3V3
40
30
20
10
0
5mA/DIV
0mA
V
LDO3V3
20mV/DIV
AC COUPLED
3555 G20
BAT = 3.8V
20μs/DIV
0
1
2
3
4
5
–40
–15
10
35
60
85
RST3, CHRG PIN VOLTAGE (V)
TEMPERATURE (°C)
3555 G19
3555 G21
R
DS(ON) for Switching Regulator
Switching Regulator Current Limit
vs Temperature
Switching Regulator Low Power
Mode Quiescent Currents
Power Switches vs Temperature
50
40
30
20
10
0
1.0
0.8
0.6
0.4
0.2
0
2.0
1.5
1.0
0.5
0
V
V
= 3.8V
IN1,2,3
OUT1,2,3
REGULATOR 3
= 2.5V
REGULATORS 1, 2
NMOS SWITCH
Burst Mode
OPERATION
FORCED
Burst Mode
OPERATION
PMOS SWITCH
REGULATOR 3
REGULATORS 1, 2
LDO MODE
NMOS SWITCH
PMOS SWITCH
V
= 3.8V
IN1,2,3
–40
–15
10
35
60
85
–40
–15
10
35
60
85
–40
–15
10
35
60
85
TEMPERATURE (°C)
TEMPERATURE (°C)
TEMPERATURE (°C)
3555 G24
3555 G22
3555 G23
Switching Regulators 1, 2 Pulse
Skip Mode Quiescent Currents
Switching Regulator 3 Pulse Skip
Mode Quiescent Currents
Switching Regulator Soft-Start
Waveform
325
300
275
250
225
200
1.95
1.90
1.85
1.80
1.75
1.70
400
350
300
250
200
11
10
9
V
= 3.8V
V
= 2.5V
IN1,2
OUT3
V
= 2.5V
OUT1,2
(CONSTANT FREQUENCY)
V
= 3.5V
IN3
(CONSTANT FREQUENCY)
8
3555 G27
V
= 3.8V
IN3
50μs/DIV
V
= 1.25V
OUT1,2
(PULSE
(PULSE SKIPPING)
SKIPPING)
7
–40
–15
10
35
60
85
–40
–15
10
35
60
85
TEMPERATURE (°C)
TEMPERATURE (°C)
3555 G25
3555 G26
3555fd
9
LTC3555/LTC3555-X
TYPICAL PERFORMANCE CHARACTERISTICS
Switching Regulators 1, 2
Pulse Skip Mode Efficiency
Switching Regulators 1, 2
Burst Mode Efficiency
Switching Regulators 1, 2
Forced Burst Mode Efficiency
100
90
80
70
60
50
40
30
20
10
0
100
90
80
70
60
50
40
30
20
10
0
100
90
V
= 2.5V
V
= 2.5V
OUT1,2
OUT1,2
V
= 2.5V
OUT1,2
80
V
= 1.2V
OUT1,2
V
= 1.2V
OUT1,2
V
= 1.2V
OUT1,2
V
= 1.8V
70
OUT1,2
V
= 1.8V
OUT1,2
V
= 1.8V
OUT1,2
60
50
40
30
20
10
0
V
= 3.8V
V
= 3.8V
V
= 3.8V
IN1,2
IN1,2
IN1,2
0.1
1
10
100
1000
0.1
1
10
100
1000
1
10
100
1000
LOAD CURRENT (mA)
LOAD CURRENT (mA)
LOAD CURRENT (mA)
3555 G29
3555 G30
3555 G28
Switching Regulator 3
Pulse Skip Mode Efficiency
Switching Regulator 3
Burst Mode Efficiency
Switching Regulator 3
Forced Burst Mode Efficiency
100
90
100
90
80
70
60
50
40
30
20
10
0
100
90
80
70
60
50
40
30
20
10
0
V
= 3.8V
V
= 3.8V
V
= 2.5V
V
= 3.8V
IN3
V
= 2.5V
IN3
OUT3
IN3
OUT3
80
V
= 2.5V
V
= 1.2V
OUT3
V
= 1.2V
OUT3
OUT3
70
V
= 1.2V
V
= 1.8V
V
= 1.8V
OUT3
OUT3
OUT3
60
50
V
= 1.8V
OUT3
40
30
20
10
0
1
10
100
1000
0.1
1
10
100
1000
0.1
1
10
100
1000
LOAD CURRENT (mA)
LOAD CURRENT (mA)
LOAD CURRENT (mA)
3555 G31
3555 G32
3555 G33
Switching Regulators 1, 2 Load
Regulation at VOUT1,2 = 1.2V
Switching Regulators 1, 2 Load
Regulation at VOUT1,2 = 1.8V
Switching Regulators 1, 2 Load
Regulation at VOUT1,2 = 2.5V
1.845
1.823
1.800
2.56
2.53
2.50
1.230
1.215
1.200
V
= 3.8V
V
= 3.8V
IN1,2
V
= 3.8V
IN1,2
IN1,2
Burst Mode
OPERATION
Burst Mode OPERATION
PULSE SKIP MODE
Burst Mode OPERATION
PULSE SKIP MODE
FORCED
Burst Mode
OPERATION
FORCED
Burst Mode
OPERATION
PULSE SKIP
MODE
1.778
1.755
2.47
2.44
1.185
1.170
FORCED
Burst Mode
OPERATION
0.1
1
10
100
1000
0.1
1
10
100
1000
0.1
1
10
100
1000
LOAD CURRENT (mA)
LOAD CURRENT (mA)
LOAD CURRENT (mA)
3555 G35
3555 G36
3555 G34
3555fd
10
LTC3555/LTC3555-X
PIN FUNCTIONS
2
LDO3V3 (Pin 1): 3.3V LDO Output Pin. This pin provides
DV (Pin 8): Logic Supply for the I C Serial Port. If the
CC
a regulated always-on 3.3V supply voltage. LDO3V3
serial port is not needed it can be disabled by grounding
gets its power from V . It may be used for light loads
DV . When DV is grounded, chip control is automati-
OUT
CC CC
such as a watchdog microprocessor or real time clock.
A 1μF capacitor is required from LDO3V3 to ground. If
the LDO3V3 output is not used it should be disabled by
cally passed to the individual logic input pins.
2
SCL (Pin 9): Clock Input Pin for the I C Serial Port. The
2
I C logic levels are scaled with respect to DV . If DV
CC
CC
connecting it to V
.
OUT
is grounded, the SCL pin is equivalent to the B5 bit in the
2
CLPROG (Pin 2): USB Current Limit Program and Moni-
I C serial port. SCL in conjunction with SDA determine
tor Pin. A resistor from CLPROG to ground determines
the operating modes of switching regulators 1, 2 and 3
the upper limit of the current drawn from the V
pin.
when DV is grounded. See Tables 2 and 5.
BUS
CC
A fraction of the V
current is sent to the CLPROG pin
2
BUS
SDA (Pin 10): Data Input Pin for the I C Serial Port. The
when the synchronous switch of the PowerPath switching
regulatorison.Theswitchingregulatordeliverspoweruntil
2
I C logic levels are scaled with respect to DV . If DV
CC
CC
is grounded, the SDA pin is equivalent to the B6 bit in the
theCLPROGpinreaches1.188V.SeveralV currentlimit
2
BUS
I C serial port. SDA in conjunction with SCL determine
settings are available via user input which will typically
correspond to the 500mA and 100mA USB specifications.
A multi-layer ceramic averaging capacitor or R-C network
is required at CLPROG for filtering.
the operating modes of switching regulators 1, 2 and 3
when DV is grounded. See Tables 2 and 5.
CC
V
IN3
(Pin 11): Power Input for Switching Regulator 3.
This pin will generally be connected to V . A 1μF MLCC
OUT
NTC (Pin 3): Input to the Thermistor Monitoring Circuits.
The NTC pin connects to a battery’s thermistor to deter-
mine if the battery is too hot or too cold to charge. If the
battery’s temperature is out of range, charging is paused
until it re-enters the valid range. A low drift bias resistor
capacitor is recommended on this pin.
SW3 (Pin 12): Power Transmission Pin for Switching
Regulator 3.
EN3 (Pin 13): Logic Input. This logic input pin indepen-
is required from V
to NTC and a thermistor is required
BUS
dently enables switching regulator 3. This pin is logically
2
from NTC to ground. If the NTC function is not desired,
OR-ed with its corresponding bit in the I C serial port.
the NTC pin should be grounded.
See Table 2.
FB2 (Pin 4): Feedback Input for Switching Regulator 2.
Whenregulator2’scontrolloopiscomplete,thispinservos
to 1 of 16 possible set-points based on the commanded
FB3 (Pin 14): Feedback Input for Switching Regulator 3.
Whenregulator3’scontrolloopiscomplete,thispinservos
to 1 of 16 possible set-points based on the commanded
2
2
value from the I C serial port. See Table 4.
value from the I C serial port. See Table 4.
V
(Pin 5): Power Input for Switching Regulator 2.
IN2
RST3 (Pin 15): Logic Output. This in an open-drain output
which indicates that switching regulator 3 has settled to
its final value. It can be used as a power-on reset for the
primary microprocessor or to enable the other switching
regulators for supply sequencing.
This pin will generally be connected to V . A 1μF MLCC
OUT
capacitor is recommended on this pin.
SW2 (Pin 6): Power Transmission Pin for Switching
Regulator 2.
EN1 (Pin 16): Logic Input. This logic input pin indepen-
EN2 (Pin 7): Logic Input. This logic input pin indepen-
dently enables switching regulator 1. This pin is logically
dently enables switching regulator 2. This pin is logically
2
2
OR-ed with its corresponding bit in the I C serial port.
OR-ed with its corresponding bit in the I C serial port.
See Table 2.
See Table 2.
3555fd
11
LTC3555/LTC3555-X
PIN FUNCTIONS
SW1 (Pin 17): Power Transmission Pin for Switching
Regulator 1.
BAT (Pin 23): Single Cell Li-Ion Battery Pin. Depending on
available V power, a Li-Ion battery on BAT will either
BUS
deliverpowertoV throughtheidealdiodeorbecharged
OUT
V
(Pin 18): Power Input for Switching Regulator 1.
IN1
from V
via the battery charger.
OUT
This pin will generally be connected to V . A 1μF MLCC
OUT
capacitor is recommended on this pin.
V
OUT
(Pin 24): Output voltage of the Switching PowerPath
Controller and Input Voltage of the Battery Charger. The
majority of the portable product should be powered from
FB1 (Pin 19): Feedback Input for Switching Regulator 1.
Whenregulator1’scontrolloopiscomplete,thispinservos
to a fixed voltage of 0.8V.
V
. TheLTC3555familywillpartitiontheavailablepower
OUT
between the external load on V
and the internal battery
OUT
PROG (Pin 20): Charge Current Program and Charge
Current Monitor Pin. Connecting a resistor from PROG
to ground programs the charge current. If sufficient in-
put power is available in constant-current mode, this pin
servos to 1V. The voltage on this pin always represents
the actual charge current.
charger. Priority is given to the external load and any extra
power is used to charge the battery. An ideal diode from
BAT to V
ensures that V
is powered even if the load
OUT
OUT
exceeds the allotted power from V
or if the V
power
BUS
BUS
source is removed. V
should be bypassed with a low
OUT
impedance ceramic capacitor.
CHRG (Pin 21): Open-Drain Charge Status Output. The
CHRG pin indicates the status of the battery charger. Four
possible states are represented by CHRG: charging, not
charging, unresponsive battery and battery temperature
out of range. CHRG is modulated at 35kHz and switches
between a low and a high duty cycle for easy recogni-
tion by either humans or microprocessors. See Table 1.
CHRG requires a pull-up resistor and/or LED to provide
indication.
V
(Pin 25): Primary Input Power Pin. This pin delivers
BUS
powertoV viatheSWpinbydrawingcontrolledcurrent
OUT
from a DC source such as a USB port or wall adapter.
SW (Pin 26): Power Transmission Pin for the USB Power
Path. The SW pin delivers power from V
step-down switching regulator. A 3.3μH inductor should
be connected from SW to V
to V
via the
BUS
OUT
.
OUT
I
, I
(Pins 27, 28): Logic Inputs. I
and I
LIM0 LIM1
LIM0 LIM1
control the current limit of the PowerPath switching
GATE (Pin 22): Analog Output. This pin controls the gate
of an optional external P-channel MOSFET transistor used
regulator. See Table 3. Both of the I
and I
pins are
LIM0
LIM1
2
logically OR-ed with their corresponding bits in the I C
serial port. See Table 2.
to supplement the ideal diode between V
and BAT. The
OUT
external ideal diode operates in parallel with the internal
ideal diode. The source of the P-channel MOSFET should
Exposed Pad (Pin 29): Ground. The Exposed Pad should
be connected to a continuous ground plane on the second
layer of the printed circuit board by several vias directly
under the part.
be connected to V
and the drain should be connected
OUT
to BAT. If the external ideal diode FET is not used, GATE
should be left floating.
3555fd
12
LTC3555/LTC3555-X
BLOCK DIAGRAM
V
BUS
25
2.25MHz
PowerPath
SWITCHING
REGULATOR
SW
26
1
LDO3V3
3.3V LDO
SUSPEND
LDO
500μA
V
24
22
OUT
+
–
+
–
+
+
GATE
IDEAL
CC/CV
CLPROG
NTC
2
3
–
CHARGER
–
+
15mV
0.3V
–
+
BATTERY
TEMPERATURE
MONITOR
BAT
23
20
18
1.188V
3.6V
PROG
V
IN1
CHRG 21
ENABLE
CHARGE
STATUS
17 SW1
400mA 2.25MHz
SWITCHING
REGULATOR 1
FB1
19
V
5
6
IN2
ENABLE
SW2
FB2
400mA 2.25MHz
SWITCHING
D/A
D/A
REGULATOR 2
4
4
I
LIM
DECODE
LOGIC
V
11
IN3
ENABLE
12 SW3
1A 2.25MHz
SWITCHING
REGULATOR 3
I
I
27
28
LIM0
LIM1
FB3
14
15
4
RST3
EN1 16
EN2
EN3 13
DV
7
8
CC
2
SDA 10
SCL
I C PORT
9
29
3555 BD
GND
3555fd
13
LTC3555/LTC3555-X
TIMING DIAGRAM
DATA BYTE A
DATA BYTE B
ADDRESS
WR
0
0
0
0
1
0
0
1
1
A7
1
A6
2
A5
3
A4
A3
A2
6
A1
7
A0
8
B7
1
B6
2
B5
3
B4
B3
B2
6
B1
7
B0
8
START
STOP
SDA
SCL
0
0
0
1
0
0
0
8
ACK
9
ACK
9
ACK
9
1
2
3
4
5
6
7
4
5
4
5
SDA
t
t
t
BUF
SU, DAT
SU, STA
t
t
t
t
LOW
HD, STA
SU, STO
HD, DAT
3555 TD
SCL
t
t
t
SP
HD, STA
HIGH
START
CONDITION
REPEATED START
CONDITION
STOP
CONDITION
START
CONDITION
t
t
f
r
OPERATION
The three general purpose switching regulators can be
independently enabled via either direct digital control or
Introduction
The LTC3555 family are highly integrated power manage-
ment ICs which include a high efficiency switch mode
PowerPath controller, a battery charger, an ideal diode,
an always-on LDO and three general purpose step-down
switchingregulators.Theentirechipiscontrolledbyeither
2
2
by operating the I C serial port. Under I C control, two of
the three switching regulators have adjustable set-points
so that voltages can be reduced when high processor
performanceisnotneeded.Alongwithconstantfrequency
PWM mode, all three switching regulators have a low
power burst-only mode setting as well as automatic Burst
Mode operation and LDO modes for significantly reduced
quiescent current under light load conditions.
2
direct digital control, by an I C serial port or both.
DesignedspecificallyforUSBapplications,thePowerPath
controller incorporates a precision average input current
step-down switching regulator to make maximum use of
theallowableUSBpower.Becausepowerisconserved,the
LTC3555 family allows the load current on V
the current drawn by the USB port without exceeding the
USB load specifications.
High Efficiency Switching PowerPath Controller
to exceed
OUT
Whenever V
is available and the PowerPath switch-
BUS
ing regulator is enabled, power is delivered from V
to
BUS
V
OUT
via SW. V
drives the combination of the external
OUT
load (switching regulators 1, 2 and 3) and the battery
charger.
The PowerPath switching regulator and battery charger
communicatetoensurethattheinputcurrentneverviolates
the USB specifications.
IfthecombinedloaddoesnotexceedthePowerPathswitch-
ing regulator’s programmed input current limit, V
will
The ideal diode from BAT to V
guarantees that ample
even if there is insuf-
OUT
OUT
track0.3Vabovethebattery.Bykeepingthevoltageacross
the battery charger low, efficiency is optimized because
powerlosttothelinearbatterychargerisminimized.Power
available to the external load is therefore optimized.
power is always available to V
OUT
.
ficient or absent power at V
BUS
An “always on” LDO provides a regulated 3.3V from
available power at VOUT. Drawing very little quiescent
current, this LDO will be on at all times and can be used
to supply up to 25mA.
3555fd
14
LTC3555/LTC3555-X
OPERATION
If the combined load at V
4.5
4.2
3.9
3.6
3.3
3.0
2.7
2.4
is large enough to cause the
OUT
switching power supply to reach the programmed input
currentlimit,thebatterychargerwillreduceitschargecur-
rent by that amount necessary to enable the external load
to be satisfied. Even if the battery charge current is set to
exceed the allowable USB current, the USB specification
will not be violated. The switching regulator will limit the
averageinputcurrentsothattheUSBspecificationisnever
violated. Furthermore, load current at V
prioritized and only excess available power will be used
to charge the battery.
NO LOAD
300mV
will always be
OUT
3.6
4.2
2.4
2.7
3.0
3.3
3.9
BAT (V)
3555 F01
If the voltage at BAT is below 3.3V, or the battery is not
present, and the load requirement does not cause the
switching regulator to exceed the USB specification,
Figure 1. VOUT vs BAT
V
will regulate at 3.6V. If the load exceeds the avail-
The LTC3555 vs the LTC3555-1 and LTC3555-3
OUT
able power, V
will drop to a voltage between 3.6V and
OUT
For very low battery voltages, the battery charger acts
like a load and, due to limited input power, its current will
the battery voltage. If there is no battery present when
the load exceeds the available USB power, V
toward ground.
can drop
OUT
tend to pull V
below the 3.6V “instant-on” voltage. To
from falling below this level, the LTC3555-1
OUT
prevent V
OUT
The power delivered from V
to V
is controlled
OUT
and LTC3555-3 include an undervoltage circuit that auto-
matic detects that V is falling and reduces the battery
BUS
by a 2.25MHz constant-frequency step-down switching
regulator. To meet the USB maximum load specification,
the switching regulator includes a control loop which
ensures that the average input current is below the level
programmed at CLPROG.
OUT
chargecurrentasneeded.Thisreductionensuresthatload
current and output voltage are always prioritized and yet
delivers as much battery charge current as possible. The
standard LTC3555 does not include this circuit and thus
favors maximum charge current at all times over output
voltage preservation.
–1
ThecurrentatCLPROGisafraction(h
)oftheV
BUS
CLPROG
current. When a programming resistor and an averaging
capacitorareconnectedfromCLPROGtoGND,thevoltage
on CLPROG represents the average input current of the
switching regulator. When the input current approaches
If instant-on operation under low battery conditions is a
requirement then the LTC3555-1 or LTC3555-3 should
be used. If maximum charge efficiency at low battery
voltages is preferred, and instant-on operation is not
a requirement, then the standard LTC3555 should be
selected. All versions of the LTC3555 family will start up
with a removed battery.
theprogrammedlimit, CLPROGreachesV
, 1.188V,
CLPROG
and power out is held constant. The input current limit
2
is programmed by the I
and I
pins or by the I C
LIM0
LIM1
serial port. It can be configured to limit average input
current to one of several possible settings as well as be
deactivated (USB suspend). The input current limit will
TheLTC3555-3hasabatterychargerfloatvoltageof4.100V
rather than the 4.200V float voltage of the LTC3555 and
LTC3555-1.
be set by the V
servo voltage and the resistor on
CLPROG
CLPROG according to the following expression:
Ideal Diode from BAT to V
OUT
VCLPROG
RCLPROG
IVBUS =IVBUSQ
+
• h
(
+1
)
CLPROG
The LTC3555 family has an internal ideal diode as well as
a controller for an optional external ideal diode. The ideal
diode controller is always on and will respond quickly
Figure 1 shows the range of possible voltages at V
a function of battery voltage.
as
OUT
whenever V
drops below BAT.
OUT
3555fd
15
LTC3555/LTC3555-X
OPERATION
atBAT. Theresistanceoftheinternalidealdiodeisapproxi-
mately180mꢀ. Ifthisissufficientfortheapplication, then
no external components are necessary. However, if more
conductance is needed, an external P-channel MOSFET
If the load current increases beyond the power allowed
from the switching regulator, additional power will be
pulled from the battery via the ideal diode. Furthermore,
if power to V
(USB or wall power) is removed, then all
BUS
transistor can be added from BAT to V
.
of the application power will be provided by the battery
via the ideal diode. The transition from input power to
OUT
When an external P-channel MOSFET transistor is pres-
ent, the GATE pin of the LTC3555 family drives its gate for
automatic ideal diode control. The source of the external
battery power at V
will be quick enough to allow only
OUT
the 10μF capacitor to keep V
from drooping. The ideal
OUT
diode consists of a precision amplifier that enables a large
P-channel MOSFET should be connected to V
and the
OUT
on-chipP-channelMOSFETtransistorwheneverthevoltage
drain should be connected to BAT. Capable of driving a
1nF load, the GATE pin can control an external P-channel
MOSFET transistor having an on-resistance of 40mꢀ or
lower.
at V
is approximately 15mV (V ) below the voltage
OUT
FWD
2200
VISHAY Si2333
2000
OPTIONAL EXTERNAL
1800
1600
1400
1200
1000
800
IDEAL DIODE
Suspend LDO
If the LTC3555 family is configured for USB suspend
mode, theswitchingregulatorisdisabledandthesuspend
LTC3555
IDEAL DIODE
LDO provides power to the V
pin (presuming there is
OUT
power available to V ). This LDO will prevent the bat-
BUS
600
ON
tery from running down when the portable product has
access to a suspended USB port. Regulating at 4.6V, this
LDO only becomes active when the switching converter
is disabled (suspended). To remain compliant with the
USB specification, the input to the LDO is current limited
so that it will not exceed the 500μA low power suspend
SEMICONDUCTOR
MBRM120LT3
400
200
0
0
120 180 240 300 360 420 480
FORWARD VOLTAGE (mV) (BAT – V
60
)
OUT
3555 F02
3.5V TO
TO USB
OR WALL
ADAPTER
V
BUS
SW
OUT
(BAT + 0.3V)
TO SYSTEM
LOAD
25
26
24
V
PWM AND
GATE DRIVE
IDEAL
DIODE
I
/
SWITCH
OPTIONAL
h
CLPROG
+
–
GATE
BAT
EXTERNAL
IDEAL DIODE
PMOS
CONSTANT CURRENT
CONSTANT VOLTAGE
BATTERY CHARGER
22
23
–
+
15mV
–
+
–
+
+
0.3V
CLPROG
1.188V
2
+
–
3.6V
AVERAGE INPUT
CURRENT LIMIT
CONTROLLER
AVERAGE OUTPUT
VOLTAGE LIMIT
CONTROLLER
+
SINGLE CELL
Li-Ion
3555 F03
Figure 3. PowerPath Block Diagram
3555fd
16
LTC3555/LTC3555-X
OPERATION
specification. If the load on V
current limit, the additional current will come from the
battery via the ideal diode.
exceeds the suspend
current delivered to the battery will try to reach 1022V/
PROG
OUT
R
. Depending on available input power and external
load conditions, the battery charger may or may not be
able to charge at the full programmed rate. The external
load will always be prioritized over the battery charge
current. The USB current limit programming will always
be observed and only additional power will be available to
charge the battery. When system loads are light, battery
charge current will be maximized.
3.3V Always-On LDO Supply
The LTC3555 family includes a low quiescent current low
dropoutregulatorthatisalwayspowered. ThisLDOcanbe
used to provide power to a system pushbutton controller,
standby microcontroller or real time clock. Designed to
deliver up to 25mA, the always-on LDO requires at least
a 1μF low impedance ceramic bypass capacitor for com-
pensation. The LDO is powered from V
will enter dropout at loads less than 25mA as V
near 3.3V. If the LDO3V3 output is not used, it should be
disabled by connecting it to V
Charge Termination
, and therefore
The battery charger has a built-in safety timer. When the
voltage on the battery reaches the pre-programmed float
voltage, the battery charger will regulate the battery volt-
age and the charge current will decrease naturally. Once
the battery charger detects that the battery has reached
the float voltage, the four hour safety timer is started.
After the safety timer expires, charging of the battery will
discontinue and no more current will be delivered.
OUT
falls
OUT
.
OUT
V
BUS
Undervoltage Lockout (UVLO)
AninternalundervoltagelockoutcircuitmonitorsV and
BUS
keeps the PowerPath switching regulator off until V
BUS
rises above 4.30V and is about 200mV above the battery
Automatic Recharge
voltage. Hysteresis on the UVLO turns off the regulator if
After the battery charger terminates, it will remain off
drawing only microamperes of current from the battery.
If the portable product remains in this state long enough,
the battery will eventually self discharge. To ensure that
the battery is always topped off, a charge cycle will auto-
matically begin when the battery voltage falls below the
recharge threshold which is typically 100mV less than
the charger’s float voltage. In the event that the safety
timer is running when the battery voltage falls below the
recharge threshold, it will reset back to zero. To prevent
brief excursions below the recharge threshold from reset-
ting the safety timer, the battery voltage must be below
the recharge threshold for more than 1.3ms. The charge
V
drops below 4.00V or to within 50mV of BAT. When
BUS
this happens, system power at V
the battery via the ideal diode.
will be drawn from
OUT
Battery Charger
The LTC3555 family includes a constant-current/
constant-voltagebatterychargerwithautomaticrecharge,
automatic termination by safety timer, low voltage trickle
charging, bad cell detection and thermistor sensor input
for out-of-temperature charge pausing.
Battery Preconditioning
When a battery charge cycle begins, the battery charger
first determines if the battery is deeply discharged. If the
batteryvoltageisbelowV
trickle charge feature sets the battery charge current to
10% of the programmed value. If the low voltage persists
for more than 1/2 hour, the battery charger automatically
terminates and indicates via the CHRG pin that the battery
was unresponsive.
cycle and safety timer will also restart if the V
UVLO
BUS
cycles low and then high (e.g., V
is removed and then
BUS
,typically2.85V,anautomatic
replaced), or if the battery charger is cycled on and off
TRKL
2
by the I C port.
Charge Current
The charge current is programmed using a single resis-
tor from PROG to ground. 1/1022th of the battery charge
current is sent to PROG which will attempt to servo to
1.000V. Thus, the battery charge current will try to reach
3555fd
Oncethebatteryvoltageisabove2.85V,thebatterycharger
begins charging in full power constant-current mode. The
17
LTC3555/LTC3555-X
OPERATION
1022 times the current in the PROG pin. The program
resistor and the charge current are calculated using the
following equations:
duty cycles are disparate enough to make an LED appear
to be on or off thus giving the appearance of “blinking”.
Each of the two faults has its own unique “blink” rate for
human recognition as well as two unique duty cycles for
machine recognition.
1022V
ICHG
1022V
RPROG
RPROG
=
, ICHG =
The CHRG pin does not respond to the C/10 threshold if
Ineithertheconstant-currentorconstant-voltagecharging
modes, the voltage at the PROG pin will be proportional to
the actual charge current delivered to the battery. There-
fore, the actual charge current can be determined at any
time by monitoring the PROG pin voltage and using the
following equation:
the LTC3555 family is in V
current limit. This prevents
BUS
false end-of-charge indications due to insufficient power
available to the battery charger.
Table 1 illustrates the four possible states of the CHRG
pin when the battery charger is active.
VPROG
RPROG
Table 1. CHRG Signal
IBAT
=
•1022
MODULATION
STATUS
FREQUENCY (BLINK) FREQUENCY
DUTY CYCLES
100%
In many cases, the actual battery charge current, I , will
BAT
Charging
0Hz
0Hz
0Hz (Lo-Z)
0Hz (Hi-Z)
belowerthanI
duetolimitedinputpoweravailableand
CHG
Not Charging
NTC Fault
Bad Battery
0%
prioritization with the system load drawn from V
.
OUT
35kHz
35kHz
1.5Hz at 50%
6.1Hz at 50%
6.25% to 93.75%
12.5% to 87.5%
Charge Status Indication
An NTC fault is represented by a 35kHz pulse train whose
duty cycle varies between 6.25% and 93.75% at a 1.5Hz
rate. A human will easily recognize the 1.5Hz rate as a
“slow” blinking which indicates the out-of-range battery
temperaturewhileamicroprocessorwillbeabletodecode
either the 6.25% or 93.75% duty cycles as an NTC fault.
The CHRG pin indicates the status of the battery charger.
Four possible states are represented by CHRG which in-
clude charging, not charging, unresponsive battery, and
battery temperature out of range.
The signal at the CHRG pin can be easily recognized as
one of the above four states by either a human or a mi-
croprocessor. An open-drain output, the CHRG pin can
drive an indicator LED through a current limiting resistor
for human interfacing or simply a pull-up resistor for
microprocessor interfacing.
If a battery is found to be unresponsive to charging (i.e.,
its voltage remains below 2.85V for 1/2 hour), the CHRG
pingivesthebatteryfaultindication.Forthisfault,ahuman
would easily recognize the frantic 6.1Hz “fast” blink of the
LEDwhileamicroprocessorwouldbeabletodecodeeither
the 12.5% or 87.5% duty cycles as a bad battery fault.
To make the CHRG pin easily recognized by both humans
and microprocessors, the pin is either low for charging,
high for not charging, or it is switched at high frequency
(35kHz) to indicate the two possible faults, unresponsive
battery and battery temperature out of range.
NotethattheLTC3555familyisathreeterminalPowerPath
productwheresystemloadisalwaysprioritizedoverbattery
charging. Due to excessive system load, there may not be
sufficient power to charge the battery beyond the trickle
charge threshold voltage within the bad battery timeout
period. Inthiscase, thebatterychargerwillfalselyindicate
a bad battery. System software may then reduce the load
and reset the battery charger to try again.
When charging begins, CHRG is pulled low and remains
low for the duration of a normal charge cycle. When
charging is complete, i.e., the BAT pin reaches the float
voltage and the charge current has dropped to one tenth
oftheprogrammedvalue, theCHRGpinisreleased(Hi-Z).
If a fault occurs, the pin is switched at 35kHz. While
switching, its duty cycle is modulated between a low
and high value at a very low frequency. The low and high
Although very improbable, it is possible that a duty cycle
reading could be taken at the bright-dim transition (low
duty cycle to high duty cycle). When this happens the
3555fd
18
LTC3555/LTC3555-X
OPERATION
duty cycle reading will be precisely 50%. If the duty cycle
reading is 50%, system software should disqualify it and
take a new duty cycle reading.
than worst-case conditions with the assurance that the
battery charger will automatically reduce the current in
worst-case conditions.
2
NTC Thermistor
I C Interface
The battery temperature is measured by placing a nega-
tive temperature coefficient (NTC) thermistor close to the
battery pack.
The LTC3555 family may receive commands from a host
2
(master)usingthestandardI C2-wireinterface.TheTiming
Diagram shows the timing relationship of the signals on
the bus. The two bus lines, SDA and SCL, must be high
when the bus is not in use. External pull-up resistors or
To use this feature, connect the NTC thermistor, R
,
,
NTC
between the NTC pin and ground and a resistor, R
NOM
2
current sources, such as the LTC1694 I C accelerator, are
from V
to the NTC pin. R
should be a 1% resistor
BUS
NOM
required on these lines. The LTC3555 family is a receive-
with a value equal to the value of the chosen NTC therm-
istor at 25°C (R25). For applications requiring greater
than 750mA of charging current, a 10k NTC thermistor is
recommended due to increased interference.
2
only slave device. The I C control signals, SDA and SCL
are scaled internally to the DV supply. DV should be
CC
CC
connectedtothesamepowersupplyasthemicrocontroller
2
generating the I C signals.
The LTC3555 family will pause charging when the
resistance of the NTC thermistor drops to 0.54 times
the value of R25 or approximately 5.4k. For a Vishay
“Curve 1” thermistor, this corresponds to approximately
40°C. If the battery charger is in constant voltage (float)
mode, the safety timer also pauses until the thermistor
indicates a return to a valid temperature. As the tempera-
ture drops, the resistance of the NTC thermistor rises. The
LTC3555 family is also designed to pause charging when
the value of the NTC thermistor increases to 3.25 times
the value of R25. For Vishay “Curve 1” this resistance,
32.5k,correspondstoapproximately0°C.Thehotandcold
comparators each have approximately 3°C of hysteresis
to prevent oscillation about the trip point. Grounding the
NTC pin disables the NTC charge pausing function.
2
The I C port has an undervoltage lockout on the DV
CC
2
pin. When DV is below approximately 1V, the I C serial
CC
port is cleared and switching regulators 2 and 3 are set
to full scale.
Bus Speed
2
The I C port is designed to be operated at speeds of up
to 400kHz. It has built-in timing delays to ensure correct
2
operation when addressed from an I C compliant master
device. It also contains input filters designed to suppress
glitches should the bus become corrupted.
Start and Stop Conditions
A bus-master signals the beginning of a communication to
a slave device by transmitting a START condition. A START
condition is generated by transitioning SDA from high to
low while SCL is high. When the master has finished com-
municating with the slave, it issues a STOP condition by
transitioning SDA from low to high while SCL is high.
Thermal Regulation
To optimize charging time, an internal thermal feedback
loop may automatically decrease the programmed charge
current. This will occur if the die temperature rises to
approximately 110°C. Thermal regulation protects the
LTC3555 family from excessive temperature due to high
power operation or high ambient thermal conditions and
allows the user to push the limits of the power handling
capability with a given circuit board design without risk of
damaging the part or external components. The benefit of
the LTC3555 family thermal regulation loop is that charge
current can be set according to actual conditions rather
Byte Format
Each byte sent to the LTC3555 family must be eight bits
long followed by an extra clock cycle for the acknowledge
bit to be returned by the LTC3555 family. The data should
be sent to the LTC3555 family most significant bit (MSB)
first.
3555fd
19
LTC3555/LTC3555-X
OPERATION
Table 2. I2C Serial Port Mapping
A7
A6
A5
A4
A3
A2
A1
A0
B7
B6
B5
B4
B3
B2
B1
B0
Switching Regulator 2
Voltage (See Table 4)
Switching Regulator 3
Voltage (See Table 4)
Disable
Battery
Charger
Switching
Regulator
Modes
Enable
Enable
Enable
Input Current
Limit
(See Table 3)
Regulator Regulator Regulator
1
2
3
(See Table 5)
Table 3. USB Current Limit Settings
Acknowledge
B1
LIM1
0
B0
LIM0
0
The acknowledge signal is used for handshaking between
the master and the slave. An acknowledge (active low)
generated by the slave (LTC3555 family) lets the master
know that the latest byte of information was received.
The acknowledge related clock pulse is generated by the
master. The master releases the SDA line (high) during
the acknowledge clock cycle. The slave-receiver must pull
down the SDA line during the acknowledge clock pulse
so that it remains a stable low during the high period of
this clock pulse.
(I
)
(I
)
USB SETTING
1x Mode (USB 100mA Limit)
10x Mode (Wall 1A Limit)
Suspend
0
1
1
1
0
1
5x Mode (USB 500mA Limit)
Table 4. Switching Regulator Servo Voltage
A7
A3
0
A6
A2
0
A5
A1
0
A4
A0
0
Switching Regulator 2 Servo Voltage
Switching Regulator 3 Servo Voltage
0.425V
0.450V
0.475V
0.500V
0.525V
0.550V
0.575V
0.600V
0.625V
0.650V
0.675V
0.700V
0.725V
0.750V
0.775V
0.800V
0
0
0
1
Slave Address
0
0
1
0
The LTC3555 family responds to only one 7-bit address
which has been factory programmed to 0001001. The
eighth bit of the address byte (R/W) must be 0 for the
LTC3555 family to recognize the address since it is a write
only device. This effectively forces the address to be eight
bits long where the least significant bit of the address is
0. If the correct seven bit address is given but the R/W bit
is 1, the LTC3555 family will not respond.
0
0
1
1
0
1
0
0
0
1
0
1
0
1
1
0
0
1
1
1
1
0
0
0
1
0
0
1
1
0
1
0
1
0
1
1
Bus Write Operation
1
1
0
0
The master initiates communication with the LTC3555
familywithaSTARTconditionanda7-bitaddressfollowed
by the write bit R/W = 0. If the address matches that of the
LTC3555 family, the LTC3555 family returns an acknowl-
edge. The master should then deliver the most significant
data byte. Again the LTC3555 family acknowledges and
the cycle is repeated for a total of one address byte and
two data bytes. Each data byte is transferred to an internal
holdinglatchuponthereturnofanacknowledge.Afterboth
data bytes have been transferred to the LTC3555 family,
themastermayterminatethecommunicationwithaSTOP
condition.Alternatively,aREPEAT-STARTconditioncanbe
1
1
0
1
1
1
1
0
1
1
1
1
Table 5. General Purpose Switching Regulator Modes
B6
B5
(SCL)*
(SDA)*
Switching Regulator Mode
Pulse Skip
0
0
1
1
0
1
0
1
Forced Burst Mode Operation
LDO Mode
Burst Mode Operation
2
initiated by the master and another chip on the I C bus
can be addressed. This cycle can continue indefinitely and
*SDA and SCL take on this context only when DV = 0V.
CC
3555fd
20
LTC3555/LTC3555-X
OPERATION
the LTC3555 family will remember the last input of valid
data that it received. Once all chips on the bus have been
addressedandsentvaliddata,aglobalSTOPconditioncan
be sent and the LTC3555 family will update its command
latch with the data that it had received.
remains low impedance until regulator 3 reaches 92% of
its regulation value. A 230ms delay is included to allow a
system microcontroller ample time to reset itself. RST3
may be used as a power-on reset to the microprocessor
poweredbyregulator3ormaybeusedtoenableregulators
1 and/or 2 for supply sequencing. RST3 is an open-drain
outputandrequiresapull-upresistortotheoutputvoltage
of regulator 3 or another appropriate power source.
2
In certain circumstances the data on the I C bus may
become corrupted. In these cases the LTC3555 family
responds appropriately by preserving only the last set of
complete data that it has received. For example, assume
theLTC3555familyhasbeensuccessfullyaddressedandis
receiving data when a STOP condition mistakenly occurs.
TheLTC3555familywillignorethisSTOPconditionandwill
notresponduntilanewSTARTcondition, correctaddress,
new set of data and STOP condition are transmitted.
General Purpose Step-Down Switching Regulators
The LTC3555 family contains three general purpose
2.25MHz step-down constant-frequency current mode
switchingregulators. Tworegulatorsprovideupto400mA
and a third switching regulator can produce up to 1A.
All three switching regulators can be programmed for a
minimumoutputvoltageof0.8Vandcanbeusedtopower
a microcontroller core, microcontroller I/O, memory, disk
driveorotherlogiccircuitry.Twooftheswitchingregulators
Likewise,withonlyoneexception,iftheLTC3555familywas
previously addressed and sent valid data but not updated
with a STOP, it will respond to any STOP that appears on
the bus, independent of the number of REPEAT-STARTS
that have occurred. If a REPEAT-START is given and the
LTC3555familysuccessfullyacknowledgesitsaddressand
first byte, it will not respond to a STOP until both bytes of
the new data have been received and acknowledged.
2
have I C programmable set-points for on-the-fly power
savings. All three converters support 100% duty cycle
operation (low dropout mode) when their input voltage
drops very close to their output voltage. To suit a variety
of applications, selectable mode functions can be used
to trade-off noise for efficiency. Four modes are available
to control the operation of the LTC3555 family’s general
purposeswitchingregulators.Atmoderatetoheavyloads,
the pulse skip mode provides the least noise switching
solution. At lighter loads, either Burst Mode operation,
forcedBurstModeoperationorLDOmodemaybeselected.
The switching regulators include soft-start to limit inrush
currentwhenpoweringon,short-circuitcurrentprotection
and switch node slew limiting circuitry to reduce radiated
EMI. Noexternalcompensationcomponentsarerequired.
The operating mode of the regulators may be set by either
2
Disabling the I C Port
2
The I C serial port can be disabled by grounding the DV
CC
pin. In this mode, control automatically passes to the in-
dividual logic input pins EN1, EN2, EN3, I , I , SDA
LIM0 LIM1
and SCL. Some functionality is not available in this mode
such as the programmability of switching regulators 2
and 3’s output voltage and the battery charger disable
feature. Inthismode, bothoftheprogrammableswitching
regulators have a fixed servo voltage of 0.8V.
BecausetheSDAandSCLpinshavenoothercontextwhen
2
I C control or by manual control of the SDA and SCL pins
DV is grounded, these pins are re-mapped to control
CC
2
if the I C port is not used. Each converter may be individu-
the switching regulator mode bits B5 and B6. SCL maps
to B5 and SDA maps to B6.
ally enabled by either their external control pins EN1, EN2,
2
EN3 or by the I C port. Switching regulators 2 and 3 have
2
individual programmable feedback servo voltages via I C
RST3 Pin
control. The switching regulator input supplies V , V
IN1 IN2
The RST3 pin is an open-drain output used to indicate that
switching regulator 3 has reached its final voltage. RST3
and V will generally be connected to the system load
IN3
pin V
.
OUT
3555fd
21
LTC3555/LTC3555-X
OPERATION
Step-Down Switching Regulator Output Voltage
turn off and the N-channel MOSFET synchronous rectifier
to turn on. The N-channel MOSFET synchronous rectifier
turns off at the end of the 2.25MHz cycle or if the current
through the N-channel MOSFET synchronous rectifier
drops to zero. Using this method of operation, the error
amplifier adjusts the peak inductor current to deliver the
required output power. All necessary compensation is
internal to the switching regulator requiring only a single
ceramicoutputcapacitorforstability.AtlightloadsinPWM
mode, the inductor current may reach zero on each pulse
which will turn off the N-channel MOSFET synchronous
rectifier. In this case, the switch node (SW) goes high
impedance and the switch node voltage will “ring”. This
is discontinuous mode operation, and is normal behavior
for a switching regulator. At very light loads in pulse skip
mode, the switching regulators will automatically skip
pulses as needed to maintain output regulation.
Programming
All three switching regulators can be programmed for
output voltages greater than 0.8V. Switching regulators 2
2
and3haveI Cprogrammableset-pointswhileregulator1
hasasinglefixedset-point.Thefull-scaleoutputvoltagefor
each switching regulator is programmed using a resistor
divider from the switching regulator output connected to
the feedback pins (FB1, FB2 and FB3) such that:
R1
R2
ꢀ
ꢃ
ꢄ
VOUTX = V
+1
ꢅ
ꢂ
FBX ꢁ
where V
ranges from 0.425V to 0.8V for switching
FBX
regulators 2 and 3 and V is fixed at 0.8V for switching
FBX
regulator 1. See Figure 4
V
INx
L
At high duty cycles (V
> V /2) it is possible for the
INx
OUTx
V
SWx
OUTx
inductorcurrenttoreverse,causingtheregulatortooperate
continuouslyatlightloads.Thisisnormalandregulationis
maintained, but the supply current will increase to several
milliamperes due to continuous switching.
LTC3555/
LTC3555-X
C
R1
C
OUT
FB
FBx
R2
GND
3555 F04
In forced Burst Mode operation, the switching regulators
use a constant current algorithm to control the inductor
current. By controlling the inductor current directly and
using a hysteretic control loop, both noise and switching
lossesareminimized.Inthismodeoutputpowerislimited.
WhileinforcedBurstModeoperation,theoutputcapacitor
is charged to a voltage slightly higher than the regulation
point.Thestep-downconverterthengoesintosleepmode,
during which the output capacitor provides the load cur-
rent. In sleep mode, most of the regulator’s circuitry is
powereddown,helpingconservebatterypower.Whenthe
output voltage drops below a pre-determined value, the
switching regulator circuitry is powered on and another
burst cycle begins. The duration for which the regulator
operates in sleep mode depends on the load current. The
sleep time decreases as the load current increases. The
maximumoutputcurrentinforcedBurstModeoperationis
about 100mA for switching regulators 1 and 2, and about
250mAforswitchingregulator3.Thestep-downswitching
regulatorswillnotentersleepmodeifthemaximumoutput
current is exceeded in forced Burst Mode operation and
Figure 4. Buck Converter Application Circuit
Typical values for R1 are in the range of 40k to 1M. The
capacitor C cancels the pole created by feedback resis-
FB
tors and the input capacitance of the FB pin and also helps
to improve transient response for output voltages much
greater than 0.8V. A variety of capacitor sizes can be used
for C but a value of 10pF is recommended for most ap-
FB
plications. Experimentation with capacitor sizes between
2pF and 22pF may yield improved transient response.
Step-Down Switching Regulator Operating Modes
The LTC3555 family’s general purpose switching regula-
tors include four possible operating modes to meet the
noise/power needs of a variety of applications.
In pulse skip mode, an internal latch is set at the start of
every cycle which turns on the main P-channel MOSFET
switch.Duringeachcycle,acurrentcomparatorcompares
thepeakinductorcurrenttotheoutputofanerroramplifier.
The output of the current comparator resets the internal
latch which causes the main P-channel MOSFET switch to
the output will drop out of regulation. Forced Burst Mode
3555fd
22
LTC3555/LTC3555-X
OPERATION
operationprovidesasignificantimprovementinefficiency
at light loads at the expense of higher output ripple when
compared to pulse skip mode. For many noise-sensitive
systems,forcedBurstModeoperationmightbeundesirable
at certain times (i.e., during a transmit or receive cycle
of a wireless device), but highly desirable at others (i.e.,
nanoamperes of leakage current. The step-down switch-
ing regulator outputs are individually pulled to ground
through a 10k resistor on the switch pins (SW1-SW3)
when in shutdown.
General Purpose Switching Regulator Dropout
Operation
2
when the device is in low power standby mode). The I C
port can be used to enable or disable forced Burst Mode
operation at any time, offering both low noise and low
power operation when they are needed.
It is possible for a switching regulator’s input voltage,
INx
V
, to approach its programmed output voltage (e.g., a
battery voltage of 3.4V with a programmed output voltage
of 3.3V). When this happens, the PMOS switch duty cycle
increasesuntilitisturnedoncontinuouslyat100%.Inthis
dropoutcondition,therespectiveoutputvoltageequalsthe
regulator’s input voltage minus the voltage drops across
the internal P-channel MOSFET and the inductor.
InBurstModeoperation,theswitchingregulatorautomati-
callyswitchesbetweenfixedfrequencyPWMoperationand
hysteretic control as a function of the load current. At light
loads, the regulators operate in hysteretic mode in much
the same way as described for the forced Burst Mode
operation. Burst Mode operation provides slightly less
outputrippleattheexpenseofslightlylowerefficiencythan
forced Burst Mode operation. At heavy loads the switch-
ing regulator operates in the same manner as pulse skip
operation at high loads. For applications that can tolerate
some output ripple at low output currents, Burst Mode
operationprovidesbetterefficiencythanpulseskipatlight
loads while still providing the full specified output current
of the switching regulator.
Step-Down Switching Regulator Soft-Start Operation
Soft-start is accomplished by gradually increasing the
peak inductor current for each switching regulator over
a 500ꢁs period. This allows each output to rise slowly,
helping minimize the battery surge current. A soft-start
cycle occurs whenever a given switching regulator is
enabled, or after a fault condition has occurred (thermal
shutdown or UVLO). A soft-start cycle is not triggered by
changing operating modes. This allows seamless output
operation when transitioning between forced Burst Mode,
Burst Mode, pulse skip mode or LDO operation.
Finally, the switching regulators have an LDO mode that
gives a DC option for regulating their output voltages. In
LDOmode,theswitchingregulatorsareconvertedtolinear
regulators and deliver continuous power from their SWx
pins through their respective inductors. This mode gives
the lowest possible output noise as well as low quiescent
current at light loads.
Step-Down Switching Regulator Switching Slew Rate
Control
The step-down switching regulators contain new patent
pending circuitry to limit the slew rate of the switch nodes
(SWx). This new circuitry is designed to transition the
switch nodes over a period of a couple of nanoseconds,
significantly reducing radiated EMI and conducted supply
noise.
Thestep-downswitchingregulatorsallowmodetransition
on the fly, providing seamless transition between modes
even under load. This allows the user to switch back and
forth between modes to reduce output ripple or increase
low current efficiency as needed.
Low Supply Operation
Step-Down Switching Regulator in Shutdown
The LTC3555 family incorporates an undervoltage lockout
Thestep-downswitchingregulatorsareinshutdownwhen
not enabled for operation. In shutdown, all circuitry in
the step-down switching regulator is disconnected from
the switching regulator input supply leaving only a few
circuit on V
which shuts down the general purpose
OUT
switching regulators when V
drops below V
.
OUT
OUTUVLO
This UVLO prevents unstable operation.
3555fd
23
LTC3555/LTC3555-X
APPLICATIONS INFORMATION
CLPROG Resistor and Capacitor
TheLTC3555familyincludesacurrent-reversalcomparator
whichmonitorsinductorcurrentanddisablesthesynchro-
nousrectifierascurrentapproacheszero.Thiscomparator
will minimize the effect of current reversal on the average
input current measurement. For some low inductance
values, however, the inductor current may still reverse
slightly.Thisvaluedependsonthespeedofthecomparator
in relation to the slope of the current waveform, given by
As described in the High Efficiency Switching PowerPath
Controller section, the resistor on the CLPROG pin deter-
mines the average input current limit when the switching
regulator is set to either the 1x mode (USB 100mA), the
5x mode (USB 500mA) or the 10x mode. The input cur-
rent will be comprised of two components, the current
that is used to drive V
and the quiescent current of the
OUT
V /L. V is the voltage across the inductor (approximately
L
L
switching regulator. To ensure that the USB specification
is strictly met, both components of input current should
be considered. The Electrical Characteristics table gives
values for quiescent currents in either setting as well as
current limit programming accuracy. To get as close to
the 500mA or 100mA specifications as possible, a 1%
resistor should be used. Recall that
–V ) and L is the inductance value.
OUT
An inductance value of 3.3ꢁH is a good starting value. The
ripple will be small enough for the regulator to remain in
continuous conduction at 100mA average V
current.
BUS
At lighter loads the current-reversal comparator will dis-
able the synchronous rectifier for currents slightly above
0mA. As the inductance is reduced from this value, the
LTC3555familywillenterdiscontinuousconductionmode
I
= I
+ V
/R
• (h
+1)
CLPROG
VBUS
VBUSQ
CLPROG CLPPROG
An averaging capacitor or an R-C combination is required
in parallel with the CLPROG resistor so that the switching
regulator can determine the average input current. This
network also provides the dominant pole for the feedback
loop when current limit is reached. To ensure stability,
the capacitor on CLPROG should be 0.47μF or larger.
Alternatively, faster transient response may be achieved
with 0.1μF in series with 8.2ꢀ.
at progressively higher loads. Ripple at V
will increase
OUT
directlyproportionallytothemagnitudeofinductorripple.
Transient response, however, will improve. The current
mode controller controls inductor current to exactly the
amount required by the load to keep V
in regulation. A
OUT
transientloadsteprequirestheinductorcurrenttochange
toanewlevel.Sinceinductorcurrentcannotchangeinstan-
taneously,thecapacitanceonV
deliversorabsorbsthe
OUT
difference in current until the inductor current can change
to meet the new load demand. A smaller inductor changes
its current more quickly for a given voltage drive than a
larger inductor, resulting in faster transient response. A
largerinductorwillreduceoutputrippleandcurrentripple,
but at the expense of reduced transient performance and
a physically larger inductor package size. For this reason
Choosing the PowerPath Inductor
Becausetheaverageinputcurrentcircuitdoesnotmeasure
reverse current (i.e., current from SW to V ), current
BUS
reversal in the inductor at light loads will contribute an
error to the average V
current measurement. The error
BUS
is conservative in that if the current reverses, the voltage
at CLPROG will be higher than what would represent the
actual average input current drawn. The current available
for battery charging plus system load is thus reduced but
the USB specification will not be violated.
a larger C
will be required for larger inductor sizes.
VOUT
The input regulator has an instantaneous peak current
clamp to prevent the inductor from saturating during tran-
sientloadorstart-upconditions. Theclampisdesignedso
thatitdoesnotinterferewithnormaloperationathighloads
and reasonable inductor ripple. It is intended to prevent
inductor current runaway in case of a shorted output.
This reduction in available V
current will happen when
BUS
the peak-peak inductor ripple is greater than twice the
average current limit setting. For example, if the average
current limit is set to 100mA, the peak-peak ripple should
notexceed200mA. Iftheinputcurrentislessthan100mA,
themeasurementaccuracymaybereduced. However, this
will not affect the average current loop since it will not be
in regulation.
The DC winding resistance and AC core losses of the in-
ductor will affect efficiency, and therefore available output
power. These effects are difficult to characterize and vary
3555fd
24
LTC3555/LTC3555-X
APPLICATIONS INFORMATION
by application. Some inductors that may be suitable for
over their rated voltage and temperature ranges. Y5V
ceramic capacitors have the highest packing density,
but must be used with caution because of their extreme
non-linear characteristic of capacitance verse voltage.
The actual in-circuit capacitance of a ceramic capacitor
should be measured with a small AC signal as is expected
in-circuit. Many vendors specify the capacitance versus
this application are listed in Table 6.
Table 6. Recommended Inductors
MAX MAX
INDUCTOR
TYPE
L
I
DCR
(ꢀ)
SIZE in mm
(L × W × H) MANUFACTURER
DC
(μH) (A)
LPS4018
3.3 2.2
0.08
Coilcraft
www.coilcraft.com
3.9 × 3.9 × 1.7
voltage with a 1V
AC test signal and as a result,
RMS
D53LC
DB318C
3.3 2.26 0.034
3.3 1.55 0.070
Toko
www.toko.com
5 × 5 × 3
3.8 × 3.8 × 1.8
overstate the capacitance that the capacitor will present
in the application. Using similar operating conditions as
the application, the user must measure or request from
the vendor the actual capacitance to determine if the
selected capacitor meets the minimum capacitance that
the application requires.
WE-TPC
Type M1
3.3 1.95 0.065
Wurth Elektronik
www.we-online.com
4.8 × 4.8 × 1.8
CDRH6D12
CDRH6D38
3.3 2.2 0.0625
3.3 3.5 0.020
Sumida
www.sumida.com
6.7 × 6.7 × 1.5
7 × 7 × 4
V
BUS
and V
Bypass Capacitors
OUT
The style and value of capacitors used with the LTC3555
family determine several important parameters such as
regulator control-loop stability and input voltage ripple.
Because the LTC3555 family uses a step-down switching
General Purpose Switching Regulator Inductor
Selection
Many different sizes and shapes of inductors are avail-
able from numerous manufacturers. Choosing the right
inductor from such a large selection of devices can be
overwhelming, but following a few basic guidelines will
make the selection process much simpler.
power supply from V
to V , its input current wave-
BUS
OUT
form contains high frequency components. It is strongly
recommendedthatalowequivalentseriesresistance(ESR)
multilayer ceramic capacitor be used to bypass V
.
BUS
Tantalum and aluminum capacitors are not recommended
because of their high ESR. The value of the capacitor on
BUS
given load current. Increasing the size of this capacitor
will reduce the input ripple.
The general purpose step-down converters are designed
to work with inductors in the range of 2.2μH to 10μH. For
most applications a 4.7μH inductor is suggested for the
lower power switching regulators 1 and 2 and 2.2μH is
recommended for the more powerful switching regula-
tor 3. Larger value inductors reduce ripple current which
improves output ripple voltage. Lower value inductors
result in higher ripple current and improved transient
responsetime.Tomaximizeefficiency,chooseaninductor
with a low DC resistance. For a 1.2V output, efficiency is
reduced about 2% for 100mꢀ series resistance at 400mA
load current, and about 2% for 300mꢀ series resistance
at 100mA load current. Choose an inductor with a DC
current rating at least 1.5 times larger than the maximum
load current to ensure that the inductor does not saturate
during normal operation. If output short circuit is a pos-
sible condition, the inductor should be rated to handle
the maximum peak current specified for the step-down
converters.
V
directly controls the amount of input ripple for a
To prevent large V
voltage steps during transient load
OUT
conditions, it is also recommended that a ceramic capaci-
tor be used to bypass V . The output capacitor is used
OUT
in the compensation of the switching regulator. At least
4ꢁF of actual capacitance with low ESR are required on
V
. Additional capacitance will improve load transient
OUT
performance and stability.
Multilayer ceramic chip capacitors typically have excep-
tional ESR performance. MLCCs combined with a tight
board layout and an unbroken ground plane will yield very
good performance and low EMI emissions.
There are several types of ceramic capacitors available,
each having considerably different characteristics. For
example, X7R ceramic capacitors have the best voltage
and temperature stability. X5R ceramic capacitors have
apparentlyhigherpackingdensitybutpoorerperformance
Different core materials and shapes will change the size/
currentandprice/currentrelationshipofaninductor.Toroid
or shielded pot cores in ferrite or Permalloy materials are
3555fd
25
LTC3555/LTC3555-X
APPLICATIONS INFORMATION
small and don’t radiate much energy, but generally cost
more than powdered iron core inductors with similar
electrical characteristics. Inductors that are very thin or
have a very small volume typically have much higher core
and DCR losses, and will not give the best efficiency. The
choice of which style inductor to use often depends more
on the price vs size, performance and any radiated EMI
requirements than on what the LTC3555 family requires
to operate.
General Purpose Switching Regulator Input/Output
Capacitor Selection
Low ESR (equivalent series resistance) MLCC capacitors
shouldbeusedatbothswitchingregulatoroutputsaswell
asateachswitchingregulatorinputsupply(V ).OnlyX5R
INX
or X7R ceramic capacitors should be used because they
retaintheircapacitanceoverwidervoltageandtemperature
ranges than other ceramic types. A 10ꢁF output capaci-
tor is sufficient for most applications. For good transient
response and stability the output capacitor should retain
atleast4ꢁFofcapacitanceoveroperatingtemperatureand
biasvoltage.Eachswitchingregulatorinputsupplyshould
be bypassed with a 1ꢁF capacitor. Consult with capacitor
manufacturers for detailed information on their selection
and specifications of ceramic capacitors. Many manufac-
turers now offer very thin (<1mm tall) ceramic capacitors
ideal for use in height-restricted designs. Table 8 shows a
list of several ceramic capacitor manufacturers.
The inductor value also has an effect on forced Burst
Mode and Burst Mode operations. Lower inductor values
will cause the Burst and forced Burst Mode switching
frequencies to increase.
Table 7 shows several inductors that work well with the
LTC3555 family’s general purpose regulators. These in-
ductors offer a good compromise in current rating, DCR
and physical size. Consult each manufacturer for detailed
information on their entire selection of inductors.
Table 8. Recommended Ceramic Capacitor Manufacturers
Table 7. Recommended Inductors
AVX
www.avxcorp.com
www.murata.com
www.t-yuden.com
www.vishay.com
www.tdk.com
INDUCTOR
TYPE
L
(μH)
MAX
I (A) DCR (ꢀ) (L × W × H) MANUFACTURER
DC
MAX
SIZE in mm
Murata
DE2818C
D312C
4.7
3.3
4.7
3.3
2.2
4.7
3.3
2.0
1.25
1.45
0.79
0.90
1.14
1.2
0.072
0.053
0.24
Toko
3.0 × 2.8 × 1.8
3.0 × 2.8 × 1.8
3.6 × 3.6 × 1.2
3.6 × 3.6 × 1.2
3.6 × 3.6 × 1.2
3.0 × 2.8 × 1.2
3.0 × 2.8 × 1.2
3.0 × 2.8 × 1.2
4 × 4 × 1.8
4 × 4 × 1.8
4 × 4 × 1.8
3.2 × 3.2 × 1.2
3.2 × 3.2 × 1.2
3.2 × 3.2 × 1.2
4.9 × 4.9 × 1
3.1 × 3.1 × 1.8
3.1 × 3.1 × 1.8
3.1 × 3.1 × 1.8
3.1 × 3.1 × 1.2
3.1 × 3.1 × 1.2
3.1 × 3.1 × 1.2
5.2 × 5.2 × 1.2
5.2 × 5.2 × 1.2
5.2 × 5.2 × 1.2
5.2 × 5.2 × 1.0
5.2 × 5.2 × 1.0
5.2 × 5.2 × 1.0
Taiyo Yuden
Vishay Siliconix
TDK
www.toko.com
0.20
0.14
DE2812C
0.13*
0.10*
0.067*
Over-Programming the Battery Charger
1.4
1.8
The USB high power specification allows for up to 2.5W to
CDRH3D16
CDRH2D11
4.7
3.3
2.2
4.7
3.3
2.2
4.7
4.7
3.3
2.2
4.7
3.3
2.2
4.7
3.3
2.2
4.7
3.3
2.2
0.9
1.1
0.11
0.085
0.072
0.17
0.123
0.098
0.19
Sumida
www.sumida.
com
bedrawnfromtheUSBport(5V×500mA).ThePowerPath
1.2
switching regulator transforms the voltage at V
to just
BUS
0.5
0.6
0.78
0.75
abovethevoltageatBATwithhighefficiency,whilelimiting
power to less than the amount programmed at CLPROG.
In some cases the battery charger may be programmed
(withthePROGpin)todeliverthemaximumsafecharging
current without regard to the USB specifications. If there
is insufficient current available to charge the battery at the
programmed rate, the PowerPath regulator will reduce
CLS4D09
SD3118
1.3
1.59
2.0
0.162
0.113
Cooper
www.cooperet.
com
0.074
SD3112
SD12
0.8
0.246
0.97
1.12
1.29
1.42
1.80
1.08
1.31
1.65
0.165
0.14
0.117*
0.104*
0.075*
0.153*
0.108*
0.091*
charge current until the system load on V
is satisfied
OUT
and the V
current limit is satisfied. Programming the
BUS
battery charger for more current than is available will not
cause the average input current limit to be violated. It will
merelyallowthebatterychargertomakeuseofallavailable
powertochargethebatteryasquicklyaspossible,andwith
minimal power dissipation within the battery charger.
SD10
LPS3015
4.7
3.3
2.2
1.1
1.3
1.5
0.2
0.13
0.11
Coil Craft
www.coilcraft.
com
3.0 × 3.0 × 1.5
3.0 × 3.0 × 1.5
3.0 × 3.0 × 1.5
*Typical DCR
3555fd
26
LTC3555/LTC3555-X
APPLICATIONS INFORMATION
Alternate NTC Thermistors and Biasing
LTC3555/LTC3555-X
NTC BLOCK
V
BUS
V
BUS
TheLTC3555familyprovidestemperaturequalifiedcharg-
ing if a grounded thermistor and a bias resistor are con-
nectedtoNTC.Byusingabiasresistorwhosevalueisequal
totheroomtemperatureresistanceofthethermistor(R25)
the upper and lower temperatures are pre-programmed
to approximately 40°C and 0°C, respectively (assuming
a Vishay “Curve 1” thermistor).
0.765 • V
BUS
R
NOM
10k
–
+
TOO_COLD
TOO_HOT
NTC
3
R
NTC
10k
T
–
+
0.349 • V
BUS
The upper and lower temperature thresholds can be ad-
justed by either a modification of the bias resistor value
or by adding a second adjustment resistor to the circuit.
If only the bias resistor is adjusted, then either the upper
or the lower threshold can be modified but not both. The
other trip point will be determined by the characteristics
of the thermistor. Using the bias resistor in addition to an
adjustmentresistor,boththeupperandthelowertempera-
ture trip points can be independently programmed with
the constraint that the difference between the upper and
lower temperature thresholds cannot decrease. Examples
of each technique are given below.
+
–
NTC_ENABLE
0.1V
3555 F05a
(5a)
V
V
BUS
LTC3555/LTC3555-X
NTC BLOCK
BUS
0.765 • V
BUS
R
NOM
10.5k
–
+
TOO_COLD
TOO_HOT
NTC
3
R1
1.27k
–
+
NTC thermistors have temperature characteristics which
areindicatedonresistance-temperatureconversiontables.
TheVishay-DalethermistorNTHS0603N011-N1002F,used
in the following examples, has a nominal value of 10k
and follows the Vishay “Curve 1” resistance-temperature
characteristic.
0.349 • V
BUS
R
NTC
T
10k
+
–
NTC_ENABLE
0.1V
3555 F05b
In the explanation below, the following notation is used.
R25 = Value of the Thermistor at 25°C
(5b)
Figure 5. NTC Circuits
R
= Value of thermistor at the cold trip point
= Value of the thermistor at the hot trip
NTC|COLD
Therefore, the hot trip point is set when:
R
point
NTC|HOT
RNTC|HOT
• VBUS = 0.349 • VBUS
RNOM +RNTC|HOT
α
α
R
= Ratio of R
to R25
COLD
NTC|COLD
and the cold trip point is set when:
= Ratio of R
to R25
HOT
NTC|HOT
RNTC|COLD
=Primarythermistorbiasresistor(seeFigure5a)
NOM
• VBUS = 0.765• VBUS
RNOM +RNTC|COLD
R1 = Optional temperature range adjustment resistor
(see Figure 5b)
Solving these equations for R
results in the following:
and R
NTC|HOT
NTC|COLD
ThetrippointsfortheLTC3555family’stemperaturequali-
fication are internally programmed at 0.349 • V
for the
BUS
R
= 0.536 • R
NOM
NTC|HOT
hot threshold and 0.765 • V
for the cold threshold.
BUS
and
3555fd
27
LTC3555/LTC3555-X
APPLICATIONS INFORMATION
R
= 3.25 • R
the nearest 1% value is 10.5k:
NTC|COLD
NOM
By setting R
equal to R25, the above equations result
R1 = 0.536 • 10.5k – 0.4368 • 10k = 1.26k
NOM
inα =0.536andα
=3.25.Referencingtheseratios
HOT
COLD
the nearest 1% value is 1.27k. The final circuit is shown
in Figure 5b and results in an upper trip point of 45°C and
a lower trip point of 0°C.
to the Vishay Resistance-Temperature Curve 1 chart gives
a hot trip point of about 40°C and a cold trip point of about
0°C. The difference between the hot and cold trip points
is approximately 40°C.
USB Inrush Limiting
By using a bias resistor, R
, different in value from R25,
NOM
When a USB cable is plugged into a portable product,
the inductance of the cable and the high-Q ceramic input
capacitor form an L-C resonant circuit. If the cable does
not have adequate mutual coupling or if there is not much
impedance in the cable, it is possible for the voltage at
the input of the product to reach as high as twice the
USB voltage (~10V) before it settles out. In fact, due to
the high voltage coefficient of many ceramic capacitors, a
nonlinearity, the voltage may even exceed twice the USB
voltage. To prevent excessive voltage from damaging the
LTC3555 family during a hot insertion, it is best to have
thehotandcoldtrippointscanbemovedineitherdirection.
Thetemperaturespanwillchangesomewhatduetothenon-
linearbehaviorofthethermistor. Thefollowingequationscan
beusedtoeasilycalculateanewvalueforthebiasresistor:
αHOT
0.536
αCOLD
3.25
RNOM
RNOM
=
=
•R25
•R25
where α
and α
are the resistance ratios at the
COLD
HOT
a low voltage coefficient capacitor at the V
pin to the
BUS
desired hotandcoldtrippoints. Notethattheseequations
are linked. Therefore, only one of the two trip points can
be chosen, the other is determined by the default ratios
designed in the IC. Consider an example where a 60°C
hot trip point is desired.
LTC3555 family. This is achievable by selecting an MLCC
capacitorthathasahighervoltageratingthanthatrequired
fortheapplication.Forexample,a16V,X5R,10μFcapacitor
in a 1206 case would be a better choice than a 6.3V, X5R,
10μF capacitor in a smaller 0805 case.
FromtheVishayCurve1R-Tcharacteristics,α is0.2488
HOT
Alternatively, the following soft connect circuit (Figure 6)
can be employed. In this circuit, capacitor C1 holds MP1
off when the cable is first connected. Eventually C1 begins
to charge up to the USB input voltage applying increasing
gate support to MP1. The long time constant of R1 and
C1 prevent the current from building up in the cable too
fast thus dampening out any resonant overshoot.
at 60°C. Using the above equation, R
should be set to
NOM
4.64k. With this value of R
, the cold trip point is about
NOM
16°C.Noticethatthespanisnow44°Cratherthantheprevi-
ous40°C. Thisisduetothedecreasein“temperaturegain”
of the thermistor as absolute temperature increases.
The upper and lower temperature trip points can be inde-
pendentlyprogrammedbyusinganadditionalbiasresistor
asshowninFigure5b. Thefollowingformulascanbeused
Printed Circuit Board Layout Considerations
to compute the values of R
and R1:
In order to be able to deliver maximum current under all
conditions, it is critical that the Exposed Pad on the back-
side of the LTC3555 family package be soldered to the PC
board ground. Failure to make thermal contact between
the Exposed Pad on the backside of the package and the
copper board will result in higher thermal resistances.
NOM
α
COLD – αHOT
RNOM
=
•R25
2.714
R1= 0.536 •RNOM – αHOT •R25
For example, to set the trip points to 0°C and 45°C with
a Vishay Curve 1 thermistor choose:
Furthermore, duetoitshighfrequencyswitchingcircuitry,
it is imperative that the input capacitors, inductors and
output capacitors be as close to the LTC3555 family as
3.266 – 0.4368
RNOM
=
•10k =10.42k
2.714
possibleandthattherebeanunbrokengroundplaneunder
3555fd
28
LTC3555/LTC3555-X
APPLICATIONS INFORMATION
MP1
Si2333
V
BUS
C1
100nF
5V USB
INPUT
LTC3555/
LTC3555-X
C2
10μF
USB CABLE
R1
40k
GND
3555 F06
3555 F07
Figure 6. USB Soft Connect Circuit
the IC and all of its external high frequency components.
Figure 7. Higher Frequency Ground Currents Follow Their
Incident Path. Slices in the Ground Plane Cause High Voltage
and Increased Emissions
High frequency currents, such as the V , V , V
BUS IN1 IN2
and V currents on the LTC3555 family, tend to find
IN3
their way along the ground plane in a myriad of paths
ranging from directly back to a mirror path beneath the
incident path on the top of the board. If there are slits or
cuts in the ground plane due to other traces on that layer,
the current will be forced to go around the slits. If high
frequency currents are not allowed to flow back through
their natural least-area path, excessive voltage will build
up and radiated emissions will occur. There should be a
group of vias under the grounded backside of the pack-
age leading directly down to an internal ground plane. To
minimize parasitic inductance, the ground plane should
be on the second layer of the PC board.
Battery Charger Stability Considerations
The LTC3555 family’s battery charger contains both a
constant-voltage and a constant-current control loop.
The constant-voltage loop is stable without any compen-
sation when a battery is connected with low impedance
leads. Excessive lead length, however, may add enough
series inductance to require a bypass capacitor of at least
1μF from BAT to GND. Furthermore, when the battery is
disconnected, a 100μF MLCC capacitor in series with a
0.3ꢀ resistor from BAT to GND is required to prevent
oscillation.
High value, low ESR multilayer ceramic chip capacitors
reduce the constant-voltage loop phase margin, possibly
resulting in instability. Ceramic capacitors up to 22μF may
beusedinparallelwithabattery,butlargerceramicsshould
be decoupled with 0.2ꢀ to 1ꢀ of series resistance.
The GATE pin for the external ideal diode controller has
extremely limited drive current. Care must be taken to
minimize leakage to adjacent PC board traces. 100nA of
leakage from this pin will introduce an offset to the 15mV
ideal diode of approximately 10mV. To minimize leakage,
the trace can be guarded on the PC board by surrounding
In constant-current mode, the PROG pin is in the feed-
back loop rather than the battery voltage. Because of the
additional pole created by any PROG pin capacitance,
capacitance on this pin must be kept to a minimum. With
no additional capacitance on the PROG pin, the battery
charger is stable with program resistor values as high
as 25k. However, additional capacitance on this node
reduces the maximum allowed program resistor. The pole
frequency at the PROG pin should be kept above 100kHz.
Therefore, if the PROG pin has a parasitic capacitance,
it with V
connected metal, which should generally be
OUT
less that one volt higher than GATE.
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of
the LTC3555 family.
1. Are the capacitors at V , V , V and V as close
BUS IN1 IN2
IN3
as possible to the LTC3555? These capacitors provide
the AC current to the internal power MOSFETs and their
drivers. Minimizing inductance from these capacitors
to the LTC3555 is a top priority.
C
, the following equation should be used to calculate
PROG
the maximum resistance value for R
:
PROG
2. Are C
and L1 closely connected? The (–) plate of
OUT
1
RPROG
≤
C
returns current to the GND plane.
OUT
2π •100kHz •CPROG
3. Keep sensitive components away from the SW pins.
3555fd
29
LTC3555/LTC3555-X
TYPICAL APPLICATION
Watchdog Microcontroller Operation
L1
3.3μH
25
26
USB/WALL
4.5V TO 5.5V
TO OTHER
LOADS
SW
BUS
V
24
C1
10μF
V
10k
T
OUT
3
20
2
22
510Ω
C2
GATE
BAT
NTC
MP1
22μF
23
PROG
CLPROG
+
Li-Ion
2k
RED
29
21
8.2Ω
0.1μF
GND
3k
CHRG
L2
4.7μH
3.3V
400mA
17
19
SW1
FB1
MEMORY
1.02M
10pF
1
8
LDO3V3
1μF
DV
CC
1μF
10μF
324k
LTC3555/
LTC3555-X
18
6
V
IN1
PUSH BUTTON
MICROCONTROLLER
L3
4.7μH
1.61V TO 3.03V
400mA
SW2
FB2
I/O
1.02M
365k
10pF
4
2
9,10
2
I C
1μF
10μF
MICROPROCESSOR
C1: MURATA GRM21BR61A106KE19
C2: TDK C2012X5R0J226M
L1: COILCRAFT LPS4018-332LM
L2, L3: TOKO 1098AS-4R7M
L4: TOKO 1098AS-2R0M
5
V
IN2
L4
2μH
0.8V TO 1.51V
1A
12
14
SW3
FB3
CORE
POR
MP1: SILICONIX Si2333
715k
806k
10pF
16
7
EN1
EN2
EN3
2.2μF
10k
22μF
13
27
28
11
15
ILIM0
ILIM1
V
IN3
3555 TA02
RST3
3555fd
30
LTC3555/LTC3555-X
PACKAGE DESCRIPTION
UFD Package
28-Lead Plastic QFN (4mm × 5mm)
(Reference LTC DWG # 05-08-1712 Rev B)
0.70 0.05
4.50 0.05
3.10 0.05
2.50 REF
2.65 0.05
3.65 0.05
PACKAGE OUTLINE
0.25 0.05
0.50 BSC
3.50 REF
4.10 0.05
5.50 0.05
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED
PIN 1 NOTCH
2.50 REF
R = 0.115
TYP
R = 0.20 OR 0.35
R = 0.05
TYP
× 45° CHAMFER
0.75 0.05
4.00 0.10
(2 SIDES)
27
28
0.40 0.10
PIN 1
TOP MARK
(NOTE 6)
1
2
5.00 0.10
(2 SIDES)
3.50 REF
3.65 0.10
2.65 0.10
(UFD28) QFN 0506 REV B
0.25 0.05
0.50 BSC
0.200 REF
0.00 – 0.05
BOTTOM VIEW—EXPOSED PAD
NOTE:
1. DRAWING PROPOSED TO BE MADE A JEDEC PACKAGE OUTLINE MO-220 VARIATION (WXXX-X).
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION
ON THE TOP AND BOTTOM OF PACKAGE
3555fd
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
31
LTC3555/LTC3555-X
TYPICAL APPLICATION
Push Button Start with Automatic Sequencing, Reverse Input Voltage Protection and 10 Second Push and Hold Hard Shutdown
MP1
25
17
19
USB
CONNECTOR
SW1
FB1
MEMORY
V
BUS
8
DV
CC
0.1μF
15
7
RST3
EN2
1
CORE
LDO3V3
12
1μF
SW3
4.7k
1k
LTC3555/
LTC3555-X
14
FB3
13
1M
EN3
MN1
SDA
SCL
10μF
2
9,10
16
6
2
I C
I/O
EN1
10μF
SW2
10k
27
28
ILIM0
ILIM1
4
FB2
2
SEND I C CODE: “0x12FF04”
ONCE POWER IS DETECTED
MN1: 2N7002
MP1: SILICONIX Si2333DS
3555 TA03
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
LTC3455
Dual DC/DC Converter with USB
Seamless Transition Between Input Power Sources: Li-Ion Battery, USB and 5V Wall Adapter.
Power Manager and Li-Ion Battery Two High Efficiency DC/DC Converters: Up to 96%. Full Featured Li-Ion Battery Charger with
Charger
Accurate USB Current Limiting (500mA/100mA). Pin Selectable Burst Mode Operation. Hot
Swap™ Output for SDIO and Memory Cards. 24-Lead 4mm × 4mm QFN Package
LTC3456
LTC3552
2-Cell, Multi-Output DC/DC
Converter with USB Power
Manager
Seamless Transition Between 2-Cell Battery, USB and AC Wall Adapter Input Power Sources.
Main Output: Fixed 3.3V Output, Core Output: Adjustable from 0.8V to V
. Hot Swap
BATT(MIN)
Output for Memory Cards. Power Supply Sequencing: Main and Hot Swap Accurate USB
Current Limiting. High Frequency Operation: 1MHz. High Efficiency: Up to 92%. 24-Lead
4mm × 4mm QFN Package
Standalone Linear Li-Ion Battery
Charger with Adjustable Output
Dual Synchronous Buck Converter Package
Synchronous Buck Converter, Efficiency: >90%, Adjustable Outputs at 800mA and 400mA,
Charge Current Programmable up to 950mA, USB Compatible, 16-Lead 5mm × 3mm DFN
LTC3557/LTC3557-1 USB Power Manager with
Li-Ion/Polymer Charger, Triple
Synchronous Buck Converter plus
LDO
Complete Multi Function PMIC: Linear Power Manager and Three Buck Regulators Charge
Current Programmable up to 1.5A from Wall Adapter Input, Thermal Regulation Synchronous
Buck Converters Efficiency: >95%, ADJ Outputs: 0.8V to 3.6V at 400mA/400mA/600mA Bat-
Track™ Adaptive Output Control, 200mꢀ Ideal Diode, 4mm × 4mm QFN-28 Package.
LTC4085
USB Power Manager with Ideal
Charges Single Cell Li-Ion Batteries Directly from a USB Port, Thermal Regulation, 200mꢀ
Diode Controller and Li-Ion Charger Ideal Diode with <50mꢀ option, 4mm × 3mm DFN14 Package
LTC4088/LTC4088-1/ High Efficiency USB Power Manager Maximizes Available Power from USB Port, Bat-Track, “Instant On” Operation, 1.5A Max
LTC4088-2
and Battery Charger
Charge Current, 180mꢀ Ideal Diode with <50mꢀ Option, 3.3V/25mA Always-On LDO,
4mm × 3mm DFN14 Package
Hot Swap and Bat-Track are trademarks of Linear Technology Corporation.
3555fd
LT 0708 REV D • PRINTED IN USA
LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
32
●
●
© LINEAR TECHNOLOGY CORPORATION 2007
(408) 432-1900 FAX: (408) 434-0507 www.linear.com
相关型号:
LTC3556EUFD#PBF
LTC3556 - High Efficiency USB Power Manager with Dual Buck and Buck-Boost DC/DCs; Package: QFN; Pins: 28; Temperature Range: -40°C to 85°C
Linear
LTC3557EUF#PBF
LTC3557/LTC3557-1 - USB Power Manager with Li-Ion Charger and Three Step-Down Regulators; Package: QFN; Pins: 28; Temperature Range: -40°C to 85°C
Linear
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