LTC3563EDC#TR_技术文档

LTC3563

500mA, Synchronous

Step-Down DC/DC Converter

with Selectable Output Voltage

U

DESCRIPTIO

FEATURES

The LTC^®3563 is a high efﬁciency monolithic synchro-

nous buck converter using a constant frequency, current

■

High Efﬁciency: Up to 96%

■

Pin Selectable Output Voltage: 1.28V/1.87V

Low Ripple (<20mV ) Burst Mode^®Operation:

I = 26µA

Q

mode architecture. A voltage select input allows the user

to program the output voltage to 1.28V or 1.87V. Supply

currentduringoperationisonly26µA,droppingto<1µAin

shutdown. The2.5Vto5.5Vinputvoltagerangemakesthe

LTC3563 ideally suited for single Li-Ion battery-powered

applications.100%dutycycleprovideslowdropoutopera-

tion, extending battery life in portable systems. Internal

power switches are optimized to provide high efﬁciency

and eliminate the need for an external Schottky diode.

■

P-P

■

Very Low Quiescent Current: Only 26µA

2.5V to 5.5V Input Voltage Range

2.25MHz Constant Frequency Operation

Low Dropout Operation: 100% Duty Cycle

No Schottky Diode Required

Internal Soft-Start Limits Inrush Current

Shutdown Mode Draws <1µA Supply Current

2% Output Voltage Accuracy

Current Mode Operation for Excellent Line and Load

Transient Response

Overtemperature Protected

Available in 2mm × 2mm 6-Lead DFN

U

The switching frequency is internally set at 2.25MHz,

allowing the use of small surface mount inductors and

capacitors. The LTC3563 is speciﬁcally designed to work

well with ceramic output capacitors, achieving very low

output voltage ripple and a small PCB footprint.

■

The LTC3563 is conﬁgured for the power saving Burst

Mode Operation.

, LTC, LT, LTM and Burst Mode are registered trademarks of Linear Technology

Corporation. All other trademarks are the property of their respective owners.

Protected by U.S. Patents, including 5481178, 6580258, 6304066, 6127815, 6498466,

6611131, 5994885.

APPLICATIO S

■

Cellular Telephones

Wireless and DSL Modems

Digital Cameras

MP3 Players

PDAs and Other Handheld Devices

■

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TYPICAL APPLICATIO

Efﬁciency and Power Loss vs Output Current

100

90

80

70

60

50

40

30

20

10

0

1000

100

10

2.2µH

V

OUT

V

IN

1.28V/1.87V

500mA

V

SW

OUT

IN

2.7V TO 5.5V

C

IN

10µF

LTC3563

CER

RUN

V

C

OUT

10µF

CER

V

1.28V 1.87V

SEL

3563 TA01a

GND

1

V

= 3.6V

IN

OUT

= 1.87V

0.1

1000

0.1

1

10

100

OUTPUT CURRENT (mA)

3563 TA01b

3563f

1

LTC3563

W W U W

ABSOLUTE AXI U RATI GS

PACKAGE/ORDER INFORMATION

(Note 1)

Input Supply Voltage (V )........................... –0.3V to 6V

IN

TOP VIEW

V

, RUN Voltages .....................................–0.3V to V

OUT

SEL

IN

6

5

4

RUN

V

1

2

3

OUT

Voltage...................................–0.3V to (V + 0.3V)

IN

7

V

SEL

IN

SW Voltage ....................................–0.3V to (V + 0.3V)

IN

GND

SW

Operating Ambient Temperature Range

(Note 2).................................................... –40°C to 85°C

Junction Temperature (Note 7) ............................. 125°C

Storage Temperature Range................... –65°C to 125°C

Reﬂow Peak Body Temperature (DFN).................. 260°C

DC PACKAGE

6-LEAD (2mm × 2mm) PLASTIC DFN

T

= 125°C, θ = 102°C/W, θ = 20°C/W (SOLDERED TO A 4-LAYER BOARD, NOTE 3)

JA JC

JMAX

EXPOSED PAD (PIN 7) IS PGND, MUST BE SOLDERED TO PCB

ORDER PART NUMBER

LTC3563EDC

DC PART MARKING

LCSZ

Order Options Tape and Reel: Add #TR

Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF

Lead Free Part Marking: http://www.linear.com/leadfree/

Consult LTC Marketing for parts speciﬁed with wider operating temperature ranges.

ELECTRICAL CHARACTERISTICS ^The

●

denotes the speciﬁcations which apply over the full operating

temperature range, otherwise speciﬁcations are at T = 25°C. V = 3.6V unless otherwise noted.

A

IN

SYMBOL

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

●

V

Operating Voltage Range

Output Voltage (Note 4)

2.5

5.5

V

IN

●

V

SEL

V

SEL

= 0V

= High

1.254

1.832

1.28

1.87

1.306

1.908

V

OUT

ΔV

Reference Voltage Line Regulation (Note 4)

Output Voltage Load Regulation (Note 4)

V

= 2.5V to 5.5V

0.04

0.2

%/V

%

LINE_REG

IN

I

= 100mA to 500mA

LOAD_REG

LOAD

I

Input DC Supply Current (Note 5)

Active Mode

S

V

= 1.1V, V = 0V

500

35

1

µA

OUT

SEL

Sleep Mode

= 1.4V, V = 0V

26

0.1

SEL

Shutdown

RUN = 0V

●

f

I

Oscillator Frequency

Peak Switch Current

1.8

2.25

2.7

MHz

mA

OSC

V

= 3V, V = 0.5V, Duty Cycle < 35%

650

1000

1750

LIM

IN

FB

R

P-Channel On Resistance (Note 6)

N-Channel On Resistance (Note 6)

I

SW

I

SW

= 100mA

0.5

0.35

0.65

0.55

Ω

DS(ON)

I

Switch Leakage Current

V

IN

= 5V, V

= 0V, V = 0V or 5V

0.01

1

µA

SW(LKG)

RUN

SW

3563f

2

LTC3563

ELECTRICAL CHARACTERISTICS ^The

●

denotes the speciﬁcations which apply over the full operating

temperature range, otherwise speciﬁcations are at T = 25°C. V = 3.6V unless otherwise noted.

A

IN

SYMBOL

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

V

Undervoltage Lockout Threshold

V

Rising

Falling

2.0

1.9

2.3

V

UVLO

IN

1.8

0.3

●

V

RUN Threshold

1.2

1

V

µA

RUN

I

RUN Leakage Current

0.01

1

V

Threshold

0.3

1.3

1.2

3

V

SEL

R

V

Pull-Up Resistance

Resistance Between V and V

IN

2.2

MΩ

SEL

Note 1: Stresses beyond those listed under Absolute Maximum Ratings

may cause permanent damage to the device. Exposure to any Absolute

Maximum Rating condition for extended periods may affect device

reliability and lifetime. No pin should exceed 6V.

Note 4: The converter is tested in a proprietary test mode that connects

the output of the error ampliﬁer to the SW pin, which is connected to an

external servo loop.

Note 5: Dynamic supply current is higher due to the internal gate charge

Note 2: The LTC3563 is guaranteed to meet performance speciﬁcations

from 0°C to 85°C. Speciﬁcations over the –40°C to 85°C operating

temperature range are assured by design, characterization and correlation

with statistical process controls.

Note 3: Failure to solder the Exposed Pad of the package to the PC board

will result in a thermal resistance much higher than 40°C/W.

being delivered at the switching frequency.

Note 6: The DFN switch on resistance is guaranteed by correlation to wafer

level measurements.

Note 7: T is calculated from the ambient temperature T and power

J

A

dissipation P according to the following formula:

D

T = T + (P ) • (θ ).

J

A

D

JA

U W

TYPICAL PERFOR A CE CHARACTERISTICS

T = 25°C unless otherwise speciﬁed.

A

Burst Mode Operation

Start-Up from Shutdown

RUN

2V/DIV

RUN

2V/DIV

SW

2V/DIV

V

OUT

V

OUT

50mV/DIV

1V/DIV

AC COUPLED

I

L

I

L

I

L

100mA/DIV

500mA/DIV

200mA/DIV

3563 G03

3563 G01

3542 G02

V

I

= 3.6V

400µs/DIV

V

I

= 3.6V

2µs/DIV

V

I

= 3.6V

400µs/DIV

IN

OUT

IN

OUT

IN

OUT

= 1.87V

= 30mA

= 1.87V

= 0A

= 500mA

LOAD

3563f

3

LTC3563

U W

TYPICAL PERFOR A CE CHARACTERISTICS

T = 25°C unless otherwise speciﬁed.

A

Load Step

V

OUT

V

OUT

100mV/DIV

AC COUPLED

I

L

I

L

500mA/DIV

I

LOAD

I

LOAD

500mA/DIV

3563 G04

3563 G05

3563 G06

V

I

= 3.6V

20µs/DIV

V

I

= 3.6V

20µs/DIV

V

I

= 3.6V

20µs/DIV

IN

OUT

IN

OUT

IN

OUT

= 1.87V

= 1.28V

= 0A TO 500mA

= 30mA TO 500mA

= 0mA TO 500mA

LOAD

Regulated Output Voltage

vs Temperature

Oscillator Frequency

vs Temperature

Load Step

2.5

2.4

2.3

2.2

2.1

2.0

1.31

1.30

1.29

1.28

1.27

1.26

1.25

1.24

V

= 0V

SEL

V

OUT

100mV/DIV

AC COUPLED

I

L

500mA/DIV

I

LOAD

500mA/DIV

3563 G07

V

= 3.6V

20µs/DIV

IN

= 1.28V

OUT

I

= 30mA TO 500mA

LOAD

–50 –25

0

25

50

75 100 125

50

TEMPERATURE (°C)

100 125

–50 –25

0

25

75

TEMPERATURE (°C)

3563 G09

3563 G08

Oscillator Frequency

vs Supply Voltage

Output Voltage vs Load Current

Output Voltage vs Supply Voltage

2.7

2.6

2.5

2.4

2.3

2.2

2.1

2.0

1.9

1.8

0.5

0.4

2.0

1.5

I

= 200mA

OUT

V

= 3.6V

IN

0.3

1.0

0.2

0.5

0.1

Burst Mode

OPERATION

0

–0.1

–0.2

–0.3

–0.4

–0.5

–1.0

–1.5

–2.0

V

OUT

V

OUT

= 1.28V

= 1.87V

V

OUT

V

OUT

= 1.28V

= 1.87V

3

2

4

5

6

5.5

2

4

5

2.5

3

3.5

4.5

6

1

10

100

1000

INPUT VOLTAGE (V)

SUPPLY VOLTAGE (V)

LOAD CURRENT (mA)

3563 G10

3563 G12

3563 G11

3563f

4

LTC3563

U W

TYPICAL PERFOR A CE CHARACTERISTICS

T = 25°C unless otherwise speciﬁed.

A

R

vs Input Voltage

R

vs Temperature

DS(ON)

Switch Leakage vs Input Voltage

DS(ON)

0.9

0.8

0.7

0.6

0.5

0.4

0.3

0.2

0.1

0.9

0.8

0.7

0.6

0.5

0.4

0.3

0.2

0.1

1000

900

800

700

600

500

400

300

200

100

0

MAIN SWITCH

SYNCHRONOUS

SWITCH

SYNCHRONOUS

SWITCH

SYNCHRONOUS

SWITCH

V

= 2.7V

= 3.6V

= 4.2V

IN

0

1

2

3

4

5

6

7

–50 –25

0

25

125

50

75 100

0

1

3

4

5

6

2

V

(V)

TEMPERATURE (°C)

V

(V)

IN

3563 G13

3563 G14

3542 G15

Switch Leakage vs Temperature

Efﬁciency vs Input Voltage

100

90

80

70

60

50

40

30

300

250

200

150

V

= 1.87V

OUT

100

50

0

I

= 500mA

= 100mA

= 10mA

= 1mA

OUT

MAIN SWITCH

SYNCHRONOUS SWITCH

= 0.1mA

4.5

5.5

2.5

3

3.5

4

5

50

TEMPERATURE (°C)

100 125

–50 –25

0

25

75

INPUT VOLTAGE (V)

3563 G17

3542 G16

Efﬁciency vs Load Current

100

90

80

70

60

50

40

30

20

10

0

100

90

80

70

60

50

40

30

20

10

0

V

= 2.7V

= 3.6V

= 4.2V

V

= 2.7V

= 3.6V

= 4.2V

IN

V

= 1.87V

V

= 1.28V

OUT

FIGURE 3a CIRCUIT

0.1

1

10

100

1000

0.1

1

10

100

1000

OUTPUT CURRENT (mA)

3563 G17

3563 G18

3563f

5

LTC3563

U

PI FU CTIO S

V

(Pin1):OutputVoltageFeedback.Aninternalresistive

V

(Pin5):OutputVoltageSelectionPin.Thispincontrols

OUT

SEL

divider divides the output voltage down for comparison

the regulated output voltage. When tied to GND, V

is

OUT

to the internal 0.6V reference voltage.

1.28V. When ﬂoating or connecting this pin to V , V

becomes 1.87V.

IN OUT

V (Pin 2): Power Supply Pin. Must be closely decoupled

IN

to GND.

RUN (Pin 6): Converter Enable Pin. Forcing this pin above

1.5V enables this part, while forcing it below 0.3V causes

the device to shut down. In shutdown, all functions are

disabled drawing <1µA supply current. This pin must be

driven; do not ﬂoat.

GND (Pin 3): Ground Pin.

SW (Pin 4): Switch Node Connection to Inductor. This pin

connectstothedrainsoftheinternalmainandsynchronous

power MOSFET switches.

Exposed Pad (Pin 7): GND. The Exposed Pad is ground. It

must be soldered to PCB ground to provide both electrical

contact and optimum thermal performance.

3563f

6

LTC3563

W

BLOCK DIAGRA

V

OUT

SLOPE COMPENSATION

V

1

IN

2

+

–

OSC

I

COMP

–

+

–

+

V

IN

EA

0.6V

V

SEL

SW

4

5

ANTI-

SHOOT

THROUGH

+

BURST

V

B

LOGIC

V

IN

+

–

RUN

SHUTDOWN

6

0.6V REF

I

RCMP

GND

3

3563 BD

3563f

7

LTC3563

U

OPERATIO

The LTC3563 uses a constant frequency, current mode,

step-down architecture. The operating frequency is set

at 2.25MHz.

In Burst Mode operation, the peak current of the inductor

issettoapproximately60mAregardlessoftheoutputload.

Each burst event can last from a few cycles at light loads

to almost continuously cycling with short sleep intervals

at moderate loads. In between these burst events, the

powerMOSFETsandanyunneededcircuitryareturnedoff,

reducingthequiescentcurrentto26µA. Inthissleepstate,

the load current is being supplied solely from the output

capacitor. As the output voltage drops, the EA ampliﬁer’s

output rises above the sleep threshold and turns the top

MOSFETon.Thisprocessrepeatsataratethatisdependent

on the load demand. By running cycles periodically, the

switching losses which are dominated by the gate charge

losses of the power MOSFETs are minimized.

The output voltage is set by an internal divider. An error

ampliﬁer compares the divided output voltage with a

reference voltage of 0.6V and adjusts the peak inductor

current accordingly.

Main Control Loop

Duringnormaloperation,thetoppowerswitch(P-channel

MOSFET) is turned on at the beginning of a clock cycle

when the V

voltage is below the regulated voltage.

OUT

The current ﬂows into the inductor and the load increases

until the current limit is reached. The switch turns off and

energy stored in the inductor ﬂows through the bottom

switch (N-channel MOSFET) into the load until the next

clock cycle. The peak inductor current is controlled by

the internally compensated output of the error ampliﬁer.

When the load current increases, the feedback voltage

decreases slightly below the reference. This decrease

causes the error ampliﬁer to increase its output voltage

until the average inductor current matches the new load

current. The main control loop is shut down by pulling

the RUN pin to ground.

Low Supply Operation

To prevent unstable operation, the LTC3563 incorporates

an undervoltage lockout circuit which shuts down the part

when the input voltage drops below 2V.

Internal Soft-Start

At start-up when the RUN pin is brought high, the internal

reference is linearly ramped from 0V to 0.6V in about

1ms. The regulated output voltage follows this ramp from

0% to 100% in 1ms. The current in the inductor during

soft-start is deﬁned by the combination of the current

needed to charge the output capacitance and the current

provided to the load as the output voltage ramps up. The

start-up waveform, shown in the Typical Performance

Characteristics, shows the output voltage start-up from

Burst Mode Operation

During light load currents, the LTC3563 operates in Burst

Mode operation in which the internal power MOSFETs

operate intermittently based on load demand.

0V to 1.87V with a 500mA load and V = 3.6V.

IN

3563f

8

LTC3563

W U U

APPLICATIO S I FOR ATIO

U

the burst clamp. Lower inductor values result in higher

ripplecurrentwhichcausesthetransitiontooccuratlower

load currents. This causes a dip in efﬁciency in the upper

range of low current operation. In Burst Mode operation,

lower inductance values cause the burst frequency to

increase.

A general LTC3563 application circuit is shown in Figure1.

Externalcomponentselectionisdrivenbytheloadrequire-

ment and begins with the selection of the inductor L. Once

the inductor is chosen, C and C

can be selected.

IN

OUT

L

V

IN

V

SW

OUT

IN

2.7V TO 5.5V

C

IN

LTC3563

Inductor Core Selection

RUN

C

OUT

Differentcorematerialsandshapeschangethesize/current

and price/current relationships of an inductor. Toroid or

shieldedpotcoresinferriteorpermalloymaterialsaresmall

and don’t radiate much energy, but generally cost more

than powdered iron core inductors with similar electrical

characteristics. The choice of which style inductor to use

often depends more on the price vs size requirements

and any radiated ﬁeld/EMI requirements than on what the

LTC3563 requires to operate. Table 1 shows some typi-

cal surface mount inductors that work well in LTC3563

applications.

V

1.28V 1.87V

SEL

3563 F01

GND

Figure 1. LTC3563 General Schematic

Inductor Selection

The inductor value has a direct effect on ripple current ΔI ,

L

whichdecreaseswithhigherinductanceandincreaseswith

higher V or V , as shown in following equation:

IN

OUT

⎛

⎞

V_OUT

∆I_L=

1–

⎜

⎟

Input Capacitor (C ) Selection

ƒ • L

V

IN

⎝

⎠

O

IN

In continuous mode, the input current of the converter is a

where f is the switching frequency. A reasonable starting

O

square wave with a duty cycle of approximately V /V .

OUT IN

point for setting ripple current is ΔI = 0.4 • I

,

L

OUT(MAX)

Topreventlargevoltagetransients, alowequivalentseries

resistance (ESR) input capacitor sized for the maximum

RMS current must be used. The maximum RMS capacitor

current is given by:

where I

is 500mA. The largest ripple current ΔI

OUT(MAX)

L

occurs at the maximum input voltage. To guarantee that

the ripple current stays below a speciﬁed maximum, the

inductor value should be chosen according to the follow-

ing equation:

V_OUTV – V

(

)

IN

OUT

I_RMS≈I_MAX

⎛

⎞

V_OUT

ƒ_O• ∆I_L

V_OUT

V

IN

L =

1–

⎜

⎟

V

⎝

⎠

IN(MAX)

where the maximum average output current I

equals

MAX

the peak current minus half the peak-to-peak ripple cur-

rent, I = I – ΔI /2. This formula has a maximum at

The DC current rating of the inductor should be at least

equal to the maximum load current plus half the ripple

current to prevent core saturation. Thus, a 600mA rated

inductor should be enough for most applications (500mA

+ 100mA). For better efﬁciency, choose a low DC-resis-

tance inductor.

MAX

LIM

L

V = 2V , where I = I /2. This simple worst-case

IN

OUT

RMS OUT

is commonly used to design because even signiﬁcant

deviations do not offer much relief. Note that capacitor

manufacturer’s ripple current ratings are often based on

only2000hourslifetime.Thismakesitadvisabletofurther

deratethecapacitor,orchooseacapacitorratedatahigher

temperaturethanrequired.Severalcapacitorsmayalsobe

paralleled to meet the size or height requirements of the

The inductor value will also have an effect on Burst Mode

operation. The transition to low current operation begins

when the inductor’s peak current falls below a level set by

3563f

9

LTC3563

W U U

U

APPLICATIO S I FOR ATIO

Table 1. Representative Surface Mount Inductors

MAX DC

PART NUMBER VALUE CURRENT DCR

3

MANUFACTURER

(µH)

2.2

3.3

4.7

2.2

4.7

2.2

(A)

0.780

1.2

(Ω)

SIZE (mm )

Sumida

CDRH2D11

CDRH3D16

CMD4D11

CDH2D09B

CLS4D09

0.098 3.2 × 3.2 × 1.2

0.075 3.8 × 3.8 × 1.8

0.116 4.4 × 5.8 × 1.2

0.95

0.85

0.75

0.79

0.75

0.85

1.0

0.15

2.8 × 3 × 1

4.9 × 4.9 × 1

Murata

TDK

LQH32CN

LQH43CN

IVLC453232

0.097 2.5 × 3.2 × 1.55

0.15 4.5 × 3.2 × 2.6

0.18 4.8 × 3.4 × 3.4

VLF3010AT-

2R2M1R0

0.12

2.8 × 2.6 × 1

design. An additional 0.1µF to 1µF ceramic capacitor is

T495 series, and Sprague 593D and 595D series. Consult

the manufacturer for other speciﬁc recommendations.

also recommended on V for high frequency decoupling,

IN

when not using an all ceramic capacitor solution.

Ceramic Input and Output Capacitors

Output Capacitor (C ) Selection

OUT

Higher value, lower cost ceramic capacitors are now

becoming available in smaller case sizes. Their high

ripple current rating, high voltage rating and low ESR

are tempting for switching regulator use. However, the

ESR is so low that it can cause loop stability problems.

Since the LTC3563’s control loop does not depend on

the output capacitor’s ESR for stable operation, ceramic

capacitors can be used to achieve very low output ripple

and small circuit size. X5R or X7R ceramic capacitors are

recommended because these dielectrics have the best

temperatureandvoltagecharacteristicsofalltheceramics

for a given value and size.

The selection of C

is driven by the required ESR to

OUT

minimizevoltagerippleandloadsteptransients. Typically,

once the ESR requirement is satisﬁed, the RMS current

rating generally far exceeds the I

requirement,

RIPPLE(P-P)

exceptforanallceramicsolution.Theoutputripple(ΔV

)

OUT

is determined by:

⎛

⎞

1

∆V_OUT≈ ∆I_LESR+

⎜

⎝

⎟

8• ƒ_O•C_OUT

⎠

where f is the switching frequency, C

is the output

O

OUT

capacitanceandΔI istheinductorripplecurrent.Foraﬁxed

L

Great care must be taken when using only ceramic input

and output capacitors. When a ceramic capacitor is used

at the input and the power is being supplied through long

wires, suchasfromawalladapter, aloadstepattheoutput

output voltage, the output ripple is highest at maximum

input voltage since ΔI increases with input voltage.

L

Iftantalumcapacitorsareused,itiscriticalthatthecapaci-

tors are surge tested for use in switching power supplies.

AnexcellentchoiceistheAVXTPSseriesofsurfacemount

tantalums, available in case heights ranging from 2mm to

4mm. These are specially constructed and tested for low

ESR so they give the lowest ESR for a given volume. Other

capacitor types include Sanyo POSCAP, Kemet T510 and

can induce ringing at the V pin. At best, this ringing can

IN

couple to the output and be mistaken as loop instability.

At worst, the ringing at the input can be large enough to

damage the part. For more information, see Application

Note 88. The recommended capacitance value to use is

10µF for both input and output capacitors.

3563f

10

LTC3563

W U U

U

APPLICATIO S I FOR ATIO

Efﬁciency Considerations

1)TheV quiescentcurrentistheDCsupplycurrentgiven

IN

in the Electrical Characteristics which excludes MOSFET

Theefﬁciencyofaswitchingregulatorisequaltotheoutput

power divided by the input power times 100%. It is often

useful to analyze individual losses to determine what is

limiting the efﬁciency and which change would produce

the most improvement. Efﬁciency can be expressed as:

charging current. V current results in a small (<0.1%)

IN

loss that increases with V , even at no load.

IN

2

2) I R losses are calculated from the DC resistances of

the internal switches, R , and external inductor, R . In

SW

L

continuousmode,theaverageoutputcurrentﬂowsthrough

inductor L, but is “chopped” between the internal top and

bottom switches. Thus, the series resistance looking into

the SW pin is a function of both top and bottom MOSFET

Efﬁciency = 100% – (L1 + L2 + L3 + ...)

where L1, L2, etc. are the individual losses as a percent-

age of input power.

R

and the duty cycle (D) as follows:

DS(ON)

Although all dissipative elements in the circuit produce

losses, three main sources usually account for most of

R

SW

= (R

)(D) + (R

)(1 – D)

DS(ON)TOP

DS(ON)BOT

the losses in LTC3563 circuits: 1) V quiescent current,

IN

The R

for both the top and bottom MOSFETs can

2

DS(ON)

2) I R loss and 3) switching loss. V quiescent current

IN

be obtained from the Typical Performance Characteristics

loss dominates the power loss at very low load currents,

whereas the other two dominate at medium to high load

currents. In a typical efﬁciency plot, the efﬁciency curve

at very low load currents can be misleading since the

actual power loss is of no consequence as illustrated in

Figure 2.

2

curves. Thus, to obtain I R losses:

2

I R losses = I

(R + R )

SW L

OUT

3)TheswitchingcurrentisMOSFETgatechargingcurrent,

that results from switching the gate capacitance of the

power MOSFETs. Each time a MOSFET gate is switched

fromlowtohightolowagain,apacketofchargedQmoves

1000

V

= 3.6V

IN

from V to ground. The resulting dQ/dt is a current out of

IN

V that is typically much larger than the DC bias current.

IN

100

10

In continuous mode, I

= f (Q + Q ), where Q

GATECHG

O T B T

and Q are the gate charges of the internal top and bottom

B

MOSFETswitches.Thegatechargelossesareproportional

to V and thus their effects will be more pronounced at

IN

higher supply voltages.

1

V

= 1.87V

= 1.28V

OUT

Other “hidden” losses such as copper trace and internal

battery resistances can account for additional efﬁciency

degradations in portable systems. The internal battery

and fuse resistance losses can be minimized by making

0.1

1

10

100

1000

OUTPUT CURRENT (mA)

3563 F02

sure that C has adequate charge storage and very low

IN

Figure 2. Power Loss vs Load Current

ESR at the switching frequency. Other losses include

diode conduction losses during dead-time and inductor

core losses generally account for less than 2% total ad-

ditional loss.

3563f

11

LTC3563

W U U

U

APPLICATIO S I FOR ATIO

Thermal Considerations

which is below the maximum junction temperature of

125°C.

InmostapplicationstheLTC3563doesnotdissipatemuch

heatduetoitshighefﬁciency.Butinapplicationswherethe

LTC3563 is running at high ambient temperature with low

supply voltage and high duty cycles, such as in dropout,

the heat dissipated may exceed the maximum junction

temperatureofthepart.Ifthejunctiontemperaturereaches

approximately 150°C, both power switches will be turned

off and the SW node will become high impedance.

Notethatathighersupplyvoltages,thejunctiontemperature

is lower due to reduced switch resistance (R

).

DS(ON)

Checking Transient Response

The regulator loop response can be checked by looking

at the load transient response. Switching regulators take

several cycles to respond to a step in load current. When

a load step occurs, V

immediately shifts by an amount

To avoid the LTC3563 from exceeding the maximum

junction temperature, the user needs to do some thermal

analysis. The goal of the thermal analysis is to determine

whether the power dissipated exceeds the maximum

junction temperature of the part. The temperature rise is

given by:

OUT

equal to ΔI

• ESR, where ESR is the effective series

LOAD

resistance of C . ΔI

also begins to charge or dis-

OUT

LOAD

chargeC ,generatingafeedbackerrorsignalusedbythe

OUT

regulator to return V

this recovery time, V

to its steady-state value. During

can be monitored for overshoot

OUT

or ringing that would indicate a stability problem.

T = (P )(θ )

R

D

JA

Theoutputvoltagesettlingbehaviorisrelatedtothestability

of the closed-loop system and will demonstrate the actual

overall supply performance. For a detailed explanation of

optimizing the compensation components, including a re-

view of control loop theory, refer to Application Note 76.

where P is the power dissipated by the regulator and

JA

to the ambient.

D

θ

is the thermal resistance from the junction of the die

The junction temperature, T , is given by:

J

T = T + T

R

Insomeapplications,amoreseveretransientcanbecaused

by switching loads with large (>1µF) bypass capacitors.

The discharged bypass capacitors are effectively put in

J

A

where T is the ambient temperature.

A

As an example, consider the LTC3563 with an output

voltage of 1.87V, an input voltage of 2.7V, a load current

of 500mA and an ambient temperature of 70°C. From

the typical performance graph of switch resistance, the

parallelwithC , causingarapiddropinV . Noregula-

OUT

tor can deliver enough current to prevent this problem, if

the switch connecting the load has low resistance and is

driven quickly. The solution is to limit the turn-on speed of

the load switch driver. A Hot Swap^TMcontroller is designed

speciﬁcally for this purpose and usually incorporates cur-

rent limit, short circuit protection and soft-start.

R

of the P-channel switch at 70°C is approximately

DS(ON)

0.7Ω and the R

of the N-channel synchronous

DS(ON)

switch is approximately 0.4Ω. The duty cycle in this case

is approximately 70%.

Design Example

The series resistance looking into the SW pin is:

As a design example, assume the LTC3563 is used in

a single lithium-ion battery-powered cellular phone ap-

R

= 0.7Ω (0.7) + 0.4Ω (0.3) = 0.61Ω

SW

Therefore, for the power dissipated by the part is:

plication. The V will be operating from a maximum of

IN

2

4.2V down to about 2.7V. The load current requirement

is a maximum of 0.5A, but most of the time it will be in

standby mode, requiring only 2mA. Efﬁciency at both

low and high load currents is important. Output voltage

is either 1.87V or 1.28V.

P = I

D

• R = 152.5mW

SW

LOAD

FortheDFNpackage, theθ is40°C/W. Thus, thejunction

temperature of the regulator is:

JA

T = 70°C + (0.1525)(40) = 76.1°C

J

3563f

12

LTC3563

W U U

APPLICATIO S I FOR ATIO

U

With this information we can calculate L using:

C

will require an RMS current rating of at least

IN

0.25A ≅ I

/2 at temperature and C

will require

LOAD(MAX)

OUT

⎛

⎞

V_OUT

1

L =

• V_OUT• 1–

ESR of less than 0.2Ω. In most cases, ceramic capacitors

will satisfy these requirements. Select C = 10µF and

⎜

⎝

⎟

f • ∆I_L

V

⎠

IN

OUT

C = 10µF.

IN

Substituting V

= 1.87V, V = 4.2V, ΔI = 200mA and

OUT

IN

L

f = 2.25MHz gives:

Figure3showsthecompletecircuitalongwithitsefﬁciency

curve, load step response and recommended layout.

1.87V

2.25MHz •200mA

1.87V

4.2V

⎛

⎝

⎞

L =

• 1–

= 2.31µH

⎜

⎟

⎠

PC Board Layout Checklist

With V_OUT=1.28V

When laying out the printed circuit board, the following

checklist should be used to ensure proper operation of

the LTC3563. These items are also illustrated graphically

in Figure 3b. Check the following in your layout:

1.28V

2.25MHz •200mA

1.28V

4.2V

⎛

⎝

⎞

L =

• 1–

=1.98µH

⎜

⎟

⎠

Choosingavendor’sclosestinductorvalueof2.2µHresults

in a maximum ripple current of:

1. The power traces, consisting of the GND trace, the SW

trace and the V trace should be kept short, direct and

IN

For V_OUT= 1.87V

wide.

2. Does the (+) plate of C connect to V as closely as

IN

1.87V

2.25MHz • 2.2µH

1.87V

4.2V

⎛

⎝

⎞

∆I_L=

• 1–

= 209.6mA

= 179.8mA

⎜

⎟

⎠

possible? This capacitor provides the AC current to the

internal power MOSFETs.

For V_OUT= 1.28V

3. Keepthe(–)platesofC andC

ascloseaspossible.

OUT

IN

Hot Swap is a trademark of Linear Technology Corporation.

1.28V

2.25MHz • 2.2µH

1.28V

4.2V

⎛

⎞

∆I_L=

• 1–

⎜

⎟

⎠

⎝

L

V

IN

V

SW

OUT

IN

2.7V TO 5.5V

C

IN

LTC3563

RUN

C

OUT

V

1.28V 1.87V

SEL

3563 F03

GND

Figure 3a. Typical Application

3563f

13

LTC3563

W U U

U

APPLICATIO S I FOR ATIO

VIA TO V

OUT

GND

V

IN

6

5

4

RUN

V

1

2

3

OUT

GND

V

SEL

IN

GND

SW

C

IN

L

C

OUT

GND

V

OUT

3563 F03b

Figure 3b. Layout Diagram

100

90

80

70

60

50

40

30

20

10

0

V

OUT

100mV/DIV

AC COUPLED

I

L

500mA/DIV

I

LOAD

500mA/DIV

V

= 2.7V

= 3.6V

= 4.2V

3563 G04

IN

V

LOAD

= 3.6V

20µs/DIV

IN

V

= 1.87V

OUT

= 1.87V

OUT

FIGURE 3a CIRCUIT

I

= 0A TO 500mA

0.1

1

10

100

1000

OUTPUT CURRENT (mA)

Figure 3d. Load Step

3563 G17

Figure 3c. Efﬁciency Curve

3563f

14

LTC3563

U

PACKAGE DESCRIPTIO

DC Package

6-Lead Plastic DFN (2mm × 2mm)

(Reference LTC DWG # 05-08-1703)

0.675 0.05

2.50 0.05

0.61 0.05

1.15 0.05

(2 SIDES)

PACKAGE

OUTLINE

0.25 0.05

0.50 BSC

1.42 0.05

(2 SIDES)

RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS

R = 0.115

TYP

0.56 0.05

(2 SIDES)

0.38 0.05

4

6

2.00 0.10

(4 SIDES)

PIN 1 BAR

PIN 1

TOP MARK

CHAMFER OF

(SEE NOTE 6)

EXPOSED PAD

(DC6) DFN 1103

3

1

0.25 0.05

0.50 BSC

0.75 0.05

0.200 REF

1.37 0.05

(2 SIDES)

BOTTOM VIEW—EXPOSED PAD

0.00 – 0.05

NOTE:

1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WCCD-2)

2. DRAWING NOT TO SCALE

3. ALL DIMENSIONS ARE IN MILLIMETERS

4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE

MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE

5. EXPOSED PAD SHALL BE SOLDER PLATED

6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE

TOP AND BOTTOM OF PACKAGE

3563f

Information furnished by Linear Technology Corporation is believed to be accurate and reliable.

However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-

tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.

15

LTC3563

U

TYPICAL APPLICATIO

Using Low Proﬁle Components, <1mm Height

2.2µH**

V

OUT

V

IN

1.28V/1.87V

500mA

V

SW

OUT

IN

2.7V TO 5.5V

C

*

IN

10µF

LTC3563

CER

RUN

V

C

*

OUT

10µF

V

CER

1.28V 1.87V

SEL

3563 TA02a

GND

*MURATA GRM219R60J106KE19

**TDK VLF3010AT-2R2M1R0

Efﬁciency vs Output Current

100

V

= 3.6V

IN

V

= 1.87V

= 1.28V

90

80

70

60

50

40

30

20

10

0

OUT

0.1

1

10

100

1000

OUTPUT CURRENT (mA)

3563 TA02b

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3563f

LT 0107 • PRINTED IN USA

LinearTechnology Corporation

1630 McCarthy Blvd., Milpitas, CA 95035-7417

16

●

(408) 432-1900 FAX: (408) 434-0507 www.linear.com


型号：	LTC3563EDC#TR
厂家：	Linear
描述：	IC 1.75 A SWITCHING REGULATOR, 2700 kHz SWITCHING FREQ-MAX, PDSO6, 2 X 2 MM, PLASTIC, MO-229WCCD-2, DFN-6, Switching Regulator or Controller 转换器
文件：	总16页 (文件大小：272K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

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