LTC3619BIDD-TRPBF [Linear]
400mA/800mA Synchronous Step-Down DC/DC with Average Input Current Limit; 400毫安/ 800毫安同步降压型DC / DC与平均输入电流限制
| 型号： | LTC3619BIDD-TRPBF |
| 厂家： | 
Linear |
| 描述： | 400mA/800mA Synchronous Step-Down DC/DC with Average Input Current Limit |
| 文件： | 总20页 (文件大小：486K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LTC3619B
400mA/800mA Synchronous
Step-Down DC/DC with
Average Input Current Limit
FeaTures
DescripTion
The LTC®3619B is a dual monolithic synchronous buck
regulator using a constant frequency current mode ar-
chitecture.
n
Programmable Average Input Current Limit:
±±5 Accuracꢀ
n
Dual Step-Down Outputs: Up to 965 Efficiencꢀ
n
Low Noise Pulse-Skipping Operation at Light Loads
The input supply voltage range is 2.5V to 5.5V, making it
ideal for Li-Ion and USB powered applications. 100% duty
cycle capability provides low dropout operation, extend-
ing the run time in battery-operated systems. Low output
voltages are supported with the 0.6V feedback reference
voltage. Channel 1 and channel 2 can supply 400mA and
800mA output current, respectively.
n
Input Voltage Range: 2.±V to ±.±V
n
Output Voltage Range: 0.6V to ±V
n
2.2±MHz Constant-Frequencꢀ Operation
n
Power Good Output Voltage Monitor for Each Channel
n
Low Dropout Operation: 1005 Dutꢀ Cꢀcle
n
Independent Internal Soft-Start for Each Channel
n
Current Mode Operation for Excellent Line and Load
TheLTC3619B’sprogrammableaverageinputcurrentlimit
is ideal for USB applications and for point-of-load power
supplies because the LTC3619B’s limited input current
will still allow its output to deliver high peak load currents
without collapsing the input supply. When the sum of
both channels’ currents exceeds the input current limit,
channel 2 is current limited while channel 1 remains regu-
lated. The operating frequency is internally set at 2.25MHz
allowingtheuseofsmallsurfacemountinductors.Internal
soft-start reduces in-rush current during start-up. The
LTC3619B is available in small MSOP and 3mm × 3mm
DFN packages. The LTC3619B is also available in a low
quiescent current, high efficiency Burst Mode® version,
LTC3619.
Transient Response
2% Output Voltage Accuracy
n
n
Short-Circuit Protected
Shutdown Current ≤ 1μA
Available in Small Thermally Enhanced 10-Lead MS
and 3mm × 3mm DFN Packages
n
n
applicaTions
n
High Peak Load Current Applications
n
USB Powered Devices
n
Supercapacitor Charging
Radio Transmitters and Other Handheld Devices
n
L, LT, LTC, LTM, Linear Technology, the Linear logo and Burst Mode are registered trademarks
and Hot Swap is a trademark of Linear Technology Corporation. All other trademarks are the
property of their respective owners. Protected by U.S.Patents, including 5481178, 6127815,
6304066, 6498466, 6580258, 6611131.
Typical applicaTion
GSM Pulse Load
Dual Monolithic Buck Regulator in 10-Lead 3mm × 3mm DFN
V
IN
3.4V TO 5.5V
V
OUT
10µF
200mV/DIV
RUN2
V
RUN1
IN
V
PGOOD2 PGOOD1
IN
AC-COUPLED
1V/DIV
LTC3619B
1.5µH
3.3µH
22pF
V
V
OUT1
1.8V AT
400mA
OUT2
SW2
SW1
3.4V AT
800mA
I
OUT
500mA/DIV
1190k
V
FB2
V
FB1
+
I
IN
511k
2.2mF
s2
SuperCap
RLIM GND
255k
10µF
255k
500mA/DIV
3619B TA01b
1ms/DIV
3619B TA01
V
I
= 5V, 500mA COMPLIANT
LOAD
IN
= 0A to 2.2A, CHANNEL 1 UNLOADED
116k
1000pF
I
= 475mA
LIM
3619bfa
ꢀ
LTC3619B
absoluTe MaxiMuM raTings (Note 1)
Input Supply Voltage (V )............................. –0.3 to 6V
Peak SW Source and Sink Current (Note 2)
IN
V
, V ........................................–0.3V to V + 0.3V
Channel 1........................................................ 900mA
Channel 2............................................................. 2.7A
Operating Junction Temperature Range
FB1 FB2
IN
RUN1, RUN2, RLIM..........................–0.3V to V + 0.3V
IN
SW1, SW2........................................–0.3V to V + 0.3V
IN
PGOOD1, PGOOD2...........................–0.3V to V + 0.3V
(Notes 3, 6, 8)........................................–40 to 125°C
Storage Temperature Range .................. –65°C to 125°C
Lead Temperature (Soldering, 10 sec)
IN
P-channel SW Source Current (DC) (Note 2)
Channel 1........................................................ 600mA
Channel 2................................................................1A
N-channel SW Source Current (DC) (Note 2)
MSOP Package .................................................300°C
Reflow Peak Body Temperature ............................260°C
Channel 1........................................................ 600mA
Channel 2................................................................1A
pin conFiguraTion
TOP VIEW
TOP VIEW
V
1
2
3
4
5
10
9
V
FB2
FB1
V
1
2
3
4
5
10
9
V
FB2
FB1
RUN1
RLIM
RUN2
RUN1
RLIM
RUN2
11
GND
11
8
PGOOD2
SW2
8
PGOOD2
SW2
GND
PGOOD1
SW1
7
6
PGOOD1
SW1
7
V
IN
6
V
IN
MSE PACKAGE
10-LEAD PLASTIC MSOP
= 125°C, θ = 45°C/W
JA
EXPOSED PAD (PIN 11) IS GND, MUST BE SOLDERED TO PCB
DD PACKAGE
T
JMAX
10-LEAD (3mm s 3mm) PLASTIC DFN
= 125°C, θ = 40°C/W
EXPOSED PAD (PIN 11) IS GND, MUST BE SOLDERED TO PCB
T
JMAX
JA
orDer inForMaTion
LEAD FREE FINISH
LTC3619BEDD#PBF
LTC3619BIDD#PBF
LTC3619BEMSE#PBF
LTC3619BIMSE#PBF
TAPE AND REEL
PART MARKING*
LFFH
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LTC3619BEDD#TRPBF
LTC3619BIDD#TRPBF
LTC3619BEMSE#TRPBF
LTC3619BIMSE#TRPBF
–40°C to 125°C
–40°C to 125°C
–40°C to 125°C
–40°C to 125°C
10-Lead (3mm × 3mm) Plastic DFN
10-Lead (3mm × 3mm) Plastic DFN
10-Lead Plastic MSOP
LFFH
LTFFJ
LTFFJ
10-Lead Plastic MSOP
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
Consult LTC Marketing for information on non-standard lead based finish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
elecTrical characTerisTics The l denotes the specifications which applꢀ over the full operating
junction temperature range, otherwise specifications are at TA = 2±°C (Note 3)
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
5.5
UNITS
V
l
l
V
IN
V
V
Operating Voltage Range
Undervoltage Lockout
2.5
IN
IN
V
V
Low to High
IN
2.1
2.5
V
UV
3619bfa
ꢁ
LTC3619B
elecTrical characTerisTics The l denotes the specifications which applꢀ over the full operating
junction temperature range, otherwise specifications are at TA = 2±°C (Note 3)
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
l
I
Feedback Pin Input Current
Feedback Voltage (Channels 1, 2)
30
nA
FB
l
l
V
LTC3619BE, –40°C < T < 85°C (Note 7)
0.588
0.582
0.600
0.600
0.612
0.618
V
V
FBREG
J
LTC3619BI, –40°C < T < 125°C (Note 7)
J
V
Line Regulation
V
= 2.5V to 5.5V (Note 7)
IN
0.01
0.25
%/V
ΔV
ΔV
FB
LINEREG
V
V
Load Regulation (Channel 1)
Load Regulation (Channel 2)
I
= 0mA to 400mA (Note 7)
= 0mA to 800mA (Note 7)
0.5
0.5
%
%
FB
FB
LOAD
LOAD
LOADREG
I
I
Supply Current
Active Mode (Note 4)
Shutdown
S
V
V
= V = 0.95 × V
FBREG
600
875
1
µA
µA
FB1
FB2
= V
= 0V, V = 5.5V
IN
RUN1
RUN2
l
f
I
Oscillator Frequency
V
= V
1.8
2.25
2.7
MHz
OSC
FB
IN
FBREG
Peak Switch Current Limit
Channel 1 (400mA)
V
= 5V, V < V
, Duty Cycle <35%
LIM(PEAK)
FB
FBREG
550
1800
800
2400
mA
mA
Channel 2 (800mA)
I
Input Average Current Limit
RLIM = 116k
RLIM = 116k, LTC3619BE
RLIM = 116k, LTC3619BI
450
437
427
475
475
475
500
513
523
mA
mA
mA
INLIM
l
l
R
Channel 1 (Note 5)
DS(ON)
Top Switch On-Resistance
Bottom Switch On-Resistance
Channel 2 (Note 5)
V
V
= 5V, I = 100mA
0.45
0.35
Ω
Ω
IN
IN
SW
= 5V, I = 100mA
SW
Top Switch On-Resistance
Bottom Switch On-Resistance
V
IN
V
IN
= 5V, I = 100mA
0.27
0.25
Ω
Ω
SW
= 5V, I = 100mA
SW
I
t
Switch Leakage Current
Soft-Start Time
V
= 5V, V = 0V
RUN
0.01
0.95
1
1
µA
ms
V
SW(LKG)
IN
V
FB
from 0.06V to 0.54V
0.3
0.4
1.3
1.2
1
SOFTSTART
l
l
V
RUN Threshold High
RUN Leakage Current
Power Good Threshold
RUN
RUN
I
0V ≤ V
≤ 5V
0.01
µA
RUN
PGOOD
Entering Window
V
FB
V
FB
Ramping Up
Ramping Down
–5
5
–7
7
%
%
Leaving Window
V
FB
V
FB
Ramping Up
Ramping Down
9
–9
11
–11
%
%
PGOOD Blanking
Power Good Blanking Time
PGOOD Rising and Falling, V = 5V
90
15
µs
Ω
IN
R
Power Good Pull-Down On-Resistance
PGOOD Leakage Current
8
30
1
PGOOD
PGOOD
I
V
= 5V
µA
PGOOD
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 4: Dynamic supply current is higher due to the internal gate charge
being delivered at the switching frequency.
Note ±: The switch on-resistance is guaranteed by correlation to wafer
level measurements.
Note 2: Guaranteed by long term current density limitations.
Note 3: The LTC3619B is tested under pulsed load conditions such that
Note 6: This IC includes overtemperature protection that is intended
to protect the device during momentary overload conditions. Junction
temperature will exceed 125°C when overtemperature protection is active.
Continuous operation above the specified maximum operating junction
temperature may impair device reliability.
Note 7: The converter is tested in a proprietary test mode that connects
the output of the error amplifier to the SW pin, which is connected to an
external servo loop.
T ≈ T . The LTC3619BE is guaranteed to meet performance specifications
J
A
from 0°C to 85°C. Specifications over the –40°C to 125°C operating
junction temperature range are assured by design, characterization and
correlation with statistical process controls. The LTC3619BI is guaranteed
to meet specified performance over the full –40°C to 125°C operating
junction temperature range. Note that the maximum ambient temperature
is determined by specific operating conditions in conjunction with board
layout, the rated package thermal resistance and other environmental
factors.
Note 8: T is calculated from the ambient temperature T and the power
J
A
dissipation as follows: T = T + (P )(θ °C/W)
J
A
D
JA
3619bfa
ꢂ
LTC3619B
TA = 2±°C, VIN = ±V, unless otherwise noted.
Typical perForMance characTerisTics
Pulse-Skipping Mode Operation
Supplꢀ Current vs Temperature
Efficiencꢀ vs Input Voltage
100
900
800
700
600
500
400
300
200
RUN1 = RUN2 = V
LOAD
IN
SW
2V/DIV
90
80
70
60
50
I
= 0A
V
= 5.5V
IN
V
OUT
50mV/DIV
AC-
V
= 2.7V
IN
COUPLED
I
I
I
= 100mA
= 400mA
= 800mA
I
I
I
= 10mA
= 1mA
= 0.1mA
40
30
20
10
0
OUT
OUT
OUT
OUT
OUT
OUT
I
L
100mA/DIV
3619B G01
5µs/DIV
V
= 3.3V
OUT
V
V
LOAD
= 5V
IN
CHANNEL 2
= 3.3V
= 5mA
OUT
I
3.5
4
4.5
(V)
5
5.5
–50 –25
0
25
50
75 100 125
V
TEMPERATURE (°C)
IN
3619B G03
3619B G02
Oscillator Frequencꢀ
vs Temperature
Switch Leakage vs Input Voltage
Regulated Voltage vs Temperature
1.5
1.0
2.5
2.4
2.3
2.2
2.1
2.0
1.9
1.8
1000
800
600
400
200
0
CHANNEL 1
CHANNEL 2
0.5
MAIN SWITCH
0
SYNCHRONOUS SWITCH
–0.5
–1.0
–1.5
V
V
V
V
= 2.7V
IN
IN
IN
IN
= 3.6V
= 4.2V
= 5V
–50 –25
0
25
50
75 100 125
–50 –25
0
25
50
75 100 125
2.5
3
3.5
4
4.5
5
5.5
TEMPERATURE (°C)
TEMPERATURE (°C)
V
(V)
IN
3619B G04
3619B G05
3619B G06
Switch On-Resistance
vs Input Voltage
Switch On-Resistance
Switch On-Resistance
vs Temperature, Channel 1
vs Temperature, Channel 2
0.7
0.6
0.5
0.4
0.3
0.2
0.5
0.4
0.3
0.2
0.1
0
0.7
0.6
0.5
0.4
0.3
0.2
0.1
CHANNEL 1
CHANNEL 2
V
V
V
= 2.7V
= 3.6V
= 5V
V
V
V
= 2.7V
= 3.6V
= 5V
IN
IN
IN
IN
IN
IN
MAIN SWITCH
650
550
450
350
250
MAIN SWITCH
MAIN SWITCH
SYNCHRONOUS SWITCH
25 50
SYNCHRONOUS SWITCH
SYNCHRONOUS SWITCH
–0.1
2.5
3
3.5
4
4.5
5
5.5
–50 –25
0
25
50
75 100 125
–50 –25
0
75 100 125
V
(V)
TEMPERATURE (°C)
TEMPERATURE (°C)
IN
3619B G07
3619B G08
3619B G09
3619bfa
ꢃ
LTC3619B
TA = 2±°C, VIN = ±V, unless otherwise noted.
Typical perForMance characTerisTics
Efficiencꢀ vs Load Current
Efficiencꢀ vs Load Current
Efficiencꢀ vs Load Current
100
90
80
70
60
50
40
30
20
10
0
100
90
80
70
60
50
40
30
20
10
0
100
90
80
70
60
50
40
30
20
10
0
V
= 3.3V
V
= 1.2V
OUT
V
= 3.3V
OUT
OUT
CHANNEL 2
CHANNEL 1
CHANNEL 1
V
V
V
V
= 2.7V
= 3.6V
= 4.2V
= 5V
IN
IN
IN
IN
V
V
V
= 3.6V
= 4.2V
= 5V
V
V
V
= 3.6V
= 4.2V
= 5V
IN
IN
IN
IN
IN
IN
0.0001
0.001
0.01
0.1
1
0.0001
0.001
0.01
0.1
1
0.0001
0.001
0.01
0.1
1
OUTPUT CURRENT (A)
OUTPUT CURRENT (A)
OUTPUT CURRENT (A)
3619B G11
3619B G12
3619B G10
Efficiencꢀ vs Load Current
Load Regulation
Load Regulation
100
90
80
70
60
50
40
30
20
10
0
3.0
2.5
2.0
1.5
1.0
0.5
0
3.0
2.5
2.0
1.5
1.0
0.5
0
V
= 1.2V
CHANNEL 1
CHANNEL 2
OUT
CHANNEL 2
V
V
V
V
= 2.7V
= 3.6V
= 4.2V
= 5V
IN
IN
IN
IN
V
V
V
= 1.8V
= 2.5V
= 3.3V
V
V
V
= 1.8V
= 2.5V
= 3.3V
OUT
OUT
OUT
OUT
OUT
OUT
–0.5
–1.0
–0.5
–1.0
0.0001
0.001
0.01
0.1
1
0
100
200
300
400
0
100 200 300 400 500 600 700 800
OUTPUT CURRENT (A)
LOAD CURRENT (mA)
LOAD CURRENT (mA)
3619B G13
3619B G14
3619B G15
Line Regulation
Start-Up from Shutdown
Start-Up from Shutdown
0.6
0.4
V
= 1.8V
= 100mA
OUT
RUN
2V/DIV
RUN
2V/DIV
I
LOAD
V
OUT
2V/DIV
0.2
V
OUT
R
LIM
0
1V/DIV
1V/DIV
I
L
–0.2
–0.4
–0.6
I
IN
250mA/DIV
500mA/DIV
CHANNEL 2
2ms/DIV
3619B G18
3619B G17
200µs/DIV
V
R
C
= 5V, V
= 3.3V
OUT
V
R
C
= 5V, V
= 3.4V
OUT
IN
IN
= 7Ω
= NO LOAD, C = 4.4mF
L L
LOAD
2.5
3.0
3.5
4.0
(V)
4.5
5.0
5.5
= 4.7µF
= 2200pF, I
= 500mA
LIM
LOAD
LIM
V
IN
3619B G16
3619bfa
ꢄ
LTC3619B
TA = 2±°C, VIN = ±V, unless otherwise noted.
Load Step
Typical perForMance characTerisTics
Average Input Current Limit
vs Temperature
Load Step
8
6
V
LIM
= 5V
IN
V
OUT
I
= 475mA
V
OUT
200mV/DIV
200mV/DIV
AC-COUPLED
4
AC-COUPLED
2
I
L
I
L
500mA/DIV
0
500mA/DIV
–2
–4
–6
–8
I
LOAD
I
LOAD
500mA/DIV
500mA/DIV
3619B G20
3619B G21
20µs/DIV
= 3.3V
20µs/DIV
= 1.8V
V
= 5V, V
V
= 5V, V
OUT
IN
OUT
IN
I
= 0A TO 400mA
I
= 40mA TO 400mA
LOAD
C
LOAD
C = 4.7µF
L
–50
125
–25
0
25
50
75 100
= 4.7µF
L
TEMPERATURE (°C)
3619B G19
pin FuncTions
FB1
(DD/MSE)
V
(Pin1/Pin1):Regulator1OutputFeedback.Receives
SW2 (Pin 7/Pin 7): Regulator 2 Switch Node Connection
the feedback voltage from the external resistive divider
across the regulator 1 output. Nominal voltage for this
pin is 0.6V.
to the Inductor. This pin swings from V to GND.
IN
PGOOD2(Pin8/Pin8):Open-DrainLogicOutput.PGOOD2
is pulled to ground if the voltage on the V
within power good threshold.
pin is not
FB2
RUN1 (Pin 2/Pin 2): Regulator 1 Enable. Forcing this pin
to V enables regulator 1, while forcing it to GND causes
IN
RUN2 (Pin 9/Pin 9): Regulator 2 Enable. Forcing this pin
regulator 1 to shut down.
to V enables regulator 2, while forcing it to GND causes
IN
RLIM (Pin 3/Pin 3): Average Input Current Limit Program
Pin. Place a resistor and capacitor in parallel from this
pin to ground.
regulator 2 to shut down.
V
(Pin 10/Pin 10): Regulator 2 Output Feedback.
FB2
Receives the feedback voltage from the external resistive
divider across the regulator 2 output. Nominal voltage for
this pin is 0.6V.
PGOOD1(Pin4/Pin4):Open-DrainLogicOutput.PGOOD1
is pulled to ground if the voltage on the V
within power good threshold.
pin is not
FB1
GND (Pin 11/Pin 11): Ground. Bottom Exposed Pad. Con-
SW1 (Pin ±/Pin ±): Regulator 1 Switch Node Connection
to the Inductor. This pin swings from V to GND.
nect to the (–) terminal of C , and the (–) terminal of
OUT
IN
C . The Exposed Pad must be soldered to PCB.
IN
V
(Pin 6/Pin 6): Main Power Supply. Must be closely
IN
de-coupled to GND.
3619bfa
ꢅ
LTC3619B
FuncTional DiagraM
REGULATOR 1
–
0.654V
+
V
FB1
–
+
PGOOD1
8
MIN
CLAMP
0.546V
6
V
IN
SLOPE
COMP
V
FB1 10
–
+
I
TH
EA
–
SLEEP
–
+
I
COMP
0.6V
V
+
SLEEP
S
R
Q
RS
LATCH
SOFT-START
Q
+
I
SWITCHING
LOGIC
COMP
AND
–
BLANKING
CIRCUIT
ANTI
SHOOT-
THRU
7
SW1
+
–
I
RCMP
SHUTDOWN
GND
11
3
RLIM
2
+
–
RUN1
RUN2
SLEEP2
SLEEP1
0.6V REF
OSC
TO REGULATOR 2 ONLY
1V
9
OSC
MIN
CLAMP
6
V
IN
SLOPE
COMP
–
–
+
I
TH
V
FB2
1
EA
SLEEP
–
–
+
I
COMP
0.6V
V
+
SLEEP
S
R
Q
RS
LATCH
SOFT-START
+
I
Q
SWITCHING
LOGIC
AND
BLANKING
CIRCUIT
COMP
–
–
+
ANTI
SHOOT-
THRU
0.654V
5
SW2
GND
V
FB2
–
+
PGOOD2
4
0.546V
+
–
I
RCMP
11
SHUTDOWN
REGULATOR 2
3619B FD
3619bfa
ꢆ
LTC3619B
operaTion
The LTC3619B uses a constant-frequency, current mode
architecture. The operating frequency is set at 2.25MHz.
Both channels share the same clock and run in-phase.
will begin skipping pulses to maintain output regulation.
This mode of operation exhibits low output ripple as well
as low audio noise and reduced RF interference while
providing reasonable low current efficiency.
The output voltage is set by an external resistor divider
returned to the V pins. An error amplifier compares the
FB
Dropout Operation
dividedoutputvoltagewithareferencevoltageof0.6Vand
regulates the peak inductor current accordingly.
When the input supply voltage decreases toward the
output voltage the duty cycle increases to 100%, which
is the dropout condition. In dropout, the PMOS switch is
turnedoncontinuouslywiththeoutputvoltagebeingequal
to the input voltage minus the voltage drops across the
internal P-channel MOSFET and the inductor.
The LTC3619B continuously monitors the input current
of both channels. When the sum of the currents of both
channels exceeds the programmed input current limit set
by an external resistor, R , channel 2 is current limited
while channel 1 remains regulated.
LIM
AnimportantdesignconsiderationisthattheR
ofthe
DS(ON)
Main Control Loop
P-channel switch increases with decreasing input supply
voltage (see the Typical Performance Characteristics sec-
tion). Therefore, the user should calculate the worst-case
powerdissipationwhentheLTC3619Bisusedat100%duty
cycle with low input voltage (see Thermal Considerations
in the Applications Information section).
Duringnormaloperation,thetoppowerswitch(P-channel
MOSFET) is turned on at the beginning of a clock cycle
when the V voltage is below the reference voltage. The
FB
current into the inductor and the load increases until the
peak inductor current (controlled by I ) is reached. The
TH
RS latch turns off the synchronous switch and energy
stored in the inductor is discharged through the bottom
switch (N-channel MOSFET) into the load until the next
clock cycle begins, or until the inductor current begins to
Soft-Start
Inordertominimizetheinrushcurrentontheinputbypass
capacitor, the LTC3619B slowly ramps up the output volt-
age during start-up. Whenever the RUN1 or RUN2 pin is
pulled high, the corresponding output will ramp from zero
tofull-scaleoveratimeperiodofapproximately750µs.This
prevents the LTC3619B from having to quickly charge the
output capacitor and thus supplying an excessive amount
of instantaneous current.
reverse (sensed by the I
comparator).
RCMP
The peak inductor current is controlled by the internally
compensated I voltage, which is the output of the er-
TH
ror amplifier. This amplifier regulates the V pin to the
FB
internal 0.6V reference by adjusting the peak inductor
current accordingly.
When the output is loaded heavily, for example, with mil-
lifarad of capacitance, it may take longer than 750µs to
charge the output to regulation. If the output is still low
after the soft-start time, the LTC3619B will try to quickly
charge the output capacitor. In this case, the input current
limit (after it engages) can prevent excessive amount of
instantaneous current that is required to quickly charge
the output. See the Channel 2 Start-Up from Shutdown
curve in the Typical Performance Characteristics section.
After input current limit is engaged, the output slowly
ramps up to regulation while limited by its 500mA of
input current.
When the input current limit is engaged, the peak inductor
current will be lowered, which then reduces the switching
duty cycle and V . This allows the input voltage to stay
OUT
regulated when its programmed current output capability
is met.
Light Load Operation
TheLTC3619Bwillautomaticallytransitionfromcontinuous
operation to the pulse-skipping operation when the load
current is low. The inductor current is not fixed during the
pulse-skippingmodewhichallowstheLTC3619Btoswitch
at constant-frequency down to very low currents, where it
3619bfa
ꢇ
LTC3619B
operaTion
Short-Circuit Protection
Programming Input Current Limit
Selection of one external R resistor will program the
When either regulator output is shorted to ground, the
corresponding internal N-channel switch is forced on for
a longer time period for each cycle in order to allow the
inductor to discharge, thus preventing inductor current
runaway. This technique has the effect of decreasing
switching frequency. Once the short is removed, normal
operation resumes and the regulator output will return to
its nominal voltage.
LIM
input current limit. The current limit can be programmed
from 200mA up to I current. As the input current
PEAK
increases, R
voltage will follow. When R
reaches
LIM
LIM
the internal comparator threshold of 1V, channel 2’s
power PFET on-time will be shortened, thereby, limiting
the input current.
Use the following equation to select the R
resistance
LIM
that corresponds to the input current limit.
Input Current Limit
55kΩ− A
IDC(A)
Internal current sense circuitry in each channel measures
the inductor current through the voltage drop across the
power PFET switch and forces the same voltage across
the small sense PFET. The voltage across the small sense
PFET generates a current representing 1/55,000th of the
inductor current during the on-cycle. The current out of
RLIM pin is the summed representation of the inductor
currents from both channels, which can be expressed in
the following equation.
RLIM
=
I
is the input current (at V ) to be limited. The follow-
IN
DC
ing are some R values with the corresponding current
LIM
limit.
R
LIM
I
DC
91.6k
110k
600mA
500mA
400mA
137.5k
I
= I
• D1 • K1 + I
• D2 • K2,
RLIM
OUT1
OUT2
where D1 = V
/V and D2 = V
/V are the duty
(sensePFET)
DS(ON)
OUT1 IN
OUT2 IN
Selection of C Capacitance
cycle of channel 1 and 2, respectively.
LIM
Since I
current is a function of the inductor current,
K1istheratioR (powerPFET)/R
of channel 1, and K2 is the ratio R
RLIM
DS(ON)
its dependency on the duty cycle cannot be ignored. Thus,
a C capacitor is needed to integrate the I current
(power PFET)/
DS(ON)
R
(sense PFET) of channel 2. The ratio of the power
LIM
RLIM
DS(ON)
andsmoothouttransientcurrents.TheLTC3619Bisstable
with any size capacitance >100pF at the RLIM pin.
PFET to the sense PFET is trimmed to within 2%.
Given that both PFETs are carefully laid out and matched,
their temperature and voltage coefficient effects will be
similar and their terms be canceled out in the equation. In
that case, the constants K1 and K2 will only be dependent
on area scaling, which is trimmed to within 2%. Thus, the
Each application input current limit will call for different
C
valuetooptimizeitsresponsetime.UsingalargeC
LIM
LIM
capacitor requires longer time for the RLIM pin voltage to
charge.Forexample,considertheapplication500mAinput
currentlimit,5Vinputand1A,2.5Voutputwitha50%duty
cycle. When an instantaneous 1A output pulse is applied,
the current out of the RLIM pin becomes 1A/55k = 18.2µA
during the 50% on-time or 9.1µA full duty cycle. With a
I
current will track the input current very well over
RLIM
varying temperature and V .
IN
The RLIM pin can be grounded to disable input current
limit function.
C
capacitor of 1µF, R of 116k, and using I = CdV/dt,
LIM
LIM
it will take 110ms for C to charge from 0V to 1V. This is
LIM
the time after which the LTC3619B will start input current
3619bfa
ꢈ
LTC3619B
operaTion
limiting. Any current within this time must be considered
in each application to determine if it is tolerable.
is applied once every 4.7ms. A C
capacitor of 2.2nF
LIM
requires 92µs for V
to charge from 0V to 1V. During
RLIM
this 92µs, the input current limit is not yet engaged and
the output must deliver the required current load. This
may cause the input voltage to droop if the current com-
pliance is exceeded. Depending on how long this time is,
Figure 1a shows V (I ) current below input current limit
IN IN
with a C
capacitor of 0.1µF. Channel 1 is unloaded to
LIM
simplify calculations. When the load pulse is applied,
under the specified condition, I current is 1.1A/55k •
LIM
the V supply decoupling capacitor can provide some of
IN
0.66 = 13.2µA, where 0.66 is the duty cycle. It will take a
this current before V droops too much. In applications
IN
little more than 7.5ms to charge the C capacitor from
LIM
with a bigger V supply decoupling capacitor and where
IN
0V to 1V, after which the LTC3619B begins to limit input
V supply is allow to droop closer to dropout, the C
IN
LIM
current. The I current is not limited during this 7.5ms
IN
capacitor can be increased slightly. This will delay the
time and is more than 725mA. This current transient may
cause the input supply to temporarily droop if the supply
current compliance is exceeded, but recovers after the
input current limit engages. The output will continue to
deliver the required current load while the output voltage
droops to allow the input voltage to remain regulated
during input current limit.
start of input current limit and artificially regulated V
OUT
before input current limit is engaged. In this case, within
the 577µs load pulse, the V voltage will stay artificially
OUT
regulated for 92µs out of the total 577µs before the input
current limit activates. This approach may be used if a
faster recovery on the output is desired.
Selecting a very small C
will speed up response time
LIM
For applications with short load pulse duration, a smaller
but it can put the device within threshold of interfering
with normal operation and input current limit in every
few switching cycles. This may be undesirable in terms
of noise. Use 2πRC >> 100/clock frequency (2.25MHz) as
C
LIM
capacitor may be the better choice as in the example
shown in Figure 1b. Channel 1 is unloaded for simplifi-
cation. In this example, a 577µs, 0A to 2A output pulse
V
V
OUT
OUT
200mV/DIV
2V/DIV
V
IN
I
IN
AC-COUPLED
1V/DIV
500mA/DIV
V
RLIM
1V/DIV
I
OUT
500mA/DIV
I
I
IN
L
500mA/DIV
1A/DIV
3619B F01b
3619B F01a
1ms/DIV
50ms/DIV
V
= 5V, 500mA COMPLIANT
V
= 5V, 500mA COMPLIANT
IN
IN
R
I
= 116k, C
= 2200pF
R
I
= 116k, C
= 0.1µF
LIM
LIM
= 0A to 2A, C
LIM
LIM
= 2.2mF, V
= 3.3V
OUT
= 0A to 1.1A, C
= 2.2mF, V = 3.3V
OUT
LOAD
LIM
OUT
LOAD
LIM
OUT
I
= 475mA, CHANNEL 1 NOT LOADED
I
= 475mA, CHANNEL 1 NOT LOADED
Figure 1a. Input Current Limit Within 100ms Load Pulses
Figure 1b. Input Current Limit Within
±77µs, 2A Repeating Load Pulses
3619bfa
ꢀ0
LTC3619B
applicaTions inForMaTion
AgeneralLTC3619BapplicationcircuitisshowninFigure2.
Externalcomponentselectionisdrivenbytheloadrequire-
ment, andbeginswiththeselectionoftheinductorL. Once
Inductor Core Selection
Differentcorematerialsandshapeswillchangethesize/cur-
rent and price/current relationship of an inductor. Toroid
or shielded pot cores in ferrite or permalloy materials are
small and do not radiate much energy, but generally cost
more than powdered iron core inductors with similar
electrical characteristics. The choice of which style induc-
tor to use often depends more on the price versus size
requirements, and any radiated field/EMI requirements,
than on what the LTC3619B requires to operate. Table 1
shows some typical surface mount inductors that work
well in LTC3619B applications.
the inductor is chosen, C and C
can be selected.
IN
OUT
Inductor Selection
Although the inductor does not influence the operat-
ing frequency, the inductor value has a direct effect on
ripple current. The inductor ripple current ΔI decreases
L
with higher inductance and increases with higher V or
IN
V
:
OUT
VOUT
fO •L
VOUT
ΔIL =
• 1−
(1)
Table 1. Representative Surface Mount Inductors
V
IN
MANU-
MAX DC
FACTURER PART NUMBER VALUE CURRENT DCR
HEIGHT
Accepting larger values of ΔI allows the use of low
L
Coilcraft
LPS4012-152ML 1.5µH 2200mA 0.070Ω 1.2mm
inductances, but results in higher output voltage ripple,
greater core losses, and lower output current capability.
A reasonable starting point for setting ripple current is
40%ofthemaximumoutputloadcurrent.So,fora800mA
LPS4012-222ML 2.2µH 1750mA 0.100Ω 1.2mm
LPS4012-332ML 3.3µH 1450mA 0.100Ω 1.2mm
LPS4012-472ML 4.7µH 1450mA 0.170Ω 1.2mm
LPS4018-222ML 2.2µH 2300mA 0.070Ω 1.8mm
LPS4018-332ML 3.3µH 2000mA 0.080Ω 1.8mm
LPS4018-472ML 4.7µH 1800mA 0.125Ω 1.8mm
regulator, ΔI = 320mA (40% of 800mA).
L
FDK
FDKMIPF2520D
FDKMIPF2520D
FDKMIPF2520D
4.7µH 1100mA 0.11Ω
3.3µH 1200mA 0.1Ω
2.2µH 1300mA 0.08Ω
1mm
1mm
1mm
The inductor value will also have an effect on Burst Mode
operation. The transition to low current operation begins
when the peak inductor current falls below a level set by
the internal burst clamp. Lower inductor values result in
higher ripple current which causes the transition to occur
at lower load currents. This causes a dip in efficiency in
the upper range of low current operation. Furthermore,
lower inductance values will cause the bursts to occur
with increased frequency.
Murata
LQH32CN4R7M23 4.7µH 450mA
4.7µH 950mA
0.2Ω
0.2Ω
2mm
1.2mm
2mm
Panasonic ELT5KT4R7M
Sumida CDRH2D18/LD
4.7µH 630mA 0.086Ω
CDH38D11SNP- 3.3μH 1560mA 0.115Ω 1.2mm
3R3M
CDH38D11SNP- 2.2μH 1900mA 0.082Ω 1.2mm
2R2M
Taiyo Yuden CB2016T2R2M
CB2012T2R2M
2.2µH 510mA
2.2µH 530mA
3.3µH 410mA
2.2µH 1100mA
4.7µH 750mA
0.13Ω 1.6mm
0.33Ω 1.25mm
0.27Ω 1.6mm
V
IN
CB2016T3R3M
2.5V TO 5.5V
C1
NR30102R2M
0.1Ω
1mm
1mm
NR30104R7M
0.19Ω
RUN2 V RUN1
IN
TDK
VLF3010AT4R7- 4.7µH 700mA
0.28Ω
1mm
1mm
1mm
PGOOD2 PGOOD1
LTC3619B
MR70
L2
L1
VLF3010AT3R3- 3.3µH 870mA
MR87
0.17Ω
V
V
OUT2
SW2
SW1
OUT1
C
C
F1
F2
VLF3010AT2R2- 2.2µH 1000mA 0.12Ω
M1R0
VLF4012AT-2R2 2.2µH 1500mA 0.076Ω 1.2mm
V
V
FB1
FB2
R4
R2
RLIM
GND
C
C
OUT1
M1R5
OUT2
R3
R1
VLF5012ST-3R3 3.3μH 1700mA 0.095Ω 1.2mm
3619B F02
M1R7
C
R
LIM
LIM
VLF5014ST-2R2 2.2µH 2300mA 0.059Ω 1.4mm
M2R3
Figure 2. LTC3619B General Schematic
3619bfa
ꢀꢀ
LTC3619B
applicaTions inForMaTion
Input Capacitor (C ) Selection
capacitor types include Sanyo POSCAP, Kemet T510 and
T495 series, and Sprague 593D and 595D series. Consult
the manufacturer for other specific recommendations.
IN
In continuous mode, the input current of the converter is a
square wave with a duty cycle of approximately V /V .
OUT IN
Topreventlargevoltagetransients, alowequivalentseries
resistance (ESR) input capacitor sized for the maximum
RMS current must be used. The maximum RMS capacitor
current is given by:
Using Ceramic Input and Output Capacitors
Higher values, lower cost ceramic capacitors are now
becoming available in smaller case sizes. Their high ripple
current, high voltage rating and low ESR make them
ideal for switching regulator applications. Because the
LTC3619B control loop does not depend on the output
capacitor’s ESR for stable operation, ceramic capacitors
can be used freely to achieve very low output ripple and
small circuit size.
VOUT(V − VOUT
)
IN
IRMS ≈IMAX
V
IN
Where the maximum average output current I
equals
MAX
the peak current minus half the peak-to-peak ripple cur-
rent, I = I – ΔI /2. This formula has a maximum at
MAX LIM
L
However, care must be taken when ceramic capacitors are
used at the input. When a ceramic capacitor is used at the
input and the power is supplied by a wall adapter through
long wires, a load step at the output can induce ringing at
V = 2V , where I = I /2. This simple worst-case
IN
OUT
RMS OUT
is commonly used to design because even significant
deviations do not offer much relief. Note that capacitor
manufacturer’s ripple current ratings are often based on
only2000hourslifetime.Thismakesitadvisabletofurther
deratethecapacitor,orchooseacapacitorratedatahigher
temperaturethanrequired.Severalcapacitorsmayalsobe
paralleled to meet the size or height requirements of the
design. An additional 0.1µF to 1µF ceramic capacitor is
theinput, V . Atbest, thisringingcancoupletotheoutput
IN
and be mistaken as loop instability. At worst, a sudden
inrush of current through the long wires can potentially
cause a voltage spike at V , large enough to damage the
IN
part. For more information, see Application Note 88.
also recommended on V for high frequency decoupling
IN
When choosing the input and output ceramic capacitors,
choose the X5R or X7R dielectric formulations. These
dielectrics have the best temperature and voltage charac-
teristics of all the ceramics for a given value and size.
when not using an all-ceramic capacitor solution.
Output Capacitor (C ) Selection
OUT
The selection of C
is driven by the required effective
OUT
series resistance (ESR). Typically, once the ESR require-
Setting the Output Voltage
ment for C
has been met, the RMS current rating
OUT
TheLTC3619BregulatestheV andV pinsto0.6Vdur-
FB1
FB2
generally far exceeds the I
requirement. The
RIPPLE(P-P)
is determined by:
ingregulation. Thus, theoutputvoltageissetbyaresistive
output ripple ΔV
OUT
divider, Figure 2, according to the following formula:
1
R2
R1
ΔVOUT ≈ ΔIL ESR+
VOUT = 0.6V 1+
(2)
8f C
O OUT
wheref =operatingfrequency,C
=outputcapacitance
OUT
O
Keeping the current small (<10µA) in these resistors
maximizes efficiency, but making it too small may allow
stray capacitance to cause noise problems or reduce the
phase margin of the error amp loop.
and ΔI = ripple current in the inductor. For a fixed output
L
voltage, the output ripple is highest at maximum input
voltage since ΔI increases with input voltage.
L
Iftantalumcapacitorsareused,itiscriticalthatthecapaci-
tors are surge tested for use in switching power supplies.
AnexcellentchoiceistheAVXTPSseriesofsurfacemount
tantalum.Thesearespeciallyconstructedandtestedforlow
ESR so they give the lowest ESR for a given volume. Other
To improve the frequency response of the main control
loop, a feedback capacitor (C ) may also be used. Great
F
care should be taken to route the V line away from noise
FB
sources, such as the inductor or the SW line.
3619bfa
ꢀꢁ
LTC3619B
applicaTions inForMaTion
Checking Transient Response
produce the most improvement. Percent efficiency can
be expressed as:
The regulator loop response can be checked by looking
at the load transient response. Switching regulators take
several cycles to respond to a step in load current. When
% Efficiency = 100% – (L1 + L2 + L3 + ...)
where L1, L2, etc., are the individual losses as a percent-
age of input power.
a load step occurs, V
immediately shifts by an amount
OUT
equal to ΔI
• ESR, where ESR is the effective series
LOAD
Although all dissipative elements in the circuit produce
losses, four sources usually account for the losses in
resistance of C . ΔI
also begins to charge or dis-
OUT
LOAD
chargeC generatingafeedbackerrorsignalusedbythe
OUT
LTC3619B circuits: 1) V quiescent current, 2) switching
regulator to return V
this recovery time, V
to its steady-state value. During
can be monitored for overshoot
IN
OUT
OUT
2
losses, 3) I R losses, 4) other system losses.
or ringing that would indicate a stability problem.
1. The V current is the DC supply current given in the
IN
Electrical Characteristics which excludes MOSFET
The initial output voltage step may not be within the
bandwidth of the feedback loop, so the standard second
order overshoot/DC ratio cannot be used to determine the
driver and control currents. V current results in a
IN
small (<0.1%) loss that increases with V , even at
IN
no load.
phase margin. In addition, feedback capacitors (C and
F1
C )canbeaddedtoimprovethehighfrequencyresponse,
F2
2. The switching current is the sum of the MOSFET driver
and control currents. The MOSFET driver current re-
sults from switching the gate capacitance of the power
MOSFETs. Each time a MOSFET gate is switched from
low to high to low again, a packet of charge dQ moves
as shown in Figure 2. Capacitor C provides phase lead by
F
creating a high frequency zero with R2 which improves
the phase margin.
Theoutputvoltagesettlingbehaviorisrelatedtothestability
of the closed-loop system and will demonstrate the actual
overall supply performance. For a detailed explanation of
optimizing the compensation components, including a re-
view of control loop theory, refer to Application Note 76.
from V to ground. The resulting dQ/dt is a current
IN
out of V that is typically much larger than the DC bias
IN
current. In continuous mode, I
= f (Q + Q ),
GATECHG
O T B
where Q and Q are the gate charges of the internal
T
B
top and bottom MOSFET switches. The gate charge
Insomeapplications,amoreseveretransientcanbecaused
by switching in loads with large (>1µF) input capacitors.
Thedischargedinputcapacitorsareeffectivelyputinparal-
losses are proportional to V and thus their effects
IN
will be more pronounced at higher supply voltages.
2
3. I R losses are calculated from the DC resistances of
lel with C , causing a rapid drop in V . No regulator
OUT
OUT
the internal switches, R , and external inductor, R .
can deliver enough current to prevent this problem if the
switchconnectingtheloadhaslowresistanceandisdriven
quickly. The solution is to limit the turn-on speed of the
load switch driver. A Hot Swap™ controller is designed
specifically for this purpose and usually incorporates cur-
rent limiting, short-circuit protection, and soft-starting.
SW
L
In continuous mode, the average output current flows
throughinductorL,butis“chopped”betweentheinternal
top and bottom switches. Thus, the series resistance
looking into the SW pin is a function of both top and
bottom MOSFET R
follows:
and the duty cycle (DC) as
DS(ON)
Efficiencꢀ Considerations
R
SW
= (R ) • (DC) + (R ) • (1– DC)
DS(ON)TOP DS(ON)BOT
The percent efficiency of a switching regulator is equal to
the output power divided by the input power times 100%.
It is often useful to analyze individual losses to determine
what is limiting the efficiency and which change would
TheR
forboththetopandbottomMOSFETscanbe
DS(ON)
obtained from the Typical Performance Characteristics
2
curves. Thus, to obtain I R losses:
2
2
I R losses = I
• (R + R )
SW L
OUT
3619bfa
ꢀꢂ
LTC3619B
applicaTions inForMaTion
4. Other“hidden”losses,suchascoppertraceandinternal
batteryresistances,canaccountforadditionalefficiency
degradations in portable systems. It is very important
to include these “system” level losses in the design of a
system. The internal battery and fuse resistance losses
Given that the thermal resistance of a properly soldered
DFN package is approximately 40°C/W, the junction
temperature of an LTC3619B device operating in a 70°C
ambient temperature is approximately:
T = (0.302W • 40°C/W) + 70°C = 82.1°C
J
can be minimized by making sure that C has adequate
IN
which is well below the absolute maximum junction tem-
perature of 125°C.
charge storage and very low ESR at the switching fre-
quency.Otherlosses,includingdiodeconductionlosses
during dead-time, and inductor core losses, generally
account for less than 2% total additional loss.
PC Board Laꢀout Considerations
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of
the LTC3619B. These items are also illustrated graphically
in the layout diagrams of Figures 3a and 3b. Check the
following in your layout:
Thermal Considerations
In a majority of applications, the LTC3619B does not dis-
sipate much heat due to its high efficiency. In the unlikely
event that the junction temperature somehow reaches ap-
proximately 150°C, both power switches will be turned off
and the SW node will become high impedance. The goal
of the following thermal analysis is to determine whether
the power dissipated causes enough temperature rise to
exceed the maximum junction temperature (125°C) of the
part. The temperature rise is given by:
1. Does the capacitor C connect to the power V (Pin 6)
IN
IN
andGND(Pin11)ascloselyaspossible?Thiscapacitor
provides the AC current of the internal power MOSFETs
and their drivers.
2. Are the respective C
and L closely connected? The
OUT
(–) plate of C
returns current to GND and the (–)
OUT
T
= P • θ
D JA
RISE
plate of C .
IN
where P is the power dissipated by the regulator and θ
D
JA
3. The resistor divider, R1 and R2, must be connected
between the (+) plate of C and a ground sense
is the thermal resistance from the junction of the die to
OUT1
the ambient temperature. The junction temperature, T ,
is given by:
J
line terminated near GND (Pin 11). The feedback sig-
nals V and V should be routed away from noisy
FB1
FB2
components and traces, such as the SW lines (Pins 5
and 7), and their trace length should be minimized.
T = T
J
+ T
AMBIENT
RISE
As a worst-case example, consider the case when the
LTC3619B is in dropout on both channels at an input
voltage of 2.7V with a load current of 400mA and 800mA
and an ambient temperature of 70°C. From the Typical
Performance Characteristics graph of Switch Resistance,
4. Keep sensitive components away from the SW pins, if
possible.TheinputcapacitorC ,C andtheresistors
IN LIM
should be routed away
from the SW traces and the inductors.
R1, R2, R3 and R4 and R
LIM
the R
of the switch is 0.56Ω and 0.33Ω. Therefore,
DS(ON)
5. A ground plane is preferred, but if not available, keep
the signal and power grounds segregated with small
signal components returning to the GND pin at a single
point. These ground traces should not share the high
power dissipated by each channel is:
2
P
D1
P
D2
= I
= I
• R
• R
= 90mV
OUT
OUT
DS(ON)
DS(ON)
2
= 212mV
current path of C or C
.
IN
OUT
6. Flood all unused areas on all layers with copper.
Flooding with copper will reduce the temperature rise
of power components. These copper areas should be
connected to V or GND.
IN
3619bfa
ꢀꢃ
LTC3619B
applicaTions inForMaTion
V
IN
2.5V TO 5.5V
RUN2 V RUN1
IN
C1
PGOOD2 PGOOD1
L2
L1
V
SW2
SW1
OUT1
C
C
F1
F2
V
OUT2
LTC3619B
V
V
FB2
FB1
R4
R2
RLIM
GND
C
OUT1
R3
R1
C
OUT2
R
LIM
C
LIM
3619B F03a
BOLD LINES INDICATE HIGH CURRENT PATHS
Figure 3a. LTC3619B Laꢀout Diagram (See Board Laꢀout Checklist)
V
V
GND
IN
OUT1
V
IN
VIA
C
OUT1
GND VIA
IN
C
L2
L1
V
OUT2
V
SW1
IN
SW2
PGOOD2
RUN2
PGD1
RLIM
RUN1
V
V
FB2
FB1
R3
R4
R1
R2
R
C
LIM
C
LIM
OUT2
C
F2
C
F1
VIA TO V
VIA TO V
OUT1
OUT2
GND
3619B F03b
Figure 3b. LTC3619B Suggested Laꢀout
3619bfa
ꢀꢄ
LTC3619B
applicaTions inForMaTion
Design Example
resistors should be kept small. Choosing 10µA with the
0.6V feedback voltage makes R1~60k. A close standard
1% resistor is 59k. Using Equation 2.
As a design example, consider using the LTC3619B in a
USB-GSMapplication, withV =5V, I
=500mA, with
IN
INMAX
the output of channel 2 charging a SuperCap of 4.4mF. The
load on each channel requires a maximum of 400mA and
800mA in active mode and 2mA in standby mode. The
V
0.6
OUT
R2=
−1 •R1=118k
An optional 22pF feedback capacitor (C ) may be used
to improve transient response.
F1
output voltages are V
= 1.8V and V
= 3.4V.
OUT1
OUT2
Start with channel 1. First, calculate the inductor value
for about 40% ripple current (160mA in this example) at
Using the same analysis for channel 2 (V
the results are:
= 3.4V),
OUT2
maximum V . Using a derivation of Equation 1:
IN
L2 = 1.5µH
R3 = 59k
1.8V
1.8V
5V
L1=
• 1−
= 3.2µH
2.25MHz •(160mA)
R4 = 276k
For the inductor, use the closest standard value of
3.3µH.
A feed forward capacitor is not used on channel 2 since
the 4.4mF SuperCap will inhibit any fast output voltage
transients. Figure 4 shows the complete schematic for
this example, along with the efficiency curve and transient
response. Input current limit is set at 475mA average cur-
A 10µF ceramic capacitor should be more than sufficient
for this output capacitor. As for the input capacitor, a
typical value of C = 10µF should suffice, if the source
IN
impedance is very low.
rent, R = 116k, C = 2200pF. See Programming Input
LIM
LIM
The feedback resistors program the output voltage. To
maintain high efficiency at light loads, the current in these
Current Limit section for selecting R and Selection of
LIM
C
LIM
Capacitance section for C
.
LIM
V
IN
USB INPUT 5V
C
IN
10µF
RUN2 V RUN1
IN
PGOOD2 PGOOD1
LTC3619B
L2
1.5µH
L1
3.3µH
V
V
OUT1
1.8V AT
400mA
OUT2
SW2
SW1
3.4V AT
800mA
C
, 22pF
F1
R4
276k
V
FB2
V
FB1
+
C
C
R1
R2
OUT1
R3
59k
OUT2
RLIM
GND
10µF
2.2mF
59k 118k
s2
SuperCap
3619B F04a
R
116k
C
LIM
LIM
2200pF
I
= 475mA
LIM
C
, C
OUT2
: AVX 08056D106KAT2A
L1: COILCRAFT LPS4012-332ML
L2: COILCRAFT LPS4012-152ML
IN OUT1
C
: VISHAY 592D228X96R3X2T20H
Figure 4a. Design Example Circuit
3619bfa
ꢀꢅ
LTC3619B
applicaTions inForMaTion
100
90
80
70
60
50
40
30
20
10
0
100
90
80
70
60
50
40
30
20
10
0
10
10
V
V
V
V
= 2.7V
= 3.6V
= 4.2V
= 5V
V
= 3.4V
IN
IN
IN
IN
OUT
1
1
0.1
0.01
0.001
0.1
0.01
V
V
V
= 3.6V
= 4.2V
IN
IN
IN
V
= 1.8V
= 5V
OUT
0.001
0.0001
0.001
0.01
0.1
1
0.0001
0.001
0.01
0.1
1
OUTPUT CURRENT (A)
OUTPUT CURRENT (A)
3619B F04b
Figure 4b. Efficiencꢀ vs Output Current
V
OUT
200mV/DIV
V
OUT
100mV/DIV
AC-COUPLED
V
IN
1V/DIV
AC-COUPLED
I
OUT
I
L
500mA/DIV
500mA/DIV
I
LOAD
I
IN
500mA/DIV
500mA/DIV
1ms/DIV
20µs/DIV
= 1.8V
V
= 5V, 500mA COMPLIANT
V
I
= 5V, V
OUT
LOAD
= 10µF
IN
LIM
IN
R
I
= 116kΩ, C
= 2200pF
OUT
= 475mA, CHANNEL 1 NOT LOADED
= 40mA TO 400mA
LIM
= 0A TO 2A, C
= 4.4mF, V
= 3.4V
C
LOAD
LIM
OUT
L
I
3619B F04c
Figure 4c. Transient Response
3619bfa
ꢀꢆ
LTC3619B
package DescripTion
DD Package
10-Lead Plastic DFN (3mm × 3mm)
(Reference LTC DWG # 05-08-1699 Rev B)
R = 0.125
TYP
6
0.40 p 0.10
10
0.70 p0.05
3.55 p0.05
2.15 p0.05 (2 SIDES)
1.65 p0.05
3.00 p0.10
(4 SIDES)
1.65 p 0.10
(2 SIDES)
PIN 1
TOP MARK
(SEE NOTE 6)
PACKAGE
OUTLINE
(DD) DFN REV
B 0309
5
1
0.25 p 0.05
0.50 BSC
0.75 p0.05
0.200 REF
0.25 p 0.05
0.50
BSC
2.38 p0.10
(2 SIDES)
2.38 p0.05
(2 SIDES)
0.00 – 0.05
BOTTOM VIEW—EXPOSED PAD
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
NOTE:
1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-2).
CHECK THE LTC WEBSITE DATA SHEET FOR CURRENT STATUS OF VARIATION ASSIGNMENT
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE
TOP AND BOTTOM OF PACKAGE
MSE Package
10-Lead Plastic MSOP, Exposed Die Pad
(Reference LTC DWG # 05-08-1664 Rev C)
BOTTOM VIEW OF
EXPOSED PAD OPTION
2.06 p 0.102
(.081 p .004)
1.83 p 0.102
(.072 p .004)
2.794 p 0.102
(.110 p .004)
0.889 p 0.127
(.035 p .005)
1
0.29
REF
0.05 REF
5.23
(.206)
MIN
2.083 p 0.102 3.20 – 3.45
(.082 p .004) (.126 – .136)
DETAIL “B”
CORNER TAIL IS PART OF
THE LEADFRAME FEATURE.
FOR REFERENCE ONLY
NO MEASUREMENT PURPOSE
DETAIL “B”
10
0.50
(.0197)
BSC
0.305 p 0.038
(.0120 p .0015)
TYP
3.00 p 0.102
(.118 p .004)
(NOTE 3)
0.497 p 0.076
(.0196 p .003)
10 9
8
7 6
RECOMMENDED SOLDER PAD LAYOUT
REF
3.00 p 0.102
(.118 p .004)
(NOTE 4)
4.90 p 0.152
(.193 p .006)
DETAIL “A”
0.254
(.010)
0o – 6o TYP
1
2
3
4 5
GAUGE PLANE
0.53 p 0.152
(.021 p .006)
0.86
(.034)
REF
1.10
(.043)
MAX
DETAIL “A”
0.18
(.007)
SEATING
PLANE
0.17 – 0.27
(.007 – .011)
TYP
0.1016 p 0.0508
(.004 p .002)
0.50
(.0197)
BSC
MSOP (MSE) 0908 REV C
NOTE:
1. DIMENSIONS IN MILLIMETER/(INCH)
2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
3619bfa
ꢀꢇ
LTC3619B
revision hisTory
REV
DATE
DESCRIPTION
PAGE NUMBER
A
4/10
Changes to Temperature Range in Order Information Section
Updates in the Electrical Characteristics Table
Edit on Y-Axis on Graph G18
2
3
5
Updated DD Package Drawing
18
3619bfa
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
ꢀꢈ
LTC3619B
Typical applicaTions
Dual 400mA/800mA Buck Converter, ILIM = ±00mA
V
IN
3.3V TO 5.5V
C1
10µF
RUN2 V RUN1
IN
PGOOD2 PGOOD1
LTC3619B
L2
1.5µH
L1
3.3µH
V
OUT2
V
OUT1
1.8V AT
400mA
SW2
SW1
3.3V AT
800mA
C
, 22pF
F1
R4
1150k
V
FB2
V
FB1
+
C
R2
511k
C
OUT1
R3
255k
R1
255k
OUT2
RLIM
GND
10µF
2.2mF
s2
3619B TA02
SuperCap
R
LIM
C
LIM
110k
1000pF
C1, C
C
: AVX 08056D106KAT2A
L1: COILCRAFT LPS4012-332ML
L2: COILCRAFT LPS4012-152ML
OUT1
OUT2
: VISHAY 592D228X96R3X2T20H
Dual 400mA/800mA Buck Converter, ILIM = 47±mA or Disabled
V
IN
3.3V TO 5.5V
C1
10µF
RUN2 V RUN1
IN
PGOOD2 PGOOD1
LTC3619B
L2
1.5µH
L1
3.3µH
V
V
OUT1
OUT2
1.8V AT
400mA
SW2
SW1
3.3V AT
800mA
C
, 22pF
F1
R4
1150k
V
FB2
V
FB1
C
+
OUT2
R2
511k
R3
255k
R1
255k
C
R
OUT1
GND
LIM
2.2mF
10µF
s2
SuperCap
3619B TA03
R
116k
LIM
C
LIM
I
LIM
2200pF
DISABLE
C1, C
C
: AVX 08056D106KAT2A
L1: COILCRAFT LPS4012-332ML
L2: COILCRAFT LPS4012-152ML
OUT1
OUT2
: VISHAY 592D228X96R3X2T20H
relaTeD parTs
PART NUMBER
DESCRIPTION
COMMENTS
95% Efficiency, V
LTC3619
Dual 400mA and 800mA I , 2.25MHz,
Synchronous Step-Down DC/DC Converter
= 2.5V, V
= 5.5V, V
OUT(MIN)
= 0.6V,
= 5.25V,
= 5.25V,
= 0.8V,
= 0.6V,
= 0.6V,
= 0.6V,
OUT
IN(MIN)
IN(MAX)
I = 50µA, I < 1µA, MS10E, 3mm × 3mm DFN-10
Q SD
LTC3127
LTC3125
1.2A I , 1.6MHz, Synchronous Buck-Boost DC/DC 94% Efficiency, V
= 1.8V, V
= 5.5V, V
IN(MAX) OUT(MAX)
OUT
IN(MIN)
Converter with Adjustable Input Current Limit
I = 18µA, I < 1µA, 3mm × 3mm DFN-MSOP10E
Q SD
1.2A I , 1.6MHz, Synchronous Boost DC/DC
94% Efficiency, V
Q SD
= 1.8V, V
= 5.5V, V
IN(MAX)
OUT
IN(MIN)
OUT(MAX)
Converter with Adjustable Input Current Limit
I = 15µA, I < 1µA, 2mm × 3mm DFN-8
LTC3417A/
LTC3417A-2
LTC3407A/
LTC3407A-2
Dual 1.5A/1A, 4MHz, Synchronous Step-Down
DC/DC Converter
95% Efficiency, V
Q SD
= 2.3V, V
= 5.5V, V
IN(MAX)
IN(MIN)
OUT(MIN)
I = 125µA, I = <1µA, TSSOP-16E, 3mm × 5mm DFN-16
Dual 600mA/600mA, 1.5MHz, Synchronous
Step-Down DC/DC Converter
95% Efficiency, V
Q SD
= 2.5V, V
= 5.5V, V
IN(MAX) OUT(MIN)
IN(MIN)
I = 40µA, I = <1µA, MS10E, 3mm × 3mm DFN-10
LTC3548/LTC3548-1/ Dual 400mA and 800mA I , 2.25MHz,
LTC3548-2
LTC3546
95% Efficiency, V
Q SD
= 2.5V, V
= 5.5V, V
IN(MAX) OUT(MIN)
OUT
IN(MIN)
Synchronous Step-Down DC/DC Converter
I = 40µA, I = <1µA, MS10E, 3mm × 3mm DFN-10
Dual 3A/1A, 4MHz, Synchronous Step-Down
DC/DC Converter
95% Efficiency, V
= 2.3V, V
= 5.5V, V
IN(MAX) OUT(MIN)
IN(MIN)
I = 160µA, I = <1µA, 4mm × 5mm QFN-28
Q
SD
3619bfa
LT 0410 REV A • PRINTED IN USA
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
ꢁ0
●
●
LINEAR TECHNOLOGY CORPORATION 2009
(408) 432-1900 FAX: (408) 434-0507 www.linear.com
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