LTC3620EDCPBF_技术文档

LTC3620

Ultralow Power 15mA

Synchronous Step-Down

Switching Regulator

DESCRIPTION

FEATURES

The LTC^®3620 is a high efﬁciency, synchronous buck

regulator, suitable for very low power, very small footprint

applications powered by a single Li-Ion battery.

n

High Efﬁciency: Up to 95%

n

Maximum Current Output: 15mA

n

Externally Programmable Frequency Clamp with

Internal 50kHz Default Minimizes Audio Noise

The internal synchronous switches increase efﬁciency

and eliminate the need for external Schottky diodes. Low

output voltages are easily supported by the 0.6V feedback

reference voltage. The LTC3620-1 option is internally

programmed to provide a 1.1V output.

n

18μA I Current

Q

n

2.9V to 5.5V Input Voltage Range

Low-Battery Detection

0.6V Reference Allows Low Output Voltages

Shutdown Mode Draws <1μA Supply Current

2.8V Undervoltage Lockout

TheLTC3620usesauniquevariablefrequencyarchitecture

to minimize power loss and achieve high efﬁciency. The

switchingfrequencyisproportionaltotheloadcurrent,and

an internal frequency clamp forces a minimum switching

frequency at light loads to minimize noise in the audio

range. The user can program the frequency of this clamp

by applying an external clock to the FMIN/MODE pin.

Unique Low Noise Control Architecture

Internal Power MOSFETs

No Schottky Diodes Required

Internal Soft-Start

Tiny 2mm × 2mm 8-Lead DFN Package

The battery status output, LOBATB, indicates when the

input voltage drops below 3V. To help prevent damage to

the battery, an undervoltage lockout (UVLO) circuit shuts

down the part if the input voltage falls below 2.8V.

APPLICATIONS

n

Hearing Aids

n

Wireless Headsets

n

Li-Ion Cell Applications

The LTC3620 is available in a low proﬁle, 2mm × 2mm

8-lead DFN package.

n

Button Cell Replacement

L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear

Technology Corporation. All other trademarks are the property of their respective owners.

Protected by U.S. Patents including 7528587.

TYPICAL APPLICATION

Output Voltage Ripple

vs Load Current

High Efﬁciency Low Power

Step-Down Converter

25

Efﬁciency vs Load Current

100

90

3.0

2.5

2.0

1.5

1.0

0.5

0

V

= 1.1V

OUT

V

IN

2.9V TO 5.5V

FMIN/MODE = 0V

L = 22μH

EFFICIENCY

80

20

15

10

5

V

IN

70

V

= 5.5V

IN

22μH

22pF

RUN

LOBATB

SW

V

60

50

OUT

1.1V

LTC3620

1μF

CER

V

= 3.6V

IN

V

= 3V

IN

FMIN/MODE = 0V

40

30

20

10

0

FMIN/MODE V

GND

FB

V

= 1.1V

= 1.8V

= 2.5V

OUT

432k

523k

1μF

CER

LOSS

3620 TA01a

0

0.1

1

10

0

5

10

15

3620 TA01c

LOAD CURRENT (mA)

OUTPUT CURRENT (mA)

3620 TA01b

3620f

1

LTC3620

ABSOLUTE MAXIMUM RATINGS

PIN CONFIGURATION

(Notes 1, 2)

Input Supply Voltage.................................... –0.3V to 6V

TOP VIEW

RUN Voltage ................................. –0.3V to (V + 0.3V)

IN

1

2

3

4

8

7

6

5

V

IN

SW

GND

V

FB

Voltage ................................... –0.3V to (V + 0.3V)

RUN

IN

9

LOBATB Voltage........................................... –0.3V to 6V

FMIN/MODE

LOBATB

V

FB

FMIN/MODE Voltage ..................... –0.3V to (V + 0.3V)

NC

IN

SW Voltage .................................. –0.3V to (V + 0.3V)

IN

DC PACKAGE

8-LEAD (2mm s 2mm) PLASTIC DFN

P-channel Switch Source Current (DC)..................50mA

N-channel Switch Sink Current (DC)......................50mA

Operating Junction Temperature Range

T

= 125°C, θ = 88.5°C/W

JA

EXPOSED PAD (PIN 9) IS GND, MUST BE SOLDERED TO PCB

JMAX

(Notes 2, 4)............................................–40°C to 125°C

Storage Temperature Range...................–65°C to 150°C

ORDER INFORMATION

LEAD FREE FINISH

LTC3620EDC#PBF

LTC3620EDC-1#PBF

TAPE AND REEL

PART MARKING

LFJJ

PACKAGE DESCRIPTION

TEMPERATURE RANGE

LTC3620EDC#TRPBF

LTC3620EDC-1#TRPBF

–40°C to 85°C

8-Lead (2mm × 2mm) Plastic DFN

LFJK

Consult LTC Marketing for parts speciﬁed with wider operating temperature ranges.

Consult LTC Marketing for information on non-standard lead based ﬁnish parts.

For more information on lead free part marking, go to: http://www.linear.com/leadfree/

For more information on tape and reel speciﬁcations, go to: http://www.linear.com/tapeandreel/

ELECTRICAL CHARACTERISTICS ^Thel denotes the speciﬁcations which apply over the full operating

junction temperature range, otherwise speciﬁcations are at T_A= 25°C. V_IN= 3.6V unless otherwise noted.

SYMBOL

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

l

V

Input Voltage Range

2.9

5.5

V

IN

Regulated Feedback Voltage (Note 3)

LTC3620

0.594

0.588

1.089

1.078

0.6

1.1

0.606

0.612

1.111

1.122

V

FB

l

LTC3620

LTC3620-1

Reference Voltage Line Regulation

Output Voltage Load Regulation

Quiescent Current, No Switching

Quiescent Current in Shutdown

Quiescent Current in UVLO Condition

Peak Inductor Current

V

= 3V to 5.5V (Note 3)

0.05

0.5

18

0.15

%/V

%

ΔV

IN

FB

V

(Note 3)

= 0.65V, FMIN/MODE = V

IN

LOADREG

I

f

V

FB

25

1

μA

mA

kHz

V

Q

RUN = 0V

RUN = V , V = 2.5V

0.01

0.5

35

QSD

QU

IN IN

PK

l

Minimum Switching Frequency (Internal) V = 0.65V, FIN/MODE = 0

40

50

SW

FB

V

RUN

RUN Input Voltage High

RUN Input Voltage Low

RUN Leakage Current

0.8

0.3

1

V

I

0.01

μA

RUN

3620f

2

LTC3620

ELECTRICAL CHARACTERISTICS ^Thel denotes the speciﬁcations which apply over the full operating

junction temperature range, otherwise speciﬁcations are at T_A= 25°C. V_IN= 3.6V unless otherwise noted.

SYMBOL

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

V

FMIN/MODE Input Voltage High

FMIN/MODE Input Voltage Low

FMIN/MODE Input Frequency

FMIN/MODE Pin Leakage Current

Switch Leakage Current

0.9

FMIN

0.7

300

1

V

f

I

20

kHz

μA

EXT

0.01

FMIN/MODE

V

RUN

= 0V, V = 0V or 5.5V, V = 5.5V

1

μA

SW

FB

SW

IN

V

Pin Current

LTC3620, V = 0.6V

0

1.2

30

2.0

nA

μA

FB

LTC3620-1, V = 1.1V

FB

V

Undervoltage Lockout (UVLO)

LOBATB Threshold

V

Decreasing

2.7

2.8

3.0

15

2.9

V

UVLO

IN

2.93

3.08

LOBATB

R

LOBATB Pull-Down On-Resistance

LOBATB Hysteresis

Ω

LOBATB

V

100

2.0

1.0

mV

Ω

HLOBATB

R

of P-channel FET (Note 5)

of N-channel FET (Note 5)

I

= 50mA, V = 3.6V

IN

PFET

DS(ON)

SW

= –50mA, V = 3.6V

Ω

NFET

SW

IN

Note 1: Stresses beyond those listed under Absolute Maximum Ratings

may cause permanent damage to the device. Exposure to any Absolute

Maximum Rating condition for extended periods may affect device

reliability and lifetime.

Note 4: The LTC3620E is guaranteed to meet performance speciﬁcations

from 0°C to 85°C junction temperature. Speciﬁcations over the –40°C

to 85°C operating junction temperature range are assured by design,

characterization and correlation with statistical process controls.

Note 2: T is calculated from the ambient temperature, T , and power

Note 5: The DFN switch-on resistance is guaranteed by correlation to

wafer level measurements.

J

A

dissipation, P , according to the following formula:

D

T = T + (P )(88.5°C/W)

J

A

D

Note 3: The LTC3620 is tested in a proprietary test mode that connects V

FB

to the output of the error ampliﬁer.

3620f

3

LTC3620

TYPICAL PERFORMANCE CHARACTERISTICS

LTC3620 Feedback Voltage

vs Temperature

Switching Frequency

Load Regulation

vs Load Current, FMIN/MODE

1000

100

10

620

615

610

605

600

595

590

585

580

0.5

0.3

200kHz, EXTERNAL

FMIN/MODE = 0V

V

= 3.6V

V

= 3.6V

IN

OUT

IN

OUT

= 1.1V

FMIN/MODE = V

FMIN/MODE = 0V

IN

FMIN/MODE = 0V

= 25°C

T

A

0.1

–0.1

–0.3

–0.5

T

= 25°C

= 3.6V

A

V

IN

OUT

= 1.1V

50

0

TEMPERATURE (°C)

–50

100

130

0

5

10

LOAD CURRENT (mA)

15

0.01

0.1

1

10 20

LOAD CURRENT (mA)

3620 G01

3620 G03

3620 G02

LTC3620-1 Feedback Voltage

vs Temperature

Quiescent Current vs Temperature

UVLO Threshold vs Temperature

30

28

26

24

22

20

18

16

14

12

10

2.85

2.84

2.83

2.82

2.81

2.80

2.79

2.78

2.77

2.76

2.75

1.125

1.120

1.115

1.110

1.105

1.100

1.095

1.090

1.085

1.080

V

= 3.6V

V

= 1.1V

V

= 1.1V

IN

OUT

FMIN/MODE = 0V

FMIN/MODE = V

FMIN/MODE = 0V

IN

V

= 5V

IN

V

= 3.6V

IN

50

0

TEMPERATURE (°C)

–50

0

50

–50

100

130

100

130

–50

0

50

100

130

TEMPERATURE (°C)

3620 G04

3620 G05

3620 G06

LOBATB Threshold

vs Temperature

Peak Inductor Current

vs Temperature

Switching Waveforms at 250μA

Load, FMIN/MODE = 0V

3.05

3.04

3.03

3.02

3.01

3.00

2.99

2.98

2.97

2.96

2.95

40

39

V

= 1.1V

V

= 1.1V

OUT

L = 22μH

FMIN/MODE = 0V

V

(AC)

OUT

20mV/DIV

V

= 5.5V

IN

38

37

V

SW

2V/DIV

V

= 3.6V

IN

36

35

34

I

L

25mA/DIV

3620 G09

V

= 1.1V

4μs/DIV

OUT

IN

= 3.6V

T

= 25°C

A

–50

0

50

100

130

–50

0

50

100

130

TEMPERATURE (°C)

3620 G08

3620 G07

3620f

4

LTC3620

TYPICAL PERFORMANCE CHARACTERISTICS

Switching Waveforms at 1mA

Load, FMIN/MODE = 0V

Switching Waveforms at 12mA

Load, FMIN/MODE = 0V

Switching Waveforms at 250μA

Load, FMIN/MODE = 200kHz Clock

V

FMIN/MODE

1V/DIV

V

(AC)

V

(AC)

OUT

20mV/DIV

V

(AC)

OUT

20mV/DIV

V

SW

V

SW

2V/DIV

2mV/DIV

V

SW

2V/DIV

I

L

I

L

25mA/DIV

I

25mA/DIV

L

25mA/DIV

3620 G10

3620 G12

3620 G11

V

T

= 1.1V

4μs/DIV

V

T

= 1.1V

2μs/DIV

V

T

= 1.1V

400ns/DIV

OUT

IN

A

OUT

IN

A

= 3.6V

IN

= 3.6V

= 25°C

A

= 25°C

Switching Waveforms at 1mA

Load, FMIN/MODE = 200kHz Clock

Switching Waveforms at 12mA

Load, FMIN/MODE = 200kHz

Start-Up Waveforms

V

FMIN/MODE

1V/DIV

V

FMIN/MODE

1V/DIV

V

(AC)

OUT

V

(AC)

V

OUT

20mV/DIV

200mV/DIV

V

SW

V

SW

2V/DIV

I

L

25mA/DIV

I

L

25mA/DIV

3620 G13

3620 G14

3620 G15

V

T

= 1.1V

2μs/DIV

V

T

= 1.1V

400ns/DIV

V

I

= 1.1V

= 0mA

200μs/DIV

OUT

IN

A

OUT

IN

A

OUT

IN

OUT

= 3.6V

= 25°C

FMIN/MODE = 0V

= 25°C

T

A

Transient Response, 250μA to 3mA

Step, FMIN/MODE = 0V

Transient Response, 1mA to 10mA

Step, FMIN/MODE = 0V

PFET R_DS(ON)vs Temperature

2.3

2.1

1.9

1.7

1.5

1.3

1.1

0.9

0.7

0.5

I

= 35mA

SW

V

(AC)

V

(AC)

OUT

V

= 3.6V

IN

20mV/DIV

10mV/DIV

V

= 5V

IN

I

LOAD

5mA/DIV

I

LOAD

5mA/DIV

3620 G17

3620 G16

V

T

= 3.6V

4ms/DIV

V

T

= 3.6V

4ms/DIV

IN

OUT

IN

OUT

= 1.1V

= 25°C

= 1.1V

= 25°C

A

50

0

TEMPERATURE (°C)

–50

100

130

3620 G18

3620f

5

LTC3620

TYPICAL PERFORMANCE CHARACTERISTICS

Efﬁciency vs Load Current,

FMIN/MODE Frequency

NFET R_DS(ON)vs Temperature

Efﬁciency vs Load Current, V_OUT

100

90

100

90

1.5

1.4

1.3

1.2

1.1

1.0

0.9

0.8

0.7

0.6

0.5

I

= 35mA

SW

80

70

60

50

60

50

V

= 3.6V

IN

40

30

20

10

0

40

30

20

10

0

T

V

= 25°C

IN

OUT

T

= 25°C

= 3V

A

IN

V

= 5V

IN

= 3V

V

= 1.1V

FMIN/MODE = 0V

FMIN = 20kHz

FMIN = 100kHz

FMIN = 200kHz

V

= 1.1V

= 1.8V

= 2.5V

OUT

0.1

1

10

50

0

TEMPERATURE (°C)

0.1

1

10

–50

100

130

LOAD CURRENT (mA)

3620 G20

3620 G21

3620 G19

Efﬁciency vs Load Current, V_IN

Efﬁciency vs f_MIN, 1mA Load

Internal f_MINvs Temperature

55

54

53

52

51

50

49

48

47

46

45

100

90

81

80

79

78

77

76

75

74

73

72

71

80

70

60

50

V

= 3.6V

= 5V

IN

V

40

30

20

10

0

IN

T

= 25°C

OUT

A

V

= 1.1V

FMIN/MODE = V

IN

T

V

= 25°C

A

V

= 3V

= 3.6V

= 5.5V

IN

= 3.6V

IN

OUT

= 1.1V

FMIN/MODE = EXTERNAL CLOCK

100

200

(kHz)

–50

0

50

100

0.1

1

10

0

300

TEMPERATURE (°C)

f

LOAD CURRENT (mA)

MIN

3620 G22

3620 G24

3620 G23

Spectral Content, 500μA Load

Spectral Content, 5mA Load

–60

–80

–40

52.5kHz

–81.4dBm

–60

–80

355.6kHz

–80.2dBm

–100

–120

–140

–160

–100

–120

–140

12.5kHz

= 1.1V

92.5kHz

1kHz

400kHz

3620 G26

3620 G25

8kHz/DIV

V

39.9kHz/DIV

V

= 1.1V

OUT

IN

= 3.6V

V

= 3.6V

IN

FMIN/MODE = 0V

= 25°C

FMIN/MODE = 0V

= 25°C

T

A

3620f

6

LTC3620

PIN FUNCTIONS

SW (Pin 1): Switch Node Connection to Inductor. This pin

NC (Pin 5): No Connect.

(Pin 6): Regulator Feedback Pin. This pin receives

connects to the internal power MOSFET Switches.

V

FB

GND (Pin 2): Ground Connection for Internal Circuitry and

Power Path Return. Tie directly to local ground plane.

the feedback voltage from the resistive divider across the

output. For the LTC3620-1, this pin must be connected

directlytoV .V

isinternallydividedfromV

tothe

OUT OUT

OUT

FMIN/MODE (Pin 3): Frequency Clamp Select Input. Driv-

ing this pin with a 20kHz to 300kHz external clock sets the

minimum switching frequency. Pulling this pin low sets

the minimum switching frequency to the internally set

50kHz.Pullingthispinhighdefeatstheminimumswitching

frequency and allows the part to switch at arbitrarily low

frequencies dependent on the load current.

reference voltage of 0.6V as seen in the Block Diagram.

RUN(Pin7):RegulatorEnablePin. Applyavoltagegreater

than 0.8V to enable the regulator. Do not ﬂoat this pin.

V (Pin 8): Input Supply Pin. Must be locally bypassed.

IN

Exposed Pad (Pin 9): GND. Must be soldered to PCB.

LOBATB (Pin 4): Low-Battery Status Output. This open-

drain output pulls low when V falls below 3V.

IN

BLOCK DIAGRAM

LOBATB

V

IN

V

IN

4

8

PEAK INDUCTOR

CURRENT ADJUST

8

LOBAT

3V

RUN

7

ICMP

SHUTDOWN

UVLO

FMIN/MODE

3

SELECT

50kHz

SW

1

PFD

SWITCH

DRIVER

0.6V

V

FB

EAMP

RCMP

(LTC3620)

6

V

2

FB

3620 BD

(LTC3620-1)

GND

6

3620f

7

LTC3620

OPERATION

switching frequency will be clamped is dependent on the

externallysetfrequencyandthevalueoftheinductorused.

A higher externally set minimum frequency will result in

a higher load current threshold below which the part will

lock to this minimum frequency. The relationship between

load current and minimum frequency is described by the

following equation:

The LTC3620 is a variable frequency buck switching regu-

lator with a maximum output current of 15mA. At high

loadstheLTC3620willsupplyconstantpeakcurrentpulses

through the output inductor at a frequency dependent on

the load current.

A switching cycle is initiated by a pulse from the error

ampliﬁer, EAMP. The top FET is turned on and remains on

until the peak current threshold is sensed by ICMP (35mA

at full loads). When this occurs, the top FET it is turned off

and the bottom FET is turned on. The bottom FET remains

on until the inductor current drops to 0A, as sensed by the

reverse-currentcomparator,RCMP.Thetimeintervalbefore

another switching cycle is initiated is adjusted based on

the output voltage error, measured by the EAMP to be the

2

V

f

L 35mA

( )(

)

(

=

_IN)(

MIN

I_MAX(LOCK)

2V_OUTV – V

(

)

IN

OUT

The LTC3620 will switch at this externally set frequency

at load currents below this threshold; though in general,

neither this minimum nor this synchronization will be

maintained during load transients.

difference between V and the 0.6V reference.

FB

At very light loads, the minimum PFET on time will be

reached and the peak inductor current can no longer

be reduced. In this situation, the LTC3620 will resume

decreasing the regulator switching frequency to prevent

the output voltage from climbing uncontrollably.

As the load current decreases, the EAMP will decrease

the switching frequency to match the load, until the mini-

mum switching frequency (internally or externally set) is

reached.WiththeFMIN/MODEpinpulledlow,theminimum

frequency is internally set to 50kHz. Further decreasing

the load will cause the phase frequency detector (PFD) to

decrease the peak inductor current in order to maintain

the switching frequency at 50kHz.

Forthoseapplicationswhicharenotsensitivetothespectral

contentoftheoutputripple,theminimumfrequencyclamp

canbedefeatedbypullingtheFMIN/MODEpinhigh.Inthis

mode the inductor current peaks will be held at 35mA and

the switching frequency will decrease without limit.

The minimum switching frequency can be externally set

by clocking the FMIN/MODE pin at the desired minimum

switching frequency. The load current below which the

1000

200kHz, EXTERNAL

FMIN/MODE = 0V

FMIN/MODE = V

IN

100

T

V

= 25°C

A

= 3.6V

IN

OUT

= 1.1V

10

0.01

0.1

1

10 20

LOAD CURRENT (mA)

3620 F01

Figure 1. Switching Frequency vs Load Current, FMIN/MODE

3620f

8

LTC3620

APPLICATIONS INFORMATION

Choosing an Inductor

The part is optimized to get 35mA peaks for V = 3.6V and

OUT

IN

V

= 1.1V with an 18μH inductor. If the falling slope is

There are a number of different values, sizes and brands

of inductors that will work well with this part. Table 1 has a

numberofrecommendedinductors,thoughtherearemany

othermanufacturersanddevicesthatmayalsobesuitable.

Consult each manufacturer for more detailed information

and for their entire selection of related parts.

too steep the NFET will continue to conduct shortly after

the inductor current reaches zero, causing a small reverse

current. This means the net power delivered with every

pulse will decrease. To mitigate this problem the inductor

canberesized.Table2showsrecommendedinductorsand

output capacitors for commonly used output voltages.

Table 1: Representative Surface Mount Inductors

MAX DC

Table 2. Recommended Inductor and Output Capacitor Sizes for

Different V_OUT

PART

VALUE

(ꢀH)

CURRENT

(mA)

W×L×H

(mm )

3

V

(V)

L (μH)

15

C

(μF)

OUT

VENDOR

NUMBER

DCR (Ω)

0.9

1.1

2.2

Taiyo

CBMF1608T 22 10% 1.3 Max

70

0.8×1.6×0.8

1.6×2×0.9

Yuden

22

1

1.1 (LTC3620-1)

22

2.2

4.7

Murata

LQH2MC_02 18 20% 1.8 30%

22 20% 2.1 30%

190

185

1.8

2.5

33

Würth

744028220 22 30% 1.48 Max

270

2.8×2.8×1.1

2.95×2.95×0.9

47

Electronics

Coilcraft

LPS3010 18 20% 1.0 Max

22 20% 1.2 Max

380

320

Because the rising dI/dt decreases for increased V

OUT

and increased L, the inductor current peaks will decrease,

causing the maximum load current to decrease as well.

Figure 2 shows typical maximum load current versus

output voltage.

There is a trade-off between physical size and efﬁciency;

The inductors in Table 1 are shown because of their small

footprints, choose larger sized inductors with less core

loss and lower DCR to maximize efﬁciency.

20

T

= 25°C

A

19

18

17

16

15

14

13

12

11

10

The ideal inductor value will vary depending on which

characteristics are most critical to the designer. Use the

equationsandrecommendationsinthenextsectionstohelp

you ﬁnd the correct inductance value for your design.

Avoiding Audio Range Switching

In order to best avoid switching in the audio range at the

lowest possible load current, the minimum frequency

should be set as low as is acceptable, and the inductor

value should be minimized. For a 1.1V output the smallest

recommended inductor value is 15μH.

0.6

1.1

1.6

2.1

2.6

3620 F02

OUTPUT VOLTAGE (V)

Figure 2. Maximum Output Current vs V_OUT, V_IN= 3.6V

Adjusting for V

OUT

Output Voltage Ripple

Theinductorcurrentpeakandzerocrossingaredependent

on the dI/dt. The equations for the rising and falling slopes

are as follows:

The quantity of charge transferred from V to V

per

IN

OUT

switching cycle is directly proportional to the inductor

value. Consequently, the output voltage ripple is directly

proportional to the inductor value, and the switching

frequency for a given load is inversely proportional to the

inductor value. For a given load current, higher switching

frequency will typically lower the efﬁciency because of the

3620f

Rising dI/dt = (V -V )/L

IN OUT

Falling dI/dt = V /L

OUT

9

LTC3620

APPLICATIONS INFORMATION

increase in switching losses internal to the part. This can

be partially offset by using inductors with lower loss.

from V to ground. The resulting dQ/dt is the current out

IN

of V that is typically larger than the DC bias current and

IN

proportionaltofrequency.BoththeDCbiasandgatecharge

The peak-to-peak output voltage ripple can be approxi-

mated by:

losses are proportional to V and thus their effects will

IN

be more pronounced at higher supply voltages.

2

I

L V

( )

(

)

(

)

PK

IN

The R

for both the top and bottom MOSFETS can

DS(ON)

ΔV =

be obtained from the Typical Performance Characteristics

2 C

(

V

V – V

IN

OUT

_OUT)( _OUT)(

)

2

curves. The I R losses per pulse will be proportional to

The output ripple is a strong function of the peak inductor

the peak current squared times the sum of the switch

resistance and the inductor resistance:

current, I . When the LTC3620 is locked to the minimum

PK

switching frequency, I is decreased to maintain regula-

PK

2

Loss I_PK

I²R

=

R_EFF

tion. Consequently, ΔV

is reduced in and below the

OUT

Pulse

3

lock range.

where R = R + R

D + R (1 – D), and D is the

NFET

EFF

L

PFET

Efﬁciency

ratioofthetopswitchon-timetothetotaltimeofthepulse.

AdditionallossesincurredfromtheinductorDCresistance

and core loss may be signiﬁcant in smaller inductors.

Theefﬁciencyofaswitchingregulatorisequaltotheoutput

power divided by the input power times 100%. It is often

useful to analyze individual losses to determine what is

limiting the efﬁciency and which change would produce

the most improvement. Efﬁciency can be expressed as:

Capacitor Selection

Higher value, lower cost, ceramic capacitors are now

widely available in smaller case sizes. Their high ripple

current, high voltage rating and low ESR make them

ideal for switching regulator applications. Because the

LTC3620’s control loop does not depend on the output

capacitor’s ESR for stable operation, ceramic capacitors

can be used freely to achieve very low output ripple and

small circuit size.

Efﬁciency = 100% – (L1 + L2 + L3 + ...)

where L1, L2, etc. are the individual losses as a percent-

age of input power.

Although all dissipative elements in the circuit produce

losses, two main sources usually account for most of the

losses in the LTC3620’s circuits: V quiescent current

IN

2

and I R losses. V quiescent current loss dominates the

efﬁciency loss at low load currents, whereas the I R loss

IN

2

When choosing the input and output ceramic capacitors,

choose the X5R or X7R dielectric formulations. These

dielectrics have the best temperature and voltage charac-

teristics of all the ceramics for a given value and size.

dominates the efﬁciency loss at medium to high load cur-

rents. In a typical efﬁciency plot, the efﬁciency curve at

very low load currents can be misleading since the actual

power lost is of little consequence, as illustrated on the

front page of this data sheet.

The output voltage ripple is inversely proportional to the

output capacitor. The larger the capacitor, the smaller the

ripple, and vice versa. However, the transient response

The quiescent current is due to two components: the DC

time is directly proportional to C , so a larger C

OUT

bias current, I , as given in the Electrical Characteristics,

Q

means slower response time.

and the internal main switch and synchronous switch

gate charge currents. The gate charge current results

from switching the gate capacitance of the internal power

MOSFET switches. Each time the gate is switched from

high to low to high again, a packet of charge, dQ, moves

To maintain stability and an acceptable output voltage

ripple, values for C should range from 1μF to 5μF.

OUT

3620f

10

LTC3620

APPLICATIONS INFORMATION

Setting Output Voltage

the frequency clamp loop in returning the peak inductor

current to its maximum.

The output voltage is set by tying V to a resistive divider

FB

using the following formula (refer to Figure 3):

Thermal Considerations

0.6V R1+R2

(

)

The LTC3620 requires the package backplane metal to be

well soldered to the PC board. This gives the DFN package

exceptionalthermalproperties,makingitdifﬁcultinnormal

operation to exceed the maximum junction temperature

of the part. In most applications the LTC3620 does not

dissipate much heat due to its high efﬁciency and low

current. In applications where the LTC3620 is running at

highambienttemperaturesandhighloadcurrents,theheat

dissipatedmayexceedthemaximumjunctiontemperature

of the part if it is not well thermally grounded.

V_OUT

=

R2

R1 and R2 should be large to minimize standing load

current and improve efﬁciency.

The ﬁxed output version, the LTC3620-1, includes an

internal resistive divider, eliminating the need for external

resistors. The resistor divider is chosen such that the V

FB

input current is approximately 1μA. For this version, the

V

pin should be connected directly to V

.

FB

OUT

Maximum Load Current and Maximum Frequency

Design Example

The maximum current that the LTC3620 can provide is

calculated to be just slightly less than half the maximum

peak current.

This example designs a 1.1V output using a Li-Ion bat-

tery with voltages between 2.8V to 4.2V, and an average

of 3.6V. The internally provided 50kHz clock will be used

for the minimum switching frequency, so the FMIN/MODE

pin will be pulled low. For a 1.1V output, an 18μH inductor

should be used (refer to Table 2).

The inductor value will determine how much energy is

delivered to the output for each switching cycle, and thus

the duration of each pulse and the maximum frequency.

Largerinductorswillhaveslowerramprates,longerpulses,

andthuslowermaximumfrequencies.Conversely,smaller

inductors will result in higher maximum frequencies.

C

can be chosen from Table 2 or can be based on a

OUT

desired maximum output voltage ripple, ΔV . For this

OUT

case let’s use a maximum ΔV

or 11mV.

equal to 1% of V

,

OUT

When using a frequency clamp, large abrupt increasing

load steps from levels below the locking range to levels

near the maximum output may result in a large drop in

the output voltage. This is due to the low bandwidth of

35mA²22µH 3.6V

(

)(

)

(

)

C_OUT

=

=1.6µF ≈1.5µF

2ΔV_OUT1.1V 3.6V –1.1V

(

)(

)

V

IN

2.9V TO 5.5V

LOBATB

V

IN

1M

L

RUN

LOBATB

LTC3620

V

OUT

SW

1μF

CER

1.1V

22pF

FMIN/MODE V

GND

FB

R1

C

R2

OUT

3620 F03

Figure 3. Design Example Schematic

3620f

11

LTC3620

APPLICATIONS INFORMATION

A larger capacitor could be used to reduce this number.

Keep in mind that while a larger output capacitor will

decrease voltage ripple, it will also increase the transient

Board Layout Checklist

When laying out the printed circuit board, the following

checklist should be used to ensure proper operation of

the LTC3620:

settling time. The optimal range for C

tween 1ꢀF and 5ꢀF.

should be be-

OUT

1. ThepowertracesconsistingofGND,SWandV should

IN

The best way to select the feedback resistors is to select

a target combined resistance, and try different standard

1% resistor sizes to see which combination will give the

least error. For this example a target combined resistance

ofaround1Mwillbeused. BycheckingR1valuesbetween

422k and 475k, and calculating R2 using the formula:

be kept short, direct and wide.

2. The V pin should connect directly to the respective

FB

feedbackresistors,whichshouldalsohaveshort,direct

paths to V

and GND respectively.

OUT

3. Keep C

and C as close to the LTC3620 as

IN

OUT

possible.

0.6V R1

V_OUT– 0.6V

(

)

R2=

4. Allpartsconnectingtogroundshouldhavetheirground

terminals in close proximity to the LTC3620 GND

connection.

it can be found that a value of R2 = 523k and R1 = 432k

minimizes the error in this range.

5. KeeptheSWnodeandexternalclock,ifused,awayfrom

The error can be checked by solving for V

and ﬁnd-

the sensitive V node. Also, minimize the length and

OUT

FB

ing the percent error from the desired 1.1V. Using these

resistor values will result in V = 1.096V, and an error

area of all traces connected to the SW pin, and always

use a ground plane under the switching regulator to

minimize interplane coupling.

OUT

of around 0.4%. Using different target resistor sums is

acceptable, but a smaller sum will decrease efﬁciency at

lower loads, and a larger sum will increase noise sensitiv-

ity at the V pin.

FB

+

C

OUT

L

C

OUT

L

V

IN

V

IN

C

IN

C

IN

SW

V

1

2

3

4

8

7

6

5

IN

SW

V

IN

1

2

3

4

8

7

6

5

• • •

GND

RUN

• • •

GND

RUN

V

FMIN/MODE

LOBATB

FB

•

V

FMIN/MODE

LOBATB

FB

•

NC

R2 R1

C *

FF

V

OUT

V

OUT

3620 F05

3620 F04

*C = 22pF FEEDFORWARD CAPACITOR

FF

LTC3620 Layout Diagram

LTC3620-1 Layout Diagram

3620f

12

LTC3620

TYPICAL APPLICATIONS

High Efﬁciency Low Power Step-Down Converter, FMIN/MODE = 0

V

IN

2.9V TO 5.5V

LOBATB

V

IN

1M

RUN

LOBATB

22μH

V

OUT

SW

1μF

CER

1.1V

22pF

LTC3620

FMIN/MODE V

GND

FB

432k

523k

1μF

CER

3620 TA02a

Efﬁciency vs Load Current

Efﬁciency vs V_IN

100

90

100

90

80

70

60

50

40

30

20

10

0

80

70

60

50

40

30

20

10

0

T

= 25°C

OUT

A

T

= 25°C

OUT

V

= 1.1V

A

V

= 1.1V

FMIN/MODE = 0V

I

= 500μA

= 1mA

= 10mA

V

= 3V

= 3.6V

= 5.5V

OUT

IN

0.1

1

10

4.5

(V)

6.5

2.5

3.5

5.5

V

LOAD CURRENT (mA)

IN

3620 TA02b

3620 TA02c

3620f

13

LTC3620

TYPICAL APPLICATIONS

High Efﬁciency Low Power Step-Down Converter,

Externally Programmed f_MIN

V

IN

2.9V TO 5.5V

LOBATB

1μF

CER

V

IN

1M

RUN

LOBATB

22μH

V

OUT

SW

1.1V

22pF

LTC3620

FMIN/MODE

FMIN/MODE V

GND

FB

432k

523k

1μF

CER

3620 TA03a

Efﬁciency vs Load Current

Efﬁciency vs V_IN

100

90

80

70

60

50

40

30

20

10

0

100

90

80

70

60

50

40

30

20

10

0

T

V

= 25°C

= 3.6V

A

IN

= 1.1V

OUT

I

= 500μA

= 1mA

f

= 20kHz

= 100kHz

= 200kHz

OUT

T

= 25°C

MIN

A

V

f

= 1.1V

OUT

= 200kHz

= 10mA

MIN

2.5

3.5

4.5

(V)

5.5

6.5

0.1

1

10

V

LOAD CURRENT (mA)

IN

3620 TA03b

3620 TA03c

Spectral Content,

FMIN/MODE = 20kHz Clock

Spectral Content,

FMIN/MODE = 100kHz Clock

Spectral Content,

FMIN/MODE = 200kHz Clock

–40

–60

99.9kHz

–59.9dBm

–60

–80

–60

–80

199.7kHz

20.0kHz

–64.9dBm

–80

–100

–120

–140

–100

–120

–140

–100

–120

–140

1kHz

150kHz

3620 TA03e

1kHz

220kHz

3620 TA03f

1kHz

30kHz

3620 TA03d

14.9kHz/DIV

21.9kHz/DIV

V

= 1.1V

V

I

= 1.1V

2.99kHz/DIV

RBW = 3Hz

OUT

V

I

= 3.6V

V

I

= 1.1V

IN

OUT

= 1mA

= 3.6V

OUT

IN

T

= 25°C

T = 25°C

A

= 500μA

A

OUT

T

= 25°C

A

3620f

14

LTC3620

PACKAGE DESCRIPTION

DC Package

8-Lead Plastic DFN (2mm × 2mm)

(Reference LTC DWG # 05-08-1719 Rev A)

0.70 p0.05

2.55 p0.05

0.64 p0.05

1.15 p0.05

(2 SIDES)

PACKAGE

OUTLINE

0.25 p 0.05

0.45 BSC

1.37 p0.05

(2 SIDES)

RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS

APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED

R = 0.115

TYP

5

8

R = 0.05

TYP

0.40 p 0.10

PIN 1 NOTCH

2.00 p0.10 0.64 p 0.10

(4 SIDES)

(2 SIDES)

R = 0.20 OR

0.25 s 45o

CHAMFER

PIN 1 BAR

TOP MARK

(SEE NOTE 6)

(DC8) DFN 0106 REVØ

4

1

0.23 p 0.05

0.45 BSC

0.75 p0.05

0.200 REF

1.37 p0.10

(2 SIDES)

BOTTOM VIEW—EXPOSED PAD

0.00 – 0.05

NOTE:

1. DRAWING IS NOT A JEDEC PACKAGE OUTLINE

2. DRAWING NOT TO SCALE

3. ALL DIMENSIONS ARE IN MILLIMETERS

4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE

MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE

5. EXPOSED PAD SHALL BE SOLDER PLATED

6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE

TOP AND BOTTOM OF PACKAGE

3620f

Information furnished by Linear Technology Corporation is believed to be accurate and reliable.

However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-

tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.

15

LTC3620

TYPICAL APPLICATIONS

High Efﬁciency Low Power Step-Down Converter,

LTC3620-1 Internally Programmed, 1.1V_OUT

Efﬁciency vs V_IN

Efﬁciency vs Load Current

100

90

80

70

60

50

40

30

20

10

0

100

90

V

IN

2.9V TO 5.5V

80

LOBATB

70

V

IN

1M

60

50

RUN

LTC3620-1

SW

LOBATB

22μH

1μF

CER

V

OUT

1.1V

40

30

20

10

0

T = 25°C

A

T

= 25°C

A

FMIN/MODE V

GND

V

= 1.1V

FB

V

= 1.1V

OUT

FMIN/MODE = 0V

OUT

FMIN/MODE = 0V

2.2μF

CER

I

= 500μA

= 1mA

OUT

V

IN

V

IN

V

IN

= 3V

= 3.6V

= 5.5V

3620 TA04a

= 10mA

2.5

3.5

4.5

(V)

5.5

6.5

0.1

1

10

V

LOAD CURRENT (mA)

IN

3620 G21

3620 TA04c

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3620f

LT 0809 • PRINTED IN USA

LinearTechnology Corporation

1630 McCarthy Blvd., Milpitas, CA 95035-7417

16

●

(408) 432-1900 FAX: (408) 434-0507 www.linear.com


型号：	LTC3620EDCPBF
厂家：	Linear
描述：	Ultralow Power 15mA Synchronous Step-Down Switching Regulator 超低功耗15毫安同步降压型开关稳压器稳压器开关
文件：	总16页 (文件大小：305K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

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