LTC3630EDHC#PBF [Linear]
LTC3630 - High Efficiency, 65V 500mA Synchronous Step-Down Converter; Package: DFN; Pins: 16; Temperature Range: -40°C to 85°C;
| 型号： | LTC3630EDHC#PBF |
| 厂家： | 
Linear |
| 描述： | LTC3630 - High Efficiency, 65V 500mA Synchronous Step-Down Converter; Package: DFN; Pins: 16; Temperature Range: -40°C to 85°C 开关 光电二极管 输出元件 |
| 文件： | 总26页 (文件大小：330K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LTC3630
High Efficiency, 65V
500mA Synchronous
Step-Down Converter
FeaTures
DescripTion
The LTC®3630 is a high efficiency step-down DC/DC
converter with internal high side and synchronous power
switches that draws only 12μA typical DC supply current
while maintaining a regulated output voltage at no load.
n
Wide Operating Input Voltage Range: 4V to 65V
n
Synchronous Operation for Highest Efficiency
n
Internal High Side and Low Side Power MOSFETs
n
No Compensation Required
n
Adjustable 50mA to 500mA Maximum Output Current
The LTC3630 can supply up to 500mA load current and
features a programmable peak current limit that provides
a simple method for optimizing efficiency and for reduc-
ing output ripple and component size. The LTC3630’s
combination of Burst Mode® operation, integrated power
switches, low quiescent current, and programmable peak
current limit provides high efficiency over a broad range
of load currents.
n
Low Dropout Operation: 100% Duty Cycle
Low Quiescent Current: 12µA
Wide Output Range: 0.8V to V
n
n
IN
n
n
n
n
n
n
0.8V 1% Feedback Voltage Reference
Precise RUN Pin Threshold
Internal and External Soft-Start
Programmable 1.8V, 3.3V, 5V or Adjustable Output
Few External Components Required
Low Profile (0.75mm) 3mm × 5mm DFN and
Thermally-Enhanced MSE16 Packages
With its wide input range of 4V to 65V, the LTC3630 is a
robust converter suited for regulating a wide variety of
powersources.Additionally,theLTC3630includesaprecise
run threshold and soft-start feature to guarantee that the
power system start-up is well-controlled in any environ-
ment. A feedback comparator output enables multiple
LTC3630s to be paralleled in higher current applications.
applicaTions
n
Industrial Control Supplies
n
Medical Devices
n
Distributed Power Systems
n
Portable Instruments
The LTC3630 is available in the thermally-enhanced
3mm × 5mm DFN and the MSE16 packages.
L, LT, LTC, LTM, Burst Mode, Linear Technology and the Linear logo are registered trademarks
and ThinSOT is a trademark of Linear Technology Corporation. All other trademarks are the
property of their respective owners.
n
Battery-Operated Devices
n
Automotive
Avionics
n
Typical applicaTion
Efficiency vs Load Current
100
V
OUT
= 3.3V
V
= 12V
IN
4V to 65V Input to 3.3V Output, 500mA Step-Down Converter
90
80
70
60
50
40
30
47µH
V
OUT
V
IN
3.3V
V
SW
LTC3630
RUN
IN
4V TO 65V
100µF
×2
500mA
2.2µF
V
IN
= 65V
V
FB
SS
V
PRG1
V
PRG2
FBO
I
SET
GND
3630 TA01a
I
I
= 220kΩ||220pF
= OPEN
SET
SET
0.1
1
10
100
1000
LOAD CURRENT (mA)
3630 TA01b
3630fd
1
For more information www.linear.com/LTC3630
LTC3630
absoluTe MaxiMuM raTings (Note 1)
V Supply Voltage..................................... –0.3V to 70V
Operating Junction Temperature Range (Notes 2, 3, 4)
LTC3630E, LTC3630I......................... –40°C to 125°C
LTC3630H.......................................... –40°C to 150°C
LTC3630MP....................................... –55°C to 150°C
Storage Temperature Range .................. –65°C to 150°C
Lead Temperature (Soldering, 10 sec)
IN
SW Voltage (DC)........................... –0.3V to (V + 0.3V)
IN
RUN Voltage................................................. –0.3V to 6V
SS, FBO, I
FB PRG1 PRG2
Voltages................................. –0.3V to 6V
SET
, V
V , V
Voltages ......................... –0.3V to 6V
MSOP ...............................................................300°C
pin conFiguraTion
TOP VIEW
SW
NC
1
2
3
4
5
6
7
8
16 GND
15 NC
TOP VIEW
1
3
SW
16 GND
14 GND
12 FBO
V
IN
14 GND
13 NC
V
IN
NC
17
GND
17
GND
5
6
7
8
RUN
PRG2
PRG1
GND
RUN
12 FBO
V
V
11
I
SET
10 SS
V
V
11
I
SET
PRG2
9
V
FB
10 SS
PRG1
GND
MSE PACKAGE
VARIATION: MSE16 (12)
16-LEAD PLASTIC MSOP
9
V
FB
DHC PACKAGE
T
= 150°C, θ = 45°C/W, θ = 10°C/W
JA JC
JMAX
16-LEAD (5mm × 3mm) PLASTIC DFN
EXPOSED PAD (PIN 17) IS GND, MUST BE SOLDERED TO PCB
(NOTE 6)
T
= 150°C, θ = 43°C/W, θ = 5°C/W
JA JC
JMAX
EXPOSED PAD (PIN 17) IS GND, MUST BE SOLDERED TO PCB
orDer inForMaTion
LEAD FREE FINISH
LTC3630EMSE#PBF
LTC3630IMSE#PBF
LTC3630HMSE#PBF
LTC3630MPMSE#PBF
LTC3630EDHC#PBF
LTC3630IDHC#PBF
LTC3630HDHC#PBF
LTC3630MPDHC#PBF
TAPE AND REEL
PART MARKING*
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LTC3630EMSE#TRPBF
LTC3630IMSE#TRPBF
LTC3630HMSE#TRPBF
3630
3630
3630
16-Lead Plastic MSOP
–40°C to 125°C
–40°C to 125°C
–40°C to 150°C
–55°C to 150°C
–40°C to 125°C
–40°C to 125°C
–40°C to 150°C
–55°C to 150°C
16-Lead Plastic MSOP
16-Lead Plastic MSOP
LTC3630MPMSE#TRPBF 3630
16-Lead Plastic MSOP
LTC3630EDHC#TRPBF
LTC3630IDHC#TRPBF
LTC3630HDHC#TRPBF
3630
3630
3630
16-Lead (5mm × 3mm) Plastic DFN
16-Lead (5mm × 3mm) Plastic DFN
16-Lead (5mm × 3mm) Plastic DFN
16-Lead (5mm × 3mm) Plastic DFN
LTC3630MPDHC#TRPBF 3630
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
Consult LTC Marketing for information on non-standard lead based finish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
3630fd
2
For more information www.linear.com/LTC3630
LTC3630
elecTrical characTerisTics The l denotes the specifications which apply over the specified operating
junction temperature range, otherwise specifications are at TA = 25°C (Note 2). VIN = 12V, unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Input Supply (V )
IN
V
V
Input Voltage Operating Range
Output Voltage Operating Range
4
65
V
V
IN
0.8
V
IN
OUT
l
l
UVLO
V
IN
Undervoltage Lockout
V
V
Rising
Falling
3.45
3.30
3.65
3.5
150
3.85
3.70
V
V
mV
IN
IN
Hysteresis
I
DC Supply Current (Note 5)
Active Mode
Q
165
12
5
270
20
10
µA
µA
µA
Sleep Mode
No Load
RUN
Shutdown Mode
V
= 0V
V
RUN Pin Threshold Voltage
RUN Rising
RUN Falling
Hysteresis
1.17
1.06
1.21
1.10
110
1.25
1.14
V
V
mV
RUN
Output Supply (V
)
FB
V
Feedback Comparator Threshold Voltage
(Adjustable Output)
V
Rising, V
= V
PRG2
= 0V
= 0V
FB(ADJ)
FB
PRG1
l
l
LTC3630E, LTC3630I
0.792
0.788
0.800
0.800
0.808
0.812
V
V
LTC3630H, LTC3630MP
l
V
Feedback Comparator Hysteresis
(Adjustable Output)
V
V
Falling, V
= V
PRG2
2.5
5
7
mV
FBH
FB
PRG1
I
Feedback Pin Current
= 1V, V
= 0V, V = 0V
PRG2
–10
0
10
nA
FB
FB
PRG1
l
l
V
Feedback Comparator Threshold Voltages
(Fixed Output)
V
FB
V
FB
Rising, V
Falling, V
= SS, V
= SS, V
= 0V
= 0V
4.940
4.910
5.015
4.985
5.090
5.060
V
V
FB(FIXED)
PRG1
PRG1
PRG2
PRG2
l
l
V
V
Rising, V
Falling, V
= 0V, V
= 0V, V
= SS
= SS
3.260
3.240
3.310
3.290
3.360
3.340
V
V
FB
FB
PRG1
PRG1
PRG2
PRG2
l
l
V
V
Rising, V
Falling, V
= V
= V
= SS
= SS
1.780
1.770
1.810
1.8
1.840
1.83
V
V
FB
FB
PRG1
PRG1
PRG2
PRG2
Feedback Voltage Line Regulation
Peak Current Comparator Threshold
V
= 4V to 65V
0.001
%/V
∆V
IN
LINEREG
Operation
l
l
l
I
I
Floating
1
0.45
0.09
1.2
0.6
0.12
1.4
0.75
0.15
A
A
A
PEAK
SET
100k Resistor from I to GND
SET
I
Shorted to GND
SET
R
Power Switch On-Resistance
Top Switch
Bottom Switch
ON
I
SW
I
SW
= –200mA
= 200mA
1.00
0.53
Ω
Ω
I
I
t
Switch Pin Leakage Current
Soft-Start Pin Pull-Up Current
Internal Soft-Start Time
RUN = Open, V = 65V, SW = 0V
0.1
5
1
6
μA
μA
ms
LSW
SS
IN
V
SS
< 2.5V
3
SS Pin Floating
0.8
INT(SS)
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
High junction temperatures degrade operating lifetimes; operating lifetime
is derated for junction temperatures greater than 125°C. Note that the
maximum ambient temperature consistent with these specifications is
determined by specific operating conditions in conjunction with board
layout, the rated package thermal impedance and other environmental
factors.
Note 2: The LTC3630 is tested under pulsed load conditions such that
T ≈ T . The LTC3630E is guaranteed to meet performance specifications
J
A
from 0°C to 85°C. Specifications over the –40°C to 125°C operating
junction temperature range are assured by design, characterization and
correlation with statistical process controls. The LTC3630I is guaranteed
over the –40°C to 125°C operating junction temperature range, the
LTC3630H is guaranteed over the –40°C to 150°C operating junction
temperature range and the LTC3630MP is tested and guaranteed over the
–55°C to 150°C operating junction temperature range.
Note 3: The junction temperature (T , in °C) is calculated from the ambient
J
temperature (T , in °C) and power dissipation (P , in Watts) according to
A
D
the formula:
T = T + (P • θ )
JA
J
A
D
where θ is 43°C/W for the DFN or 45°C/W for the MSOP.
JA
3630fd
3
For more information www.linear.com/LTC3630
LTC3630
elecTrical characTerisTics
Note that the maximum ambient temperature consistent with these
specifications is determined by specific operating conditions in
conjunction with board layout, the rated package thermal impedance and
other environmental factors.
junction temperature may impair device reliability or permanently damage
the device. The overtemperature protection level is not production tested.
Note 5: Dynamic supply current is higher due to the gate charge being
delivered at the switching frequency. See Applications Information.
Note 4: This IC includes over temperature protection that is intended to
protect the device during momentary overload conditions. The maximum
rated junction temperature will be exceeded when this protection is active.
Continuous operation above the specified absolute maximum operating
Note 6: For application concerned with pin creepage and clearance
distances at high voltages, the MSOP package should be used. See
Applications Information.
Typical perForMance characTerisTics
Load Step Transient Response
Soft-Start Waveform
Short-Circuit Response
OUTPUT
VOLTAGE
2V/DIV
OUTPUT
VOLTAGE
50mV/DIV
OUTPUT
VOLTAGE
2V/DIV
LOAD
CURRENT
200mA/DIV
INDUCTOR
CURRENT
500mA/DIV
INDUCTOR
CURRENT
500mA/DIV
3630 G01
3630 G02
3630 G03
C
= 100µF
1ms/DIV
V
V
= 12V
OUT
FIGURE 13 CIRCUIT
500µs/DIV
V
V
= 12V
OUT
FIGURE 13 CIRCUIT
200µs/DIV
OUT
IN
IN
FIGURE 13 CIRCUIT
= 5V
= 5V
Efficiency and Power Loss
vs Load Current, VOUT = 5V
Efficiency and Power Loss
Efficiency and Power Loss
vs Load Current, VOUT = 3.3V
vs Load Current, VOUT = 1.8V
100
90
80
70
60
50
40
30
20
10
0
100
90
80
70
60
50
40
30
20
10
0
100
90
80
70
60
50
40
30
20
10
0
V
= 1.8V
OUT
FIGURE 13 CIRCUIT
EFFICIENCY
EFFICIENCY
EFFICIENCY
1000
100
10
1000
100
10
1000
100
10
1
POWER LOSS
POWER LOSS
POWER LOSS
V
= 3.3V
V
= 5V
OUT
FIGURE 13 CIRCUIT
OUT
FIGURE 13 CIRCUIT
V
V
= 12V
= 65V
V
IN
V
IN
= 12V
= 65V
1
V
IN
V
IN
= 12V
= 65V
IN
IN
1
0.1
1
10
100
1000
0.1
1
10
100
1000
0.1
1
10
100
1000
LOAD CURRENT (mA)
LOAD CURRENT (mA)
LOAD CURRENT (mA)
3630 G05
3630 G06
3630 G04
3630fd
4
For more information www.linear.com/LTC3630
LTC3630
Typical perForMance characTerisTics
Efficiency vs Input Voltage
Line Regulation vs Input Voltage
Load Regulation vs Load Current
0.05
0.04
0.03
0.02
0.01
0
95
90
85
80
5.04
5.03
5.02
5.01
FIGURE 13 CIRCUIT
V
= 5V
V
V
= 12V
= 5V
OUT
IN
OUT
I
= 500mA
FIGURE 13 CIRCUIT
LOAD
FIGURE 13 CIRCUIT
75
70
5.00
4.99
–0.01
–0.02
–0.03
–0.04
–0.05
65
60
55
4.98
4.97
4.96
I
I
I
I
= 500mA
= 100mA
= 10mA
= 1mA
LOAD
LOAD
LOAD
LOAD
20
30
50
5
15
35
45
55
65
100
200
LOAD CURRENT (mA)
400
10
60
25
0
500
40
300
INPUT VOLTAGE (V)
INPUT VOLTAGE (V)
3630 G08
3630 G07
3630 G09
Feedback Comparator Trip
Voltage vs Temperature
Feedback Comparator Hysteresis
vs Temperature
Peak Current Trip Threshold
vs Temperature and ISET
5.5
5.4
5.3
5.2
5.1
5.0
4.9
4.8
4.7
4.6
4.5
1400
1200
1000
800
600
400
200
0
0.804
0.802
0.800
0.798
V
IN
= 12V
V
IN
= 12V
V
IN
= 12V
I
OPEN
SET
R
= 100kΩ
ISET
I
= GND
65
SET
0.796
–55
5
35
65
95 125 155
–55 –25
95
155
–55 –25
5
35
65
95 125 155
–25
5
35
125
TEMPERATURE (°C)
TEMPERATURE (°C)
TEMPERATURE (°C)
3630 G11
3630 G12
3630 G10
Peak Current Trip Threshold
vs RISET
Peak Current Trip Threshold
vs Input Voltage
Quiescent VIN Supply Current
vs Input Voltage
1400
1400
1200
16
14
12
10
V
IN
= 12V
I
= OPEN
SET
SLEEP
1200
1000
800
600
400
200
1000
800
600
400
200
0
8
6
I
= 100k
= 0V
SET
SHUTDOWN
4
2
0
I
SET
0
40
60
0
10
20
30
50
50
100
R
150
(kΩ)
250
0
200
25
V
35
45
55
5
15
65
INPUT VOLTAGE (V)
VOLTAGE (V)
ISET
IN
3630 G14
3630 G13
3630 G15
3630fd
5
For more information www.linear.com/LTC3630
LTC3630
Typical perForMance characTerisTics
Quiescent VIN Supply Current
vs Temperature
Switch On-Resistance
vs Input Voltage
Switch On-Resistance
vs Temperature
20
16
12
8
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
1.6
V
IN
= 12V
V
IN
= 12V
1.4
1.2
TOP
SLEEP
1.0
0.8
0.6
0.4
0.2
TOP
BOTTOM
SHUTDOWN
BOTTOM
4
0
0
–55 –25
5
35
65
95 125 155
0
20
30
40
50
60
–55 –25
5
35
65
95 125 155
10
TEMPERATURE (°C)
INPUT VOLTAGE (V)
TEMPERATURE (°C)
3630 G16
3630 G17
3630 G18
Switch Leakage Current
vs Temperature
RUN Comparator Threshold
Voltage vs Temperature
Operating Waveforms
1.30
1.25
1.20
1.15
14
12
10
8
V
IN
= 65V
SWITCH
VOLTAGE
25V/DIV
RISING
OUTPUT
VOLTAGE
50mV/DIV
INDUCTOR
CURRENT
500mA/DIV
6
4
SW = 65V
2
FALLING
1.10
1.05
1.00
0
–2
–4
–6
3630 G21
V
V
= 65V
= 5V
10µs/DIV
IN
OUT
SW = 0V
I
= 350mA
LOAD
FIGURE 13 CIRCUIT
65
TEMPERATURE (°C)
125 155
–55 –25
5
35
95
–25
5
65
95 125 155
–55
35
TEMPERATURE (°C)
LT1027 • 3630 G20
3630 G19
3630fd
6
For more information www.linear.com/LTC3630
LTC3630
pin FuncTions
SW (Pin 1): Switch Node Connection to Inductor. This
pin connects to the drains of the internal power MOSFET
switches.
SS (Pin 10): Soft-Start Control Input. A capacitor to
ground at this pin sets the output voltage ramp time. A
50µA current initially charges the soft-start capacitor until
switching begins, at which time the current is reduced to
its nominal value of 5µA. The output voltage ramp time
from zero to its regulated value is 1ms for every 16.5nF
of capacitance from SS to GND. If left floating, the ramp
time defaults to an internal 0.8ms soft-start.
NC (Pins 2, 4, 13, 15 DHC Package Only): No Internal
Connection. Leave these pins open.
V
(Pin 3): Main Input Supply Pin. A ceramic bypass
IN
capacitor should be tied between this pin and GND.
RUN (Pin 5): Run Control Input. A voltage on this pin
above 1.21V enables normal operation. Forcing this pin
below 0.7V shuts down the LTC3630, reducing quiescent
current to approximately 5µA. Optionally, connect to the
input supply through a resistor divider to set the under-
voltage lockout. An internal 2M resistor and 2µA current
source pulls this pin up to an internal 5V reference. See
Applications Information.
I
(Pin 11): Peak Current Set Input and Voltage Output
SET
Ripple Filter. A resistor from this pin to ground sets the
peak current comparator threshold. Leave floating for the
maximum peak current (1.2A typical) or short to ground
for minimum peak current (0.12A typical). The maximum
outputcurrentisone-halfthepeakcurrent.The5µAcurrent
that is sourced out of this pin when switching, is reduced
to 1µA in sleep. Optionally, a capacitor can be placed from
this pin to GND to trade off efficiency for light load output
voltage ripple. See Applications Information.
V
, V
(Pins 6, 7): Output Voltage Selection. Short
PRG2 PRG1
both pins to ground for an external resistive divider pro-
grammable output voltage. Short V to SS and short
FBO (Pin 12): Feedback Comparator Output. Connect
PRG1
V
PRG2
to ground for a 5V output voltage. Short V
to
to the V pins of additional LTC3630s to combine the
PRG1
FB
ground and short V
to SS for a 3.3V output voltage.
output current. The typical pull-up current is 20µA. The
typical pull- down impedance is 70Ω. See Applications
Information.
PRG2
Short both pins to SS for a 1.8V output voltage.
GND (Pins 8, 14, 16, Exposed Pad Pin 17): Ground. The
exposedbacksidepadmustbesolderedtothePCBground
plane for optimal thermal performance.
V
FB
(Pin 9): Output Voltage Feedback. When configured
for an adjustable output voltage, connect to an external
resistive divider to divide the output voltage down for
comparison to the 0.8V reference. For the fixed output
configuration,directlyconnectthispintotheoutputsupply.
3630fd
7
For more information www.linear.com/LTC3630
LTC3630
block DiagraM
1.3V
V
IN
ACTIVE: 5µA
SLEEP: 1µA
V
3
IN
+
I
SET
11
C
IN
PEAK CURRENT
COMPARATOR
+
–
INTV
2M
*
CC
SLEEP, ACTIVE: 2µA
SHUTDOWN: 0µA
RUN
5
+
LOGIC
AND
L1
1.21V
–
SW
SHOOT-
1
V
OUT
THROUGH
PREVENTION
C
OUT
GND
16
+
–
INTV
*
CC
REVERSE CURRENT
COMPARATOR
20µA
FEEDBACK
COMPARATOR
VOLTAGE
INTV
*
CC
REFERENCE
FBO
START-UP: 50µA
NORMAL: 5µA
0.800V
+
+
–
12
SS
70Ω
SOFT-START
10
R1
V
FB
9
7
6
14
8
V
V
PRG1
PRG2
R2
GND
GND
V
V
V
R1
R2
PRG2
PRG1
OUT
17
GND GND ADJUSTABLE 1.0M
∞
IMPLEMENT DIVIDER
EXTERNALLY FOR
ADJUSTABLE VERSION
GND
SS
SS
SS
GND
SS
5V FIXED 4.2M 800k
3.3V FIXED 2.5M 800k
1.8V FIXED 1.0M 800k
3630 BD
*WHEN V > 5V, INTV = 5V
IN
CC
WHEN V ≤ 5V, INTV FOLLOWS V
IN
IN
CC
3630fd
8
For more information www.linear.com/LTC3630
LTC3630
(Refer to Block Diagram)
operaTion
The LTC3630 is a synchronous step-down DC/DC con-
verter with internal power switches that uses Burst Mode
control. The low quiescent current and high switching
frequency results in high efficiency across a wide range
of load currents. Burst Mode operation functions by using
short“burst”cyclestoswitchtheinductorcurrentthrough
the internal power MOSFETs, followed by a sleep cycle
where the power switches are off and the load current is
supplied by the output capacitor. During the sleep cycle,
the LTC3630 draws only 12µA of supply current. At light
loads, the burst cycles are a small percentage of the total
cycle time which minimizes the average supply current,
greatly improving efficiency. Figure 1 shows an example
of Burst Mode operation. The switching frequency and the
number of switching cycles during Burst Mode operation
are dependent on the inductor value, peak current, load
current, input voltage and output voltage.
reference,thecomparatoractivatesasleepmodeinwhich
thepowerswitchesandcurrentcomparatorsaredisabled,
reducing the V pin supply current to only 12µA. As the
IN
load current discharges the output capacitor, the voltage
on the V pin decreases. When this voltage falls 5mV
FB
below the 800mV reference, the feedback comparator
trips and enables burst cycles.
At the beginning of the burst cycle, the internal high side
power switch (P-channel MOSFET) is turned on and the
inductor current begins to ramp up. The inductor current
increases until either the current exceeds the peak cur-
rent comparator threshold or the voltage on the V pin
FB
exceeds 800mV, at which time the high side power switch
is turned off and the low side power switch (N-channel
MOSFET)turnson. Theinductorcurrentrampsdownuntil
the reverse current comparator trips, signaling that the
current is close to zero. If the voltage on the V pin is
FB
still less than the 800mV reference, the high side power
switch is turned on again and another cycle commences.
The average current during a burst cycle will normally be
greaterthantheaverageloadcurrent.Forthisarchitecture,
the maximum average output current is equal to half of
the peak current.
SLEEP
SWITCHING
FREQUENCY
CYCLE
BURST
CYCLE
INDUCTOR
CURRENT
BURST
FREQUENCY
The hysteretic nature of this control architecture results
in a switching frequency that is a function of the input
voltage, output voltage, and inductor value. This behavior
provides inherent short-circuit protection. If the output is
shorted to ground, the inductor current will decay very
slowly during a single switching cycle. Since the high side
switch turns on only when the inductor current is near
zero,theLTC3630inherentlyswitchesatalowerfrequency
during start-up or short-circuit conditions.
OUTPUT
VOLTAGE
∆V
3630 F01
OUT
Figure 1. Burst Mode Operation
Main Control Loop
The LTC3630 uses the V
and V
control pins to
PRG2
PRG1
Start-Up and Shutdown
connect internal feedback resistors to the V pin. This
FB
enables fixed outputs of 1.8V, 3.3V or 5V without increas-
ing component count, input supply current or exposure to
noise on the sensitive input to the feedback comparator.
External feedback resistors (adjustable mode) can still
IfthevoltageontheRUNpinislessthan0.7V, theLTC3630
enters a shutdown mode in which all internal circuitry is
disabled,reducingtheDCsupplycurrentto5µA.Whenthe
voltage on the RUN pin exceeds 1.21V, normal operation
of the main control loop is enabled. The RUN pin com-
parator has 110mV of internal hysteresis, and therefore
must fall below 1.1V to stop switching and disable the
main control loop.
be used by connecting both V
and V
to ground.
PRG1
PRG2
In adjustable mode the feedback comparator monitors
the voltage on the V pin and compares it to an inter-
FB
nal 800mV reference. If this voltage is greater than the
3630fd
9
For more information www.linear.com/LTC3630
LTC3630
(Refer to Block Diagram)
operaTion
An internal 0.8ms soft-start function limits the ramp rate
oftheoutputvoltageonstart-uptopreventexcessiveinput
supply droop. If a longer ramp time and consequently less
supply droop is desired, a capacitor can be placed from
the SS pin to ground. The 5µA current that is sourced
out of this pin will create a smooth voltage ramp on the
capacitor. If this ramp rate is slower than the internal
0.8ms soft-start, then the output voltage will be limited
by the ramp rate on the SS pin instead. The internal and
external soft-start functions are reset on start-up and after
an undervoltage event on the input supply.
Dropout Operation
When the input supply decreases toward the output sup-
ply, the duty cycle increases to maintain regulation. The
P-channel MOSFET top switch in the LTC3630 allows the
duty cycle to increase all the way to 100%. At 100% duty
cycle, the P-channel MOSFET stays on continuously, pro-
viding output current equal to the peak current, which can
be greater than 1A. The power dissipation of the LTC3630
can increase dramatically during dropout operation espe-
cially at input voltages less than 10V. The increased power
dissipation is due to higher potential output current and
increasedP-channelMOSFETon-resistance.SeetheTher-
malConsiderationssectionoftheApplicationsInformation
for a detailed example.
The peak inductor current is not limited by the internal or
external soft-start functions; however, placing a capacitor
from the I pin to ground does provide this capability.
SET
Peak Inductor Current Programming
Input Voltage and Overtemperature Protection
The peak current comparator nominally limits the peak
inductor current to 1.2A. This peak inductor current can
When using the LTC3630, care must be taken not to
exceed any of the ratings specified in the Absolute Maxi-
mum Ratings section. As an added safeguard, however,
the LTC3630 incorporates an overtemperature shutdown
feature.Ifthejunctiontemperaturereachesapproximately
180°C, the LTC3630 will enter thermal shutdown mode.
Both power switches will be turned off and the SW node
will become high impedance. After the part has cooled
below 160°C, it will restart. The overtemperature level is
not production tested.
be adjusted by placing a resistor from the I
pin to
SET
ground. The 5µA current sourced out of this pin through
the resistor generates a voltage that adjusts the peak cur-
rent comparator threshold.
During sleep mode, the current sourced out of the I pin
SET
isreducedto1µA.TheI currentisincreasedbackto5µA
SET
on the first switching cycle after exiting sleep mode. The
I
current reduction in sleep mode, along with adding
SET
a filtering capacitor, C , from the I
pin to ground,
The LTC3630 can provide a programmable undervoltage
lockout which can also serve as a precise input voltage
ISET
SET
provides a method of reducing light load output voltage
ripple at the expense of lower efficiency and slightly de-
graded load step transient response.
monitor by using a resistive divider from V to GND with
IN
the tap connected to the RUN pin. Switching is enabled
when the RUN pin voltage exceeds 1.21V and is disabled
when dropping below 1.1V. Pulling the RUN pin below
700mV forces a low quiescent current shutdown (5µA).
Furthermore, if the input voltage falls below 3.5V typi-
cal (3.7V maximum), an internal undervoltage detector
disables switching.
For applications requiring higher output current, the
LTC3630providesafeedbackcomparatoroutputpin(FBO)
forcombiningtheoutputcurrentofmultipleLTC3630s. By
connecting the FBO pin of a “master” LTC3630 to the V
FB
pin of one or more “slave” LTC3630s, the output currents
can be combined to source much more than 500mA.
When switching is disabled, the LTC3630 can safely sus-
tain input voltages up to the absolute maximum rating of
70V. Input supply undervoltage events trigger a soft-start
reset, which results in a graceful recovery from an input
supply transient.
3630fd
10
For more information www.linear.com/LTC3630
LTC3630
applicaTions inForMaTion
ThebasicLTC3630applicationcircuitisshownonthefront
page of the data sheet. External component selection is
determinedbythemaximumloadcurrentrequirementand
beginswiththeselectionofthepeakcurrentprogramming
between efficiency and light load output voltage ripple, as
described in the C
Selection section of the Applica-
ISET
tions Information. For maximum efficiency, minimize the
capacitance on the I pin and place the R resistor
SET
ISET
as close to the pin as possible.
resistor,R .TheinductorvalueLcanthenbedetermined,
ISET
followed by capacitors C and C
.
IN
OUT
Thetypicalpeakcurrentisinternallylimitedtobewithinthe
range of 120mA to 1.2A. Shorting the I pin to ground
SET
Peak Current Resistor Selection
programs the current limit to 120mA, and leaving it float
sets the current limit to the maximum value of 1.2A. When
selecting this resistor value, be aware that the maximum
average output current for this architecture is limited to
halfofthepeakcurrent.Therefore,besuretoselectavalue
that sets the peak current with enough margin to provide
adequate load current under all conditions. Selecting the
peak current to be 2.2 times greater than the maximum
load current is a good starting point for most applications.
Thepeakcurrentcomparatorhasaguaranteedcurrentlimit
of1A(1.2Atypical),whichguaranteesamaximumaverage
load current of 500mA. For applications that demand less
current, the peak current threshold can be reduced to as
little as 100mA (120mA typical). This lower peak current
allows the use of lower value, smaller components (input
capacitor, output capacitor, and inductor), resulting in
lower supply ripple and a smaller overall DC/DC converter.
The threshold can be easily programmed using a resis-
Inductor Selection
tor (R ) between the I pin and ground. The voltage
ISET
SET
pin by R
The inductor, input voltage, output voltage, and peak cur-
rent determine the switching frequency during a burst
cycle of the LTC3630. For a given input voltage, output
voltage, and peak current, the inductor value sets the
switching frequency during a burst cycle when the output
is in regulation. Generally, switching between 50kHz and
250kHz yields high efficiency, and 200kHz is a good first
choice for many applications. The inductor value can be
determined by the following equation:
generated on the I
and the internal 5µA
SET
ISET
current source sets the peak current. The voltage on the
I
pin is internally limited within the range of 0.1V to
SET
1.0V. The value of resistor for a particular peak current can
be selected by using Figure 2 or the following equation:
6
R
ISET
= I
• 0.2 • 10
PEAK
where 100mA < I
< 1A.
PEAK
The internal 5μA current source is reduced to 1μA in sleep
mode to maximize efficiency and to facilitate a trade-off
VOUT
f •I
VOUT
V
IN
L =
• 1–
PEAK
220
200
180
160
140
120
100
80
The variation in switching frequency during a burst cycle
withinputvoltageandinductanceisshowninFigure3. For
lower values of I
, multiply the frequency in Figure 3
PEAK
by 1.2A/I
.
PEAK
An additional constraint on the inductor value is the
LTC3630’s150nsminimumon-timeofthehighsideswitch.
Therefore, in order to keep the current in the inductor
60
40
20
0
50
150 200 250 300 350 400 450 500
100
MAXIMUM LOAD CURRENT (mA)
3630 F02
Figure 2. RISET Selection
3630fd
11
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LTC3630
applicaTions inForMaTion
1000
100
10
600
V
SET
= 3.3V
OUT
L = 4.2µH
I
OPEN
500
400
300
200
100
0
L = 10µH
L = 22µH
L = 47µH
L = 100µH
50
20
30
40
0
10
60
100
1000
V
IN
INPUT VOLTAGE (V)
PEAK INDUCTOR CURRENT (mA)
3630 F04
3630 F03
Figure 4. Recommended Inductor Values for Maximum Efficiency
Figure 3. Switching Frequency for VOUT = 3.3V
well-controlled, the inductor value must be chosen so that
it is larger than a minimum value which can be computed
as follows:
inFigure4.Thevaluesinthisrangeareagoodcompromise
between the trade-offs discussed above. For applications
where board area is not a limiting factor, inductors with
largercorescanbeused,whichextendstherecommended
range of Figure 4 to larger values.
VIN(MAX) • tON(MIN)
L >
•1.2
IPEAK
Inductor Core Selection
whereV
isthemaximuminputsupplyvoltagewhen
IN(MAX)
switching is enabled, t
Once the value for L is known, the type of inductor must
be selected. High efficiency converters generally cannot
affordthecorelossfoundinlowcostpowderedironcores,
forcing the use of the more expensive ferrite cores. Actual
core loss is independent of core size for a fixed inductor
value but is very dependent of the inductance selected.
As the inductance increases, core losses decrease. Un-
fortunately, increased inductance requires more turns of
wire and therefore copper losses will increase.
is 150ns, I
is the peak
ON(MIN)
PEAK
current, and the factor of 1.2 accounts for typical inductor
tolerance and variation over temperature. Inductor values
that violate the above equation will cause the peak current
toovershootandpermanentdamagetothepartmayoccur.
Although the above equation provides the minimum in-
ductor value, higher efficiency is generally achieved with
a larger inductor value, which produces a lower switching
frequency. The inductor value chosen should also be large
enoughtokeeptheinductorcurrentfromgoingverynega-
Ferrite designs have very low core losses and are pre-
ferred at high switching frequencies, so design goals
can concentrate on copper loss and preventing satura-
tion. Ferrite core material saturates “hard,” which means
that inductance collapses abruptly when the peak design
current is exceeded. This results in an abrupt increase in
inductor ripple current and consequently output voltage
ripple. Do not allow the core to saturate!
tivewhichismoreofaconcernathigherV
(>~12V).For
OUT
agiveninductortype,however,asinductanceisincreased,
DC resistance (DCR) also increases. Higher DCR trans-
lates into higher copper losses and lower current rating,
both of which place an upper limit on the inductance. The
recommended range of inductor values for small surface
mount inductors as a function of peak current is shown
3630fd
12
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LTC3630
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Different core materials and shapes will change the size/
currentandprice/currentrelationshipofaninductor.Toroid
or shielded pot cores in ferrite or permalloy materials are
small and do not radiate energy but generally cost more
than powdered iron core inductors with similar charac-
teristics. The choice of which style inductor to use mainly
depends on the price versus size requirements and any
radiated field/EMI requirements. New designs for surface
mount inductors are available from Coiltronics, Coilcraft,
TDK, Toko, and Sumida.
The output capacitor, C , filters the inductor’s ripple
OUT
current and stores energy to satisfy the load current when
the LTC3630 is in sleep. The output ripple has a lower limit
of V /160 due to the 5mV typical hysteresis of the feed-
OUT
back comparator. The time delay of the comparator adds
an additional ripple voltage that is a function of the load
current. During this delay time, the LTC3630 continues to
switch and supply current to the output. The output ripple
can be approximated by:
IPEAK
2
4 •10–6 VOUT
∆VOUT
≈
–I
LOAD
•
+
COUT
160
C and C
Selection
IN
OUT
The input capacitor, C , is needed to filter the trapezoidal
IN
Theoutputrippleisamaximumatnoloadandapproaches
lower limit of V /160 at full load. Choose the output
current at the source of the top high side MOSFET. C
IN
OUT
should be sized to provide the energy required to charge
capacitor C
to limit the output voltage ripple ∆V
OUT
OUT
the inductor without causing a large decrease in input
using the following equation:
voltage (∆V ). The relationship between C and ∆V
IN
IN
IN
IPEAK • 2 •10–6
is given by:
COUT
≥
VOUT
2
∆VOUT
–
L •IPEAK
CIN >
160
2 • V • ∆V
IN
IN
The value of the output capacitor must be large enough
to accept the energy stored in the inductor without a large
change in output voltage during a single switching cycle.
It is recommended to use a larger value for C than
IN
calculated by the above equation since capacitance de-
creases with applied voltage. In general, a 4.7µF X7R
Setting this voltage step equal to 1% of the output voltage,
the output capacitor must be:
ceramiccapacitorisagoodchoiceforC inmostLTC3630
IN
applications.
2
To minimize large ripple voltage, a low ESR input capaci-
tor sized for the maximum RMS current should be used.
RMS current is given by:
IPEAK
V
OUT
COUT > 50 •L •
Typically, a capacitor that satisfies the voltage ripple re-
quirementisadequatetofiltertheinductorripple. Toavoid
overheating, the output capacitor must also be sized to
handle the ripple current generated by the inductor. The
worst-case ripple current in the output capacitor is given
VOUT
V
IN
V
IN
VOUT
IRMS = IOUT(MAX)
•
•
– 1
This formula has a maximum at V = 2V , where I =
RMS
IN
OUT
I
/2.Thissimpleworst-caseconditioniscommonlyused
OUT
by I
= I
/2. Multiple capacitors placed in parallel
RMS
PEAK
fordesignbecauseevensignificantdeviationsdonotoffer
muchrelief.Notethatripplecurrentratingsfromcapacitor
manufacturers are often based only on 2000 hours of life
which makes it advisable to further derate the capacitor,
or choose a capacitor rated at a higher temperature than
required.Severalcapacitorsmayalsobeparalleledtomeet
size or height requirements in the design.
maybeneededtomeettheESRandRMScurrenthandling
requirements.
Dry tantalum, special polymer, aluminum electrolytic,
and ceramic capacitors are all available in surface mount
packages. Special polymer capacitors offer very low ESR
but have lower capacitance density than other types.
3630fd
13
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LTC3630
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Ceramic Capacitors and Audible Noise
Tantalum capacitors have the highest capacitance density
but it is important only to use types that have been surge
tested for use in switching power supplies. Aluminum
electrolytic capacitors have significantly higher ESR but
can be used in cost-sensitive applications provided that
consideration is given to ripple current ratings and long-
termreliability.CeramiccapacitorshaveexcellentlowESR
characteristics but can have high voltage coefficient and
audible piezoelectric effects. The high quality factor (Q)
of ceramic capacitors in series with trace inductance can
also lead to significant input voltage ringing.
Higher value, lower cost ceramic capacitors are now be-
coming available in smaller case sizes. Their high ripple
current, high voltage rating, and low ESR make them ideal
for switching regulator applications. However, care must
be taken when these capacitors are used at the input and
output. When a ceramic capacitor is used at the input and
thepowerissuppliedbyawalladapterthroughlongwires,
a load step at the output can induce ringing at the input,
V . At best, this ringing can couple to the output and be
IN
mistaken as loop instability. At worst, a sudden inrush
of current through the long wires can potentially cause
Input Voltage Steps
a voltage spike at V large enough to damage the part.
IN
If the input voltage falls below the regulated output volt-
age, the body diode of the internal high side MOSFET will
conduct current from the output supply to the input sup-
ply. If the input voltage falls rapidly, the voltage across the
inductorwillbesignificantandmaysaturatetheinductor.A
large current will then flow through the high side MOSFET
body diode, resulting in excessive power dissipation that
may damage the part.
For application with inductive source impedance, such as
a long wire, an electrolytic capacitor or a ceramic capaci-
tor with a series resistor may be required in parallel with
C to dampen the ringing of the input supply. Figure 5b
IN
shows this circuit and the typical values required to
dampen the ringing.
L
LTC3630
IN
V
If rapid voltage steps are expected on the input supply, put
IN
LIN
CIN
a small silicon or Schottky diode in series with the V pin
IN
R=
3630 F05b
C
IN
to prevent reverse current and inductor saturation, shown
below as D2 in Figure 5a. The diode should be sized for
a reverse voltage of greater than the input voltage, and to
withstand repetitive currents higher than the maximum
peak current of the LTC3630.
4 • C
IN
Figure 5b. Series RC to Reduce VIN Ringing
Ceramic capacitors are also piezoelectric sensitive. The
LTC3630’s burst frequency depends on the load current,
and in some applications at light load the LTC3630 can
excite the ceramic capacitor at audio frequencies, gen-
erating audible noise. If the noise is unacceptable, use
a high performance tantalum or electrolytic capacitor at
the output.
LTC3630
D2
L
V
SW
IN
INPUT
SUPPLY
V
OUT
C
C
OUT
IN
3637 F05a
Figure 5a. Preventing Current Flow to the Input
3630fd
14
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Output Voltage Programming
To avoid excessively large values of R1 in high output volt-
age applications (V
≥ 10V), a combination of external
OUT
The LTC3630 has three fixed output voltage modes that
and internal resistors can be used to set the output volt-
can be selected with the V
and V
pins and an
PRG1
PRG2
age. This has an additional benefit of increasing the noise
adjustable mode. The fixed output modes use an internal
feedback divider which enables higher efficiency, higher
noise immunity, and lower output voltage ripple for 5V,
3.3V and 1.8V applications. To select the fixed 5V output
immunity on the V pin. Figure 7 shows the LTC3630
FB
with the V pin configured for a 5V fixed output with an
FB
external divider to generate a higher output voltage. The
internal 5M resistance appears in parallel with R2, and the
value of R2 must be adjusted accordingly. R2 should be
chosen to be less than 200k to keep the output voltage
variationlessthan1%duetothetoleranceoftheLTC3630’s
internal resistor.
voltage, connect V
to SS and V
to GND. For 3.3V,
PRG1
to GND and V
PRG2
connect V
to SS. For 1.8V, connect
PRG1
PRG2
both V
and V
to SS. For any of the fixed output
PRG1
PRG2
voltage options, directly connect the V pin to V
.
FB
OUT
For the adjustable output mode (V
= 0V, V
= 0V),
PRG1
PRG2
V
OUT
the output voltage is set by an external resistive divider
according to the following equation:
R1
LTC3630
4.2M
V
5V
FB
R1
R2
VOUT = 0.8V • 1+
R2
0.8V
800k
The resistive divider allows the V pin to sense a fraction
FB
SS
V
PRG1
V
PRG2
of the output voltage as shown in Figure 6. The output
voltage can range from 0.8V to V . Be careful to keep the
IN
3630 F07
divider resistors very close to the V pin to minimize the
FB
Figure 7. Setting the Output Voltage with
External and Internal Resistors
trace length and noise pick-up on the sensitive V signal.
FB
V
OUT
RUN Pin and External Input Undervoltage Lockout
R1
0.8V
V
FB
The RUN pin has two different threshold voltage levels.
Pulling the RUN pin below 0.7V puts the LTC3630 into a
LTC3630
R2
V
V
PRG1
PRG2
low quiescent current shutdown mode (I ~ 5µA). When
Q
3630 F06
theRUNpinisgreaterthan1.21V,thecontrollerisenabled.
Figure 8 shows examples of configurations for driving the
RUN pin from logic.
Figure 6. Setting the Output Voltage with External Resistors
To minimize the no-load supply current, resistor values in
the megohm range may be used; however, large resistor
values should be used with caution. The feedback divider
is the only load current when in shutdown. If PCB leakage
currenttotheoutputnodeorswitchnodeexceedstheload
current, the output voltage will be pulled up. In normal
operation, this is generally a minor concern since the load
current is much greater than the leakage.
SUPPLY
LTC3630
RUN
LTC3630
RUN
3630 F08
Figure 8. RUN Pin Interface to Logic
3630fd
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The RUN pin can alternatively be configured as a precise
Soft-Start
undervoltage (UVLO) lockout on the V supply with a
IN
Soft-start is implemented by ramping the effective refer-
ence voltage from 0V to 0.8V. To increase the duration of
soft-start, place a capacitor from the SS pin to ground.
An internal 5µA pull-up current will charge this capacitor.
The value of the soft-start capacitor can be calculated by
the following equation:
resistive divider from V to ground. A simple resistive
IN
divider can be used as shown in Figure 9 to meet specific
V voltage requirements.
IN
5V
LTC3630
V
IN
SLEEP, ACTIVE: 2µA
SHUTDOWN: 0µA
2M
RUN
5µA
0.35V
CSS = Soft-Start Time •
R3
R4
3630 F09
The minimum soft-start time is limited to the internal soft-
start timer of 0.8ms. When the LTC3630 detects a fault
condition(inputsupplyundervoltageorovertemperature)
or when the RUN pin falls below 1.1V, the SS pin is quickly
pulled to ground and the internal soft-start timer is reset.
This ensures an orderly restart when using an external
soft-start capacitor.
Figure 9. Adjustable UV Lockout
The current that flows through the R3-R4 divider will
directly add to the shutdown, sleep, and active current
of the LTC3630, and care should be taken to minimize
the impact of this current on the overall efficiency of the
Note that the soft-start capacitor may not be the limiting
factor in the output voltage ramp. The maximum output
current, which is equal to half the peak current, must
charge the output capacitor from 0V to its regulated value.
For small peak currents or large output capacitors, this
ramptimecanbesignificant.Therefore,theoutputvoltage
application circuit. To keep the variation of the rising V
IN
UVLO threshold to less than 5% due to the internal pull-
up circuitry, the following equations should be used to
calculate R3 and R4:
RisingV UVLOThreshold
IN
R3 ≤
40µA
ramp time from 0V to the regulated V
to a minimum of:
value is limited
OUT
R3 •1.21V
R4 =
2 •COUT
IPEAK
RisingV UVLOThreshold– 1.21V+ R3 • 4µA
IN
Ramp Time ≥
VOUT
The falling UVLO threshold will be about 10% lower than
C
Selection
therisingV UVLOthresholdduetothe110mVhysteresis
ISET
IN
of the RUN comparator.
Once the peak current resistor, R , and inductor are se-
ISET
lectedtomeettheloadcurrentandfrequencyrequirements,
For applications that do not require a precise UVLO, the
RUNpincanbeleftfloating.Inthisconfiguration,theUVLO
an optional capacitor, C , can be added in parallel with
ISET
R
. This will boost efficiency at mid-loads and reduce
threshold is limited to the internal V UVLO thresholds as
ISET
IN
theoutputvoltagerippledependencyonloadcurrentatthe
expenseofslightlydegradedloadsteptransientresponse.
shown in the Electrical Characteristics table.
Be aware that the RUN pin cannot be allowed to exceed
its absolute maximum rating of 6V. To keep the voltage
on the RUN pin from exceeding 6V, the following relation
should be satisfied:
The peak inductor current is controlled by the voltage on
the I
pin. Current out of the I
pin is 5µA while the
SET
SET
LTC3630 is switching and is reduced to 1µA during sleep
mode. The I current will return to 5µA on the first cycle
SET
V
< 4.5 • Rising V UVLO Threshold
IN
IN(MAX)
after sleep mode. Placing a parallel RC from the I pin to
SET
ground filters the I voltage as the LTC3630 enters and
To support a V
greater than 4.5x the external UVLO
SET
IN(MAX)
exits sleep mode which in turn will affect the output volt-
threshold, an external 4.7V Zener diode should be used
ageripple, efficiencyandloadsteptransientperformance.
in parallel with R4. See Figure 11.
3630fd
16
For more information www.linear.com/LTC3630
LTC3630
applicaTions inForMaTion
In general, when R
is greater than 120k a C
ca-
Efficiency Considerations
ISET
ISET
pacitor in the 100pF to 200pF range will improve most
Theefficiencyofaswitchingregulatorisequaltotheoutput
power divided by the input power times 100%. It is often
useful to analyze individual losses to determine what is
limiting the efficiency and which change would produce
the most improvement. Efficiency can be expressed as:
performance parameters. When R
the capacitance on the I pin should be minimized.
is less than 100k,
ISET
SET
Higher Current Applications
For applications that require more than 500mA, the
LTC3630 provides a feedback comparator output pin
(FBO) for driving additional LTC3630s. When the FBO pin
Efficiency = 100% – (L1 + L2 + L3 + ...)
where L1, L2, etc. are the individual losses as a percent-
age of input power.
of a “master” LTC3630 is connected to the V pin of one
FB
or more “slave” LTC3630s, the master controls the burst
Although all dissipative elements in the circuit produce
cycle of the slaves.
losses, two main sources usually account for most of
2
Figure 10 shows an example of a 5V, 1A regulator using
two LTC3630s. The master is configured for a 5V fixed
the losses: V operating current and I R losses. The V
IN
IN
operating current dominates the efficiency loss at very
2
output with external soft-start and the V UVLO level is
low load currents whereas the I R loss dominates the
IN
set by the RUN pin. Since the slaves are directly controlled
by the master, the SS pin of the slave should have minimal
capacitanceandtheRUNpinoftheslaveshouldbefloating.
Furthermore, slaves should be configured for a 1.8V fixed
efficiency loss at medium to high load currents.
1. The V operating current comprises two components:
IN
The DC supply current as given in the electrical charac-
teristics and the internal MOSFET gate charge currents.
The gate charge current results from switching the gate
capacitance of the internal power MOSFET switches.
Each time the gate is switched from high to low to
output (V
= V = SS) to set the V pin threshold at
PRG2 FB
PRG1
1.8V. The inductors L1 and L2 do not necessarily have to
be the same, but should both meet the criteria described
above in the Inductor Selection section.
high again, a packet of charge, ∆Q, moves from V to
IN
ground. The resulting ∆Q/dt is the current out of V
IN
L1
V
OUT
5V
1A
that is typically larger than the DC bias current.
V
SW
LTC3630
(MASTER)
V
IN
IN
C
OUT
2
C
2. I R losses are calculated from the resistances of the
internal switches, R and external inductor R . When
IN
R3
R4
V
SS
FB
RUN
SW
L
switching, the average output current flowing through
the inductor is “chopped” between the high side PMOS
switch and the low side NMOS switch. Thus, the series
resistance looking back into the switch pin is a function
C
SS
V
V
PRG1
PRG2
I
FBO
SET
V
IN
V
FB
of the top and bottom switch R
values and the
DS(ON)
LTC3630
(SLAVE)
duty cycle (DC = V /V ) as follows:
OUT IN
L2
SW
SS
RUN
R
SW
= (R )DC + (R ) • (1 – DC)
DS(ON)TOP DS(ON)BOT
V
PRG1
V
PRG2
The R
for both the top and bottom MOSFETs can
DS(ON)
be obtained from the Typical Performance Characteris-
I
FBO
SET
3630 F10
2
tics curves. Thus, to obtain the I R losses, simply add
Figure 10. 5V, 1A Regulator
3630fd
17
For more information www.linear.com/LTC3630
LTC3630
applicaTions inForMaTion
R
SW
to R and multiply the result by the square of the
For the MSOP package the θ is 45°C/W. Thus, the junc-
L
JA
average output current:
tion temperature of the regulator is:
2
2
I R Loss = I (R + R )
45°C
W
O
SW
L
TJ = 85°C+ 0.475W •
= 106.4°C
Other losses, including C and C
ESR dissipative
OUT
IN
losses and inductor core losses, generally account for
which is below the maximum junction temperature of
150°C.
less than 2% of the total power loss.
NotethatthewhiletheLTC3630isindropout,itcanprovide
output current that is equal to the peak current of the part.
This can increase the chip power dissipation dramatically
and may cause the internal overtemperature protection
circuitry to trigger at 180°C and shut down the LTC3630.
Thermal Considerations
Inmostapplications,theLTC3630doesnotdissipatemuch
heat due to its high efficiency. But, in applications where
the LTC3630 is running at high ambient temperature with
low supply voltage and high duty cycles, such as dropout,
the heat dissipated may exceed the maximum junction
temperature of the part.
Design Example
As a design example, consider using the LTC3630 in an
To prevent the LTC3630 from exceeding the maximum
junctiontemperature,theuserwillneedtodosomethermal
analysis. The goal of the thermal analysis is to determine
whetherthepowerdissipatedexceedsthemaximumjunc-
tion temperature of the part. The temperature rise from
ambient to junction is given by:
application with the following specifications: typical V
IN
=
= 24V, maximum applied V = 70V, V
= 3.3V, I
IN
OUT
OUT
500mA,f=200kHz.Furthermore,assumeforthisexample
that switching should start when V is greater than 12V.
IN
First, calculate the inductor value that gives the required
switching frequency:
T = P • θ
JA
R
D
3.3V
200kHz •1.2A
3.3V
24V
L =
• 1–
≅ 10µH
requirement.
where P is the power dissipated by the regulator and θ
D
JA
is the thermal resistance from the junction of the die to
the ambient temperature.
Next, verify that this value meets the L
MIN
For this input voltage and peak current, the minimum
inductor value is:
The junction temperature is given by:
T = T + T
R
J
A
24V •150ns
1.2A •1.2
LMIN
=
= 2.5µH
Generally, the worst-case power dissipation is in dropout
at low input voltage. In dropout, the LTC3630 can provide
a DC current as high as the full 1.2A peak current to the
output. At low input voltage, this current flows through a
higher resistance MOSFET, which dissipates more power.
Therefore, the minimum inductor requirement is satisfied
and the 10μH inductor value may be used.
Next,C andC areselected.Forthisdesign,C should
IN
OUT
IN
be sized for a current rating of at least:
Asanexample,considertheLTC3630indropoutataninput
voltage of 5V, a load current of 500mA and an ambient
temperatureof85°C.FromtheTypicalPerformancegraphs
3.3V
24V
24V
3.3V
IRMS = 500mA •
•
– 1≅ 175mARMS
of Switch On-Resistance, the R
of the top switch
DS(ON)
at V = 5V and 100°C is approximately 1.9Ω. Therefore,
IN
the power dissipated by the part is:
2
2
P = (I
) • R
= (500mA) • 1.9Ω = 0.475W
D
LOAD
DS(ON)
3630fd
18
For more information www.linear.com/LTC3630
LTC3630
applicaTions inForMaTion
The value of C is selected to keep the input from droop-
The I pin should be left open in this example to select
IN
SET
ing less than 240mV (1%):
maximum peak current (1.2A typical). Figure 11 shows a
complete schematic for this design example.
10µH•1.2A2
2 • 24V • 240mV
CIN >
≅ 2.2µF
10µH
V
OUT
V
IN
3.3V
V
SW
LTC3630
IN
24V
C
will be selected based on a value large enough to
OUT
500mA
200k
satisfy the output voltage ripple requirement. For a 50mV
output ripple, the value of the output capacitor can be
calculated from:
V
FB
RUN
FBO
SS
47µF
2.2µF
4.7V
V
V
PRG2
21k
PRG1
I
SET
10µH•1.2A2
2 • 3.3V • 50mV
GND
COUT
>
≅ 47µF
3630 F11
C
also needs an ESR that will satisfy the output voltage
Figure 11. 24V to 3.3V, 500mA Regulator at 200kHz
OUT
ripple requirement. The required ESR can be calculated
from:
PC Board Layout Checklist
50mV
1.2A
ESR <
≅ 40mΩ
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of
the LTC3630. Check the following in your layout:
A 47µF ceramic capacitor has significantly less ESR than
40mΩ.
1. Large switched currents flow in the power switches
and input capacitor. The loop formed by these compo-
nents should be as small as possible. A ground plane
is recommended to minimize ground impedance.
Since an output voltage of 3.3V is one of the standard
output configurations, the LTC3630 can be configured
by connecting V
to ground and V
to the SS pin.
PRG1
PRG2
TheundervoltagelockoutrequirementonV canbesatis-
IN
2. Connect the (+) terminal of the input capacitor, C , as
IN
fied with a resistive divider from V to the RUN pin (refer
IN
close as possible to the V pin. This capacitor provides
IN
to Figure 9). Calculate R3 and R4 as follows:
the AC current into the internal power MOSFETs.
12V
40µA
3. Keep the switching node, SW, away from all sensitive
smallsignalnodes.Therapidtransitionsontheswitching
node can couple to high impedance nodes, in particular
R3 = 200kwhichis ≤
200k •1.21V
12V – 1.21V+ 200k • 4µA
V , and create increased output ripple.
R4 =
= 20.9k
FB
4. Flood all unused area on all layers with copper except
for the area under the inductor. Flooding with copper
will reduce the temperature rise of power components.
Choose standard values for R3 = 200k, R4 = 21k. Note
that the V falling threshold will be 10% less than the
IN
You can connect the copper areas to any DC net (V ,
rising threshold or 11V.
IN
V
, GND, or any other DC rail in your system).
OUT
SincethemaximumV ismorethan4.5xtheUVLOthresh-
IN
old, a 4.7V Zener diode in parallel with R4 is required to
keep the maximum voltage on the RUN pin less than the
absolute maximum of 6V.
3630fd
19
For more information www.linear.com/LTC3630
LTC3630
applicaTions inForMaTion
Pin Clearance/Creepage Considerations
the MSE16 package should be used. The MSE16 package
has removed pins between all the adjacent high voltage
andlowvoltagepins,providing0.657mmclearancewhich
will be sufficient for most applications. For more informa-
tion, refer to the printed circuit board design standards
described in IPC-2221 (www.ipc.org).
The LTC3630 is available in two packages (MSE16 and
DHC)bothwithidenticalfunctionality.However,the0.2mm
(minimum space) between pins and paddle on the DHC-
packagemaynotprovidesufficientPCboardtraceclearance
between high and low voltage pins in some higher voltage
applications. In applications where clearance is required,
L1
L1
V
IN
V
33µH
V
V
SW
OUT
IN
OUT
5V
V
IN
V
SW
LTC3630
IN
5V TO 65V
R3
R4
R1
R2
C
C
OUT
IN
500mA
100µF
4.7µF
V
FB
RUN
RUN
V
FB
×2
LTC3630
R
C
ISET
I
SET
SS
C
R
ISET
ISET
I
SET
100pF
220k
ISET
C
IN
C
OUT
FBO
V
V
PRG1
PRG2
GND
C
SS
3630 F13
FBO
SS
V
PRG2
V
PRG1
C
: TDK C5750X7R2A-475M (2220)
OUT
IN
C
: 2 × AVX 12106D107MAT
L1: SUMIDA CDRH105RNP-330N
Figure 13. 5V to 65V Input to 5V Output,
High Efficiency, 500mA Regulator
GND
L1
V
OUT
C
IN
C
OUT
V
IN
GND
VIAS TO GROUND PLANE
3630 F12
OUTLINE OF LOCAL GROUND PLANE
Figure 12. Example PCB Layout
3630fd
20
For more information www.linear.com/LTC3630
LTC3630
Typical applicaTions
4V to 24V Input to 3.3V Output,
Efficiency and Power Loss vs Load Current
250mA Regulator with External Soft-Start, Small Size
100
90
80
70
60
50
40
30
20
10
0
V
= 12V
IN
L1
10µH
EFFICIENCY
V
OUT
V
IN
1000
100
10
1
3.3V
V
SW
LTC3630
IN
4V TO 24V
C
C
OUT
IN
250mA
2.2µF
10µF
V
FB
RUN
I
SET
SS
R
ISET
POWER LOSS
C
SS
100k
FBO
V
PRG2
V
PRG1
100nF
3630 TA02a
GND
C
C
: MURATA GRM32RR71E225KA01
IN
0
: KEMET C1206C106K9PAC
OUT
0.1
1
10
100
L1: VISHAY IHLP2020BZ-100M-11
LOAD CURRENT (mA)
3630 TA02b
4V to 53V Input to –12V Output, Positive-to-Negative Converter
Maximum Load Current vs Input Voltage
500
L1
22µH
V
OUT
= –12V
V
IN
V
SW
LTC3630
RUN
IN
4V TO 53V
C
R1
400
300
IN
4.7µF
200k
V
FB
C
OUT
R2
147k
I
SS
SET
22µF
FBO
V
V
PRG1
PRG2
200
100
0
GND
V
OUT
–12V
3630 TA03a
C
C
: TDK C5750X7R2A475M
IN
OUT
: TDK C4532X7R1C226M
L1: COILCRAFT MSS1048-223ML
5
10 15 20 25 30 35 40 45 50
INPUT VOLTAGE (V)
3630 TA03b
3630fd
21
For more information www.linear.com/LTC3630
LTC3630
Typical applicaTions
5V to 65V Input to 5V Output,150mA Regulator
with 20kHz Minimum Burst Frequency
Burst Frequency vs Load Current
L1
60
50
40
30
20
10
0
33µH
V
V
= 12V
OUT
IN
V
IN
V
SW
LTC3630
RUN
5V
IN
5V TO 65V
C
C
OUT
150mA
IN
2.2µF
10µF
V
FB
30.1Ω
SS
I
SET
V
V
PRG2 PRG1
FBO
R
ISET
IN
OUT
60.4k
GND
20kHz LIMIT
LTC6994-1
+
V
976k
NO LIMIT
1
SET
DIV
C
C
: TDK C3225X7R2A225M
: AVX 12063D106KAT
IN
OUT
196k
100k
GND
L1: COOPER BUSSMAN SD25-330
0
10
100
3630 TA04
LOAD CURRENT (mA)
3630 TA04b
12V to 65V Input to 12V Output with 100mA Input Current Limit
Maximum Input and Load Current vs Input Voltage
L1
22µH
500
V
V
IN
OUT
V
SW
LTC3630
IN
12V TO 65V
12V
C
IN
C
OUT
22µF
R1
MAXIMUM LOAD CURRENT
400
300
200
2.2µF
200k
R3
806k
RUN
V
FB
R2
14.3k
I
SS
SET
R4
10k
V
PRG1
V
PRG2
FBO
GND
3630 TA05
MAXIMUM INPUT CURRENT
100
0
C
C
: TDK C3225X7R2A225M
IN
: TAIYO YUDEN EMK316BJ226ML-T
OUT
L1:TDK SLF7045470MR75
10 15
30 35 40 45 50 55 60 65
20 25
INPUT VOLTAGE (V)
3630 TA05b
VOUT
2
R4
R3+R4
INPUT CURRENT LIMIT ≈
•
V
2
R4
R3+R4
IN
MAXIMUM LOAD CURRENT ≈
•
3630fd
22
For more information www.linear.com/LTC3630
LTC3630
package DescripTion
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
MSE Package
Variation: MSE16 (12)
16-Lead Plastic MSOP with 4 Pins Removed
Exposed Die Pad
(Reference LTC DWG # 05-08-1871 Rev D)
BOTTOM VIEW OF
EXPOSED PAD OPTION
2.845 ±0.102
(.112 ±.004)
2.845 ±0.102
(.112 ±.004)
0.889 ±0.127
(.035 ±.005)
1
8
0.35
REF
5.10
(.201)
MIN
1.651 ±0.102
(.065 ±.004)
1.651 ±0.102
(.065 ±.004)
3.20 – 3.45
(.126 – .136)
0.12 REF
DETAIL “B”
CORNER TAIL IS PART OF
THE LEADFRAME FEATURE.
FOR REFERENCE ONLY
DETAIL “B”
16
9
0.305 ±0.038
0.50
NO MEASUREMENT PURPOSE
4.039 ±0.102
(.159 ±.004)
(NOTE 3)
(.0120 ±.0015)
(.0197)
1.0
(.039)
BSC
TYP
BSC
0.280 ±0.076
(.011 ±.003)
16 14 121110
9
RECOMMENDED SOLDER PAD LAYOUT
REF
DETAIL “A”
0.254
(.010)
3.00 ±0.102
(.118 ±.004)
(NOTE 4)
0° – 6° TYP
4.90 ±0.152
(.193 ±.006)
GAUGE PLANE
0.53 ±0.152
(.021 ±.006)
1
3 5 6 7 8
1.0
DETAIL “A”
0.86
(.034)
REF
1.10
(.043)
MAX
0.18
(.007)
(.039)
BSC
SEATING
PLANE
0.17 – 0.27
(.007 – .011)
TYP
0.1016 ±0.0508
(.004 ±.002)
MSOP (MSE16(12)) 0213 REV D
0.50
(.0197)
BSC
NOTE:
1. DIMENSIONS IN MILLIMETER/(INCH)
2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
6. EXPOSED PAD DIMENSION DOES INCLUDE MOLD FLASH. MOLD FLASH ON E-PAD SHALL
NOT EXCEED 0.254mm (.010") PER SIDE.
3630fd
23
For more information www.linear.com/LTC3630
LTC3630
package DescripTion
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
DHC Package
16-Lead Plastic DFN (5mm × 3mm)
(Reference LTC DWG # 05-08-1706 Rev Ø)
0.65 ±0.05
3.50 ±0.05
1.65 ±0.05
2.20 ±0.05 (2 SIDES)
PACKAGE
OUTLINE
0.25 ± 0.05
0.50 BSC
4.40 ±0.05
(2 SIDES)
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
R = 0.115
TYP
0.40 ±0.10
5.00 ±0.10
(2 SIDES)
9
16
R = 0.20
TYP
3.00 ±0.10
(2 SIDES)
1.65 ±0.10
(2 SIDES)
PIN 1
TOP MARK
(SEE NOTE 6)
PIN 1
NOTCH
(DHC16) DFN 1103
8
1
0.25 ±0.05
0.75 ±0.05
0.200 REF
0.50 BSC
4.40 ±0.10
(2 SIDES)
0.00 – 0.05
BOTTOM VIEW—EXPOSED PAD
NOTE:
1. DRAWING PROPOSED TO BE MADE VARIATION OF VERSION (WJED-1) IN JEDEC
PACKAGE OUTLINE MO-229
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE
TOP AND BOTTOM OF PACKAGE
3630fd
24
For more information www.linear.com/LTC3630
LTC3630
revision hisTory
REV
DATE
5/12
6/12
7/12
7/14
DESCRIPTION
PAGE NUMBER
A
Circuit 3630 TA05: change 36V to 12V
Clarified Typical Application
22
26
21
B
C
Swapped V
and V
pins in both Typical Applications on this page
PRG1
PRG2
D
Clarified efficiency graphs
Clarified Block Diagram
4
8
Clarified Peak Current Resistor Selection
Clarified Applications Information
Clarified Typical Applications
11
14, 18, 20
21, 22
3630fd
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
25
LTC3630
Typical applicaTion
4.5V to 65V Input to 3.3V Output, 1.5A Regulator
V
X
C1
22µF
SYNC/MODE INTV
CC
C
PGOOD
PV
VCC
IN
IN
D1
C
1µF
R
OSC
PV
105k
RT
BOOST
C
ITH
L1
33µH
R
BST
0.22µF
ITH
1nF
LTC3603
4.32k
V
*
IN
ITH
V
SW
LTC3630
SW
SW
IN
4.5V TO 65V
C
IN
R1
2.2µF
V
FB
L2
200k
2.2µH
R1
V
3.3V
1.5A
OUT
RUN
V
FB
105k
RUN
SW
PGND
PGND
R2
102k
I
SS
SET
TRACK/SS
PGND
R2
475k
C
V
PRG1
V
PRG2
FBO
FB
C
OUT
10pF
100µF
GND
3630 TA06
C
: MURATA GCM32DR72A225KA64L
C
: TDK C3225X5ROJ107M
IN
OUT
C1: TDK CGA6P1X7R1C226M
L1: COILCRAFT MSS1048T-333
L2: VISHAY IHLP-2525CZ-01
*WHEN V > 15V, LTC3630 SWITCHES AND V IS REGULATED TO 15V; WHEN
IN
X
V
IN
< 15V, LTC3630 OPERATES IN DROPOUT AND V FOLLOWS V
X
IN
relaTeD parTs
PART NUMBER DESCRIPTION
COMMENTS
LTC3630A
LTC3637
LTC3639
LTC3638
LTC3642
LTC3631
LTC3632
LT3990
76V, 500mA Synchronous Step-Down DC/DC Converter
76V, 1A Nonsynchronous Step-Down Regulator
150V, 100mA Synchronous Step-Down Regulator
140V, 250mA Nonsynchronous Step-Down Regulator
V : 4V to 76V, V
= 0.8V, I = 12µA, I = 5µA, 3 × 5 DFN-16,
Q SD
IN
OUT(MIN)
MSOP-16(12)E
V : 4V to 76V, V
= 0.8V, I = 12µA, I = 3µA, 3 × 5 DFN-16,
Q SD
IN
OUT(MIN)
MSOP-16(12)E
V : 4V to 150V, V
= 0.8V, I = 12µA, I = 1.4µA,
Q SD
IN
OUT(MIN)
OUT(MIN)
MSOP-16(12)E
V : 4V to 140V, V
= 0.8V, I = 12µA, I = 1.4µA,
Q SD
IN
MSOP-16(12)E
45V (Transient to 60V) 50mA Synchronous Step-Down
DC/DC Converter
V : 4.5V to 45V, V
= 0.8V, I = 12µA, I = 3µA,
OUT(MIN) Q SD
IN
3 × 3 DFN-8, MSOP-8
45V (Transient to 60V) 100mA Synchronous Step-Down
DC/DC Converter
V : 4.5V to 45V, V
= 0.8V, I = 12µA, I = 3µA,
Q SD
IN
OUT(MIN)
3 × 3 DFN-8, MSOP-8
50V (Transient to 60V) 20mA Synchronous Step-Down
DC/DC Converter
V : 4.5V to 50V, V
= 0.8V, I = 12µA, I = 3µA,
Q SD
IN
OUT(MIN)
3 × 3 DFN-8, MSOP-8
62V, 350mA, 2.2MHz High Efficiency Micropower Step-Down V : 4.2V to 62V, V
= 1.21V, I = 2.5µA, I < 1µA,
Q SD
IN
OUT(MIN)
DC/DC Converter with I = 2.5µA
3 × 3 DFN-10, MSOP-16E
V : 4.3V to 55V, V = 1.19V, I = 2.8µA, I < 1µA,
OUT(MIN) Q SD
Q
LT3991
55V, 1.2A, 2.2MHz High Efficiency Micropower Step-Down
IN
DC/DC Converter with I = 2.8µA
3 × 3 DFN-10, MSOP-10E
Q
LTC3891
LTC3864
LTC3863
Low I , 60V Synchronous Step-Down Controller
Q
V : 4V to 60V, V = 0.8V, I = 50µA, I = 14µA,
IN
OUT(MIN)
Q
SD
3 × 4 QFN-20, TSSOP-20E
Low I , High Voltage Step-Down DC/DC Controller with 100% Fixed Frequency 50kHz to 850kHz, 3.5V ≤ V ≤ 60V: 0.8V ≤ V
Q
IN
OUT(MIN)
Duty Cycle
≤ V , I = 40µA, MSOP-12E, 3 × 4 DFN-12
IN Q
60V, Low I Inverting DC/DC Controller
Fixed Frequency 50kHz to 850kHz, 3.5V ≤ V ≤ 60V, –150V ≤ V
IN OUT(MIN)
Q
≤ –0.4V, I = 70µA, MSOP-12E, 3 × 4 DFN-12
Q
3630fd
LT 0714 REV D • PRINTED IN USA
LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
26
●
●
LINEAR TECHNOLOGY CORPORATION 2012
(408)432-1900 FAX: (408) 434-0507 www.linear.com/LTC3630
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