LTC3670_技术文档

LTC3670

Monolithic 400mA Buck

Regulator with Dual 150mA

LDOs in 3mm × 2mm DFN

FEATURES

DESCRIPTION

The LTC^®3670 is a triple power supply composed of a

400mA synchronous buck regulator and two 150mA low

dropout linear regulators (LDOs). The input supply range

of 2.5V to 5.5V is especially well-suited for single-cell

Lithium-Ion and Lithium-Ion/Polymer applications, and

for powering low voltage ASICs and SoCs from 3V, 3.3V

or 5V rails. Regulated output voltages are programmed

via external resistors. Each output has its own enable pin

for maximum ﬂexibility.

n

Triple Output Supply from a Single 2.5V to 5.5V Input

n

400mA Buck DC/DC Plus Dual 150mA LDOs in One IC

n

Outputs Regulate Down to 0.8V

2.5ꢀ Reference Accuracy

n

Constant-Frequency 2.25MHz Operation

Burst Mode^®Operation for High Efﬁciency at Light

n

Loads; I = 70μA, All Outputs Enabled

Q

n

Independent Enable Pin for Each Output

n

Current Mode Operation for Excellent Line and Load

Transient Response

Internal Soft-Start for Each Output

The 400mA buck regulator features constant-frequency

2.25MHz operation, allowing small surface mount induc-

tors and capacitors to be used. Burst Mode operation

maintains high efﬁciency in light-load and no-load con-

ditions. Internal control-loop compensation simpliﬁes

application design.

n

Tiny 12-Lead 3mm × 2mm × 0.75mm DFN Package

APPLICATIONS

n

Handheld Products

n

Portable Instruments

The LTC3670 is available in a 0.75mm proﬁle, 3mm ×

2mm 12-lead DFN package.

L, LT, LTC, LTM and Burst Mode are registered trademarks of Linear Technology Corporation.

All other trademarks are the property of their respective owners. Patents pending.

n

Single-Cell Li-Ion/Li-Polymer Powered Devices

n

DMB/DVB-H Multimedia Cell Phones

n

Multivoltage Power for Digital Logic, I/O, FPGAs,

CPLDs, ASICs, SoCs, CPUs and RF Chipsets

TYPICAL APPLICATION

Triple Power Supply with Independent Enables

Demoboard

V

IN

3.3V TO 5.5V

2.2μF

V

IN

4.7μH

V

OUT1

1.2V

400mA

GND

SW

232k

464k

10pF

4.7μF

1μF

BUCKFB

9.3mm

LTC3670

V

OUT2

2.8V

ENBUCK

ENLDO1

ENLDO2

PGOOD

LDO1

DIGITAL

CONTROL

150mA

9.4mm

ACTIVE AREA

806k

324k

LDO1_FB

V

OUT3

3.3V

LDO2

3670 TA01b

150mA

1.02M

1μF

LDO2_FB

324k

3670 TA01a

3670f

1

LTC3670

ABSOLUTE MAXIMUM RATINGS

PIN CONFIGURATION

(Notes 1, 2, 3)

TOP VIEW

V , ENBUCK, ENLDO1, ENLDO2,

IN

PGOOD .................................................... –0.3V to 6V

1

2

3

4

5

6

SW

GND

12

V

IN

11 LDO2

SW, BUCKFB, LDO1_FB, LDO2_FB,

ENLD01

ENLD02

ENBUCK

BUCKFB

LDO1

10

9

LDO1, LDO2...............................–0.3V to (V + 0.3V)

IN

13

LDO1_FB

LDO2_FB

PGOOD

I

.......................................................................600mA

SW

LDO1 LDO2

8

, I

..........................................................250mA

7

....................................................................40mA

PGOOD

DDB PACKAGE

12-LEAD (3mm × 2mm) PLASTIC DFN

Junction Temperature ........................................... 125°C

Operating Temperature Range.................. –40°C to 85°C

Storage Temperature Range................... –65°C to 125°C

T

= 125°C, θ = 76°C/W, θ = 13.5°C/W

JMAX

JA

JC

EXPOSED PAD (PIN 13) IS GND, MUST BE SOLDERED TO PCB

ORDER INFORMATION

LEAD FREE FINISH

TAPE AND REEL

PART MARKING

PACKAGE DESCRIPTION

12-Lead (3mm × 2mm) Plastic DFN

TEMPERATURE RANGE

–40°C to 85°C

LTC3670EDDB#PBF

LTC3670EDDB#TRPBF

LDBY

Consult LTC Marketing for parts speciﬁed with wider operating temperature ranges.

Consult LTC Marketing for information on non-standard lead based ﬁnish parts.

For more information on lead free part marking, go to: http://www.linear.com/leadfree/

For more information on tape and reel speciﬁcations, go to: http://www.linear.com/tapeandreel/

ELECTRICAL CHARACTERISTICS ^Thel denotes the speciﬁcations which apply over the full operating

temperature range, otherwise speciﬁcations are at T_A= 25°C. V_IN= 3.6V, unless otherwise noted.

SYMBOL

PARAMETER

CONDITIONS

MIN

TYP

MAX

5.5

UNITS

l

V

IN

Input Voltage Range

2.5

V

UVLO

Undervoltage Lockout Threshold

Undervoltage Lockout Hysteresis

V

IN

Rising

2.2

18

2.3

100

mV

I

V

IN

Quiescent Current, No Load

(Note 4)

Q

All Outputs Enabled

Buck Enabled Only

Buck Enabled Only, in Dropout

One LDO Enabled Only

Shutdown

V

= 0.9V

= 0V

70

38

700

22

110

60

μA

BUCKFB

1100

35

V

= V

= V = 0V

ENLDO2

1

ENBUCK

ENLDO1

ENBUCK, ENLDO1, ENLDO2 Pin Thresholds

Logic Low Voltage

l

V

0.4

1

V

IL

IH

Logic High Voltage

1.2

ENBUCK, ENLDO1, ENLDO2 Pin Pull-Down

Resistance

4

MΩ

R

PGOOD Pin Logic Low Output Resistance

PGOOD Pin Hi-Z Leakage

30

Ω

μA

%

PGOOD

V

= 6V

PGOOD

PGOOD Threshold on Feedback Voltages of

Enabled Regulators

(Note 5)

92

3670f

2

LTC3670

ELECTRICAL CHARACTERISTICS ^Thel denotes the speciﬁcations which apply over the full operating

temperature range, otherwise speciﬁcations are at T_A= 25°C. V_IN= 3.6V, unless otherwise noted.

SYMBOL

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

Synchronous Buck Regulator

f

Oscillator Frequency

1.91

0.78

2.25

0.8

2.59

0.82

20

MHz

V

OSC

l

V

Buck Regulated Feedback Voltage

Feedback Pin Input Bias Current

PMOS Switch Maximum Peak Current (Note 6)

PMOS Switch On-Resistance

NMOS Switch On-Resistance

SW Pin Pull-Down Resistance in Shutdown

Soft-Start Time

BUCKFB

MAXP

I

nA

mA

Ω

600

800

0.6

0.7

10

1100

R

P(BUCK)

N(BUCK)

PD(BUCK)

SS(BUCK)

Ω

kΩ

ms

t

0.6

Each LDO Regulator

l

V

LDO Regulated Feedback Voltage

LDO Line Regulation (Note 7)

LDO Load Regulation (Note 7)

Feedback Pin Input Bias Current

Short-Circuit Output Current (Note 6)

Dropout Voltage (Note 8)

LDO Output, I

= 1mA to 150mA

0.78

0.8

0.25

–5

0.82

20

V

mV/V

μV/mA

nA

LDO

I

= 1mA, V = 2.5V to 5.5V

LDO

IN

= 1mA to 150mA

I

LDO_FB

420

mA

V

I

= 150mA

IN

DROP

LDO

V

= 3.6V

= 2.5V

150

200

300

mV

t

Soft-Start Time

0.1

10

ms

kΩ

SS(LDO)

R

Output Pull-Down Resistance in Shutdown

PD(LDO)

Note 1: Stresses beyond those listed under Absolute Maximum Ratings

may cause permanent damage to the device. Exposure to any Absolute

Maximum Rating condition for extended periods may affect device

reliability and lifetime.

Note 2: This IC includes overtemperature protection that is intended

to protect the device during momentary overload conditions. Junction

temperatures will exceed 125°C when overtemperature protection is

active. Continuous operation above the speciﬁed maximum operating

junction temperature may result in device degradation or failure.

Note 5: PGOOD threshold is expressed as a percentage of the feedback

regulation voltage. The threshold is measured for the feedback pin voltage

rising.

Note 6: The current limit features are intended to protect the IC from

short term or intermittent fault conditions. Prolonged operation above

the speciﬁed Absolute Maximum pin current rating may result in device

degradation or failure.

Note 7: Measured with the LDO running unity gain, with output tied to

feedback pin.

Note 3: The LTC3670 is guaranteed to meet performance speciﬁcations

from 0°C to 85°C. Speciﬁcations over the –40°C to 85°C operating

temperature range are assured by design, characterization and correlation

with statistical process controls.

Note 4: Dynamic supply current is higher due to the gate charge delivered

to the buck regulator’s internal MOSFET switches at the switching

frequency.

Note 8: Dropout voltage is the minimum input to output voltage differential

needed for an LDO to maintain regulation at a speciﬁed output current.

When an LDO is in dropout, its output voltage will be equal to:

V

IN

– V

DROP

3670f

3

LTC3670

TYPICAL PERFORMANCE CHARACTERISTICS ^(T_A^{= 25°C unless otherwise noted)}

Buck Regulated Feedback Voltage

vs Temperature

Regulated LDO Feedback Pin

Voltage vs Temperature

V_INSupply Current vs V_IN

820

815

810

805

800

795

790

785

780

120

100

80

60

40

20

0

820

815

810

805

800

795

790

785

780

UNITY GAIN, V

(OUT)

= V

(BUCKFB)

ALL THREE OUTPUTS ENABLED,

NO LOAD

UNITY GAIN, V

(OUT)

= V

(OUT)

(OUT) (LDO_FB)

I

= 100mA

I

= 0.1mA

130°C

90°C

25°C

V

= 5.5V

IN

V = 4.2V

IN

–45°C

V

= 2.5V

IN

V

= 3.6V

IN

V

= 2.5V

= 3.6V

= 4.2V

= 5.5V

IN

–10 10 30 50 70

TEMPERATURE (˚C)

130

90 110

–50 –30

–10 10 30 50 70

TEMPERATURE (˚C)

130

90 110

2.5

3.5

4

4.5

5

5.5

–50 –30

3

V

(V)

IN

3670 G02

3670 G03

3670 G01

LDO Dropout vs Load Current

at V_IN= 2.5V

Buck Load Regulation

LDO Load Regulation

820

815

810

805

800

795

790

785

780

820

815

810

805

800

795

790

785

780

300

250

200

150

100

50

V

= 2.5V

V

= 3.6V

V

= 3.6V

IN

130°C

90°C

25°C

–45°C

0

50

75

100

125

150

25

100 150 200 250 300

400

0

50

75

100

125

150

0

50

350

25

LOAD CURRENT (mA)

3670 G04

3670 G06

3670 G05

LDO Dropout vs Load Current

at V_IN= 3.6V

Buck Oscillator Frequency

vs Temperature

LDO Short-Circuit Current vs V_IN

2.35

2.30

2.25

2.20

2.15

2.10

2.05

2.00

1.95

1.90

500

450

400

350

300

250

200

150

100

50

300

250

200

150

100

50

V

= 3.6V

V

= 5.5V

IN

V

= 4.2V

IN

V

= 3.6V

IN

130°C

–45°C

V

= 2.5V

IN

90°C

25°C

–45°C

25°C

90°C

0

–10 10 30 50 70

TEMPERATURE (˚C)

130

90 110

–50 –30

0

50

75

100

125

150

25

2.5

3.5

4

4.5

5

5.5

3

LOAD CURRENT (mA)

V

(V)

IN

3670 G09

3670 G07

3670 G08

3670f

4

LTC3670

TYPICAL PERFORMANCE CHARACTERISTICS ^(T_A^{= 25°C unless otherwise noted)}

PMOS Switch Maximum Peak

Current vs Temperature

PGOOD Threshold at Any

Feedback Pin

Buck PMOS On-Resistance

900

800

700

600

500

400

300

200

100

0

1000

900

800

700

600

500

400

300

200

100

0

100

99

98

97

96

95

94

93

92

91

90

V

= 5.5V

IN

90°C

130°C

25°C

V

= 4.2V

IN

V

= 3.6V

IN

V

= 2.5V

IN

–45°C

90°C

130°C

–45°C

25°C

–10 10 30 50 70

130

–50 –30

90 110

2.5

3.5

4

4.5

5

5.5

2.5

3.5

4

4.5

5

5.5

3

V

(V)

V

(V)

IN

TEMPERATURE (˚C)

IN

3670 G1O

3670 G11

3670 G12

PGOOD Pin Pull-Down Resistance

Front Page Application Efﬁciency

100

95

90

85

80

75

70

65

60

80

70

60

50

40

30

20

10

0

FRONT PAGE APPLICATION CIRCUIT

WITH ONLY THE BUCK ENABLED.

PGOOD PIN SINKING 2mA

INDUCTOR: COILCRAFT EPL2014-472ML

V

= 1.2V

OUT

V

= 2.5V

IN

130°C

90°C

25°C

V

= 3.6V

= 5.5V

IN

–45°C

1

100

1000

2.5

3.5

4

4.5

5

5.5

10

3

LOAD CURRENT (mA)

V

(V)

IN

3670 G14

3670 G13

3670f

5

LTC3670

PIN FUNCTIONS

SW(Pin1):BuckRegulatorSwitchNodeConnectiontoIn-

ductor.Thispinconnectstothedrainsofthebuckregulator’s

main PMOS and synchronous NMOS switches.

LDO2_FB (Pin 8): Feedback Voltage Input for the Second

Low Dropout Linear Regulator (LDO2). Typically, an ex-

ternal resistor divider feeds a fraction of the LDO2 output

voltage to this pin.

GND (Pin 2): Ground.

LDO1_FB(Pin9):FeedbackVoltageInputfortheFirstLow

Dropout Linear Regulator (LDO1). Typically, an external

resistor divider feeds a fraction of the LDO1 output volt-

age to this pin.

ENLDO1 (Pin 3): Enables the First Low Dropout Linear

Regulator (LDO1) When High. This is a MOS gate input.

There is an internal 4MΩ pull-down.

ENLDO2 (Pin 4): Enables the Second Low Dropout Linear

Regulator (LDO2) When High. This is a MOS gate input.

There is an internal 4MΩ pull-down.

LDO1 (Pin 10): Output of the First Low Dropout Linear

Regulator. This pin must be bypassed to ground with a

1μF or greater ceramic capacitor.

ENBUCK (Pin 5): Enables the Buck Converter When High.

This is a MOS gate input. There is an internal 4MΩ pull-

down.

LDO2 (Pin 11): Output of the Second Low Dropout Linear

Regulator. This pin must be bypassed to ground with a

1μF or greater ceramic capacitor.

BUCKFB (Pin 6): Feedback Voltage Input for the Buck

Regulator. Typically, an external resistor divider feeds a

fraction of the buck output voltage to this pin.

V (Pin 12): Input Supply. This pin should be bypassed

IN

to ground with a 2.2μF or greater ceramic capacitor.

Exposed Pad (Pin 13): Ground. This pin must be soldered

to the PCB.

PGOOD (Pin 7): Power Good Open-Drain NMOS Output.

The PGOOD pin goes Hi-Z when all enabled outputs are

within 8% of ﬁnal value.

BLOCK DIAGRAM

V

IN

12

LDO1

LDO2

10

11

1

2

SW

400mA BUCK

ENABLE

BUCK

GND

PGOOD

7

2.25MHz

OSC

6

BUCKFB

LDO2

LDO1

800mV

3

4

5

ENLDO1

ENLDO2

ENBUCK

REFERENCE

LOGIC

9

8

LDO1_FB

LDO2_FB

POWER GOOD

COMPARATORS

ENABLE_LDO2

ENABLE_LDO1

GND

13

3670 BD

3670f

6

LTC3670

OPERATION

INTRODUCTION

2.25MHz cycle, or sooner, if the current through it drops

to zero before the end of the cycle.

The LTC3670 combines a synchronous buck converter

with two low dropout linear regulators (LDOs) to provide

three low voltage outputs from a higher voltage input

source. The input supply range of 2.5V to 5.5V spans the

single-cell Li-Ion operating range. Each output can be

independently enabled or shut down via the three enable

pins. The output regulation voltages are programmed by

external resistor dividers.

Throughthesemechanisms,theerrorampliﬁeradjuststhe

peak inductor current to deliver the required output power

to regulate the output voltage as sensed by the BUCKFB

pin.Allnecessarycontrol-loopcompensationisinternalto

the step-down switching regulator requiring only a single

ceramic output capacitor for stability.

At light loads, the inductor current may reach zero before

theendoftheoscillatorcycle,whichwillturnofftheNMOS

synchronous rectiﬁer. In this case, the SW pin goes high

impedanceandwillshowdamped“ringing.”Thisisknown

as discontinuous operation and is normal behavior for a

switching regulator.

SYNCHRONOUS BUCK REGULATOR

The synchronous buck includes many features: It uses a

Constant-frequency current mode architecture, switching

at 2.25MHz down to light loads. Automatic Burst Mode

operation maintains efﬁciency in light load and no-load

situations. Should the input voltage ever fall below the

target output voltage, the buck enters 100% duty cycle

operation. Also known as operating in dropout, this can

extendoperatinglifeinbattery-poweredsystems.Soft-start

circuitry limits inrush current when powering on. Output

currentislimitedintheeventofanoutputshortcircuit.The

switch node is slew-rate limited to reduce EMI radiation.

Thebuckregulationcontrol-loopcompensationisinternal

to the IC and requires no external components.

Burst Mode Operation

Atlightloadandno-loadconditions,thebuckautomatically

switchestoapower-savinghystereticcontrolalgorithmthat

operatestheswitchesintermittentlytominimizeswitching

losses. Known as Burst Mode operation, the buck cycles

the power switches enough times to charge the output

capacitor to a voltage slightly higher than the regulation

point.Thebuckthengoesintoareducedquiescentcurrent

sleepmode.Inthisstate,powerlossisminimizedwhilethe

load current is supplied by the output capacitor. Whenever

theoutputvoltagedropsbelowapre-determinedvalue,the

buck wakes from sleep and cycles the switches again until

the output capacitor voltage is once again slightly above

the regulation point. Sleep time thus depends on load cur-

rent, because the load current determines the discharge

rate of the output capacitor. Should load current increase

above roughly 1/4 of the rated output load current, the

buck resumes constant-frequency operation.

Main Control Loop

An error ampliﬁer monitors the difference between an

internal reference voltage and the voltage on the BUCKFB

pin. When the BUCKFB voltage is below the reference, the

errorampliﬁeroutputvoltageincreases.WhentheBUCKFB

voltage exceeds the reference, the error ampliﬁer output

voltage decreases.

Theerrorampliﬁeroutputcontrolsthepeakinductorcurrent

throughthefollowingmechanism:Pacedbyafree-running

2.25MHz oscillator, the main P-channel MOSFET switch is

turned on at the start of the oscillator cycle. Current ﬂows

Soft-Start

Soft-startinthebuckregulatorisaccomplishedbygradually

increasing the maximum allowed peak inductor current

over a 600ꢀs period. This allows the output to rise slowly,

controlling the inrush current required to charge up the

output capacitor. A soft-start cycle occurs whenever the

LTC3670 is enabled, or after a fault condition has occurred

(thermal shutdown or UVLO).

from the V supply through this PMOS switch, through

IN

the inductor via the SW pin, and into the output capacitor

and load. When the current reaches the level programmed

by the output of the error ampliﬁer, the PMOS is shut off,

and the N-channel MOSFET synchronous rectiﬁer turns

on. Energy stored in the inductor discharges into the load

through this NMOS. The NMOS turns off at the end of the

3670f

7

LTC3670

OPERATION

Switch Slew-Rate Control

Each LDO can be enabled or disabled via its own enable

pin. When disabled with V still applied, an internal

IN

The buck regulator contains new patent-pending circuitry

to limit the slew rate of the switch node (SW pin). This

new circuitry is designed to transition the switch node

over a period of a couple nanoseconds, signiﬁcantly

reducing radiated EMI and conducted supply noise while

maintaining high efﬁciency.

pull-down resistor is switched in to help bring the output

to ground. When an LDO is enabled, a soft-start circuit

ramps its regulation point from zero to ﬁnal value over a

period of roughly 0.1ms, reducing the required V inrush

IN

current.

LOW V SUPPLY UNDERVOLTAGE LOCKOUT

IN

LOW DROPOUT LINEAR REGULATORS (LDOs)

An undervoltage lockout (UVLO) circuit shuts down the

The LTC3670 contains two independent LDO regulators,

each supporting a load of up to 150mA. Each LDO takes

LTC3670 when V drops below about 2.2V.

IN

power from the V pin and drives its output pin with the

IN

POWER GOOD DETECTION

goal of bringing its feedback pin voltage to 0.8V. In the

usual case, a resistor divider is connected between the

LDO’s output pin, feedback pin and ground, in order to

close the control loop and program the output voltage. For

stability, each LDO output must be bypassed to ground

with a minimum 1μF ceramic capacitor.

The LTC3670 has a built-in supply monitor. If the feedback

voltage of every enabled regulator is above 92% of its

regulationvalue,thePGOODpinbecomeshighimpedance.

Otherwise, or if no regulators are enabled, the PGOOD pin

is driven to ground by an internal open-drain NMOS.

The PGOOD pin may be connected through a pull-up

resistor to a supply voltage of up to 5.5V, independent of

the V pin voltage.

IN

3670f

8

LTC3670

APPLICATIONS INFORMATION

Buck Regulator Inductor Selection

Differentcorematerialsandshapeswillchangethesize/cur-

rent and price/current relationship of an inductor. Toroid

or shielded pot cores in ferrite or Permalloy materials

are small and do not radiate much energy, but generally

cost more than powdered iron core inductors with similar

electrical characteristics. Inductors that are very thin or

have a very small volume typically have much higher core

and DCR losses, and will not give the best efﬁciency. The

choice of which style inductor to use often depends more

on the price vs size, performance, and any radiated EMI

requirements than on what the buck regulator needs to

operate.

Many different sizes and shapes of inductors are avail-

able from numerous manufacturers. Choosing the right

inductor from such a large selection of devices can be

overwhelming, but following a few basic guidelines will

make the selection process much simpler.

The buck regulator is designed to work with inductors in

the range of 2.2μH to 10μH. A 4.7μH inductor is a good

starting point. Larger value inductors reduce ripple cur-

rent which improves output ripple voltage. Lower value

inductors result in higher ripple current and improved

transient response time. To maximize efﬁciency, choose

an inductor with a low DC resistance. Choose an inductor

with a DC current rating at least 1.5 times larger than the

maximumloadcurrenttoensurethattheinductordoesnot

saturate during normal operation. If output short-circuit

is a possible condition, the inductor should be rated to

handle the maximum peak current speciﬁed for the buck

regulator.

Table 1 shows several inductors that work well with the

buck regulator. These inductors offer a good compromise

in current rating, DCR and physical size. Consult each

manufacturer for detailed information on their entire

selection of inductors.

Table 1. Recommended Inductors for the Buck Regulator

L

(μH)

MAXIMUM I

(A)

MAXIMUM DCR

SIZE in mm

(L × W × H)

DC

INDUCTOR TYPE

(Ω)

MANUFACTURER

EPL2014-472ML

4.7

1.3

0.254

Coilcraft

1.8 × 2.0 × 1.4

www.coilcraft.com

LPS3015

DE2818C

DE2812C

4.7

3.3

1.1

1.3

0.2

0.13

3.0 × 3.0 × 1.5

4.7

3.3

1.25

1.45

0.072

0.053

Toko

www.toko.com

3.0 × 2.8 × 1.8

4.7

3.3

1.15

1.37

0.13*

0.105*

3.0 × 2.8 × 1.2

CDRH3D16

CDRH2D11

4.7

0.9

0.11

Sumida

www.sumida.com

4.0 × 4.0 × 1.8

4.7

3.3

0.5

0.6

0.17

0.123

3.2 × 3.2 × 1.2

SD3118

4.7

3.3

1.3

1.59

0.162

0.113

Cooper

www.cooperet.com

3.1 × 3.1 × 1.8

*Typical DCR

3670f

9

LTC3670

APPLICATIONS INFORMATION

Input/Output Capacitor Selection

The output voltage of the buck regulator is determined by

R1 and R2, following the equation:

LowESR(equivalentseriesresistance)ceramiccapacitors

should be used to bypass the following pins to ground:

R2

R1

⎛

⎝

⎞

V_OUT(BUCK)= 1+

• 0.8V

⎜

⎟

⎠

V , the buck output, LDO1 and LDO2. Only X5R or X7R

IN

ceramic capacitors should be used because they retain

their capacitance over wider voltage and temperature

ranges than other ceramic types. A 10ꢀF output capaci-

tor is sufﬁcient for the buck regulator output. For good

transient response and stability the output capacitor for

thebuckregulatorshouldretainatleast4ꢀFofcapacitance

An LDO’s output voltage is similarly determined by R3

and R4, following:

R4

R3

⎛

⎝

⎞

V_OUT(LDO)= 1+

• 0.8V

⎜

⎟

⎠

over operating temperature and bias voltage. The V pin

IN

Typical values for R2 and R4 are in the range from 40k

to 1M.

should be bypassed with a 2.2ꢀF capacitor. The LDO1

and LDO2 output pins should each be bypassed with a

1μF capacitor or greater. Larger values yield improved

transient response.

Forimprovedbuckregulatortransientresponse,thecapaci-

tor C cancels the pole created by the feedback resistors

FB

and the input capacitance of the BUCKFB pin. A variety of

Consult with capacitor manufacturers for detailed infor-

mation and speciﬁcations on their selection of ceramic

capacitors.Manymanufacturersnowofferverythin(<1mm

tall) ceramic capacitors ideal for use in height-restricted

designs. Table 2 shows a list of several ceramic capacitor

manufacturers.

capacitor sizes can be used for C , but a value of 10pF

FB

is recommended for most applications. Experimentation

with capacitor sizes between 2pF and 22pF may yield

improved transient response.

Printed Circuit Board Layout Considerations

Table 2. Ceramic Capacitor Manufacturers

When laying out the printed circuit board, the following

list should be followed to ensure proper operation of the

LTC3670:

AVX

www.avxcorp.com

www.murata.com

www.t-yuden.com

www.vishay.com

www.tdk.com

Murata

Taiyo Yuden

Vishay Siliconix

TDK

1) TheExposedPadofthepackageshouldconnectdirectly

to a large ground plane to minimize thermal and electri-

cal impedance.

Output Voltage Programming

2) The connection from the input supply pin (V ) to its

IN

decoupling capacitor should be kept as short as pos-

Figure 1 shows how feedback resistor dividers are con-

nected to the LTC3670 to set the output voltages of the

buck and an LDO.

sible. The GND side of this capacitor should connect

directlytothegroundplaneofthepart.TheV capacitor

IN

provides the AC current to the buck regulator’s power

MOSFETs and their drivers. It is especially important

to minimize PCB trace inductance from this capacitor

V

SW

OUT(BUCK)

R2

R1

C

FB

BUCKFB

to the V and GND pins of the LTC3670.

IN

LTC3670

3) TheswitchingpowertraceconnectingtheSWpintothe

inductor should be kept as short as possible to reduce

radiated EMI and parasitic coupling.

LDO

V

OUT(LDO)

R4

LDO_FB

3670 F01

R3

4) The LDO output capacitors should be placed as close to

the IC as possible, and connected to the LDO outputs

and the GND pin as directly as possible.

Figure 1. Setting the Output Voltages of the LTC3670

3670f

10

LTC3670

PACKAGE DESCRIPTION

DDB Package

12-Lead Plastic DFN (3mm × 2mm)

(Reference LTC DWG # 05-08-1723 Rev Ø)

0.64 0.05

(2 SIDES)

0.70 0.05

2.55 0.05

1.15 0.05

PACKAGE

OUTLINE

0.25 0.05

0.45 BSC

2.39 0.05

(2 SIDES)

RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS

APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED

R = 0.115

TYP

7

0.40 0.10

12

3.00 0.10

(2 SIDES)

R = 0.05

TYP

2.00 0.10

(2 SIDES)

PIN 1 BAR

TOP MARK

PIN 1

R = 0.20 OR

(SEE NOTE 6)

0.25 s 45°

0.64 0.10

(2 SIDES)

CHAMFER

6

1

(DDB12) DFN 0106 REV Ø

0.23 0.05

0.75 0.05

0.200 REF

0.45 BSC

2.39 0.10

(2 SIDES)

0 – 0.05

BOTTOM VIEW—EXPOSED PAD

NOTE:

1. DRAWING IS NOT A JEDEC PACKAGE OUTLINE

2. DRAWING NOT TO SCALE

3. ALL DIMENSIONS ARE IN MILLIMETERS

4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE

MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE

5. EXPOSED PAD SHALL BE SOLDER PLATED

6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE

3670f

Information furnished by Linear Technology Corporation is believed to be accurate and reliable.

However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-

tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.

11

LTC3670

TYPICAL APPLICATION

Start-Up Transient

LTC3670 with More Output Capacitance for

1V

0V

Improved Transient Response

ALL ENABLE

PINS

V

IN

2.5V TO 5.5V

V

OUT3

V

OUT2

OUTPUT

VOLTAGES

500mV/DIV

10μF

V

IN

4.7μH

V

OUT1

1.2V

GND

SW

400mA

232k

464k

10pF

10μF

4.7μF

BUCKFB

3670 TA03

50μs/DIV

LTC3670

V

= 3.6V Li-Ion CELL, 10mA RESISTIVE LOAD ON EACH OUTPUT

OUT2

IN

ENBUCK

ENLDO1

ENLDO2

PGOOD

1.8V

LDO1

DIGITAL

CONTROL

150mA

1.00M

806k

Load Transient Response

LDO1_FB

100mA

10mA

V

, V

OUT1 OUT2

AND V

OUT3

LOAD CURRENT

V

OUT3

2.5V

LDO2

150mA

V

OUT1

OUT2

OUT3

590k

LDO2_FB

50mV/DIV

AC COUPLED

280k

3670 TA02

3670 TA04

20μs/DIV

= 3.6V Li-Ion CELL, SIMULTANEOUS LOAD TRANSIENT ALL OUTPUTS

V

IN

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2

LTC3445

I C Controllable 600mA Synchronous Buck Regulator with 95% Efﬁciency, V : 2.5V to 5.5V, V

= 0.85V, I = 360μA,

Q

IN

Two 50mA LDOs in a 4mm × 4mm QFN

I

<27μA, 4mm × 4mm QFN Package

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LTC3446

Synchronous 1A, 2.25MHz Step-Down DC/DC Regulator

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95% Efﬁciency, V : 2.7V to 5.5V, V

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LTC3448

600A I , 1.5MHz/2.25MHz, Synchronous

95% Efﬁciency, V : 2.5V to 5.5V, V

= 0.6V, I = 32μA,

Q

OUT

IN

Step-Down DC/DC Converter with LDO Mode

I

SD

<1μA, MS10, DFN Packages

LTC3541/LTC3541-1/ Synchronous 500mA, 2.25MHz Step-Down DC/DC

LTC3541-2/LTC3541-3 Regulator with a 300mA VLDO in a 3mm × 3mm DFN

95% Efﬁciency, V : 2.7V to 5.5V, V

= 0.4V, I = 85μA,

Q

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I

SD

<1μA, 3mm × 3mm DFN Package

LTC3547

Dual 300mA I , 2.25MHz, Synchronous Step-Down

95% Efﬁciency, V : 2.5V to 5.5V, V

= 0.6V, I = 40μA,

Q

OUT

IN

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I

SD

<1μA, DFN-8 Package

LTC3548/LTC3548-1/ Dual 800mA/400mA I , 2.25MHz, Synchronous Step-

LTC3548-2

95% Efﬁciency, V : 2.5V to 5.5V, V

= 0.6V, I = 40μA,

Q

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IN

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I

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<1μA, MS10, DFN Packages

LTC3672B-1/

LTC3672B-2

Monolithic Fixed-Output 400mA Buck Regulator with Dual 95% Efﬁciency, V : 2.9V to 5.5V, I = 260μA,

IN Q

150mA LDOs in a 2mm × 2mm DFN

LTC3672B-1: Buckout = 1.8V, LDO1 = 1.2V, LDO2 = 2.8V

LTC3672B-2: Buckout = 1.2V, LDO1 = 2.8V, LDO2 = 1.8V

3670f

LT 0108 • PRINTED IN USA

LinearTechnology Corporation

1630 McCarthy Blvd., Milpitas, CA 95035-7417

12

●

(408) 432-1900 FAX: (408) 434-0507 www.linear.com


型号：	LTC3670
厂家：	Linear
描述：	Monolithic 400mA Buck Regulator with Dual 150mA LDOs in 3mm × 2mm DFN 单片400毫安降压稳压器，带有双150毫安的LDO采用3mm × 2mm DFN封装稳压器
文件：	总12页 (文件大小：214K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

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