LTC3706EGN#TR [Linear]
LTC3706 - Secondary-Side Synchronous Forward Controller with Polyphase Capability; Package: SSOP; Pins: 24; Temperature Range: -40°C to 85°C;![LTC3706EGN#TR](http://pdffile.icpdf.com/pdf2/p00283/img/icpdf/LTC3706EGN-T_1689947_icpdf.jpg)
型号: | LTC3706EGN#TR |
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描述: | LTC3706 - Secondary-Side Synchronous Forward Controller with Polyphase Capability; Package: SSOP; Pins: 24; Temperature Range: -40°C to 85°C 开关 光电二极管 |
文件: | 总22页 (文件大小:278K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
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LTC3706
Secondary-Side Synchronous
Forward Controller with
PolyPhase Capability
DESCRIPTION
FEATURES
The LTC®3706 is a PolyPhase capable secondary-side
controllerforsynchronousforwardconverters.Whenused
in conjunction with the LTC3705 gate driver and primary-
side controller, the part creates a complete isolated power
supply that combines the power of PolyPhase operation
with the speed of secondary-side control.
n
Secondary-Side Control for Fast Transient Response
n
Self-Starting Architecture Eliminates Need for
Separate Bias Regulator
n
Proprietary Gate Drive Encoding Scheme Reduces
System Complexity
PolyPhase® Operation Reduces C Requirements
n
IN
n
Current Mode Control Ensures Current Sharing
The LTC3706 has been designed to simplify the design
of highly efficient, secondary-side forward converters.
Working in concert with the LTC3705, the LTC3706 forms
a robust, self-starting converter that eliminates the need
for the separate bias regulator that is commonly used in
secondary-side control applications. In addition, a pro-
prietary scheme is used to multiplex gate drive signals
and DC bias power across the isolation barrier through a
single, tiny pulse transformer.
n
PLL Fixed Frequency: 100kHz to 500kHz
n
±1% Output Voltage Accuracy
n
True Remote Sense Differential Amplifier
n
Power Good Output Voltage Monitor
n
High Voltage Linear Regulator Controller
n
Wide Supply Range: 5V to 30V
n
Available in a Narrow 24-Lead SSOP Package
APPLICATIONS
The LTC3706 provides remote sensing, accurate power
goodandovervoltagemonitoringcircuitstosupportpreci-
sion,highcurrentapplications.Alinearregulatorcontroller
with thermal protection is also provided to simplify the
generation of secondary-side bias voltage.
n
Isolated 48V Telecommunication Systems
n
Internet Servers and Routers
n
Distributed Power Step-Down Converters
Automotive and Heavy Equipment
n
L, LT, LTC, LTM, PolyPhase, Burst Mode, Linear Technology and the Linear logo are registered
trademarks and No R
and ThinSOT are trademarks of Linear Technology Corporation.
SENSE
The LTC3706 is available in a 24-lead SSOP package.
All other trademarks are the property of their respective owners. Protected by U.S. Patents
including 6144194, other patents pending.
TYPICAL APPLICATION
36V-72V to 3.3V/20A Isolated Forward Converter
+
+
V
V
OUT
IN
T1
L1
1.2µH
•
•
Si7852DP
1.2Ω
MURS120
Si7852DP
Si7336ADP
×2
1µF
100V
×3
330µF
6.3V
×3
Si7336ADP
MURS120
CMPSH1-4
2mΩ
2W
30mΩ
1W
10µF
25V
–
–
V
V
OUT
IN
CZT3019
100k
BAS21
2.2µF
16V
102k
1%
FQT7N10
L1: COILCRAFT SER2010-122
T1: PULSE PA0807
0.22µF
T2: PULSE PA0297
FG
SW SG
V
NDRV
V
CC
IN
–
+
I
I
S
S
365k
1%
FS/SYNC
1µF
NDRV
UVLO
BOOST TG TS BG IS
T2
+
+
FB
FB/IN
PT
•
•
LTC3706
ITH
680pF
LTC3705
V
CC
2.2µF
25V
–
–
FS/IN
PT
SS/FLT
22.6k
1%
RUN/SS GND PGND PHASE SLP MODE REGSD
GND PGND VSLMT
15k
1%
20k
162k
33nF
33nF
3706 TA01
3706fd
1
LTC3706
ABSOLUTE MAXIMUM RATINGS
PIN CONFIGURATION
(Note 1)
TOP VIEW
V
CC
V
IN
........................................................... –0.3V to 10V
........................................................... –0.3V to 33V
1
2
V
CC
24
23
22
21
20
19
18
17
16
15
14
13
SG
FG
PGND
SW............................................................... –5V to 50V
NDRV......................................................... –0.3V to 13V
+
3
PT
PGOOD
MODE
PHASE
FB
–
4
PT
+
–
ITH, RUN/SS, V
, V , V , REGSD....... –0.3V to 7V
SOUT
S S
5
SW
All Other Pins............................................ –0.3V to 10V
Operating Temperature Range (Note 2)
6
V
IN
7
NDRV
ITH
LTC3706EGN .......................................–40°C to 85°C
LTC3706IGN ........................................–40°C to 85°C
Junction Temperature (Note 3) ............................ 125°C
Storage Temperature Range .................. –65°C to 150°C
Lead Temperature (Soldering, 10 sec)...................300°C
8
REGSD
+
RUN/SS
9
I
S
V
SOUT
–
+
10
11
12
I
S
V
S
–
SLP
V
S
FS/SYNC
GND
GN PACKAGE
24-LEAD PLASTIC SSOP
T
= 125°C, θ = 130°C/W
JA
JMAX
ORDER INFORMATION
LEAD FREE FINISH
LTC3706EGN#PBF
LTC3706IGN#PBF
LEAD BASED FINISH
LTC3706EGN
TAPE AND REEL
PART MARKING
LTC3706EGN
LTC3706IGN
PACKAGE DESCRIPTION
24-Lead Plastic SSOP
24-Lead Plastic SSOP
PACKAGE DESCRIPTION
24-Lead Plastic SSOP
24-Lead Plastic SSOP
TEMPERATURE RANGE
LTC3706EGN#TRPBF
LTC3706IGN#TRPBF
TAPE AND REEL
–40°C to 85°C
–40°C to 85°C
PART MARKING
LTC3706EGN
LTC3706IGN
TEMPERATURE RANGE
–40°C to 85°C
LTC3706EGN#TR
LTC3706IGN#TR
LTC3706IGN
–40°C to 85°C
Consult LTC Marketing for parts specified with wider operating temperature ranges.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
3706fd
2
LTC3706
ELECTRICAL CHARACTERISTICS The l indicates specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VCC = 7V, VIN = 15V, GND = PGND = 0V, unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Main Control Loop
l
l
V
Regulated Feedback Voltage
Feedback Input Current
(Note 4) ITH = 1.2V
(Note 4)
0.594
0.600
2
0.606
100
V
nA
FB
I
FB
Feedback Voltage Line Regulation
Feedback Voltage Load Regulation
V
IN
= 6V to 30V, ITH = 1.2V
0.001
–0.01
%/V
%
∆V
∆V
FB(LINREG)
Measured in Servo Loop,
ITH = 0.5V to 2V
–0.1
FB(LOADREG)
–
V
V
Maximum Current Sense Threshold
Over-Current Shutdown Threshold
R
IS
Mode, 0V < V < 5V
68
78
88
mV
V
ISMAX
SENSE
IS
–
+
V
= V , 0V < V < 2V (CT Mode)
1.15
1.28
1.4
CC
IS
–
R
SENSE
Mode, 0V < V < 5V
87
1.45
100
1.65
113
1.85
mV
V
ISOC
IS
–
+
V
V
V
= V , 0V < V < 2V (CT Mode)
IS
CC
IS
g
m
Transconductance Amplifier g
Soft-Start Charge Current
Soft-Start Discharge Current
RUN/SS Pin On Threshold
Minimum On-Time
2.40
–4
2.75
–5
3.10
–6
mS
µA
µA
V
m
I
= 2V
RUN/SS(C)
RUN/SS(D)
RUN/SS
RUN/SS
I
3
l
V
Rising
0.4
0.45
200
1.5
1.5
1.5
1.5
17
0.5
RUN/SS
t
ns
Ω
ON,MIN
FG, SG R
FG, SG R
FG, SG Driver Pull-Up On Resistance
FG, SG Low
2.7
2.7
2.7
2.7
19
UP
FG, SG Driver Pull-Down On Resistance FG, SG High
Ω
DOWN
+
–
+
–
+
–
PT , PT R
PT , PT Driver Pull-Up Resistance
PT , PT Low
Ω
UP
+
–
+
–
+
–
PT , PT R
PT , PT Driver Pull-Down Resistance
Output Overvoltage Threshold
PT , PT High
Ω
DOWN
V
FB
Rising
15
%
∆V
FB(OV)
V
V
V
Supply
CC
Operating Voltage Range
Regulated Output Voltage
5
10
V
V
CCOP
6.6
7.0
7.4
CCREG
I
CC
Supply Current
Operating
f
= 200kHz (Note 5)
RUN/SS
4.2
240
mA
µA
OSC
Shutdown
V
= GND
l
V
V
V
V
UV Lockout
V
CC
Rising
4.52
5
4.60
0.4
4.70
30
V
V
UVLO
UV Hysteresis
HYS
Supply
IN
Operating Voltage Range
V
INOP
I
Supply Current
Normal Mode
Shutdown
IN
f
= 200kHz
RUN/SS
900
460
µA
µA
OSC
V
= GND
l
V
V
V
UV Lockout
V
Rising
3.90
4.30
0.2
4
4.51
V
V
INUVLO
IN
INHYS
REGSD Shutdown Threshold
REGSD Transconductance
V
Rising
V
REGSD
m,REGSD
REGSD
g
5
µS
3706fd
3
LTC3706
ELECTRICAL CHARACTERISTICS
The l indicates specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VCC = 7V, VIN = 15V, GND = PGND = 0V, unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Oscillator and Phase-Locked Loop
I
f
f
FS/SYNC Pin Sourcing Current
Oscillator Low Frequency Set Point
Oscillator High Frequency Set Point
Oscillator Resistor Set Accuracy
Maximum PLL Sync Frequency
Minimum PLL Sync Frequency
20
µA
kHz
kHz
%
FS
V
V
= GND
= VCC
165
247
–22
200
300
235
353
20
LOW
HIGH
FS/SYNC
FS/SYNC
75kΩ < R
< 175kΩ
∆f (R
)
FS
FS/SYNC
f
500
75
kHz
kHz
PLL(MAX)
PLL(MIN)
f
PGOOD Output
V
V
V
/0.6
Power Good Upper Threshold
Power Good Lower Threshold
Power Good Lower Threshold
V
FB
V
FB
V
FB
Rising
115
91.5
89.5
117
93
119
94.5
92.5
%
%
%
FBH
/0.6
FBL1
/0.6
FBL2
Rising
Falling
91
Differential Amplifier (V
AMP)
SENSE
–
+
ADA
Gain
V
S
= GND, 1V ≤ V ≤ 5V
0.990
1
75
80
3
1.010
V/V
dB
S
CMRR DA
Common Mode Rejection Ratio
Input Resistance
R
IN
kΩ
f
–3dB Bandwidth
MHz
BW
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 3: Junction temperature T (in °C) is calculated from the ambient tem-
J
perature T and the average power dissipation P (in Watts) by the formula:
A
D
T = T + θ • P
D
J
A
JA
Refer to the Applications Information section for details.
Note 2: The LTC3706E is guaranteed to meet the performance specifica-
tions over the 0°C to 85°C operating temperature range. Specifications
over the –40°C to 85°C operating temperature range are assured by
design, characterization and correlation with statistical process controls.
The LTC3706I is guaranteed and tested over the full –40°C to 85°C
operating temperature range.
Note 4: The LTC3706 is tested in a feedback loop that servos V to a
voltage near the internal 0.6V reference voltage to obtain the specified ITH
FB
voltage (V = 1.2V).
ITH
Note 5: Operating supply current is measured in test mode. Dynamic
supply current is higher due to the internal gate charge being delivered
at the switching frequency. See the Typical Performance Characteristics
section.
3706fd
4
LTC3706
TYPICAL PERFORMANCE CHARACTERISTICS TA = 25°C, unless otherwise noted.
VCC Supply Current
vs Input Voltage
VCC Regulator Output Voltage
vs Temperature
Maximum Current Sense
Threshold vs Duty Cycle
7
6
5
4
3
7.06
7.04
7.02
7.00
6.98
6.96
6.94
6.92
6.90
6.88
6.86
100
80
60
40
20
0
f
= 200kHz
OSC
ALL GATES: C
= 0
R
= 0
LOAD
SLP
100kΩ
R
SLP
= 50k
6
7
INPUT VOLTAGE (V)
10
–25
0
125
20
40
DUTY CYCLE (%)
80
5
8
9
–50
25
50
75 100
0
60
TEMPERATURE (°C)
3706 G01
3706 G02
3706 G03
Maximum Current Sense
Threshold vs ITH Voltage
IS Pins Source Current
vs Temperature
IS Pins Source Current
100
400
300
265
260
255
250
245
240
235
230
RS-MODE: (I + + I –)
IS
IS
V
+ = V – = 0V
IS
IS
80
60
40
20
0
200
100
CT-MODE: I
+
IS
0
–100
–200
–300
–400
RS-MODE: (I + + I –)
IS
IS
0.5
1.0
ITH VOLTAGE (V)
3.0
0
1
5
6
–25
0
125
0
1.5
2.0
2.5
–1
2
3
4
–50
25
50
75 100
+
–
IS , IS COMMON MODE VOLTAGE (V)
TEMPERATURE (°C)
3706 G04
3706 G05
3706 G06
Maximum Current Sense
Threshold vs Temperature
RUN/SS ON Threshold
vs Temperature
Oscillator Frequency
vs Temperature
101.5
101.0
100.5
100.0
99.5
470
460
450
440
430
420
5
4
3
R = 175KΩ
2
f
= 500kHz
OSC
1
0
–1
–2
R = 75KΩ
= 100kHz
f
OSC
99.0
–25
0
125
–25
0
125
–25
0
125
–50
25
50
75 100
–50
25
50
75 100
–50
25
50
75 100
TEMPERATURE (°C)
TEMPERATURE (°C)
TEMPERATURE (°C)
3706 G07
3706 G08
3706 G09
3706fd
5
LTC3706
TYPICAL PERFORMANCE CHARACTERISTICS TA = 25°C, unless otherwise noted.
REGSD Shutdown Threshold
vs Temperature
Oscillator Frequency vs RFS
FB Voltage vs Temperature
600
500
400
300
200
100
0
4.010
4.005
4.000
3.995
3.990
601.0
600.5
600.0
599.5
599.0
75
100
200
–25
0
125
–25
0
125
50
125
(kΩ)
150
175
–50
25
50
75 100
–50
25
50
75 100
R
TEMPERATURE (°C)
TEMPERATURE (°C)
FS
3706 G10
3706 G11
3706 G12
Undervoltage Lockout
vs Temperature
FB Voltage Line Regulation
Gate Driver On-Resistance vs VCC
601.0
600.5
600.0
599.5
599.0
4.65
4.60
4.55
4.50
4.45
4.40
4.35
4.30
4.25
1.8
1.7
1.6
1.5
1.4
1.3
1.2
V
RISING
CC
PULL-DOWN
PULL-UP
V
IN
RISING
5
10
SUPPLY VOLTAGE (V)
30
–25
0
125
6
7
10
0
15
20
25
–50
25
50
75 100
5
8
9
V
TEMPERATURE (°C)
V
VOLTAGE (V)
CC
IN
3706 G13
3706 G14
3706 G15
Gate Driver On-Resistance
vs Temperature
Efficiency (Figure 5)
Load Step (Figure 5)
2.50
2.25
2.00
1.75
1.50
1.25
1.00
95
90
85
80
V
= 7V
CC
V
= 36V
IN
V
OUT
100mV/DIV
V
= 72V
IN
I
OUT
10A/DIV
3706 G18
20µs/DIV
V
V
= 48V
IN
OUT
= 3.3V
LOAD STEP = 0A TO 20A
–25
0
125
5
10
LOAD CURRENT (A)
25
–50
25
50
75 100
0
15
20
TEMPERATURE (°C)
3706 G16
3706 G17
3706fd
6
LTC3706
PIN FUNCTIONS
SG (Pin 1): Gate Drive for the “Synchronous” MOSFET.
SLP (Pin 14): Slope Compensation Input. Place a single
resistor to ground to set the desired amount of slope
compensation.
FG (Pin 2): Gate Drive for the “Forward” MOSFET.
PGOOD (Pin 3): Open-Drain Power Good Output. The FB
pin is monitored to ensure that the output is in regulation.
When the output is not in regulation, the PGOOD pin is
pulled low.
–
I
(Pin 15): Negative Input to the Current Sense Circuit.
S
When using current sense transformers, this pin may be
tiedtoV forsingle-endedsensingwitha1.28Vmaximum
CC
current trip level.
MODE (Pin 4): Tie to either GND or V to set the maxi-
CC
+
I
(Pin 16): Positive Input to the Current Sense Circuit.
S
mum duty cycle at either 50% or 75% respectively. Tie to
ground through either a 200k or 100k resistor (50% or
75% maximum duty cycle) to disable pulse encoding. In
this mode, normal PWM signals will be generated at the
Connect to the positive end of a current sense resistor or
to the output of a current sense transformer.
REGSD(Pin17):Thispinisusedtopreventoverheatingofthe
+
–
PT pin, while a clock signal is generated at the PT pin.
external linear regulator pass device that generates the V
CC
supply voltage from the V voltage. A current proportional
IN
PHASE (Pin 5): Control Input to the Phase Selector. This
pin determines the phasing of the controller CLK relative
to the synchronizing signal at the FS/SYNC pin.
to the voltage across the external pass device flows out of
this pin. The IC shuts down the linear regulator when the
voltage on this pin exceeds 4V. Place a resistor (or a resistor
and capacitor in parallel) between this pin and GND to limit
the temperature rise of the external pass device.
FB (Pin 6): The Inverting Input of the Main Loop Error
Amplifier.
ITH (Pin 7): The Output of the Main Loop Error Amplifier.
Place compensation components between the ITH pin
and GND.
NDRV (Pin 18): Drive Output for the External Pass Device
of the V Linear Regulator. Connect to the base (NPN) or
CC
gate (NMOS) of an external N-type device.
RUN/SS (Pin 8): Combination Run Control and Soft-Start
Inputs. A capacitor to ground sets the ramp time of the
output voltage. Holding this pin below 0.4V causes the IC
to shut down all internal circuitry.
V
(Pin 19): Connect to a higher voltage bias supply,
IN
typically the output of a peak detected bias winding. When
not used, tie together with the V and NDRV pins.
CC
SW (Pin 20): Connect to the drain of the “synchronous”
MOSFET. This input is used for adaptive shoot-through
prevention and leading edge blanking.
+
–
V
, V , V (Pins 9, 10, 11): V
is the output of
SOUT
S
S
SOUT
+
a precision, unity-gain differential amplifier. Tie V and
S
–
V
to the output of the main DC/DC converter to achieve
S
–
+
PT , PT (Pins 21, 22): Pulse Transformer Driver Outputs.
For most applications, these connect to a pulse trans-
former (with a series DC blocking capacitor). The PWM
information is multiplexed together with DC power and
sent through a single pulse transformer to the primary
side. This information may be decoded by the LTC3705
gate driver and primary-side controller.
true remote differential sensing. This allows DCR error
effects to be minimized.
GND (Pin 12): Signal Ground.
FS/SYNC (Pin 13): Combination Frequency Set and SYNC
pin. Tie to GND or V to run at 200kHz and 300kHz
CC
respectively. Place a single resistor to ground at this pin
to set the frequency between 100kHz and 500kHz. To
synchronize, drive this pin with a clock signal to achieve
PLL synchronization from 75kHz to 500kHz. Sources
20µA of current.
PGND (Pin 23): Gate Driver Ground Pin.
V
(Pin 24): Main V Input for all Driver and Control
CC
CC
Circuitry.
3706fd
7
LTC3706
BLOCK DIAGRAM
2×
+
I
S
+
16
V
V
CC
+
–
FG
2
I
32×
TRP
C
RESET
–
I
S
–
2V
+
DOMINANT
PGND
23
15
WAIT
OVP
R
CC
SG
1
Q
S
WAIT
PWM
0.25V
+
–
DMAX
SKIP
0.2V
+
–
OVP
C
C
SW
20
–
I
TH
ZERO
CROSSING
DETECT
7
BLANK
V
V
CC
+
0.60V
+
–
+
PT
g
= 2.8mS
m
OC
22
C
EA
FB
6
DRIVER
2.5V
PGND
3.2V
–
ENCODING
AND
•
•
CC
SLP
14
–
RUN/SS
PT
21
LOGIC
OVERCURRENT
SLOPE
COMP 1
PULSE
XFMR
FS/SYNC
13
DRIVE
TYPE
BLANK
DMAX
PHASE
5
OSC
AND
PLL
MODE
4
DRIVE/DMAX
CONTROL
5V TO
DC
V
IN
30V
DC
19
1.24V
60k
UVLO
V
REG
4V
V
REF
4V
INUV
SB
SB
+
–
SHDN
NDRV
18
RUN/SS
8
FB
4V
SB
A
SSLOW
SOFT-
START
V
CCUV
SHDN
WAIT
R
S
Q
V
CC
24
5V TO
275k
OC
4V
SB
4V
SB
DC
10V
V
IN
OT LATCH
DC
RESTRT1
OT
+
–
+
–
V
REGSD
17
IN
g
= 5µS
m
A
V
SOUT
9
4V
V
CC
40k
+
PGOOD
3
V
S
40k
40k
V
CC
UVLO
(4.25/4.5)
SHDN
V
CCUV
10
+
FB
0.6V
OVP
PGOOD/OVP
V
SENSE
AMP
GND
12
–
–
3706 BD
V
S
40k
11
3706fd
8
LTC3706
OPERATION
Main Control Loop
in the system, the LTC3706 uses a proprietary scheme
to encode the PWM gate drive information and multiplex
it together with bias power for the primary-side drive
and control, using a single pulse transformer. Note that,
unlikeoptoisolatorsandothermodulationtechniques,this
multiplexing scheme does not introduce a significant time
delay into the system.
The LTC3706 is designed to work in a constant frequency,
current mode 2-transistor forward converter. During
normal operation, the primary-side MOSFETs (both top
and bottom) are “clocked” on together with the forward
MOSFET on the secondary side. This applies the reflected
input voltage across the inductor on the secondary side.
When the current in the inductor has ramped up to the
peak value as commanded by the voltage on the ITH pin,
the current sense comparator is tripped, turning off the
primary-side and forward MOSFETs. To avoid turning
on the synchronous MOSFET prematurely and causing
shoot-through, the voltage on the SW pin is monitored.
This voltage will usually fall below 0V soon after the
primary-side MOSFETs have turned completely off. When
this condition is detected, the synchronous MOSFET is
quickly turned on, causing the inductor current to ramp
back downwards. The error amplifier senses the output
voltage, and adjusts the ITH voltage to obtain the peak
current needed to maintain the desired main-loop output
voltage. The LTC3706 always operates in a continuous
current,synchronousswitchingmode.Thisensuresarapid
transient response as well as a stable bias supply voltage
at light loads. A maximum duty cycle (either 50% or 75%)
is internally set via clock dividers to prevent saturation of
the main transformer. In the event of an overvoltage on
the output, the synchronous MOSFET is quickly turned on
to help protect critical loads from damage.
+
For most forward converter applications, the PT and
–
PT outputs will contain a pulse-encoded PWM signal.
These outputs are driven in a complementary fashion with
an essentially constant 50% duty cycle. This results in a
stable volt-second balance as well as an efficient transfer
of bias power across the pulse transformer. As shown in
Figure 1, the beginning of the positive half-cycle coincides
with the turn-on of the primary-side MOSFETs. Likewise,
the beginning of the negative half-cycle coincides with
the maximum duty cycle (forced turn-off of primary
switches). At the appropriate time during the positive
half-cycle, the end of the on-time (PWM going LOW) is
signaled by briefly applying a zero volt differential across
the pulse transformer. Figure 1 illustrates the operation
of this multiplexing scheme.
The LTC3705 primary-side controller and gate driver will
decode this PWM information as well as extract the power
needed for primary-side gate drive.
DUTY CYCLE = 15%
150ns
DUTY CYCLE = 0%
150ns
7V
7V
Gate Drive Encoding
SincetheLTC3706controllerresidesonthesecondaryside
of an isolation barrier, communication to the primary-side
power MOSFETs is generally done through a transformer.
Moreover, it is often necessary to generate a low voltage
bias supply for the primary-side gate drive circuitry. In
order to reduce the number of isolated windings present
V
PT1
+ – V
–
PT1
3706 F01
–7V
–7V
1 CLK PER
1 CLK PER
Figure 1. Gate Drive Encoding Scheme (VMODE = GND)
3706fd
9
LTC3706
OPERATION
Self-Starting Architecture
values using the SLP pin as shown in Table 1. Note that
the amount of slope compensation doubles when the duty
cycle exceeds 50%.
When the LTC3706 is used in conjunction with the
LTC3705 primary-side controller and gate driver, a
complete self-starting isolated supply is formed. When
input voltage is first applied in such an application, the
LTC3705 will begin switching in an “open-loop” fashion,
causing the main output to slowly ramp upwards. This
is the primary-side soft-start mode. On the secondary
side, the LTC3706 derives its operating bias voltage from
a peak-charged capacitor. This peak-charged voltage will
rise more rapidly than the main output of the converter,
so that the LTC3706 will become operational well before
the output voltage has reached its final value.
Table 1
SLP PIN
SLOPE (D < 0.5)
0.05 • I • f
SLOPE (D > 0.5)
GND
0.1 • I
• f
SMAX OSC
SMAX OSC
V
None
None
CC
400kΩ to GND
200kΩ to GND
100kΩ to GND
50kΩ to GND
0.1 • I
• f
0.2 • I
0.3 • I
0.5 • I
1.0 • I
• f
SMAX OSC
SMAX OSC
0.15 • I
0.25 • I
• f
• f
SMAX OSC
SMAX OSC
• f
• f
SMAX OSC
SMAX OSC
0.5 • I
• f
• f
SMAX OSC
SMAX OSC
In Table 1 above, I
is the maximum current limit, and f
is the
SMAX
OSC
switching frequency.
When the LTC3706 has adequate operating voltage, it will
begintheprocedureofassumingcontrolfromtheprimary
side. To do this, it first measures the voltage on the power
supply’s main output and then automatically advances its
own soft-start voltage to correspond to the main output
voltage. This ensures that the output voltage increases
monotonically as the soft-start control is transferred from
primary to secondary. The LTC3706 then begins sending
PWMsignalstotheLTC3705ontheprimarysidethrougha
pulsetransformer.WhentheLTC3705hasdetectedastable
signalfromthesecondarycontroller, ittransferscontrolof
the primary switches over to the LTC3706, beginning the
secondary-side soft-start mode. The LTC3706 continues
in this mode until the output voltage has ramped up to
its final value. If for any reason, the LTC3706 either stops
sending (or initially fails to send) PWM information to the
LTC3705, the LTC3705 will detect a FAULT and initiate a
soft-start retry. (See the LTC3705 data sheet.)
Current Sensing and Current Limit
Forcurrentsensing,theLTC3706supportseitheracurrent
sense resistor or a current sense transformer. The current
sense resistor may either be placed in series with the
inductor (either high side or ground lead sensing), or
in the source of the “forward” switch. If a current sense
–
transformerisused, theI inputshouldbetiedtoV and
S
CC
+
the I pin to the output of the current sense transformer.
S
Thiscausesthegainoftheinternalcurrentsenseamplifier
to be reduced by a factor of 16×, so that the maximum
current sense voltage (current limit) is increased from
78mVto1.28V.Aninternal,adaptiveleadingedgeblanking
circuitensurescleanoperationfor“switch”currentsensing
applications.
Current limit is achieved in the LTC3706 by limiting the
maximum voltage excursion of the error signal (ITH volt-
age). Note that if slope compensation is used, the precise
valueatwhichcurrentlimitoccurswillbeafunctionofduty
cycle(SeetheTypicalPerformanceCharacteristicssection).
If a short circuit is applied, an independent overcurrent
comparator may be tripped. In this case, the LTC3706 will
enter a “hiccup” mode using the soft-start circuitry.
Slope Compensation
Slope compensation is added at the input of the PWM
comparator to improve stability and noise margin of the
peak current control loop. The amount of slope compen-
sation can be selected from one of five preprogrammed
3706fd
10
LTC3706
OPERATION
Frequency Setting and Synchronization
Soft-Start
The LTC3706 uses a single pin to set the operating
frequency, or to synchronize the internal oscillator to a
reference clock with an on-chip phase-locked loop (PLL).
The soft-start circuitry has five functions: 1) to provide
a shutdown, 2) to provide a smooth ramp on the output
voltage during start-up, 3) to limit the output current in
a short-circuit situation by entering a hiccup mode, 4) to
limit the maximum power dissipation in the external linear
regulator via the REGSD pin, and 5) to communicate fault
and shutdown information between multiple LTC3706s in
a PolyPhase application.
The FS pin may be tied to GND, V or have a single
CC
resistor to GND to set the switching frequency. If a clock
signal (>2V) is detected at the FS pin, the LTC3706 will
automaticallysynchronizetotherisingedgeofthereference
clock. Table 2 summarizes the operation of the FS pin.
For synchronization between multiple LTC3706s, the
When the RUN/SS pin is pulled to GND, the chip is placed
into shutdown mode. If this pin is released, the RUN/SS
pin is initially charged with a 50µA current source. After
the RUN/SS pin gets above 0.5V, the chip is enabled. At
the instant that the LTC3706 is first enabled, the RUN/SS
voltage is rapidly preset to a voltage that will correspond
to the main output voltage of the DC/DC converter. (See
the Self-Starting Architecture section.) After this preset
intervalhascompleted,thenormalsoft-startintervalbegins
and the charging current is reduced to 5µA. The external
soft-start voltage is used to internally ramp up the 0.6V
reference(positive)inputtotheerroramplifier. Whenfully
charged, the RUN/SS voltage remains at 3V.
+
PT pin of one LTC3706 can be used as a master clock
reference and tied to the FS pin of the other LTC3706s.
Table 2
FS PIN
SWITCHING FREQUENCY
200kHz
GND
V
300kHz
CC
R
to GND
f
f
(Hz) = 4R – 200k
FS
FS
OSC
OSC
Reference Clock
= f (75kHz to 500kHz)
REF
This will cause all LTC3706’s to operate at the same fre-
quency. The phase angle of each LTC3706 that is being
synchronized can be set by using the PHASE pin. This pin
can be tied to GND, V or have a single resistor to V
In the event that the sensed switch or inductor current
exceeds the overcurrent trip threshold, an internal fault
latch is tripped. This latch is also tripped when the REGSD
voltage exceeds 4V (see the Linear Regulator section).
When such a fault is detected, the LTC3706 immediately
goes to zero duty cycle and initiates a soft-start retry.
Prior to discharging the soft-start capacitor, however, the
LTC3706firstputsavoltagepulseontheRUN/SSpin,which
trips the fault latch in any other LTC3706 that shares the
RUN/SS. This ensures an orderly shutdown of all phases
in a PolyPhase application. After the soft-start capacitor
is fully discharged, the LTC3706 attempts a restart. If the
fault is persistent, the system enters a “hiccup” mode.
CC
CC
to set the phase angle (delay) of the internal oscillator
relative to the incoming sync signal on the FS pin. Any
one of five preset values can be selected as summarized
in Table 3.
Table 3
PHASE PIN
LTC3706 PHASE DELAY
GND
0°
V
180°
60°
90°
120°
CC
226kΩ to V
113kΩ to V
CC
CC
56.2kΩ to V
CC
3706fd
11
LTC3706
OPERATION
Note that in self-starting secondary-side control applica-
tions (with the LTC3705), the presence of the LT3706
bias voltage is dependent upon the regular switching of
the primary-side MOSFETs. Therefore, depending on the
details of the application circuit, the LTC3706 may lose
its bias voltage after a fault has been detected and before
completing a soft-start retry. In this case, the “hiccup-
mode” operation is actually governed by the LTC3705
soft-start circuitry. (See the LTC3705 data sheet.)
Power Good/Overvoltage Protection
This circuit monitors the voltage on the FB input. The
open-drain PGOOD output will be logic high if the voltage
on the FB pin is within +17%/–7% of 0.6V. If the voltage on
the FB pin exceeds 117% of 0.6V (0.7V), an overvoltage
(OVP) is detected. For overvoltage protection, the sec-
ondary-side synchronous MOSFET is turned on while all
other MOSFETs are turned off. This protection mode is
not latched, so that the overvoltage detection is cleared if
the FB voltage falls below 115% of 0.6V (0.69V).
Drive Mode and Maximum Duty Cycle
AlthoughtheLTC3706isprimarilyintendedtobeusedwith
theLTC3705in2-transistorforwardapplications,theMODE
pin provides the flexibility to use the LTC3706 in a wide
variety of additional applications. This pin can be used to
defeat the gate drive encoding scheme, as well as change
the maximum duty cycle from its default value of 50%.
The use of the MODE pin is summarized in Table 4.
Linear Regulator Operation
The LTC3706 provides a linear regulator controller that
drivesanexternalN-typepassdevice.Thiscontrollerisused
to create a 7V DC bias from the peak-charged secondary
biasvoltage(8Vto30V).Internaldividerresistorsareused
to establish a regulation voltage of 7V at the V pin. An
CC
auxiliary bias supply with a regulated voltage greater than
When the gate drive encoding scheme is defeated, a
7V may be applied to the V pin to bypass (bootstrap) the
CC
+
standard PWM-style signal will be present at the PT pin
linear regulator. This improves efficiency and also helps to
and a reference clock (in phase with the PWM signal) will
avoid overheating the linear regulator pass device.
–
be present at the PT pin. These outputs can be used in
Thermal protection for the linear regulator pass device is
also provided by means of the REGSD pin. A current is
sourced from this pin that is proportional to the voltage
across the linear regulator pass device (V – V ). Since
“standalone” applications (without the LTC3705) to drive
the gates of MOSFETs in a conventional manner.
Table 4
IN
CC
+
–
the V load current is essentially constant for a given
PT /PT Mode
INTENDED
APPLICATION
CC
MODE PIN
(MAX DUTY CYCLE)
switching frequency and choice of power MOSFETs, the
power dissipated in the external pass device will only vary
with the voltage across it. Thus, a single resistor may be
placed between the REGSD pin and GND to develop a volt-
age that is proportional to the power in the external pass
device. An additional parallel capacitor can also be used
to account for the thermal time constant associated with
the external pass device itself. When the voltage on the
REGSD pin exceeds 4V, an overtemperature fault occurs
and the LTC3706 attempts a soft-start retry.
GND
Encoded PWM
MAX
2-Switch Forward
with LTC3705
(D
= 50%)
V
CC
Encoded PWM
(D = 75%)
1-Switch Forward
MAX
200kΩ to GND
100kΩ to GND
Standard PWM
(D = 50%)
2-Switch Forward
Standalone
MAX
Standard PWM
(D = 75%)
1-Switch Forward
Standalone
MAX
3706fd
12
LTC3706
OPERATION
Slave Mode Operation
the master controller. In this way, equal inductor currents
are established in each of the individual phases. Also, in
slave mode the soft-start charge/discharge currents are
disabled,allowingthemasterdevicetocontrolthecharging
and discharging of the soft-start capacitor.
WhentwoormoreLTC3706devicesareusedinPolyPhase
systems,onedevicebecomesthe“master”controller,while
the others are used as “slaves.” Slave mode is activated
by connecting the FB pin to V . In this mode, the ITH pin
becomesahighimpedanceinput,allowingittobedrivenby
CC
APPLICATIONS INFORMATION
Start-Up Considerations
–
side. The FS/IN start-up resistor for the LTC3705 may be
selected using the following:
Inself-startingapplications,theLTC3705willinitiallybegin
the soft-start of the converter in an open-loop fashion.
After bias is obtained on the secondary side, the LTC3706
assumes control and completes the soft-start interval. In
ordertoensurethatcontrolisproperlytransferredfromthe
LTC3705(primary-side)totheLTC3706(secondary-side),
it is necessary to limit the rate of rise on the primary-side
soft-start ramp so that the LTC3706 has adequate time to
wakeupandassumecontrolbeforetheoutputvoltagegets
too high. This condition is satisfied for many applications
if the following relationship is maintained:
3.2•1010
RFS/IN– + 10k
fPRI(Hz)=
In the event that the secondary-side circuitry fails to
properly start up and assume control of switching, there
areseveralfail-safemechanismstohelpavoidovervoltage
conditions. First, the LTC3705 contains a volt-second
clamp that will keep the primary-side duty cycle at a level
that cannot produce an overvoltage condition. Second,
the LTC3705 contains a time-out feature that will detect
a FAULT if the LTC3706 fails to start up and deliver PWM
signals to the primary side. Finally, the LTC3706 has an
independentovervoltagedetectioncircuitthatwillcrowbar
the output of the DC/DC converter using the synchronous
MOSFET switch.
C
≤ C
SS PRI
SS,SEC
However, care should be taken to ensure that soft-start
transferfromprimary-sidetosecondary-sideiscompleted
well before the output voltage reaches its target value. A
good design goal is to have the transfer completed when
the output voltage is less than one-half of its target value.
Note that the fastest output voltage rise time during pri-
mary-side soft-start mode occurs with maximum input
voltage and minimum load current.
In the event that a short circuit is applied to the output of
the DC/DC converter prior to start-up, the LTC3706 will
generally not receive enough bias voltage to operate. In
this case, the LTC3705 will detect a FAULT for one of two
reasons: 1) the start-up time-out feature will be activated
since the LTC3706 never sends signals to the primary side
or 2) the primary-side overcurrent circuit will be tripped
because of current buildup in the output inductor. In either
case, the LTC3705 will initiate a shutdown followed by a
soft-start retry. See the LTC3705 data sheet for further
details.
The open-loop start-up frequency on the LTC3705 is set
+
by placing a resistor from the FB/IN pin to GND. Although
the exact start-up frequency on the primary side is not
critical, it is generally good practice to set this approxi-
mately equal to the operating frequency on the secondary
3706fd
13
LTC3706
APPLICATIONS INFORMATION
Bias Supply Generation
The turns ratio (NB1) of the bias winding 1 should be cho-
sen to ensure that there is adequate voltage to operate the
LTC3706 over the entire range for the DC/DC converter’s
Figure 2 shows a commonly used method of developing
a V bias supply for the LTC3706. During start-up, bias
CC
input bus voltage (V ). This may be calculated using:
BUS
winding1usesapeakdetectionmethodtorapidlydevelop
a V voltage for the LTC3706, which in turn drives the
VCC(MIN) + 1.5V
NB1=
IN
linear regulator that generates the V voltage (7V). When
CC
VBUS(MIN)
the main output of the converter is in regulation, winding
2 (configured as a forward-style output) is designed to
produce a regulated auxiliary voltage of approximately
7.5Vto8.5V. Sincetheauxiliaryvoltageisgreaterthanthat
of the linear regulator, the linear regulator will effectively
be shut down. Note that the output inductor L1 must be
adequately large so that its ripple current is continuous
V
can be as low as 5V (if this provides adequate
CC(MIN)
gate drive voltage to maintain acceptable efficiency) or as
high as 7V. For V
= 6V and V
= 36V to 72V, this
CC(MIN)
BUS
would mean a turns ratio of NB1 ≈ 0.21 and a V voltage
IN
range at the LTC3706 of 7.5V to 15V.
Using the bias circuit of Figure 2, the linear regulator
would normally operate only for a brief interval during the
initial soft-start ramp of the main output voltage. Under
somefaultconditions(e.g., outputoverload), theauxiliary
voltage produced by bias winding 2 may decrease below
given the amount of V load current, thereby providing
CC
a stable output voltage.
BAS21
1mH
•
BAS21
WINDING 2
NB2
7V, causing the linear regulator to again supply the V
CC
bias current. Since the amount of power dissipation in the
linear regulator pass device may be quite high, it can take
considerable board area when the linear regulator pass
device is sized to handle this power continuously. As an
alternative,theREGSDpinmaybeusedtoeffectivelydetect
an overtemperature condition on the linear regulator pass
device and generate a shut down (soft-start retry) before
overheatingoccurs.Thisallowsfortheuseofasmall(e.g.,
SOT-23) package for the linear regulator pass device.
•
MBRO530
FMMT491A
1
4.7Ω
WINDING 1
NB1
•
1µF
50V
4.7µF
16V
MAIN
TRANSFORMER
V
IN
LTC3706
REGSD NDRV
C
R
V
CC
REGSD
REGSD
3706 F02
Figure 2. Typical Bias Supply Configuration
3706fd
14
LTC3706
APPLICATIONS INFORMATION
The REGSD resistor should be selected based upon the
steady-state (DC) thermal impedance of the linear regula-
tor pass device.
taken to ensure that the safe operating area (SOA) of the
pass device is not exceeded. The capacitor should be
chosen to provide a time constant that is somewhat faster
than the thermal time constant of the pass device in the
system.Thistechniquewillallowformuchhighertransient
power dissipation, which is particularly useful in larger
θ
JA •ICC(MAX)
RREGSD = 960k
TRISE(MAX)
(PolyPhase) systems that have a higher V bias current.
CC
where θ is the DC thermal impedance of the linear
JA
For the above SOT-23 example, a capacitor C
provides a linear regulator shutdown delay given by:
= 1µF
REGSD
regulator pass device and T
is the maximum
RISE(MAX)
junction temperature rise desired for the pass device.
The value for I depends heavily on the particular
CC(MAX)
switching MOSFETs used, as well as on the details of
overall system design. Note that it may include the bias
current associated with the primary-side gate driver and
1
640k
V –7 R
tSHDN = C
R
ln
(
REGSD )(
)
REGSD
1–
(
)
REGSD
IN
controller, if the LTC3705 is being used. The value for I
CC
or 33ms at V = 30V. This delay provides ample time for
IN
is best determined experimentally and then guard banded
linearregulatoroperationduringsoft-start,whileproviding
protectionforthepassdeviceduringfaultconditionssuch
as input overvoltage or output overcurrent.
appropriately to establish I . Using the Typical Ap-
CC(MAX)
plication circuit on the first page of this data sheet as an
example, if a SOT-23 MOSFET is chosen, we might have
θ
= 150°C/W, t
= 50°C and I
= 35mA
CC(MAX)
JA
RISE(MAX)
Current Sensing
so that R
≈ 100kΩ. In this case, the linear regulator
REGSD
can run continuously for any V voltage that is less than:
The LTC3706 provides considerable flexibility in current
sensing techniques. It supports two main methods: 1)
resistive current sensing and 2) current transformer cur-
rentsensing.Resistivecurrentsensingisgenerallysimpler,
smallerandlessexpensive,whilecurrenttransformersens-
ing is more efficient and generally appropriate for higher
(>20A) output currents. For resistive current sensing, the
sense resistor may be placed in any one of three different
locations: high side inductor, low side inductor or low
side switch, as shown in Figure 3. Sensing the inductor
IN
4V = (V – V )(5µs)(R
)
IN
CC
REGSD
640k
R
VIN(MAX)
=
+ 7V
REGSD
or 13.4V. In addition, a capacitor may be added in parallel
with the REGSD resistor to delay the thermal shutdown
and thereby account for the thermal time constant of the
pass device. When using a delay capacitor, care must be
3706fd
15
LTC3706
APPLICATIONS INFORMATION
current (high side or low side) is generally less noisy but
dissipates more power than sensing the switch current
(Figures 3a and 3b). High side inductor current sensing
provides a more convenient layout than low side (no split
ground plane), but can only be used for output voltages
up to 5.5V, due to the common mode limitations of the
For high current applications where efficiency (power dis-
sipation) is very important, a current sense transformer
–
may be used. As shown in Figure 3d, the I pin should
S
be tied off to V when a current sense transformer is
CC
+
used. This causes the I pin to become a single ended
S
(nondifferential) current sense input with a maximum
current sense voltage of 1.28V. Figure 3d shows a typical
application circuit using a current transformer.
+
–
current sense inputs (I and I ). For most applications,
S
S
low side switch current sensing will be a good solution
(Figure 3c).
+
I
+
I
•
•
•
•
S
S
LTC3706
78mV MAX
LTC3706
78mV MAX
–
–
I
S
I
S
3706 F03a
3706 F03b
Figure 3a. High Side Inductor:
Easier Layout, Low Noise, Accurate
Figure 3b. Low Side Inductor:
Accurate, Low Noise, High VOUT Capable
•
•
1.28V MAX
TRIP
•
•
+
+
I
I
I
S
S
LTC3706
•
LTC3706
–
78mV MAX
5W TO
50Ω
–
I
V
CC
S
S
•
3706 F03c
3706 F03d
Figure 3c. Switch Current Sensing: Easy Layout,
Accurate, Higher Efficiency, High VOUT Capable
Figure 3d. Current Transformer:
Highest Efficiency, High VOUT Capable
Figure 3. Current Sensing Techniques
3706fd
16
LTC3706
APPLICATIONS INFORMATION
PolyPhase Applications
LTC3705’s are interconnected, a FAULT (overcurrent, etc.)
on any one of the phases will perform a shutdown/restart
on all phases together. The LTC3705 is put into slave mode
Figure4showsthebasicconnectionsforusingtheLTC3705
andLTC3706inPolyPhaseapplications. Oneofthephases
is always identified as the “master,” while all other phases
are “slaves.” For the LTC3705 (primary side), the master
–
by omitting the resistor on FS/IN . For the LTC3706, the
master performs soft-start and voltage-loop regulation by
driving all slaves to the same current as the master using
the ITH pins. Faults and shutdowns are communicated via
the interconnection of the RUN/SS pins. The LTC3706 is
monitors the V voltage for undervoltage, performs the
IN
open-loop start-up and supplies the initial V voltage for
CC
themasterandallslaves.TheLTC3705slavessimplystand
by and wait for PWM signals from their respective pulse
transformers. Since the SS/FLT pins of master and slave
put into slave mode by tying the FB pin to V .
CC
+
+
V
V
IN
OUT
V
BIAS
V
NDRV V
CC
IN
+
NDRV
FS/SYNC
+
UVLO FB/IN
PT
•
•
V
FB
CC
–
–
ITH
FS/IN
PT
SS/FLT
LTC3705
(MASTER)
RUN/SS
LTC3706
(MASTER)
–
V
IN
V
NDRV V
CC
IN
RUN/SS FS/SYNC
NDRV
+
–
SS/FLT FB/IN
+
FB
ITH
PT
PT
•
•
V
CC
–
UVLO FS/IN
PHASE
LTC3705
(SLAVE)
LTC3706
(SLAVE)
3706 F04
Figure 4. Connections for PolyPhase Operation
3706fd
17
LTC3706
TYPICAL APPLICATIONS
+
+
V
V
OUT
IN
L2 1.2µH
10Ω
L1 1µH
MURS120
0.25W
T1
1nF
100V
10Ω
0.25W
1.2Ω
•
•
Si7852DP
Si7852DP
1nF
100V
330mF
6.3V
×3
1µF
100V
1µF
100V
×3
Si7336ADP
×2
1µF
9:2
Si7336ADP
CMPSH1-4
MURS120
2.2nF
250V
2mΩ
2W
30µΩ
1W
10µF
25V
–
–
V
OUT
V
IN
CZT3019
100Ω
100k
BAS21
680pF
2.2µF
16V
102k
1%
100Ω 100Ω
FQT7N10
0.22µF
L1: VISHAY IHLP-2525CZ-01
L2: COILCRAFT SER2010-122
T1: PULSE PA0807
1nF
FG SW
SG
V
NDRV
V
CC
IN
–
I
S
FS/SYNC
365k
T2: PULSE PA0297
+
I
NDRV
BOOST TG TS BG IS
1%
S
FB
+
+
T2
FB/IN
PT
LTC3706
UVLO
•
•
1µF
0.1µF
5k
ITH
100Ω
470pF
1nF
LTC3705
V
CC
–
–
2.2µF
25V
SS/FLT
FS/IN
PT
1:2
33nF
RUN/SS GND PGND PHASE SLP MODE REGSD
GND PGND VSLMT
680pF
20k
15k
1%
162k
22.6k
1%
33nF
100k
3706 F05
Figure 5. 36V-72V to 3.3V/20A Isolated Forward Converter
(See Typical Performance Characteristics)
3706fd
18
LTC3706
TYPICAL APPLICATIONS
36V to 72V to 12V/20A Isolated Forward Converter. Can Be Paralleled for Higher Output Power
5.1Ω
1/2W
–V
OUT
1nF
100V
A
B
1
4
T3
2
3
T1
+V
+V
IN
•
OUT
•
•
•
•
8
2
4
3
5
L5
L6
0.68µH
2.4µH
•
330Ω
2.2µF
100V
×3
BAS21
7.5Ω
+
68µF
16V
×2
2.2µF
510Ω
10µF
+
11
I
–V
OUT
100V
S
1nF
100V
HAT2244WP
×2
HAT2244WP
×2
Si7450DP
×3
680pF
200V
5.1Ω
1/2W
100Ω
100pF
–V
OUT
10µF
25V
10mΩ
1.5W
2.2µF
–V
SW
+
IN
2.2nF
250V
FCX491A
100Ω
12Ω
MMBT2907A
V
AUX
100k
FDC2512
I
S
CMPSH1-4
T2
365k
10nF
68pF
150Ω
150Ω
0.1µF
5.1k
+
V
CC
FB/IN
5
4
6
3
150pF
1µF
11.5k
604Ω
UVLO
LTC3725
+
470pF
100Ω
PT
8
1
LTC3706
FB
15.0k
1µF
–
–
SSFLT
10nF
FS/IN
PT
10pF
BAT21
390Ω
100k
SW
1nF
CMPSH1-4
BAS21
100k 110k
6.2k
4.7nF
Si2303BDS
68k
2N7002
V
AUX
36V
MMBZ5258B
10nF
470pF
0.1µF
0.1µF
CMPSH1-4
100k
L1
–V
OUT
3706 TA03
L1: COILCRAFT DO1606T-104MLC
L5: VISHAY IHLP2525CZERR68M01 T2: PULSE PA1954NL (1:1:1)
L6: PULSE PA1494.242 T3: ICE CT02-100 (1:100)
T4: COILCRAFT DA2318-ALC (1:1.5) 68µF 16V SANYO 16TQC68M
T1: PULSE PA0955 (6:6:3)
NPNs: DIODES FMMT619
PNPs: DIODES FMMT718
2.2nF 250V MURATA GA343QR7GD222KW01L
100µH
T4
A
B
•
•
4
1
3
CMPSH1-4
6
–V
OUT
3706fd
19
LTC3706
PACKAGE DESCRIPTION
GN Package
24-Lead Plastic SSOP (Narrow .150 Inch)
(Reference LTC DWG # 05-08-1641)
.337 – .344*
(8.560 – 8.738)
.033
(0.838)
REF
24 23 22 21 20 19 18 17 16 15 1413
.045 ± .005
.229 – .244
.150 – .157**
(5.817 – 6.198)
(3.810 – 3.988)
.254 MIN
.150 – .165
1
2
3
4
5
6
7
8
9 10 11 12
.0165 ± .0015
.0250 BSC
RECOMMENDED SOLDER PAD LAYOUT
.015 ± .004
(0.38 ± 0.10)
.0532 – .0688
(1.35 – 1.75)
× 45°
.004 – .0098
(0.102 – 0.249)
.0075 – .0098
(0.19 – 0.25)
0° – 8° TYP
.016 – .050
(0.406 – 1.270)
.008 – .012
.0250
(0.635)
BSC
GN24 (SSOP) 0204
(0.203 – 0.305)
TYP
NOTE:
1. CONTROLLING DIMENSION: INCHES
INCHES
2. DIMENSIONS ARE IN
(MILLIMETERS)
3. DRAWING NOT TO SCALE
*DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
**DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
3706fd
20
LTC3706
REVISION HISTORY (Revision history begins at Rev D)
REV
DATE
DESCRIPTION
PAGE NUMBER
D
7/11
Updated Electrical Characteristics
Updated Table 3
3, 4
11
Added new Typical Application schematics
Updated Related Parts
19, 22
22
3706fd
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
21
LTC3706
TYPICAL APPLICATION
36V to 72V to 5V/20A Isolated Forward Converter
L1
1µH
L2
0.87µH
T1
5
+V
IN
+V
OUT
2.4Ω
9
7
510Ω
14W
3
CMPSH1-4
Si7336ADP
•
•
1.5nF
50V
4
2
V
SW
1.2Ω
1.0µF
4.42k
•
1/4W
1.0µF
100V
100V
×3
Si7450DP
Si7336ADP
1nF
200V
100µF
6.3V
×3
+
220µF
6.3V
0.002Ω
1W
0.022Ω
1W
VA
4.7µF
25V
2.2nF
250V
VA
–V
IN
–V
OUT
MMBZ5236B
7.5V
100Ω
330pF
1k 1/4W
100Ω 100Ω
2.2µF
3.01k
FCX491
100k
FDC2512
(SOT6)
330pF
–
+
365k
IS
IS
0.1µF
5.1k
1µF
T2
1
3, 4
+
+
1:2
V
FB/IN
PT
CC
LTC3706
FB
•
•
1µF
100Ω
UVLO LTC3725
SSFLT
604Ω
470pF
8
5, 6
–
–
FS/IN
PT
V
SW
470nF
10pF
RUN/SS
33nF
1N4148W
536Ω
100k
15.0k
33nF
124k 100k 6.2k
2.2nF
47pF
2N7002
220µF 6.3V SANYO 6TPE220MI
2.2nF 250V MURATA GA343QR7GD222KW01L
L1: VISHAY IHLP-2525CZER1R0M-01
L2: COOPER HC1-R87
3706 TA02
T1: PULSE PA0811 (4:4:2)
T2: PULSE PA0297 2(1.5mH):1:1
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
LTC3726/LTC3725
Isolated Synchronous No Opto-Forward Controller Chip Ideal for Medium Power 24V or 48V Input Applications
Set
LT1952/LT1952-1
Isolated Synchronous Forward Controllers
Ideal for Medium Power 24V or 48V Input Applications
High Efficiency with On-Chip MOSFET Drivers
LTC3723-1/LTC3723-2 Synchronous Push-Pull and Full-Bridge Controllers
LTC3721-1/LTC3721-2 Nonsynchronous Push-Pull and Full-Bridge Controllers Minimizes External Components, On-Chip MOSFET Drivers
LTC3722/LTC2722-2
LT3748
Synchronous Isolated Full-Bridge Controllers
100V No Opto-Flyback Controller
Ideal for High Power 24V or 48V Input Applications
5V ≤ V ≤ 100V, Boundary Mode Operation, MSOP-16 with Extra High
IN
Voltage Pin Spacing
LT3758
Boost, Flyback, SEPIC and Inverting Controller
5.5V ≤ V ≤ 100V, 100kHz to 1MHz Fixed Frequency,
3mm × 3mm DFN-10 and MSOP-10E Package
IN
LTC1871/LTC1871-1
LTC1871-7
Wide Input Range, No R
™ Low Quiescent Current 2.5V ≤ V ≤ 36V, Burst Mode® Operation at Light Load, MSOP-10
SENSE IN
Flyback, Boost and SEPIC Controller
LTC3803/LTC3803-3
LTC3803-5
Flyback DC/DC Controller with Fixed 200kHz or 300kHz
Operating Frequency
V
and V
Limited Only by External Components, 6-Pin ThinSOT™
IN
OUT
Package
LT3575
Isolated Flyback No Opto-Converter with 2.5A/60V
Power Switch
3V ≤ V ≤ 40V, Boundary Mode, Up to 14W, TSSOP-16 Package
IN
3706fd
LT 0711 REV D • PRINTED IN USA
22 LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
●
●
LINEAR TECHNOLOGY CORPORATION 2005
(408) 432-1900 FAX: (408) 434-0507 www.linear.com
相关型号:
![](http://pdffile.icpdf.com/pdf2/p00303/img/page/LTC3706IGN-P_1830120_files/LTC3706IGN-P_1830120_1.jpg)
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LTC3706IGN#PBF
LTC3706 - Secondary-Side Synchronous Forward Controller with Polyphase Capability; Package: SSOP; Pins: 24; Temperature Range: -40°C to 85°C
Linear
![](http://pdffile.icpdf.com/pdf2/p00283/img/page/LTC3706EGN-T_1689947_files/LTC3706EGN-T_1689947_1.jpg)
![](http://pdffile.icpdf.com/pdf2/p00283/img/page/LTC3706EGN-T_1689947_files/LTC3706EGN-T_1689947_2.jpg)
LTC3706IGN#TR
LTC3706 - Secondary-Side Synchronous Forward Controller with Polyphase Capability; Package: SSOP; Pins: 24; Temperature Range: -40°C to 85°C
Linear
![](http://pdffile.icpdf.com/pdf2/p00253/img/page/LTC3706IGN-T_1529487_files/LTC3706IGN-T_1529487_1.jpg)
![](http://pdffile.icpdf.com/pdf2/p00253/img/page/LTC3706IGN-T_1529487_files/LTC3706IGN-T_1529487_2.jpg)
LTC3706IGN#TRPBF
LTC3706 - Secondary-Side Synchronous Forward Controller with Polyphase Capability; Package: SSOP; Pins: 24; Temperature Range: -40°C to 85°C
Linear
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