LTC3783EDHD#TR [Linear]
LTC3783 - PWM LED Driver and Boost, Flyback and SEPIC Converter; Package: DFN; Pins: 16; Temperature Range: -40°C to 85°C;
| 型号： | LTC3783EDHD#TR |
| 厂家： | 
Linear |
| 描述： | LTC3783 - PWM LED Driver and Boost, Flyback and SEPIC Converter; Package: DFN; Pins: 16; Temperature Range: -40°C to 85°C 开关 光电二极管 |
| 文件： | 总24页 (文件大小：230K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LTC3783
PWM LED Driver and Boost,
Flyback and SEPIC Controller
DESCRIPTION
FEATURES
n
True Color PWMTM Delivers Constant Color with
The LTC®3783 is a current mode LED driver and boost,
flybackandSEPICcontrollerthatdrivesbothanN-channel
powerMOSFETandanN-channelloadPWMswitch.When
using an external load switch, the PWMIN input not only
drives PWMOUT, but also enables controller GATE switch-
ing and error amplifier operation, allowing the controller
to store load current information while PWMIN is low.
This feature (patent pending) provides extremely fast,
true PWM load switching with no transient overvoltage
or undervoltage issues; LED dimming ratios of 3000:1
can be achieved digitally, avoiding the color shift normally
associated with LED current dimming. The FBP pin allows
analog dimming of load current, further increasing the
effective dimming ratio by 100:1 over PWM alone.
3000:1 Dimming Ratio
n
Fully Integrated Load FET Driver for PWM Dimming
Control of High Power LEDs
n
100:1 Dimming from Analog Inputs
n
Wide FB Voltage Range: 0V to 1.23V
Constant Current or Constant Voltage Regulation
Low Shutdown Current: I = 20μA
1% 1.23V Internal Voltage Reference
2% RUN Pin Threshold with 100mV Hysteresis
Programmable Operating Frequency
(20kHz to 1MHz) with One External Resistor
n
n
Q
n
n
n
n
n
n
n
n
n
Synchronizable to an External Clock Up to 1.3f
Internal 7V Low Dropout Voltage Regulator
Programmable Output Overvoltage Protection
Programmable Soft-Start
OSC
Inapplicationswhereoutputloadcurrentmustbereturned
to V , optional constant current/constant voltage regula-
IN
Can be Used in a No R
TM Mode for V < 36V
SENSE
DS
tion controls either output (or input) current or output
16-Lead DFN and TSSOP Packages
voltage and provides a limit for the other. I provides a
LIM
10:1 analog dimming ratio.
APPLICATIONS
For low- to medium-power applications, No R
mode
SENSE
n
High Voltage LED Arrays
can utilize the power MOSFET’s on-resistance to eliminate
the current-sense resistor, thereby maximizing efficiency.
n
Telecom Power Supplies
n
42V Automotive Systems
n
24V Industrial Controls
The IC’s operating frequency can be set with an external
resistor over a 20kHz to 1MHz range and can be synchro-
nized to an external clock using the SYNC pin.
n
IP Phone Power Supplies
, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.
True Color PWM and No R
are trademarks of Linear Technology Corporation.
SENSE
The LTC3783 is available in the 16-lead DFN and TSSOP
packages.
All other trademarks are the property of their respective owners.
TYPICAL APPLICATION
350mA PWM LED Boost Application
Typical Waveforms
V
IN
6V TO 16V
F
10μF
s2
(< TOTAL V OF LEDs)
V
2.2μH
ZETEX ZLLS1000
PWMIN
5V/DIV
1M
V
OUT
<25V
LTC3783
RUN
PWMIN OV/FB
V
OUT
0.2V/DIV
AC COUPLED
237k
V
IN
LED*
STRING
I
PWMOUT
TH
SS
I
L
I
2.5A/DIV
LIM
105k
C
OUT
M1
M2
V
GATE
REF
10μF
0.1μF
10μF
FBP
FBN
FREQ
SYNC
SENSE
INTV
CC
GND
I
LED
0.5A/DIV
4.7μF
10k
6k
0.05Ω 12.4k
0.3Ω
3783 TA01b
1μs/DIV
GND
3783 TA01a
M1, M2: SILICONIX Si4470EY *LUMILEDS LHXL-BW02
3783fb
1
LTC3783
(Note 1)
ABSOLUTE MAXIMUM RATINGS
V , SENSE, FBP, FBN Voltages ................. –0.3V to 42V
Operating Temperature Range (Note 2)
IN
INTV Voltage............................................ –0.3V to 9V
LTC3783E............................................. –40°C to 85°C
LTC3783I............................................ –40°C to 125°C
Junction Temperature (Note 3) ............ –40°C to 125°C
Storage Temperature Range
CC
INTV Output Current.......................................... 75mA
CC
GATE Output Current................................. 50mA (RMS)
PWMOUT Output Current.......................... 25mA (RMS)
V
Ouput Current................................................. 1mA
DFN Package..................................... –65°C to 125°C
TSSOP Package................................ –65°C to 150°C
Lead Temperature (Soldering, 10sec)
REF
GATE, PWMOUT Voltages .......–0.3V to (V
+ 0.3V)
INTVCC
I , I , SS Voltages............................... –0.3V to 2.7V
TH LIM
RUN, SYNC, PWMIN Voltages..................... –0.3V to 7V
TSSOP Package............................................... 300°C
FREQ, V , OV/FB Voltages...................... –0.3V to 1.5V
REF
PIN CONFIGURATION
TOP VIEW
TOP VIEW
FBN
FBP
1
2
3
4
5
6
7
8
16 RUN
15
FBN
FBP
1
2
3
4
5
6
7
8
16 RUN
I
TH
15
14
13
12
11
10
9
I
TH
I
14 OV/FB
13 SS
I
OV/FB
SS
LIM
LIM
V
REF
V
REF
17
17
FREQ
12 SENSE
FREQ
SENSE
SYNC
PWMIN
11
V
IN
SYNC
PWMIN
V
IN
10 INTV
INTV
CC
CC
PWMOUT
9
GATE
PWMOUT
GATE
FE PACKAGE
16-LEAD PLASTIC TSSOP
DHD PACKAGE
16-LEAD (5mm s 4mm) PLASTIC DFN
T
= 125°C, θ = 38°C/W
T
= 125°C, θ = 43°C/W
JA
JMAX
JA
JMAX
EXPOSED PAD (PIN 17) IS GND, MUST BE SOLDERED TO PCB
EXPOSED PAD (PIN 17) IS GND, MUST BE SOLDERED TO PCB
ORDER INFORMATION
LEAD FREE FINISH
LTC3783EDHD#PBF
LTC3783IDHD#PBF
LTC3783EFE#PBF
LTC3783IFE#PBF
TAPE AND REEL
PART MARKING*
3783
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LTC3783EDHD#TRPBF
LTC3783IDHD#TRPBF
LTC3783EFE#TRPBF
LTC3783IFE#TRPBF
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
16-Lead (5mm × 4mm) Plastic DFN
16-Lead (5mm × 4mm) Plastic DFN
16-Lead Plastic TSSOP
3783
3783EFE
3783IFE
16-Lead Plastic TSSOP
LEAD BASED FINISH
LTC3783EDHD
LTC3783IDHD
LTC3783EFE
TAPE AND REEL
LTC3783EDHD#TR
LTC3783IDHD#TR
LTC3783EFE#TR
LTC3783IFE#TR
PART MARKING*
3783
PACKAGE DESCRIPTION
TEMPERATURE RANGE
–40°C to 85°C
16-Lead (5mm × 4mm) Plastic DFN
16-Lead (5mm × 4mm) Plastic DFN
16-Lead Plastic TSSOP
3783
–40°C to 125°C
–40°C to 85°C
3783IFE
3783IFE
LTC3783IFE
16-Lead Plastic TSSOP
–40°C to 125°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
3783fb
2
LTC3783
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating temperature
range, otherwise specifications are TA = 25°C. VIN = 12V, VRUN = 1.5V, VSYNC = 0V, VFBP = VREF, RT = 20k, unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Main Control Loop/Whole System
V
IN
Input Voltage Range
3
36
V
I
Input Voltage Supply Current
Continuous Mode
Shutdown Mode
(Note 4)
OV/FB
Q
V
V
= 1.5V, V = 0.75V
1.5
20
mA
μA
ITH
= 0V
RUN
+
–
V
V
V
Rising RUN Input Threshold Voltage
Falling RUN Input Threshold Voltage
RUN Pin Input Threshold Hysteresis
RUN Pin Input Current
1.348
1.248
100
5
V
V
RUN
RUN
1.223
125
1.273
180
mV
nA
mV
μA
μA
μA
RUN(HYST)
RUN
I
V
Maximum Current Sense Threshold
SENSE Pin Current (GATE High)
SENSE Pin Current (GATE Low)
Soft-Start Pin Output Current
150
70
SENSE(MAX)
SENSE(ON)
SENSE(OFF)
SS
I
I
I
V
V
V
= 0V
SENSE
= 36V
0.2
SENSE
= 0V
-50
SS
Voltage/Temperature Reference
V
Reference Voltage
1.218
1.212
1.230
1.242
1.248
V
V
REF
l
I
Max Reference Pin Output Current
Reference Voltage Line Regulation
Reference Voltage Load Regulation
Overtemperature SD Threshold Rising
Overtemperature Hysteresis
0.5
mA
%/V
%/mA
°C
REF
3V ≤ V ≤ 36V
0.002
0.2
0.02
1.0
ΔV /ΔV
IN
REF
IN
0mA ≤ I ≤ 0.5mA
ΔV /ΔI
REF
REF REF
T
165
25
MAX
HYST
T
°C
Error Amplifier
I
OV/FB Pin Input Current
18
7
60
nA
%
V
OV/FB
OV/FB Overvoltage Lockout Threshold
OV/FB Pin Regulation Voltage
Error Amplifier Input Current
V
– V
in %, V ≤ V
OV/FB(NOM) FBP REF
ΔV
OV/FB(OV)
OV/FB(OV)
V
2.5V < V < 36V
1.212
–3
1.230
1.248
OV/FB(FB)
FBP
I
, I
FBP FBN
0V ≤ V ≤ V
REF
2.5V < V < 36V
–0.4
50
μA
μA
FBP
FBP
V
– V
Error Amplifier Offset Voltage
(Note 5)
0V ≤ V ≤ V
REF
3
mV
mV
mV
FBP
FBN
FBP
2.5V < V ≤ 36V (V
= V )
REF
100
10
FBP
FBP
ILIM
ILIM
2.5V < V ≤ 36V (V
= 0.123V)
g
Error Amplifier Transconductance
Error Amplifier Open-Loop Gain
V
≤ V
1.7
14
mmho
mmho
m
FBP
REF
2.5V < V < 36V
FBP
A
500
V/V
VOL
Oscillator
f
Oscillator Frequency
Oscillator Frequency Range
R
FREQ
= 20kΩ
250
20
300
350
1000
kHz
kHz
OSC
D
Maximum Duty Cycle
85
90
1.25
25
97
%
MAX
f
t
t
/f
Recommended Max SYNC Freq Ratio
SYNC Minimum Input Pulse Width
SYNC Maximum Input Pulse Width
SYNC Input Voltage High Level
SYNC Input Voltage Hysteresis
f
= 300kHz (Note 6)
1.3
SYNC OSC
SYNC(MIN)
SYNC(MAX)
OSC
V
= 0V to 5V
= 0V to 5V
ns
ns
V
SYNC
SYNC
V
0.8/f
OSC
V
1.2
IH(SYNC)
V
0.5
V
HYST(SYNC)
3783fb
3
LTC3783
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating temperature
range, otherwise specifications are TA = 25°C. VIN = 12V, VRUN = 1.5V, VSYNC = 0V, VFBP = VREF, RT = 20k, unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
R
SYNC Input Pull-Down Resistance
Minimum On-Time
100
kΩ
SYNC
t
With Sense Resistor, 10mV Overdrive
170
300
ns
ns
ON(MIN)
No R
Mode
SENSE
Low Dropout Regulator
INTV Regulator Output Voltage
l
V
V = 1.5V
OV/FB
6.5
1.8
7
7.5
2.5
V
INTVCC
CC
UVLO
INTV Undervoltage Lockout
Rising INTV
2.3
2.1
0.2
V
V
V
CC
CC
Thresholds
Falling INTV
Hysteresis
CC
INTV Line Regulation
12V ≤ V ≤ 36V
2
6
mV/V
ΔV
CC
IN
INTVCC
IN
ΔV
INTV Load Regulation
0 ≤ I
≤ 10mA
INTVCC
–1
–0.1
300
%
ΔV
CC
LDO(LOAD)
DROPOUT
V
INTV Dropout Voltage
V
= 7V, I = 10mA
INTVCC
500
mV
CC
IN
I
Bootstrap Mode INTV Supply
V
SENSE
V
SENSE
= 0V
= 7V
25
15
μA
μA
INTVCC(SD)
CC
Current in Shutdown
GATE/PWMOUT Drivers
t
t
I
I
GATE Driver Output Rise Time
C = 3300pF (Note 7)
15
8
ns
ns
A
r(GATE)
L
GATE Driver Output Fall Time
C = 3300pF (Note 7)
L
f(GATE)
GATE Driver Peak Current Sourcing
GATE Driver Peak Current Sinking
PWMIN Pin Input Threshold Voltages
V
GATE
V
GATE
= 0V
= 7V
0.5
1
PK(GATE,RISE)
PK(GATE,FALL)
A
V
Rising PWMIN
Falling PWMIN
Hysteresis
1.6
0.8
0.8
V
V
V
PWMIN
R
PWMIN Input Pull-Up Resistance
PWMOUT Driver Output Rise Time
PWMOUT Driver Output Fall Time
PWMOUT Driver Peak Current Sourcing
PWMOUT Driver Peak Current Sinking
100
30
kΩ
ns
ns
A
PWMIN
t
t
I
I
C = 3300pF (Note 7)
L
r(PWMOUT)
C = 3300pF (Note 7)
L
16
f(PWMOUT)
V
V
= 0V
= 7V
0.25
0.50
PK(PWMOUT,RISE)
PK(PWMOUT,FALL)
PWMOUT
PWMOUT
A
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 4: The dynamic input supply current is higher due to power MOSFET
gate charging (Q • f ). See Operation section.
G
OSC
Note 5: The LTC3783 is tested in a feedback loop which servos V
to
FBN
V
FBP
= V with the I pin forced to the midpoint of its voltage range
VREF TH
Note 2: The LTC3783E is guaranteed to meet performance specifications
over the 0°C to 85°C operating temperature range. Specifications over
the –40°C to 85°C operating temperature range are assured by design,
characterization and correlation with statistical process controls. The
LTC3783I is guaranteed to meet performance specifications over the full
–40°C to 125°C operating temperature range.
(0.3V ≤ V ≤ 1.2V; midpoint = 0.75V).
ITH
Note 6: In a synchronized application, the internal slope compensation is
increased by 25%. Synchronizing to a significantly higher ratio will reduce
the effective amount of slope compensation, which could result in sub-
harmonic oscillation for duty cycles greater than 50%
Note 7: Rise and fall times are measured at 10% and 90% levels.
Note 3: T is calculated from the ambient temperature T and power
J
A
dissipation P according to the following formula:
D
T = T + (P • 43°C/W) for the DFN
J
A
D
T = T + (P • 38°C/W) for the TSSOP
J
A
D
3783fb
4
LTC3783
TA = 25°C unless otherwise specified
TYPICAL PERFORMANCE CHARACTERISTICS
VREF vs Temperature
VREF Line Regulation
VREF Load Regulation
1.25
1.20
1.15
1.10
1.05
1.00
1.235
1.233
1.231
1.229
1.227
1.225
1.235
1.233
1.231
1.229
1.227
1.225
V
IN
= 12V
V
IN
= 2.5V
0
10
20
(V)
30
0
1
3
4
5
–50
0
50
100
150
40
2
V
I
(mA)
REF
TEMPERATURE (°C)
IN
3783 G02
3783 G03
3783 G01
IQ vs Temperature (PWMIN Low)
IQ vs VIN (PWMIN Low)
Dynamic IQ vs Frequency
30
25
20
15
10
5
1.6
1.4
1.2
1.0
2.0
1.9
1.8
1.7
1.6
1.5
1.4
1.3
1.2
1.1
0
C
= 3300pF
L
I
= 1.3mA + Q • f
Q(TOT)
G
0.8
0.6
0.4
0.2
0
0
–25
25
TEMPERATURE (°C)
125
–75
175
0
0.5
1
1.5
75
0
40
50
10
20
30
FREQUENCY (MHz)
V
IN
(V)
3783 G04
3783 G06
3783 G05
RUN Thresholds vs VIN
RUN Thresholds vs Temperature
RT vs Frequency
1.6
1.5
1.4
1.3
1.2
1.1
1.0
0.9
0.8
0.7
0.6
1000
100
10
1.40
1.38
1.36
1.34
1.32
1.30
1.28
1.26
1.24
1.22
RUN HIGH
RUN HIGH
RUN LOW
RUN LOW
1
50
0
10
20
(V)
30
40
–50
0
100
150
1
10
100
FREQUENCY (kHz)
1000
10000
V
TEMPERATURE (°C)
IN
3783 G09
3783 G07
3783 G08
3783fb
5
LTC3783
TA = 25°C unless otherwise specified
TYPICAL PERFORMANCE CHARACTERISTICS
Frequency vs Temperature
Maximum VSENSE vs Temperature
ISENSE vs Temperature
350
340
330
320
310
300
290
280
270
260
250
75
74
73
72
71
70
69
68
67
66
65
160
158
156
154
152
150
148
146
144
142
140
–50
0
50
100
150
–50
0
50
100
150
–50
0
50
100
150
TEMPERATURE (°C)
TEMPERATURE (°C)
TEMPERATURE (°C)
3783 G11
3783 G10
3783 G12
INTVCC Load Regulation
Over Temperature
INTVCC Load Regulation
INTVCC Line Regulation
7.05
7.00
6.95
6.90
6.85
6.80
6.75
6.70
6.65
6.60
6.55
7.0
6.8
7.00
6.95
6.90
6.85
6.80
6.75
6.70
6.55
6.50
–50°C, –25°C, 0°C
25°C
75°C
6.6
6.4
6.2
50°C
100°C
125°C
150°C
6.0
5.8
5.6
5.4
5.2
5.0
0
10
20
30
(V)
40
50
0
100
(mA)
150
0
0.02 0.04 0.06 0.08 0.10 0.12 0.14 0.16
(mA)
50
I
I
INTVCC
V
IN
INTVCC
3783 G14
3783 G15
3783 G13
INTVCC Line Regulation
vs Temperature
ISS Soft-Start Current
vs Temperature
Gate Rise/Fall Time
vs Capacitance
50.0
49.8
49.6
49.4
49.2
49.0
48.8
48.6
48.4
48.2
48.0
47.8
7.20
7.15
80
70
60
50
40
30
20
10
0
150°C
7.10
7.05
25°C
GATE TR
–50°C
7.00
6.95
6.90
GATE TF
10
CAPACITANCE (nF)
–50
0
50
100
150
0
5
15
20
5
10
15
20
25
(V)
30
35
40
TEMPERATURE (°C)
V
IN
3783 G17
3783 G18
3783 G16
3783fb
6
LTC3783
PIN FUNCTIONS
FBN (Pin 1): Error Amplifier Inverting Input/Negative Cur-
rent Sense Pin. In voltage mode (V
PWMIN (Pin 7): PWM Gate Driver Input. Internal 100k
≤ V
), this pin
pull-up resistor. While PWMIN is low, PWMOUT is low,
FBP
VREF
senses feedback voltage from either the external resistor
divider across V for output voltage regulation, or the
GATE stops switching and the external I network is
TH
disconnected, saving the I state.
OUT
TH
grounded sense resistor under the load for output current
PWMOUT (Pin 8): PWM Gate Driver Output. Used for con-
stantcurrentdimming(LEDload)orforoutputdisconnect
(step-up power supply).
regulation. In constant current/constant voltage mode
(V > 2.5V), connect this pin to the negative side of the
FBP
current-regulating resistor. Nominal voltage for this pin in
GATE (Pin 9): Main Gate Driver Output for the Boost
Converter.
regulationiseitherV or(V –100mV)forV = 1.23V,
FBP
FBP
ILIM
depending on operational mode (voltage or constant cur-
rent/constant voltage) set by the voltage at V
.
FBP
INTV (Pin 10): Internal 7V Regulator Output. The main
CC
and PWM gate drivers and control circuits are powered
fromthisvoltage.DecouplethispinlocallytotheICground
with a minimum of 4.7μF low ESR ceramic capacitor.
FBP (Pin 2): Error Amplifier Noninverting Input/Positive
CurrentSensePin. Thispinvoltagedeterminesthecontrol
loop’sfeedbackmode(voltageorconstantcurrent/constant
voltage), the threshold of which is approximately 2V. In
V (Pin 11): Main Supply Pin. Must be closely decoupled
IN
voltagemode(V ≤V ),thispinrepresentsthedesired
FBP
REF
to ground.
voltage which the regulated loop will cause FBN to follow.
SENSE(Pin12):CurrentSenseInputfortheControlLoop.
In constant current/constant voltage mode (V > 2.5V),
FBP
Connect this pin to the drain of the main power MOSFET
connect this pin to the positive side of the load current-
sensing resistor. The acceptable input ranges for this pin
are 0V to 1.23V (voltage mode) and 2.5V to 36V (constant
current/constant voltage mode).
for V sensing and highest efficiency for V
≤ 36V.
DS
SENSE
Alternatively,theSENSEpinmaybeconnectedtoaresistor
in the source of the main power MOSFET. Internal leading-
edge blanking is provided for both sensing methods.
I
(Pin 3): Current Limit Pin. Sets current sense resis-
LIM
SS(Pin13):Soft-StartPin.Providesa50μApull-upcurrent,
enabledandresetbyRUN,whichchargesanoptionalexternal
capacitor.Thisvoltageramptranslatesintoacorresponding
current limit ramp through the main MOSFET.
tor offset voltage (V – V ) in constant current mode
FBP
FBN
regulation(i.e.,whenV >2.5V).Offsetvoltageis100mV
FBP
whenV
=1.23VanddecreasesproportionallywithV
.
ILIM
ILIM
Nominal voltage range for this pin is 0.1V to 1.23V.
OV/FB (Pin 14): Overvoltage Pin/Voltage Feedback Pin.
V
(PIN 4): Reference Voltage Pin. Provides a buffered
REF
In voltage mode (V
≤ V ), this input, connected to
FBP
REF
version of the internal bandgap voltage, which can be
connected to FBP either directly or with attenuation.
Nominal voltage for this pin is 1.23V. This pin should
never be bypassed by a capacitor to GND. Instead, a 10k
resistor to GND should be used to lower pin impedance
in noisy systems.
V
OUT
through a resistor network, sets the output voltage
at which GATE switching is disabled in order to prevent
an overvoltage situation. Nominal threshold voltage for
the OV pin is 1.32V (V + 7%) with 20mV hysteresis. In
REF
current/voltage mode (V > 2.5V), this pin senses V
FBP
OUT
through a resistor divider and brings the loop into voltage
FREQ (Pin 5): A resistor from the FREQ pin to ground
programstheoperatingfrequencyofthechip.Thenominal
voltage at the FREQ pin is 0.615V.
regulation such that pin voltage approaches V = 1.23V,
REF
provided the loop is not regulating the load current (e.g.,
[V – V ] < 100mV for I = 1.23V).
FBP
FBN
LIM
SYNC (Pin 6): This input allows for synchronizing the op-
erating frequency to an external clock and has an internal
100k pull-down resistor.
3783fb
7
LTC3783
PIN FUNCTIONS
I
(Pin 15): Error Amplifier Output/Compensation Pin. The
RUNpinthresholdisnominally1.248Vandthecomparator
has 100mV hysteresis for noise immunity. When the RUN
TH
currentcomparatorinputthresholdincreaseswiththiscontrol
voltage, which is the output of the g type error amplifier.
pin is grounded, the IC is shut down and the V supply
m
IN
Nominal voltage range for this pin is 0V to 1.40V.
current is kept to a low value (20μA typ).
RUN (Pin 16): The RUN pin provides the user with an ac-
curate means for sensing the input voltage and program-
ming the start-up threshold for the converter. The falling
Exposed Pad (Pin 17): Ground Pin. Solder to PCB ground
for electrical contact and rated thermal performance.
BLOCK DIAGRAM
V
REF
4
SLOPE
COMP
BIAS
V
REF
GND
17
FREQ
SYNC
5
6
CLK
V-TO-I
OSC
S
R
SS_RESET
0.615V
Q
GATE
LOGIC
9
1.9V
IVMODE
–
+
TEMP
SENSOR
(165°C)
OT
OV/FB
+
–
OV
I
LIM
SENSE
V
3
REF
EA
+
–
12
ITRIP
FBP
FBN
2
1
A
–
–
+
1
0
S
0.2V
+
–
SLEEP
V
REF
OV/FB
14
+
–
50mA
SS
13
15
+
–
IMAX
0.15V
I
TH
V-TO-I
PWMIN
PWMOUT
RUN
8
7
EN
INTV
CC
LDO
10
V
REF
2.23V
+
–
+
–
16
11
UV
BIAS AND
START-UP
V
REF
V
IN
3738 BD
3783fb
8
LTC3783
OPERATION
Main Control Loop
Forconstantcurrent/constantvoltageregulationoperation
(definedbyV >2.5V), pleaserefertotheBlockDiagram
FBP
The LTC3783 is a constant frequency, current mode con-
troller for PWM LED as well as DC/DC boost, SEPIC and
flyback converter applications. In constant current LED
applications,theLTC3783providesanespeciallywidePWM
dimmingrangeduetoitsuniqueswitchingscheme, which
allows PWM pulse widths as short as several converter
switching periods.
of the IC and Figure 11. Loop operation is similar to the
voltage feedback, except FBP and FBN now sense the
voltage across sense resistor R in series with the load.
L
The I pin now represents the error from the desired dif-
TH
ferential set voltage, from 10mV to 100mV, for I values
LIM
of 0.123V to 1.23V. That is, with V
= 1.23V, the loop
ILIM
will regulate such that V – V = 100mV; lower values
FBP
FBN
For voltage feedback circuit operation (defined by V
≤
of I attenuate the difference proportionally. PWMIN is
FBP
LIM
1.23V), please refer to the Block Diagram of the IC and the
Typical Application on the first page of this data sheet. In
normal operation with PWMIN high, the power MOSFET
is turned on (GATE goes high) when the oscillator sets
the PWM latch, and is turned off when the ITRIP current
comparator resets the latch. Based on the error voltage
still functional as above, but will only work properly if load
current can be disconnected by the PWMOUT signal.
In constant current/constant voltage operation, the OV/FB
pinbecomesavoltagefeedbackpin,whichcausestheloop
to regulate such that V
= 1.23V, provided the above
OV/FB
current-sense voltage is not reached. In this way, the loop
regulates either voltage or current, whichever parameter
hits its preset limit first.
represented by (V
– V ), the error amplifier output
FBP
FBN
signalattheI pinsetstheITRIPcurrentcomparatorinput
TH
threshold. When the load current increases, a fall in the
FBNvoltagerelativetothereferencevoltageatFBPcauses
The nominal operating frequency of the LTC3783 is pro-
grammed using a resistor from the FREQ pin to ground
and can be controlled over a 20kHz to 1MHz range. In
addition, the internal oscillator can be synchronized to an
external clock applied to the SYNC pin and can be locked
to a frequency between 100% and 130% of its nominal
value. When the SYNC pin is left open, it is pulled low by
an internal 100k resistor. With no load, or an extremely
lightone,thecontrollerwillskippulsesinordertomaintain
regulation and prevent excessive output ripple.
the I pin to rise, causing the ITRIP current comparator
TH
to trip at a higher peak inductor current value. The average
inductor current will therefore rise until it equals the load
current, thereby maintaining output regulation.
WhenPWMINgoeslow,PWMOUTgoeslow,theI switch
TH
opensandGATEswitchingisdisabled.LoweringPWMOUT
and disabling GATE causes the output capacitor C
to
OUT
hold the output voltage constant in the absence of load
current. Opening the I switch stores the correct load
TH
TH
current value on the I capacitor C . As a result, when
PWMIN goes high again, both I and V
at the appropriate levels.
The RUN pin controls whether the IC is enabled or is in a
low current shutdown state. A micropower 1.248V refer-
ence and RUN comparator allow the user to program the
supply voltage at which the IC turns on and off (the RUN
comparatorhas100mVofhysteresisfornoiseimmunity).
With the RUN pin below 1.248V, the chip is off and the
input supply current is typically only 20μA.
ITH
are instantly
TH
OUT
In voltage feedback operation, an overvoltage compara-
tor, OV, senses when the OV/FB pin exceeds the reference
voltage by 7% and provides a reset pulse to the main RS
latch. Because this RS latch is reset-dominant, the power
MOSFET is actively held off for the duration of an output
overvoltage condition.
3783fb
9
LTC3783
OPERATION
The SS pin provides a soft-start current to charge an
2V TO 7V
external capacitor. Enabled by RUN, the soft-start current
MODE/
SYNC
is 50μA, which creates a positive voltage ramp on V
SS
t
= 25ns
MIN
to which the internal I is limited, avoiding high peak
TH
0.8T
T
T = 1/f
O
currents on start-up. Once V reaches 1.23V, the full I
SS
TH
range is established.
GATE
D = 40%
The LTC3783 can be used either by sensing the voltage
drop across the power MOSFET or by connecting the
SENSE pin to a conventional shunt resistor in the source
of the power MOSFET, as shown in the Typical Application
on the first page of this data sheet. Sensing the voltage
acrossthepowerMOSFETmaximizesconverterefficiency
and minimizes the component count, but limits the out-
put voltage to the maximum rating for this pin (36V). By
connecting the SENSE pin to a resistor in the source of
the power MOSFET, the user is able to program output
voltages significantly greater than 36V, limited only by
other components’ breakdown voltages.
I
L
3783 F01
Figure 1. MODE/SYNC Clock Input and Switching Waveforms
for Synchronized Operation
frequency operation requires more inductance for a given
amount of load current.
The LTC3783 uses a constant frequency architecture that
can be programmed over a 20kHz to 1MHz range with
a single external resistor from the FREQ pin to ground,
as shown in the application on the first page of this data
sheet. The nominal voltage on the FREQ pin is 0.615V,
and the current that flows out of the FREQ pin is used to
charge and discharge an internal oscillator capacitor. The
Externally Synchronized Operation
When an external clock signal drives the SYNC pin at a
rate faster than the chip’s internal oscillator, the oscillator
will synchronize to it. When the oscillator’s internal logic
circuitry detects a synchronizing signal on the SYNC pin,
the internal oscillator ramp is terminated early and the
slope compensation is increased by approximately 25%.
As a result, in applications requiring synchronization, it
is recommended that the nominal operating frequency of
the IC be programmed to be about 80% of the external
clock frequency. Attempting to synchronize to too high
oscillator frequency is trimmed to 300kHz with R = 20k.
T
A graph for selecting the value of R for a given operating
T
frequency is shown in Figure 2.
an external frequency (above 1.3f ) can result in inad-
OSC
1000
equate slope compensation and possible subharmonic
oscillation (or jitter).
100
10
1
The external clock signal must exceed 2V for at least 25ns,
and should have a maximum duty cycle of 80%, as shown
in Figure 1. The MOSFET turn-on will synchronize to the
rising edge of the external clock signal.
Programming the Operating Frequency
The choice of operating frequency and inductor value is
a tradeoff between efficiency and component size. Low
frequency operation improves efficiency by reducing
MOSFET and diode switching losses. However, lower
1
10
100
1000
10000
FREQUENCY (kHz)
3783 G09
Figure 2. Timing Resistor (RT) Value
3783fb
10
LTC3783
OPERATION
INTV Regulator Bypassing and Operation
In an actual application, most of the IC supply current is
used to drive the gate capacitance of the power MOSFET.
As a result, high input voltage applications in which a
large power MOSFET is being driven at high frequencies
can cause the LTC3783 to exceed its maximum junction
temperature rating. The junction temperature can be
estimated using the following equations:
CC
An internal, P-channel low dropout voltage regulator pro-
duces the 7V supply which powers the gate drivers and
logic circuitry within the LTC3783 as shown in Figure 3.
The INTV regulator can supply up to 50mA and must be
CC
bypassed to ground immediately adjacent to the IC pins
with a minimum of 4.7μF low ESR or ceramic capacitor.
Good bypassing is necessary to supply the high transient
currents required by the MOSFET gate driver.
I
= I + f • Q
Q G
Q(TOT)
P = V • (I + f • Q )
IC
IN
Q
G
For input voltages that don’t exceed 8V (the absolute
T = T + P • θ
JA
J
A
IC
maximumratingforINTV is9V),theinternallowdropout
CC
The total quiescent current I
consists of the static
regulator in the LTC3783 is redundant and the INTV pin
Q(TOT)
CC
supply current (I ) and the current required to charge and
can be shorted directly to the V pin. With the INTV
Q
IN
CC
discharge the gate of the power MOSFET. The 16-lead FE
pin shorted to V , however, the divider that programs the
IN
package has a thermal resistance of θ = 38°C/W and
regulatedINTV voltagewilldraw15μAfromtheinputsup-
JA
CC
the DHD package has an θ = 43°C/W
ply, even in shutdown mode. For applications that require
JA
the lowest shutdown mode input supply current, do not
As an example, consider a power supply with V = 12V
IN
connect the INTV pin to V . Regardless of whether the
CC
IN
and V
= 25V at I
= 1A. The switching frequency is
OUT
OUT
INTV pin is shorted to V or not, it is always necessary
CC
IN
300kHz, and the maximum ambient temperature is 70°C.
The power MOSFET chosen is the Si7884DP, which has a
to have the driver circuitry bypassed with a 4.7μF low ESR
ceramic capacitor to ground immediately adjacent to the
maximum R
of 10mΩ (at room temperature) and
DS(ON)
INTV and GND pins.
CC
INPUT
SUPPLY
6V TO 36V
V
IN
–
+
1.230V
R2
P-CH
7V
C
IN
R1
INTV
CC
C
4.7μF
X5R
VCC
6V-RATED
POWER
MOSFET
GATE
GND
LOGIC
DRIVER
M1
GND
PLACE AS CLOSE AS
POSSIBLE TO DEVICE PINS
3783 F03
Figure 3. Bypassing the LDO Regulator and Gate Driver Supply
3783fb
11
LTC3783
OPERATION
a maximum total gate charge of 35nC (the temperature
coefficient of the gate charge is low).
A similar analysis applies to the V
resistive divider, if
FBP
one is used:
I
= 1.2mA + 35nC • 300kHz = 12mA
Q(TOT)
R3
R3+R4
VFBP = VREF
•
P = 12V • 12mA = 144mW
IC
T = 70°C + 110°C/W • 144mW = 86°C
J
where R3 is subject to a similar 500nA bias current.
Thisdemonstrateshowsignificantthegatechargecurrent
can be when compared to the static quiescent current in
the IC.
V
IN
3V TO 36V
LTC3783
RUN
PWMIN OV/FB
V
IN
To prevent the maximum junction temperature from being
exceeded, the input supply current must be checked when
I
SS
V
FBP
FBN
FREQ
SYNC
PWMOUT
V
TH
OUT
I
R2
R1
LIM
R4
GATE
SENSE
INTV
CC
GND
REF
operating in a continuous mode at high V . A tradeoff
IN
between the operating frequency and the size of the power
MOSFET may need to be made in order to maintain a reli-
able IC junction temperature. Prior to lowering the operat-
ing frequency, however, be sure to check with the power
R3
GND
3783 F04
MOSFET manufacturers for the latest low Q , low R
G
DS(ON)
Figure 4. LTC3783 Boost Application
devices. Power MOSFET manufacturing technologies are
continually improving, with newer and better-performing
devices being introduced almost monthly.
Programming Turn-On and Turn-Off Thresholds
with the RUN Pin
Output Voltage Programming
TheLTC3783containsanindependent,micropowervoltage
reference and comparator detection circuit that remains
active even when the device is shut down, as shown in
Figure 5. This allows users to accurately program an input
voltage at which the converter will turn on and off. The
falling threshold on the RUN pin is equal to the internal
reference voltage of 1.248V. The comparator has 100mV
of hysteresis to increase noise immunity.
In constant voltage mode, in order to regulate the output
voltage, the output voltage is set by a resistor divider ac-
cording to the following formula:
R2
R1
⎛
⎝
⎞
VOUT = VFBP • 1+
⎜
⎟
⎠
where 0 ≤ V
≤ 1.23V. The external resistor divider is
FBP
The turn-on and turn-off input voltage thresholds are
programed using a resistor divider according to the fol-
lowing formulas:
connected to the output as shown in Figure 4, allowing
remote voltage sensing. The resistors R1 and R2 are
typically chosen so that the error caused by the 500nA
input bias current flowing out of the FBN pin during
normal operation is less than 1%, which translates to
R2
R1
⎛
⎝
⎞
VIN(OFF)=1.248V • 1+
⎜
⎟
⎠
a maximum R1 value of about 25k at V
lower FBP voltages, R1 must be reduced accordingly to
maintain accuracy, e.g., R1 < 2k for 1% accuracy when
= 1.23V. For
FBP
R2
R1
⎛
⎝
⎞
⎠
VIN(ON)=1.348V • 1+
⎜
⎟
V
= 100mV. More accuracy can be achieved with lower
FBP
The resistor R1 is typically chosen to be less than 1M.
resistances, at the expense of increased dissipation and
decreased light load efficiency.
3783fb
12
LTC3783
OPERATION
For applications where the RUN pin is only to be used as
a logic input, the user should be aware of the 7V Absolute
Maximum Rating for this pin! The RUN pin can be con-
nectedtotheinputvoltagethroughanexternal1Mresistor,
as shown in Figure 5c, for “always on” operation.
assuming 50% ripple current, where R
DS(ON)/SENSE
represents either the R
of the switching MOSFET
DS(ON)
or R
, whichever is used on the SENSE pin. Dimming
SENSE
ratio is described by 1/D
as shown in Figure 6.
PWM
Application Circuits
Soft-Start Capacitor Selection
AbasicLTC3783PWM-dimmingLEDapplicationisshown
on the first page of this data sheet.
For proper soft-start operation, the LTC3783 should have
a sufficiently large soft-start capacitor, C , attached to
the SS pin. The minimum soft-start capacitor size can be
estimated on the basis of output voltage, capacitor size
and load current. In addition, PWM operation reduces the
effective SS capacitor value by the dimming ratio.
SS
Operating Frequency and PWM Dimming Ratio
Theminimumoperatingfrequency,f ,requiredforproper
OSC
operation of a PWM dimming application depends on the
minimumPWMfrequency,f
,thedimmingratio1/D
,
PWM
PWM
and N, the number of f
cycles per PWM cycle:
OSC
2•dimming ratio•50μA •COUT • VOUT •RDS(ON)/SENSE
CSS(MIN)
>
N• fPWM
DPWM
150mV •1.2V
fOSC
>
V
IN
+
R2
R1
RUN
COMPARATOR
RUN
+
–
BIAS AND
START-UP
CONTROL
6V
INPUT
SUPPLY
OPTIONAL
FILTER
CAPACITOR
1.248V
μPOWER
REFERENCE
GND
–
3783 F05a
Figure 5a. Programming the Turn-On and Turn-Off Thresholds Using the RUN Pin
V
IN
+
R2
1M
RUN
RUN
GND
COMPARATOR
+
–
RUN
COMPARATOR
6V
INPUT
SUPPLY
RUN
+
–
3483 F05c
6V
1.248V
EXTERNAL
LOGIC CONTROL
1.248V
–
3483 F05b
Figure 5b. On/Off Control Using External Logic
Figure 5c. External Pull-Up Resistor on
RUN Pin for “Always On” Operation
3783fb
13
LTC3783
OPERATION
Figure 6 illustrates these various quantities in relation to
one another.
the output current needs to be reflected back to the input
in order to dimension the power MOSFET properly. Based
on the fact that, ideally, the output power is equal to the
input power, the maximum average input current is:
IOUT(MAX)
Typically, in order to avoid visible flicker, f
should be
PWM
greater than 120Hz. Assuming inductor and capacitor
sizing which is close to discontinuous operation, 2 f
OSC
IIN(MAX)
=
cycles are sufficient for proper PWM operation. Thus,
1–DMAX
within the 1MHz rated maximum f , a dimming ratio
OSC
The peak input current is:
of 1/D
= 3000 is possible.
PWM
IOUT(MAX)
χ
2
⎛
⎝
⎞
IIN(PEAK) = 1+
•
⎜
⎟
⎠
1/f
PWM
1–DMAX
D
/f
PWM PWM
PWMIN
GATE
The maximum duty cycle, D
, should be calculated at
MAX
# = N
minimum V .
IN
3783 F06
χ
1/f
OSC
Boost Converter: Ripple Current ΔI and the ‘ ’ Factor
L
χ
Figure 6. PWM Dimming Parameters
The constant ‘ ’ in the equation above represents the
percentage peak-to-peak ripple current in the inductor,
relative to its maximum value. For example, if 30% ripple
Boost Converter: Duty Cycle Considerations
χ
current is chosen, then = 0.3, and the peak current is
Foraboostconverteroperatinginacontinuousconduction
mode (CCM), the duty cycle of the main switch is:
15% greater than the average.
For a current mode boost regulator operating in CCM,
slope compensation must be added for duty cycles above
50% in order to avoid subharmonic oscillation. For the
LTC3783, this ramp compensation is internal. Having an
internally fixed ramp compensation waveform, however,
does place some constraints on the value of the inductor
and the operating frequency. If too large an inductor is
VOUT + VD – VIN
D=
VOUT + VD
where V is the forward voltage of the boost diode. For
D
converters where the input voltage is close to the output
voltage, the duty cycle is low, and for converters that
develop a high output voltage from a low input voltage,
the duty cycle is high. The maximum output voltage for a
boost converter operating in CCM is:
used, theresultingcurrentramp(ΔI )willbesmallrelative
L
to the internal ramp compensation (at duty cycles above
50%), and the converter operation will approach voltage
mode(rampcompensationreducesthegainofthecurrent
loop). If too small an inductor is used, but the converter is
still operating in CCM (near critical conduction mode), the
internalrampcompensationmaybeinadequatetoprevent
subharmonic oscillation. To ensure good current mode
gain and to avoid subharmonic oscillation, it is recom-
mended that the ripple current in the inductor fall in the
range of 20% to 40% of the maximum average current.
For example, if the maximum average input current is 1A,
VIN(MIN)
VOUT(MAX)
=
– VD
1–DMAX
The maximum duty cycle capability of the LTC3783 is
typically 90%. This allows the user to obtain high output
voltages from low input supply voltages.
Boost Converter: The Peak and Average Input Currents
The control circuit in the LTC3783 is measuring the input
current (either by using the R
of the power MOSFET
chooseaΔI between0.2Aand0.4A, andcorrespondingly
DS(ON)
L
χ
or by using a sense resistor in the MOSFET source), so
a value ‘ ’ between 0.2 and 0.4.
3783fb
14
LTC3783
OPERATION
Boost Converter: Inductor Selection
been shown to contribute significantly to EMI. Any attempt
to damp it with a snubber will degrade the efficiency.
Givenanoperatinginputvoltagerange,andhavingchosen
the operating frequency and ripple current in the inductor,
the inductor value can be determined using the following
equation:
OUTPUT
VOLTAGE
200mV/DIV
V
⎛
⎝
⎞
⎠
IN(MIN)
INDUCTOR
CURRENT
1A/DIV
L =
•DMAX
⎜
⎟
ΔIL • f
where:
MOSFET
DRAIN
VOLTAGE
20V/DIV
χ •IOUT(MAX)
1–DMAX
ΔIL =
3783 F07
1μs/DIV
Rememberthatmostboostconvertersarenotshort-circuit
protected. Under a shorted output condition, the inductor
current is limited only by the input supply capability. For
applications requiring a step-up converter that is short-
circuit protected, please refer to the applications section
covering SEPIC converters.
Figure 7. Discontinuous Mode Waveforms
Boost Converter: Power MOSFET Selection
ThepowerMOSFETcanservetwopurposesintheLTC3783:
itrepresentsthemainswitchingelementinthepowerpath,
The minimum required saturation current of the inductor
can be expressed as a function of the duty cycle and the
load current, as follows:
and its R
can represent the current sensing element
DS(ON)
for the control loop. Important parameters for the power
MOSFET include the drain-to-source breakdown voltage
IOUT(MAX)
1–DMAX
χ
2
⎛
⎝
⎞
BV , the threshold voltage V
, the on-resistance
DSS
DS(ON)
GS(TH)
IL(SAT) > 1+
•
⎜
⎟
⎠
R
versusgate-to-sourcevoltage,thegate-to-source
and gate-to-drain charges Q and Q , respectively, the
GS
D(MAX)
GD
The saturation current rating for the inductor should be
checkedattheminimuminputvoltage(whichresultsinthe
highest inductor current) and maximum output current.
maximumdraincurrentI
resistances θ and θ .
andtheMOSFET’sthermal
JC
JA
The gate drive voltage is set by the 7V INTV low drop
CC
regulator. Consequently, 6V rated MOSFETs are required
in most high voltage LTC3783 applications. If low input
voltage operation is expected (e.g., supplying power
from a lithium-ion battery or a 3.3V logic supply), then
sublogic-level threshold MOSFETs should be used. Pay
Boost Converter: Operating in Discontinuous Mode
Discontinuous mode operation occurs when the load cur-
rent is low enough to allow the inductor current to run out
during the off-time of the switch, as shown in Figure 7.
Oncetheinductorcurrentisnearzero,theswitchanddiode
capacitancesresonatewiththeinductancetoformdamped
ringing at 1MHz to 10MHz. If the off-time is long enough,
the drain voltage will settle to the input voltage.
closeattentiontotheBV specificationsfortheMOSFETs
DSS
relative to the maximum actual switch voltage in the ap-
plication. Many logic-level devices are limited to 30V or
less, and the switch node can ring during the turn-off of
the MOSFET due to layout parasitics. Check the switching
waveforms of the MOSFET directly across the drain and
source terminals using the actual PC board layout for
excessive ringing.
Depending on the input voltage and the residual energy in
the inductor, this ringing can cause the drain of the power
MOSFETtogobelowgroundwhereitisclampedbythebody
diode. This ringing is not harmful to the IC and it has not
3783fb
15
LTC3783
OPERATION
Duringtheswitchon-time,theIMAXcomparatorlimitsthe
absolutemaximumvoltagedropacrossthepowerMOSFET
to a nominal 150mV, regardless of duty cycle. The peak
It is worth noting that the 1 - D
relationship between
MAX
I
and R
can cause boost converters with a
O(MAX)
DS(ON)
wide input range to experience a dramatic range of maxi-
mum input and output currents. This should be taken into
consideration in applications where it is important to limit
the maximum current drawn from the input supply, and
also to avoid triggering the 150mV IMAX comparator, as
this condition can result in excessive noise.
inductor current is therefore limited to 150mV/R
.
DS(ON)
The relationship between the maximum load current, duty
cycle, and the R
of the power MOSFET is:
DS(ON)
1–DMAX
RDS(ON) <150mV •
χ
2
⎛
⎞
1+
•IOUT(MAX) •ρT
⎜
⎝
⎟
⎠
Calculating Power MOSFET Switching and Conduction
Losses and Junction Temperatures
The ρ term accounts for the temperature coefficient of
T
the R
of the MOSFET, which is typically 0.4%/°C.
In order to calculate the junction temperature of the power
MOSFET,thepowerdissipatedbythedevicemustbeknown.
This power dissipation is a function of the duty cycle, the
load current, and the junction temperature itself (due to
DS(ON)
Figure 8 illustrates the variation of normalized R
over temperature for a typical power MOSFET.
DS(ON)
2.0
1.5
1.0
0.5
0
the positive temperature coefficient of its R
. As a
DS(ON)
result, some iterative calculation is normally required to
determineareasonablyaccuratevalue.Sincethecontroller
is using the MOSFET as both a switching and a sensing
element, care should be taken to ensure that the converter
is capable of delivering the required load current over all
operating conditions (line voltage and temperature), and
for the worst-case specifications for V
and the
SENSE(MAX)
R
) of the MOSFET listed in the manufacturer’s data
DS(ON
sheet.
50
100
–50
150
0
JUNCTION TEMPERATURE (°C)
The power dissipated by the MOSFET in a boost converter
3783 F08
is:
2
Figure 8. Normalized RDS(ON) vs Temperature
I
⎛
⎞
OUT(MAX)
PFET
=
•RDS(ON) •DMAX •ρT +
⎜
⎟
1–D
⎝
⎠
MAX
Another method of choosing which power MOSFET to
use is to check what the maximum output current is for a
I
⎛
⎞
OUT(MAX)
1.85
k • VOUT
•
•CRSS • f
⎜
⎟
1–D
⎝
⎠
givenR
, sinceMOSFETon-resistancesareavailable
MAX
DS(ON)
in discrete values.
2
The first term in the equation above represents the I R
losses in the device, and the second term, the switching
losses.Theconstantk=1.7isanempiricalfactorinversely
related to the gate drive current and has the dimension
of 1/current.
1–DMAX
IO(MAX) = 150mV •
χ
2
⎛
⎞
1+
•RDS(ON) • ρT
⎜
⎝
⎟
⎠
3783fb
16
LTC3783
OPERATION
From a known power dissipated in the power MOSFET, its
junction temperature can be obtained using the following
formula:
for a given output ripple voltage. The effects of these three
parameters (ESR, ESL and bulk C) on the output voltage
ripple waveform are illustrated in Figure 9 for a typical
boost converter.
T = T + P • θ
JA
J
A
FET
The θ to be used in this equation normally includes the
JA
θ
JC
for the device plus the thermal resistance from the
case to the ambient temperature (θ ). This value of T
CA
J
V
OUT
can then be compared to the original, assumed value used
(AC)
in the iterative calculation process.
$V
COUT
3783 F09
$V
ESR
Boost Converter: Output Diode Selection
RINGING DUE TO
TOTAL INDUCTANCE
(BOARD + CAP)
To maximize efficiency, a fast switching diode with low
forwarddropandlowreverseleakageisdesired.Theoutput
diode in a boost converter conducts current during the
switch off-time. The peak reverse voltage that the diode
must withstand is equal to the regulator output voltage.
The average forward current in normal operation is equal
to the output current, and the peak current is equal to the
peak inductor current.
Figure 9. Output Ripple Voltage
The choice of component(s) begins with the maximum
acceptable ripple voltage (expressed as a percentage of
the output voltage), and how this ripple should be divided
between the ESR step and the charging/discharging ΔV.
For the purpose of simplicity we will choose 2% for the
maximum output ripple, to be divided equally between the
ESRstepandthecharging/dischargingΔV.Thispercentage
ripple will change, depending on the requirements of the
application, and the equations provided below can easily
be modified.
IOUT(MAX)
1–DMAX
χ
2
⎛
⎝
⎞
ID(PEAK) = IL(PEAK) = 1+
•
⎜
⎟
⎠
The power dissipated by the diode is:
P = I • V
D
OUT(MAX)
D
and the diode junction temperature is:
T = T + P • θ
For a 1% contribution to the total ripple voltage, the ESR
of the output capacitor can be determined using the fol-
lowing equation:
J
A
D
JA
The θ to be used in this equation normally includes the
JA
VOUT
ESRCOUT < 0.01•
IIN(PEAK)
θ
JC
for the device plus the thermal resistance from the
board to the ambient temperature in the enclosure.
where:
Remember to keep the diode lead lengths short and to
observe proper switch-node layout (see Board Layout
Checklist) to avoid excessive ringing and increased
dissipation.
IOUT(MAX)
1–DMAX
χ
2
⎛
⎝
⎞
IIN(PEAK) = 1+
•
⎜
⎟
⎠
For the bulk C component, which also contributes 1% to
the total ripple:
Boost Converter: Output Capacitor Selection
IOUT(MAX)
Contributions of ESR (equivalent series resistance), ESL
(equivalent series inductance) and the bulk capacitance
mustbeconsideredwhenchoosingthecorrectcomponent
COUT
>
0.01• VOUT • f
3783fb
17
LTC3783
OPERATION
Formanydesignsitispossibletochooseasinglecapacitor
type that satisfies both the ESR and bulk C requirements
forthedesign.Incertaindemandingapplications,however,
the ripple voltage can be improved significantly by con-
necting two or more types of capacitors in parallel. For
example, using a low ESR ceramic capacitor can minimize
the ESR setup, while an electrolytic capacitor can be used
to supply the required bulk C.
I
IN
I
L
3783 F10
Figure 10. Inductor and Input Currents
The RMS input capacitor ripple current for a boost
converter is:
Once the output capacitor ESR and bulk capacitance have
been determined, the overall ripple voltage waveform
should be verified on a dedicated PC board (see Board
Layout section for more information on component place-
ment). Lab breadboards generally suffer from excessive
series inductance (due to inter-component wiring), and
these parasitics can make the switching waveforms look
significantly worse than they would be on a properly
designed PC board.
VIN(MIN)
IRMS(CIN) ; 0.3•
•DMAX
L • f
Please note that the input capacitor can see a very high
surge current when a battery is suddenly connected to
the input of the converter, and solid tantalum capacitors
can fail catastrophically under these conditions. Be sure
to specify surge-tested capacitors!
Boost Converter Design Example
The output capacitor in a boost regulator experiences
high RMS ripple currents. The RMS output capacitor
ripple current is:
Thedesignexamplegivenherewillbeforthecircuitshown
inFigure1. Theinputvoltageis12V, andtheoutputvoltage
is 25V at a maximum load current of 0.7A (1A peak).
VOUT – VIN(MIN)
IRMS(COUT) ; IOUT(MAX)
•
1. The duty cycle is:
VIN(MIN)
VOUT + VD – VIN
VOUT + VD
25+0.4–12
25+0.4
D=
=
= 53%
Note that the ripple current ratings from capacitor manu-
facturers are often based on only 2000 hours of life. This
makes it advisable to further derate the capacitor or to
choose a capacitor rated at a higher temperature than
required. Several capacitors may also be placed in parallel
to meet size or height requirements in the design.
2. The operating frequency is chosen to be 1MHz to
maximize the PWM dimming range. From Figure 2, the
resistor from the FREQ pin to ground is 6k.
3. An inductor ripple current of 40% of the maximum load
current is chosen, so the peak input current (which is also
the minimum saturation current) is:
Boost Converter: Input Capacitor Selection
IOUT(MAX)
The input capacitor of a boost converter is less critical
than the output capacitor, due to the fact that the inductor
is in series with the input, and hence, the input current
waveform is continuous (see Figure 10). The input volt-
age source impedance determines the size of the input
capacitor, which is typically in the range of 10μF to 100μF.
A low ESR capacitor is recommended, although it is not
as critical as for the output capacitor.
χ
2
0.7
1– 0.53
⎛
⎝
⎞
IIN(PEAK) = 1+
•
= 1.2 •
= 1.8A
⎜
⎟
⎠
1–DMAX
The inductor ripple current is:
IOUT(MAX)
0.7
ΔIL = χ •
= 0.4 •
= 0.6A
1−DMAX
1− 0.53
3783fb
18
LTC3783
OPERATION
And so the inductor value is:
8. The choice of an input capacitor for a boost converter
depends on the impedance of the source supply and the
amount of input ripple the converter will safely tolerate.
For this particular design and lab setup, 20μF was found
to be satisfactory.
V
12V
0.6A •1MHz
L = IN(MIN) •DMAX
ΔIL • f
=
• 0.53 = 11μH
4. R
should be:
SENSE
PC Board Layout Checklist
0.5 • VSENSE(MAX)
0.5 •150mV
RSENSE
=
=
= 42mΩ
IIN(PEAK)
1.8A
1. In order to minimize switching noise and improve out-
put load regulation, the GND pad of the LTC3783 should
be connected directly to 1) the negative terminal of the
5. The diode for this design must handle a maximum DC
output current of 0.7A and be rated for a minimum reverse
INTV decoupling capacitor, 2) the negative terminal of
CC
voltage of V , or 25V. A 1A, 40V diode from Zetex was
the output decoupling capacitors, 3) the bottom terminals
of the sense resistors or the source of the power MOSFET,
4) the negative terminal of the input capacitor, and 5) at
least one via to the ground plane immediately under the
exposed pad. The ground trace on the top layer of the PC
board should be as wide and short as possible to minimize
series resistance and inductance.
OUT
chosen for its specifications, especially low leakage at
higher temperatures, which is important for maintaining
dimming range.
6. Voltage and value permitting, the output capacitor usu-
ally consists of some combination of low ESR ceramics.
Based on a maximum output ripple voltage of 1%, or
250mV, the bulk C needs to be greater than:
2. Beware of ground loops in multiple layer PC boards. Try
to maintain one central ground node on the board and use
the input capacitor to avoid excess input ripple for high
output current power supplies. If the ground plane is to
be used for high DC currents, choose a path away from
the small-signal components.
IOUT(MAX)
0.7A
COUT
>
=
= 3μF
0.01• VOUT • f 0.01• 25V •1MHz
The RMS ripple current rating for this capacitor needs
to exceed:
3. Place the C
capacitor immediately adjacent to the
VOUT – V
VCC
IN(MIN)
IRMS(COUT) = IOUT(MAX)
•
INTV and GND pins on the IC package. This capacitor
CC
V
IN(MIN)
carries high di/dt MOSFET gate-drive currents. A low ESR
and ESL 4.7μF ceramic capacitor works well here.
25V – 12V
= 0.7A •
= 0.7A
12V
4.Thehighdi/dtloopfromthebottomterminaloftheoutput
capacitor, through the power MOSFET, through the boost
diode and back through the output capacitors should be
kept as tight as possible to reduce inductive ringing. Excess
inductancecancauseincreasedstressonthepowerMOSFET
and increase HF noise on the output. If low ESR ceramic
capacitors are used on the output to reduce output noise,
place these capacitors close to the boost diode in order to
keep the series inductance to a minimum.
Based on value and ripple current, and taking physical
size into account, a surface mount ceramic capacitor is a
good choice. A 4.7μF TDK C5750X7R1H475M will satisfy
all requirements in a compact package.
7. The soft-start capacitor should be:
2 • dimming ratio • 50μA •COUT • VOUT •RDS(ON)/SENSE
150mV •1.2V
2 • 3000 • 50μA • 4.7μF • 25V • 42mΩ
CSS(MIN)
>
>
= 8μF
150mV •1.2V
3783fb
19
LTC3783
OPERATION
5. Check the stress on the power MOSFET by measuring its
drain-to-source voltage directly across the device terminals
(reference the ground of a single scope probe directly to the
source pad on the PC board). Beware of inductive ringing
which can exceed the maximum specified voltage rating of
theMOSFET.Ifthisringingcannotbeavoidedandexceedsthe
maximumratingofthedevice, eitherchooseahighervoltage
device or specify an avalanche-rated power MOSFET.
divider resistors near the LTC3783 in order to keep the
high impedance FBN node short.
9. Forapplicationswithmultipleswitchingpowerconvert-
ers connected to the same input supply, make sure that
the input filter capacitor for the LTC3783 is not shared
with any other converters. AC input current from another
convertercouldcausesubstantialinputvoltageripple,and
this could interfere with the operation of the LTC3783. A
few inches of PC trace or wire (L ~ 100nH) between the
6. Place the small-signal components away from high
frequency switching nodes. All of the small-signal com-
ponents should be placed on one side of the IC and all
of the power components should be placed on the other.
This also allows the use of a pseudo-Kelvin connection for
the signal ground, where high di/dt gate driver currents
flow out of the IC ground pad in one direction (to bottom
C
of the LTC3783 and the actual source V should be
IN
IN
sufficient to prevent current-sharing problems.
Returning the Load to V : A Single Inductor
IN
Buck-Boost Application
AsshowninFigure11,duetoitsavailablehighsidecurrent
sensing mode, the LTC3783 is also well-suited to a boost
plateoftheINTV decouplingcapacitor)andsmall-signal
CC
currents flow in the other direction.
converter in which the load current is returned to V ,
IN
hence providing a load voltage (V
– V ) which can be
greaterorlessthantheinputvoltageV .Thisconfiguration
7. If a sense resistor is used in the source of the power
MOSFET, minimize the capacitance between the SENSE
pin trace and any high frequency switching nodes. The
LTC3783 contains an internal leading-edge blanking time
of approximately 160ns, which should be adequate for
most applications.
OUT
IN
IN
allows for complete overlap of input and output voltages,
with the disadvantages that only the load current, and not
the load voltage, can be tightly regulated. The switch must
be rated for a V
equal to V + V
.
DS(MAX)
IN
LOAD
The design of this circuit resembles that of the boost
converter above, and the procedure is much the same,
8. For optimum load regulation and true remote sensing,
the top of the output resistor should connect indepen-
dently to the top of the output capacitor (Kelvin connec-
tion), staying away from any high dV/dt traces. Place the
except V
is now (V + V
), and the duty cycles
OUT
IN
LOAD
and voltages must be adjusted accordingly.
V
IN
9V TO 26V
10μF, 50V
10μH
R
L
1M
s2
SUMIDA
0.28Ω
LED STRING 1-4 EA
UMK432C106MM
CDRH8D28-100
LUMILEDS LHXL-BW02
EACH LED IS 3V TO 4.2V
AT 350mA
PMEG6010
40.2k
LTC3783
RUN
PWMIN OV/FB
PWMOUT
V
OUT
V
IN
PWM
5V AT 0Hz TO 10Hz
I
TH
0V TO
1.23V
SS
I
LIM
100k
FAIRCHILD
FDN5630
10μF, 50V
C5750X7R1H106M
CERAMIC
V
REF
GATE
1μF
FBP
SENSE
FBN
INTV
CC
4.7μF
4.7μF
FREQ
SYNC
GND
0.05Ω
1k
20k
GND
3783 F11
Figure 11. Single Inductor Buck-Boost Application with Analog Dimming and Low Frequency PWM Dimming
3783fb
20
LTC3783
OPERATION
Similar to the boost converter, which can be dimmed via
the digital PWMIN input or the analog FBP pin, the buck-
boost can be dimmed via the PWMIN pin or the analog
Using the LTC3783 for Buck Applications
As shown in Figure 12, high side current sensing also al-
lows the LTC3783 to control a functional buck converter
I
pin, which adjusts the offset voltage to which the loop
LIM
will drive (V
when load voltage is always sufficiently less than V . In
IN
– V ). In the case of the buck-boost,
FBP
FBN
this scheme the input voltage to the inductor is lowered
however, the dimming ratio cannot be as high as in the
by the load voltage. The boost converter now sees a
boost converter, since there is no load switch to preserve
V ’ = V – V , meaning the controller is now boosting
LOAD
IN
IN
IN
the V
level while PWMIN is low.
OUT
from (V – V
) to V .
LOAD
IN
V
IN
6V TO 36V
LED STRING
LTC3783
RUN
PWMIN OV/FB
PWMOUT
V
IN
I
TH
SS
I
LIM
V
REF
GATE
FBP
SENSE
FBN
INTV
CC
FREQ
SYNC
GND
GND
3783 F12
Figure 12. LED Buck Application
3783fb
21
LTC3783
PACKAGE DESCRIPTION
DHD Package
16-Lead Plastic DFN (5mm × 4mm)
(Reference LTC DWG # 05-08-1707)
0.70 p 0.05
4.50 p 0.05
3.10 p 0.05
2.44 p 0.05
(2 SIDES)
PACKAGE
OUTLINE
0.25 p 0.05
0.50 BSC
4.34 p 0.05
(2 SIDES)
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
R = 0.115
TYP
0.40 p 0.10
5.00 p 0.10
(2 SIDES)
9
16
R = 0.20
TYP
4.00 p 0.10 2.44 p 0.10
(2 SIDES)
(2 SIDES)
PIN 1
TOP MARK
(SEE NOTE 6)
PIN 1
NOTCH
(DHD16) DFN 0504
8
1
0.25 p 0.05
0.75 p 0.05
0.200 REF
0.50 BSC
4.34 p 0.10
(2 SIDES)
0.00 – 0.05
BOTTOM VIEW—EXPOSED PAD
NOTE:
1. DRAWING PROPOSED TO BE MADE VARIATION OF VERSION (WJGD-2) IN JEDEC
PACKAGE OUTLINE MO-229
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE
TOP AND BOTTOM OF PACKAGE
3783fb
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
22
LTC3783
PACKAGE DESCRIPTION
FE Package
16-Lead Plastic TSSOP (4.4mm)
(Reference LTC DWG # 05-08-1663)
Exposed Pad Variation BC
4.90 – 5.10*
(.193 – .201)
3.58
(.141)
3.58
(.141)
16 1514 13 12 1110
9
6.60 p 0.10
2.94
(.116)
4.50 p 0.10
6.40
(.252)
BSC
SEE NOTE 4
2.94
(.116)
0.45 p 0.05
1.05 0.10
0.65 BSC
5
7
8
1
2
3
4
6
RECOMMENDED SOLDER PAD LAYOUT
1.10
(.0433)
MAX
4.30 – 4.50*
(.169 – .177)
0.25
REF
0° – 8°
0.65
(.0256)
BSC
0.09 – 0.20
(.0035 – .0079)
0.50 – 0.75
(.020 – .030)
0.05 – 0.15
(.002 – .006)
0.195 – 0.30
FE16 (BC) TSSOP 0204
(.0077 – .0118)
TYP
NOTE:
1. CONTROLLING DIMENSION: MILLIMETERS 4. RECOMMENDED MINIMUM PCB METAL SIZE
FOR EXPOSED PAD ATTACHMENT
*DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.150mm (.006") PER SIDE
MILLIMETERS
(INCHES)
2. DIMENSIONS ARE IN
3. DRAWING NOT TO SCALE
3783fb
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
23
LTC3783
RELATED PARTS
PART NUMBER
LT®1618
DESCRIPTION
COMMENTS
Monolithic 1.4MHz Boost Regulator
Boost, Flyback, SEPIC Controller
Constant-Current/Constant-Voltage, 1A Switch
LTC1871
No R , 2.5V ≤ V ≤ 36V, 92% Duty Cycle
SENSE IN
LT3477
3A DC/DC LED Driver with Rail-to-Rail Current Sense
High Power Buck-Boost Controller
2-Phase Boost Controller
2.5V ≤ V ≤ 25V: Buck, Buck-Boost and Boost Topologies
IN
LTC3780
4-Switch, 4V ≤ V ≤ 36V, 0.8V ≤ V
≤ 30V
IN
OUT
LTC3782
High Power, 6V ≤ V ≤ 40V, 150kHz to 500kHz
IN
LTC3827/LTC3827-1
LTC4002
Low I Current Dual Controllers
2-Phase, 80μA I , 0.8V ≤ V
≤ 10V, 4V ≤ V ≤ 36V
Q
Q
OUT IN
Standalone 2A Li-Ion Battery Charger
1- and 2-Cell, 4.7V ≤ V ≤ 22V, 3 Hour Timer
IN
3783fb
LT 0208 • PRINTED IN USA
LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
24
●
●
© LINEAR TECHNOLOGY CORPORATION 2008
(408) 432-1900 FAX: (408) 434-0507 www.linear.com
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