LTC3868EUFD-1 [Linear]
Low IQ, Dual 2-Phase Synchronous Step-Down Controller; 低IQ ,双两相同步降压型控制器型号: | LTC3868EUFD-1 |
厂家: | Linear |
描述: | Low IQ, Dual 2-Phase Synchronous Step-Down Controller |
文件: | 总38页 (文件大小:589K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
LTC3868-1
Low I , Dual
Q
2-Phase Synchronous
Step-Down Controller
FeaTures
DescripTion
TheꢀLTC®3868-1ꢀisꢀaꢀhighꢀperformanceꢀdualꢀstep-downꢀ
switchingꢀregulatorꢀcontrollerꢀthatꢀdrivesꢀallꢀN-channelꢀ
synchronousꢀpowerꢀMOSFETꢀstages.ꢀAꢀconstantꢀfrequencyꢀ
currentꢀmodeꢀarchitectureꢀallowsꢀaꢀphase-lockableꢀfre-
quencyꢀofꢀupꢀtoꢀ850kHz.ꢀPowerꢀlossꢀandꢀnoiseꢀdueꢀtoꢀtheꢀ
inputꢀcapacitorꢀESRꢀareꢀminimizedꢀbyꢀoperatingꢀtheꢀtwoꢀ
controllerꢀoutputsꢀoutꢀofꢀphase.
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ꢀ Low Operating I : 170µA (One Channel On)
Q
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ꢀ Wide Output Voltage Range: 0.8V ≤ V
≤ 14V
OUT
ꢀ Wide V Range: 4V to 24V
IN
ꢀ R
or DCR Current Sensing
SENSE
ꢀ Out-of-PhaseꢀControllersꢀReduceꢀRequiredꢀInputꢀ
CapacitanceꢀandꢀPowerꢀSupplyꢀInducedꢀNoise
®
n
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ꢀ OPTI-LOOP ꢀCompensationꢀMinimizesꢀC
OUT
ꢀ Phase-LockableꢀFrequencyꢀ(75kHzꢀtoꢀ850kHz)
ꢀ ProgrammableꢀFixedꢀFrequencyꢀ(50kHzꢀtoꢀ900kHz)
ꢀ SelectableꢀContinuous,ꢀPulse-Skippingꢀorꢀ
ꢀBurstꢀMode®ꢀOperationꢀatꢀLightꢀLoads
Theꢀ170μAꢀno-loadꢀquiescentꢀcurrentꢀextendsꢀoperatingꢀ
lifeꢀinꢀbatteryꢀpoweredꢀsystems.ꢀOPTI-LOOPꢀcompensa-
tionꢀallowsꢀtheꢀtransientꢀresponseꢀtoꢀbeꢀoptimizedꢀoverꢀ
aꢀwideꢀrangeꢀofꢀoutputꢀcapacitanceꢀandꢀESRꢀvalues.ꢀTheꢀ
LTC3868-1ꢀfeaturesꢀaꢀprecisionꢀ0.8Vꢀreferenceꢀandꢀaꢀpowerꢀ
goodꢀoutputꢀindicator.ꢀAꢀwideꢀ4Vꢀtoꢀ24Vꢀinputꢀsupplyꢀrangeꢀ
encompassesꢀaꢀwideꢀrangeꢀofꢀintermediateꢀbusꢀvoltagesꢀ
andꢀbatteryꢀchemistries.
n
n
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n
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ꢀ VeryꢀLowꢀDropoutꢀOperation:ꢀ99%ꢀDutyꢀCycle
ꢀ AdjustableꢀOutputꢀVoltageꢀSoft-Start
ꢀ PowerꢀGoodꢀOutputꢀVoltageꢀMonitor
ꢀ OutputꢀOvervoltageꢀProtection
ꢀ OutputꢀLatchoffꢀProtectionꢀDuringꢀShortꢀCircuit
Independentꢀsoft-startꢀpinsꢀforꢀeachꢀcontrollerꢀrampꢀtheꢀ
outputꢀvoltagesꢀduringꢀstart-up.ꢀCurrentꢀfoldbackꢀlimitsꢀ
MOSFETꢀheatꢀdissipationꢀduringꢀshort-circuitꢀconditions.ꢀ
Theꢀoutputꢀshort-circuitꢀlatchoffꢀfeatureꢀfurtherꢀprotectsꢀ
theꢀcircuitꢀinꢀshort-circuitꢀconditions.
ꢀ LowꢀShutdownꢀI :ꢀ8µA
Q
ꢀ InternalꢀLDOꢀPowersꢀGateꢀDriveꢀfromꢀV ꢀorꢀEXTV
IN
CC
ꢀ NoꢀCurrentꢀFoldbackꢀDuringꢀStart-Up
ꢀ Smallꢀ4mmꢀ×ꢀ5mmꢀQFNꢀandꢀNarrowꢀSSOPꢀPackages
Forꢀaꢀleadlessꢀ32-pinꢀQFNꢀpackageꢀwithꢀtheꢀadditionalꢀfea-
turesꢀofꢀadjustableꢀcurrentꢀlimit,ꢀclockꢀout,ꢀphaseꢀmodula-
tionꢀandꢀtwoꢀPGOODꢀoutputs,ꢀseeꢀtheꢀLTC3868ꢀdataꢀsheet.ꢀ
L,ꢀLT,ꢀLTC,ꢀLTM,ꢀBurstꢀMode,ꢀOPTI-LOOP,ꢀµModule,ꢀLinearꢀTechnologyꢀandꢀtheꢀLinearꢀlogoꢀ
applicaTions
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ꢀ NotebookꢀandꢀPalmtopꢀComputers
n
ꢀ PortableꢀInstruments
n
ꢀ BatteryꢀOperatedꢀDigitalꢀDevices
areꢀregisteredꢀtrademarksꢀandꢀNoꢀR
ꢀandꢀUltraFastꢀareꢀtrademarksꢀofꢀLinearꢀTechnologyꢀ
SENSE
Corporation.ꢀAllꢀotherꢀtrademarksꢀareꢀtheꢀpropertyꢀofꢀtheirꢀrespectiveꢀowners.ꢀProtectedꢀbyꢀU.S.ꢀ
Patents,ꢀincludingꢀ5481178,ꢀ5705919,ꢀ5929620,ꢀ6100678,ꢀ6144194,ꢀ6177787,ꢀ6304066,ꢀ6580258.
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ꢀ DistributedꢀDCꢀPowerꢀSystems
Typical applicaTion
High Efficiency Dual 8.5V/3.3V Step-Down Converter
V
Efficiency and Power Loss
IN
9V TO 24V
22µF
50V
vs Load Current
4.7µF
V
INTV
CC
100
90
10000
1000
100
10
IN
TG1
TG2
0.1µF
0.1µF
BOOST1
SW1
BOOST2
SW2
3.3µH
7.2µH
80
70
EFFICIENCY
BG1
BG2
60
50
LTC3868-1
PGND
POWER LOSS
= 12V
+
+
40
30
20
10
0
SENSE1
SENSE1
SENSE2
0.01Ω
193k
0.007Ω
–
1
–
V
8.5V
3.5A
SENSE2
OUT2
V
V
V
OUT1
3.3V
5A
IN
OUT
V
V
= 3.3V
FB1
FB2
I
TH2
62.5k
FIGURE 12 CIRCUIT
0.1 10
OUTPUT CURRENT (A)
I
TH1
SS1
0.1
150µF
680pF
15k
680pF
15k
150µF
SGND
SS2
0.0001 0.001
0.01
1
20k
20k
0.1µF
0.1µF
38681 TA01b
38681 TA01
38681fb
ꢀ
ꢀ BOOST1,ꢀBOOST2ꢀ................................. –0.3Vꢀtoꢀ34V
PGOOD1ꢀVoltageꢀ......................................... –0.3Vꢀtoꢀ6V
(BOOST1-SW1),ꢀ(BOOST2-SW2)ꢀ
................ –0.3Vꢀtoꢀ6V
............................................... –0.3Vꢀtoꢀ8V
RUN1,ꢀRUN2ꢀ
StorageꢀTemperatureꢀRange................... –65°Cꢀtoꢀ150°C
SENSE2 ꢀVoltages
...................................... –0.3Vꢀtoꢀ16V
EXTV ꢀ...................................................... –0.3Vꢀtoꢀ14V
LTC3868-1
absoluTe MaxiMuM raTings (Note 1)
PLLIN/MODE,ꢀFREQꢀVoltagesꢀꢀ.............. –0.3VꢀtoꢀINTV
InputꢀSupplyꢀVoltageꢀ(V )ꢀ......................... –0.3Vꢀtoꢀ28V
CC
IN
TopsideꢀDriverꢀVoltagesꢀ
CC
I
,ꢀI ,ꢀV ,ꢀV ꢀVoltagesꢀ..................... –0.3Vꢀtoꢀ6V
TH1 TH2 FB1 FB2
SwitchꢀVoltageꢀ(SW1,ꢀSW2)ꢀꢀ........................ –5Vꢀtoꢀ28V
SS1,ꢀSS2,ꢀINTV ꢀVoltagesꢀꢀ......................... –0.3Vꢀtoꢀ6V
CC
OperatingꢀTemperatureꢀRangeꢀ(Noteꢀ2).... –40°Cꢀtoꢀ85°C
JunctionꢀTemperatureꢀ(Noteꢀ3)ꢀ............................. 125°C
ꢀ MaximumꢀCurrentꢀSourcedꢀintoꢀPinꢀfromꢀ
ꢀ Sourceꢀ>8Vꢀꢀ......................................................100µA
+
+
–
LeadꢀTemperatureꢀ(Soldering,ꢀ10ꢀsec)
SENSE1 ,ꢀSENSE2 ,ꢀSENSE1
–
ꢀ SSOPꢀ................................................................ 300°C
pin conFiguraTion
TOP VIEW
TOP VIEW
1
2
SS1
28
27
26
25
24
23
22
21
20
19
18
17
16
15
I
TH1
PGOOD1
TG1
V
FB1
+
3
SENSE1
SENSE1
28 27 26 25 24 23
+
–
SENSE1
SENSE1
1
2
3
4
5
6
7
8
22
21
20
19
18
17
16
15
BOOST1
BG1
4
SW1
–
5
BOOST1
BG1
FREQ
PLLIN/MODE
SGND
FREQ
PLLIN/MODE
SGND
V
IN
6
PGND
29
SGND
7
V
IN
EXTV
CC
CC
8
PGND
RUN1
RUN1
INTV
BG2
9
EXTV
CC
RUN2
RUN2
–
10
11
12
13
14
INTV
CC
SENSE2
–
SENSE2
BOOST2
+
BG2
SENSE2
9
10 11 12 13 14
UFD PACKAGE
BOOST2
SW2
V
FB2
TH2
I
TG2
SS2
28-LEAD (4mm s 5mm) PLASTIC QFN
GN PACKAGE
28-LEAD PLASTIC SSOP
ꢀ
T
JMAX
ꢀ=ꢀ125°C,ꢀθ ꢀ=ꢀ43°C/Wꢀ
JA
ꢀ
EXPOSEDꢀPADꢀ(PINꢀ29)ꢀISꢀSGND,ꢀMUSTꢀBEꢀSOLDEREDꢀTOꢀPCB
T
ꢀ=ꢀ125°C,ꢀθ ꢀ=ꢀ90°C/W
JMAX JA
orDer inForMaTion
LEAD FREE FINISH
LTC3868EUFD-1#PBF
LTC3868IUFD-1#PBF
LTC3868EGN-1#PBF
LTC3868IGN-1#PBF
TAPE AND REEL
PART MARKING*
PACKAGE DESCRIPTION
TEMPERATURE RANGE
–40°Cꢀtoꢀ85°C
LTC3868EUFD-1#TRPBF 38681
LTC3868IUFD-1#TRPBF 38681
28-Leadꢀ(4mmꢀ×ꢀ5mm)ꢀPlasticꢀQFN
28-Leadꢀ(4mmꢀ×ꢀ5mm)ꢀPlasticꢀQFN
28-LeadꢀPlasticꢀSSOP
–40°Cꢀtoꢀ85°C
LTC3868EGN-1#TRPBF
LTC3868IGN-1#TRPBF
LTC3868GN-1
LTC3868GN-1
–40°Cꢀtoꢀ85°C
28-LeadꢀPlasticꢀSSOP
–40°Cꢀtoꢀ85°C
ConsultꢀLTCꢀMarketingꢀforꢀpartsꢀspecifiedꢀwithꢀwiderꢀoperatingꢀtemperatureꢀranges.ꢀꢀ*Theꢀtemperatureꢀgradeꢀisꢀidentifiedꢀbyꢀaꢀlabelꢀonꢀtheꢀshippingꢀ
container.ConsultꢀLTCꢀMarketingꢀforꢀinformationꢀonꢀnon-standardꢀleadꢀbasedꢀfinishꢀparts.
Forꢀmoreꢀinformationꢀonꢀleadꢀfreeꢀpartꢀmarking,ꢀgoꢀto:ꢀhttp://www.linear.com/leadfree/ꢀꢀ
Forꢀmoreꢀinformationꢀonꢀtapeꢀandꢀreelꢀspecifications,ꢀgoꢀto:ꢀhttp://www.linear.com/tapeandreel/
38681fb
ꢁ
LTC3868-1
elecTrical characTerisTics The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VIN = 12V, VRUN1,2 = 5V, EXTVCC = 0V unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
MIN
4
TYP
MAX
24
UNITS
V
V
V
InputꢀSupplyꢀOperatingꢀVoltageꢀRange
RegulatedꢀFeedbackꢀVoltage
FeedbackꢀCurrent
IN
l
(Noteꢀ4)ꢀI
(Noteꢀ4)
ꢀVoltageꢀ=ꢀ1.2V
TH1,2
0.788
0.8
5
0.812
50
V
FB1,2
FB1,2
I
nA
V
V
ReferenceꢀVoltageꢀLineꢀRegulation
OutputꢀVoltageꢀLoadꢀRegulation
(Noteꢀ4)ꢀV ꢀ=ꢀ4.5Vꢀtoꢀ24V
0.002
0.02
%/V
REFLNREG
LOADREG
IN
(Note4)ꢀ
ꢀ
ꢀ
ꢀ
%
l
l
MeasuredꢀinꢀServoꢀLoop,ꢀꢀ
0.01
0.1
∆I ꢀVoltageꢀ=ꢀ1.2Vꢀtoꢀ0.7V
TH
(Note4)ꢀ
ꢀ
ꢀ
ꢀ
%
MeasuredꢀinꢀServoꢀLoop,ꢀꢀ
–0.01
–0.1
∆I ꢀVoltageꢀ=ꢀ1.2Vꢀtoꢀ2V
TH
g
ꢀ
TransconductanceꢀAmplifierꢀg
InputꢀDCꢀSupplyꢀCurrent
(Noteꢀ4)ꢀI
(Noteꢀ5)
ꢀ=ꢀ1.2V,ꢀSink/Sourceꢀ=ꢀ5µA
TH1,2
2
mmho
mA
m1,2
m
I
Q
Pulse-SkippingꢀorꢀForcedꢀContinuousꢀ
Modeꢀ
(OneꢀChannelꢀOn)
RUN1ꢀ=ꢀ5VꢀandꢀRUN2ꢀ=ꢀ0Vꢀorꢀꢀ
RUN1ꢀ=ꢀ0VꢀandꢀRUN2ꢀ=ꢀ5V,ꢀꢀ
1.3
V
ꢀ=ꢀ0.83Vꢀ(NoꢀLoad)
FB1
Pulse-SkippingꢀorꢀForcedꢀContinuousꢀ
Modeꢀ
RUN1,2ꢀ=ꢀ5V,ꢀV
ꢀ=ꢀ0.83Vꢀ(NoꢀLoad)
2
mA
µA
FB1,2
(BothꢀChannelsꢀOn)
SleepꢀModeꢀ(OneꢀChannelꢀOn)
RUN1ꢀ=ꢀ5VꢀandꢀRUN2ꢀ=ꢀ0Vꢀorꢀꢀ
RUN1ꢀ=ꢀ0VꢀandꢀRUN2ꢀ=ꢀ5V,ꢀꢀ
170
250
V
ꢀ=ꢀ0.83Vꢀ(NoꢀLoad)
FB1
SleepꢀModeꢀ(BothꢀChannelsꢀOn)
Shutdown
RUN1,2ꢀ=ꢀ5V,ꢀV
RUN1,2ꢀ=ꢀ0V
ꢀ=ꢀ0.83Vꢀ(NoꢀLoad)
300
8
450
25
µA
µA
FB1,2
l
l
UVLO
UndervoltageꢀLockout
INTV ꢀRampingꢀUpꢀ
ꢀ
4ꢀ
3.8
4.2ꢀ
4
Vꢀ
V
CC
INTV ꢀRampingꢀDown
3.6
CC
V
FeedbackꢀOvervoltageꢀProtection
MeasuredꢀatꢀV
FB1,2
,ꢀRelativeꢀtoꢀRegulatedꢀ
FB1,2
7
10
13
%
OVL
V
+
–
+
I
I
SENSE ꢀPinꢀCurrent
EachꢀChannel
EachꢀChannelꢀ
1
µA
SENSE
SENSE
–
SENSE ꢀPinsꢀCurrent
ꢀ
ꢀ
ꢀ
ꢀ
µAꢀ
µA
V
V
ꢀ<ꢀINTV ꢀ–ꢀ0.5Vꢀ
1ꢀ
OUT1,2
OUT1,2
CC
ꢀ>ꢀINTV ꢀ+ꢀ0.5V
540
700
CC
DF
MaximumꢀDutyꢀFactor
Soft-StartꢀChargeꢀCurrent
RUNꢀPinꢀOnꢀThreshold
InꢀDropout,ꢀFREQꢀ=ꢀ0V
98
0.7
99.4
1
%
µA
V
MAX
I
V
V
ꢀ=ꢀ0V
SS1,2
1.4
SS1,2
l
V
V
V
V
ꢀOn
,ꢀV ꢀRising
RUN1 RUN2
1.21
1.26
50
2
1.31
RUN1,2
ꢀHyst RUNꢀPinꢀHysteresis
SSꢀPinꢀLatchoffꢀArmingꢀThreshold
mV
V
RUN1,2
ꢀLA
V
V
,ꢀV ꢀRisingꢀfromꢀ1V
SS1 SS2
1.9
1.3
7
2.1
1.7
13
SS1,2
SS1,2
ꢀLT
SSꢀPinꢀLatchoffꢀThreshold
SSꢀDischargeꢀCurrent
,ꢀV ꢀRisingꢀfromꢀ2V
SS1 SS2
1.5
10
V
I
ꢀLT
Short-CircuitꢀConditionꢀV
ꢀ=ꢀ0.5Vꢀ
FB1,2
µA
DSC1,2
V
ꢀ=ꢀ4.5V
SS1,2
V
MaximumꢀCurrentꢀSenseꢀThreshold
V
ꢀ=ꢀ0.7V,ꢀV
–, –ꢀ=ꢀ3.3V
SENSE1 2
43
50
57
mV
SENSE(MAX)
FB1,2
Gate Driver
TG1,2
Pull-UpꢀOn-Resistanceꢀ
Pull-DownꢀOn-Resistance
2.5ꢀ
1.5
Ωꢀ
Ω
BG1,2
Pull-UpꢀOn-Resistanceꢀ
Pull-DownꢀOn-Resistance
2.4ꢀ
1.1
Ωꢀ
Ω
38681fb
ꢂ
LTC3868-1
elecTrical characTerisTics The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VIN = 12V, VRUN1,2 = 5V, EXTVCC = 0V unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
ꢀ
TGꢀTransitionꢀTime:ꢀ
ꢀRiseꢀTimeꢀ
ꢀFallꢀTime
(Noteꢀ6)ꢀ
LOAD
LOAD
ꢀ
ꢀ
nsꢀ
ns
TG1,2ꢀt ꢀ
C
C
ꢀ=ꢀ3300pFꢀ
ꢀ=ꢀ3300pF
25ꢀ
16
r
TG1,2ꢀt
f
ꢀ
BGꢀTransitionꢀTime:ꢀ
ꢀRiseꢀTimeꢀ
ꢀFallꢀTime
(Noteꢀ6)ꢀ
LOAD
LOAD
ꢀ
ꢀ
nsꢀ
ns
BG1,2ꢀt ꢀ
C
C
ꢀ=ꢀ3300pFꢀ
ꢀ=ꢀ3300pF
28ꢀ
13
r
BG1,2ꢀt
f
TG/BGꢀt
TopꢀGateꢀOffꢀtoꢀBottomꢀGateꢀOnꢀDelayꢀ
SynchronousꢀSwitch-OnꢀDelayꢀTime
C
ꢀ=ꢀ3300pFꢀEachꢀDriver
30
30
95
ns
ns
ns
1D
1D
LOAD
BG/TGꢀt
BottomꢀGateꢀOffꢀtoꢀTopꢀGateꢀOnꢀDelayꢀ
TopꢀSwitch-OnꢀDelayꢀTime
C
ꢀ=ꢀ3300pFꢀEachꢀDriver
LOAD
t
MinimumꢀOn-Time
(Noteꢀ7)
ON(MIN)
INTV Linear Regulator
CC
V
V
V
V
V
V
InternalꢀV ꢀVoltage
6Vꢀ<ꢀV ꢀ<ꢀ24V,ꢀV ꢀ=ꢀ0V
EXTVCC
4.85
4.85
4.5
5.1
0.7
5.1
0.6
4.7
250
5.35
1.1
V
%
V
INTVCCVIN
LDOVIN
CC
IN
INTV ꢀLoadꢀRegulation
I
ꢀ=ꢀ0mAꢀtoꢀ50mA,ꢀV
ꢀ=ꢀ0V
EXTVCC
CC
CC
InternalꢀV ꢀVoltage
6Vꢀ<ꢀV ꢀ<ꢀ13V
EXTVCC
5.35
1.1
INTVCCEXT
LDOEXT
CC
INTV ꢀLoadꢀRegulation
I
ꢀ=ꢀ0mAꢀtoꢀ50mA,ꢀV
CC
ꢀ=ꢀ8.5V
EXTVCC
%
V
CC
EXTV ꢀSwitchoverꢀVoltage
EXTV ꢀRampingꢀPositive
4.9
EXTVCC
CC
CC
EXTV ꢀHysteresis
mV
LDOHYS
CC
Oscillator and Phase-Locked Loop
f
f
f
f
f
f
ProgrammableꢀFrequency
ProgrammableꢀFrequency
ProgrammableꢀFrequency
LowꢀFixedꢀFrequency
R
R
R
V
V
ꢀ=ꢀ25k,ꢀPLLIN/MODEꢀ=ꢀDCꢀVoltage
ꢀ=ꢀ65k,ꢀPLLIN/MODEꢀ=ꢀDCꢀVoltage
ꢀ=ꢀ105k,ꢀPLLIN/MODEꢀ=ꢀDCꢀVoltage
ꢀ=ꢀ0V,ꢀPLLIN/MODEꢀ=ꢀDCꢀVoltage
105
440
835
350
535
kHz
kHz
kHz
kHz
kHz
kHz
25kΩ
65kΩ
105kΩ
LOW
FREQ
FREQ
FREQ
FREQ
FREQ
375
505
320
485
75
380
585
850
HighꢀFixedꢀFrequency
ꢀ=ꢀINTV ,ꢀPLLIN/MODEꢀ=ꢀDCꢀVoltage
CC
HIGH
SYNC
l
SynchronizableꢀFrequency
PLLIN/MODEꢀ=ꢀExternalꢀClock
PGOOD1 Output
V
PGOOD1ꢀVoltageꢀLow
PGOOD1ꢀLeakageꢀCurrent
PGOOD1ꢀTripꢀLevel
I
ꢀ=ꢀ2mA
PGOOD
0.2
0.4
1
V
PGL
I
V
ꢀ=ꢀ5V
PGOOD
µA
PGOOD
V
V
ꢀwithꢀRespectꢀtoꢀSetꢀRegulatedꢀVoltageꢀ
FB
FB
ꢀ
ꢀ
ꢀ
–7
ꢀ
PG
ꢀV ꢀRampingꢀNegativeꢀ
–13
–10ꢀ
2.5
%ꢀ
%
ꢀHysteresis
V
ꢀwithꢀRespectꢀtoꢀSetꢀRegulatedꢀVoltageꢀ
FB
ꢀ
7
ꢀ
ꢀ
13
ꢀ
FB
ꢀV ꢀRampingꢀPositiveꢀ
10ꢀ
2.5
%ꢀ
%
ꢀHysteresis
t
DelayꢀforꢀReportingꢀaꢀFaultꢀ(PGOODꢀLow)
25
µs
PG
Note 1:ꢀStressesꢀbeyondꢀthoseꢀlistedꢀunderꢀAbsoluteꢀMaximumꢀRatingsꢀ
mayꢀcauseꢀpermanentꢀdamageꢀtoꢀtheꢀdevice.ꢀExposureꢀtoꢀanyꢀAbsoluteꢀ
MaximumꢀRatingsꢀforꢀextendedꢀperiodsꢀmayꢀaffectꢀdeviceꢀreliabilityꢀandꢀ
lifetime.ꢀ
whereꢀθ ꢀ=ꢀ43°CꢀforꢀtheꢀQFNꢀpackageꢀandꢀθ ꢀ=ꢀ90°CꢀforꢀtheꢀSSOPꢀ
JA
JA
package.
Note 4:ꢀTheꢀLTC3868-1ꢀisꢀtestedꢀinꢀaꢀfeedbackꢀloopꢀthatꢀservosꢀV
ꢀtoꢀaꢀ
ITH1,2
specifiedꢀvoltageꢀandꢀmeasuresꢀtheꢀresultantꢀV
.
FB1,2
Note 2:ꢀTheꢀLTC3868E-1ꢀisꢀguaranteedꢀtoꢀmeetꢀperformanceꢀspecificationsꢀ
fromꢀ0°Cꢀtoꢀ85°C.ꢀSpecificationsꢀoverꢀtheꢀ–40°Cꢀtoꢀ85°Cꢀoperatingꢀ
temperatureꢀrangeꢀareꢀassuredꢀbyꢀdesign,ꢀcharacterizationꢀandꢀcorrelationꢀ
withꢀstatisticalꢀprocessꢀcontrols.ꢀTheꢀLTC3868I-1ꢀisꢀguaranteedꢀoverꢀtheꢀ
fullꢀ–40°Cꢀtoꢀ85°Cꢀoperatingꢀtemperatureꢀrange.
Note 5:ꢀDynamicꢀsupplyꢀcurrentꢀisꢀhigherꢀdueꢀtoꢀtheꢀgateꢀchargeꢀbeingꢀ
deliveredꢀatꢀtheꢀswitchingꢀfrequency.ꢀSeeꢀApplicationsꢀinformation.
Note 6:ꢀRiseꢀandꢀfallꢀtimesꢀareꢀmeasuredꢀusingꢀ10%ꢀandꢀ90%ꢀlevels.ꢀDelayꢀ
timesꢀareꢀmeasuredꢀusingꢀ50%ꢀlevels.
Note 7:ꢀTheꢀminimumꢀon-timeꢀconditionꢀisꢀspecifiedꢀforꢀanꢀinductorꢀ
Note 3:ꢀT ꢀisꢀcalculatedꢀfromꢀtheꢀambientꢀtemperatureꢀT ꢀandꢀpowerꢀ
J
A
peak-to-peakꢀrippleꢀcurrentꢀ≥ꢀ40%ꢀofꢀI ꢀ(SeeꢀMinimumꢀOn-Timeꢀ
MAX
dissipationꢀP ꢀaccordingꢀtoꢀtheꢀfollowingꢀformula:
D
ConsiderationsꢀinꢀtheꢀApplicationsꢀInformationꢀsection).
ꢀ
T ꢀ=ꢀT ꢀ+ꢀ(P •ꢀθ )
J A Dꢀ JA
38681fb
ꢃ
LTC3868-1
Typical perForMance characTerisTics
Efficiency and Power Loss
vs Output Current
Efficiency vs Load Current
100
90
100
90
10000
1000
100
10
FIGURE 12 CIRCUIT
V
V
= 12V
IN
OUT
V
= 5V
IN
= 3.3V
80
80
70
70
V
= 12V
IN
60
50
60
50
40
30
20
10
0
40
30
20
10
0
Burst Mode
OPERATION
PULSE-
SKIPPING
FCM
1
V
= 3.3V
OUT
FIGURE 12 CIRCUIT
0.1
0.0001 0.001
0.01
0.1
1
10
0.0001 0.001
0.01
0.1
1
10
OUTPUT CURRENT (A)
OUTPUT CURRENT (A)
38681 G02
38681 G01
Load Step
(Forced Continuous Mode)
Load Step (Burst Mode Operation)
Efficiency vs Input Voltage
98
96
94
92
90
88
86
84
82
80
FIGURE 12 CIRCUIT
V
I
= 3.3V
= 4A
OUT
OUT
V
V
OUT
OUT
100mV/DIV
AC-
100mV/DIV
AC-
COUPLED
COUPLED
I
L
I
L
2A/DIV
2A/DIV
38681 G04
38681 G05
20
25 28
V
= 3.3V
20µs/DIV
V
= 3.3V
20µs/DIV
0
5
10
15
OUT
OUT
FIGURE 12 CIRCUIT
FIGURE 12 CIRCUIT
INPUT VOLTAGE (V)
38681 G03
Inductor Current at Light Load
Load Step (Pulse-Skipping Mode)
Soft Start-Up
V
OUT
FORCED
CONTINUOUS
MODE
V
OUT2
100mV/DIV
AC-
2V/DIV
COUPLED
Burst Mode
OPERATION
2A/DIV
V
OUT1
2V/DIV
I
L
2A/DIV
PULSE-
SKIPPING
MODE
38681 G06
38681 G07
38681 G08
V
= 3.3V
20µs/DIV
V
LOAD
FIGURE 12 CIRCUIT
= 3.3V
2µs/DIV
20ms/DIV
FIGURE 12 CIRCUIT
OUT
OUT
FIGURE 12 CIRCUIT
I
= 200µA
38681fb
ꢄ
LTC3868-1
Typical perForMance characTerisTics
Total Input Supply Current
vs Input Voltage
EXTVCC Switchover and INTVCC
Voltages vs Temperature
INTVCC Line Regulation
400
5.6
5.2
5.2
5.1
5.1
FIGURE 12 CIRCUIT
= 3.3V
V
OUT
350
300
5.4
5.2
ONE CHANNEL ON
INTV
CC
300µA LOAD
250
200
150
100
50
5.0
4.8
4.6
4.4
4.2
EXTV RISING
CC
NO LOAD
EXTV FALLING
CC
0
5.0
4.0
10
15
INPUT VOLTAGE (V)
25 28
5
20
0
5
10
15
20
25 28
–20
5
55
80 105 130
–45
30
INPUT VOLTAGE (V)
TEMPERATURE (°C)
38681 G10
38681 G12
38681 G11
Maximum Current Sense Voltage
vs ITH Voltage
Maximum Current Sense
Threshold vs Duty Cycle
SENSE– Pins Input Bias Current
80
60
40
20
80
60
40
20
0
0
–50
PULSE-SKIPPING
FORCED CONTINUOUS
Burst Mode OPERATION
(FALLING)
Burst Mode OPERATION
(RISING)
–100
–150
–200
–250
–300
–350
–400
–450
–500
–550
–600
0
–20
–40
5% DUTY CYCLE
0.8
PIN VOLTAGE
1.2 1.4
0
10
5
COMMON MODE VOLTAGE (V)
15
10 20
0
0.2 0.4 0.6
1.0
0
30 40
50
60 70 80 90 100
V
I
DUTY CYCLE (%)
SENSE
TH
38681 G14
38681 G13
38681 G15
Shutdown Current vs Temperature
Foldback Current Limit
Quiescent Current vs Temperature
240
230
220
210
200
190
180
170
160
150
140
130
120
110
10
9
90
80
70
60
50
40
30
20
10
PLLIN/MODE = 0
V
V
= 12V
IN
OUT
= 3.3V
ONE CHANNEL ON
8
7
6
5
4
0
55
TEMPERATURE (°C)
105 130
–45 –20
5
30
80
–45 –20
5
30
55
80 105 130
0
0.1 0.2 0.3 0.4 0.5
0.9
0.6 0.7 0.8
TEMPERATURE (°C)
FEEDBACK VOLTAGE (V)
38681 G17
38681 G18
38681 G16
38681fb
ꢅ
LTC3868-1
Typical perForMance characTerisTics
Regulated Feedback Voltage
vs Temperature
Soft-Start Pull-Up Current
vs Temperature
Shutdown (RUN) Threshold
vs Temperature
1.40
1.35
1.30
1.25
1.20
1.15
1.10
1.05
1.00
0.95
0.90
1.20
808
1.15
1.10
806
804
1.05
1.00
0.95
0.90
0.85
802
800
798
796
794
0.80
792
–45
5
30
55
80 105 130
–20
–20
5
55
80 105 130
–45
30
–20
5
55
80 105 130
–45
30
TEMPERATURE (°C)
TEMPERATURE (°C)
TEMPERATURE (°C)
38681 G20
38681 G19
38681 G21
SENSE– Pin Input Current
vs Temperature
Shutdown Current
vs Input Voltage
Oscillator Frequency
vs Temperature
50
0
–50
14
12
800
700
600
V
= 3.3V
OUT
–100
–150
–200
–250
–300
–350
–400
–450
–500
–550
–600
FREQ = INTV
CC
10
8
500
400
300
200
100
FREQ = GND
6
4
2
V
= 28V
55
OUT
0
0
25
28
5
10
15
20
–20
5
55
80 105 130
–45 –20
5
30
80 105 130
–45
30
TEMPERATURE (°C)
INPUT VOLTAGE (V)
TEMPERATURE (°C)
38681 G22
38681 G23
38681 G24
Oscillator Frequency
vs Input Voltage
Undervoltage Lockout Threshold
vs Temperature
4.4
4.3
4.2
4.1
4.0
3.9
3.8
3.7
3.6
3.5
3.4
356
354
352
350
348
346
344
–45
5
30
55
80 105 130
–20
25
28
5
10
15
20
TEMPERATURE (°C)
INPUT VOLTAGE (V)
38681 G25
38681 G28
38681fb
ꢆ
LTC3868-1
Typical perForMance characTerisTics
Latchoff Thresholds
vs Temperature
INTVCC vs Load Current
5.20
5.15
5.10
2.3
V
= 12V
IN
2.2
2.1
2.0
1.9
1.8
1.7
1.6
1.5
1.4
1.3
1.2
ARMING THRESHOLD
EXTV = 0V
CC
5.05
5.00
4.95
LATCH-OFF THRESHOLD
EXTV = 8V
CC
0
20 40 60 80 100 120 140 160 180 200
–45
5
30
55
80 105 130
–20
TEMPERATURE (°C)
LOAD CURRENT (mA)
38681 G26
38681 G27
pin FuncTions (QFN/SSOP)
–
–
LTC3868-1ꢀ operatesꢀ atꢀ lightꢀ loads.ꢀ Pullingꢀ thisꢀ pinꢀ toꢀ
groundꢀselectsꢀBurstꢀModeꢀoperation.ꢀAnꢀinternalꢀ100kꢀ
resistorꢀ toꢀ groundꢀ alsoꢀ invokesꢀ Burstꢀ Modeꢀ operationꢀ
SENSE1 , SENSE2 (Pin 2, Pin 4/Pin 8, Pin 10):ꢀTheꢀ(–)ꢀ
InputꢀtoꢀtheꢀDifferentialꢀCurrentꢀComparators.ꢀWhenꢀgreaterꢀ
–
thanꢀINTV ꢀ–ꢀ0.5V,ꢀtheꢀSENSE ꢀpinꢀsuppliesꢀcurrentꢀtoꢀ
CC
whenꢀtheꢀpinꢀisꢀfloated.ꢀTyingꢀthisꢀpinꢀtoꢀINTV ꢀforcesꢀ
theꢀcurrentꢀcomparator.
CC
continuousꢀinductorꢀcurrentꢀoperation.ꢀTyingꢀthisꢀpinꢀtoꢀ
FREQ (Pin 3/Pin 5):ꢀTheꢀFrequencyꢀControlꢀPinꢀforꢀtheꢀ
InternalꢀVCO.ꢀConnectingꢀthisꢀpinꢀtoꢀGNDꢀforcesꢀtheꢀVCOꢀ
toꢀaꢀfixedꢀlowꢀfrequencyꢀofꢀ350kHz.ꢀConnectingꢀthisꢀpinꢀ
aꢀvoltageꢀgreaterꢀthanꢀ1.2VꢀandꢀlessꢀthanꢀINTV ꢀ–ꢀ1.3Vꢀ
CC
selectsꢀpulse-skippingꢀoperation.ꢀ
SGND (Pin 5, Exposed Pad Pin 29/Pin 7):ꢀSmall-signalꢀ
groundꢀ commonꢀ toꢀ bothꢀ controllers,ꢀ mustꢀ beꢀ routedꢀ
separatelyꢀfromꢀhighꢀcurrentꢀgroundsꢀtoꢀtheꢀcommonꢀ(–)ꢀ
toꢀINTV ꢀforcesꢀtheꢀVCOꢀtoꢀaꢀfixedꢀhighꢀfrequencyꢀofꢀ
CC
535kHz.ꢀOtherꢀfrequenciesꢀbetweenꢀ50kHzꢀandꢀ900kHzꢀcanꢀ
beꢀprogrammedꢀusingꢀaꢀresistorꢀbetweenꢀFREQꢀandꢀGND.ꢀ
Anꢀinternalꢀ20µAꢀpull-upꢀcurrentꢀdevelopsꢀtheꢀvoltageꢀtoꢀ
beꢀusedꢀbyꢀtheꢀVCOꢀtoꢀcontrolꢀtheꢀfrequencyꢀ
terminalsꢀofꢀtheꢀC ꢀcapacitors.ꢀTheꢀexposedꢀpadꢀ(QFNꢀ
IN
only)ꢀ mustꢀ beꢀ solderedꢀ toꢀ theꢀ PCBꢀ forꢀ ratedꢀ thermalꢀ
performance.
PLLIN/MODE (Pin 4/Pin 6):ꢀ Externalꢀ Synchronizationꢀ
InputꢀtoꢀPhaseꢀDetectorꢀandꢀForcedꢀContinuousꢀModeꢀ
Input.ꢀWhenꢀanꢀexternalꢀclockꢀisꢀappliedꢀtoꢀthisꢀpin,ꢀtheꢀ
phase-lockedꢀloopꢀwillꢀforceꢀtheꢀrisingꢀTG1ꢀsignalꢀtoꢀbeꢀ
synchronizedꢀwithꢀtheꢀrisingꢀedgeꢀofꢀtheꢀexternalꢀclock.ꢀ
Whenꢀnotꢀsynchronizingꢀtoꢀanꢀexternalꢀclock,ꢀthisꢀinput,ꢀ
whichꢀ actsꢀ onꢀ bothꢀ controllers,ꢀ determinesꢀ howꢀ theꢀ
RUN1, RUN2 (Pin 6, Pin 8/Pin 7, Pin 9):ꢀDigitalꢀRunꢀ
ControlꢀInputsꢀforꢀEachꢀController.ꢀForcingꢀeitherꢀofꢀtheseꢀ
pinsꢀbelowꢀ1.26Vꢀshutsꢀdownꢀthatꢀcontroller.ꢀForcingꢀbothꢀ
ofꢀtheseꢀpinsꢀbelowꢀ0.7VꢀshutsꢀdownꢀtheꢀentireꢀLTC3868-1,ꢀ
reducingꢀquiescentꢀcurrentꢀtoꢀapproximatelyꢀ8µA.ꢀDoꢀnotꢀ
floatꢀtheseꢀpins.ꢀ
38681fb
ꢇ
LTC3868-1
pin FuncTions (QFN/SSOP)
INTV (Pin 17/Pin 19):ꢀOutputꢀofꢀtheꢀInternalꢀLinearꢀLowꢀ
TG1, TG2 (Pin 24, Pin 26/Pin 13, Pin 15):ꢀHighꢀCurrentꢀ
GateꢀDrivesꢀforꢀTopꢀN-ChannelꢀMOSFETs.ꢀTheseꢀareꢀtheꢀ
outputsꢀofꢀfloatingꢀdriversꢀwithꢀaꢀvoltageꢀswingꢀequalꢀtoꢀ
CC
Dropoutꢀ Regulator.ꢀ Theꢀ driverꢀ andꢀ controlꢀ circuitsꢀ areꢀ
poweredꢀfromꢀthisꢀvoltageꢀsource.ꢀMustꢀbeꢀdecoupledꢀtoꢀ
powerꢀgroundꢀwithꢀaꢀminimumꢀofꢀ4.7µFꢀceramicꢀorꢀotherꢀ
INTV ꢀ–ꢀ0.5Vꢀsuperimposedꢀonꢀtheꢀswitchꢀnodeꢀvoltageꢀ
CC
lowꢀESRꢀcapacitor.ꢀDoꢀnotꢀuseꢀtheꢀINTV ꢀpinꢀforꢀanyꢀ
SW.
CC
otherꢀpurpose.
PGOOD1 (Pin 25/Pin 27):ꢀ Open-Drainꢀ Logicꢀ Output.ꢀ
EXTV (Pin 18/Pin 20):ꢀ Externalꢀ Powerꢀ Inputꢀ toꢀ anꢀ
PGOOD1ꢀisꢀpulledꢀtoꢀgroundꢀwhenꢀtheꢀvoltageꢀonꢀtheꢀV
pinꢀisꢀnotꢀwithinꢀ 10%ꢀofꢀitsꢀsetꢀpoint.
ꢀ
CC
FB1
InternalꢀLDOꢀConnectedꢀtoꢀINTV .ꢀThisꢀLDOꢀsuppliesꢀ
CC
INTV ꢀpower,ꢀbypassingꢀtheꢀinternalꢀLDOꢀpoweredꢀfromꢀ
CC
SS1, SS2 (Pin 26, Pin 28/Pin 12, Pin 14):ꢀExternalꢀSoft-
StartꢀInput.ꢀTheꢀLTC3868-1ꢀregulatesꢀtheꢀV ꢀvoltageꢀ
V ꢀwheneverꢀEXTV ꢀisꢀhigherꢀthanꢀ4.7V.ꢀSeeꢀEXTV ꢀ
IN
CC
CC
FB1,2
ConnectionꢀinꢀtheꢀApplicationsꢀInformationꢀsection.ꢀDoꢀ
toꢀtheꢀsmallerꢀofꢀ0.8VꢀorꢀtheꢀvoltageꢀonꢀtheꢀSS1,2ꢀpin.ꢀAnꢀ
internalꢀ1µAꢀpull-upꢀcurrentꢀsourceꢀisꢀconnectedꢀtoꢀthisꢀ
pin.ꢀAꢀcapacitorꢀtoꢀgroundꢀatꢀthisꢀpinꢀsetsꢀtheꢀrampꢀtimeꢀ
toꢀfinalꢀregulatedꢀoutputꢀvoltage.ꢀThisꢀpinꢀisꢀalsoꢀusedꢀasꢀ
theꢀshort-circuitꢀlatchoffꢀtimer.
notꢀexceedꢀ14Vꢀonꢀthisꢀpin.
PGND (Pin 19/Pin 21):ꢀDriverꢀPowerꢀGround.ꢀConnectsꢀtoꢀ
theꢀsourcesꢀofꢀbottomꢀ(synchronous)ꢀN-channelꢀMOSFETsꢀ
andꢀtheꢀ(–)ꢀterminal(s)ꢀofꢀC .
IN
V
(Pin 20/Pin 22):ꢀMainꢀSupplyꢀPin.ꢀAꢀbypassꢀcapaci-
I
, I
(Pin 27, Pin 1/Pin 11, Pin 13):ꢀErrorꢀAmplifierꢀ
IN
TH1 TH2
torꢀshouldꢀbeꢀtiedꢀbetweenꢀthisꢀpinꢀandꢀtheꢀsignalꢀgroundꢀ
OutputsꢀandꢀSwitchingꢀRegulatorꢀCompensationꢀPoints.ꢀ
Eachꢀassociatedꢀchannel’sꢀcurrentꢀcomparatorꢀtripꢀpointꢀ
increasesꢀwithꢀthisꢀcontrolꢀvoltage.
pin.
BG1, BG2 (Pin 21, Pin 23/Pin 16, Pin 18):ꢀHighꢀCurrentꢀ
Gateꢀ Drivesꢀ forꢀ Bottomꢀ (Synchronous)ꢀ N-Channelꢀ
MOSFETs.ꢀVoltageꢀswingꢀatꢀtheseꢀpinsꢀisꢀfromꢀgroundꢀ
V
, V
FB1 FB2
(Pin 28, Pin 2/Pin 10, Pin 12):ꢀReceivesꢀtheꢀ
remotelyꢀsensedꢀfeedbackꢀvoltageꢀforꢀeachꢀcontrollerꢀfromꢀ
anꢀexternalꢀresistiveꢀdividerꢀacrossꢀtheꢀoutput.
toꢀINTV .
CC
+
+
BOOST1, BOOST2 (Pin 22, Pin 24/Pin 15, Pin 17):ꢀ
BootstrappedꢀSuppliesꢀtoꢀtheꢀTopsideꢀFloatingꢀDrivers.ꢀ
CapacitorsꢀareꢀconnectedꢀbetweenꢀtheꢀBOOSTꢀandꢀSWꢀpinsꢀ
SENSE1 , SENSE2 (Pin 1, Pin 3/Pin 9, Pin 11):ꢀTheꢀ(+)ꢀ
inputꢀtoꢀtheꢀdifferentialꢀcurrentꢀcomparatorsꢀareꢀnormallyꢀ
connectedꢀtoꢀDCRꢀsensingꢀnetworksꢀorꢀcurrentꢀsensingꢀ
andꢀSchottkyꢀdiodesꢀareꢀtiedꢀbetweenꢀtheꢀBOOSTꢀandꢀINTV ꢀ
resistors.ꢀTheꢀI ꢀpinꢀvoltageꢀandꢀcontrolledꢀoffsetsꢀbetweenꢀ
CC
TH
–
+
pins.ꢀVoltageꢀswingꢀatꢀtheꢀBOOSTꢀpinsꢀisꢀfromꢀINTV ꢀtoꢀ
theꢀSENSE ꢀandꢀSENSE ꢀpinsꢀinꢀconjunctionꢀwithꢀR
ꢀ
CC
SENSE
(V ꢀ+ꢀINTV ).
setꢀtheꢀcurrentꢀtripꢀthreshold.
IN
CC
SW1, SW2 (Pin 23, Pin 25/Pin 14, Pin 16):ꢀSwitchꢀNodeꢀ
ConnectionsꢀtoꢀInductors.ꢀ
38681fb
ꢈ
LTC3868-1
FuncTional DiagraM
INTV
V
IN
CC
DUPLICATE FOR SECOND
CONTROLLER CHANNEL
BOOST
D
B
C
B
TG
DROP
OUT
DET
TOP
BOT
+
C
PGOOD1
0.88V
IN
D
BOT
–
SW
TOP ON
V
S
R
Q
FB1
+
INTV
CC
Q
–
SWITCH
LOGIC
0.72V
BG
SHDN
C
OUT
PGND
20µA
FREQ
V
OUT
VCO
CLK2
CLK1
+
–
R
SENSE
0.425V
SLEEP
L
ICMP
IR
+
–
+
–
PFD
+
+
–
–
+
3mV
SENSE
SENSE
SYNC
DET
2(V
)
FB
0.45V
PLLIN/MODE
–
100k
SLOPE COMP
V
FB
R
B
+
V
IN
0.80V
TRACK/SS
EA
–
R
A
EXTV
CC
+
–
OV
C
C
0.88V
I
TH
5.1V
LDO
EN
5.1V
LDO
EN
SHDN
RST
FB
C
C2
R
C
0.5µA
FOLDBACK
+
–
2(V
)
1µA
4.7V
SS
11V
SGND
INTV
RUN
CC
SHORT CKT
LATCH-OFF
C
SHDN
10µA
SS
38681 FD
38681fb
ꢀ0
LTC3868-1
operaTion (Refer to the Functional Diagram)
Main Control Loop
Shutdown and Start-Up (RUN1, RUN2 and
SS1, SS2 Pins)
TheꢀLTC3868-1ꢀusesꢀaꢀconstantꢀfrequency,ꢀcurrentꢀmodeꢀ
step-downꢀarchitectureꢀwithꢀtheꢀtwoꢀcontrollerꢀchannelsꢀ
operatingꢀ180ꢀdegreesꢀoutꢀofꢀphase.ꢀDuringꢀnormalꢀop-
eration,ꢀeachꢀexternalꢀtopꢀMOSFETꢀisꢀturnedꢀonꢀwhenꢀtheꢀ
clockꢀforꢀthatꢀchannelꢀsetsꢀtheꢀRSꢀlatch,ꢀandꢀisꢀturnedꢀoffꢀ
whenꢀtheꢀmainꢀcurrentꢀcomparator,ꢀICMP,ꢀresetsꢀtheꢀRSꢀ
latch.ꢀTheꢀpeakꢀinductorꢀcurrentꢀatꢀwhichꢀICMPꢀtripsꢀandꢀ
TheꢀtwoꢀchannelsꢀofꢀtheꢀLTC3868-1ꢀcanꢀbeꢀindependentlyꢀ
shutꢀdownꢀusingꢀtheꢀRUN1ꢀandꢀRUN2ꢀpins.ꢀPullingꢀeitherꢀofꢀ
theseꢀpinsꢀbelowꢀ1.26Vꢀshutsꢀdownꢀtheꢀmainꢀcontrolꢀloopꢀ
forꢀthatꢀcontroller.ꢀPullingꢀbothꢀpinsꢀbelowꢀ0.7Vꢀdisablesꢀ
bothꢀcontrollersꢀandꢀmostꢀinternalꢀcircuits,ꢀincludingꢀtheꢀ
INTV ꢀLDOs.ꢀInꢀthisꢀstate,ꢀtheꢀLTC3868-1ꢀdrawsꢀonlyꢀ8µAꢀ
CC
resetsꢀtheꢀlatchꢀisꢀcontrolledꢀbyꢀtheꢀvoltageꢀonꢀtheꢀI ꢀpin,ꢀ
ofꢀquiescentꢀcurrent.
TH
whichꢀisꢀtheꢀoutputꢀofꢀtheꢀerrorꢀamplifier,ꢀEA.ꢀTheꢀerrorꢀ
TheꢀRUNꢀpinꢀmayꢀbeꢀexternallyꢀpulledꢀupꢀorꢀdrivenꢀdirectlyꢀ
byꢀlogic.ꢀWhenꢀdrivingꢀtheꢀRUNꢀpinꢀwithꢀaꢀlowꢀimpedanceꢀ
source,ꢀdoꢀnotꢀexceedꢀtheꢀabsoluteꢀmaximumꢀratingꢀofꢀ
8V.ꢀTheꢀRUNꢀpinꢀhasꢀanꢀinternalꢀ11Vꢀvoltageꢀclampꢀthatꢀ
allowsꢀtheꢀRUNꢀpinꢀtoꢀbeꢀconnectedꢀthroughꢀaꢀresistorꢀtoꢀaꢀ
amplifierꢀcomparesꢀtheꢀoutputꢀvoltageꢀfeedbackꢀsignalꢀatꢀ
theꢀV ꢀpinꢀ(whichꢀisꢀgeneratedꢀwithꢀanꢀexternalꢀresistorꢀ
FB
dividerꢀ connectedꢀ acrossꢀ theꢀ outputꢀ voltage,ꢀ V ,ꢀ toꢀ
OUTꢀ
ground)ꢀtoꢀtheꢀinternalꢀ0.800Vꢀreferenceꢀvoltage.ꢀWhenꢀtheꢀ
loadꢀcurrentꢀincreases,ꢀitꢀcausesꢀaꢀslightꢀdecreaseꢀinꢀV ꢀ
FB
higherꢀvoltageꢀ(forꢀexample,ꢀV ),ꢀsoꢀlongꢀasꢀtheꢀmaximumꢀ
IN
relativeꢀtoꢀtheꢀreference,ꢀwhichꢀcausesꢀtheꢀEAꢀtoꢀincreaseꢀ
currentꢀintoꢀtheꢀRUNꢀpinꢀdoesꢀnotꢀexceedꢀ100µA.
theꢀI ꢀvoltageꢀuntilꢀtheꢀaverageꢀinductorꢀcurrentꢀmatchesꢀ
TH
Theꢀstart-upꢀofꢀeachꢀcontroller’sꢀoutputꢀvoltageꢀV ꢀisꢀ
theꢀnewꢀloadꢀcurrent.
OUT
controlledꢀbyꢀtheꢀvoltageꢀonꢀtheꢀSSꢀpinꢀforꢀthatꢀchannel.ꢀ
AfterꢀtheꢀtopꢀMOSFETꢀisꢀturnedꢀoffꢀeachꢀcycle,ꢀtheꢀbottomꢀ
MOSFETꢀisꢀturnedꢀonꢀuntilꢀeitherꢀtheꢀinductorꢀcurrentꢀstartsꢀ
toꢀreverse,ꢀasꢀindicatedꢀbyꢀtheꢀcurrentꢀcomparatorꢀIR,ꢀorꢀ
theꢀbeginningꢀofꢀtheꢀnextꢀclockꢀcycle.
WhenꢀtheꢀvoltageꢀonꢀtheꢀSSꢀpinꢀisꢀlessꢀthanꢀtheꢀ0.8Vꢀ
internalꢀreference,ꢀtheꢀLTC3868-1ꢀregulatesꢀtheꢀV ꢀvolt-
FB
ageꢀtoꢀtheꢀSSꢀpinꢀvoltageꢀinsteadꢀofꢀtheꢀ0.8Vꢀreference.ꢀ
ThisꢀallowsꢀtheꢀSSꢀpinꢀtoꢀbeꢀusedꢀtoꢀprogramꢀaꢀsoft-startꢀ
byꢀconnectingꢀanꢀexternalꢀcapacitorꢀfromꢀtheꢀSSꢀpinꢀtoꢀ
SGND.ꢀAnꢀinternalꢀ1µAꢀpull-upꢀcurrentꢀchargesꢀthisꢀca-
pacitorꢀcreatingꢀaꢀvoltageꢀrampꢀonꢀtheꢀSSꢀpin.ꢀAsꢀtheꢀSSꢀ
voltageꢀrisesꢀlinearlyꢀfromꢀ0Vꢀtoꢀ0.8Vꢀ(andꢀbeyondꢀupꢀtoꢀ
theꢀabsoluteꢀmaximumꢀratingꢀofꢀ6V),ꢀtheꢀoutputꢀvoltageꢀ
INTV /EXTV Power
CC
CC
PowerꢀforꢀtheꢀtopꢀandꢀbottomꢀMOSFETꢀdriversꢀandꢀmostꢀ
otherꢀinternalꢀcircuitryꢀisꢀderivedꢀfromꢀtheꢀINTV ꢀpin.ꢀWhenꢀ
CC
theꢀEXTV ꢀpinꢀisꢀleftꢀopenꢀorꢀtiedꢀtoꢀaꢀvoltageꢀlessꢀthanꢀ
CC
4.7V,ꢀtheꢀV ꢀLDOꢀ(lowꢀdropoutꢀlinearꢀregulator)ꢀsuppliesꢀ
IN
V ꢀrisesꢀsmoothlyꢀfromꢀzeroꢀtoꢀitsꢀfinalꢀvalue.
OUT
5.1VꢀfromꢀV ꢀtoꢀINTV .ꢀIfꢀEXTV ꢀisꢀtakenꢀaboveꢀ4.7V,ꢀ
IN
CC
CC
theꢀV ꢀLDOꢀisꢀturnedꢀoffꢀandꢀanꢀEXTV ꢀLDOꢀisꢀturnedꢀon.ꢀ
Short-Circuit Latchoff
IN
CC
Onceꢀenabled,ꢀtheꢀEXTV ꢀLDOꢀsuppliesꢀ5.1VꢀfromꢀEXTV ꢀ
CC
CC
Afterꢀtheꢀcontrollerꢀhasꢀbeenꢀstartedꢀandꢀbeenꢀgivenꢀad-
equateꢀtimeꢀtoꢀrampꢀupꢀtheꢀoutputꢀvoltage,ꢀtheꢀSSꢀcapaci-
torꢀisꢀusedꢀinꢀaꢀshort-circuitꢀtimeoutꢀcircuit.ꢀSpecifically,ꢀ
onceꢀtheꢀvoltageꢀonꢀtheꢀSSꢀpinꢀrisesꢀaboveꢀ2Vꢀ(theꢀarmingꢀ
threshold),ꢀtheꢀshort-circuitꢀtimeoutꢀcircuitꢀisꢀenabledꢀ(seeꢀ
Figureꢀ1).ꢀIfꢀtheꢀoutputꢀvoltageꢀfallsꢀbelowꢀ70%ꢀofꢀitsꢀnomi-
nalꢀregulatedꢀvoltage,ꢀtheꢀSSꢀcapacitorꢀbeginsꢀdischarg-
ingꢀwithꢀaꢀnetꢀ9µAꢀpulldownꢀcurrentꢀonꢀtheꢀassumptionꢀ
thatꢀtheꢀoutputꢀisꢀinꢀanꢀovercurrentꢀand/orꢀshort-circuitꢀ
condition.ꢀIfꢀtheꢀconditionꢀlastsꢀlongꢀenoughꢀtoꢀallowꢀtheꢀ
SSꢀpinꢀvoltageꢀtoꢀfallꢀbelowꢀ1.5Vꢀ(theꢀlatchoffꢀthreshold),ꢀ
theꢀcontrollerꢀwillꢀshutꢀdownꢀ(latchꢀoff)ꢀuntilꢀtheꢀRUNꢀpinꢀ
toꢀINTV .ꢀUsingꢀtheꢀEXTV ꢀpinꢀallowsꢀtheꢀINTV ꢀpowerꢀ
CC
CC
CC
toꢀbeꢀderivedꢀfromꢀaꢀhighꢀefficiencyꢀexternalꢀsourceꢀsuchꢀ
asꢀoneꢀofꢀtheꢀLTC3868-1ꢀswitchingꢀregulatorꢀoutputs.
EachꢀtopꢀMOSFETꢀdriverꢀisꢀbiasedꢀfromꢀtheꢀfloatingꢀboot-
strapꢀcapacitor,ꢀC ,ꢀwhichꢀnormallyꢀrechargesꢀduringꢀeachꢀ
B
cycleꢀthroughꢀanꢀexternalꢀdiodeꢀwhenꢀtheꢀtopꢀMOSFETꢀ
turnsꢀoff.ꢀIfꢀtheꢀinputꢀvoltageꢀV ꢀdecreasesꢀtoꢀaꢀvoltageꢀ
IN
closeꢀtoꢀV ,ꢀtheꢀloopꢀmayꢀenterꢀdropoutꢀandꢀattemptꢀ
OUTꢀ
toꢀturnꢀonꢀtheꢀtopꢀMOSFETꢀcontinuously.ꢀTheꢀdropoutꢀ
detectorꢀdetectsꢀthisꢀandꢀforcesꢀtheꢀtopꢀMOSFETꢀoffꢀforꢀ
aboutꢀone-twelfthꢀofꢀtheꢀclockꢀperiodꢀeveryꢀtenthꢀcycleꢀtoꢀ
allowꢀC ꢀtoꢀrecharge.
voltageꢀorꢀtheꢀV ꢀvoltageꢀisꢀrecycled.
B
IN
38681fb
ꢀꢀ
LTC3868-1
operaTion (Refer to the Functional Diagram)
INTV
CC
currentꢀisꢀprovidedꢀdueꢀtoꢀinternalꢀcurrentꢀfoldbackꢀandꢀ
actualꢀpowerꢀwastedꢀisꢀlowꢀdueꢀtoꢀtheꢀefficientꢀnatureꢀofꢀ
theꢀcurrentꢀmodeꢀswitchingꢀregulator.ꢀFoldbackꢀcurrentꢀ
limitingꢀisꢀdisabledꢀduringꢀtheꢀsoft-startꢀintervalꢀ(asꢀlongꢀ
SS VOLTAGE
2V
1.5V
0.8V
asꢀtheꢀV ꢀvoltageꢀisꢀkeepingꢀupꢀwithꢀtheꢀSSꢀvoltage).ꢀ
LATCHOFF
COMMAND
FB
Light Load Current Operation (Burst Mode Operation,
Pulse-Skipping or Forced Continuous Mode)
(PLLIN/MODE Pin)
0V
SS PIN
CURRENT
1µA
1µA
–9µA
OUTPUT
VOLTAGE
TheꢀLTC3868-1ꢀcanꢀbeꢀenabledꢀtoꢀenterꢀhighꢀefficiencyꢀ
BurstꢀModeꢀoperation,ꢀconstantꢀfrequencyꢀpulse-skippingꢀ
mode,ꢀorꢀforcedꢀcontinuousꢀconductionꢀmodeꢀatꢀlowꢀloadꢀ
currents.ꢀToꢀselectꢀBurstꢀModeꢀoperation,ꢀtieꢀtheꢀPLLIN/ꢀ
MODEꢀpinꢀtoꢀground.ꢀToꢀselectꢀforcedꢀcontinuousꢀopera-
38681 F01
LATCHOFF
ENABLE
ARMING
SOFT-START INTERVAL
t
LATCH
tion,ꢀtieꢀtheꢀPLLIN/MODEꢀpinꢀtoꢀINTV .ꢀToꢀselectꢀpulse-
CC
Figure 1. Latchoff Timing Diagram
skippingꢀmode,ꢀtieꢀtheꢀPLLIN/MODEꢀpinꢀtoꢀaꢀDCꢀvoltageꢀ
greaterꢀthanꢀ1.2VꢀandꢀlessꢀthanꢀINTV ꢀ–ꢀ1.3V.
CC
Theꢀdelayꢀtimeꢀfromꢀwhenꢀaꢀshort-circuitꢀoccursꢀuntilꢀtheꢀ
controllerꢀlatchesꢀoffꢀcanꢀbeꢀcalculatedꢀusingꢀtheꢀfollow-
ingꢀequation
WhenꢀaꢀcontrollerꢀisꢀenabledꢀforꢀBurstꢀModeꢀoperation,ꢀ
theꢀminimumꢀpeakꢀcurrentꢀinꢀtheꢀinductorꢀisꢀsetꢀtoꢀap-
proximatelyꢀ30%ꢀofꢀtheꢀmaximumꢀsenseꢀvoltageꢀevenꢀ
ꢀ t
ꢀ~ꢀC ꢀ(V ꢀ–ꢀ1.5V)/9µA
SS SS
LATCH
thoughꢀtheꢀvoltageꢀonꢀtheꢀI ꢀpinꢀindicatesꢀaꢀlowerꢀvalue.ꢀ
TH
Ifꢀtheꢀaverageꢀinductorꢀcurrentꢀisꢀhigherꢀthanꢀtheꢀloadꢀ
current,ꢀtheꢀerrorꢀamplifier,ꢀEA,ꢀwillꢀdecreaseꢀtheꢀvoltageꢀ
onꢀtheꢀI ꢀpin.ꢀWhenꢀtheꢀI ꢀvoltageꢀdropsꢀbelowꢀ0.425V,ꢀ
whereꢀV ꢀisꢀtheꢀinitialꢀvoltageꢀ(mustꢀbeꢀgreaterꢀthanꢀ2V)ꢀ
SS
onꢀtheꢀSSꢀpinꢀatꢀtheꢀtimeꢀtheꢀshort-circuitꢀoccurs.ꢀNormallyꢀ
theꢀSSꢀpinꢀvoltageꢀwillꢀhaveꢀbeenꢀpulledꢀupꢀtoꢀtheꢀINTV ꢀ
TH
TH
CC
theꢀinternalꢀsleepꢀsignalꢀgoesꢀhighꢀ(enablingꢀsleepꢀmode)ꢀ
voltageꢀ(5.1V)ꢀbyꢀtheꢀinternalꢀ1µAꢀpull-upꢀcurrent.
andꢀbothꢀexternalꢀMOSFETsꢀareꢀturnedꢀoff.ꢀ
NoteꢀthatꢀtheꢀtwoꢀcontrollersꢀonꢀtheꢀLTC3868-1ꢀhaveꢀsepa-
rate,ꢀindependentꢀshort-circuitꢀlatchoffꢀcircuits.ꢀLatchoffꢀ
canꢀbeꢀoverridden/defeatedꢀbyꢀconnectingꢀaꢀresistorꢀ150kꢀ
Inꢀsleepꢀmode,ꢀmuchꢀofꢀtheꢀinternalꢀcircuitryꢀisꢀturnedꢀoff,ꢀ
reducingꢀtheꢀquiescentꢀcurrent.ꢀIfꢀoneꢀchannelꢀisꢀshutꢀdownꢀ
andꢀtheꢀotherꢀchannelꢀisꢀinꢀsleepꢀmode,ꢀtheꢀLTC3868-1ꢀ
drawsꢀonlyꢀ170µAꢀofꢀquiescentꢀcurrent.ꢀIfꢀbothꢀchannelsꢀ
areꢀinꢀsleepꢀmode,ꢀtheꢀLTC3868-1ꢀdrawsꢀonlyꢀ300µAꢀofꢀqui-
escentꢀcurrent.ꢀInꢀsleepꢀmode,ꢀtheꢀloadꢀcurrentꢀisꢀsuppliedꢀ
byꢀtheꢀoutputꢀcapacitor.ꢀAsꢀtheꢀoutputꢀvoltageꢀdecreases,ꢀ
theꢀEA’sꢀoutputꢀbeginsꢀtoꢀrise.ꢀWhenꢀtheꢀoutputꢀvoltageꢀ
orꢀlessꢀfromꢀtheꢀSSꢀpinꢀtoꢀINTV .ꢀThisꢀresistorꢀprovidesꢀ
CC
enoughꢀpull-upꢀcurrentꢀtoꢀovercomeꢀtheꢀ9µAꢀpull-downꢀ
currentꢀpresentꢀduringꢀaꢀshort-circuit.ꢀNoteꢀthatꢀthisꢀresis-
torꢀalsoꢀshortensꢀtheꢀsoft-startꢀperiod.
Foldback Current
dropsꢀenough,ꢀtheꢀI ꢀpinꢀisꢀreconnectedꢀtoꢀtheꢀoutputꢀ
TH
Onꢀtheꢀotherꢀhand,ꢀwhenꢀtheꢀoutputꢀvoltageꢀfallsꢀtoꢀlessꢀ
thanꢀ70%ꢀofꢀitsꢀnominalꢀlevel,ꢀfoldbackꢀcurrentꢀlimitingꢀ
isꢀalsoꢀactivated,ꢀprogressivelyꢀloweringꢀtheꢀpeakꢀcurrentꢀ
limitꢀinꢀproportionꢀtoꢀtheꢀseverityꢀofꢀtheꢀovercurrentꢀorꢀ
short-circuitꢀcondition.ꢀEvenꢀifꢀaꢀshort-circuitꢀisꢀpresentꢀ
andꢀtheꢀshort-circuitꢀlatchoffꢀisꢀnotꢀyetꢀenabledꢀ(whenꢀ
SSꢀvoltageꢀhasꢀnotꢀyetꢀreachedꢀ2V),ꢀaꢀsafe,ꢀlowꢀoutputꢀ
ofꢀtheꢀEA,ꢀtheꢀsleepꢀsignalꢀgoesꢀlow,ꢀandꢀtheꢀcontrollerꢀ
resumesꢀnormalꢀoperationꢀbyꢀturningꢀonꢀtheꢀtopꢀexternalꢀ
MOSFETꢀonꢀtheꢀnextꢀcycleꢀofꢀtheꢀinternalꢀoscillator.
WhenꢀaꢀcontrollerꢀisꢀenabledꢀforꢀBurstꢀModeꢀoperation,ꢀ
theꢀinductorꢀcurrentꢀisꢀnotꢀallowedꢀtoꢀreverse.ꢀTheꢀreverseꢀ
38681fb
ꢀꢁ
LTC3868-1
operaTion (Refer to the Functional Diagram)
currentꢀ comparator,ꢀ IR,ꢀ turnsꢀ offꢀ theꢀ bottomꢀ externalꢀ IfꢀtheꢀPLLIN/MODEꢀpinꢀisꢀnotꢀbeingꢀdrivenꢀbyꢀanꢀexternalꢀ
MOSFETꢀjustꢀbeforeꢀtheꢀinductorꢀcurrentꢀreachesꢀzero,ꢀ clockꢀsource,ꢀtheꢀFREQꢀpinꢀcanꢀbeꢀtiedꢀtoꢀSGND,ꢀtiedꢀtoꢀ
preventingꢀitꢀfromꢀreversingꢀandꢀgoingꢀnegative.ꢀThus,ꢀ INTV ꢀorꢀprogrammedꢀthroughꢀanꢀexternalꢀresistor.ꢀTyingꢀ
CC
theꢀcontrollerꢀisꢀinꢀdiscontinuousꢀoperation.
FREQꢀtoꢀSGNDꢀselectsꢀ350kHzꢀwhileꢀtyingꢀFREQꢀtoꢀINTV ꢀ
CC
selectsꢀ 535kHz.ꢀ Placingꢀ aꢀ resistorꢀ betweenꢀ FREQꢀ andꢀ
SGNDꢀallowsꢀtheꢀfrequencyꢀtoꢀbeꢀprogrammedꢀbetweenꢀ
50kHzꢀandꢀ900kHz.
Inꢀforcedꢀcontinuousꢀoperationꢀorꢀwhenꢀclockedꢀbyꢀanꢀ
externalꢀclockꢀsourceꢀtoꢀuseꢀtheꢀphase-lockedꢀloopꢀ(seeꢀ
Frequencyꢀ Selectionꢀ andꢀ Phase-Lockedꢀ Loopꢀ section),ꢀ
theꢀinductorꢀcurrentꢀisꢀallowedꢀtoꢀreverseꢀatꢀlightꢀloadsꢀ Aꢀphase-lockedꢀloopꢀ(PLL)ꢀisꢀavailableꢀonꢀtheꢀLTC3868-1ꢀ
orꢀunderꢀlargeꢀtransientꢀconditions.ꢀTheꢀpeakꢀinductorꢀ toꢀsynchronizeꢀtheꢀinternalꢀoscillatorꢀtoꢀanꢀexternalꢀclockꢀ
currentꢀisꢀdeterminedꢀbyꢀtheꢀvoltageꢀonꢀtheꢀI ꢀpin,ꢀjustꢀ sourceꢀthatꢀisꢀconnectedꢀtoꢀtheꢀPLLIN/MODEꢀpin.ꢀTheꢀ
TH
asꢀinꢀnormalꢀoperation.ꢀInꢀthisꢀmode,ꢀtheꢀefficiencyꢀatꢀlightꢀ phaseꢀdetectorꢀadjustsꢀtheꢀvoltageꢀ(throughꢀanꢀinternalꢀ
loadsꢀisꢀlowerꢀthanꢀinꢀBurstꢀModeꢀoperation.ꢀHowever,ꢀ lowpassꢀfilter)ꢀofꢀtheꢀVCOꢀinputꢀtoꢀalignꢀtheꢀturn-onꢀofꢀ
continuousꢀoperationꢀhasꢀtheꢀadvantagesꢀofꢀlowerꢀoutputꢀ controllerꢀ1’sꢀexternalꢀtopꢀMOSFETꢀtoꢀtheꢀrisingꢀedgeꢀofꢀ
voltageꢀrippleꢀandꢀlessꢀinterferenceꢀtoꢀaudioꢀcircuitry.ꢀInꢀ theꢀsynchronizingꢀsignal.ꢀThus,ꢀtheꢀturn-onꢀofꢀcontrollerꢀ
forcedꢀcontinuousꢀmode,ꢀtheꢀoutputꢀrippleꢀisꢀindependentꢀ 2’sꢀexternalꢀtopꢀMOSFETꢀisꢀ180ꢀdegreesꢀoutꢀofꢀphaseꢀtoꢀ
ofꢀloadꢀcurrent.
theꢀrisingꢀedgeꢀofꢀtheꢀexternalꢀclockꢀsource.
WhenꢀtheꢀPLLIN/MODEꢀpinꢀisꢀconnectedꢀforꢀpulse-skippingꢀ TheꢀVCOꢀinputꢀvoltageꢀisꢀprebiasedꢀtoꢀtheꢀoperatingꢀfre-
mode,ꢀtheꢀLTC3868-1ꢀoperatesꢀinꢀPWMꢀpulse-skippingꢀ quencyꢀsetꢀbyꢀtheꢀFREQꢀpinꢀbeforeꢀtheꢀexternalꢀclockꢀisꢀ
modeꢀatꢀlightꢀloads.ꢀInꢀthisꢀmode,ꢀconstantꢀfrequencyꢀ applied.ꢀIfꢀprebiasedꢀnearꢀtheꢀexternalꢀclockꢀfrequency,ꢀ
operationꢀisꢀmaintainedꢀdownꢀtoꢀapproximatelyꢀ1%ꢀofꢀ theꢀPLLꢀloopꢀonlyꢀneedsꢀtoꢀmakeꢀslightꢀchangesꢀtoꢀtheꢀ
designedꢀmaximumꢀoutputꢀcurrent.ꢀAtꢀveryꢀlightꢀloads,ꢀtheꢀ VCOꢀinputꢀinꢀorderꢀtoꢀsynchronizeꢀtheꢀrisingꢀedgeꢀofꢀtheꢀ
currentꢀcomparator,ꢀICMP,ꢀmayꢀremainꢀtrippedꢀforꢀseveralꢀ externalꢀclock’sꢀtoꢀtheꢀrisingꢀedgeꢀofꢀTG1.ꢀTheꢀabilityꢀtoꢀ
cyclesꢀandꢀforceꢀtheꢀexternalꢀtopꢀMOSFETꢀtoꢀstayꢀoffꢀforꢀ prebiasꢀtheꢀloopꢀfilterꢀallowsꢀtheꢀPLLꢀtoꢀlock-inꢀrapidlyꢀ
theꢀsameꢀnumberꢀofꢀcyclesꢀ(i.e.,ꢀskippingꢀpulses).ꢀTheꢀ withoutꢀdeviatingꢀfarꢀfromꢀtheꢀdesiredꢀfrequency.
inductorꢀcurrentꢀisꢀnotꢀallowedꢀtoꢀreverseꢀ(discontinuousꢀ
Theꢀtypicalꢀcaptureꢀrangeꢀofꢀtheꢀphase-lockedꢀloopꢀisꢀfromꢀ
operation).ꢀThisꢀmode,ꢀlikeꢀforcedꢀcontinuousꢀoperation,ꢀ
approximatelyꢀ55kHzꢀtoꢀ1MHz,ꢀwithꢀaꢀguaranteeꢀoverꢀallꢀ
exhibitsꢀlowꢀoutputꢀrippleꢀasꢀwellꢀasꢀlowꢀaudioꢀnoiseꢀandꢀ
manufacturingꢀvariationsꢀtoꢀbeꢀbetweenꢀ75kHzꢀandꢀ850kHz.ꢀ
reducedꢀRFꢀinterferenceꢀwhenꢀcomparedꢀtoꢀBurstꢀModeꢀ
Inꢀotherꢀwords,ꢀtheꢀLTC3868-1’sꢀPLLꢀisꢀguaranteedꢀtoꢀlockꢀ
operation.ꢀ Itꢀ providesꢀ higherꢀ lightꢀ loadꢀ efficiencyꢀ thanꢀ
toꢀanꢀexternalꢀclockꢀsourceꢀwhoseꢀfrequencyꢀisꢀbetweenꢀ
forcedꢀcontinuousꢀmode,ꢀbutꢀnotꢀnearlyꢀasꢀhighꢀasꢀBurstꢀ
75kHzꢀandꢀ850kHz.
Modeꢀoperation.
TheꢀtypicalꢀinputꢀclockꢀthresholdsꢀonꢀtheꢀPLLIN/MODEꢀ
pinꢀareꢀ1.6Vꢀ(rising)ꢀandꢀ1.1Vꢀ(falling).
Frequency Selection and Phase-Locked Loop
(FREQ and PLLIN/MODE Pins)
Output Overvoltage Protection
Theꢀselectionꢀofꢀswitchingꢀfrequencyꢀisꢀaꢀtradeꢀoffꢀbetweenꢀ
efficiencyꢀ andꢀ componentꢀ size.ꢀ Lowꢀ frequencyꢀ opera-
tionꢀincreasesꢀefficiencyꢀbyꢀreducingꢀMOSFETꢀswitchingꢀ
losses,ꢀbutꢀrequiresꢀlargerꢀinductanceꢀand/orꢀcapacitanceꢀ
toꢀmaintainꢀlowꢀoutputꢀrippleꢀvoltage.
Anꢀovervoltageꢀcomparatorꢀguardsꢀagainstꢀtransientꢀover-
shootsꢀasꢀwellꢀasꢀotherꢀmoreꢀseriousꢀconditionsꢀthatꢀmayꢀ
overvoltageꢀtheꢀoutput.ꢀWhenꢀtheꢀV ꢀpinꢀrisesꢀbyꢀmoreꢀ
FB
thanꢀ10%ꢀaboveꢀitsꢀregulationꢀpointꢀofꢀ0.800V,ꢀtheꢀtopꢀ
MOSFETꢀisꢀturnedꢀoffꢀandꢀtheꢀbottomꢀMOSFETꢀisꢀturnedꢀ
onꢀuntilꢀtheꢀovervoltageꢀconditionꢀisꢀcleared.
TheꢀswitchingꢀfrequencyꢀofꢀtheꢀLTC3868-1’sꢀcontrollersꢀ
canꢀbeꢀselectedꢀusingꢀtheꢀFREQꢀpin.
38681fb
ꢀꢂ
LTC3868-1
operaTion (Refer to the Functional Diagram)
Power Good (PGOOD) Pin
pulsesꢀincreasedꢀtheꢀtotalꢀRMSꢀcurrentꢀflowingꢀfromꢀtheꢀ
inputꢀcapacitor,ꢀrequiringꢀtheꢀuseꢀofꢀmoreꢀexpensiveꢀinputꢀ
capacitorsꢀandꢀincreasingꢀbothꢀEMIꢀandꢀlossesꢀinꢀtheꢀinputꢀ
capacitorꢀandꢀbattery.
TheꢀPGOOD1ꢀpinꢀisꢀconnectedꢀtoꢀanꢀopenꢀdrainꢀofꢀanꢀ
internalꢀN-channelꢀMOSFET.ꢀTheꢀMOSFETꢀturnsꢀonꢀandꢀ
pullsꢀtheꢀPGOOD1ꢀpinꢀlowꢀwhenꢀtheꢀcorrespondingꢀV ꢀpinꢀ
FB1
voltageꢀisꢀnotꢀwithinꢀ 10%ꢀofꢀtheꢀ0.8Vꢀreferenceꢀvoltage.ꢀ Withꢀ 2-phaseꢀ operation,ꢀ theꢀ twoꢀ channelsꢀ ofꢀ theꢀ dualꢀ
TheꢀPGOOD1ꢀpinꢀisꢀalsoꢀpulledꢀlowꢀwhenꢀtheꢀRUN1ꢀpinꢀ switchingꢀregulatorꢀareꢀoperatedꢀ180ꢀdegreesꢀoutꢀofꢀphase.ꢀ
isꢀlowꢀ(shutꢀdown).ꢀWhenꢀtheꢀV ꢀpinꢀvoltageꢀisꢀwithinꢀ Thisꢀeffectivelyꢀinterleavesꢀtheꢀcurrentꢀpulsesꢀdrawnꢀbyꢀtheꢀ
FB1
theꢀ 10%ꢀrequirement,ꢀtheꢀMOSFETꢀisꢀturnedꢀoffꢀandꢀtheꢀ switches,ꢀgreatlyꢀreducingꢀtheꢀoverlapꢀtimeꢀwhereꢀtheyꢀaddꢀ
pinꢀisꢀallowedꢀtoꢀbeꢀpulledꢀupꢀbyꢀanꢀexternalꢀresistorꢀtoꢀaꢀ together.ꢀTheꢀresultꢀisꢀaꢀsignificantꢀreductionꢀinꢀtotalꢀRMSꢀ
sourceꢀnoꢀgreaterꢀthanꢀ6V.
inputꢀcurrent,ꢀwhichꢀinꢀturnꢀallowsꢀlessꢀexpensiveꢀinputꢀ
capacitorsꢀtoꢀbeꢀused,ꢀreducesꢀshieldingꢀrequirementsꢀforꢀ
EMIꢀandꢀimprovesꢀrealꢀworldꢀoperatingꢀefficiency.
Theory and Benefits of 2-Phase Operation
Whyꢀ theꢀ needꢀ forꢀ 2-phaseꢀ operation?ꢀ Upꢀ untilꢀ theꢀ
2-phaseꢀfamily,ꢀconstantꢀfrequencyꢀdualꢀswitchingꢀregula-
torsꢀoperatedꢀbothꢀchannelsꢀinꢀphaseꢀ(i.e.,ꢀsingleꢀphaseꢀ
operation).ꢀThisꢀmeansꢀthatꢀbothꢀswitchesꢀturnedꢀonꢀatꢀ
theꢀsameꢀtime,ꢀcausingꢀcurrentꢀpulsesꢀofꢀupꢀtoꢀtwiceꢀtheꢀ
amplitudeꢀofꢀthoseꢀforꢀoneꢀregulatorꢀtoꢀbeꢀdrawnꢀfromꢀtheꢀ
inputꢀcapacitorꢀandꢀbattery.ꢀTheseꢀlargeꢀamplitudeꢀcurrentꢀ
Figureꢀ2ꢀcomparesꢀtheꢀinputꢀwaveformsꢀforꢀaꢀrepresentativeꢀ
singleꢀphaseꢀdualꢀswitchingꢀregulatorꢀtoꢀtheꢀLTC3868-1ꢀ
2-phaseꢀ dualꢀ switchingꢀ regulator.ꢀ Anꢀ actualꢀ measure-
mentꢀofꢀtheꢀRMSꢀinputꢀcurrentꢀunderꢀtheseꢀconditionsꢀ
showsꢀthatꢀ2-phaseꢀoperationꢀdroppedꢀtheꢀinputꢀcurrentꢀ
fromꢀ2.53A
ꢀtoꢀ1.55A
.ꢀWhileꢀthisꢀisꢀanꢀimpressiveꢀ
RMS
RMS
reductionꢀinꢀitself,ꢀrememberꢀthatꢀtheꢀpowerꢀlossesꢀareꢀ
5V SWITCH
20V/DIV
3.3V SWITCH
20V/DIV
INPUT CURRENT
5A/DIV
INPUT VOLTAGE
500mV/DIV
38681 F01
I
= 2.53A
I
= 1.55A
IN(MEAS) RMS
IN(MEAS)
RMS
Figure 2. Input Waveforms Comparing Single-Phase (a) and 2-Phase (b) Operation for Dual Switching Regulators
Converting 12V to 5V and 3.3V at 3A Each. The Reduced Input Ripple with the 2-Phase Regulator Allows
Less Expensive Input Capacitors, Reduces Shielding Requirements for EMI and Improves Efficiency
38681fb
ꢀꢃ
LTC3868-1
operaTion (Refer to the Functional Diagram)
2
proportionalꢀtoꢀI
,ꢀmeaningꢀthatꢀtheꢀactualꢀpowerꢀwastedꢀ voltageꢀV ꢀ(DutyꢀCycleꢀ=ꢀV /V ).ꢀFigureꢀ3ꢀshowsꢀhowꢀ
RMS
IN OUT IN
isꢀreducedꢀbyꢀaꢀfactorꢀofꢀ2.66.ꢀTheꢀreducedꢀinputꢀrippleꢀ theꢀRMSꢀinputꢀcurrentꢀvariesꢀforꢀsingle-phaseꢀandꢀ2-phaseꢀ
voltageꢀalsoꢀmeansꢀlessꢀpowerꢀisꢀlostꢀinꢀtheꢀinputꢀpowerꢀ operationꢀforꢀ3.3Vꢀandꢀ5Vꢀregulatorsꢀoverꢀaꢀwideꢀinputꢀ
path,ꢀwhichꢀcouldꢀincludeꢀbatteries,ꢀswitches,ꢀtrace/con-
nectorꢀresistancesꢀandꢀprotectionꢀcircuitry.ꢀImprovementsꢀ
inꢀbothꢀconductedꢀandꢀradiatedꢀEMIꢀalsoꢀdirectlyꢀaccrueꢀasꢀ
aꢀresultꢀofꢀtheꢀreducedꢀRMSꢀinputꢀcurrentꢀandꢀvoltage.
voltageꢀrange.
Itꢀcanꢀreadilyꢀbeꢀseenꢀthatꢀtheꢀadvantagesꢀofꢀ2-phaseꢀop-
erationꢀareꢀnotꢀjustꢀlimitedꢀtoꢀaꢀnarrowꢀoperatingꢀrange,ꢀ
forꢀmostꢀapplicationsꢀisꢀthatꢀ2-phaseꢀoperationꢀwillꢀreduceꢀ
theꢀinputꢀcapacitorꢀrequirementꢀtoꢀthatꢀforꢀjustꢀoneꢀchannelꢀ
Ofꢀcourse,ꢀtheꢀimprovementꢀaffordedꢀbyꢀ2-phaseꢀopera-
tionꢀisꢀaꢀfunctionꢀofꢀtheꢀdualꢀswitchingꢀregulator’sꢀrelativeꢀ operatingꢀatꢀmaximumꢀcurrentꢀandꢀ50%ꢀdutyꢀcycle.
dutyꢀcyclesꢀwhich,ꢀinꢀturn,ꢀareꢀdependentꢀuponꢀtheꢀinputꢀ
3.0
SINGLE PHASE
DUAL CONTROLLER
2.5
2.0
1.5
1.0
0.5
0
2-PHASE
DUAL CONTROLLER
V
O1
V
O2
= 5V/3A
= 3.3V/3A
0
10
20
30
40
INPUT VOLTAGE (V)
38681 F03
Figure 3. RMS Input Current Comparison
38681fb
ꢀꢄ
LTC3868-1
applicaTions inForMaTion
Theꢀ Typicalꢀ Applicationꢀ onꢀ theꢀ firstꢀ pageꢀ isꢀ aꢀ basicꢀ
LTC3868-1ꢀapplicationꢀcircuit.ꢀLTC3868-1ꢀcanꢀbeꢀconfiguredꢀ
toꢀuseꢀeitherꢀDCRꢀ(inductorꢀresistance)ꢀsensingꢀorꢀlowꢀ
valueꢀresistorꢀsensing.ꢀTheꢀchoiceꢀbetweenꢀtheꢀtwoꢀcur-
rentꢀsensingꢀschemesꢀisꢀlargelyꢀaꢀdesignꢀtradeꢀoffꢀbetweenꢀ
cost,ꢀpowerꢀconsumptionꢀandꢀaccuracy.ꢀDCRꢀsensingꢀisꢀ
becomingꢀ popularꢀ becauseꢀ itꢀ savesꢀ expensiveꢀ currentꢀ
sensingꢀresistorsꢀandꢀisꢀmoreꢀpowerꢀefficient,ꢀespeciallyꢀ
inꢀ highꢀ currentꢀ applications.ꢀ However,ꢀ currentꢀ sensingꢀ
resistorsꢀprovideꢀtheꢀmostꢀaccurateꢀcurrentꢀlimitsꢀforꢀtheꢀ
controller.ꢀOtherꢀexternalꢀcomponentꢀselectionꢀisꢀdrivenꢀ
byꢀtheꢀloadꢀrequirement,ꢀandꢀbeginsꢀwithꢀtheꢀselectionꢀofꢀ
programmedꢀcurrentꢀlimitꢀunpredictable.ꢀIfꢀinductorꢀDCRꢀ
sensingꢀisꢀusedꢀ(Figureꢀ5b),ꢀresistorꢀR1ꢀshouldꢀbeꢀplacedꢀ
closeꢀtoꢀtheꢀswitchingꢀnode,ꢀtoꢀpreventꢀnoiseꢀfromꢀcouplingꢀ
intoꢀsensitiveꢀsmall-signalꢀnodes.
TO SENSE FILTER,
NEXT TO THE CONTROLLER
C
OUT
38681 F04
INDUCTOR OR R
SENSE
Figure 4. Sense Lines Placement with Inductor or Sense Resistor
R
ꢀ(ifꢀR
ꢀisꢀused)ꢀandꢀinductorꢀvalue.ꢀNext,ꢀtheꢀ
SENSE
SENSE
V
V
IN
powerꢀMOSFETsꢀandꢀSchottkyꢀdiodesꢀareꢀselected.ꢀFinally,ꢀ
inputꢀandꢀoutputꢀcapacitorsꢀareꢀselected.
IN
INTV
CC
BOOST
TG
+
–
SENSE and SENSE Pins
SW
V
OUT
+
–
TheꢀSENSE ꢀandꢀSENSE ꢀpinsꢀareꢀtheꢀinputsꢀtoꢀtheꢀcur-
rentꢀcomparators.ꢀTheꢀcommonꢀmodeꢀvoltageꢀrangeꢀonꢀ
theseꢀpinsꢀisꢀ0Vꢀtoꢀ16Vꢀ(AbsoluteꢀMaximum),ꢀenablingꢀ
theꢀLTC3868-1ꢀtoꢀregulateꢀoutputꢀvoltagesꢀupꢀtoꢀaꢀnominalꢀ
14Vꢀ(allowingꢀmarginꢀforꢀtolerancesꢀandꢀtransients).
LTC3868-1
BG
+
SENSE
PLACE CAPACITOR NEAR
SENSE PINS
–
SENSE
SGND
+
TheꢀSENSE ꢀpinꢀisꢀhighꢀimpedanceꢀoverꢀtheꢀfullꢀcommonꢀ
38681 F05a
modeꢀrange,ꢀdrawingꢀatꢀmostꢀ 1µA.ꢀThisꢀhighꢀimpedanceꢀ
allowsꢀtheꢀcurrentꢀcomparatorsꢀtoꢀbeꢀusedꢀinꢀinductorꢀ
DCRꢀsensing.
(5a) Using a Resistor to Sense Current
V
INTV
V
IN
IN
–
TheꢀimpedanceꢀofꢀtheꢀSENSE ꢀpinꢀchangesꢀdependingꢀonꢀ
CC
–
theꢀcommonꢀmodeꢀvoltage.ꢀWhenꢀSENSE ꢀisꢀlessꢀthanꢀ
INDUCTOR
DCR
BOOST
TG
INTV ꢀ–ꢀ0.5V,ꢀaꢀsmallꢀcurrentꢀofꢀlessꢀthanꢀ1µAꢀflowsꢀoutꢀ
CC
L
–
ofꢀtheꢀpin.ꢀWhenꢀSENSE ꢀisꢀaboveꢀINTV ꢀ+ꢀ0.5V,ꢀaꢀhigherꢀ
CC
SW
V
OUT
LTC3868-1
currentꢀ(~550µA)ꢀflowsꢀintoꢀtheꢀpin.ꢀBetweenꢀINTV ꢀ–ꢀ0.5Vꢀ
CC
BG
andꢀINTV ꢀ+ꢀ0.5V,ꢀtheꢀcurrentꢀtransitionsꢀfromꢀtheꢀsmallerꢀ
CC
R1
C1* R2
currentꢀtoꢀtheꢀhigherꢀcurrent.
+
SENSE
Filterꢀcomponentsꢀmutualꢀtoꢀtheꢀsenseꢀlinesꢀshouldꢀbeꢀ
placedꢀcloseꢀtoꢀtheꢀLTC3868-1,ꢀandꢀtheꢀsenseꢀlinesꢀshouldꢀ
runꢀcloseꢀtogetherꢀtoꢀaꢀKelvinꢀconnectionꢀunderneathꢀtheꢀ
currentꢀsenseꢀelementꢀ(shownꢀinꢀFigureꢀ4).ꢀSensingꢀcur-
rentꢀelsewhereꢀcanꢀeffectivelyꢀaddꢀparasiticꢀinductanceꢀ
andꢀcapacitanceꢀtoꢀtheꢀcurrentꢀsenseꢀelement,ꢀdegradingꢀ
theꢀinformationꢀatꢀtheꢀsenseꢀterminalsꢀandꢀmakingꢀtheꢀ
–
SENSE
SGND
38681 F05b
R2
R1 + R2
L
DCR
||
(R1 R2) • C1 =
*PLACE C1 NEAR
SENSE PINS
R
= DCR
SENSE(EQ)
(5b) Using the Inductor DCR to Sense Current
Figure 5. Current Sensing Methods
38681fb
ꢀꢅ
LTC3868-1
applicaTions inForMaTion
Low Value Resistor Current Sensing
usingꢀaꢀgoodꢀRLCꢀmeter,ꢀbutꢀtheꢀDCRꢀtoleranceꢀisꢀnotꢀ
alwaysꢀtheꢀsameꢀandꢀvariesꢀwithꢀtemperature;ꢀconsultꢀtheꢀ
manufacturers’ꢀdataꢀsheetsꢀforꢀdetailedꢀinformation.
Aꢀtypicalꢀsensingꢀcircuitꢀusingꢀaꢀdiscreteꢀresistorꢀisꢀshownꢀ
inꢀ Figureꢀ 5a.ꢀ R
outputꢀcurrent.
ꢀ isꢀ chosenꢀ basedꢀ onꢀ theꢀ requiredꢀ
SENSE
UsingꢀtheꢀinductorꢀrippleꢀcurrentꢀvalueꢀfromꢀtheꢀInductorꢀ
ValueꢀCalculationꢀsection,ꢀtheꢀtargetꢀsenseꢀresistorꢀvalueꢀ
is:
Theꢀ currentꢀ comparatorꢀ hasꢀ aꢀ maximumꢀ thresholdꢀ
ꢀofꢀ50mV.ꢀTheꢀcurrentꢀcomparatorꢀthresholdꢀ
V
SENSE(MAX)
voltageꢀsetsꢀtheꢀpeakꢀofꢀtheꢀinductorꢀcurrent,ꢀyieldingꢀaꢀ
VSENSE(MAX)
RSENSE(EQUIV)
=
maximumꢀaverageꢀoutputꢀcurrent,ꢀI
,ꢀequalꢀtoꢀtheꢀpeakꢀ
MAX
∆IL
valueꢀlessꢀhalfꢀtheꢀpeak-to-peakꢀrippleꢀcurrent,ꢀ∆I .ꢀToꢀ
IMAX +
L
2
ꢀ
calculateꢀtheꢀsenseꢀresistorꢀvalue,ꢀuseꢀtheꢀequation:
Toꢀensureꢀthatꢀtheꢀapplicationꢀwillꢀdeliverꢀfullꢀloadꢀcurrentꢀ
overꢀ theꢀ fullꢀ operatingꢀ temperatureꢀ range,ꢀ chooseꢀ theꢀ
minimumꢀvalueꢀforꢀtheꢀmaximumꢀcurrentꢀsenseꢀthresholdꢀ
VSENSE(MAX)
RSENSE
=
∆IL
2
IMAX
+
ꢀ
voltageꢀ (V
table.
)ꢀ inꢀ theꢀ Electricalꢀ Characteristicsꢀ
SENSE(MAX)
Whenꢀusingꢀtheꢀcontrollerꢀinꢀveryꢀlowꢀdropoutꢀconditions,ꢀ
theꢀmaximumꢀoutputꢀcurrentꢀlevelꢀwillꢀbeꢀreducedꢀdueꢀtoꢀ
theꢀinternalꢀcompensationꢀrequiredꢀtoꢀmeetꢀstabilityꢀcri-
terionꢀforꢀbuckꢀregulatorsꢀoperatingꢀatꢀgreaterꢀthanꢀ50%ꢀ
dutyꢀfactor.ꢀAꢀcurveꢀisꢀprovidedꢀinꢀtheꢀTypicalꢀPerformanceꢀ
Characteristicsꢀ sectionꢀ toꢀ estimateꢀ thisꢀ reductionꢀ inꢀ
peakꢀoutputꢀcurrentꢀdependingꢀuponꢀtheꢀoperatingꢀdutyꢀ
factor.
Next,ꢀdetermineꢀtheꢀDCRꢀofꢀtheꢀinductor.ꢀWhenꢀprovided,ꢀ
useꢀtheꢀmanufacturer’sꢀmaximumꢀvalue,ꢀusuallyꢀgivenꢀatꢀ
20°C.ꢀIncreaseꢀthisꢀvalueꢀtoꢀaccountꢀforꢀtheꢀtemperatureꢀ
coefficientꢀofꢀcopperꢀresistance,ꢀwhichꢀisꢀapproximatelyꢀ
0.4%/°C.ꢀAꢀconservativeꢀvalueꢀforꢀT
ꢀisꢀ100°C.
L(MAX)
ToꢀscaleꢀtheꢀmaximumꢀinductorꢀDCRꢀtoꢀtheꢀdesiredꢀsenseꢀ
resistorꢀ(R )ꢀvalue,ꢀuseꢀtheꢀdividerꢀratio:
D
Inductor DCR Sensing
RSENSE(EQUIV)
RD =
Forꢀapplicationsꢀrequiringꢀtheꢀhighestꢀpossibleꢀefficiencyꢀ
atꢀhighꢀloadꢀcurrents,ꢀtheꢀLTC3850ꢀisꢀcapableꢀofꢀsensingꢀ
theꢀvoltageꢀdropꢀacrossꢀtheꢀinductorꢀDCR,ꢀasꢀshownꢀinꢀ
Figureꢀ5b.ꢀTheꢀDCRꢀofꢀtheꢀinductorꢀrepresentsꢀtheꢀsmallꢀ
amountꢀofꢀDCꢀresistanceꢀofꢀtheꢀcopperꢀwire,ꢀwhichꢀcanꢀbeꢀ
lessꢀthanꢀ1mΩꢀforꢀtoday’sꢀlowꢀvalue,ꢀhighꢀcurrentꢀinductors.ꢀ
Inꢀaꢀhighꢀcurrentꢀapplicationꢀrequiringꢀsuchꢀanꢀinductor,ꢀ
powerꢀlossꢀthroughꢀaꢀsenseꢀresistorꢀwouldꢀcostꢀseveralꢀ
pointsꢀofꢀefficiencyꢀcomparedꢀtoꢀinductorꢀDCRꢀsensing.
DCRMAX atT
L(MAX)
ꢀ
C1ꢀisꢀusuallyꢀselectedꢀtoꢀbeꢀinꢀtheꢀrangeꢀofꢀ0.1µFꢀtoꢀ0.47µF.ꢀ
ThisꢀforcesꢀR1||R2ꢀtoꢀaroundꢀ2k,ꢀreducingꢀerrorꢀthatꢀmightꢀ
haveꢀbeenꢀcausedꢀbyꢀtheꢀSENSE ꢀpin’sꢀ 1µAꢀcurrent.
+
TheꢀequivalentꢀresistanceꢀR1||R2ꢀisꢀscaledꢀtoꢀtheꢀroomꢀ
temperatureꢀinductanceꢀandꢀmaximumꢀDCR:
L
R1||R2 =
DCR at 20°C •C1
IfꢀtheꢀexternalꢀR1||R2ꢀ•ꢀC1ꢀtimeꢀconstantꢀisꢀchosenꢀtoꢀbeꢀ
exactlyꢀequalꢀtoꢀtheꢀL/DCRꢀtimeꢀconstant,ꢀtheꢀvoltageꢀdropꢀ
acrossꢀtheꢀexternalꢀcapacitorꢀisꢀequalꢀtoꢀtheꢀdropꢀacrossꢀ
theꢀinductorꢀDCRꢀmultipliedꢀbyꢀR2/(R1ꢀ+ꢀR2).ꢀR2ꢀscalesꢀtheꢀ
voltageꢀacrossꢀtheꢀsenseꢀterminalsꢀforꢀapplicationsꢀwhereꢀ
theꢀDCRꢀisꢀgreaterꢀthanꢀtheꢀtargetꢀsenseꢀresistorꢀvalue.ꢀ
Toꢀproperlyꢀdimensionꢀtheꢀexternalꢀfilterꢀcomponents,ꢀtheꢀ
DCRꢀofꢀtheꢀinductorꢀmustꢀbeꢀknown.ꢀItꢀcanꢀbeꢀmeasuredꢀ
ꢀ
Theꢀsenseꢀresistorꢀvaluesꢀare:
R1•RD
1–RD
R1||R2
RD
R1=
; R2 =
ꢀ
38681fb
ꢀꢆ
LTC3868-1
applicaTions inForMaTion
TheꢀmaximumꢀpowerꢀlossꢀinꢀR1ꢀisꢀrelatedꢀtoꢀdutyꢀcycle,ꢀ inductorꢀcurrentꢀrequiredꢀresultsꢀinꢀaꢀpeakꢀcurrentꢀbelowꢀ
andꢀwillꢀoccurꢀinꢀcontinuousꢀmodeꢀatꢀtheꢀmaximumꢀinputꢀ 30%ꢀofꢀtheꢀcurrentꢀlimitꢀdeterminedꢀbyꢀR
.ꢀLowerꢀ
SENSE
voltage:
inductorꢀvaluesꢀ(higherꢀ∆I )ꢀwillꢀcauseꢀthisꢀtoꢀoccurꢀatꢀ
L
lowerꢀloadꢀcurrents,ꢀwhichꢀcanꢀcauseꢀaꢀdipꢀinꢀefficiencyꢀinꢀ
V
IN(MAX) – VOUT • V
(
)
OUT
theꢀupperꢀrangeꢀofꢀlowꢀcurrentꢀoperation.ꢀInꢀBurstꢀModeꢀ
operation,ꢀlowerꢀinductanceꢀvaluesꢀwillꢀcauseꢀtheꢀburstꢀ
frequencyꢀtoꢀdecrease.
P
R1=
LOSS
R1
ꢀ
EnsureꢀthatꢀR1ꢀhasꢀaꢀpowerꢀratingꢀhigherꢀthanꢀthisꢀvalue.ꢀ
Ifꢀhighꢀefficiencyꢀisꢀnecessaryꢀatꢀlightꢀloads,ꢀconsiderꢀthisꢀ
powerꢀlossꢀwhenꢀdecidingꢀwhetherꢀtoꢀuseꢀDCRꢀsensingꢀorꢀ
senseꢀresistors.ꢀLightꢀloadꢀpowerꢀlossꢀcanꢀbeꢀmodestlyꢀ
higherꢀwithꢀaꢀDCRꢀnetworkꢀthanꢀwithꢀaꢀsenseꢀresistor,ꢀdueꢀ
toꢀtheꢀextraꢀswitchingꢀlossesꢀincurredꢀthroughꢀR1.ꢀHowever,ꢀ
DCRꢀsensingꢀeliminatesꢀaꢀsenseꢀresistor,ꢀreducesꢀconduc-
tionꢀlossesꢀandꢀprovidesꢀhigherꢀefficiencyꢀatꢀheavyꢀloads.ꢀ
Peakꢀefficiencyꢀisꢀaboutꢀtheꢀsameꢀwithꢀeitherꢀmethod.
Inductor Core Selection
OnceꢀtheꢀvalueꢀforꢀLꢀisꢀknown,ꢀtheꢀtypeꢀofꢀinductorꢀmustꢀ
beꢀselected.ꢀHighꢀefficiencyꢀconvertersꢀgenerallyꢀcannotꢀ
affordꢀtheꢀcoreꢀlossꢀfoundꢀinꢀlowꢀcostꢀpowderedꢀironꢀcores,ꢀ
forcingꢀtheꢀuseꢀofꢀmoreꢀexpensiveꢀferriteꢀorꢀmolypermalloyꢀ
cores.ꢀActualꢀcoreꢀlossꢀisꢀindependentꢀofꢀcoreꢀsizeꢀforꢀaꢀ
fixedꢀinductorꢀvalue,ꢀbutꢀitꢀisꢀveryꢀdependentꢀonꢀinductanceꢀ
valueꢀselected.ꢀAsꢀinductanceꢀincreases,ꢀcoreꢀlossesꢀgoꢀ
down.ꢀUnfortunately,ꢀincreasedꢀinductanceꢀrequiresꢀmoreꢀ
turnsꢀofꢀwireꢀandꢀthereforeꢀcopperꢀlossesꢀwillꢀincrease.
Inductor Value Calculation
Theꢀoperatingꢀfrequencyꢀandꢀinductorꢀselectionꢀareꢀinter-
relatedꢀinꢀthatꢀhigherꢀoperatingꢀfrequenciesꢀallowꢀtheꢀuseꢀ
ofꢀsmallerꢀinductorꢀandꢀcapacitorꢀvalues.ꢀSoꢀwhyꢀwouldꢀ
anyoneꢀeverꢀchooseꢀtoꢀoperateꢀatꢀlowerꢀfrequenciesꢀwithꢀ
largerꢀcomponents?ꢀTheꢀanswerꢀisꢀefficiency.ꢀAꢀhigherꢀ
frequencyꢀgenerallyꢀresultsꢀinꢀlowerꢀefficiencyꢀbecauseꢀ
ofꢀMOSFETꢀgateꢀchargeꢀlosses.ꢀInꢀadditionꢀtoꢀthisꢀbasicꢀ
trade-off,ꢀtheꢀeffectꢀofꢀinductorꢀvalueꢀonꢀrippleꢀcurrentꢀandꢀ
lowꢀcurrentꢀoperationꢀmustꢀalsoꢀbeꢀconsidered.
Ferriteꢀdesignsꢀhaveꢀveryꢀlowꢀcoreꢀlossꢀandꢀareꢀpreferredꢀ
forꢀ highꢀ switchingꢀ frequencies,ꢀ soꢀ designꢀ goalsꢀ canꢀ
concentrateꢀonꢀcopperꢀlossꢀandꢀpreventingꢀsaturation.ꢀ
Ferriteꢀcoreꢀmaterialꢀsaturatesꢀhard,ꢀwhichꢀmeansꢀthatꢀ
inductanceꢀcollapsesꢀabruptlyꢀwhenꢀtheꢀpeakꢀdesignꢀcurrentꢀ
isꢀexceeded.ꢀThisꢀresultsꢀinꢀanꢀabruptꢀincreaseꢀinꢀinductorꢀ
rippleꢀcurrentꢀandꢀconsequentꢀoutputꢀvoltageꢀripple.ꢀDoꢀ
notꢀallowꢀtheꢀcoreꢀtoꢀsaturate!
Theꢀinductorꢀvalueꢀhasꢀaꢀdirectꢀeffectꢀonꢀrippleꢀcurrent.ꢀ
Power MOSFET and Schottky Diode
(Optional) Selection
Theꢀ inductorꢀ rippleꢀ currentꢀ ∆I ꢀ decreasesꢀ withꢀ higherꢀ
L
inductanceꢀorꢀhigherꢀfrequencyꢀandꢀincreasesꢀwithꢀhigherꢀ
V :
IN
TwoꢀexternalꢀpowerꢀMOSFETsꢀmustꢀbeꢀselectedꢀforꢀeachꢀ
controllerꢀinꢀtheꢀLTC3868-1:ꢀoneꢀN-channelꢀMOSFETꢀforꢀ
theꢀtopꢀ(main)ꢀswitch,ꢀandꢀoneꢀN-channelꢀMOSFETꢀforꢀtheꢀ
bottomꢀ(synchronous)ꢀswitch.
V
V
IN
1
OUT
1–
OUT
ΔIL =
V
f L
ꢀ
Theꢀpeak-to-peakꢀdriveꢀlevelsꢀareꢀsetꢀbyꢀtheꢀINTV ꢀvoltage.ꢀ
CC
Acceptingꢀ largerꢀ valuesꢀ ofꢀ ∆I ꢀ allowsꢀ theꢀ useꢀ ofꢀ lowꢀ
Thisꢀvoltageꢀisꢀtypicallyꢀ5.1Vꢀduringꢀstart-upꢀ(seeꢀEXTV ꢀ
L
CC
inductances,ꢀbutꢀresultsꢀinꢀhigherꢀoutputꢀvoltageꢀrippleꢀ
Pinꢀ Connection).ꢀ Consequently,ꢀ logic-levelꢀ thresholdꢀ
andꢀgreaterꢀcoreꢀlosses.ꢀAꢀreasonableꢀstartingꢀpointꢀforꢀ
MOSFETsꢀmustꢀbeꢀusedꢀinꢀmostꢀapplications.ꢀTheꢀonlyꢀ
settingꢀrippleꢀcurrentꢀisꢀ∆I ꢀ=ꢀ0.3(I
).ꢀTheꢀmaximumꢀ
MAX
exceptionꢀisꢀifꢀlowꢀinputꢀvoltageꢀisꢀexpectedꢀ(V ꢀ<ꢀ4V);ꢀ
L
IN
GS(TH)
DSS
∆I ꢀoccursꢀatꢀtheꢀmaximumꢀinputꢀvoltage.
then,ꢀsub-logicꢀlevelꢀthresholdꢀMOSFETsꢀ(V
ꢀ<ꢀ3V)ꢀ
L
shouldꢀbeꢀused.ꢀPayꢀcloseꢀattentionꢀtoꢀtheꢀBV ꢀspeci-
Theꢀinductorꢀvalueꢀalsoꢀhasꢀsecondaryꢀeffects.ꢀTheꢀtran-
sitionꢀtoꢀBurstꢀModeꢀoperationꢀbeginsꢀwhenꢀtheꢀaverageꢀ
ficationꢀforꢀtheꢀMOSFETsꢀasꢀwell;ꢀmanyꢀofꢀtheꢀlogic-levelꢀ
MOSFETsꢀareꢀlimitedꢀtoꢀ30Vꢀorꢀless.
38681fb
ꢀꢇ
LTC3868-1
applicaTions inForMaTion
Selectionꢀ criteriaꢀ forꢀ theꢀ powerꢀ MOSFETsꢀ includeꢀ theꢀ synchronousꢀMOSFETꢀlossesꢀareꢀgreatestꢀatꢀhighꢀinputꢀ
on-resistance,ꢀR ,ꢀMillerꢀcapacitance,ꢀC ,ꢀinputꢀ voltageꢀwhenꢀtheꢀtopꢀswitchꢀdutyꢀfactorꢀisꢀlowꢀorꢀduringꢀ
DS(ON)
MILLER
voltageꢀandꢀmaximumꢀoutputꢀcurrent.ꢀMillerꢀcapacitance,ꢀ aꢀshort-circuitꢀwhenꢀtheꢀsynchronousꢀswitchꢀisꢀonꢀcloseꢀ
C
,ꢀcanꢀbeꢀapproximatedꢀfromꢀtheꢀgateꢀchargeꢀcurveꢀ toꢀ100%ꢀofꢀtheꢀperiod.
MILLER
usuallyꢀ providedꢀ onꢀ theꢀ MOSFETꢀ manufacturers’ꢀ dataꢀ
sheet.ꢀC ꢀisꢀequalꢀtoꢀtheꢀincreaseꢀinꢀgateꢀchargeꢀ
Theꢀtermꢀ(1+ꢀδ)ꢀisꢀgenerallyꢀgivenꢀforꢀaꢀMOSFETꢀinꢀtheꢀ
MILLER
formꢀofꢀaꢀnormalizedꢀR
ꢀvsꢀTemperatureꢀcurve,ꢀbutꢀ
DS(ON)
alongꢀtheꢀhorizontalꢀaxisꢀwhileꢀtheꢀcurveꢀisꢀapproximatelyꢀ
δꢀ=ꢀ0.005/°Cꢀcanꢀbeꢀusedꢀasꢀanꢀapproximationꢀforꢀlowꢀ
voltageꢀMOSFETs.
flatꢀdividedꢀbyꢀtheꢀspecifiedꢀchangeꢀinꢀV .ꢀThisꢀresultꢀisꢀ
DS
thenꢀmultipliedꢀbyꢀtheꢀratioꢀofꢀtheꢀapplicationꢀappliedꢀV ꢀ
DS
TheꢀoptionalꢀSchottkyꢀdiodesꢀD1ꢀandꢀD2ꢀshownꢀinꢀFigureꢀ10ꢀ
conductꢀduringꢀtheꢀdead-timeꢀbetweenꢀtheꢀconductionꢀofꢀ
theꢀtwoꢀpowerꢀMOSFETs.ꢀThisꢀpreventsꢀtheꢀbodyꢀdiodeꢀofꢀ
theꢀbottomꢀMOSFETꢀfromꢀturningꢀon,ꢀstoringꢀchargeꢀduringꢀ
theꢀdead-timeꢀandꢀrequiringꢀaꢀreverseꢀrecoveryꢀperiodꢀthatꢀ
toꢀtheꢀgateꢀchargeꢀcurveꢀspecifiedꢀV .ꢀWhenꢀtheꢀICꢀisꢀ
DS
operatingꢀinꢀcontinuousꢀmodeꢀtheꢀdutyꢀcyclesꢀforꢀtheꢀtopꢀ
andꢀbottomꢀMOSFETsꢀareꢀgivenꢀby:
VOUT
Main Switch Duty Cycle =
V
couldꢀcostꢀasꢀmuchꢀasꢀ3%ꢀinꢀefficiencyꢀatꢀhighꢀV .ꢀAꢀ1Aꢀ
IN
IN
toꢀ3AꢀSchottkyꢀisꢀgenerallyꢀaꢀgoodꢀcompromiseꢀforꢀbothꢀ
regionsꢀofꢀoperationꢀdueꢀtoꢀtheꢀrelativelyꢀsmallꢀaverageꢀ
current.ꢀLargerꢀdiodesꢀresultꢀinꢀadditionalꢀtransitionꢀlossesꢀ
dueꢀtoꢀtheirꢀlargerꢀjunctionꢀcapacitance.
V − VOUT
IN
Synchronous Switch Duty Cycle =
V
IN
ꢀ
Theꢀ MOSFETꢀ powerꢀ dissipationsꢀ atꢀ maximumꢀ outputꢀ
currentꢀareꢀgivenꢀby:
C and C
Selection
IN
OUT
VOUT
2
TheꢀselectionꢀofꢀC ꢀisꢀsimplifiedꢀbyꢀtheꢀ2-phaseꢀarchitec-
PMAIN
=
I
1+ δ R
+
DS(ON)
IN
(
MAX) (
)
V
IN
tureꢀandꢀitsꢀimpactꢀonꢀtheꢀworst-caseꢀRMSꢀcurrentꢀdrawnꢀ
throughꢀtheꢀinputꢀnetworkꢀ(battery/fuse/capacitor).ꢀItꢀcanꢀbeꢀ
shownꢀthatꢀtheꢀworst-caseꢀcapacitorꢀRMSꢀcurrentꢀoccursꢀ
whenꢀonlyꢀoneꢀcontrollerꢀisꢀoperating.ꢀTheꢀcontrollerꢀwithꢀ
2
IMAX
2
V
R
C
•
f
(
)
(
DR)(
)
IN
MILLER
1
1
theꢀhighestꢀ(V )(I )ꢀproductꢀneedsꢀtoꢀbeꢀusedꢀinꢀtheꢀ
OUT OUT
+
( )
formulaꢀshownꢀinꢀEquationꢀ1ꢀtoꢀdetermineꢀtheꢀmaximumꢀ
RMSꢀcapacitorꢀcurrentꢀrequirement.ꢀIncreasingꢀtheꢀout-
putꢀcurrentꢀdrawnꢀfromꢀtheꢀotherꢀcontrollerꢀwillꢀactuallyꢀ
decreaseꢀtheꢀinputꢀRMSꢀrippleꢀcurrentꢀfromꢀitsꢀmaximumꢀ
value.ꢀTheꢀout-of-phaseꢀtechniqueꢀtypicallyꢀreducesꢀtheꢀ
inputꢀcapacitor’sꢀRMSꢀrippleꢀcurrentꢀbyꢀaꢀfactorꢀofꢀ30%ꢀ
toꢀ70%ꢀwhenꢀcomparedꢀtoꢀaꢀsingleꢀphaseꢀpowerꢀsupplyꢀ
solution.
V
INTVCC – VTHMIN VTHMIN
V – VOUT
2
IN
PSYNC
=
I
1+ δ R
(
MAX) (
)
DS(ON)
V
IN
ꢀ
whereꢀδꢀisꢀtheꢀtemperatureꢀdependencyꢀofꢀR
ꢀandꢀ
DS(ON)
R ꢀ(approximatelyꢀ2Ω)ꢀisꢀtheꢀeffectiveꢀdriverꢀresistanceꢀ
DR
atꢀtheꢀMOSFET’sꢀMillerꢀthresholdꢀvoltage.ꢀV
ꢀisꢀtheꢀ
THMIN
typicalꢀMOSFETꢀminimumꢀthresholdꢀvoltage.
Inꢀcontinuousꢀmode,ꢀtheꢀsourceꢀcurrentꢀofꢀtheꢀtopꢀMOSFETꢀ
isꢀaꢀsquareꢀwaveꢀofꢀdutyꢀcycleꢀ(V )/(V ).ꢀToꢀpreventꢀ
2
BothꢀMOSFETsꢀhaveꢀI RꢀlossesꢀwhileꢀtheꢀtopsideꢀN-channelꢀ
equationꢀincludesꢀanꢀadditionalꢀtermꢀforꢀtransitionꢀlosses,ꢀ
OUT
IN
largeꢀvoltageꢀtransients,ꢀaꢀlowꢀESRꢀcapacitorꢀsizedꢀforꢀtheꢀ
maximumꢀRMSꢀcurrentꢀofꢀoneꢀchannelꢀmustꢀbeꢀused.ꢀTheꢀ
maximumꢀRMSꢀcapacitorꢀcurrentꢀisꢀgivenꢀby:
whichꢀareꢀhighestꢀatꢀhighꢀinputꢀvoltages.ꢀForꢀV ꢀ<ꢀ20Vꢀ
IN
theꢀhighꢀcurrentꢀefficiencyꢀgenerallyꢀimprovesꢀwithꢀlargerꢀ
MOSFETs,ꢀwhileꢀforꢀV ꢀ>ꢀ20Vꢀtheꢀtransitionꢀlossesꢀrapidlyꢀ
IN
IMAX
1/2
CIN Required IRMS
≈
V
V – V
IN OUT
increaseꢀtoꢀtheꢀpointꢀthatꢀtheꢀuseꢀofꢀaꢀhigherꢀR
ꢀdeviceꢀ
(1)
ꢀ
(
OUT )(
)
DS(ON)
V
IN
withꢀlowerꢀC
ꢀactuallyꢀprovidesꢀhigherꢀefficiency.ꢀTheꢀ
MILLER
38681fb
ꢀꢈ
LTC3868-1
applicaTions inForMaTion
Equationꢀ1ꢀhasꢀaꢀmaximumꢀatꢀV ꢀ=ꢀ2V ,ꢀwhereꢀI ꢀ
whereꢀfꢀisꢀtheꢀoperatingꢀfrequency,ꢀC ꢀisꢀtheꢀoutputꢀ
IN
OUTꢀ
RMS
OUT
=ꢀI /2.ꢀThisꢀsimpleꢀworst-caseꢀconditionꢀisꢀcommonlyꢀ
capacitanceꢀandꢀ∆I ꢀisꢀtheꢀrippleꢀcurrentꢀinꢀtheꢀinductor.ꢀ
OUT
L
usedꢀforꢀdesignꢀbecauseꢀevenꢀsignificantꢀdeviationsꢀdoꢀnotꢀ
offerꢀmuchꢀrelief.ꢀNoteꢀthatꢀcapacitorꢀmanufacturers’ꢀrippleꢀ
currentꢀratingsꢀareꢀoftenꢀbasedꢀonꢀonlyꢀ2000ꢀhoursꢀofꢀlife.ꢀ
Thisꢀmakesꢀitꢀadvisableꢀtoꢀfurtherꢀderateꢀtheꢀcapacitor,ꢀorꢀ
toꢀchooseꢀaꢀcapacitorꢀratedꢀatꢀaꢀhigherꢀtemperatureꢀthanꢀ
required.ꢀSeveralꢀcapacitorsꢀmayꢀbeꢀparalleledꢀtoꢀmeetꢀ
sizeꢀorꢀheightꢀrequirementsꢀinꢀtheꢀdesign.ꢀDueꢀtoꢀtheꢀhighꢀ
operatingꢀfrequencyꢀofꢀtheꢀLTC3868-1,ꢀceramicꢀcapacitorsꢀ
Theꢀoutputꢀrippleꢀisꢀhighestꢀatꢀmaximumꢀinputꢀvoltageꢀ
sinceꢀ∆I ꢀincreasesꢀwithꢀinputꢀvoltage.
L
Setting Output Voltage
TheꢀLTC3868-1ꢀoutputꢀvoltagesꢀareꢀeachꢀsetꢀbyꢀanꢀexter-
nalꢀfeedbackꢀresistorꢀdividerꢀcarefullyꢀplacedꢀacrossꢀtheꢀ
output,ꢀasꢀshownꢀinꢀFigureꢀ6.ꢀTheꢀregulatedꢀoutputꢀvoltageꢀ
isꢀdeterminedꢀby:
canꢀalsoꢀbeꢀusedꢀforꢀC .ꢀAlwaysꢀconsultꢀtheꢀmanufacturerꢀ
IN
R
RA
ifꢀthereꢀisꢀanyꢀquestion.
VOUT = 0.8V 1+
B
TheꢀbenefitꢀofꢀtheꢀLTC3868-1ꢀ2-phaseꢀoperationꢀcanꢀbeꢀ
calculatedꢀbyꢀusingꢀEquationꢀ1ꢀforꢀtheꢀhigherꢀpowerꢀcontrol-
lerꢀandꢀthenꢀcalculatingꢀtheꢀlossꢀthatꢀwouldꢀhaveꢀresultedꢀ
ifꢀbothꢀcontrollerꢀchannelsꢀswitchedꢀonꢀatꢀtheꢀsameꢀtime.ꢀ
TheꢀtotalꢀRMSꢀpowerꢀlostꢀisꢀlowerꢀwhenꢀbothꢀcontrollersꢀ
areꢀoperatingꢀdueꢀtoꢀtheꢀreducedꢀoverlapꢀofꢀcurrentꢀpulsesꢀ
requiredꢀthroughꢀtheꢀinputꢀcapacitor’sꢀESR.ꢀThisꢀisꢀwhyꢀ
theꢀinputꢀcapacitor’sꢀrequirementꢀcalculatedꢀaboveꢀforꢀtheꢀ
worst-caseꢀcontrollerꢀisꢀadequateꢀforꢀtheꢀdualꢀcontrollerꢀ
design.ꢀAlso,ꢀtheꢀinputꢀprotectionꢀfuseꢀresistance,ꢀbatteryꢀ
resistance,ꢀandꢀPCꢀboardꢀtraceꢀresistanceꢀlossesꢀareꢀalsoꢀ
reducedꢀdueꢀtoꢀtheꢀreducedꢀpeakꢀcurrentsꢀinꢀaꢀ2-phaseꢀ
system.ꢀTheꢀoverallꢀbenefitꢀofꢀaꢀmultiphaseꢀdesignꢀwillꢀ
onlyꢀbeꢀfullyꢀrealizedꢀwhenꢀtheꢀsourceꢀimpedanceꢀofꢀtheꢀ
powerꢀsupply/batteryꢀisꢀincludedꢀinꢀtheꢀefficiencyꢀtesting.ꢀ
TheꢀsourcesꢀofꢀtheꢀtopꢀMOSFETsꢀshouldꢀbeꢀplacedꢀwithinꢀ
ꢀ
Toꢀimproveꢀtheꢀfrequencyꢀresponse,ꢀaꢀfeedforwardꢀca-
pacitor,ꢀC ,ꢀmayꢀbeꢀused.ꢀGreatꢀcareꢀshouldꢀbeꢀtakenꢀtoꢀ
FFꢀ
routeꢀtheꢀV ꢀlineꢀawayꢀfromꢀnoiseꢀsources,ꢀsuchꢀasꢀtheꢀ
FB
inductorꢀorꢀtheꢀSWꢀline.
V
OUT
R
B
C
FF
1/2 LTC3868-1
V
FB
R
A
38681 F05
Figure 6. Setting Output Voltage
Soft-Start (SS Pins)
Theꢀstart-upꢀofꢀeachꢀV ꢀisꢀcontrolledꢀbyꢀtheꢀvoltageꢀonꢀ
1cmꢀofꢀeachꢀotherꢀandꢀshareꢀaꢀcommonꢀC (s).ꢀSeparatingꢀ
OUT
IN
theꢀrespectiveꢀSSꢀpin.ꢀWhenꢀtheꢀvoltageꢀonꢀtheꢀSSꢀpinꢀ
theꢀsourcesꢀandꢀC ꢀmayꢀproduceꢀundesirableꢀvoltageꢀandꢀ
IN
isꢀlessꢀthanꢀtheꢀinternalꢀ0.8Vꢀreference,ꢀtheꢀLTC3868-1ꢀ
currentꢀresonancesꢀatꢀV .
IN
regulatesꢀtheꢀV ꢀpinꢀvoltageꢀtoꢀtheꢀvoltageꢀonꢀtheꢀSSꢀpinꢀ
FB
Aꢀsmallꢀ(0.1µFꢀtoꢀ1µF)ꢀbypassꢀcapacitorꢀbetweenꢀtheꢀchipꢀ
insteadꢀofꢀ0.8V.ꢀTheꢀSSꢀpinꢀcanꢀbeꢀusedꢀtoꢀprogramꢀanꢀ
V ꢀpinꢀandꢀground,ꢀplacedꢀcloseꢀtoꢀtheꢀLTC3868-1,ꢀisꢀ
IN
externalꢀsoft-startꢀfunction.
alsoꢀsuggested.ꢀAꢀ10ΩꢀresistorꢀplacedꢀbetweenꢀC ꢀ(C1)ꢀ
IN
Soft-startꢀisꢀenabledꢀbyꢀsimplyꢀconnectingꢀaꢀcapacitorꢀfromꢀ
theꢀSSꢀpinꢀtoꢀground,ꢀasꢀshownꢀinꢀFigureꢀ7.ꢀAnꢀinternalꢀ
1µAꢀ currentꢀ sourceꢀ chargesꢀ theꢀ capacitor,ꢀ providingꢀ aꢀ
andꢀtheꢀV ꢀpinꢀprovidesꢀfurtherꢀisolationꢀbetweenꢀtheꢀ
IN
twoꢀchannels.
TheꢀselectionꢀofꢀC ꢀisꢀdrivenꢀbyꢀtheꢀeffectiveꢀseriesꢀ
OUT
resistanceꢀ(ESR).ꢀTypically,ꢀonceꢀtheꢀESRꢀrequirementꢀ
1/2 LTC3868-1
SS
isꢀsatisfied,ꢀtheꢀcapacitanceꢀisꢀadequateꢀforꢀfiltering.ꢀTheꢀ
C
SS
outputꢀrippleꢀ(∆V )ꢀisꢀapproximatedꢀby:
OUT
SGND
38681 F06
1
ΔVOUT ≈ ΔI ESR+
L
8 • f • COUT
Figure 7. Using the SS Pin to Program Soft-Start
ꢀ
38681fb
ꢁ0
LTC3868-1
applicaTions inForMaTion
linearꢀrampingꢀvoltageꢀatꢀtheꢀSSꢀpin.ꢀTheꢀLTC3868-1ꢀwillꢀ
Toꢀpreventꢀtheꢀmaximumꢀjunctionꢀtemperatureꢀfromꢀbe-
ingꢀexceeded,ꢀtheꢀinputꢀsupplyꢀcurrentꢀmustꢀbeꢀcheckedꢀ
whileꢀoperatingꢀinꢀforcedꢀcontinuousꢀmodeꢀ(PLLIN/MODEꢀ
regulateꢀtheꢀV ꢀpinꢀ(andꢀhenceꢀV )ꢀaccordingꢀtoꢀtheꢀ
FB
OUT
voltageꢀonꢀtheꢀSSꢀpin,ꢀallowingꢀV ꢀtoꢀriseꢀsmoothlyꢀfromꢀ
OUT
0Vꢀtoꢀitsꢀfinalꢀregulatedꢀvalue.ꢀTheꢀtotalꢀsoft-startꢀtimeꢀwillꢀ
=ꢀINTV )ꢀatꢀmaximumꢀV .
CC
IN
beꢀapproximately:
WhenꢀtheꢀvoltageꢀappliedꢀtoꢀEXTV ꢀrisesꢀaboveꢀ4.7V,ꢀtheꢀ
CC
0.8V
1µA
V ꢀLDOꢀisꢀturnedꢀoffꢀandꢀtheꢀEXTV ꢀLDOꢀisꢀenabled.ꢀTheꢀ
IN
CC
tSS = CSS
•
EXTV ꢀLDOꢀremainsꢀonꢀasꢀlongꢀasꢀtheꢀvoltageꢀappliedꢀtoꢀ
CC
ꢀ
EXTV ꢀremainsꢀaboveꢀ4.5V.ꢀTheꢀEXTV ꢀLDOꢀattemptsꢀ
CC
CC
INTV Regulators
toꢀregulateꢀtheꢀINTV ꢀvoltageꢀtoꢀ5.1V,ꢀsoꢀwhileꢀEXTV ꢀ
CC
CC
CC
isꢀlessꢀthanꢀ5.1V,ꢀtheꢀLDOꢀisꢀinꢀdropoutꢀandꢀtheꢀINTV ꢀ
CC
TheꢀLTC3868-1ꢀfeaturesꢀtwoꢀseparateꢀinternalꢀP-channelꢀ
lowꢀdropoutꢀlinearꢀregulatorsꢀ(LDO)ꢀthatꢀsupplyꢀpowerꢀ
voltageꢀisꢀapproximatelyꢀequalꢀtoꢀEXTV .ꢀWhenꢀEXTV ꢀ
CC
CC
isꢀgreaterꢀthanꢀ5.1V,ꢀupꢀtoꢀanꢀabsoluteꢀmaximumꢀofꢀ14V,ꢀ
atꢀtheꢀINTV ꢀpinꢀfromꢀeitherꢀtheꢀV ꢀsupplyꢀpinꢀorꢀtheꢀ
CC
IN
INTV ꢀisꢀregulatedꢀtoꢀ5.1V.
CC
EXTV ꢀpinꢀdependingꢀonꢀtheꢀconnectionꢀofꢀtheꢀEXTV ꢀ
CC
CC
pin.ꢀ INTV ꢀ powersꢀ theꢀ gateꢀ driversꢀ andꢀ muchꢀ ofꢀ theꢀ
UsingꢀtheꢀEXTVCCꢀLDOꢀallowsꢀtheꢀMOSFETꢀdriverꢀandꢀ
controlꢀpowerꢀtoꢀbeꢀderivedꢀfromꢀoneꢀofꢀtheꢀLTC3868-1’sꢀ
switchingꢀregulatorꢀoutputsꢀ(4.7Vꢀ≤ꢀVOUTꢀ≤ꢀ14V)ꢀduringꢀ
normalꢀoperationꢀandꢀfromꢀtheꢀVINꢀLDOꢀwhenꢀtheꢀout-
putꢀisꢀoutꢀofꢀregulationꢀ(e.g.,ꢀstart-up,ꢀshort-circuit).ꢀIfꢀ
moreꢀcurrentꢀisꢀrequiredꢀthroughꢀtheꢀEXTVCCꢀLDOꢀthanꢀ
isꢀspecified,ꢀanꢀexternalꢀSchottkyꢀdiodeꢀcanꢀbeꢀaddedꢀ
betweenꢀtheꢀEXTVCCꢀandꢀINTVCCꢀpins.ꢀInꢀthisꢀcase,ꢀdoꢀ
notꢀapplyꢀmoreꢀthanꢀ6VꢀtoꢀtheꢀEXTVCCꢀpinꢀandꢀmakeꢀsureꢀ
thatꢀEXTVCCꢀ≤ꢀVIN.
CC
LTC3868-1’sꢀinternalꢀcircuitry.ꢀTheꢀV ꢀLDOꢀandꢀtheꢀEXTV ꢀ
IN
CC
LDOꢀregulateꢀINTV ꢀtoꢀ5.1V.ꢀEachꢀofꢀtheseꢀcanꢀsupplyꢀaꢀ
CC
peakꢀcurrentꢀofꢀ50mAꢀandꢀmustꢀbeꢀbypassedꢀtoꢀgroundꢀ
withꢀaꢀminimumꢀofꢀ4.7µFꢀlowꢀESRꢀcapacitor.ꢀNoꢀmatterꢀ
whatꢀtypeꢀofꢀbulkꢀcapacitorꢀisꢀused,ꢀanꢀadditionalꢀ1µFꢀce-
ramicꢀcapacitorꢀplacedꢀdirectlyꢀadjacentꢀtoꢀtheꢀINTV ꢀandꢀ
CC
PGNDꢀICꢀpinsꢀisꢀhighlyꢀrecommended.ꢀGoodꢀbypassingꢀ
isꢀneededꢀtoꢀsupplyꢀtheꢀhighꢀtransientꢀcurrentsꢀrequiredꢀ
byꢀtheꢀMOSFETꢀgateꢀdriversꢀandꢀtoꢀpreventꢀinteractionꢀ
betweenꢀtheꢀchannels.
Significantꢀefficiencyꢀandꢀthermalꢀgainsꢀcanꢀbeꢀrealizedꢀ
HighꢀinputꢀvoltageꢀapplicationsꢀinꢀwhichꢀlargeꢀMOSFETsꢀ
areꢀ beingꢀ drivenꢀ atꢀ highꢀ frequenciesꢀ mayꢀ causeꢀ theꢀ
maximumꢀjunctionꢀtemperatureꢀratingꢀforꢀtheꢀLTC3868-1ꢀ
byꢀpoweringꢀINTV ꢀfromꢀtheꢀoutput,ꢀsinceꢀtheꢀV ꢀcur-
CC
IN
rentꢀresultingꢀfromꢀtheꢀdriverꢀandꢀcontrolꢀcurrentsꢀwillꢀbeꢀ
scaledꢀbyꢀaꢀfactorꢀofꢀ(DutyꢀCycle)/(SwitcherꢀEfficiency).ꢀ
Forꢀ5Vꢀtoꢀ14Vꢀregulatorꢀoutputs,ꢀthisꢀmeansꢀconnectingꢀ
toꢀbeꢀexceeded.ꢀTheꢀINTV ꢀcurrent,ꢀwhichꢀisꢀdominatedꢀ
CC
byꢀtheꢀgateꢀchargeꢀcurrent,ꢀmayꢀbeꢀsuppliedꢀbyꢀeitherꢀ
theꢀEXTV ꢀpinꢀdirectlyꢀtoꢀV .ꢀTyingꢀtheꢀEXTV ꢀpinꢀtoꢀ
CC
OUTꢀ
CC
theꢀV ꢀLDOꢀorꢀtheꢀEXTV ꢀLDO.ꢀWhenꢀtheꢀvoltageꢀonꢀ
aꢀ8.5Vꢀsupplyꢀreducesꢀtheꢀjunctionꢀtemperatureꢀinꢀtheꢀ
IN
CC
theꢀEXTV ꢀpinꢀisꢀlessꢀthanꢀ4.7V,ꢀtheꢀV ꢀLDOꢀisꢀenabled.ꢀ
previousꢀexampleꢀfromꢀ125°Cꢀto:
CC
IN
PowerꢀdissipationꢀforꢀtheꢀICꢀinꢀthisꢀcaseꢀisꢀhighestꢀandꢀisꢀ
equalꢀtoꢀV ꢀ•ꢀI .ꢀTheꢀgateꢀchargeꢀcurrentꢀisꢀdepen-
ꢀ T ꢀ=ꢀ70°Cꢀ+ꢀ(45mA)(8.5V)(90°C/W)ꢀ=ꢀ87°C
J
IN INTVCC
However,ꢀforꢀ3.3Vꢀandꢀotherꢀlowꢀvoltageꢀoutputs,ꢀaddi-
dentꢀonꢀoperatingꢀfrequencyꢀasꢀdiscussedꢀinꢀtheꢀEfficiencyꢀ
Considerationsꢀsection.ꢀTheꢀjunctionꢀtemperatureꢀcanꢀbeꢀ
estimatedꢀbyꢀusingꢀtheꢀequationsꢀgivenꢀinꢀNoteꢀ2ꢀofꢀtheꢀ
Electricalꢀ Characteristics.ꢀ Forꢀ example,ꢀ theꢀ LTC3868-1ꢀ
tionalꢀcircuitryꢀisꢀrequiredꢀtoꢀderiveꢀINTV ꢀpowerꢀfromꢀ
CC
theꢀoutput.
INTV ꢀcurrentꢀisꢀlimitedꢀtoꢀlessꢀthanꢀ22mAꢀfromꢀaꢀ28Vꢀ
CC
supplyꢀwhenꢀnotꢀusingꢀtheꢀEXTV ꢀsupplyꢀatꢀ70°Cꢀambientꢀ
CC
temperatureꢀinꢀtheꢀSSOPꢀpackage:
ꢀ T ꢀ=ꢀ70°Cꢀ+ꢀ(22mA)(28V)(90°C/W)ꢀ=ꢀ125°C
J
38681fb
ꢁꢀ
2.ꢀ
3.ꢀ
4.ꢀ
EXTV ꢀConnectedꢀDirectlyꢀtoꢀV .ꢀThisꢀisꢀtheꢀnormalꢀ
CC OUTꢀ
connectionꢀforꢀaꢀ5Vꢀtoꢀ14Vꢀregulatorꢀandꢀprovidesꢀtheꢀ
highestꢀefficiency.
EXTVCCꢀConnectedꢀtoꢀanꢀExternalꢀSupply.ꢀIfꢀanꢀexternalꢀ
supplyꢀisꢀavailableꢀinꢀtheꢀ5Vꢀtoꢀ14Vꢀrange,ꢀitꢀmayꢀbeꢀ
usedꢀtoꢀpowerꢀEXTVCC.ꢀEnsureꢀthatꢀEXTVCCꢀ<ꢀVIN.
EXTV ꢀConnectedꢀtoꢀanꢀOutput-DerivedꢀBoostꢀNetwork.ꢀ
1.ꢀ
EXTV ꢀLeftꢀOpenꢀ(orꢀGrounded).ꢀThisꢀwillꢀcauseꢀINTV ꢀ
CC CC
LTC3868-1
applicaTions inForMaTion
Theꢀfollowingꢀlistꢀsummarizesꢀtheꢀfourꢀpossibleꢀconnec-
andꢀtheꢀBOOSTꢀpinꢀfollows.ꢀWithꢀtheꢀtopsideꢀMOSFETꢀ
on,ꢀtheꢀboostꢀvoltageꢀisꢀaboveꢀtheꢀinputꢀsupply:ꢀV ꢀ=ꢀ
tionsꢀforꢀEXTV :
CC
BOOST
V ꢀ+ꢀV
.ꢀTheꢀvalueꢀofꢀtheꢀboostꢀcapacitor,ꢀC ,ꢀneedsꢀ
IN
INTVCC
B
toꢀbeꢀ100ꢀtimesꢀthatꢀofꢀtheꢀtotalꢀinputꢀcapacitanceꢀofꢀtheꢀ
topsideꢀMOSFET(s).ꢀTheꢀreverseꢀbreakdownꢀofꢀtheꢀexternalꢀ
toꢀbeꢀpoweredꢀfromꢀtheꢀinternalꢀ5.1Vꢀregulatorꢀresult-
ingꢀinꢀanꢀefficiencyꢀpenaltyꢀofꢀupꢀtoꢀ10%ꢀatꢀhighꢀinputꢀ
voltages.
SchottkyꢀdiodeꢀmustꢀbeꢀgreaterꢀthanꢀV
.ꢀ
IN(MAX)
Whenꢀadjustingꢀtheꢀgateꢀdriveꢀlevel,ꢀtheꢀfinalꢀarbiterꢀisꢀtheꢀ
totalꢀinputꢀcurrentꢀforꢀtheꢀregulator.ꢀIfꢀaꢀchangeꢀisꢀmadeꢀ
andꢀtheꢀinputꢀcurrentꢀdecreases,ꢀthenꢀtheꢀefficiencyꢀhasꢀ
improved.ꢀIfꢀthereꢀisꢀnoꢀchangeꢀinꢀinputꢀcurrent,ꢀthenꢀthereꢀ
isꢀnoꢀchangeꢀinꢀefficiency.
Fault Conditions: Current Limit and Current Foldback
Whenꢀtheꢀoutputꢀcurrentꢀhitsꢀtheꢀcurrentꢀlimit,ꢀtheꢀoutputꢀ
voltageꢀbeginsꢀtoꢀdrop.ꢀIfꢀtheꢀoutputꢀvoltageꢀfallsꢀbelowꢀ
70%ꢀofꢀitsꢀnominalꢀoutputꢀlevel,ꢀthenꢀtheꢀmaximumꢀsenseꢀ
voltageꢀisꢀprogressivelyꢀloweredꢀtoꢀaboutꢀone-halfꢀofꢀitsꢀ
maximumꢀselectedꢀvalue.ꢀUnderꢀshort-circuitꢀconditionsꢀ
withꢀveryꢀlowꢀdutyꢀcycles,ꢀtheꢀLTC3868-1ꢀwillꢀbeginꢀcycleꢀ
skippingꢀinꢀorderꢀtoꢀlimitꢀtheꢀshort-circuitꢀcurrent.ꢀInꢀthisꢀ
situationꢀtheꢀbottomꢀMOSFETꢀwillꢀbeꢀdissipatingꢀmostꢀofꢀ
theꢀpowerꢀbutꢀlessꢀthanꢀinꢀnormalꢀoperation.ꢀTheꢀshort-
circuitꢀrippleꢀcurrentꢀisꢀdeterminedꢀbyꢀtheꢀminimumꢀon-
CC
Forꢀ3.3Vꢀandꢀotherꢀlowꢀvoltageꢀregulators,ꢀefficiencyꢀ
gainsꢀcanꢀstillꢀbeꢀrealizedꢀbyꢀconnectingꢀEXTV ꢀtoꢀanꢀ
CC
output-derivedꢀvoltageꢀthatꢀhasꢀbeenꢀboostedꢀtoꢀgreaterꢀ
thanꢀ4.7V.ꢀThisꢀcanꢀbeꢀdoneꢀwithꢀtheꢀcapacitiveꢀchargeꢀ
pumpꢀshownꢀinꢀFigureꢀ8.ꢀEnsureꢀthatꢀEXTV ꢀ<ꢀV .
CC
IN
C
IN
BAT85
BAT85
V
IN
time,ꢀt
,ꢀofꢀtheꢀLTC3868-1ꢀ(≈90ns),ꢀtheꢀinputꢀvoltageꢀ
ON(MIN)
andꢀinductorꢀvalue:
MTOP
MBOT
BAT85
VN2222LL
TG1
1/2 LTC3868-1
L
R
V
L
SENSE
ON(MIN) IN
V
ΔIL(SC) = t
EXTV
SW
OUT
CC
ꢀ
C
D
BG1
OUT
Theꢀresultingꢀaverageꢀshort-circuitꢀcurrentꢀis:
38681 F08
50% •I
1
PGND
ISC =
LIM(MAX) – ∆IL(SC)
RSENSE
2
ꢀ
Figure 8. Capacitive Charge Pump for EXTVCC
Fault Conditions: Overvoltage Protection (Crowbar)
Topside MOSFET Driver Supply (C , D )
B
B
Theꢀovervoltageꢀcrowbarꢀisꢀdesignedꢀtoꢀblowꢀaꢀsystemꢀ
inputꢀfuseꢀwhenꢀtheꢀoutputꢀvoltageꢀofꢀtheꢀregulatorꢀrisesꢀ
muchꢀhigherꢀthanꢀnominalꢀlevels.ꢀTheꢀcrowbarꢀcausesꢀhugeꢀ
currentsꢀtoꢀflow,ꢀthatꢀblowꢀtheꢀfuseꢀtoꢀprotectꢀagainstꢀaꢀ
shortedꢀtopꢀMOSFETꢀifꢀtheꢀshortꢀoccursꢀwhileꢀtheꢀcontrol-
lerꢀisꢀoperating.
Externalꢀbootstrapꢀcapacitors,ꢀC ,ꢀconnectedꢀtoꢀtheꢀBOOSTꢀ
B
pinsꢀsupplyꢀtheꢀgateꢀdriveꢀvoltagesꢀforꢀtheꢀtopsideꢀMOSFETs.ꢀ
CapacitorꢀC ꢀinꢀtheꢀFunctionalꢀDiagramꢀisꢀchargedꢀthoughꢀ
B
externalꢀdiodeꢀD ꢀfromꢀINTV ꢀwhenꢀtheꢀSWꢀpinꢀisꢀlow.ꢀ
B
CC
WhenꢀoneꢀofꢀtheꢀtopsideꢀMOSFETsꢀisꢀtoꢀbeꢀturnedꢀon,ꢀtheꢀ
driverꢀplacesꢀtheꢀC ꢀvoltageꢀacrossꢀtheꢀgate-sourceꢀofꢀtheꢀ
B
desiredꢀMOSFET.ꢀThisꢀenhancesꢀtheꢀtopꢀMOSFETꢀswitchꢀ Aꢀcomparatorꢀmonitorsꢀtheꢀoutputꢀforꢀovervoltageꢀcondi-
andꢀturnsꢀitꢀon.ꢀTheꢀswitchꢀnodeꢀvoltage,ꢀSW,ꢀrisesꢀtoꢀV ꢀ tions.ꢀTheꢀcomparatorꢀdetectsꢀfaultsꢀgreaterꢀthanꢀ10%ꢀ
IN
38681fb
ꢁꢁ
LTC3868-1
applicaTions inForMaTion
1000
900
800
700
600
500
400
300
200
100
0
aboveꢀtheꢀnominalꢀoutputꢀvoltage.ꢀWhenꢀthisꢀconditionꢀ
isꢀsensed,ꢀtheꢀtopꢀMOSFETꢀisꢀturnedꢀoffꢀandꢀtheꢀbottomꢀ
MOSFETꢀisꢀturnedꢀonꢀuntilꢀtheꢀovervoltageꢀconditionꢀisꢀ
cleared.ꢀTheꢀbottomꢀMOSFETꢀremainsꢀonꢀcontinuouslyꢀ
forꢀasꢀlongꢀasꢀtheꢀovervoltageꢀconditionꢀpersists;ꢀifꢀV
returnsꢀtoꢀaꢀsafeꢀlevel,ꢀnormalꢀoperationꢀautomaticallyꢀ
resumes.ꢀ
ꢀ
OUT
AꢀshortedꢀtopꢀMOSFETꢀwillꢀresultꢀinꢀaꢀhighꢀcurrentꢀconditionꢀ
whichꢀwillꢀopenꢀtheꢀsystemꢀfuse.ꢀTheꢀswitchingꢀregulatorꢀ
willꢀregulateꢀproperlyꢀwithꢀaꢀleakyꢀtopꢀMOSFETꢀbyꢀalteringꢀ
theꢀdutyꢀcycleꢀtoꢀaccommodateꢀtheꢀleakage.
15 25 35 45 55 65 75 85 95 105 115 125
FREQ PIN RESISTOR (kΩ)
38681 F09
Phase-Locked Loop and Frequency Synchronization
Figure 9. Relationship Between Oscillator Frequency
and Resistor Value at the FREQ Pin
TheꢀLTC3868-1ꢀhasꢀanꢀinternalꢀphase-lockedꢀloopꢀ(PLL)ꢀ
comprisedꢀofꢀaꢀphaseꢀfrequencyꢀdetector,ꢀaꢀlowpassꢀfilter,ꢀ
andꢀaꢀvoltage-controlledꢀoscillatorꢀ(VCO).ꢀThisꢀallowsꢀtheꢀ
turn-onꢀofꢀtheꢀtopꢀMOSFETꢀofꢀcontrollerꢀ1ꢀtoꢀbeꢀlockedꢀtoꢀ
theꢀrisingꢀedgeꢀofꢀanꢀexternalꢀclockꢀsignalꢀappliedꢀtoꢀtheꢀ
PLLIN/MODEꢀpin.ꢀTheꢀturn-onꢀofꢀcontrollerꢀ2’sꢀtopꢀMOSFETꢀ
isꢀthusꢀ180ꢀdegreesꢀoutꢀofꢀphaseꢀwithꢀtheꢀexternalꢀclock.ꢀ
Theꢀphaseꢀdetectorꢀisꢀanꢀedgeꢀsensitiveꢀdigitalꢀtypeꢀthatꢀ
providesꢀzeroꢀdegreesꢀphaseꢀshiftꢀbetweenꢀtheꢀexternalꢀ
andꢀinternalꢀoscillators.ꢀThisꢀtypeꢀofꢀphaseꢀdetectorꢀdoesꢀ
notꢀexhibitꢀfalseꢀlockꢀtoꢀharmonicsꢀofꢀtheꢀexternalꢀclock.
RapidꢀphaseꢀlockingꢀcanꢀbeꢀachievedꢀbyꢀusingꢀtheꢀFREQꢀ
pinꢀ toꢀ setꢀ aꢀ free-runningꢀ frequencyꢀ nearꢀ theꢀ desiredꢀ
synchronizationꢀfrequency.ꢀTheꢀVCO’sꢀinputꢀvoltageꢀisꢀ
prebiasedꢀatꢀaꢀfrequencyꢀcorrespondingꢀtoꢀtheꢀfrequencyꢀ
setꢀbyꢀtheꢀFREQꢀpin.ꢀOnceꢀprebiased,ꢀtheꢀPLLꢀonlyꢀneedsꢀ
toꢀadjustꢀtheꢀfrequencyꢀslightlyꢀtoꢀachieveꢀphaseꢀlockꢀ
andꢀsynchronization.ꢀAlthoughꢀitꢀisꢀnotꢀrequiredꢀthatꢀtheꢀ
free-runningꢀfrequencyꢀbeꢀnearꢀexternalꢀclockꢀfrequency,ꢀ
doingꢀsoꢀwillꢀpreventꢀtheꢀoperatingꢀfrequencyꢀfromꢀpassingꢀ
throughꢀaꢀlargeꢀrangeꢀofꢀfrequenciesꢀasꢀtheꢀPLLꢀlocks.
Ifꢀtheꢀexternalꢀclockꢀfrequencyꢀisꢀgreaterꢀthanꢀtheꢀinternalꢀ
NoteꢀthatꢀtheꢀLTC3868-1ꢀcanꢀonlyꢀbeꢀsynchronizedꢀtoꢀanꢀ
externalꢀ clockꢀ whoseꢀ frequencyꢀ isꢀ withinꢀ rangeꢀ ofꢀ theꢀ
LTC3868-1’sꢀ internalꢀ VCO,ꢀ whichꢀ isꢀ nominallyꢀ 55kHzꢀ
toꢀ1MHz.ꢀThisꢀisꢀguaranteedꢀtoꢀbeꢀbetweenꢀ75kHzꢀandꢀ
850kHz.ꢀ
oscillator’sꢀfrequency,ꢀf ,ꢀthenꢀcurrentꢀisꢀsourcedꢀcontinu-
OSC
ouslyꢀfromꢀtheꢀphaseꢀdetectorꢀoutput,ꢀpullingꢀupꢀtheꢀVCOꢀ
input.ꢀWhenꢀtheꢀexternalꢀclockꢀfrequencyꢀisꢀlessꢀthanꢀf ,ꢀ
OSC
currentꢀisꢀsunkꢀcontinuously,ꢀpullingꢀdownꢀtheꢀVCOꢀinput.ꢀ
Ifꢀtheꢀexternalꢀandꢀinternalꢀfrequenciesꢀareꢀtheꢀsameꢀbutꢀ
exhibitꢀaꢀphaseꢀdifference,ꢀtheꢀcurrentꢀsourcesꢀturnꢀonꢀforꢀ
anꢀamountꢀofꢀtimeꢀcorrespondingꢀtoꢀtheꢀphaseꢀdifference.ꢀ
TheꢀvoltageꢀatꢀtheꢀVCOꢀinputꢀisꢀadjustedꢀuntilꢀtheꢀphaseꢀ
andꢀfrequencyꢀofꢀtheꢀinternalꢀandꢀexternalꢀoscillatorsꢀareꢀ
identical.ꢀAtꢀtheꢀstableꢀoperatingꢀpoint,ꢀtheꢀphaseꢀdetectorꢀ
outputꢀisꢀhighꢀimpedanceꢀandꢀtheꢀinternalꢀfilterꢀcapacitor,ꢀ
Tableꢀ2ꢀsummarizesꢀtheꢀdifferentꢀstatesꢀinꢀwhichꢀtheꢀFREQꢀ
pinꢀcanꢀbeꢀused.
Table 2
FREQ PIN
PLLIN/MODE PIN
DCꢀVoltage
FREQUENCY
350kHz
0V
INTV
DCꢀVoltage
535kHz
CC
C ,ꢀholdsꢀtheꢀvoltageꢀatꢀtheꢀVCOꢀinput.
LPꢀ
Resistor
DCꢀVoltage
50kHz–900kHz
AnyꢀofꢀtheꢀAbove
ExternalꢀClock
Phase–Lockedꢀtoꢀ
ExternalꢀClock
Typically,ꢀ theꢀ externalꢀ clockꢀ (onꢀ theꢀ PLLIN/MODEꢀ pin)ꢀ
inputꢀhighꢀthresholdꢀisꢀ1.6V,ꢀwhileꢀtheꢀinputꢀlowꢀthresholdꢀ
isꢀ1.1V.
38681fb
ꢁꢂ
INTV ꢀcurrentꢀisꢀtheꢀsumꢀofꢀtheꢀMOSFETꢀdriverꢀandꢀ
3.ꢀ
I RꢀlossesꢀareꢀpredictedꢀfromꢀtheꢀDCꢀresistancesꢀofꢀtheꢀ
1.ꢀ
2.ꢀ
TheꢀV ꢀcurrentꢀisꢀtheꢀDCꢀinputꢀsupplyꢀcurrentꢀgivenꢀ
LTC3868-1
applicaTions inForMaTion
Minimum On-Time Considerations
IN
inꢀtheꢀElectricalꢀCharacteristicsꢀtable,ꢀwhichꢀexcludesꢀ
Minimumꢀon-time,ꢀt
,ꢀisꢀtheꢀsmallestꢀtimeꢀdura-
ON(MIN)
MOSFETꢀdriverꢀandꢀcontrolꢀcurrents.ꢀV ꢀcurrentꢀtypi-
IN
tionꢀthatꢀtheꢀLTC3868-1ꢀisꢀcapableꢀofꢀturningꢀonꢀtheꢀtopꢀ
MOSFET.ꢀItꢀisꢀdeterminedꢀbyꢀinternalꢀtimingꢀdelaysꢀandꢀtheꢀ
gateꢀchargeꢀrequiredꢀtoꢀturnꢀonꢀtheꢀtopꢀMOSFET.ꢀLowꢀdutyꢀ
cycleꢀapplicationsꢀmayꢀapproachꢀthisꢀminimumꢀon-timeꢀ
limitꢀandꢀcareꢀshouldꢀbeꢀtakenꢀtoꢀensureꢀthat:
callyꢀresultsꢀinꢀaꢀsmallꢀ(<0.1%)ꢀloss.
CC
controlꢀcurrents.ꢀTheꢀMOSFETꢀdriverꢀcurrentꢀresultsꢀ
fromꢀ switchingꢀ theꢀ gateꢀ capacitanceꢀ ofꢀ theꢀ powerꢀ
MOSFETs.ꢀEachꢀtimeꢀaꢀMOSFETꢀgateꢀisꢀswitchedꢀfromꢀ
lowꢀtoꢀhighꢀtoꢀlowꢀagain,ꢀaꢀpacketꢀofꢀcharge,ꢀdQ,ꢀmovesꢀ
VOUT
tON(MIN)
<
V
f
IN
fromꢀINTV ꢀtoꢀground.ꢀTheꢀresultingꢀdQ/dtꢀisꢀaꢀcurrentꢀ
CC
ꢀ
outꢀofꢀINTV ꢀthatꢀisꢀtypicallyꢀmuchꢀlargerꢀthanꢀtheꢀ
CC
Ifꢀtheꢀdutyꢀcycleꢀfallsꢀbelowꢀwhatꢀcanꢀbeꢀaccommodatedꢀ
byꢀtheꢀminimumꢀon-time,ꢀtheꢀcontrollerꢀwillꢀbeginꢀtoꢀskipꢀ
cycles.ꢀTheꢀoutputꢀvoltageꢀwillꢀcontinueꢀtoꢀbeꢀregulated,ꢀ
butꢀtheꢀrippleꢀvoltageꢀandꢀcurrentꢀwillꢀincrease.
controlꢀcircuitꢀcurrent.ꢀInꢀcontinuousꢀmode,ꢀI
ꢀ
GATECHG
=ꢀf(Q ꢀ+ꢀQ ),ꢀwhereꢀQ ꢀandꢀQ ꢀareꢀtheꢀgateꢀchargesꢀofꢀ
T
B
T
B
theꢀtopsideꢀandꢀbottomꢀsideꢀMOSFETs.
ꢀ SupplyingꢀINTV ꢀfromꢀanꢀoutput-derivedꢀpowerꢀsourceꢀ
CC
Theꢀminimumꢀon-timeꢀforꢀtheꢀLTC3868-1ꢀisꢀapproximatelyꢀ
95ns.ꢀHowever,ꢀasꢀtheꢀpeakꢀsenseꢀvoltageꢀdecreasesꢀtheꢀ
minimumꢀon-timeꢀgraduallyꢀincreasesꢀupꢀtoꢀaboutꢀ130ns.ꢀ
Thisꢀisꢀofꢀparticularꢀconcernꢀinꢀforcedꢀcontinuousꢀapplica-
tionsꢀwithꢀlowꢀrippleꢀcurrentꢀatꢀlightꢀloads.ꢀIfꢀtheꢀdutyꢀcycleꢀ
dropsꢀbelowꢀtheꢀminimumꢀon-timeꢀlimitꢀinꢀthisꢀsituation,ꢀ
aꢀsignificantꢀamountꢀofꢀcycleꢀskippingꢀcanꢀoccurꢀwithꢀcor-
respondinglyꢀlargerꢀcurrentꢀandꢀvoltageꢀripple.
throughꢀ EXTV ꢀ willꢀ scaleꢀ theꢀ V ꢀ currentꢀ requiredꢀ
CC
IN
forꢀtheꢀdriverꢀandꢀcontrolꢀcircuitsꢀbyꢀaꢀfactorꢀofꢀ(Dutyꢀ
Cycle)/(Efficiency).ꢀForꢀexample,ꢀinꢀaꢀ20Vꢀtoꢀ5Vꢀapplica-
tion,ꢀ10mAꢀofꢀINTV ꢀcurrentꢀresultsꢀinꢀapproximatelyꢀ
CC
2.5mAꢀofꢀV ꢀcurrent.ꢀThisꢀreducesꢀtheꢀmidcurrentꢀlossꢀ
IN
fromꢀ10%ꢀorꢀmoreꢀ(ifꢀtheꢀdriverꢀwasꢀpoweredꢀdirectlyꢀ
fromꢀV )ꢀtoꢀonlyꢀaꢀfewꢀpercent.
IN
2
fuseꢀ(ifꢀused),ꢀMOSFET,ꢀinductor,ꢀcurrentꢀsenseꢀresis-
tor,ꢀandꢀinputꢀandꢀoutputꢀcapacitorꢀESR.ꢀInꢀcontinuousꢀ
modeꢀtheꢀaverageꢀoutputꢀcurrentꢀflowsꢀthroughꢀLꢀandꢀ
Efficiency Considerations
Theꢀpercentꢀefficiencyꢀofꢀaꢀswitchingꢀregulatorꢀisꢀequalꢀtoꢀ
theꢀoutputꢀpowerꢀdividedꢀbyꢀtheꢀinputꢀpowerꢀtimesꢀ100%.ꢀ
Itꢀisꢀoftenꢀusefulꢀtoꢀanalyzeꢀindividualꢀlossesꢀtoꢀdetermineꢀ
whatꢀisꢀlimitingꢀtheꢀefficiencyꢀandꢀwhichꢀchangeꢀwouldꢀ
produceꢀtheꢀmostꢀimprovement.ꢀPercentꢀefficiencyꢀcanꢀ
beꢀexpressedꢀas:
R
,ꢀbutꢀisꢀchoppedꢀbetweenꢀtheꢀtopsideꢀMOSFETꢀ
SENSE
andꢀtheꢀsynchronousꢀMOSFET.ꢀIfꢀtheꢀtwoꢀMOSFETsꢀhaveꢀ
approximatelyꢀtheꢀsameꢀR
,ꢀthenꢀtheꢀresistanceꢀ
DS(ON)
ofꢀoneꢀMOSFETꢀcanꢀsimplyꢀbeꢀsummedꢀwithꢀtheꢀresis-
2
tancesꢀofꢀL,ꢀR
ꢀandꢀESRꢀtoꢀobtainꢀI Rꢀlosses.ꢀForꢀ
DS(ON)
SENSE
example,ꢀifꢀeachꢀR
ꢀ=ꢀ30mΩ,ꢀR ꢀ=ꢀ50mΩ,ꢀR
ꢀ
ꢀ %Efficiencyꢀ=ꢀ100%ꢀ–ꢀ(L1ꢀ+ꢀL2ꢀ+ꢀL3ꢀ+ꢀ...)
L
SENSE
=ꢀ10mΩꢀandꢀR ꢀ=ꢀ40mΩꢀ(sumꢀofꢀbothꢀinputꢀandꢀ
ESR
whereꢀL1,ꢀL2,ꢀetc.ꢀareꢀtheꢀindividualꢀlossesꢀasꢀaꢀpercent-
ageꢀofꢀinputꢀpower.
outputꢀcapacitanceꢀlosses),ꢀthenꢀtheꢀtotalꢀresistanceꢀ
isꢀ130mΩ.ꢀThisꢀresultsꢀinꢀlossesꢀrangingꢀfromꢀ3%ꢀtoꢀ
13%ꢀasꢀtheꢀoutputꢀcurrentꢀincreasesꢀfromꢀ1Aꢀtoꢀ5Aꢀforꢀ
aꢀ5Vꢀoutput,ꢀorꢀaꢀ4%ꢀtoꢀ20%ꢀlossꢀforꢀaꢀ3.3Vꢀoutput.ꢀ
Althoughꢀallꢀdissipativeꢀelementsꢀinꢀtheꢀcircuitꢀproduceꢀ
losses,ꢀfourꢀmainꢀsourcesꢀusuallyꢀaccountꢀforꢀmostꢀofꢀ
theꢀlossesꢀinꢀLTC3868-1ꢀcircuits:ꢀ1)ꢀICꢀV ꢀcurrent,ꢀ2)ꢀ
EfficiencyꢀvariesꢀasꢀtheꢀinverseꢀsquareꢀofꢀV ꢀforꢀtheꢀ
IN
OUT
2
INTV ꢀregulatorꢀcurrent,ꢀ3)ꢀI Rꢀlosses,ꢀ4)ꢀtopsideꢀMOSFETꢀ
sameꢀexternalꢀcomponentsꢀandꢀoutputꢀpowerꢀlevel.ꢀTheꢀ
combinedꢀeffectsꢀofꢀincreasinglyꢀlowerꢀoutputꢀvoltagesꢀ
andꢀhigherꢀcurrentsꢀrequiredꢀbyꢀhighꢀperformanceꢀdigitalꢀ
systemsꢀisꢀnotꢀdoublingꢀbutꢀquadruplingꢀtheꢀimportanceꢀ
ofꢀlossꢀtermsꢀinꢀtheꢀswitchingꢀregulatorꢀsystem!
CC
transitionꢀlosses.
38681fb
ꢁꢃ
LTC3868-1
applicaTions inForMaTion
4.ꢀTransitionꢀlossesꢀapplyꢀonlyꢀtoꢀtheꢀtopsideꢀMOSFET(s),ꢀ canꢀalsoꢀbeꢀestimatedꢀbyꢀexaminingꢀtheꢀriseꢀtimeꢀatꢀtheꢀ
andꢀbecomeꢀsignificantꢀonlyꢀwhenꢀoperatingꢀatꢀhighꢀ pin.ꢀTheꢀITHꢀexternalꢀcomponentsꢀshownꢀinꢀFigureꢀ12ꢀ
inputꢀ voltagesꢀ (t
y
picallyꢀ 15Vꢀ orꢀ greater).ꢀ Transitionꢀ circuitꢀwillꢀprovideꢀanꢀadequateꢀstartingꢀpointꢀforꢀmostꢀ
applications.
lossesꢀcanꢀbeꢀestimatedꢀfrom:
ꢀ ꢀ TransitionꢀLossꢀ=ꢀ(1.7) •ꢀV •ꢀ2 •ꢀI
•ꢀC
•ꢀf
TheꢀI ꢀseriesꢀR -C ꢀfilterꢀsetsꢀtheꢀdominantꢀpole-zeroꢀ
TH C C
ꢀ
INꢀ
ꢀ
O(MAX)ꢀ RSSꢀ
loopꢀcompensation.ꢀTheꢀvaluesꢀcanꢀbeꢀmodifiedꢀslightlyꢀ
(fromꢀ0.5ꢀtoꢀ2ꢀtimesꢀtheirꢀsuggestedꢀvalues)ꢀtoꢀoptimizeꢀ
transientꢀresponseꢀonceꢀtheꢀfinalꢀPCꢀlayoutꢀisꢀdoneꢀandꢀ
theꢀparticularꢀoutputꢀcapacitorꢀtypeꢀandꢀvalueꢀhaveꢀbeenꢀ
determined.ꢀTheꢀoutputꢀcapacitorsꢀneedꢀtoꢀbeꢀselectedꢀ
becauseꢀtheꢀvariousꢀtypesꢀandꢀvaluesꢀdetermineꢀtheꢀloopꢀ
gainꢀandꢀphase.ꢀAnꢀoutputꢀcurrentꢀpulseꢀofꢀ20%ꢀtoꢀ80%ꢀ
ofꢀfull-loadꢀcurrentꢀhavingꢀaꢀriseꢀtimeꢀofꢀ1µsꢀtoꢀ10µsꢀwillꢀ
ꢀ Otherꢀhiddenꢀlossesꢀsuchꢀasꢀcopperꢀtraceꢀandꢀinternalꢀ
batteryꢀresistancesꢀcanꢀaccountꢀforꢀanꢀadditionalꢀ5%ꢀ
toꢀ10%ꢀefficiencyꢀdegradationꢀinꢀportableꢀsystems.ꢀItꢀ
isꢀveryꢀimportantꢀtoꢀincludeꢀtheseꢀsystemꢀlevelꢀlossesꢀ
duringꢀtheꢀdesignꢀphase.ꢀTheꢀinternalꢀbatteryꢀandꢀfuseꢀ
resistanceꢀlossesꢀcanꢀbeꢀminimizedꢀbyꢀmakingꢀsureꢀthatꢀ
C ꢀhasꢀadequateꢀchargeꢀstorageꢀandꢀveryꢀlowꢀESRꢀatꢀ
IN
theꢀswitchingꢀfrequency.ꢀAꢀ25Wꢀsupplyꢀwillꢀtypicallyꢀ
requireꢀ aꢀ minimumꢀ ofꢀ 20µFꢀ toꢀ 40µFꢀ ofꢀ capacitanceꢀ
havingꢀaꢀmaximumꢀofꢀ20mΩꢀtoꢀ50mΩꢀofꢀESR.ꢀTheꢀ
LTC3868-1ꢀ2-phaseꢀarchitectureꢀtypicallyꢀhalvesꢀthisꢀ
inputꢀcapacitanceꢀrequirementꢀoverꢀcompetingꢀsolu-
produceꢀoutputꢀvoltageꢀandꢀI ꢀpinꢀwaveformsꢀthatꢀwillꢀ
TH
giveꢀaꢀsenseꢀofꢀtheꢀoverallꢀloopꢀstabilityꢀwithoutꢀbreakingꢀ
theꢀfeedbackꢀloop.ꢀ
Placingꢀ aꢀ resistiveꢀ loadꢀ andꢀ aꢀ powerꢀ MOSFETꢀ directlyꢀ
tions.ꢀOtherꢀlossesꢀincludingꢀSchottkyꢀconductionꢀlossesꢀ acrossꢀtheꢀoutputꢀcapacitorꢀandꢀdrivingꢀtheꢀgateꢀwithꢀanꢀ
duringꢀdead-timeꢀandꢀinductorꢀcoreꢀlossesꢀgenerallyꢀ appropriateꢀsignalꢀgeneratorꢀisꢀaꢀpracticalꢀwayꢀtoꢀproduceꢀ
accountꢀforꢀlessꢀthanꢀ2%ꢀtotalꢀadditionalꢀloss.
aꢀrealisticꢀloadꢀstepꢀcondition.ꢀTheꢀinitialꢀoutputꢀvoltageꢀ
stepꢀresultingꢀfromꢀtheꢀstepꢀchangeꢀinꢀoutputꢀcurrentꢀmayꢀ
notꢀbeꢀwithinꢀtheꢀbandwidthꢀofꢀtheꢀfeedbackꢀloop,ꢀsoꢀthisꢀ
signalꢀcannotꢀbeꢀusedꢀtoꢀdetermineꢀphaseꢀmargin.ꢀThisꢀ
Checking Transient Response
Theꢀregulatorꢀloopꢀresponseꢀcanꢀbeꢀcheckedꢀbyꢀlookingꢀatꢀ
theꢀloadꢀcurrentꢀtransientꢀresponse.ꢀSwitchingꢀregulatorsꢀ
takeꢀseveralꢀcyclesꢀtoꢀrespondꢀtoꢀaꢀstepꢀinꢀDCꢀ(resistive)ꢀ
loadꢀcurrent.ꢀWhenꢀaꢀloadꢀstepꢀoccurs,ꢀVOUTꢀshiftsꢀbyꢀ
anꢀamountꢀequalꢀtoꢀ∆ILOADꢀ(ESR),ꢀwhereꢀESRꢀisꢀtheꢀef-
fectiveꢀseriesꢀresistanceꢀofꢀCOUTꢀ.ꢀ∆ILOADꢀalsoꢀbeginsꢀtoꢀ
chargeꢀorꢀdischargeꢀCOUTꢀgeneratingꢀtheꢀfeedbackꢀerrorꢀ
signalꢀthatꢀforcesꢀtheꢀregulatorꢀtoꢀadaptꢀtoꢀtheꢀcurrentꢀ
changeꢀandꢀreturnꢀVOUTꢀtoꢀitsꢀsteady-stateꢀvalue.ꢀDuringꢀ
thisꢀrecoveryꢀtimeꢀVOUTꢀcanꢀbeꢀmonitoredꢀforꢀexcessiveꢀ
overshootꢀorꢀ ringing,ꢀ whichꢀ wouldꢀindicateꢀ aꢀ stabilityꢀ
problem.ꢀOPTI-LOOPꢀcompensationꢀallowsꢀtheꢀtransientꢀ
responseꢀtoꢀbeꢀoptimizedꢀoverꢀaꢀwideꢀrangeꢀofꢀoutputꢀ
capacitanceꢀandꢀESRꢀvalues.ꢀThe availability of the ITH pin
not only allows optimization of control loop behavior, but
it also provides a DC coupled and AC filtered closed-loop
response test point. The DC step, rise time and settling
at this test point truly reflects the closed-loop response.ꢀ
Assumingꢀaꢀpredominantlyꢀsecondꢀorderꢀsystem,ꢀphaseꢀ
marginꢀand/orꢀdampingꢀfactorꢀcanꢀbeꢀestimatedꢀusingꢀtheꢀ
percentageꢀofꢀovershootꢀseenꢀatꢀthisꢀpin.ꢀTheꢀbandwidthꢀ
isꢀwhyꢀitꢀisꢀbetterꢀtoꢀlookꢀatꢀtheꢀI ꢀpinꢀsignalꢀwhichꢀisꢀinꢀ
TH
theꢀfeedbackꢀloopꢀandꢀisꢀtheꢀfilteredꢀandꢀcompensatedꢀ
controlꢀloopꢀresponse.ꢀ
TheꢀgainꢀofꢀtheꢀloopꢀwillꢀbeꢀincreasedꢀbyꢀincreasingꢀR ꢀ
C
andꢀtheꢀbandwidthꢀofꢀtheꢀloopꢀwillꢀbeꢀincreasedꢀbyꢀde-
creasingꢀC .ꢀIfꢀR ꢀisꢀincreasedꢀbyꢀtheꢀsameꢀfactorꢀthatꢀC ꢀ
C
C
C
isꢀdecreased,ꢀtheꢀzeroꢀfrequencyꢀwillꢀbeꢀkeptꢀtheꢀsame,ꢀ
therebyꢀkeepingꢀtheꢀphaseꢀshiftꢀtheꢀsameꢀinꢀtheꢀmostꢀ
criticalꢀfrequencyꢀrangeꢀofꢀtheꢀfeedbackꢀloop.ꢀTheꢀoutputꢀ
voltageꢀsettlingꢀbehaviorꢀisꢀrelatedꢀtoꢀtheꢀstabilityꢀofꢀtheꢀ
closed-loopꢀsystemꢀandꢀwillꢀdemonstrateꢀtheꢀactualꢀoverallꢀ
supplyꢀperformance.
Aꢀsecond,ꢀmoreꢀsevereꢀtransientꢀisꢀcausedꢀbyꢀswitchingꢀ
inꢀloadsꢀwithꢀlargeꢀ(>1µF)ꢀsupplyꢀbypassꢀcapacitors.ꢀTheꢀ
dischargedꢀbypassꢀcapacitorsꢀareꢀeffectivelyꢀputꢀinꢀparallelꢀ
withꢀC ,ꢀcausingꢀaꢀrapidꢀdropꢀinꢀV .ꢀNoꢀregulatorꢀcanꢀ
OUTꢀ
OUTꢀ
alterꢀitsꢀdeliveryꢀofꢀcurrentꢀquicklyꢀenoughꢀtoꢀpreventꢀthisꢀ
suddenꢀstepꢀchangeꢀinꢀoutputꢀvoltageꢀifꢀtheꢀloadꢀswitchꢀ
resistanceꢀisꢀlowꢀandꢀitꢀisꢀdrivenꢀquickly.ꢀIfꢀtheꢀratioꢀofꢀ
38681fb
ꢁꢄ
LTC3868-1
applicaTions inForMaTion
C
ꢀtoꢀC ꢀisꢀgreaterꢀthanꢀ1:50,ꢀtheꢀswitchꢀriseꢀtimeꢀ TheꢀpowerꢀdissipationꢀonꢀtheꢀtopsideꢀMOSFETꢀcanꢀbeꢀeasilyꢀ
LOAD
OUT
shouldꢀbeꢀcontrolledꢀsoꢀthatꢀtheꢀloadꢀriseꢀtimeꢀisꢀlimitedꢀ estimated.ꢀChoosingꢀaꢀFairchildꢀFDS6982SꢀdualꢀMOSFETꢀ
toꢀapproximatelyꢀ25ꢀ•ꢀC .ꢀThusꢀaꢀ10µFꢀcapacitorꢀwouldꢀ resultsꢀin:ꢀR ꢀ=ꢀ0.035Ω/0.022Ω,ꢀC ꢀ=ꢀ215pF.ꢀAtꢀ
LOAD
DS(ON)
MILLER
requireꢀaꢀ250µsꢀriseꢀtime,ꢀlimitingꢀtheꢀchargingꢀcurrentꢀ maximumꢀinputꢀvoltageꢀwithꢀT(estimated)ꢀ=ꢀ50°C:
toꢀaboutꢀ200mA.
2
3.3V
22V
PMAIN
=
6A 1+ 0.005 50°C – 25°C
(
)
(
)(
)
Design Example
2 6A
Asꢀ aꢀ designꢀ exampleꢀ forꢀ oneꢀ channel,ꢀ assumeꢀ V ꢀ =ꢀ
0.035Ω + 22V
2.5Ω 215pF •
(
) (
)
1
(
)(
)
IN
2
12V(nominal),ꢀV ꢀ=ꢀ22Vꢀ(max),ꢀV ꢀ=ꢀ3.3V,ꢀI ꢀ=ꢀ6A,ꢀ
IN
OUT
MAX
1
V
ꢀ=ꢀ50mVꢀandꢀfꢀ=ꢀ350kHz.
SENSE(MAX)
+
350kHz = 433mW
(
)
5V – 2.3V 2.3V
Theꢀinductanceꢀvalueꢀisꢀchosenꢀfirstꢀbasedꢀonꢀaꢀ30%ꢀrippleꢀ
currentꢀassumption.ꢀTheꢀhighestꢀvalueꢀofꢀrippleꢀcurrentꢀ
occursꢀatꢀtheꢀmaximumꢀinputꢀvoltage.ꢀTieꢀtheꢀFREQꢀpinꢀ
toꢀ GND,ꢀ generatingꢀ 350kHzꢀ operation.ꢀ Theꢀ minimumꢀ
inductanceꢀforꢀ30%ꢀrippleꢀcurrentꢀis:
ꢀ
Aꢀshort-circuitꢀtoꢀgroundꢀwillꢀresultꢀinꢀaꢀfoldedꢀbackꢀcur-
rentꢀof:
95ns 22V
(
)
25mV
0.006Ω 2
1
ISC =
–
= 3.9A
3.9µH
VOUT
f L
VOUT
ꢀ
ΔIL(NOM)
=
1–
IN(NOM)
V
withꢀaꢀtypicalꢀvalueꢀofꢀR
=ꢀ0.125.ꢀTheꢀresultingꢀpowerꢀdissipatedꢀinꢀtheꢀbottomꢀ
ꢀandꢀδꢀ=ꢀ(0.005/°C)(25°C)ꢀ
ꢀ
DS(ON)
Aꢀ3.9µHꢀinductorꢀwillꢀproduceꢀ29%ꢀrippleꢀcurrent.ꢀTheꢀ
peakꢀinductorꢀcurrentꢀwillꢀbeꢀtheꢀmaximumꢀDCꢀvalueꢀplusꢀ
oneꢀhalfꢀtheꢀrippleꢀcurrent,ꢀorꢀ6.88A.ꢀIncreasingꢀtheꢀrippleꢀ
currentꢀwillꢀalsoꢀhelpꢀensureꢀthatꢀtheꢀminimumꢀon-timeꢀ
ofꢀ95nsꢀisꢀnotꢀviolated.ꢀTheꢀminimumꢀon-timeꢀoccursꢀatꢀ
MOSFETꢀis:
2
P
= 3.9A 1.125 0.022Ω = 376mW
whichꢀisꢀlessꢀthanꢀunderꢀfull-loadꢀconditions.
ꢀ
SYNC
maximumꢀV :
IN
C ꢀisꢀchosenꢀforꢀanꢀRMSꢀcurrentꢀratingꢀofꢀatꢀleastꢀ3Aꢀatꢀ
temperatureꢀassumingꢀonlyꢀthisꢀchannelꢀisꢀon.ꢀC ꢀisꢀ
chosenꢀwithꢀanꢀESRꢀofꢀ0.02Ωꢀforꢀlowꢀoutputꢀripple.ꢀTheꢀ
outputꢀrippleꢀinꢀcontinuousꢀmodeꢀwillꢀbeꢀhighestꢀatꢀtheꢀ
maximumꢀinputꢀvoltage.ꢀTheꢀoutputꢀvoltageꢀrippleꢀdueꢀtoꢀ
ESRꢀisꢀapproximately:
IN
VOUT
3.3V
OUT
tON(MIN)
=
=
= 429ns
V
f
22V 350kHz
IN(MAX)
ꢀ
TheꢀequivalentꢀR
ꢀresistorꢀvalueꢀcanꢀbeꢀcalculatedꢀbyꢀ
SENSE
usingꢀtheꢀminimumꢀvalueꢀforꢀtheꢀmaximumꢀcurrentꢀsenseꢀ
thresholdꢀ(43mV):
ꢀ V
ꢀ=ꢀR (∆I )ꢀ=ꢀ0.02Ω(1.75A)ꢀ=ꢀ35mV
ESR L P-P
ORIPPLE
43mV
6.88A
RSENSE
≤
= 0.006Ω
ꢀ
Choosingꢀ1%ꢀresistors:ꢀR ꢀ=ꢀ25kꢀandꢀR ꢀ=ꢀ78.1kꢀyieldsꢀ
A
B
anꢀoutputꢀvoltageꢀofꢀ3.299V.
38681fb
ꢁꢅ
1.ꢀ
2.ꢀ
AreꢀtheꢀtopꢀN-channelꢀMOSFETsꢀMTOP1ꢀandꢀMTOP2ꢀ
locatedꢀwithinꢀ1cmꢀofꢀeachꢀotherꢀwithꢀaꢀcommonꢀdrainꢀ
Areꢀtheꢀsignalꢀandꢀpowerꢀgroundsꢀkeptꢀseparate?ꢀTheꢀ
PC Board Layout Checklist
6.ꢀ
Keepꢀtheꢀswitchingꢀnodesꢀ(SW1,ꢀSW2),ꢀtopꢀgateꢀnodesꢀ
(TG1,ꢀTG2),ꢀandꢀboostꢀnodesꢀ(BOOST1,ꢀBOOST2)ꢀawayꢀ
fromꢀ sensitiveꢀ small-signalꢀ nodes,ꢀ especiallyꢀ fromꢀ
theꢀoppositesꢀchannel’sꢀvoltageꢀandꢀcurrentꢀsensingꢀ
feedbackꢀpins.ꢀAllꢀofꢀtheseꢀnodesꢀhaveꢀveryꢀlargeꢀandꢀ
fastꢀmovingꢀsignalsꢀandꢀthereforeꢀshouldꢀbeꢀkeptꢀonꢀ
theꢀoutput sideꢀofꢀtheꢀLTC3868-1ꢀandꢀoccupyꢀminimumꢀ
PCꢀtraceꢀarea.
LTC3868-1
applicaTions inForMaTion
Whenꢀlayingꢀoutꢀtheꢀprintedꢀcircuitꢀboard,ꢀtheꢀfollowingꢀ
checklistꢀshouldꢀbeꢀusedꢀtoꢀensureꢀproperꢀoperationꢀofꢀ
theꢀIC.ꢀTheseꢀitemsꢀareꢀalsoꢀillustratedꢀgraphicallyꢀinꢀtheꢀ
layoutꢀdiagramꢀofꢀFigureꢀ10.ꢀFigureꢀ11ꢀillustratesꢀtheꢀcurrentꢀ
waveformsꢀpresentꢀinꢀtheꢀvariousꢀbranchesꢀofꢀtheꢀ2-phaseꢀ
synchronousꢀregulatorsꢀoperatingꢀinꢀtheꢀcontinuousꢀmode.ꢀ
Checkꢀtheꢀfollowingꢀinꢀyourꢀlayout:
7.ꢀUseꢀaꢀmodifiedꢀstargroundꢀtechnique:ꢀaꢀlowꢀimpedance,ꢀ
largeꢀcopperꢀareaꢀcentralꢀgroundingꢀpointꢀonꢀtheꢀsameꢀ
sideꢀofꢀtheꢀPCꢀboardꢀasꢀtheꢀinputꢀandꢀoutputꢀcapacitorsꢀ
connectionꢀatꢀC ?ꢀDoꢀnotꢀattemptꢀtoꢀsplitꢀtheꢀinputꢀ
IN
withꢀtie-insꢀforꢀtheꢀbottomꢀofꢀtheꢀINTV ꢀdecouplingꢀ
CC
decouplingꢀforꢀtheꢀtwoꢀchannelsꢀasꢀitꢀcanꢀcauseꢀaꢀlargeꢀ
resonantꢀloop.
capacitor,ꢀtheꢀbottomꢀofꢀtheꢀvoltageꢀfeedbackꢀresistiveꢀ
dividerꢀandꢀtheꢀSGNDꢀpinꢀofꢀtheꢀIC.
combinedꢀICꢀsignalꢀgroundꢀpinꢀandꢀtheꢀgroundꢀreturnꢀ PC Board Layout Debugging
ofꢀC
ꢀmustꢀreturnꢀtoꢀtheꢀcombinedꢀC ꢀ(–)ꢀter-
INTVCC
OUT
Startꢀwithꢀoneꢀcontrollerꢀonꢀatꢀaꢀtime.ꢀItꢀisꢀhelpfulꢀtoꢀuseꢀ
aꢀDC-50MHzꢀcurrentꢀprobeꢀtoꢀmonitorꢀtheꢀcurrentꢀinꢀtheꢀ
inductorꢀ whileꢀ testingꢀ theꢀ circuit.ꢀ Monitorꢀ theꢀ outputꢀ
switchingꢀnodeꢀ(SWꢀpin)ꢀtoꢀsynchronizeꢀtheꢀoscilloscopeꢀ
toꢀtheꢀinternalꢀoscillatorꢀandꢀprobeꢀtheꢀactualꢀoutputꢀvoltageꢀ
asꢀwell.ꢀCheckꢀforꢀproperꢀperformanceꢀoverꢀtheꢀoperatingꢀ
voltageꢀandꢀcurrentꢀrangeꢀexpectedꢀinꢀtheꢀapplication.ꢀTheꢀ
frequencyꢀofꢀoperationꢀshouldꢀbeꢀmaintainedꢀoverꢀtheꢀinputꢀ
minals.ꢀTheꢀpathꢀformedꢀbyꢀtheꢀtopꢀN-channelꢀMOSFET,ꢀ
SchottkyꢀdiodeꢀandꢀtheꢀC ꢀcapacitorꢀshouldꢀhaveꢀshortꢀ
IN
leadsꢀandꢀPCꢀtraceꢀlengths.ꢀTheꢀoutputꢀcapacitorꢀ(–)ꢀ
terminalsꢀshouldꢀbeꢀconnectedꢀasꢀcloseꢀasꢀpossibleꢀ
toꢀtheꢀ(–)ꢀterminalsꢀofꢀtheꢀinputꢀcapacitorꢀbyꢀplacingꢀ
theꢀcapacitorsꢀnextꢀtoꢀeachꢀotherꢀandꢀawayꢀfromꢀtheꢀ
Schottkyꢀloopꢀdescribedꢀabove.
3.ꢀDoꢀtheꢀLTC3868-1ꢀV ꢀpins’ꢀresistiveꢀdividersꢀconnectꢀ voltageꢀrangeꢀdownꢀtoꢀdropoutꢀandꢀuntilꢀtheꢀoutputꢀloadꢀ
FB
toꢀ theꢀ (+)ꢀ terminalsꢀ ofꢀ C ?ꢀ Theꢀ resistiveꢀ dividerꢀ dropsꢀbelowꢀtheꢀlowꢀcurrentꢀoperationꢀthreshold—typi-
OUT
mustꢀbeꢀconnectedꢀbetweenꢀtheꢀ(+)ꢀterminalꢀofꢀC
ꢀ
callyꢀ10%ꢀofꢀtheꢀmaximumꢀdesignedꢀcurrentꢀlevelꢀinꢀBurstꢀ
OUT
andꢀsignalꢀground.ꢀTheꢀfeedbackꢀresistorꢀconnectionsꢀ Modeꢀoperation.
shouldꢀnotꢀbeꢀalongꢀtheꢀhighꢀcurrentꢀinputꢀfeedsꢀfromꢀ
Theꢀdutyꢀcycleꢀpercentageꢀshouldꢀbeꢀmaintainedꢀfromꢀcycleꢀ
theꢀinputꢀcapacitor(s).
toꢀcycleꢀinꢀaꢀwell-designed,ꢀlowꢀnoiseꢀPCBꢀimplementation.ꢀ
–
+
4.ꢀAreꢀtheꢀSENSE ꢀandꢀSENSE ꢀleadsꢀroutedꢀtogetherꢀwithꢀ Variationꢀinꢀtheꢀdutyꢀcycleꢀatꢀaꢀsubharmonicꢀrateꢀcanꢀsug-
minimumꢀPCꢀtraceꢀspacing?ꢀTheꢀfilterꢀcapacitorꢀbetweenꢀ gestꢀnoiseꢀpickupꢀatꢀtheꢀcurrentꢀorꢀvoltageꢀsensingꢀinputsꢀ
v
+
–
SENSE ꢀandꢀSENSE ꢀshouldꢀbeꢀasꢀcloseꢀasꢀpossibleꢀ orꢀinadequateꢀloopꢀcompensation.ꢀOvercompensationꢀofꢀ
toꢀtheꢀIC.ꢀEnsureꢀaccurateꢀcurrentꢀsensingꢀwithꢀKelvinꢀ theꢀloopꢀcanꢀbeꢀusedꢀtoꢀtameꢀaꢀpoorꢀPCꢀlayoutꢀifꢀregula-
connectionsꢀatꢀtheꢀSENSEꢀresistor.
torꢀ bandwidthꢀ optimizationꢀ isꢀ notꢀ required.ꢀ Onlyꢀ afterꢀ
eachꢀcontrollerꢀisꢀcheckedꢀforꢀitsꢀindividualꢀperformanceꢀ
shouldꢀbothꢀcontrollersꢀbeꢀturnedꢀonꢀatꢀtheꢀsameꢀtime.ꢀ
Aꢀparticularlyꢀdifficultꢀregionꢀofꢀoperationꢀisꢀwhenꢀoneꢀ
controllerꢀchannelꢀisꢀnearingꢀitsꢀcurrentꢀcomparatorꢀtripꢀ
pointꢀwhenꢀtheꢀotherꢀchannelꢀisꢀturningꢀonꢀitsꢀtopꢀMOSFET.ꢀ
Thisꢀoccursꢀaroundꢀ50%ꢀdutyꢀcycleꢀonꢀeitherꢀchannelꢀdueꢀ
toꢀtheꢀphasingꢀofꢀtheꢀinternalꢀclocksꢀandꢀmayꢀcauseꢀminorꢀ
dutyꢀcycleꢀjitter.
5.ꢀIsꢀtheꢀINTV ꢀdecouplingꢀcapacitorꢀconnectedꢀcloseꢀ
CC
toꢀtheꢀIC,ꢀbetweenꢀtheꢀINTV ꢀandꢀtheꢀpowerꢀgroundꢀ
CC
pins?ꢀThisꢀcapacitorꢀcarriesꢀtheꢀMOSFETꢀdrivers’ꢀcur-
rentꢀpeaks.ꢀAnꢀadditionalꢀ1µFꢀceramicꢀcapacitorꢀplacedꢀ
immediatelyꢀnextꢀtoꢀtheꢀINTV ꢀandꢀPGNDꢀpinsꢀcanꢀhelpꢀ
CC
improveꢀnoiseꢀperformanceꢀsubstantially.
38681fb
ꢁꢆ
LTC3868-1
applicaTions inForMaTion
forꢀinductiveꢀcouplingꢀbetweenꢀC ,ꢀSchottkyꢀandꢀtheꢀtopꢀ
Reduceꢀ V ꢀ fromꢀ itsꢀ nominalꢀ levelꢀ toꢀ verifyꢀ operationꢀ
IN
IN
MOSFETꢀcomponentsꢀtoꢀtheꢀsensitiveꢀcurrentꢀandꢀvoltageꢀ
sensingꢀtraces.ꢀInꢀaddition,ꢀinvestigateꢀcommonꢀgroundꢀ
pathꢀvoltageꢀpickupꢀbetweenꢀtheseꢀcomponentsꢀandꢀtheꢀ
SGNDꢀpinꢀofꢀtheꢀIC.
ofꢀtheꢀregulatorꢀinꢀdropout.ꢀCheckꢀtheꢀoperationꢀofꢀtheꢀ
undervoltageꢀlockoutꢀcircuitꢀbyꢀfurtherꢀloweringꢀV ꢀwhileꢀ
IN
monitoringꢀtheꢀoutputsꢀtoꢀverifyꢀoperation.
Investigateꢀwhetherꢀanyꢀproblemsꢀexistꢀonlyꢀatꢀhigherꢀout-
putꢀcurrentsꢀorꢀonlyꢀatꢀhigherꢀinputꢀvoltages.ꢀIfꢀproblemsꢀ
coincideꢀwithꢀhighꢀinputꢀvoltavgesꢀandꢀlowꢀoutputꢀcurrents,ꢀ
lookꢀforꢀcapacitiveꢀcouplingꢀbetweenꢀtheꢀBOOST,ꢀSW,ꢀTG,ꢀ
andꢀpossiblyꢀBGꢀconnectionsꢀandꢀtheꢀsensitiveꢀvoltageꢀ
andꢀcurrentꢀpins.ꢀTheꢀcapacitorꢀplacedꢀacrossꢀtheꢀcurrentꢀ
sensingꢀpinsꢀneedsꢀtoꢀbeꢀplacedꢀimmediatelyꢀadjacentꢀtoꢀ
theꢀpinsꢀofꢀtheꢀIC.ꢀThisꢀcapacitorꢀhelpsꢀtoꢀminimizeꢀtheꢀ
effectsꢀofꢀdifferentialꢀnoiseꢀinjectionꢀdueꢀtoꢀhighꢀfrequencyꢀ
capacitiveꢀ coupling.ꢀ Ifꢀ problemsꢀ areꢀ encounteredꢀ withꢀ
highꢀcurrentꢀoutputꢀloadingꢀatꢀlowerꢀinputꢀvoltages,ꢀlookꢀ
Anꢀembarrassingꢀproblem,ꢀwhichꢀcanꢀbeꢀmissedꢀinꢀanꢀ
otherwiseꢀproperlyꢀworkingꢀswitchingꢀregulator,ꢀresultsꢀ
whenꢀtheꢀcurrentꢀsensingꢀleadsꢀareꢀhookedꢀupꢀbackwards.ꢀ
Theꢀoutputꢀvoltageꢀunderꢀthisꢀimproperꢀhookupꢀwillꢀstillꢀ
beꢀmaintainedꢀbutꢀtheꢀadvantagesꢀofꢀcurrentꢀmodeꢀcontrolꢀ
willꢀnotꢀbeꢀrealized.ꢀCompensationꢀofꢀtheꢀvoltageꢀloopꢀwillꢀ
beꢀ muchꢀ moreꢀ sensitiveꢀ toꢀ componentꢀ selection.ꢀ Thisꢀ
behaviorꢀcanꢀbeꢀinvestigatedꢀbyꢀtemporarilyꢀshortingꢀoutꢀ
theꢀcurrentꢀsensingꢀresistor—don’tꢀworry,ꢀtheꢀregulatorꢀ
willꢀstillꢀmaintainꢀcontrolꢀofꢀtheꢀoutputꢀvoltage.
SS1
LTC3868-1
I
R
TH1
PU1
V
PULL-UP
(<6V)
V
PGOOD1
TG1
PGOOD1
FB1
L1
R
SENSE
+
–
V
OUT1
SENSE1
SENSE1
FREQ
SW1
C
B1
M1
M2
D1
BOOST1
BG1
C
C
OUT1
V
f
IN
1µF
IN
PLLIN/MODE
RUN1
R
C
IN
VIN
CERAMIC
PGND
GND
RUN2
EXTV
CC
V
OUT1
C
IN
C
SGND
INTVCC
V
IN
–
INTV
CC
SENSE2
OUT2
D2
1µF
CERAMIC
+
BG2
SENSE2
M4
M3
BOOST2
V
FB2
TH2
C
B2
SW2
TG2
I
R
SENSE
V
OUT2
SS2
L2
38681 F10
Figure 10. Recommended Printed Circuit Layout Diagram
38681fb
ꢁꢇ
LTC3868-1
applicaTions inForMaTion
SW1
L1
R
SENSE1
V
OUT1
D1
C
R
L1
OUT1
V
IN
R
IN
C
IN
SW2
L2
R
SENSE2
V
OUT2
D2
C
R
L2
OUT2
BOLD LINES INDICATE
HIGH SWITCHING
CURRENT. KEEP LINES
TO A MINIMUM LENGTH.
38681 F11
Figure 11. Branch Current Waveforms
38681fb
ꢁꢈ
LTC3868-1
Typical applicaTions
R
B1
215k
LTC3868-1
+
C
SENSE1
F1
INTV
CC
C1
1nF
15pF
100k
–
R
A1
68.1k
SENSE1
PGOOD1
BG1
L1
MBOT1
MTOP1
V
FB1
3.3µH
V
3.3V
5A
OUT1
C
150pF
ITH1A
SW1
R
C
C
SENSE1
7mΩ
OUT1
B1
0.47µF
BOOST1
TG1
150µF
R
15k
SS1
ITH1
I
TH1
D1
D2
C
820pF
ITH1
C
0.1µF
V
IN
V
IN
9V TO 24V
C
IN
22µF
SS1
INTV
CC
C
INT
4.7µF
PGND
PLLIN/MODE
SGND
MTOP2
MBOT2
EXTV
TG2
CC
RUN1
RUN2
FREQ
C
B2
0.47µF
BOOST2
L2
7.2µH
R
SENSE2
10mΩ
C
0.1µF
SS2
V
8.5V
3A
OUT2
SW2
BG2
SS2
C
C
680pF
OUT2
ITH2
R
27k
150µF
ITH2
I
TH2
C
100pF
C2
ITH2A
V
FB2
R
A2
44.2k
–
+
SENSE2
C
1nF
F2
39pF
SENSE2
R
B2
442k
38681 F12
C
, C : SANYO 10TPD150M
OUT1 OUT2
L1: SUMIDA CDEP105-3R2M
L2: SUMIDA CDEP105-7R2M
MTOP1, MTOP2, MBOT1, MBOT2: VISHAY Si7848DP
Start-Up
SW Node Waveforms
Efficiency vs Output Current
100
90
V
80
OUT2
V
= 8.5V
V
= 3.3V
OUT
2V/DIV
OUT
70
SW1
5V/DIV
60
50
V
OUT1
2V/DIV
40
30
20
10
0
SW2
5V/DIV
V
= 12V
IN
Burst Mode OPERATION
0.1 10
OUTPUT CURRENT (A)
38681 F12c
38681 F12d
20ms/DIV
1µs/DIV
0.000010.0001 0.001 0.01
1
38681 F12b
Figure 12. High Efficiency Dual 8.5V/3.3V Step-Down Converter
38681fb
ꢂ0
LTC3868-1
Typical applicaTions
High Efficiency Dual 2.5V/3.3V Step-Down Converter
R
B1
143k
LTC3868-1
+
C
SENSE1
INTV
CC
F1
C1
1nF
22pF
100k
–
R
A1
68.1k
SENSE1
PGOOD1
BG1
L1
2.4µH
MBOT1
MTOP1
V
FB1
V
2.5V
5A
OUT1
C
100pF
ITH1A
SW1
R
C
C
SENSE1
7mΩ
OUT1
B1
0.47µF
BOOST1
TG1
150µF
R
ITH1
22k
I
TH1
D1
D2
C
820pF
ITH1
C
SS1
0.01µF
V
IN
V
IN
4V TO 24V
C
IN
22µF
SS1
INTV
CC
C
INT
4.7µF
PGND
PLLIN/MODE
SGND
MTOP2
MBOT2
EXTV
TG2
CC
RUN1
RUN2
FREQ
C
B2
0.47µF
BOOST2
L2
3.2µH
R
SENSE2
7mΩ
C
SS2
0.01µF
V
3.3V
5A
OUT2
SW2
BG2
SS2
C
C
820pF
OUT2
ITH2
R
15k
150µF
ITH2
I
TH2
C
150pF
C2
ITH2A
V
FB2
R
A2
68.1k
–
+
SENSE2
C
1nF
F2
15pF
SENSE2
R
B2
215k
38681 F13
C
, C : SANYO 10TPD150M
OUT1 OUT2
L1: SUMIDA CDEP105-2R5
L2: SUMIDA CDEP105-3R2M
MTOP1, MTOP2, MBOT1, MBOT2: VISHAY Si7848DP
38681fb
ꢂꢀ
LTC3868-1
Typical applicaTions
High Efficiency Dual 12V/5V Step-Down Converter
R
B1
422k
+
C
SENSE1
SENSE1
INTV
F1
CC
C1
1nF
33pF
100k
–
R
A1
PGOOD1
BG1
34k
L1
8.8µH
MBOT1
MTOP1
V
FB1
V
12V
3A
OUT1
C
100pF
ITH1A
SW1
R
C
C
SENSE1
OUT1
B1
BOOST1
TG1
10mΩ
47µF
0.47µF
R
ITH1
33k
I
TH1
D1
D2
C
SS1
0.01µF
LTC3868-1
C
680pF
ITH1
V
IN
V
SS1
IN
12.5V TO 24V
C
IN
INTV
CC
C
22µF
INT
4.7µF
PGND
PLLIN/MODE
SGND
MTOP2
MBOT2
EXTV
TG2
CC
RUN1
RUN2
FREQ
R
C
FREQ
B2
BOOST2
60k
0.47µF
L2
4.3µH
R
SENSE2
7mΩ
C
0.01µF
SS2
V
OUT2
5V
SW2
BG2
SS2
5.5A
C
C
680pF
OUT2
ITH2
R
17k
150µF
ITH2
I
TH2
C
100pF
C2
ITH2A
V
FB2
C
: KEMET T525D476M016E035
: SANYO 10TPD150M
R
OUT1
OUT2
A2
–
+
SENSE2
C
75k
L1: SUMIDA CDEP105-8R8M
L2: SUMIDA CDEP105-4R3M
MTOP1, MTOP2, MBOT1, MBOT2: VISHAY Si7848DP
C
1nF
F2
15pF
SENSE2
R
B2
393k
38681 TA02a
38681fb
ꢂꢁ
LTC3868-1
Typical applicaTions
High Efficiency Dual 1V/1.2V Step-Down Converter
R
B1
28.7k
+
C
SENSE1
F1
INTV
CC
C1
1nF
56pF
100k
–
R
A1
SENSE1
PGOOD1
BG1
115k
L1
0.47µH
MBOT1
MTOP1
V
FB1
V
OUT1
C
220pF
ITH1A
1V
SW1
C
R
OUT1 8A
C
SENSE1
4mΩ
B1
BOOST1
TG1
220µF
0.47µF
R
ITH1
3.93k
×2
I
TH1
D1
D2
LTC3868-1
C
1000pF
ITH1
C
SS1
0.01µF
V
IN
V
IN
12V
C
IN
SS1
22µF
INTV
CC
C
INT
4.7µF
PGND
PLLIN/MODE
SGND
MTOP2
MBOT2
EXTV
TG2
CC
RUN1
RUN2
FREQ
R
C
FREQ
B2
BOOST2
60k
0.47µF
L2
0.47µH
R
SENSE2
4mΩ
C
0.01µF
SS2
V
OUT2
1.2V
SW2
BG2
SS2
C
OUT2 8A
C
1000pF
ITH2
220µF
R
3.43k
ITH2
×2
I
TH2
C
220pF
C2
ITH2A
V
FB2
R
C
, C
: SANYO 2RSTPE220M
A2
OUT1 OUT2
–
+
SENSE2
115k
L1: SUMIDA CDEP105-3R2M
L2: SUMIDA CDEP105-7R2M
MTOP1, MTOP2: RENESAS RJK0305
MBOT1, MBOT2: RENESAS RJK0328
C
1nF
F2
56pF
SENSE2
R
B2
38681 TA03a
57.6k
38681fb
ꢂꢂ
LTC3868-1
Typical applicaTions
High Efficiency Dual 1V/1.2V Step-Down Converter with Inductor DCR Current Sensing
R
R
S1
1.18k
B1
28.7k
+
C
SENSE1
SENSE1
F1
INTV
CC
C1
0.1µF
56pF
100k
–
R
A1
PGOOD1
115k
L1
0.47µH
MBOT1
MTOP1
V
BG1
SW1
FB1
V
OUT1
C
200pF
ITH1A
1V
C
OUT1 8A
C
B1
BOOST1
TG1
220µF
0.47µF
R
ITH1
3.93k
×2
I
TH1
D1
D2
LTC3868-1
C
1000pF
ITH1
C
SS1
0.01µF
V
IN
V
IN
12V
C
IN
SS1
22µF
INTV
CC
C
INT
4.7µF
PGND
PLLIN/MODE
SGND
MTOP2
MBOT2
EXTV
TG2
CC
RUN1
RUN2
FREQ
R
C
FREQ
B2
BOOST2
65k
0.47µF
L2
0.47µH
C
0.01µF
SS2
V
OUT2
1.2V
SW2
BG2
SS2
C
OUT2 8A
C
1000pF
ITH2
220µF
R
3.93k
ITH2
×2
I
TH2
C
220pF
C2
ITH2A
V
FB2
R
A2
–
+
SENSE2
115k
C
, C
: SANYO 2R5TPE220M
OUT1 OUT2
L1, L2: SUMIDA IHL P2525CZERR47M06
MTOP1, MTOP2: RENESAS RJK0305
MBOT1, MBOT2: RENESAS RJK0328
C
0.1µF
F2
56pF
SENSE2
R
S2
1.18k
R
B2
57.6k
38681 TA05
38681fb
ꢂꢃ
LTC3868-1
package DescripTion
UFD Package
28-Lead Plastic QFN (4mm × 5mm)
(Reference LTC DWG # 05-08-1712 Rev B)
0.70 p0.05
4.50 p 0.05
3.10 p 0.05
2.50 REF
2.65 p 0.05
3.65 p 0.05
PACKAGE
OUTLINE
0.25 p0.05
0.50 BSC
3.50 REF
4.10 p 0.05
5.50 p 0.05
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED
PIN 1 NOTCH
R = 0.20 OR 0.35
s 45o CHAMFER
2.50 REF
R = 0.115
TYP
R = 0.05
TYP
0.75 p 0.05
4.00 p 0.10
(2 SIDES)
27
28
0.40 p 0.10
PIN 1
TOP MARK
(NOTE 6)
1
2
5.00 p 0.10
(2 SIDES)
3.50 REF
3.65 p 0.10
2.65 p 0.10
(UFD28) QFN 0506 REV B
0.25 p 0.05
0.50 BSC
0.200 REF
0.00 – 0.05
BOTTOM VIEW—EXPOSED PAD
NOTE:
1. DRAWING PROPOSED TO BE MADE A JEDEC PACKAGE OUTLINE MO-220 VARIATION (WXXX-X).
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION
ON THE TOP AND BOTTOM OF PACKAGE
38681fb
ꢂꢄ
LTC3868-1
package DescripTion
GN Package
28-Lead Plastic SSOP (Narrow .150 Inch)
(Reference LTC DWG # 05-08-1641)
.386 – .393*
(9.804 – 9.982)
.045 p.005
.033
(0.838)
REF
28 27 26 25 24 23 22 21 20 19 18 17 1615
.254 MIN
.150 – .165
.229 – .244
.150 – .157**
(5.817 – 6.198)
(3.810 – 3.988)
.0165 p.0015
.0250 BSC
1
2
3
4
5
6
7
8
9 10 11 12 13 14
RECOMMENDED SOLDER PAD LAYOUT
.015 p .004
(0.38 p 0.10)
.0532 – .0688
(1.35 – 1.75)
s 45o
.004 – .0098
(0.102 – 0.249)
.0075 – .0098
(0.19 – 0.25)
0o – 8o TYP
.016 – .050
(0.406 – 1.270)
.008 – .012
.0250
(0.635)
BSC
GN28 (SSOP) 0204
(0.203 – 0.305)
TYP
NOTE:
1. CONTROLLING DIMENSION: INCHES
INCHES
2. DIMENSIONS ARE IN
(MILLIMETERS)
3. DRAWING NOT TO SCALE
*DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
**DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
38681fb
ꢂꢅ
LTC3868-1
revision hisTory (Revision history begins at Rev B)
REV
DATE DESCRIPTION
PAGE NUMBER
B
12/09 ChangeꢀtoꢀAbsoluteꢀMaximumꢀRatings
ChangeꢀtoꢀElectricalꢀCharacteristics
ChangeꢀtoꢀTypicalꢀPerformanceꢀCharacteristics
ChangeꢀtoꢀPinꢀFunctions
2
3,ꢀ4
6
8,ꢀ9
TextꢀChangesꢀtoꢀOperationꢀSection
TextꢀChangesꢀtoꢀApplicationsꢀInformationꢀSection
ChangeꢀtoꢀFigureꢀ10
11,ꢀ12,ꢀ13
21,ꢀ22,ꢀ23,ꢀ24,ꢀ26
28
38
ChangesꢀtoꢀRelatedꢀParts
38681fb
InformationꢀfurnishedꢀbyꢀLinearꢀTechnologyꢀCorporationꢀisꢀbelievedꢀtoꢀbeꢀaccurateꢀandꢀreliable.ꢀ
However,ꢀnoꢀresponsibilityꢀisꢀassumedꢀforꢀitsꢀuse.ꢀLinearꢀTechnologyꢀCorporationꢀmakesꢀnoꢀrepresenta-
tionꢀthatꢀtheꢀinterconnectionꢀofꢀitsꢀcircuitsꢀasꢀdescribedꢀhereinꢀwillꢀnotꢀinfringeꢀonꢀexistingꢀpatentꢀrights.
ꢂꢆ
LTC3868-1
relaTeD parTs
PART NUMBER
DESCRIPTION
COMMENTS
LTC3857/LTC3857-1 LowꢀI ,ꢀDualꢀOutputꢀ2-PhaseꢀSynchronousꢀStep-Downꢀ
Phase-LockableꢀFixedꢀOperatingꢀFrequencyꢀ50kHzꢀtoꢀ900kHz,ꢀ
4Vꢀ≤ꢀV ꢀ≤ꢀ38V,ꢀꢀ0.8Vꢀ≤ꢀV ꢀ≤ꢀ24V,ꢀI ꢀ=ꢀ50µA,
IN OUT Q
Q
DC/DCꢀControllersꢀwithꢀ99%ꢀDutyꢀCycle
LTC3858/LTC3858-1 LowꢀI ,ꢀDualꢀOutputꢀ2-PhaseꢀSynchronousꢀStep-Downꢀ
Phase-LockableꢀFixedꢀOperatingꢀFrequencyꢀ50kHzꢀtoꢀ900kHz,ꢀ
4Vꢀ≤ꢀV ꢀ≤ꢀ24V,ꢀꢀ0.8Vꢀ≤ꢀV ꢀ≤ꢀ14V,ꢀI ꢀ=ꢀ170µA,
Q
DC/DCꢀControllersꢀwithꢀ99%ꢀDutyꢀCycle
IN
OUT
Q
LTC3834/LTC3834-1 LowꢀI ,ꢀSynchronousꢀStep-DownꢀDC/DCꢀControllers
Phase-LockableꢀFixedꢀOperatingꢀFrequencyꢀ140kHzꢀtoꢀ650kHz,ꢀ
4Vꢀ≤ꢀV ꢀ≤ꢀ36V,ꢀꢀ0.8Vꢀ≤ꢀV ꢀ≤ꢀ10V,ꢀI ꢀ=ꢀ30µA,
Q
IN
OUT
Q
LTC3835/LTC3835-1 LowꢀI ,ꢀSynchronousꢀStep-DownꢀDC/DCꢀControllers
Phase-LockableꢀFixedꢀOperatingꢀFrequencyꢀ140kHzꢀtoꢀ650kHz,ꢀ
4Vꢀ≤ꢀV ꢀ≤ꢀ36V,ꢀꢀ0.8Vꢀ≤ꢀV ꢀ≤ꢀ10V,ꢀI ꢀ=ꢀ80µA,
Q
IN
OUT
Q
LT3845
LowꢀI ,ꢀHighꢀVoltageꢀSynchronousꢀStep-Downꢀꢀ
AdjustableꢀFixedꢀOperatingꢀFrequencyꢀ100kHzꢀtoꢀ500kHz,ꢀ
4Vꢀ≤ꢀV ꢀ≤ꢀ60V,ꢀ1.23Vꢀ≤ꢀV ꢀ≤ꢀ36V,ꢀI ꢀ=ꢀ120µA,ꢀTSSOP-16
Q
DC/DCꢀController
IN
OUT
Q
LT3800
LowꢀI ,ꢀHighꢀVoltageꢀSynchronousꢀStep-Downꢀꢀ
Fixedꢀ200kHzꢀOperatingꢀFrequency,ꢀ4Vꢀ≤ꢀV ꢀ≤ꢀ60V,ꢀꢀ
IN
1.23Vꢀ≤ꢀV ꢀ≤ꢀ36V,ꢀI ꢀ=ꢀ100µA,ꢀTSSOP-16
OUT Q
Q
DC/DCꢀController
LTC3824
LowꢀI ,ꢀHighꢀVoltageꢀDC/DCꢀController,ꢀ100%ꢀDutyꢀCycle SelectableꢀFixedꢀ200kHzꢀtoꢀ600kHzꢀOperatingꢀFrequency,ꢀ
Q
4Vꢀ≤ꢀV ꢀ≤ꢀ60V,ꢀ0.8Vꢀ≤ꢀV ꢀ≤ꢀV ,ꢀI ꢀ=ꢀ40µA,ꢀMSOP-10E
IN
OUT
IN Q
LTC3850/LTC3850-1ꢀ Dualꢀ2-Phase,ꢀHighꢀEfficiencyꢀSynchronousꢀStep-Downꢀ
Phase-LockableꢀFixedꢀOperatingꢀFrequencyꢀ250kHzꢀtoꢀ780kHz,ꢀ
LTC3850-2
DC/DCꢀControllers,ꢀR
Tracking
ꢀorꢀDCRꢀCurrentꢀSensingꢀandꢀ 4Vꢀ≤ꢀV ꢀ≤ꢀ30V,ꢀ0.8Vꢀ≤ꢀV ꢀ≤ꢀ5.25V
SENSE IN OUT
LTC3855
Dual,ꢀMultiphase,ꢀSynchronousꢀDC/DCꢀStep-Downꢀ
ControllerꢀwithꢀDiffampꢀandꢀDCRꢀTemperatureꢀ
Compensation
Phase-LockableꢀFixedꢀFrequencyꢀ250kHzꢀtoꢀ770kHz,ꢀꢀ
4.5Vꢀ≤ꢀV ꢀ≤ꢀ38V,ꢀ0.8Vꢀ≤ꢀV ꢀ≤ꢀ12.5V
IN
OUT
LTC3853
LTC3854
LTC3775
TripleꢀOutput,ꢀMultiphaseꢀSynchronousꢀStep-DownꢀDC/DCꢀ Phase-LockableꢀFixedꢀOperatingꢀFrequencyꢀ250kHzꢀtoꢀ750kHz,ꢀ
Controller,ꢀR ꢀorꢀDCRꢀCurrentꢀSensingꢀandꢀTracking 4Vꢀ≤ꢀV ꢀ≤ꢀ24V,ꢀV ꢀUpꢀtoꢀ13.5V
SENSE
IN
OUT
SmallꢀFootprintꢀWideꢀV ꢀRangeꢀSynchronousꢀStep-Downꢀ Fixedꢀ400kHzꢀOperatingꢀFrequency,ꢀ4.5Vꢀ≤ꢀV ꢀ≤ꢀ38V,ꢀꢀ
IN
IN
DC/DCꢀController
0.8Vꢀ≤ꢀV ꢀ≤ꢀ5.25V,ꢀ2mmꢀ×ꢀ3mmꢀQFN-12,ꢀMSOP-12
OUT
HighꢀFrequencyꢀSynchronousꢀVoltageꢀModeꢀStep-Downꢀ FastꢀTransientꢀResponse,ꢀt
ꢀ=ꢀ30ns,ꢀ4Vꢀ≤ꢀV ꢀ≤ꢀ38V,ꢀ
ON(MIN)
IN
DC/DCꢀController
NoꢀR ™ꢀWideꢀV ꢀRangeꢀSynchronousꢀStep-Downꢀ
0.6Vꢀ≤ꢀV ꢀ≤ꢀ0.8V ,ꢀMSOP-16E,ꢀ3mmꢀ×ꢀ3mmꢀQFN-16
OUT IN
LTC3851A/ꢀ
LTC3851A-1
Phase-LockableꢀFixedꢀOperatingꢀFrequencyꢀ250kHzꢀtoꢀ750kHz,ꢀ
4Vꢀ≤ꢀV ꢀ≤ꢀ38V,ꢀ0.8Vꢀ≤ꢀV ꢀ≤ꢀ5.25V,ꢀMSOP-16E,ꢀ3mmꢀ×ꢀ3mmꢀ
SENSE
IN
DC/DCꢀControllers
IN
OUT
QFN-16,ꢀSSOP-16
LTC3878/LTC3879
NoꢀR ꢀConstantꢀOn-TimeꢀSynchronousꢀStep-Downꢀ
VeryꢀFastꢀTransientꢀResponse,ꢀt
ꢀ=ꢀ43ns,ꢀ4Vꢀ≤ꢀV ꢀ≤ꢀ38V,ꢀ
ON(MIN) IN
SENSE
DC/DCꢀControllers
V
ꢀUpꢀ90%ꢀofꢀV ,ꢀMSOP-16E,ꢀ3mmꢀ×ꢀ3mmꢀQFN-16,ꢀSSOP-16
OUT IN
38681fb
LT 0110 REV B • PRINTED IN USA
Linear Technology Corporation
1630ꢀ McCarthyꢀ Blvd.,ꢀ Milpitas,ꢀ CAꢀ 95035-7417
ꢀ
ꢂꢇ
●
●ꢀ
LINEAR TECHNOLOGY CORPORATION 2009
(408)ꢀ432-1900ꢀ ꢀFAX:ꢀ(408)ꢀ434-0507ꢀ www.linear.com
相关型号:
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