LTC4150IMS#TRPBF [Linear]
LTC4150 - Coulomb Counter/Battery Gas Gauge; Package: MSOP; Pins: 10; Temperature Range: -40°C to 85°C;
| 型号： | LTC4150IMS#TRPBF |
| 厂家： | 
Linear |
| 描述： | LTC4150 - Coulomb Counter/Battery Gas Gauge; Package: MSOP; Pins: 10; Temperature Range: -40°C to 85°C 放大器 |
| 文件： | 总24页 (文件大小：857K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LT1999-10/LT1999-20/
LT1999-50
High Voltage, Bidirectional
Current Sense Amplifier
FeaTures
DescripTion
The LT®1999 is a high speed precision current sense
amplifier, designed to monitor bidirectional currents over
a wide common mode range. The LT1999 is offered in
three gain options: 10V/V, 20V/V, and 50V/V.
n
Buffered Output with 3 Gain Options:
10V/V, 20V/V, 50V/V
n
Gain Accuracy: 0.5% Max
n
Input Common Mode Voltage Range: –5V to 80V
n
AC CMRR > 80dB at 100kHz
The LT1999 senses current via an external resistive shunt
andgeneratesanoutputvoltage,indicatingbothmagnitude
and direction of the sensed current. The output voltage is
referencedhalfwaybetweenthesupplyvoltageandground,
or an external voltage can be used to set the reference
level. With a 2MHz bandwidth and a common mode input
range of –5V to 80V, the LT1999 is suitable for monitoring
currents in H-Bridge motor controls, switching power
supplies, solenoid currents, and battery charge currents
from full charge to depletion.
n
Input Offset Voltage: 1.5mV Max
n
–3dB Bandwidth: 2MHz
n
Smooth, Continuous Operation Over Entire Common
Mode Range
n
4kV HBM Tolerant and 1kV CDM Tolerant
n
Low Power Shutdown <10µA
n
–55°C to 150°C Operating Temperature Range
n
8-Lead MSOP and 8-Lead SO (Narrow) Packages
applicaTions
The LT1999 operates from an independent 5V supply and
draws1.55mA.Ashutdownmodeisprovidedforminimiz-
ing power consumption.
n
n
n
n
n
n
High Side or Low Side Current Sensing
H-Bridge Motor Control
Solenoid Current Sense
The LT1999 is available in an 8-lead MSOP or SOP package.
High Voltage Data Acquisition
PWM Control Loops
Fuse/MOSFET Monitoring
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear
Technology Corporation. All other trademarks are the property of their respective owners.
Typical applicaTion
Full Bridge Armature Current Monitor
+
V
LT1999
V
S
5V
+
2µA
V
1
2
8
7
SHDN
V
SHDN
2.5V
R
+
–
G
4k
V
V
+IN
–IN
–
+
R
+
S
V
V
OUT
REF
V
0.8k
0.8k
+
V
+IN
V
160k
160k
4k
+
3
4
6
5
5V
V
0.1µF
1999 TA01b
TIME (10µs/DIV)
0.1µF
1999 TA01a
1999fb
1
LT1999-10/LT1999-20/
LT1999-50
absoluTe MaxiMuM raTings
Differential Input Voltage
(Note 1)
Specified Temperature Range (Note 6)
+IN to –IN (Notes 1, 3)................................. 60V, 10ms
+IN to GND, –IN to GND (Note 2)............. –5.25V to 88V
LT1999C .................................................. 0°C to 70°C
LT1999I................................................–40°C to 85°C
LT1999H ............................................ –40°C to 125°C
LT1999MP ......................................... –55°C to 150°C
Junction Temperature ........................................... 150°C
Storage Temperature Range .................. –65°C to 150°C
+
Total Supply Voltage (V to GND)................................6V
+
Input Voltage Pins 6 and 8 ...................V + 0.3V, –0.3V
Output Short-Circuit Duration (Note 4) ............ Indefinite
Operating Ambient Temperature (Note 5)
LT1999C ..............................................–40°C to 85°C
LT1999I................................................–40°C to 85°C
LT1999H ............................................ –40°C to 125°C
LT1999MP ......................................... –55°C to 150°C
pin conFiguraTion
TOP VIEW
+
TOP VIEW
+
V
1
2
3
4
8
7
6
5
SHDN
OUT
REF
V
1
8 SHDN
7 OUT
6 REF
+IN
–IN
+IN 2
–IN
3
4
+
V
5 GND
+
V
GND
MS8 PACKAGE
8-LEAD PLASTIC MSOP
S8 PACKAGE
8-LEAD PLASTIC SO
T
= 150°C, Θ = 300°C/W
JA
JMAX
T
JMAX
= 150°C, Θ = 190°C/W
JA
orDer inForMaTion
LEAD FREE FINISH
TAPE AND REEL
PART MARKING*
LTFPB
PACKAGE DESCRIPTION
8-Lead Plastic MSOP
8-Lead Plastic MSOP
8-Lead Plastic MSOP
8-Lead Plastic MSOP
8-Lead Plastic SO
SPECIFIED TEMPERATURE RANGE
LT1999CMS8-10#PBF
LT1999IMS8-10#PBF
LT1999HMS8-10#PBF
LT1999MPMS8-10#PBF
LT1999CS8-10#PBF
LT1999IS8-10#PBF
LT1999CMS8-10#TRPBF
LT1999IMS8-10#TRPBF
LT1999HMS8-10#TRPBF
LT1999MPMS8-10#TRPBF
LT1999CS8-10#TRPBF
LT1999IS8-10#TRPBF
LT1999HS8-10#TRPBF
LT1999MPS8-10#TRPBF
LT1999CMS8-20#TRPBF
LT1999IMS8-20#TRPBF
LT1999HMS8-20#TRPBF
LT1999MPMS8-20#TRPBF
0°C to 70°C
LTFPB
–40°C to 85°C
–40°C to 125°C
–55°C to 150°C
0°C to 70°C
LTFPB
LTFQP
199910
199910
199910
99MP10
LTFNZ
8-Lead Plastic SO
–40°C to 85°C
–40°C to 125°C
–55°C to 150°C
0°C to 70°C
LT1999HS8-10#PBF
LT1999MPS8-10#PBF
LT1999CMS8-20#PBF
LT1999IMS8-20#PBF
LT1999HMS8-20#PBF
LT1999MPMS8-20#PBF
8-Lead Plastic SO
8-Lead Plastic SO
8-Lead Plastic MSOP
8-Lead Plastic MSOP
8-Lead Plastic MSOP
8-Lead Plastic MSOP
LTFNZ
–40°C to 85°C
–40°C to 125°C
–55°C to 150°C
LTFNZ
LTFQQ
1999fb
2
LT1999-10/LT1999-20/
LT1999-50
orDer inForMaTion
LEAD FREE FINISH
LT1999CS8-20#PBF
LT1999IS8-20#PBF
LT1999HS8-20#PBF
LT1999MPS8-20#PBF
LT1999CMS8-50#PBF
LT1999IMS8-50#PBF
LT1999HMS8-50#PBF
LT1999MPMS8-50#PBF
LT1999CS8-50#PBF
LT1999IS8-50#PBF
LT1999HS8-50#PBF
LT1999MPS8-50#PBF
TAPE AND REEL
PART MARKING*
199920
199920
199920
99MP20
LTFPC
PACKAGE DESCRIPTION
SPECIFIED TEMPERATURE RANGE
0°C to 70°C
LT1999CS8-20#TRPBF
LT1999IS8-20#TRPBF
LT1999HS8-20#TRPBF
LT1999MPS8-20#TRPBF
LT1999CMS8-50#TRPBF
LT1999IMS8-50#TRPBF
LT1999HMS8-50#TRPBF
LT1999MPMS8-50#TRPBF
LT1999CS8-50#TRPBF
LT1999IS8-50#TRPBF
LT1999HS8-50#TRPBF
LT1999MPS8-50#TRPBF
8-Lead Plastic SO
8-Lead Plastic SO
8-Lead Plastic SO
8-Lead Plastic SO
8-Lead Plastic MSOP
8-Lead Plastic MSOP
8-Lead Plastic MSOP
8-Lead Plastic MSOP
8-Lead Plastic SO
8-Lead Plastic SO
8-Lead Plastic SO
8-Lead Plastic SO
–40°C to 85°C
–40°C to 125°C
–55°C to 150°C
0°C to 70°C
LTFPC
–40°C to 85°C
LTFPC
–40°C to 125°C
–55°C to 150°C
0°C to 70°C
LTFQR
199950
199950
199950
99MP50
–40°C to 85°C
–40°C to 125°C
–55°C to 150°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
Consult LTC Marketing for information on non-standard lead based finish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
elecTrical characTerisTics The l denotes the specifications which apply over the full operating
temperature range, 0°C < TA < 70°C for C-grade parts, –40°C < TA < 85°C for I-grade parts, and –40°C < TA < 125°C for H-grade parts,
otherwise specifications are at TA = 25°C. V+ = 5V, GND = 0V, VCM = 12V, VREF = floating, VSHDN = floating, unless otherwise specified.
See Figure 2.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
l
l
l
V
SENSE
Full-Scale Input Sense Voltage (Note 7)
SENSE
LT1999-10
LT1999-20
LT1999-50
–0.35
–0.2
–0.08
0.35
0.2
0.08
V
V
V
V
= V – V
+IN –IN
l
l
V
CM Input Voltage Range
Differential Input Impedance
CM Input Impedance
–5
80
V
CM
R
R
ΔV
=
2V/Gain
6.4
8
9.6
kΩ
IN(DIFF)
INCM
INDIFF
l
l
ΔV = 5.5V to 80V
5
3.6
20
4.8
MΩ
kΩ
CM
ΔV = –5V to 4.5V
6
CM
V
Input Referred Voltage Offset
–750
–1500
500
750
1500
μV
μV
OSI
l
ΔV /ΔT
Input Referred Voltage Offset Drift
Gain
5
μV/°C
OSI
l
l
l
A
LT1999-10
LT1999-20
LT1999-50
9.95
19.9
48.75
10
20
50
10.05
20.1
50.25
V/V
V/V
V/V
V
l
A Error
V
Gain Error
ΔV
OUT
=
2V
–0.5
0.2
0.5
%
l
l
l
I
Input Bias Current
I(+IN) = I(–IN)
(Note 8)
V
V
V
> 5.5V
= –5V
SHDN
100
–2.35
137.5
–1.95
0.001
175
–1.5
2.5
μA
mA
μA
B
CM
CM
= 0.5V, 0V < V < 80V
CM
l
l
l
I
Input Offset Current
OS
(Note 8)
V
V
V
> 5.5V
–1
1
10
2.5
μA
μA
μA
OS
CM
CM
SHDN
+
I
= I(+IN) – I(–IN)
= –5V
–10
–2.5
= 0.5V, 0V < V < 80V
CM
l
PSRR
Supply Rejection Ratio
V = 4.5V to 5.5V
68
77
dB
1999fb
3
LT1999-10/LT1999-20/
LT1999-50
elecTrical characTerisTics The l denotes the specifications which apply over the full operating
temperature range, 0°C < TA < 70°C for C-grade parts, –40°C < TA < 85°C for I-grade parts, and –40°C < TA < 125°C for H-grade parts,
otherwise specifications are at TA = 25°C. V+ = 5V, GND = 0V, VCM = 12V, VREF = floating, VSHDN = floating, unless otherwise specified.
See Figure 2.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
l
l
l
l
CMRR
Sense Input Common Mode Rejection
V
CM
V
CM
V
CM
V
CM
= –5V to 80V
= –5V to 5.5V
96
96
75
80
105
120
90
dB
dB
dB
dB
= 12V, 7V , f = 100kHz,
P-P
= 0V, 7V , f = 100kHz
100
P-P
e
Differential Input Referred Noise Voltage Density
f = 10kHz
f = 0.1Hz to 10Hz
97
8
nV/√Hz
μV
P-P
n
+
REF
REF Pin Rejection, V = 5.5V
RR
l
l
l
ΔV = 3.0V
LT1999-10
LT1999-20
LT1999-50
62
62
62
70
70
70
dB
dB
dB
REF
ΔV = 3.25V
REF
ΔV = 3.25V
REF
l
l
R
REF Pin Input Impedance
60
0.15
80
0.4
100
0.65
kΩ
MΩ
REF
V
SHDN
= 0.5V
l
l
V
V
Open Circuit Voltage
2.45
1
2.5
2.5
2.55
2.75
V
V
REF
V
= 0.5V
SHDN
+
+
+
l
l
l
REF Pin Input Range (Note 9)
LT1999-10
LT1999-20
LT1999-50
1.25
1.125
1.125
V – 1.25
V
V
V
REFR
V – 1.125
V – 1.125
+
l
l
l
I
Pin Pull-Up Current
SHDN Pin Input High
SHDN Pin Input Low
Small Signal Bandwidth
V = 5.5V, V
= 0V
SHDN
–6
–2
μA
V
SHDN
+
V
V
V – 0.5
IH
IL
0.5
V
f
LT1999-10
LT1999-20
LT1999-50
2
2
1.2
MHz
MHz
MHz
3dB
SR
Slew Rate
3
V/μs
μs
t
s
t
r
Settling Time due to Input Step, ΔV
=
2V
0.5% Settling
2.5
OUT
Common Mode Step Recovery Time
ΔV 50V, 20ns
(Note 10)
LT1999-10
LT1999-20
LT1999-50
0.8
1
1.3
μs
μs
μs
=
CM
l
V
Supply Voltage (Note 11)
Supply Current
4.5
5
5.5
V
S
l
l
l
I
V
V
> 5.5V
= –5V
1.55
5.8
3
1.9
7.1
10
mA
mA
μA
S
CM
CM
+
V = 5.5V, V
= 0.5V, V > 0V
CM
SHDN
R
Output Impedance
ΔI = 2mA
0.15
31
Ω
mA
mA
O
O
l
l
I
I
Sourcing Output Current
Sinking Output Current
R
LOAD
R
LOAD
= 50Ω to GND
6
40
40
SRC
SNK
+
= 50Ω to V
15
26
+
l
l
V
Swing Output High (with Respect to V )
R
LOAD
R
LOAD
= 1kΩ to Mid-Supply
= Open
125
5
250
125
mV
mV
OUT
–
l
l
Swing Output Low (with Respect to V )
R
LOAD
R
LOAD
= 1kΩ to Mid-Supply
= Open
250
150
400
225
mV
mV
t
t
Turn-On Time
Turn-Off Time
V
SHDN
V
SHDN
= 0V to 5V
= 5V to 0V
1
1
μs
μs
ON
OFF
1999fb
4
LT1999-10/LT1999-20/
LT1999-50
elecTrical characTerisTics The l denotes the specifications which apply over the full operating
temperature range, –55°C < TA < 150°C for MP-grade parts, otherwise specifications are at TA = 25°C. V+ = 5V, GND = 0V, VCM = 12V,
VREF = floating, VSHDN = floating, unless otherwise specified. See Figure 2.
SYMBOL PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
l
l
l
V
Full-Scale Input Sense Voltage (Note 7)
= V – V
LT1999-10
LT1999-20
LT1999-50
–0.35
–0.2
–0.08
0.35
0.2
0.08
V
V
V
SENSE
V
SENSE
+IN
–IN
l
l
V
CM Input Voltage Range
Differential Input Impedance
CM Input Impedance
–5
80
V
CM
R
R
ΔV
=
INDIFF
2V/GAIN
6.4
8
9.6
kΩ
IN(DIFF)
l
l
ΔV = 5.5V to 80V
ΔV = –5V to 4.5V
5
3.6
20
4.8
MΩ
kΩ
INCM
CM
CM
6
V
Input Referred Voltage Offset
–750
–2000
500
750
2000
μV
μV
OSI
l
ΔV /ΔT Input Referred Voltage Offset Drift
OSI
8
μV/°C
l
l
l
A
Gain
LT1999-10
LT1999-20
LT1999-50
9.95
19.9
48.75
10
20
50
10.05
20.1
50.25
V/V
V/V
V/V
V
l
A Error
V
Gain Error
ΔV
=
OUT
2V
–0.5
0.2
0.5
%
l
l
l
I
Input Bias Current
I(+IN) = I(–IN)
(Note 8)
V
V
V
> 5.5V
= –5V
SHDN
100
–2.35
137.5
–1.95
0.001
180
–1.5
10
μA
mA
μA
B
CM
CM
= 0.5V, 0V < V < 80V
CM
l
l
l
I
Input Offset Current
OS
(Note 8)
V
V
V
> 5.5V
–1
1
10
10
μA
μA
μA
OS
CM
CM
SHDN
+
I
= I(+IN) – I(–IN)
= –5V
–10
–10
= 0.5V, 0V < V < 80V
CM
l
PSRR
CMRR
Supply Rejection Ratio
Sense Input Common Mode Rejection
V = 4.5V to 5.5V
68
77
dB
l
l
l
l
V
CM
V
CM
V
CM
V
CM
= –5V to 80V
= –5V to 5.5V
96
96
75
80
105
120
90
dB
dB
dB
dB
= 12V, 7V , f = 100kHz,
P-P
P-P
= 0V, 7V , f = 100kHz
100
e
Differential Input Referred Noise Voltage Density f= 10kHz
f = 0.1Hz to 10Hz
97
8
nV/√Hz
n
μV
P-P
+
REF
REF Pin Rejection, V = 5.5V
ΔV = 2.75V
RR
l
l
l
LT1999-10
LT1999-20
LT1999-50
62
62
62
70
70
70
dB
dB
dB
REF
ΔV = 3.25V
REF
ΔV = 3.25V
REF
l
l
R
REF Pin Input Impedance
Open Circuit Voltage
60
80
100
kΩ
REF
V
= 0.5V
0.15
0.4
0.65
MΩ
SHDN
l
l
V
V
2.45
0.25
2.5
2.5
2.55
2.75
V
V
REF
V
= 0.5V
SHDN
+
+
+
l
l
l
REF Pin Input Range (Note 9)
LT1999-10
LT1999-20
LT1999-50
1.5
1.125
1.125
V – 1.25
V
V
V
REFR
V – 1.125
V – 1.125
+
l
l
l
I
Pin Pull-Up Current
SHDN Pin Input High
SHDN Pin Input Low
Small Signal Bandwidth
V = 5.5V, V
= 0V
SHDN
–6
–2
μA
V
SHDN
+
V
V
V – 0.5
IH
IL
0.5
V
f
LT1999-10
LT1999-20
LT1999-50
2
2
1.2
MHz
MHz
MHz
3dB
SR
Slew Rate
3
V/μs
μs
t
Settling Time Due to Input Step, ΔV
=
2V
0.5% Settling
2.5
S
OUT
1999fb
5
LT1999-10/LT1999-20/
LT1999-50
The l denotes the specifications which apply over the full operating
elecTrical characTerisTics
temperature range, –55°C < TA < 150°C for MP-grade parts, otherwise specifications are at TA = 25°C. V+ = 5V, GND = 0V, VCM = 12V,
VREF = floating, VSHDN = floating, unless otherwise specified. See Figure 2.
SYMBOL PARAMETER
Common Mode Step Recovery Time
ΔV 50V, 20ns
(Note 10)
CONDITIONS
MIN
TYP
MAX
UNITS
t
LT1999-10
LT1999-20
LT1999-50
0.8
1
1.3
μs
μs
μs
r
=
CM
l
V
Supply Voltage (Note 11)
Supply Current
4.5
5
5.5
V
S
l
l
l
I
V
V
> 5.5V
= –5V
1.55
5.8
3
1.9
7.1
25
mA
mA
μA
S
CM
CM
+
V = 5.5V, V
= 0.5V, V > 0V
CM
SHDN
R
Output Impedance
ΔI = 2mA
0.15
31
Ω
mA
mA
O
O
l
l
I
I
Sourcing Output Current
Sinking Output Current
R
R
= 50Ω to GND
3
40
40
SRC
SNK
LOAD
LOAD
+
= 50Ω to V
10
26
+
l
l
V
Swing Output High (with Respect to V )
R
LOAD
R
LOAD
= 1kΩ to Mid-Supply
= Open
125
5
250
125
mV
mV
OUT
–
l
l
Swing Output Low (with Respect to V )
R
LOAD
R
LOAD
= 1kΩ to Mid-Supply
= Open
250
150
400
225
mV
mV
t
t
Turn-On Time
Turn-Off Time
V
V
= 0V to 5V
= 5V to 0V
1
1
μs
μs
ON
SHDN
SHDN
OFF
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 7: Full-scale sense (V
differential input that can be applied with better than 0.5% gain accuracy.
Gain accuracy is degraded when the output saturates against either power
) gives indication of the maximum
SENSE
+
supply rail. V
is verified with V = 5.5V, V = 12V, with the REF pin
SENSE
CM
set to it’s voltage range limits. The maximum V
is verified with the
SENSE
Note 2: Pin 2 (+IN) and Pin 3 (–IN) are protected by ESD voltage clamps
which have asymmetric bidirectional breakdown characteristics with respect
to the GND pin (Pin 5). These pins can safely support common mode
voltages which vary from –5.25V to 88V without triggering an ESD clamp.
Note 3: Exposure to differential sense voltages exceeding the normal
operating range for extended periods of time may degrade part
performance. A heat sink may be required to keep the junction temperature
below the Absolute Maximum Rating when the inputs are stressed
differentially. The amount of power dissipated in the LT1999 due to input
REF pin set to it’s minimum specified limit, verifying the gain error is less
than 0.5% at the output. The minimum V is verified with the REF pin
SENSE
set to its maximum specified limit, verifying the gain error at the output is
less than 0.5%. See Note 9 for more information.
Note 8: I is defined as the average of the input bias currents to the +IN
B
and –IN pins (Pins 2 and 3). A positive current indicates current flowing
into the pin. I is defined as the difference of the input bias currents.
OS
I
= I(+IN) – I(–IN)
OS
overdrive can be approximated by:
Note 9: The REF pin voltage range is the minimum and maximum limits
that ensures the input referred voltage offset does not exceed 3mV over
the I, C, and H temperature ranges, and 3.5mV over the MP temperature
range.
2
V
+IN − V−IN
8kΩ
(
=
)
PDISS
Note 4: A heat sink may be required to keep the junction temperature
below the absolute maximum rating.
Note 10: Common mode recovery time is defined as the time it takes the
output of the LT1999 to recover from a 50V, 20ns input common mode
voltage transition, and settle to within the DC amplifier specifications.
Note 5: The LT1999C/LT1999I are guaranteed functional over the operating
temperature range –40°C to 85°C. The LT1999H is guaranteed functional
over the operating temperature range –40°C to 125°C. The LT1999MP is
guaranteed functional over the operating temperature range –55°C to 150°C.
Junction temperatures greater than 125°C will promote accelerated aging.
The LT1999 has a demonstrated typical life beyond 1000 hours at 150°C.
+
Note 11: Operating the LT1999 with V < 4.5V is possible, although the
LT1999 is not tested or specified in this condition. See the Applications
Information section.
Note 6: The LT1999C is guaranteed to meet specified performance from
0°C to 70°C. The LT1999C is designed, characterized, and expected to
meet specified performance from –40°C to 85°C but is not tested or
QA sampled at these temperatures. The LT1999I is guaranteed to meet
specified performance from –40°C to 85°C. The LT1999H is guaranteed
to meet specified performance from –40°C to 125°C. The LT1999MP is
guaranteed to meet specified performance from –55°C to 150°C.
1999fb
6
LT1999-10/LT1999-20/
LT1999-50
Typical perForMance characTerisTics
Supply Current
vs Input Common Mode
Supply Current vs Temperature
Supply Current vs Supply Voltage
1.8
1.7
1.6
1.5
1.4
4.0
7
6
5
4
3
2
1
0
+
150°C
V
V
V
= OPEN
= 0V
V
= 12V
SHDN
CM
V
= 5V
130°C
90°C
INDIFF
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
= 12V
CM
25°C
–45°C
–55°C
+
+
V
V
= 5.5V
= 4.5V
–55 –30 –5 20 45 70 95 120 145
0
1
2
3
4
5
–5
5
15 25 35 45 55 65 75 80
(V)
TEMPERATURE (°C)
SUPPLY VOLTAGE (V)
V
CM
1999 G02
1999 G03
1999 G01
Supply Current
Shutdown Supply Current
vs Temperature
Shutdown Input Bias Current
vs Input Common Mode
vs SHDN Pin Voltage
10
1
10
8
1000
100
10
+
+
V
V
V
= 0V
= 0V
V
V
V
= 5V
SHDN
V
V
= 5V
= 12V
T
T
T
= 150°C
A
= 0V
= 0V
INDIFF
SHDN
SENSE
CM
= 12V
CM
=130°C
=110°C
A
6
A
0.1
+
+
T
= 150°C
V
V
= 5.5V
= 4.5V
A
4
T
T
= 90°C
= 70°C
A
A
0.01
0.001
2
T
= –55°C
A
T
= 25°C
2
A
0
1
0
1
3
(V)
4
5
–55 –30 –5 20 45 70 95 120 145
0
20
40
V
CM
60
(V)
80
100
V
TEMPERATURE (°C)
SHDN
1999 G04
1999 G05
1999 G06
Input Bias Current
vs Input Common Mode
Input Impedance
vs Input Common Mode Voltage
Input Bias Current vs Temperature
0.5
0
146
144
142
140
138
136
134
132
100000
10000
1000
100
+
V
V
V
= OPEN
= 0V
SHDN
V
= 5V
INDIFF
+
= 5V
COMMON MODE INPUT
IMPEDANCE
V
V
= 80V
–0.5
–1.0
–1.5
–2.0
CM
CM
= 5.5V
DIFFERENTIAL INPUT IMPEDANCE
10
1
–5
5
15 25 35 45 55 65 75 80
(V)
–55 –30 –5 20 45 70 95 120 145
–5
5
15 25 35 45 55 65 75
(V)
V
TEMPERATURE (°C)
V
CM
CM
1999 G07
1999 G08
1999 G09
1999fb
7
LT1999-10/LT1999-20/
LT1999-50
Typical perForMance characTerisTics
Input Referred Voltage Offset
Input Referred Voltage Offset
vs Temperature and Gain Option
vs Input Common Mode Voltage
1500
1500
1000
500
+
V
T
= 5V
= 25°C
V
= 12V
CM
12 UNITS PLOTTED
A
1000 12 UNITS PLOTTED
500
0
0
–500
–500
–1000
–1500
LT1999-10
LT1999-20
LT1999-50
–1000
–1500
LT1999-10
LT1999-20
LT1999-50
–5
5
15 25 35 45 55 65 75
–55 –30 –5 20 45 70 95 120 145
V
(V)
TEMPERATURE (°C)
CM
1999 G11
1999 G10
LT1999-20 Small Signal
Frequency Response
LT1999-10 Small Signal
Frequency Response
35
30
25
20
15
10
5
180
135
90
30
180
135
90
25
20
15
10
5
GAIN
GAIN
45
45
PHASE
PHASE
0
0
–45
–90
–135
–180
–45
–90
–135
–180
0
0
–5
–10
V
= 0.5V AT 1kHz
P-P
V
= 0.5V AT 1kHz
OUT
OUT
P-P
–5
1
10
100
1000
10000
1
10
100
1000
10000
FREQUENCY (kHz)
FREQUENCY (kHz)
1999 G13
1999 G12
Gain Error
vs Input Common Mode Voltage
LT1999-50 Small Signal
Frequency Response
Gain Error vs Temperature
40
35
30
25
20
15
10
5
180
135
90
0.50
0.25
0
0.50
0.25
0
+
V
T
= 5V
V
= 12V
CM
GAIN
= 25°C
12 UNITS PLOTTED
A
12 UNITS PLOTTED
45
PHASE
0
–45
–90
–135
–0.25
–0.50
–0.25
–0.50
LT1999-10
LT1999-20
LT1999-50
LT1999-10
LT1999-20
LT1999-50
V
= 0.5V AT 1kHz
P-P
OUT
0
–180
1
10
100
1000
10000
–5
5
15 25 35 45 55 65 75
–55 –30 –5 20 45 70 95 120 145
FREQUENCY (kHz)
V
(V)
CM
TEMPERATURE (°C)
1999 G14
1999 G16
1999 G15
1999fb
8
LT1999-10/LT1999-20/
LT1999-50
Typical perForMance characTerisTics
LT1999-10 Pulse Response
LT1999-20 Pulse Response
LT1999-50 Pulse Response
V
V
V
SENSE
SENSE
SENSE
V
V
V
OUT
OUT
OUT
1999 G19
1999 G17
1999 G18
TIME (2µs/DIV)
TIME (2µs/DIV)
TIME (2µs/DIV)
LT1999-20 2V Step Response
Settling Time
LT1999-10 2V Step Response
Settling Time
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.20
0.15
0.10
0.05
0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.100
0.075
0.050
0.025
0
V
OUT
V
OUT
–0.05
–0.01
–0.15
–0.20
–0.025
–0.050
–0.075
–0.100
OUTPUT ERROR
OUTPUT ERROR
1999 G20
–1
0
1
2
3
4
5
6
7
8
9 10
TIME (1µs/DIV)
TIME (1µs/DIV)
1999 G21
LT1999-50 2V Step Response
Settling Time
CMRR vs Frequency
CMRR vs Frequency
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.500
0.375
0.250
0.125
0
120
100
80
60
40
20
0
120
100
80
60
40
20
0
LT1999-10
LT1999-20
LT1999-50
LT1999-10
LT1999-20
LT1999-50
V
OUT
–0.125
–0.250
–0.375
–0.500
OUTPUT ERROR
V
V
T
= 0V
= 5V
= 25°C
V
V
T
= 12V
= 5V
= 25°C
CM
CM
+
+
A
A
6 UNITS PLOTTED
6 UNITS PLOTTED
1999 G22
1
10
100
1000
10000
1
10
100
1000
10000
TIME (1µs/DIV)
FREQUENCY (kHz)
FREQUENCY (kHz)
1999 G24
1999 G23
1999fb
9
LT1999-10/LT1999-20/
LT1999-50
Typical perForMance characTerisTics
LT1999-10 Common Mode Rising
Edge Step Response
LT1999-10 Common Mode Falling
Edge Step Response
V
, t
≈ 20ns
CM RISE
V
, t
≈ 20ns
CM FALL
V
V
OUT
OUT
1999 G25
1999 G26
TIME (0.5µs/DIV)
TIME (0.5µs/DIV)
LT1999-20 Common Mode Rising
Edge Step Response
LT1999-20 Common Mode Falling
Edge Step Response
V
, t
≈ 20ns
CM RISE
V
, t
≈ 20ns
CM FALL
V
V
OUT
OUT
1999 G27
1999 G28
TIME (0.5µs/DIV)
TIME (0.5µs/DIV)
LT1999-50 Common Mode Rising
Edge Step Response
LT1999-50 Common Mode Falling
Edge Step Response
V
, t
≈ 20ns
CM RISE
V
, t
≈ 20ns
CM FALL
V
OUT
V
OUT
1999 G29
1999 G30
TIME (0.5µs/DIV)
TIME (0.5µs/DIV)
1999fb
10
LT1999-10/LT1999-20/
LT1999-50
Typical perForMance characTerisTics
LT1999 Input Referred Noise
Density vs Frequency
Short-Circuit Current
vs Temperature
REF Open Circuit Voltage
vs Temperature
3.0
1000
100
10
40
30
ACTIVE MODE
2.5
SINKING
20
SHDN MODE
2.0
10
1.5
1.0
0
–10
–20
–30
–40
SOURCING
0.5
+
V
= 5V
0
–55 –30 –5 20 45 70 95 120 145
0.001 0.01
0.1
1
10
1000 10000
–55 –30 –5 20 45 70 95 120 145
TEMPERATURE (°C)
FREQUENCY (kHz)
TEMPERATURE (°C)
1999 G33
1999 G31
1999 G32
SHDN Pin Current vs SHDN Pin
Voltage and Temperature
Turn-On/Turn-Off Time
vs SHDN Voltage
0
–1
–2
–3
–4
+
V
= 12V
V
V
= 5V
= 12V
CM
CM
I
S
T
= 150°C
A
T
T
= 25°C
A
A
SHUTDOWN
= –55°C
V
SHDN
1999 G35
0
1
2
3
4
5
TIME (1µs/DIV)
V
(V)
SHDN
1999 G34
VOUT vs VSENSE Over the Sense
ABSMAX Range
VOUT vs VSENSE
6
5
6
5
V
= 2.5V
V
PHASE REVERSAL FOR V
< –25V
REF
OUT
SENSE
4
4
3
3
2
2
1
1
LT1999-10
LT1999-20
LT1999-50
LT1999-10
LT1999-20
LT1999-50
0
0
V
= 2.5V
REF
–1
–1
–0.25 –0.15 –0.05
0.05
(V)
0.15
0.25
–60
–30
0
30
60
V
V
(V)
SENSE
SENSE
1999 G36
1999 G37
1999fb
11
LT1999-10/LT1999-20/
LT1999-50
pin FuncTions
V (Pins 1, 4): Power Supply Voltage. Pins 1 and 4 are
tied internally together. The specified range of operation
is 4.5V to 5.5V, but lower supply voltages (down to ap-
proximately 4V) is possible although the LT1999 is not
tested or characterized below 4.5V. See the Applications
Information section.
+
OUT (Pin 7): Voltage Output. V
= A •(V
V
),
OUT
V
SENSE
OSI
where A is the gain, and V is the input referred off-
V OSI
set voltage. The output amplifier has a low impedance
output and is designed to drive up to 200pF capacitive
loads directly. Capacitive loads exceeding 200pF should
be decoupled with an external resistor of at least 100Ω.
+IN (Pin 2): Positive Sense Input Pin.
–IN (Pin 3): Negative Sense Input Pin.
GND (Pin 5): Ground Pin.
SHDN (Pin 8): Shutdown Pin. When pulled to within 0.5V
of GND (Pin 5), will place the LT1999 into low power
shutdown. If the pin is left floating, an internal 2µA pull-
up current source will place the LT1999 into the active
(amplifying) state.
REF (Pin 6): Reference Pin Input. The REF pin sets the
output common mode level and is set halfway between V
+
and GND using a divider made of two 160k resistors. The
default open circuit potential of the REF pin is mid-supply.
It can be overdriven by an external voltage source cable
of driving 80k to a mid-supply potential (see the Electrical
Characteristics table for its specified input voltage range).
1999fb
12
LT1999-10/LT1999-20/
LT1999-50
block DiagraM
+
V
+
2µA
V
4.5k
8
SHDN
1
2
V(G
V(G
)
)
+IN
–IN
R
G
R
+
–
+IN
G
IN
2k
2k
2k
+IN
–
+
OUT
REF
V+
A
7
6
0.8k
+S
O
D1
C
F
4pF
R
V+
0.8k
–S
300Ω
160k
160k
2k
R
–IN
3
4
R
–IN
+
V
GND
5
1999 BD
Figure 1. Simplified Block Diagram
TesT circuiT
+
V
LT1999
+
V
5V
2µA
1
8
SHDN
V
SHDN
R
+
–
G
+
4k
4k
2
–
+
7
V
V
+
OUT
REF
+
–
V
0.8k
0.8k
+
V
V
IN(DIFF)
+
+
–
V
CM
–
160k
160k
–
3
6
5
+
5V
V
0.1µF
4
0.1µF
1999 F02
Figure 2. Test Circuit
1999fb
13
LT1999-10/LT1999-20/
LT1999-50
applicaTions inForMaTion
The LT1999 current sense amplifier provides accurate
bidirectionalmonitoringofcurrentthroughauser-selected
senseresistor.Thevoltagegeneratedbythecurrentflowing
in the sense resistor is amplified by a fixed gain of 10V/V,
20V/V or 50V/V (LT1999-10, LT1999-20, or LT1999-50
respectively) and is level shifted to the OUT pin. The volt-
age difference and polarity of the OUT pin with respect
to REF (Pin 6) indicates magnitude and direction of the
current in the sense resistor.
The voltage difference between the OUT pin and the REF
pin represent both polarity and magnitude of the sensed
voltage. The noninverting input of amplifier A is biased
O
+
by a resistive 160k to 160k divider tied between V and
GND to set the default REF pin bias to mid-supply.
+
Case 2: –5V < V < V
CM
Forcommonmodeinputswhichtransitionoraresetbelow
the supply voltage, diode D1 will turn on and will provide a
source of current through R and R to bias the inputs
–
+S
S
THEORY OF OPERATION
of transconductance amplifier G at least 2.25V above
IN
GND. The transition is smooth and continuous; there are
negligible changes to either gain or amplifier voltage off-
set. The only difference in amplifier operation is the bias
Refer to the Block Diagram (Figure 1).
+
Case 1: V < V < 80V
CM
currents provided by D1 through R and R are steered
–
+S
S
For input common mode voltages exceeding the power
supply, one can assume D1 of Figure 1 is completely off.
through the input pins, otherwise amplifier operation is
identical.TheinputstotransconductanceamplifierG are
IN
The sensed voltage (V
) is applied across Pin 2 (+IN)
SENSE
still forced to equal potentials forcing any differential volt-
ages appearing at the +IN and –IN pins into a differential
current.Thisdifferentialcurrentiscombined,level-shifted,
and converted back into a voltage by trans-resistance
and Pin 3 (–IN) to matched resistors R and R (nomi-
+
–
IN
+
IN
nally 4k each). The opposite ends of R and R are
–
IN
IN
forced to equal potentials by transconductor G , which
IN
convert the differentially sensed voltage into a sensed
amplifier A and Resistor R . Resistors R and R are
–
O
G
+S
S
current. The sensed current in R and R is combined,
+
–
IN
IN
trimmed to match R and R respectively, to prevent
+
–
IN
IN
level-shifted, and converted back into a voltage by trans-
resistance amplifier A and resistor R . Amplifier A pro-
common mode to differential conversion from occurring
(to the extent of the matched trim) when the input com-
O
G
O
+
videshighopenloopgaintoaccuratelyconvertthesensed
current back into a voltage and to drive external loads. The
theoretical output voltage is determined by the sensed
mon mode transitions below V .
As described in case 1, the output is determined by the
sense voltage and the ratio of two on-chip resistors:
voltage (V
), and the ratio of two on-chip resistors:
SENSE
RG
RIN
RG
RIN
VOUT − VREF = VSENSE
•
VOUT − VREF = VSENSE
•
where
RIN =
where
RIN =
R+IN + R−IN
R+IN + R−IN
nominally 4k
2
2
FortheLT1999-10,R isnominally40k.FortheLT1999-20,
G
R is nominally 80k, and for the LT1999-50, R is nomi-
G
G
nally 200k.
1999fb
14
LT1999-10/LT1999-20/
LT1999-50
applicaTions inForMaTion
Input Common Mode Range
–2.0
–2.5
–3.0
–3.5
–4.0
–4.5
–5.0
–5.5
–6.0
The LT1999 was optimized for high common mode re-
jection. Its input stage is balanced and fully differential,
designedtoamplifydifferentialsignalsandrejectcommon
mode signals. There is negligible crossover distortion due
to sense voltage reversals. The amplifier is most linear in
the zero-sense region.
BELOW GROUND INPUT
COMMON MODE RANGE
+
LIMITED BY V
SUPPLY VOLTAGE
BELOW GROUND INPUT
COMMON MODE RANGE
LIMITED BY ESD CLAMPS
+
With the V supply configured within the specified and
+
TYPICAL ESD CLAMP VOLTAGE
tested range (4.5V < V < 5.5V), the LT1999’s common
mode range extends from –5V to 80V. Pushing +IN and
–IN beyond the limits specified in the Absolute Maximum
table can turn on the voltage clamps designed to protect
the +IN and –IN pins during ESD events.
4
4.25
4.5
4.75
5
5.25
5.5
SUPPLY VOLTAGE (V)
1999 F03
Figure 3. Lower Input Common Mode vs Supply Voltage
It is possible to operate the LT1999 on power supplies
as low as 4V (although it is not tested or specified below
4.5V). Operating the LT1999 on supplies below 4V will
produce erratic behavior. When operating the LT1999
with supplies as low as 4V, the common mode range for
inputs which extend below GND is reduced. Refer to the
Output Common Mode Range
The LT1999’s output common mode level is set by the
voltage on the REF pin. The REF pin sits in the middle of
a 160k to 160k voltage divider connected between V and
GND which sets the default open circuit potential of the
REF pin to mid-supply. It can be overdriven by an external
voltage source capable of driving 80k tied to a mid-supply
potential. See the Electrical Characteristics table for the
REF pin’s specified input voltage range.
+
+
Block Diagram (Figure 1). For inputs driven below V ,
diode D1 conducts. For proper operation, the input to the
transconductor V(G ) must be biased at approximately
+
IN
2.25V above the GND pin. V(G ) sits on the centertap
+
IN
of a voltage divider comprised of R and R V(G )
–
IN
Differential sampling of the OUT pin with respect the REF
pin provides the best noise immunity. Measurements of
the output voltage made differentially with respect to the
REF pin will provide the highest power supply and com-
monmoderejection. Otherwise, powersupplyorGNDpin
disturbances are divided by the REF pin’s voltage divider
and appear directly at the noninverting input of the trans-
+
+
S
IN
likewisesitsinthemiddleofthevoltagedividercomprised
of R , and R ). The voltage on V(G ) input is given
–
–
+
S
IN
IN
by the following equation:
R+ S
R+ S + R+IN
R+IN
R+ S + R+IN
V(G+IN)= V +IN
•
+ V+ − V
•
D1
Setting V(G ) = 2.25V, the ratio (R /R ) to 5, and V
+
+
+
IN
IN
S
D1
resistance amplifier A and are not rejected.
O
equalto 0.8V (coldtemperatures), aplotof thelowerinput
common mode range plotted against supply is shown in
Figure 3.
If not driven by a low impedance (<100Ω), the REF pin
should be filtered with at least 1nF of capacitance to a
low impedance, low noise ground plane. This external
capacitance will also provide a charge reservoir during
high frequency sampling of the REF pin by ADC inputs
attached to this pin.
1999fb
15
LT1999-10/LT1999-20/
LT1999-50
applicaTions inForMaTion
Shutdown Capability
bandwidth of the LT1999 that may introduce errors. The
pole is set by the following equation:
IfSHDN(Pin8)isdriventowithin0.5VofGND, theLT1999
is placed into a low power shutdown state in which the
f = 1/(π•(R + R )•C ) ≈ 10MHz
+ –
filt IN IN F
+
part will draw about 3μA from the V supply. The input
Both the resistors and capacitors have a 15% variation
so the pole can vary by approximately 30% over manu-
facturing process and temperature variations.
pins (+IN and –IN) will draw approximately 1nA if biased
within the range of 0V to 80V (with no differential voltage
applied). If the input pins are pulled below the GND pin,
each input appears as a diode tied to GND in series with
approximately 4k of resistance. The REF pin appears as
approximately 0.4MΩ tied to a mid-supply potential. The
output appears as reverse biased diodes tied between the
The layout for lowest EMI/noise susceptibility is achieved
by keeping short direct connections and minimizing loop
areas (see Figure 4). If the user-supplied sense resistor
cannot be placed in close proximity to the LT1999, the
surface area of the loop comprising connections of +IN
+
output to either V or GND pins.
to R
and back to –IN should be minimized. This
SENSE
EMI Filtering and Layout Practices
requires routing PCB traces connecting +IN to R
SENSE
and –IN to R
adjacent with one another with minimal
SENSE
An internal 1st order differential lowpass noise/EMI sup-
pression filter with a –3dB bandwidth of 10MHz (approxi-
mately 5× the LT1999’s –3dB bandwidth) is included to
help improve the LT1999’s EMI susceptibility and to assist
with the rejection of high frequency signals beyond the
separation. The metal traces connecting +IN to the sense
resistor and –IN to the sense resistor should match and
use the same trace width.
+
Bypassing the V pin to the GND pin with a 0.1µF capacitor
with short wiring connection is recommended.
†
+
1
2
3
4
8
7
6
5
V
SHDN
OUT
REF
FROM DC SOURCE
TO LOAD
+IN
–IN
DIFFERENTIAL
ANALOG OUT
R
SENSE
*
+
V
GND
**
SUPPLY BYPASS
CAPACITOR
1999 F03
* KEEP LOOP AREA COMPRISING R
AS SMALL AS POSSIBLE.
, +IN AND –IN PINS
SENSE
**REF BYPASS TIED TO A LOW NOISE, LOW IMPEDANCE
SIGNAL GROUND PLANE.
† OPTIONAL 10pF CAPACITOR TO PREVENT dV/dt EDGES
ON INPUT COUPLING TO FLOATING SHDN PIN.
Figure 4. Recommended Layout
1999fb
16
LT1999-10/LT1999-20/
LT1999-50
applicaTions inForMaTion
The REF pin should be either driven by a low source im-
pedance (<100Ω) or should be bypassed with at least 1nF
to a low impedance, low noise, signal ground plane (see
Selection of the Current Sense Resistor
The external sense resistor selection presents a delicate
trade-off between power dissipation in the resistor and
current measurement accuracy.
+
Figure 4). Larger bypass capacitors on both V pins, and
the REF pin, will extend enhanced AC CMRR, and PSRR
performance to lower frequencies. Bypassing the REF pin
In high current applications, the user may want to mini-
mize the power dissipated in the sense resistor. The sense
resistorcurrentwillcreateheatandvoltageloss,degrading
efficiency. Asaresult,thesenseresistorshouldbeassmall
as possible while still providing adequate dynamic range
required by the measurement. The dynamic range is the
ratio between the maximum accurately produced signal
generated by the voltage across the sense resistor, and
theminimumaccuratelyreproducedsignal.Theminimum
accurately reproduced signal is primarily dictated by the
voltage offset of the LT1999. The maximum accurately
reproduced signal is dictated by the output swing of the
LT1999.
+
to a quiet ground plane filters the V pin or GND pin noise
that is sensed by the REF pin voltage divider and applied
to the noninverting input of output amplifier A . Any com-
O
mon I•R drops generated by pulsating ground currents in
common with the REF pin filter capacitor can compromise
the filtering performance and should be avoided.
If the SHDN pin is not driven and is left floating, routing
a PCB trace connecting Pins 1 and 8 under the part will
act as a shield, and will help limit edge coupling from the
inputs (Pins 2 and 3) to the SHDN pin. Periodic pulses on
the inputs with fast edges may glitch the high impedance
SHDN pin, periodically putting the part into low power
shutdown.Additionalprecautionagainstthismaybetaken
by adding an optional small (~10pF) capacitor may be tied
Thus the dynamic range for the LT1999 can be thought of
the maximum sense voltage divided by the input referred
voltage offset or:
+
between V (Pin 1) and Pin 8.
∆VOUT(MAX)
Dynamic Range =
Finally, when connecting the LT1999 inputs to the sense
resistor,itisimportanttousegoodKelvinsensingpractices
(sensing the resistor in a way that excludes PCB trace
I•R voltage drops). For sense resistors less than 1Ω, one
might consider using a 4-wire sense resistor to sense the
resistive element accurately.
GAIN• VOSI
The above equation tells us that the dynamic range is
inversely proportional to the gain of the LT1999. Thus,
if accuracy is of greater importance than efficiency or
power loss, the LT1999-10 used with the highest valued
sense resistor possible is recommended. If efficiency,
heat generated, and power loss in the resistive shunt is
the primary concern, the LT1999-50 and the lowest value
sense resistor possible is recommended. The LT1999-20
is available for applications somewhere in between these
two extremes.
1999fb
17
LT1999-10/LT1999-20/
LT1999-50
applicaTions inForMaTion
Fuse Monitor
power in the precision on-chip input resistors. Precaution
should be taken to prevent junction temperatures from
exceedingtheAbsoluteMaximumratings(seeNote3inthe
Electrical Characteristics section). Secondly, if the load is
inductive, and the fuse blows open without a clamp diode,
energy stored in the inductive load will be dissipated in
the LT1999, which could cause damage. A simple steering
diode as shown in Figure 5 will prevent this from happen-
ing, and will protect the LT1999 from damage.
The inputs can be overdriven without fear of damaging
the LT1999. This makes the LT1999 ideal for monitoring
fuses if either +IN or –IN are shorted to ground while the
other is at the full common mode supply voltage (see
Figure 5). If the fuse in Figure 5 opens with the +IN tied
to the positive supply, the load will pull –IN to GND. The
+
output will be forced to the positive V supply rail. If it is
desired that the output be near ground if the fuse opens,
it is a simple matter of swapping the inputs. Precautions
should be followed: First, when the inputs are stressed
differentially due to the fuse blowing open, a large voltage
drop will be placed across the +IN to –IN pins, dissipating
Finally, the user should be aware that in fuse monitoring
applications with the sense voltage (V
= V – V
)
–
IN
+
SENSE
IN
being driven in excess of –25V, the output of the LT1999
will undergo phase reversal (see Figure 6).
+
V
S
V
LT1999
+
V
5V
2µA
1
2
8
7
SHDN
V
ON OFF
V
SHDN
SHDN
R
I
+
–
G
+
LOAD
4k
4k
V
+IN
–
+
V
V
+
V
V
OUT
REF
OUT
V
0.8k
0.8k
FUSE
V
R
SENSE
V
160k
160k
3
–IN
REF
6
5
+
5V
V
0.1µF
STEERING
DIODE
LOAD
4
0.1µF
1999 F05
Figure 5. Using the LT1999 to Monitor a Fuse
V
PHASE REVERSAL FOR V
< –25V
OUT
SENSE
V
= 2.5V
REF
–60 –45 –30 –15
V
0
15 30 45 60
(V)
SENSE
1999 F06
Figure 6. A Plot of the LT1999’s Output Voltage vs VSENSE (VSENSE = V+IN – V–IN).
In Applications Where the Sense Voltage Is Driven in Excess of –25V, the Output
of the LT1999 Will Undergo Phase Reversal
1999fb
18
LT1999-10/LT1999-20/
LT1999-50
Typical applicaTions
Solenoid Current Monitor
Bidirectional PWM Motor Monitor
The solenoid of Figure 7 consists of a coil of wire in an
iron case with permeable plunger that acts as a movable
element.WhentheMOSFETturnson,thediodeisreversed
Pulse width modulation is commonly used to efficiently
vary the average voltage applied across a DC motor. The
H-bridgetopologyofFigure9allowsfull4-quadrantcontrol:
clockwise control, counter-clockwise control, clockwise
regeneration, and counter-clockwise regeneration. The
LT1999 in conjunction with a non-inductive current shunt
is used to monitor currents in the rotor. The LT1999 can
be used to detect stuck rotors, provide detection of over-
current conditions in general, or provide current mode
feedback control.
biased off, and current flows through R
to actuate
SENSE
the solenoid. If the MOSFET is turned off, the current
in the MOSFET is interrupted, but the energy stored in
the solenoid causes the diode to turn on and current to
freewheel in the loop consisting of the diode, R
the solenoid.
and
SENSE
Figure 7 shows the LT1999 monitoring currents in a
ground referenced solenoid used when the coil is hard
tied to the case, and is tied to ground. Figure 8 shows a
supply referenced solenoid whose coil is insulated from
the case. The LT1999 will interface equally well to either
of these two configurations.
Figure 10 shows a plotof the outputvoltage ofthe LT1999.
+
V
S
V
LT1999
+
V
OFF
5V
2µA
ON
1
2
8
7
SHDN
V
SHDN
R
+
–
G
+
4k
4k
V
+IN
–IN
–
+
+
V
V
OUT
REF
V
0.8k
0.8k
2.5V
V
OUT
V
R
SENSE
SOLENOID RELEASES
SOLENOID PLUNGER PULLS IN
160k
160k
V
3
6
5
5V
+
0.1µF
V
V
+IN
4
SOLENOID
0.1µF
1999 F07b
1999 F07a
TIME (50ms/DIV)
Figure 7. Solenoid Current Monitor for Ground Tied Solenoid. The Common Mode
Inputs to the LT1999 Switch Between VS and One Diode Drop Below Ground
1999fb
19
LT1999-10/LT1999-20/
LT1999-50
Typical applicaTions
+
V
LT1999
V
S
5V
+
2µA
V
8
7
1
2
SHDN
V
SHDN
SOLENOID
V
R
+
–
G
4k
+IN
–
+
+
V
V
V
OUT
REF
0.8k
0.8k
2.5V
V
OUT
+
V
R
SENSE
SOLENOID RELEASES
SOLENOID PLUNGER PULLS IN
160k
160k
4k
V
–IN
3
4
6
5
ON
5V
+
V
+IN
V
0.1µF
OFF
0.1µF
1999 F08b
1999 F08a
TIME (50ms/DIV)
Figure 8. Solenoid Current Monitor for Non-Grounded Solenoids. This Circuit Performs the
Same Function as Figure 7 Except One End of the Solenoid Is Tied to VS. The Common Mode
Voltage of Inputs of the LT1999 Switch Between Ground and One Diode Drop Above VS
1999fb
20
LT1999-10/LT1999-20/
LT1999-50
Typical applicaTions
5V
+
+
V
V
LT1999-20
10µF
1
2
2µA
8
7
SHDN
V
V
V
SHDN
80k
0.1µF
+
–
24V
4k
4k
–
+
V
V
+
+IN
–IN
V
OUT
0.8k
0.8k
C4
1000µF
+
V
160k
160k
3
4
V
6
5
H-BRIDGE
BRIDGE
REF
0.1µF
5V
+
5V
V
PWM INPUT
DIRECTION
1999 F09
R
SENSE
0.025Ω
OUTA
OUTB
PWM IN
24V MOTOR
BRAKE INPUT
GND
Figure 9. Armature Current Monitor for DC Motor Applications
V
OUT
2.5V
V
+IN
1999 F10
TIME (20µs/DIV)
Figure 10. LT1999 Output Waveforms for the Circuit of Figure 9
1999fb
21
LT1999-10/LT1999-20/
LT1999-50
package DescripTion
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
MS8 Package
8-Lead Plastic MSOP
(Reference LTC DWG # 05-08-1660 Rev F)
3.00 0.ꢀ0ꢁ
(.ꢀꢀ8 .004)
(NOTE 3)
0.5ꢁ
(.0ꢁ05)
REF
8
7 ꢂ
5
3.00 0.ꢀ0ꢁ
(.ꢀꢀ8 .004)
(NOTE 4)
4.90 0.ꢀ5ꢁ
(.ꢀ93 .00ꢂ)
DETAIL “A”
0° – ꢂ° TYP
0.889 0.ꢀꢁ7
(.035 .005)
0.ꢁ54
(.0ꢀ0)
GAUGE PLANE
5.ꢁ3
(.ꢁ0ꢂ)
MIN
ꢀ
ꢁ
4
3
3.ꢁ0 – 3.45
(.ꢀꢁꢂ – .ꢀ3ꢂ)
0.53 0.ꢀ5ꢁ
(.0ꢁꢀ .00ꢂ)
ꢀ.ꢀ0
(.043)
MAX
0.8ꢂ
(.034)
REF
DETAIL “A”
0.ꢀ8
(.007)
0.ꢂ5
(.0ꢁ5ꢂ)
BSC
0.4ꢁ 0.038
(.0ꢀꢂ5 .00ꢀ5)
TYP
SEATING
PLANE
0.ꢁꢁ – 0.38
0.ꢀ0ꢀꢂ 0.0508
RECOMMENDED SOLDER PAD LAYOUT
NOTE:
ꢀ. DIMENSIONS IN MILLIMETER/(INCH)
ꢁ. DRAWING NOT TO SCALE
(.009 – .0ꢀ5)
(.004 .00ꢁ)
0.ꢂ5
(.0ꢁ5ꢂ)
BSC
TYP
MSOP (MS8) 0307 REV F
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.ꢀ5ꢁmm (.00ꢂ") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.ꢀ5ꢁmm (.00ꢂ") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.ꢀ0ꢁmm (.004") MAX
S8 Package
8-Lead Plastic Small Outline (Narrow .150 Inch)
(Reference LTC DWG # 05-08-1610)
.189 – .197
(4.801 – 5.004)
.045 ±.005
NOTE 3
.050 BSC
7
5
8
6
.245
MIN
.160 ±.005
.150 – .157
(3.810 – 3.988)
NOTE 3
.228 – .244
(5.791 – 6.197)
.030 ±.005
TYP
1
3
4
2
RECOMMENDED SOLDER PAD LAYOUT
.010 – .020
(0.254 – 0.508)
× 45°
.053 – .069
(1.346 – 1.752)
.004 – .010
(0.101 – 0.254)
.008 – .010
(0.203 – 0.254)
0°– 8° TYP
.016 – .050
(0.406 – 1.270)
.050
(1.270)
BSC
.014 – .019
(0.355 – 0.483)
TYP
NOTE:
INCHES
1. DIMENSIONS IN
(MILLIMETERS)
2. DRAWING NOT TO SCALE
3. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm)
SO8 0303
1999fb
22
LT1999-10/LT1999-20/
LT1999-50
revision hisTory
REV
DATE
5/11
3/12
DESCRIPTION
PAGE NUMBER
A
Revised +IN and –IN pin descriptions in Pin Functions section
12
B
Revised Voltage Output Swing Low specification (V ) under a loaded condition of 1kΩ to mid-supply.
4, 6
16
OUT
Updated Figure 4 to multicolor.
1999fb
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
23
LT1999-10/LT1999-20/
LT1999-50
Typical applicaTion
Battery Charge Current and Load Current Monitor
VOUT = 0.25V/A, Maximum Measured Current 9.5A
0.025Ω
CHARGER
BAT
42V
5V
+
V
LT1999-10
LOAD
+
5V
V
2µA
0.1µF
1
2
8
7
V
V
SHDN
SHDN
0.1µF
10µF
40k
+
–
4k
V
V
+IN
–IN
–
+
OUT
+
V
V
REF
CS
V
CC
+IN
0.8k
0.8k
+
+
V
V
LTC2433-1
SCK
SDO
OUT
160k
160k
4k
3
4
V
REF
6
5
–
–IN
+
V
5V
0.1µF
1999 TA02
0.1µF
relaTeD parTs
PART NUMBER DESCRIPTION
COMMENTS
LT1787/
Precision, Bidirectional High Side Current Sense Amplifier
Gain-Selectable High Side Current Sense Amplifier
High Voltage High Side Current Sense Amplifier
Zero Drift High Side Current Sense Amplifier
2.7V to 60V Operation, 75μV Offset, 60μA Current Draw
LT1787HV
LT6100
4.1V to 48V Operation, Pin-Selectable Gain:
10V/V, 12.5V/V, 20V/V, 25V/V, 40V/V, 50V/V
LTC6101/
LTC6101HV
4V to 60V/5V to 100V Operation, External Resistor Set Gain, SOT23
LTC6102/
LTC6102HV
4V to 60V/5V to 100V Operation, 10μV Offset, 1μs Step Response,
MSOP8/DFN Packages
LTC6103
LTC6104
LT6106
LT6105
LTC4150
LT1990
LT1991
Dual High Side Precision Current Sense Amplifier
Bidirectional, High Side Current Sense
4V to 60V, Gain Configurable, 8-Pin MSOP Package
4V to 60V, Gain Configurable, 8-Pin MSOP Package
2.7V to 36V, Gain Configurable, SOT23 Package
–0.3 to 44V, Gain Configurable, 8-Pin MSOP Package
Indicates Charge Quantity and Polarity
Low Cost, High Side Precision Current Sense Amplifier
Precision, Extended Input Range Current Sense Amplifier
Coulomb Counter/Battery Gas Gauge
Precision, 100μA Gain Selectable Amplifier
250V Input Range Difference Amplifier
2.7V to 36V Operation, CMRR > 70dB, Input Voltage = 250V
2.7V to 36V Operation, 50μV Offset, CMRR > 75B, Input Voltage = 60V
0.4V/μs Slew Rate, 230μA per Amplifier
LT1637/LT1638 1.1/1.2MHz, 0.4V/μs Over-The-Top, Rail-to-Rail Input and
Output Amplifier
1999fb
LT 0312 REV B • PRINTED IN USA
LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
24
l
l
LINEAR TECHNOLOGY CORPORATION 2010
(408) 432-1900 FAX: (408) 434-0507 www.linear.com
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