LTC4216IMS#PBF [Linear]

LTC4216 - Ultralow Voltage Hot Swap Controller; Package: MSOP; Pins: 10; Temperature Range: -40°C to 85°C;
LTC4216IMS#PBF
型号: LTC4216IMS#PBF
厂家: Linear    Linear
描述:

LTC4216 - Ultralow Voltage Hot Swap Controller; Package: MSOP; Pins: 10; Temperature Range: -40°C to 85°C

光电二极管
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中文:  中文翻译
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LTC4216  
Ultralow Voltage  
Hot Swap Controller  
FeaTures  
DescripTion  
®
n
Allows Safe Board Insertion and Removal from  
TheLTC 4216isapositivelowvoltageHotSwap controller  
thatallowsaboardtobesafelyinsertedandremovedfrom  
a live backplane. It controls load voltages ranging from  
0V to 6V and isolates a severe fault with instantaneous  
analog current limiting.  
a Live Backplane  
n
Controls Load Voltages from 0V to 6V  
n
Fast Response Limits Peak Fault Current  
Adjustable Analog Current Limit  
n
n
Adjustable Soft-Start with Inrush Current Limiting  
An internal high side switch driver controls the gate of  
an external N-channel MOSFET. An adjustable soft-start  
limits the rate of change of the inrush current at start-up  
for a large load capacitor. Together with an analog current  
limitamplifier,anelectroniccircuitbreakerwithadjustable  
response time provides dual level overcurrent protection.  
No external gate capacitor is required for the analog cur-  
rent limit loop compensation.  
n
Adjustable Response Time for Overcurrent  
Protection  
n
Low Circuit Breaker Trip Threshold: 25mV  
n
No External Gate Capacitor Required  
n
Internal Charge Pump for N-Channel MOSFET  
n
Adjustable Output Power-Up Rate  
RESET and FAULT Output  
n
n
10-Lead MSOP and 12-Lead (4mm × 3mm) DFN  
Packages  
The FB pin monitors the output supply voltage and signals  
the RESET output pin. An ON pin provides on/off control  
and a FAULT pin indicates the fault status. The LTC4216  
is available in the 10-lead MSOP and 12-lead (4mm ×  
3mm) DFN packages.  
applicaTions  
n
Electronic Circuit Breaker  
n
Live Board Insertion and Removal  
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and  
Hot Swap is a trademark of Linear Technology Corporation. All other trademarks are the  
property of their respective owners.  
n
Industrial High Side Switch/Circuit Breaker  
Optical Networking  
n
Typical applicaTion  
Single Channel 1.8V Hot Swap Controller  
Normal Power-Up  
with Soft-Start  
BACKPLANE  
CONNECTOR  
(FEMALE)  
PCB EDGE  
CONNECTOR  
(MALE)  
V
GATE  
5V/DIV  
V
1.8V  
5A  
0.004Ω  
Si4864DY  
OUT  
LONG  
V
IN  
1.8V  
+
1000µF  
17.4k  
1%  
I
OUT  
2.5A/DIV  
22Ω  
3.3V  
GATE  
SENSEP SENSEN  
LONG  
V
CC  
FB  
V
CC  
3.3V  
10k  
1%  
µP  
LOGIC  
10k 10k  
330nF  
LTC4216  
V
OUT  
1V/DIV  
SHORT  
FAULT  
RESET  
FAULT  
RESET  
ON  
15k  
1%  
20k  
1%  
SS  
FILTER GND  
TIMER  
4216 TA01b  
0.5ms/DIV  
10nF  
10nF  
18nF  
LONG  
4216 TA01  
GND  
4216fa  
1
For more information www.linear.com/LTC4216  
LTC4216  
absoluTe MaxiMuM raTings  
(Note 1)  
Bias Supply Voltage (V )............................– 0.3V to 9V  
Operating Temperature Range  
CC  
Input Voltages  
LTC4216C ................................................ 0°C to 70°C  
LTC4216I .............................................40°C to 85°C  
Storage Temperature Range  
FB, ON, SS, SENSEP, SENSEN .................– 0.3V to 9V  
TIMER, FILTER.............................0.3V to V + 0.3V  
CC  
Output Voltages  
MS.....................................................–65°C to 150°C  
DE......................................................–65°C to 150°C  
Lead Temperature (Soldering, 10sec)  
RESET, FAULT ..........................................0.3V to 9V  
GATE...................................................... 0.3V to 15V  
MS Package......................................................300°C  
pin conFiguraTion  
TOP VIEW  
RESET  
ON  
1
2
3
4
5
6
12 FAULT  
11  
10 SENSEP  
TOP VIEW  
V
CC  
RESET  
ON  
FILTER  
TIMER  
GND  
1
2
3
4
5
10  
9
V
CC  
SENSEP  
SENSEN  
GATE  
FILTER  
TIMER  
SS  
13  
8
9
8
7
SENSEN  
GATE  
FB  
7
6
FB  
MS PACKAGE  
10-LEAD PLASTIC MSOP  
GND  
T
= 125°C, θ = 160°C/W  
JA  
JMAX  
DE PACKAGE  
12-LEAD (4mm × 3mm) PLASTIC DFN  
T
= 125°C, θ = 43°C/W, θ = 4.3°C/W  
JA JC  
JMAX  
EXPOSED PAD (PIN 13) INTERNALLY CONNECTED TO GND  
(PCB CONNECTION OPTIONAL)  
orDer inForMaTion  
LEAD FREE FINISH  
LTC4216CDE#PBF  
LTC4216IDE#PBF  
LTC4216CMS#PBF  
LTC4216IMS#PBF  
TAPE AND REEL  
PART MARKING*  
4216  
PACKAGE DESCRIPTION  
TEMPERATURE RANGE  
0°C to 70°C  
LTC4216CDE#TRPBF  
LTC4216IDE#TRPBF  
LTC4216CMS#TRPBF  
LTC4216IMS#TRPBF  
12-Lead (4mm × 3mm) Plastic DFN  
12-Lead (4mm × 3mm) Plastic DFN  
10-Lead Plastic MSOP  
4216  
–40°C to 85°C  
0°C to 70°C  
LTBKV  
LTBKV  
10-Lead Plastic MSOP  
–40°C to 85°C  
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.  
For more information on lead free part marking, go to: http://www.linear.com/leadfree/  
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/  
The l denotes the specifications which apply over the full operating  
elecTrical characTerisTics  
temperature range, otherwise specifications are at TA = 25°C. VCC = 3.3V, unless otherwise noted. (Note 2)  
SYMBOL  
PARAMETER  
CONDITIONS  
MIN  
2.3  
0
TYP  
MAX  
6
UNITS  
V
l
l
l
l
l
V
V
Bias Supply Range  
CC  
V
Supply Range  
SENSEP  
6
V
SENSEP  
I
CC  
Bias Supply Current  
V
V
= 2V, V = 2V  
1.6  
2.12  
120  
3
mA  
V
ON  
CC  
FB  
V
Bias Supply Undervoltage Lockout  
Rising  
1.97  
50  
2.23  
190  
CC(UVL)  
ΔV  
Bias Supply Undervoltage  
Lockout Hysteresis  
mV  
CC(UVL,HYST)  
4216fa  
2
For more information www.linear.com/LTC4216  
LTC4216  
elecTrical characTerisTics The l denotes the specifications which apply over the full operating  
temperature range, otherwise specifications are at TA = 25°C. VCC = 3.3V, unless otherwise noted. (Note 2)  
SYMBOL  
PARAMETER  
CONDITIONS  
MIN  
TYP  
MAX  
UNITS  
ΔV  
Circuit Breaker Trip Voltage Threshold  
SENSEP  
V
= 0.4V, 3.3V  
22.5  
21.5  
25  
25  
27.5  
28.5  
mV  
mV  
CB(TH)  
SENSEP  
l
l
(V  
– V  
)
SENSEN  
ΔV  
ACL(TH)  
Analog Current Limit Voltage Threshold  
(V – V  
32  
40  
48  
mV  
)
SENSEN  
SENSEP  
l
l
I
I
SENSEP Pin Input Current  
V
V
= V  
= V  
= V = 6V  
20  
70  
250  
20  
µA  
µA  
SENSEP(IN)  
SENSEP  
SENSEP  
SENSEN  
SENSEN  
CC  
= 0V, V = 6V  
–7  
CC  
l
l
SENSEN Pin Input Current  
V
V
= V  
= V  
= V = 6V  
10  
–10  
15  
–15  
µA  
µA  
SENSEN(IN)  
SENSEN  
SENSEN  
SENSEP  
SENSEP  
CC  
= 0V, V = 6V  
–5  
CC  
l
I
I
GATE Pull Up Current  
Gate Drive On, V  
Gate Drive Off, V  
= 0V, V = 2V  
16  
20  
26  
µA  
GATE(UP)  
GATE  
ON  
l
l
l
GATE Pull Down Current  
= 5V, V = 0.6V  
100  
1
15  
600  
5
50  
1500  
20  
100  
µA  
mA  
mA  
GATE(DN)  
GATE  
ON  
GATE  
V
V
- V  
- V  
= 55mV, V  
= 5V  
= 5V  
SENSEP  
SENSEP  
SENSEN  
SENSEN  
= 100mV, V  
GATE  
l
l
External N-Channel Gate Drive  
2.3V ≤ V < 3V  
4.0  
4.5  
5.0  
6.2  
7.9  
7.9  
V
V
ΔV  
GATE  
CC  
(V  
– V  
)
3V ≤ V ≤ 6V  
CC  
GATE  
SENSEN  
l
l
l
V
V
V
GATE Pin Threshold Voltage  
SS Pin Clamp Voltage  
SS Pin Threshold Voltage  
SS Pull Up Current  
V
Falling  
GATE  
0.15  
1.3  
0.2  
1.65  
0.2  
0.3  
2.0  
V
V
V
GATE(TH)  
SS(CLP)  
SS(TH)  
After End of SS Timing Cycle  
V
Falling  
0.15  
0.35  
SS  
l
l
I
V
V
= 2V, V = 1.2V, V = 2V  
–7  
–0.3  
10  
–1  
13  
–2  
µA  
µA  
SS(UP)  
ON  
ON  
SS  
FB  
= 2V, V = 0V  
FB  
I
SS Pull Down Current  
V
V
= 0V, V = 2V  
8
0.602  
0.2  
3
mA  
V
SS(DN)  
ON  
FB  
SS  
l
l
V
FB Pin Threshold Voltage  
FB Pin Threshold Line Regulation  
FB Pin Hysteresis  
Falling  
0.593  
0.611  
3
FB(TH)  
2.3V ≤ V ≤ 6V  
mV  
mV  
µA  
V
ΔV  
ΔV  
CC  
FB(LINEREG)  
FB(HYST)  
l
l
l
l
l
I
FB Pin Input Current  
V
V
= 1.2V, V = 6V  
0
1
0.83  
130  
0.44  
1
FB(IN)  
FB  
CC  
V
ON Pin Threshold Voltage  
ON Pin Hysteresis  
Rising  
0.77  
40  
0.8  
80  
0.4  
0
ON(TH)  
ON  
mV  
V
ΔV  
ON(HYST)  
V
ON Pin Fault Clear Threshold Voltage  
ON Pin Input Current  
V
V
Falling  
0.36  
ON(FC)  
ON  
ON  
I
= 1.2V, V = 6V  
µA  
ON(IN)  
CC  
l
l
V
TIMER Pin Threshold Voltage  
V
V
Rising  
Falling  
1.216  
0.15  
1.253  
0.2  
1.291  
0.35  
V
V
TMR(TH)  
TIMER  
TIMER  
l
I
I
Timer Pull Up Current  
Timer On, V = 2V, V  
= 1V  
= 2V  
1.5  
–2  
8
2.5  
µA  
TMR(UP)  
ON  
TIMER  
Timer Pull Down Current  
FILTER Pin Threshold Voltage  
Timer Off, V = 0V, V  
mA  
TMR(DN)  
ON  
TIMER  
l
l
V
V
FILTER  
V
FILTER  
Rising  
Falling  
1.216  
0.15  
1.253  
0.2  
1.291  
0.35  
V
V
FILT(TH)  
l
l
I
I
Filter Pull Up Current  
V
= 2V, V = 1V, In Fault Mode  
FILTER  
45  
1.5  
60  
75  
3.3  
µA  
FILT(UP)  
ON  
Filter Pull Down Current  
V
V
= 2V, V  
= 0V, V  
= 1V, No Faults  
= 2V, In Reset Mode  
2.4  
8
µA  
mA  
FILT(DN)  
ON  
ON  
FILTER  
FILTER  
l
V
FAULT Pin Threshold Voltage  
FAULT Pin Hysteresis  
V
Falling  
FAULT  
1.216  
–3  
1.253  
10  
1.291  
V
mV  
µA  
V
FAULT(TH)  
ΔV  
FAULT(HYST)  
l
l
I
FAULT Pin Current  
V
= 0V, V = 1.5V  
FAULT  
–5  
–7  
0.4  
10  
FAULT(UP)  
ON  
V
OL  
Output Low Voltage (RESET, FAULT)  
RESET Pin Input Leakage Current  
Circuit Breaker Trip to Gate Discharging  
I
= I = 1.6mA  
FAULT  
0.15  
0
RESET  
I
t
V
= V = 6V  
µA  
RESET(LEAK)  
RESET  
CC  
l
l
(V  
(V  
V
- V  
- V  
CC  
) = Step 0V to 150mV  
) = Step 0V to 30mV,  
1
240  
3
360  
µs  
µs  
CB(TRIP)  
SENSEP  
SENSEP  
SENSEP  
SENSEN  
SENSEN  
120  
= V , FILTER = 10nF to GND  
4216fa  
3
For more information www.linear.com/LTC4216  
LTC4216  
The l denotes the specifications which apply over the full operating  
elecTrical characTerisTics  
temperature range, otherwise specifications are at TA = 25°C. VCC = 3.3V, unless otherwise noted. (Note 2)  
SYMBOL  
PARAMETER  
CONDITIONS  
MIN  
TYP  
10  
MAX  
20  
UNITS  
µs  
l
l
l
t
t
t
FAULT Low to Gate Discharging  
FILTER High to Gate Discharging  
V
V
V
= Step 2V to 0V  
= Step 0V to 2V  
FAULT(EXT)  
FILTER  
FAULT  
20  
40  
µs  
FILTER  
Circuit Breaker Reset Delay Time,  
ON Low to FAULT High  
= Step 2V to 0V  
30  
60  
µs  
RST(ONLO)  
ON  
ON  
ON  
l
t
t
Circuit Breaker Reset Delay Time,  
V
V
= 2V, V = Step 3.3V to 1.8V  
50  
15  
100  
µs  
µs  
RST(VCCLO)  
OFF  
CC  
V
Low to FAULT High  
CC  
Turn-Off Time, ON Low to GATE  
Discharging  
= Step 2V to 0.6V  
Note 1: Stresses beyond those listed under Absolute Maximum Ratings  
may cause permanent damage to the device. Exposure to any Absolute  
Maximum Rating condition for extended periods may affect device  
reliability and lifetime.  
Note 2: All currents into device pins are positive; all currents out of  
the device pins are negative; all voltages are referenced to GND unless  
otherwise specified.  
Typical perForMance characTerisTics Specifications are at TA = 25°C. VCC = 3.3V,  
unless otherwise noted.  
ICC vs VCC  
ICC vs Temperature  
VCC(UVL) vs Temperature  
3.0  
2.5  
2.0  
1.5  
1.0  
0.5  
3.0  
2.5  
2.0  
1.5  
1.0  
0.5  
2.20  
2.15  
2.10  
2.05  
2.00  
1.95  
1.90  
RISING  
V
= 6V  
CC  
V
= 3.3V  
FALLING  
CC  
V
= 2.3V  
CC  
2.5  
3.5  
4.5  
5.5  
2.0  
3.0  
4.0  
(V)  
5.0  
6.0  
–25  
25  
75  
–25  
25  
75  
–50  
0
50  
100 125  
–50  
0
50  
100 125  
V
TEMPERATURE (°C)  
TEMPERATURE (°C)  
CC  
4216 G01  
4216 G02  
4216 G03  
Analog Current Limit Delay vs  
Sense Voltage  
ΔVACL(TH) vs Temperature  
ΔVCB(TH) vs Temperature  
27  
26  
25  
24  
23  
42  
41  
40  
39  
38  
100  
10  
C
= 10nF  
GATE  
V
V
= 0.4V  
= 3.3V  
SENSEP  
1
SENSEP  
0.1  
40  
–25  
25  
75  
–50  
0
50  
100 125  
–25  
25  
75  
160  
–50  
0
50  
100 125  
80  
SENSE VOLTAGE (V  
120  
200  
) (mV)  
SENSEN  
TEMPERATURE (°C)  
TEMPERATURE (°C)  
– V  
SENSEP  
4216 G04  
4216 G05  
4216 G06  
4216fa  
4
For more information www.linear.com/LTC4216  
LTC4216  
Typical perForMance characTerisTics  
VGATE vs VSENSEN  
ΔVGATE vs Temperature  
IGATE(UP) vs Temperature  
14  
12  
10  
8
7.0  
6.5  
6.0  
5.5  
5.0  
4.5  
–22  
–21  
–20  
–19  
–18  
V
= V  
= V  
SENSEN CC  
V
= 6V  
SENSEP  
CC  
V
= 5V  
CC  
V
= 3.3V  
CC  
6
V
CC  
= 2.5V  
4
2
–25  
25  
75  
–25  
25  
75  
–50  
0
50  
100 125  
0
2
3
4
5
6
–50  
0
50  
100 125  
1
V
(V)  
TEMPERATURE (°C)  
TEMPERATURE (°C)  
SENSEN  
4216 G07  
4216 G08  
4216 G09  
VFB(TH) vs Temperature  
V
TMR(TH) vs Temperature  
VON(TH) vs Temperature  
0.611  
1.27  
1.26  
1.25  
1.24  
1.23  
0.90  
0.85  
0.80  
0.75  
0.70  
0.65  
0.60  
0.608  
0.605  
0.602  
0.599  
0.596  
RISING  
RISING  
FALLING  
FALLING  
–25  
25  
75  
–25  
25  
75  
–25  
25  
75  
–50  
0
50  
100 125  
–50  
0
50  
100 125  
–50  
0
50  
100 125  
TEMPERATURE (°C)  
TEMPERATURE (°C)  
TEMPERATURE (°C)  
4216 G10  
4216 G11  
4216 G12  
ITMR(UP) vs Temperature  
VFILT(TH) vs Temperature  
V
SS(CLP) vs Temperature  
–2.2  
–2.1  
–2.0  
–1.9  
–1.8  
1.27  
1.26  
1.25  
1.24  
1.23  
1.9  
1.8  
1.7  
1.6  
1.5  
1.4  
–25  
25  
75  
–50  
0
50  
100 125  
–25  
25  
75  
–25  
25  
75  
–50  
0
50  
100 125  
–50  
0
50  
100 125  
TEMPERATURE (°C)  
TEMPERATURE (°C)  
TEMPERATURE (°C)  
4216 G13  
4216 G14  
4216 G15  
4216fa  
5
For more information www.linear.com/LTC4216  
LTC4216  
Typical perForMance characTerisTics  
IFILT(UP) vs Temperature  
IFILT(DN) vs Temperature  
ISS(UP) vs Temperature  
–70  
–65  
–60  
–55  
–50  
–12  
–10  
–8  
–6  
–4  
–2  
0
2.8  
2.6  
2.4  
2.2  
2.0  
V
= 2V  
FB  
V
= 0V  
50  
FB  
–25  
25  
75  
–25  
25  
75  
–50  
0
50  
100 125  
–50  
0
100 125  
–25  
25  
75  
–50  
0
50  
100 125  
TEMPERATURE (°C)  
TEMPERATURE (°C)  
TEMPERATURE (°C)  
4216 G16  
4216 G18  
4216 G17  
pin FuncTions (DE12/Package/MS Package)  
RESET (Pin 1/Pin 1): Reset or Power-Good Output. Open  
drain output that pulls low if the FB pin voltage falls below  
its threshold (0.6V). During the start-up cycle, the RESET  
pin goes high impedance at the end of the second timing  
cycle after the FB pin goes above the FB threshold. This  
pin requires an external pull-up to a positive supply. If an  
undervoltage lockout condition occurs, the RESET pin  
pulls low and ignores the FB pin voltage.  
from the instant the FB pin voltage exceeds 0.6V. This pin  
sources 2µA pull-up current during ramp up. The timer  
comparator rising threshold is 1.253V.  
SS (Pin 5/Not Available): Soft-Start Control Input. Con-  
nect a capacitor between this pin and ground for soft-start  
during power-up. It controls the GATE ramp up, limiting  
the rate of change of the inrush current when the external  
MOSFET turns on. If soft-start function is not used, leave  
this pin unconnected.  
ON (Pin 2/Pin 2): ON Control Input. A rising edge above  
the ON pin threshold (0.8V) initiates the start-up cycle  
and turns on the external N-channel MOSFET. A falling  
edge below 0.72V (80mV ON pin hysteresis) turns it off.  
If this pin is pulled below 0.4V, following a circuit breaker  
trip, it resets the electronic circuit breaker and fault latch.  
GND (Pin 6/Pin 5): Device Ground.  
FB(Pin7/Pin6):OutputMonitorforResetOutput.Aresis-  
tive divider from the external MOSFET’s source terminal is  
tied to this pin. When the voltage at this pin drops below  
0.6V, the RESET pin pulls low. The FB comparator falling  
threshold is 0.602V.  
FILTER(Pin3/Pin3):FaultFilterInput.Connectacapacitor  
between this pin and ground to set up the fault filter delay.  
This pin sources 60µA or sinks 2.4µA when the voltage  
across the sense resistor exceeds 25mV or drops below  
25mV respectively. The filter comparator rising threshold  
is 1.253V.  
GATE (Pin 8/Pin 7): Gate Drive for External N-Channel  
MOSFET. An internal charge pump provides 20µA gate  
pull-upcurrentandsufficientgateoverdrivetotheexternal  
MOSFET. An internal shunt regulator limits the GATE pin  
voltage to about 6.2V (typ) above the SENSEN pin voltage.  
TIMER (Pin 4/Pin 4): Timer Input. Connect a capacitor  
between this pin and ground to set up the start-up timing  
cycleduration.ItalsodefinestheRESETpower-gooddelay  
SENSEN (Pin 9/Pin 8): Circuit Breaker Negative Sense  
Input. Connectthispintothesenseresistorterminalwired  
to the drain of the external N-channel MOSFET. The sense  
4216fa  
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LTC4216  
pin FuncTions (DE12/Package/MS Package)  
resistor is placed in the power path between SENSEP and  
SENSEN pins to sense the output current. The electronic  
circuitbreakertripsifthevoltageacrossthesenseresistor  
exceeds 25mV for more than a fault filter delay.  
FAULT (Pin 12/Not Available): Fault Input and Output. As  
an input, driving this pin low (<1.253V) will latch-off the  
device to fault mode. As an output, it is either pulled high  
by an internal 5µA pull-up or an external pull-up resistor  
to positive supply under normal operating condition. It  
pulls low when the circuit breaker is tripped due to an  
overcurrent fault.  
SENSEP (Pin 10/Pin 9): Circuit Breaker Positive Sense  
Input. Connect this pin to the sense resistor terminal  
wired to the positive supply input for the external output  
load. This positive supply range extends from 0V to 6V.  
Exposed Pad (Pin 13/Not Available): Exposed pad may  
be left open or connected to device ground.  
V (Pin11/Pin10):BiasSupplyInput.Operatesfrom2.3V  
CC  
to 6V. An internal undervoltage lockout circuit disables  
the device until the input supply voltage at V exceeds  
CC  
2.12V typically.  
4216fa  
7
For more information www.linear.com/LTC4216  
LTC4216  
block DiagraM  
V
SENSEP  
SENSEN  
GATE  
CC  
CHARGE  
PUMP  
D1  
Z1  
+
+
2.12V  
25mV  
40mV  
V
V
CC  
CC  
20µA  
+
+
+
10µA  
1µA  
M1  
UVLO  
ECB  
ACL  
M3  
M2  
100µA  
M5  
SS**  
M4  
V
CC  
6µs  
DELAY  
FILTER DELAY  
(SEE NOTE 1)  
M6  
2µA  
R1  
GATE  
OFF  
CB TRIPS  
OR UVLO  
OUT OF UVLO  
FAULT LATCH-OFF  
0.2V  
+
GATE ON  
CP4  
CP5  
TIMER  
GATE OFF  
RESET  
V
+
CC  
LOGIC  
M7  
DEVICE RESET, UVLO  
OR POWER BAD  
M9  
5µA  
1.253V  
V
CC  
NORMAL  
1.253V  
+
60µA  
D2  
CP7  
DEVICE  
RESET  
FAULT LATCH  
RESET  
GATE  
ON  
CB  
TRIPS  
FAULT**  
FILTER  
FUNCTION OF  
OVERDRIVE  
30µs  
DELAY  
3µs  
DELAY  
+
FILTER  
M8  
CP6  
1.253V  
CP1  
CP2  
CP3  
M10  
2.4µA  
+
+
+
GND  
0.4V  
0.8V  
0.6V  
4216 BD  
NOTE 1: FILTER DELAY IS SET BY FILTER PIN CAPACITOR  
** ONLY AVAILABLE IN THE DE12 PACKAGE  
ON  
FB  
operaTion  
The LTC4216 is a Hot Swap controller residing either on a  
removable circuit board or on the backplane. It monitors  
thecurrentandprotectstheloadwithanexternalN-channel  
MOSFET and a current sensing resistor (see Figures 14  
to18).Bothinrushcurrentlimitingandshort-circuitprotec-  
tion are provided by the LTC4216. The device is powered  
up at the SS pin, controlling the rate of GATE ramp. This  
limits the rate of change of the inrush current flowing into  
the output load capacitance. RESET pin goes high after  
the second timing cycle when the FB pin voltage exceeds  
0.6V and its hysteresis.  
When the external MOSFET is fully turned on, the output  
will ramp to load supply voltage if the inrush into the load  
capacitance is low. However, if the inrush current exceeds  
via the bias supply input (V ) and it has a separate sense  
CC  
pin, SENSEP, to monitor the load supply (V ). The load  
IN  
supply can extend from 0V to 6V, with a minimum bias  
supply voltage of 2.3V.  
theanalogcurrentlimitofΔV  
/R  
, theLTC4216  
ACL(TH) SENSE  
will ramp the output by sourcing the limited current into  
the load capacitance.  
When the ON pin is pulled from low to high, TIMER begins  
the first timing cycle by sourcing 2µA into C1 once these  
conditions are met: bias supply voltage out of undervolt-  
age lockout (> 2.12V); TIMER, SS, FILTER and GATE  
pin voltages < 0.2V. When the C1 voltage rises above  
the TIMER pin threshold (1.253V), TIMER pulls low and  
releases both the SS and GATE pins. C2 starts to ramp  
The LTC4216 provides protection against output short-  
circuits or current overload through an internal electronic  
circuit breaker with trip threshold of 25mV and an analog  
current limit circuit. The circuit breaker response time is  
set by C3 at the FILTER pin.  
4216fa  
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LTC4216  
applicaTions inForMaTion  
2. Reset the device if the ON pin voltage < 0.4V for more  
than 30µs after a circuit breaker trip.  
Hot Circuit Insertion  
When circuit boards are inserted into a live backplane, the  
supply bypass capacitors can draw huge transient current  
from the power bus as they charge. Potentially, the flow  
of current could damage the connector pins and glitch  
the power bus, causing other boards in the system to  
reset. The LTC4216 is designed to turn on or off a circuit  
board supply in a controlled manner, allowing insertion  
or removal without glitches or connector damage.  
There are various methods of setting the ON pin  
voltage:  
1. Tie the ON pin to the load supply (V ) through a 10k  
IN  
pull-up resistor.  
2. Drive the ON pin with an ON/OFF logic signal from the  
system controller.  
3. Connect an external resistive divider at the ON pin.  
This divider can be used to set a higher value for the load  
Overview of LTC4216 Features  
supply undervoltage lockout voltage than the internal V  
1. Allows safe board insertion and removal from a live  
backplane.  
CC  
undervoltage lockout circuit.  
For example, as shown in Figure 17, if both V and  
2. Controls load voltages from 0V to 6V.  
CC  
SENSEP pins are connected to a 5V load supply, choosing  
the resistive divider values, R1 = 20k, R2 = 80.6k, turns on  
the device when the load supply voltage reaches around  
80% of its final value.  
3. High side gate drive for external N-channel MOSFET.  
4. Adjustable soft-start with inrush current limiting for  
large load capacitor during start-up.  
5. Adjustable analog current limit (ACL) with circuit  
breaker fault time-out during an overcurrent fault condi-  
tion. No external gate capacitor is required for the ACL  
loop compensation.  
V
Undervoltage Lockout  
CC  
Ahystereticcomparator,UVLO,monitorsbiassupply(V )  
CC  
CC(UVL)  
(120mV).When  
for undervoltage. The thresholds are defined by V  
(2.12V)anditshysteresis,ΔV  
CC(UVL,HYST)  
6. Electronic circuit breaker tripping at 25mV across the  
sense resistor. The response time is adjustable through  
an external capacitor at the FILTER pin.  
V
V
rises above V  
, the device is enabled. When  
CC  
CC  
CC(UVL)  
falls below (V  
ΔV  
), the device is  
CC(UVL)  
CC(UVL,HYST)  
disabled and GATE is pulled low. If V cycles below this  
CC  
7.ProvidesanONpintoturnonandoffthedevice.Thiscan  
also be used to reset the device after a circuit breaker trip.  
threshold for more than 200µs, following a circuit breaker  
trip, it clears the fault latch. Any bias supply glitches that  
lastlessthan1swillberejectedbytheUVLOglitchfilter.  
8. Provides output supply voltage monitoring through the  
FB pin and signals the RESET pin output.  
Timer  
9. Provides fault status output.  
An external capacitor, C1, is used at TIMER pin to provide  
two timing cycles for the LTC4216. The first timing cycle  
is the debounce cycle when the ON pin is first turned on,  
both the GATE and SS pins are held low and any short-  
circuit faults are ignored by the electronic circuit breaker.  
Second timing cycle is the power-good delay before the  
RESET pin goes high when the FB pin voltage exceeds  
0.6V and its hysteresis.  
ON Control  
The ON pin has two hysteretic comparators with differ-  
ent threshold levels (0.8V and 0.4V) and they serve two  
purposes:  
1. Turn on the device if the ON pin voltage > 0.8V for more  
than 6µs and turn it off if the ON pin voltage < 0.72V for  
more than 15µs.  
The TIMER pin sources 2µA into C1 during the two timing  
cycles and is then pulled low by an internal N-channel  
4216fa  
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LTC4216  
applicaTions inForMaTion  
switch when the TIMER pin voltage exceeds its threshold.  
FB pin voltage rises above 0.6V, the FB comparator output  
goes low and a new timing cycle starts. After a complete  
timing cycle at time point 6, RESET is pulled high by the  
external pull-up resistor, R5. The timer period given by  
Equation (1) sets the power-good delay for RESET going  
high. If the FB pin voltage stays above 0.6V for less than  
a timing cycle at time point 4, the RESET output remains  
low. Any overcurrent fault detected by the electronic cir-  
cuit breaker or FAULT pin driven low externally during the  
timing cycle, will also pull the TIMER pin low and RESET  
output remains low.  
The timer period for C1 to charge up to the TIMER pin  
threshold, V  
(1.253V), is given by:  
TMR(TH)  
1.253V C1  
2µA  
tTIMER  
=
(1)  
For example, if C1 = 10nF, t  
= 6.2ms.  
TIMER  
FB Glitch Filtering  
The FB pin is used to monitor the output voltage of the  
external MOSFET through a resistive divider. Any tran-  
sients on the FB pin due to the output low spikes will  
pull RESET low. To prevent RESET from generating an  
unwanted system reset, the FB comparator has a glitch  
filter to ride out these glitches. The filter time is 20µs for  
large transients (greater than 150mV) and up to 100µs  
for small transients. The relationship between glitch filter  
time and the FB pin transient voltage or FB overdrive is  
shown in Figure 1.  
Whenthedeviceentersanundervoltagelockoutcondition  
or the ON pin voltage drops below 0.4V, RESET is pulled  
low, ignoring the FB pin voltage.  
R
SENSE  
M1  
V
V
IN  
OUT  
+
C
LOAD  
R4  
R3  
SENSEP SENSEN  
GATE  
+
FB  
V
CC  
R5  
ON  
LOGIC  
140  
T
= 25°C  
A
120  
+
TIMER  
0.6V  
100  
80  
60  
40  
20  
0
µP  
RESET  
RESET  
M2  
TIMER  
C1  
LTC4216**  
**ADDITIONAL DETAILS  
OMITTED FOR CLARITY  
4216 F02  
40  
80  
FB OVERDRIVE (mV)  
200  
0
120  
160  
Figure 2. Output Voltage Monitor Block Diagram  
4216 F01  
Figure 1. FB Comparator Glitch Filter Time vs FB Overdrive  
1 2  
3
4
5
6
Output Voltage Monitor  
V
V
FB < 0.6V  
V
FB < 0.6V  
V
FB > 0.6V  
OUT  
V
FB > 0.6V  
2µA  
As shown in Figure 2, the output voltage is monitored  
through a resistive divider, R3 and R4, connected at the  
FB pin, and a FB comparator with 0.6V threshold.  
V
TMR(TH)  
2µA  
TIMER  
POWER-GOOD  
DELAY  
The normal operation of the output voltage monitor after a  
start-upcycleisshowninFigure3.Attimepoint1,whenthe  
FB pin voltage falls below 0.6V, the FB comparator output  
goes high. RESET is pulled low by an internal N-channel  
switch after a glitch filter delay at time point 2. When the  
RESET  
GLITCH FILTER DELAY  
4216 F03  
Figure 3. Output Voltage Monitor  
Waveforms in Normal Operation  
4216fa  
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LTC4216  
applicaTions inForMaTion  
Electronic Circuit Breaker  
t
1.253  
(60D)– 2.4  
(s/µF) =  
C3  
TheLTC4216featuresanelectroniccircuitbreakerfunction  
thatprotectstheexternalMOSFETagainstshort-circuitsor  
excessiveloadcurrentconditionsonthesupply.Anexternal  
sense resistor connected between SENSEP and SENSEN  
pins is used to measure the load current. If the voltage  
across the sense resistor exceeds the circuit breaker trip  
threshold of 25mV for more than a fault filter delay, the  
gate of the MOSFET is pulled low, turning it off.  
(3)  
Following a circuit breaker trip, the device is latched-off  
and FAULT is pulled low until the fault latch is cleared by  
pulling the ON pin low (< 0.4V) for at least 100µs. The  
FILTER pin is pulled low by an internal N-channel switch  
to discharge the capacitor quickly when the ON pin volt-  
age falls below 0.4V and pulls down with 2.4µA when the  
ON pin voltage rises above 0.8V to initiate a new start-up  
cycle. The new timing cycle will not start until the FILTER  
pin voltage is below 0.2V. The electronic circuit breaker  
is disabled during the first timing cycle upon start-up and  
any short-circuit faults will be ignored.  
The fault filter delay is determined by a capacitor, C3, con-  
nected between the FILTER pin and ground as in Equation  
(2).TheFILTERpinsources6Apull-upcurrentwhenthe  
sense voltage across the sense resistor exceeds 25mV.  
Otherwise, it pulls down with 2.4µA. When the FILTER  
pin voltage exceeds V  
threshold (1.253V), there  
FILT(TH)  
A
B
CIRCUIT BREAKER TRIPS  
is an internal 20µs delay before the GATE pulls low and  
the FAULT pin will be pulled low. If no FILTER capacitor  
is used, the filter fault delay defaults to 20µs. The circuit  
breaker response time or fault filter delay with the FILTER  
capacitor, C3, is given by:  
1.253V  
V
FILTER  
2.4µA  
60µA  
NORMAL FAULT  
4216 F04  
MODE  
MODE  
1.253V C3  
tCB(TRIP)  
=
+ 20µs  
Figure 4. A Continuous Fault Timing  
60µA  
(2)  
The FILTER capacitor, C3, should be chosen so that the  
fault filter delay is not too short to trip the circuit breaker  
as the MOSFET current charges up a large output load  
capacitance in analog current limit during power-up. It  
also should not be too long to exceed the safe operating  
area (SOA) of the external MOSFET.  
A1  
B1  
A2  
B2  
A3  
B3  
25mV/R  
SENSE  
I
LOAD  
2.4µA  
1.253V  
60µA  
CIRCUIT  
BREAKER  
TRIPS  
Intermittent overloads may exceed the current limit as in  
Figure5, butifthedurationissufficientlyshort, theFILTER  
60µA  
60µA  
2.4µA  
pin voltage may not reach the V  
threshold and the  
FILT(TH)  
2.4µA  
V
FILTER  
devicewillnotshutoff. To handlethissituation, theFILTER  
discharges with 2.4µA whenever voltage across the sense  
resistor is below 25mV. Any intermittent overload with  
an aggregate duty cycle of more than 4% will eventually  
trip the circuit breaker. Figure 6 shows the circuit breaker  
response time in seconds normalized to 1µF as given by  
Equation (3). The asymmetric charging and discharging  
of FILTER is a fair gauge of MOSFET heating.  
V
GATE  
CB  
CB  
CB  
FAULT  
FAULT  
FAULT  
Figure 5. Multiple Intermittent Overcurrent Condition  
4216fa  
11  
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LTC4216  
applicaTions inForMaTion  
1
If the voltage across the sense resistor is greater than  
ΔV during an overload condition, the ACL amplifier  
t/C3(s/µF) = 1.253/[(60 • D) – 2.4]  
ACL(TH)  
will servo GATE downwards in an attempt to control the  
MOSFET current. Since the GATE pin voltage overdrives  
the MOSFET in normal operation, the ACL amplifier needs  
timetodischargetheGATEtothethresholdoftheMOSFET  
for gate regulation. For mild overload, the ACL amplifier  
can control the MOSFET current, but in the event of a  
severe overload, the MOSFET current may overshoot as  
the MOSFET has large GATE overdrive initially. The GATE  
isquicklydischargedtogroundfollowedbytheACLampli-  
fier taking control. For applications that require very fast  
analogcurrentlimitrecoveryfromtheGATEundershootas  
0.1  
0.01  
0
20  
40  
60  
80  
100  
OVERLOAD DUTY CYCLE, D (%)  
4216 F06  
Figure 6. Circuit Breaker Filter  
Response for Intermittent Overload  
it discharges, connect a series resistor, R , with an exter-  
Z
nal capacitor, C , at the GATE pin as shown in Figure 17.  
Z
The value of R should be between 10Ω and 100Ω for  
Z
Analog Current Limiting  
optimum performance.  
In addition to an electronic circuit breaker, the LTC4216  
has included a novel analog current limit (ACL) amplifier  
that does not require an external compensation capacitor  
at the GATE pin. The amplifier’s stability is compensated  
Soft-Start  
The LTC4216 features a soft-start function that controls  
the di/dt of the inrush current during power-up. As large  
output load capacitors are commonly used in low voltage  
applications, the normal inrush can be large enough to  
glitch the load supply. With the soft-start function, the  
gate of the external MOSFET is allowed to turn on very  
gradually to control the inrush current flowing into the  
load capacitor without causing a supply glitch.  
by the large gate input capacitance (C ) of the external  
ISS  
MOSFET used. These MOSFETs usually have C ≥ 1nF.  
ISS  
However, if the MOSFET’s gate input capacitance (C  
)
ISS  
is too small for loop stability, then connect an external  
capacitor between the GATE pin and ground to increase  
the total gate capacitance to ≥ 1nF. As given by Equation  
(4), the MOSFET current, I , is limited to the analog  
ACL  
With an external capacitor, C2, connected between the SS  
pin and ground, the GATE is servoed by the ACL amplifier  
to track the rate of SS ramp-up during power-up. There  
are two slopes in the SS ramp-up profile: 10µA current  
source pull-up for a normal ramp rate; and 1µA current  
source pull-up for a slower ramp rate. Both the SS ramp  
rates are given as follows:  
current limit voltage, ΔV  
the sense resistor, R  
and SENSEN pins.  
, 40mV typical, across  
ACL(TH)  
SENSE  
, connected between SENSEP  
VACL(TH)  
RSENSE  
IACL  
=
(4)  
The ΔV  
threshold is 1.6 times higher than the  
ACL(TH)  
dVSS(NOM)  
dt  
10µA  
C2  
ΔV  
threshold(25mVtypical)toprovideduallevelcur-  
CB(TH)  
Normal SS Ramp Rate:  
Slower SS Ramp Rate:  
=
rent sensing. When the ACL amplifier servos the MOSFET  
current at ΔV across the sense resistor, it exceeds  
(5)  
(6)  
ACL(TH)  
dVSS(SLOW)  
1µA  
C2  
ΔV  
threshold causing the FILTER pin to charge C3  
CB(TH)  
=
dt  
with 60µA pull-up. If the condition persists long enough  
for C3 to reach the V  
pulled low and FAULT latched low.  
threshold (1.253V), GATE is  
FILT(TH)  
4216fa  
12  
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LTC4216  
applicaTions inForMaTion  
ratebyconnectinganexternalcapacitor,C4,fromtheGATE  
pin to ground, as shown in Figure 7. An external resistor,  
G
dVSS(NOM)  
For example, if C2 = 10nF,  
= 1V/ms and  
dt  
R , of 10Ω prevents high frequency self-oscillations in  
dVSS(SLOW)  
= 0.1V/ms.  
dt  
the MOSFET. The GATE slew rate is given by:  
dVGATE  
dt  
20µA  
C4 + CGATE  
=
After the initial timing cycle, the SS capacitor is charged  
by a 10µA current source pull-up and GATE is held low  
by the ACL amplifier. As SS ramps up, the ACL amplifier  
releases the GATE when it crosses its input offset volt-  
age. At this instant, SS switches the pull-up current from  
10µA to 1µA for a slower ramp rate. GATE continues to  
charge up with 20µA pull-up before the MOSFET reaches  
its turn-on threshold voltage. When the external MOSFET  
is first turned on, there is always a current step due to the  
high gain of the MOSFET. The slower SS ramp rate allows  
the gate of the external MOSFET to be turned on with a  
smaller inrush current step.  
(7)  
where C  
is the associated parasitic GATE capacitance  
GATE  
duetotheexternalMOSFET’sgateinputcapacitance,C  
.
ISS  
The inrush current flowing into the load capacitor, C  
is limited to:  
,
LOAD  
dVGATE  
dt  
CLOAD  
C4 + CGATE  
IINRUSH = CLOAD  
=
20µA  
(8)  
For example, if C  
= 4700µF, C4 = 33nF and C  
=
GATE  
LOAD  
= 2.5A.  
5nF, I  
INRUSH  
WhentheexternalMOSFETisturnedon,loadcurrentstarts  
to flow through the sense resistor, developing a voltage  
drop across it. This allows the ACL amplifier to servo the  
GATEtothevoltageacrossthesenseresistor,thuscontrol-  
lingtherateofchangeoftheinrushcurrent. Atthisinstant,  
SSswitchesbackfrom1µAto1Acurrentsourcepull-up  
for a normal ramp rate. GATE continues to ramp up as  
the ACL amplifier servos to track the SS ramp rate. At the  
end of SS ramp-up when SS reaches its final value, GATE  
If C  
is very large and I  
exceeds the analog  
INRUSH  
LOAD  
current limit, the GATE is servoed to control the inrush  
current to ΔV /R  
.
ACL(TH) SENSE  
One limitation with this technique is that it slows down  
the system turn-on and turn-off time by adding a capaci-  
tor at the GATE pin. Should this technique be used, C4 ≤  
50nF is recommended. However, having an external gate  
capacitorhelpstoeliminatevoltagespikescoupledthrough  
the MOSFET’s drain-to-gate capacitance to the GATE pin  
when the supply power is first applied.  
is servoed to ΔV  
across the sense resistor. If the  
ACL(TH)  
voltage across the sense resistor drops below ΔV  
ACL(TH)  
due to a falling load current, the ACL amplifier shuts off  
R
M1  
SENSE  
and GATE ramps further by a 20µA pull-up.  
V
V
IN  
OUT  
+
SS is pulled low under any of the following conditions: in  
C
LOAD  
V
undervoltagelockoutcondition,duringthefirsttiming  
R
G
CC  
C4  
cycleorwhenthecircuitbreakerfaulttimesout. Ifthesoft-  
R4  
R3  
start function is not used, leave the SS pin unconnected.  
GATE  
SENSEP SENSEN  
Inrush Control with GATE Capacitor  
FB  
LTC4216**  
Forapplicationsnotrequiringsoft-starttocontrolthedi/dt  
of the inrush current during power-up, an alternative way  
to limit the inrush is to control the GATE pin voltage slew  
**ADDITIONAL DETAILS  
OMITTED FOR CLARITY  
4216 F07  
Figure 7. Inrush Control with External Gate Capacitor  
4216fa  
13  
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LTC4216  
applicaTions inForMaTion  
Normal Power-Up and Power-Down  
WhentheONpinvoltagefallsbelow(V  
ΔV  
)
ON(TH)  
ON(HYST)  
threshold (0.72V), it initiates a power-down sequence. At  
time point 11, GATE is discharged by both the ACL ampli-  
fier and a 100µA current source pull-down, causing the  
output voltage to fall gradually. When the FB pin voltage  
falls below 0.6V at time point 12, RESET goes low after a  
glitch filter delay (see the section on FB glitch filtering),  
indicating that power is bad. When the ON pin voltage falls  
below 0.4V, the device resets and GATE is pulled low by  
a strong pull-down device.  
Figure8illustratesthetimingdiagramforanormalpower-  
up sequence in the case where a printed circuit board is  
inserted into a live backplane.  
At time point 1, the bias supply (V ) ramps up and en-  
CC  
ables the device when the supply voltage rises above the  
undervoltage lockout threshold (2.12V). At time point 2,  
SENSEP supply, together with the ON pin, ramp up and  
start the first timing cycle when the ON pin voltage ex-  
ceeds 0.8V. The TIMER capacitor is allowed to ramp up  
with 2µA pull-up once all these conditions are met: GATE  
< 0.2V, FILTER < 0.2V, TIMER < 0.2V, SS < 0.2V. At time  
Soft-Start with Analog Current Limiting  
When a very large output load capacitor is connected  
during soft-start, the GATE voltage is servoed to regulate  
point 3, TIMER reaches the V  
threshold and the  
TMR(TH)  
firsttimingcycleterminates. Theelectroniccircuitbreaker  
is enabled and TIMER capacitor is quickly discharged. At  
timepoint4checksaremadeforTIMER,GATE,FILTERand  
the inrush current to ΔV  
/R  
. This is illustrated  
ACL(TH) SENSE  
in the timing diagram of Figure 9. After the initial timing  
cycle, the GATE is allowed to ramp up, tracking the SS  
ramp rate between time points 5 and 8. At time point 7,  
when the load current builds up as the GATE pin voltage  
increases,thevoltageacrossthesenseresistorrisesabove  
SS < 0.2V, ΔV  
below 25mV and FAULT high before  
SENSE  
a GATE ramp-up cycle begins. GATE is held low by the  
analog current limit amplifier as SS capacitor ramps up  
with a 10µA current source. SS switches to 1µA pull-up  
for a slower ramp rate when it crosses the input offset  
voltage of the ACL amplifier. At this time point, the ACL  
amplifier releases the GATE and allows it to ramp up with  
a 20µA pull-up. At time point 6, when the GATE voltage  
reaches the turn-on threshold of the external MOSFET,  
currentbeginsflowingintotheloadcapacitor.TheMOSFET  
current level at this time point is controlled by the ACL  
amplifier and the GATE ramp is slowed down. SS switches  
the pull-up current from 1µA to 10µA for a normal ramp  
rate.Betweentimepoints6and7,theACLamplifierservos  
the GATE voltage to track the SS ramp rate, limiting the  
slew rate of the load current. At time point 7, SS reaches  
its final value and GATE continue to ramp up with the 20µA  
pull-up if the load current is not in analog current limit.  
At time point 8, the FB pin voltage exceeds 0.6V and the  
second timing cycle is started. When the conditions of  
ΔV  
(25mV typical). The FILTER capacitor starts to  
CB(TH)  
charge up by a 60µA current source pull-up. At time point  
8, SS reaches its final value at the end of SS ramp cycle.  
This allows the GATE to be regulated by the ACL amplifier  
at ΔV  
SENSE  
(40mV typical) across the sense resistor,  
ACL(TH)  
, limiting the inrush to:  
R
40mV  
RSENSE  
ILIMIT  
=
(9)  
The FILTER pin voltage continues to rise as the load ca-  
pacitor charges up with the limited load current. At time  
point 9, the FB pin voltage exceeds 0.6V, but the second  
timing cycle is not allowed to start as the voltage across  
thesenseresistorexceeds25mV.Attimepoint10,theload  
current falls as the load capacitor is near full charge and  
the voltage across the sense resistor drops below 40mV.  
TheanalogcurrentlimitloopshutsoffandtheGATEramps  
further till its final value. The FILTER capacitor discharges  
by a 2.4µA pull-down when the voltage across the sense  
resistor falls below 25mV at time point 11. The duration  
between time points 7 and 11 must be shorter than one  
circuit breaker delay, as given by Equation (2), to avoid  
a fault time-out during GATE ramp-up for very large load  
TIMER < 0.2V, ΔV  
< 25mV and FAULT high are met,  
SENSE  
the TIMER capacitor is allowed to ramp up. When TIMER  
reaches the V threshold at time point 9, RESET  
TMR(TH)  
goes high, indicating to the system controller that power  
is good. After this, the TIMER is held low.  
4216fa  
14  
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capacitors. A second timing cycle starts at time point 11  
when the FB pin voltage exceeds 0.6V and the voltage  
across the sense resistor drops below 25mV.RESET goes  
high at the end of the second timing cycle (time point 12)  
when TIMER reaches the V  
threshold.  
TMR(TH)  
RESET PULLED LOW  
DUE TO POWER BAD  
ON GOES LOW  
ELECTRONIC CIRCUIT  
BREAKER ARMED  
CHECK FOR GATE, FILTER,  
TIMER, SS < 0.2V AND FAULT HIGH  
CHECK FOR GATE,  
FILTER, TIMER,  
SS < 0.2V  
IN  
RESET  
MODE  
START 2ND TIMING CYCLE  
START  
GATE  
RAMP  
(CHECK TIMER < 0.2V AND  
)
FAULT HIGH  
RESET GOES HIGH  
1 2  
3
4
5
6
7 8  
9
10 11 12  
13  
V
CC  
SENSEP  
0.72V  
0.8V  
ON  
0.4V  
V
V
TMR(TH)  
TMR(TH)  
TIMER  
2µA  
2µA  
10µA  
1µA  
SS  
10µA  
20µA  
TRACKS SS RAMP  
– V ) > V  
GATE  
(V  
GATE  
OUT  
GS(TH)  
POWER BAD  
FB  
POWER GOOD  
> 0.6V  
V
OUT  
V
< 0.6V  
V
FB  
RESET  
4216 F08  
PLUG-IN CYCLE  
FIRST TIMING CYCLE  
POWER-GOOD DELAY  
SECOND TIMING CYCLE  
Figure 8. Normal Power-Up/Power-Down Sequence  
4216fa  
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FILTER RAMPS UP WHEN (V  
– V  
) > 25mV  
SENSEN  
OUTPUT IN ANALOG CURRENT LIMIT,  
(V – V ) = 40mV  
SENSEP  
SENSEP  
SENSEN  
CHECK FOR GATE, FILTER, TIMER, SS < 0.2V AND FAULT HIGH  
RESET PULLED LOW  
2ND TIMING CYCLE CANNOT START WITH  
OUTPUT IN ANALOG CURRENT LIMIT  
DUE TO POWER BAD  
ELECTRONIC CIRCUIT BREAKER ARMED  
CHECK FOR GATE,  
FILTER, TIMER,  
SS < 0.2V  
IN RESET  
MODE  
(ON < 0.4V)  
OUTPUT NO LONGER  
IN CURRENT LIMIT  
RESET  
GOES HIGH  
ON GOES LOW  
(ON < 0.72V)  
1 2  
3
4
5
6
7
8
9 10 11  
12  
13 14 15  
16  
V
CC  
SENSEP  
0.72V  
0.8V  
ON  
0.4V  
V
V
TMR(TH)  
TMR(TH)  
TIMER  
2µA  
2µA  
10µA  
1µA  
SS  
10µA  
IN REGULATION  
TRACKS SS RAMP  
20µA  
GATE  
(V  
GATE  
– V ) > V  
OUT  
GS(TH)  
POWER GOOD  
FB  
POWER BAD  
FB  
V
> 0.6V  
V
V
< 0.6V  
OUT  
LOAD CURRENT REGULATING  
AT 40mV/R  
SENSE  
I
LOAD  
(V  
– V  
) > 25mV  
SENSEN  
(V  
SENSEP  
– V  
) < 25mV  
SENSEN  
SENSEP  
V
60µA  
FILT(TH)  
2.4µA  
FILTER  
RESET  
4216 F09  
PLUG-IN CYCLE  
FIRST TIMING CYCLE  
POWER-GOOD DELAY  
SECOND TIMING CYCLE  
Figure 9. Normal Power-Up Sequence (with Analog Current Limiting)  
4216fa  
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Power-Up into an Output-Short  
Sense Resistor Considerations  
The circuit breaker trip threshold of 25mV and the value  
of the sense resistor, R , connected between the  
SENSEPandSENSENpins,determinethetripcurrentlevel  
as given by Equation (10). If the fault current level exceeds  
the analog current limit, the current is limited to a value  
givenbyEquation(11).Shouldtheoverloadconditionexist  
for more than one fault filter delay as given by Equation  
(2), the circuit breaker trips and the device is latched-off.  
Figure 10 shows the timing diagram in the case when the  
output is a dead short during power-up. As GATE ramps  
up at time point 6, the MOSFET current increases due to  
theoutputshortcausingthevoltagedropacrossthesense  
resistor to rise above 25mV. FILTER sources 60µA, charg-  
ing the external capacitor. At time point 7, GATE regulates  
SENSE  
to limit the output current to 40mV/R . If the output  
SENSE  
continues to be in analog current limit when the FILTER  
pin voltage reaches its threshold (1.253V) at time point  
8, the circuit breaker trips and GATE is pulled low. The  
device latches-off and FAULT is pulled low, indicating a  
fault condition. The FILTER capacitor discharges through  
a 2.4µA pull-down until the device resets.  
VCB(TH)  
RSENSE  
25mV  
RSENSE  
ITRIP(CB)  
=
=
(10)  
VACL(TH)  
RSENSE  
40mV  
RSENSE  
IACL  
=
=
(11)  
Resetting the Electronic Circuit Breaker  
For a new circuit design, the sense resistor value is first  
calculatedfromthemaximumoperatingloadcurrentunder  
normal conditions and the minimum circuit breaker trip  
threshold. This is given by:  
When the LTC4216’s electronic circuit breaker is tripped  
during a fault condition, FAULT is asserted low and the  
RESET, SS and GATE pins are all pulled to ground. This is  
shown in the timing diagram of Figure 11. The LTC4216  
remains latched-off until the external fault is cleared. To  
clear the internal fault latch and restart the device, pull  
the ON pin low (< 0.4V) at time point 4 for at least 100µs,  
after which the FAULT will go high at time point 5. Tog-  
gling the ON pin from low to high (> 0.8V) initiates a new  
start-up cycle.  
VCB(TH,MIN)  
ILOAD(MAX)  
21.5mV  
ILOAD(MAX)  
RSENSE  
=
=
(12)  
CIRCUIT BREAKER TRIPS  
AND LATCHED-OFF  
RESET PULLED LOW  
DUE TO POWER BAD  
MILD  
OVERCURRENT  
FAULT LATCH  
RESET  
1
2 3  
4
5
1
2 3 4 5 6 7  
8
ON  
SS  
0.4V  
0.8V  
ON  
SS  
10µA  
1µA  
10µA  
GATE  
REGULATING  
FPD  
FPD  
TRACKS SS RAMP  
– V < V  
GATE  
GATE  
V
GATE  
OUT  
GS(TH)  
V
OUT  
40mV  
POWER BAD  
V < 0.6V  
FB  
V
OUT  
25mV  
SENSEP-SENSEN  
TIMER  
<40mV  
25mV  
V
TMR(TH)  
SENSEP-SENSEN  
FILTER  
2µA  
V
2.4µA  
FILT(TH)  
V
FILT(TH)  
2.4µA  
60µA  
FILTER  
60µA  
FAULT  
FILTER  
DELAY  
FAULT  
RESET  
FAULT  
RESET  
t
RST(ONLO)  
4216 F10  
4216 F11  
Figure 10. Power-Up into an Output-Short and  
Circuit Breaker Trips  
Figure 11. Mild Overcurrent Circuit Breaker Trips Followed by  
Device Reset  
4216fa  
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where  
RSENSE(MAX) = RSENSE(TYP) 1+  
For example, if I  
= 5A, R  
= 4.3mΩ. The  
LOAD(MAX)  
nearest standard value is 4mΩ.  
SENSE  
R
100  
TOL   
For proper circuit breaker operation, kelvin-sense PCB  
connectionsbetweenthesenseresistorandtheLTC4216’s  
SENSEP and SENSEN pins are strongly recommended.  
Figure12illustratesthecorrectwayofmakingconnections  
between the LTC4216 and the sense resistor. PCB layout  
should be balanced and symmetrical to minimize wiring  
errors. In addition, the PCB layout for the sense resistor  
should include good thermal management techniques for  
optimal sense resistor power dissipation.  
The maximum load current that trips the circuit breaker  
is given by:  
VCB(TH,MAX)  
RSENSE(MIN)  
28.5mV  
RSENSE(MIN)  
ITRIP(MAX)  
where  
=
=
(15)  
The power rating of the sense resistor should accom-  
modate the fault current level during analog current limit  
so that the component is not damaged before the circuit  
breaker trips.  
R
100  
TOL   
RSENSE(MIN) = RSENSE(TYP) 1–  
For example, if a sense resistor of 4mΩ 1% R is used  
TOL  
TRIP(TYP  
CURRENT FLOW  
TO LOAD  
CURRENT FLOW  
TO LOAD  
for current sensing, the typical trip current, I  
) =  
6.25A. From Equations (14) and (15), I  
= 5.3A  
TRIP(MIN)  
and I  
= 7.2A respectively.  
TRIP(MAX)  
SENSE RESISTOR  
Forproperoperationandtoavoidtrippingthecircuitbreaker  
unnecessarily, the minimum trip current, I , must  
TRACK WIDTH W:  
0.03˝ PER AMPERE  
ON 1OZ COPPER  
W
TRIP(MIN)  
exceed the maximum operating load current of the circuit  
connected to the output of the MOSFET.  
4216 F12  
MOSFET Selection  
The external MOSFET switch must have adequate safe  
operating area (SOA) to handle short-circuit conditions  
before the circuit breaker trips. These considerations  
take precedence over continuous drain current ratings. A  
MOSFET with adequate SOA for a given application can  
always handle the required drain current, but the opposite  
may not be true. Consult the manufacturer’s MOSFET  
data sheet for safe operating area and effective transient  
thermal impedance curves.  
TO  
SENSEP  
TO  
SENSEN  
Figure 12. Making PCB Connections to the Sense Resistor  
Circuit Breaker Trip Current Calculation  
For a selected R  
value, the typical load current that  
SENSE  
trips the circuit breaker is given by:  
MOSFET selection is a 3-step process by assuming the  
VCB(TH,TYP)  
RSENSE(TYP) RSENSE(TYP)  
25mV  
ITRIP(TYP)  
=
=
absence of a soft-start capacitor. First, R  
is chosen  
SENSE  
and then the time required to charge the load capacitance  
isdetermined.Thistiming,alongwiththemaximumshort-  
circuit current and maximum load supply voltage, defines  
an operating point that is checked against the MOSFET’s  
SOA curve.  
(13)  
The minimum load current that trips the circuit breaker  
is given by:  
VCB(TH,MIN)  
RSENSE(MAX) RSENSE(MAX)  
21.5mV  
ITRIP(MIN)  
=
=
In addition, consider three other key parameters:  
(14)  
4216fa  
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1. Maximum drain-to-source voltage, V  
Rearranging Equation (2) for the circuit breaker response  
time, the FILTER capacitor, C3, is given by:  
DS(MAX)  
The V  
rating must exceed the maximum load sup-  
DS(MAX)  
ply voltage including spikes and ringing.  
(tCHARGE(LOAD) – 20µs)•60µA  
C3 =  
2. Gate-to-source voltage, V , overdrive  
1.253V  
GS  
(19)  
The absolute maximum rating for V is typically 8V for  
GS  
Returning to Equation (2), the circuit breaker response  
time is calculated with a chosen C3 and used in conjunc-  
“logic level” and “sub-logic level” MOSFETs.  
tion with V  
and I  
to check the  
3. Drain-to-source resistance, R  
IN(MAX)  
SHORT-CIRCUIT(MAX)  
DS(ON)  
SOA curves of a prospective MOSFET.  
Asa numericaldesign example forthe TypicalApplication,  
consider V = 1.8V + 5%, maximum operating load  
The R  
should be low for low voltage applications  
DS(ON)  
to allow its drain-to-source voltage, V  
, to be a very  
DS(ON)  
small percentage of the supply voltage.  
To beginadesign,firstspecifythemaximumoperatingload  
current and load capacitance. Calculate the R value  
IN(MAX)  
current = 5A, C  
= 1000µF. Equation (12) gives R  
LOAD  
SENSE  
= 4.3mΩ. Choose R  
= 4mΩ 1% tolerance. From  
SENSE  
SENSE  
Equations (14) and (16), I  
= 5A) and I  
= 5.3A (> I  
TRIP(MIN)  
LOAD(MAX)  
from Equation (12). The minimum trip current, I  
,
TRIP(MIN)  
= 7.9A respectively. Equation (19)  
INRUSH(MIN)  
given by Equation (14) should be set to accommodate the  
maximum operating load current.  
givesC3=10nF.To accountforerrorsinC3,FILTERcurrent  
(60µA)andFILTERthreshold(1.253V),thecalculatedvalue  
should be multiplied by 1.5, giving the nearest standard  
value of C3 = 18nF.  
During the start-up cycle, the LTC4216 may operate the  
MOSFETinanalogcurrentlimit,forcingΔV  
between  
ACL(TH)  
32mVto48mVacrossR  
.Theminimuminrushcurrent  
SENSE  
If a short-circuit occurs, a current of up to I  
CIRCUIT(MAX)  
SHORT-  
given by Equation (16) is calculated using the minimum  
= 12.1A will flow through the MOSFET for  
ΔV  
and maximum R  
value.  
ACL(TH)  
SENSE  
400µs as dictated by C3 = 18nF in Equation (2). The  
MOSFET must be selected based on this criterion and  
checked against the SOA curve.  
VACL(TH,MIN)  
RSENSE(MAX)  
32mV  
RSENSE(MAX)  
I
=
=
INRUSH(MIN)  
(16)  
V
Supply RC Network  
CC  
Themaximumshort-circuitcurrentgivenbyEquation(17)  
is calculated using the maximum ΔV  
and minimum  
The LTC4216 has two separate pins, V and SENSEP,  
for supply input and sensing:  
ACL(TH)  
CC  
R
value.  
SENSE  
1. V pin for powering the internal circuitry.  
VACL(TH,MAX)  
RSENSE(MIN)  
48mV  
RSENSE(MIN)  
CC  
ISHORTCIRCUIT(MAX)  
=
=
2. SENSEP pin, together with the SENSEN pin, for sens-  
ing the current flowing from the load supply through the  
external sense resistor and N-channel MOSFET to the  
output load.  
(17)  
Select the FILTER capacitor, C3, based on the slowest  
expected charging rate; otherwise, FILTER might time-out  
before the load capacitor is fully charged. A value for C3  
is calculated based on the maximum time it takes the load  
In most Hot Swap devices, V and SENSEP are one  
CC  
common pin, providing the device’s supply and external  
MOSFET’s current sensing. However, supply dips due  
to output short can potentially trigger the device into an  
undervoltage lockout condition, causing the device to  
disable and its internal latches to reset.  
capacitor, C  
, to charge to its maximum value of load  
). That time is given by:  
LOAD  
supply (V  
IN(MAX)  
CLOAD V  
IN(MAX)  
tCHARGE(LOAD)  
=
I
As bypass capacitors are not allowed on the powered  
supply side of the external MOSFET switch residing on  
4216fa  
INRUSH(MIN)  
(18)  
19  
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R
the plug-in boards, the LTC4216 provides two separate  
SENSE  
M1  
V
V
IN  
OUT  
5V  
5V  
pins for bias supply input and load supply sensing. With  
R
Y
R4  
R3  
this configuration, an RC network, R and C , shown  
Y
Y
22Ω  
GATE  
SENSEP SENSEN  
LTC4216**  
in Figure 13, can be used with the V pin to ride out  
CC  
FB  
V
CC  
R
X
supply glitches during output short or adjacent board  
short. The RC network shown has a time constant of 7µs  
and this is good enough for the supply to ride out most  
supply glitches, preventing the device from entering an  
10Ω  
Z1  
C
X
0.1µF  
+
TIMER FILTER  
SS  
GND  
C
LOAD  
C
Y
C1  
C2  
C3  
undervoltage lockout condition unnecessarily. When V  
CC  
0.33µF  
GND  
and SENSEP pins are connected together, the R value  
Y
4216 F13  
Z1: SMAJ6.0A  
**ADDITIONAL DETAILS  
OMITTED FOR CLARITY  
should be chosen such that V pin voltage is lower than  
CC  
V
– 70mV; otherwise, part of V pin current will  
be diverted through SENSEP pin.  
SENSEP  
CC  
Figure 13. Connecting Transient Protection  
Devices to the LTC4216’s Load Supply Rail  
Thisuniqueschemeofseparatingthedevice’ssupplyinput  
and sensing also provides the flexibility of operating the  
load supply from ground to its supply rail with a minimum  
bias supply voltage of 2.3V. For proper operation, the load  
supply is required to be equal to or less than the bias sup-  
ply voltage (maximum 6V).  
Staggered Pins Connections  
The LTC4216 can be used on either the backplane side of  
the connector or a printed circuit board, and examples for  
both are shown in Figure 14 and 15. Printed circuit board  
edgeconnectorswithstaggeredpinsarerecommendedas  
the insertion and removal of circuit boards will sequence  
Supply Transients Protection  
There are two methods used in most applications to  
eliminate supply transients:  
the pin connections. Supplies (V and SENSEP) and  
CC  
ground connections on the printed circuit board should  
be wired to the long pins or blades of the edge connector.  
Controlsignal(ON)andstatussignals(RESETandFAULT)  
passing through the edge connector should be wired to  
short pins or blades.  
1. Transient voltage suppressor to clip the transient to  
a safe level.  
2. Snubber (series RC) network.  
For applications with load supply voltages of 3.3V or  
higher, the ringing and overshoot during hot-swapping  
or output short-circuit events can easily exceed the  
absolute maximum rating of the LTC4216. To minimize  
the risk, a transient voltage suppressor and snubber  
network are highly recommended at the SENSEP pin.  
For applications with load supply voltages of 2.5V or  
below, usuallyasnubbernetworkisadequatetoreduce  
the supply ringing.  
Backplane and PCB Connection Sensing  
The LTC4216’s ON pin can be used in various ways to  
detect whether the printed circuit board is seated properly  
in the backplane connector before the LTC4216 begins a  
start-up cycle.  
An example is shown in Figure 14, in which the LTC4216  
is mounted on the PCB and the R1/R2 resistive divider  
is connected to the ON pin. On the edge connector, R2  
is wired to a short pin. Before the connectors are mated,  
the ON pin is held low by R1, keeping the LTC4216 in an  
off state. When the connectors are mated, the resistive  
Figure13showstheconnectionsofthesupplytransient  
protectiondevices,Z1,R andC ,aroundtheLTC4216.  
X
X
The RC network, R and C , at the V pin also serve  
Y
Y
CC  
as a snubber circuit for the load supply (V ). On the  
divider is connected to the load supply (V ) and the ON  
pin voltage rises above 0.8V, turning the LTC4216 on.  
IN  
IN  
PCB layout, these transient protection devices should  
bemountedveryclosetotheLTC4216’sloadsupplyrail  
using short lead lengths to minimize lead inductance.  
4216fa  
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An example with LTC4216 mounted on the backplane is  
shown in Figure 15. In this case, the NPN transistor, Q1,  
and two resistors, R7 and R8, form the PCB connection  
sensing circuit with the ON pin. With the PCB out of the  
backplaneconnector,Q1baseistiedtoloadsupplythrough  
R7, turning Q1 on and pulling the LTC4216’s ON pin low.  
The base of Q1 is also wired to the backplane connector  
pin. When the PCB is inserted into the backplane, Q1 base  
is grounded through a short pin connection on the PCB.  
This turns off Q1 and the LTC4216’s ON pin is allowed  
to pull high to the load supply through R8, turning it on.  
circuit. M2 is held on by its gate, pulling high through  
R8 to the load supply until the PCB is mated firmly to  
the backplane connector. A low logic-level for both the  
ON/RSTandON/OFFsignalsturnsM2andM3off,allowing  
the ON pin to be pulled high and turning LTC4216 on. A  
high logic-level for the ON/OFF signal turns off the device  
and pulls the GATE low. The device is reset by pulling the  
ON/RST signal high.  
5V Hot Swap Application  
Figure 17 shows a Hot Swap application circuit with V  
CC  
and SENSEP pins connected together to a 5V load supply  
In the previous examples, the PCB connection sensing  
circuits are not wired with interrupt capability from the  
system controller. As shown in Figure 16, adding logic-  
level discrete N-channel MOSFETs, M2 and M3, and a  
couple of resistors allow interrupt control to the sensing  
(V ). The resistive divider, R1/R2, sets the undervoltage  
IN  
threshold for the load supply and allows the system to  
start up only after the supply voltage rises above 4V.  
The resistive divider, R3/R4, monitors V  
and signals  
OUT  
BACKPLANE  
CONNECTOR  
(FEMALE)  
PCB EDGE  
CONNECTOR  
(MALE)  
LONG  
V
CC  
3.3V  
R
M1  
R
SENSE  
Y
V
1.5V  
5A  
0.004Ω  
Si4864DY  
OUT  
22Ω  
LONG  
V
IN  
1.5V  
+
C
R
R4  
13k  
1%  
LOAD  
4700µF  
X
C
Y
10Ω  
11  
10  
9
8
330nF  
C
X
100nF  
R6  
10k  
7
GATE  
SENSEP SENSEN  
V
CC  
FB  
R3  
10k  
1%  
R5  
10k  
µP  
LOGIC  
SHORT  
LONG  
2
LTC4216  
ON  
12  
1
R2  
3.3k  
1%  
R1  
20k  
1%  
C4  
10nF  
FAULT  
RESET  
FAULT  
RESET  
TIMER  
4
SS  
FILTER  
3
GND  
6
C3  
68nF  
5
PCB CONNECTION  
SENSING  
C1  
10nF  
C2  
10nF  
4216 F14  
GND  
Figure 14. Single Channel 1.5V Hot Swap Controller  
BACKPLANE  
CONNECTOR  
(FEMALE)  
PCB EDGE  
CONNECTOR  
(MALE)  
R
R
M1  
Si4864DY  
Y
SENSE  
22Ω  
0.004Ω  
LONG  
V
IN  
3.3V  
V
3.3V  
5A  
OUT  
+
C
R
X
C
LOAD  
Y
Z1  
R6  
LONG  
R7  
R8  
1000µF  
10Ω  
330nF  
11  
10  
9
8
10k  
C
10k  
10k  
X
GATE  
SENSEP SENSEN  
V
12  
CC  
ON  
SHORT  
100nF  
2
6
FAULT  
FAULT  
R4  
R5  
10k  
PCB  
CONNECTION  
SENSING  
39.2k  
1%  
Q1  
LTC4216  
1
7
SHORT  
SHORT  
RESET  
RESET  
GND  
TIMER  
4
FB  
SS  
FILTER  
3
R3  
10k  
1%  
5
R9  
100k  
SHORT  
C1  
10nF  
C2  
4.7nF  
C3  
33nF  
Z1: SMAJ6.0A  
Q1: MMBT3904  
4216 F15  
Figure 15. Hot Swap Controller on Backplane with Staggered Pin Connections  
4216fa  
21  
For more information www.linear.com/LTC4216  
LTC4216  
applicaTions inForMaTion  
BACKPLANE  
CONNECTOR  
(FEMALE)  
PCB EDGE  
CONNECTOR  
(MALE)  
LONG  
V
CC  
5V  
C
Y
R
Y
330nF  
22Ω  
R
M1  
Si4864DY  
SENSE  
0.004Ω  
LONG  
Z1  
V
IN  
3.3V  
V
3.3V  
5A  
OUT  
C
+
X
R
C
X
LOAD  
1000µF  
R5  
39.2k  
1%  
R8  
10k  
100nF  
10Ω  
11  
10  
9
8
R3  
20k 1%  
V
GATE  
R7  
SENSEP SENSEN  
SHORT  
SHORT  
2
CC  
7
FB  
ON  
10k  
R4  
10k  
1%  
R6  
10k  
R2  
4.42k  
1%  
µP  
M2  
M3  
ON/RST  
ON/OFF  
GND  
LOGIC  
LTC4216  
12  
1
FAULT  
RESET  
FAULT  
RESET  
R1  
5.62k  
1%  
SHORT  
LONG  
TIMER  
4
SS  
FILTER  
3
GND  
6
5
Z1: SMAJ6.0A  
M2, M3: 2N7002K  
C1  
10nF  
C2  
4.7nF  
C3  
33nF  
PCB CONNECTION SENSING  
4216 F16  
Figure 16. PCB Connection Sensing with ON/OFF Control  
BACKPLANE  
CONNECTOR  
(FEMALE)  
PCB EDGE  
CONNECTOR  
(MALE)  
R
R
Y
M1  
Si4864DY  
SENSE  
22Ω  
V
5V  
5A  
0.004Ω  
LONG  
OUT  
V
IN  
5V  
+
C
Z
C
R
LOAD  
470µF  
R
Z
R4  
64.9k  
1%  
X
10nF  
Z1  
C
Y
100Ω  
10Ω  
330nF  
C
X
100nF  
11  
10  
9
8
R6  
10k  
7
V
GATE  
SENSEP SENSEN  
CC  
R2  
80.6k  
1%  
FB  
R3  
10k  
1%  
R5  
10k  
µP  
2
SHORT  
LOGIC  
LTC4216  
ON  
12  
1
R1  
20k  
1%  
FAULT  
RESET  
FAULT  
RESET  
TIMER  
4
SS  
FILTER  
3
C2  
4.7nF  
GND  
6
5
C1  
10nF  
C3  
22nF  
LONG  
GND  
Z1: SMAJ6.0A  
4216 F17  
Figure 17. 5V Hot Swap Application  
the RESET high when V  
rises above 4.5V. Transient  
to ground. The auto-retry circuit will attempt to restart  
the LTC4216 after a circuit breaker trip, as shown in the  
timing diagram of Figure 19. In addition to the cooling  
cycle provided by the TIMER period during auto-retry  
sequence, the RC time constant for the ON pin voltage to  
reach 0.8V provides additional turn-off time to prevent  
the external MOSFET from overheating. The auto-retry  
duty cycle is given by:  
OUT  
voltage suppressor, Z1, and snubber network, R and  
X
C , connected at SENSEP pin are highly recommended  
X
to protect the 5V supply system from ringing and voltage  
spikes during a fault condition. The RC network, R and  
Y
C , connected at the V pin, allows the LTC4216 bias  
Y
CC  
supply to ride out supply glitches during a fault condition  
or adjacent board short.  
tSS + tFILTER 100%  
Duty Cycle ≈  
Auto-Retry after a Fault  
tOFF + tTIMER + tSS + tFILTER  
(20)  
As shown in Figure 18, the LTC4216 can be configured to  
automatically retry after a fault condition by connecting  
both the FAULT and ON pins together with an RC network.  
where  
t
t
= TIMER period as given by Equation (1);  
TIMER  
The network has a pull-up resistor, R  
, tied to the load  
AUTO  
AUTO  
= time taken to charge the capacitor, C  
, from  
OFF  
AUTO  
supply (V ) and an external capacitor, C  
, connected  
IN  
4216fa  
22  
For more information www.linear.com/LTC4216  
LTC4216  
applicaTions inForMaTion  
FAULT V to V  
threshold (0.8V). As there is an  
capacitor, C2, from 0V to its final value (1.65V) by 10µA  
current source only.  
OL  
ON(TH)  
internal 5µA current source pull-up at the FAULT pin, it  
complicates the equation for t . This is approximately  
given by:  
OFF  
For the component values shown, the external RC time  
constant is set at 0.2 second, t  
= 62ms, t = 25ms  
TIMER  
OFF  
at V = 5V, t = 1.6ms, t = 480µs and the auto-retry  
IN  
SS  
FILTER  
RAUTO CAUTO (VON(TH) VOL)  
(V – VON(TH))+RAUTO 5µA  
IN  
tOFF  
dutycycleis2.3%.Theauto-retrydutycyclecanbefurther  
(21)  
reduced by increasing both the t delay and the RC  
TIMER  
delay. As an example, increasing the TIMER capacitor, C1,  
t
=circuitbreakerresponsetimeasgivenbyEquation  
SS  
FILTER  
value from 100nF to 330nF, and R  
to 470k reduces the duty cycle to 0.8%.  
value from 200k  
AUTO  
(2); t = approximated time taken to charge the soft-start  
BACKPLANE  
CONNECTOR  
(FEMALE)  
PCB EDGE  
CONNECTOR  
(MALE)  
R
M1  
Si4864DY  
SENSE  
0.004Ω  
LONG  
V
V
5V  
5A  
IN  
5V  
OUT  
+
R
C
Y
LOAD  
470µF  
R4  
64.9k  
1%  
R
R5  
10k  
R
X
Z1  
C
AUTO  
200k  
Y
22Ω  
10Ω  
330nF  
C
X
11  
10  
9
8
100nF  
V
GATE  
SENSEP SENSEN  
CC  
7
FB  
SHORT  
LONG  
1
12  
2
R3  
10k  
1%  
RESET  
FAULT  
RESET  
LTC4216  
ON  
GND TIMER  
6
SS  
5
FILTER  
3
C2  
4.7nF  
C
AUTO  
1µF  
4
C1  
100nF  
C3  
22nF  
4216 F18  
GND  
Z1: SMAJ6.0A  
Figure 18. Auto-Retry Application  
FILTER RAMPS UP WHEN  
SENSEP SENSEN  
OUTPUT IN ANALOG CURRENT LIMIT  
(V  
–V  
) >25mV  
CHECK FOR GATE, FILTER,  
ON/FAULT PULLED LOW  
TIMER, SS < 0.2V AND FAULT HIGH  
DEVICE RESET  
CHECK FOR GATE, FILTER,  
TIMER, SS < 0.2V  
ELECTRONIC CIRCUIT  
BREAKER ARMED  
1ST TIMING CYCLE RESTART  
1
2
3
4
5
6
7 8 9  
10 11 12  
13 14  
SENSEP  
ON/FAULT  
SS  
0.8V  
0.8V  
0.4V  
V
OL  
10µA  
1µA  
10µA  
GATE  
REGULATING  
TRACKS SS RAMP  
(V  
– V ) > V  
OUT GS(TH)  
GATE  
GATE  
40mV  
25mV  
SENSEP–SENSEN  
V
V
TMR(TH)  
TMR(TH)  
2µA  
TIMER  
FILTER  
2µA  
2.4µA  
V
FILT(TH)  
60µA  
4216 F19  
t
t
t
t
TIMER  
OFF  
TIMER  
FILTER  
t
t
t
SS  
OFF  
RST(ONLO)  
Figure 19. Auto-Retry Timing  
4216fa  
23  
For more information www.linear.com/LTC4216  
LTC4216  
package DescripTion  
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.  
DE/UE Package  
12-Lead Plastic DFN (4mm × 3mm)  
(Reference LTC DWG # 05-08-1695 Rev D)  
NOTE:  
0.70 0.05  
1. DRAWING PROPOSED TO BE A VARIATION OF VERSION  
(WGED) IN JEDEC PACKAGE OUTLINE M0-229  
2. DRAWING NOT TO SCALE  
3.30 0.05  
1.70 0.05  
3.60 0.05  
2.20 0.05  
3. ALL DIMENSIONS ARE IN MILLIMETERS  
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE  
DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT,  
SHALL NOT EXCEED 0.15mm ON ANY SIDE  
5. EXPOSED PAD SHALL BE SOLDER PLATED  
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION  
ON THE TOP AND BOTTOM OF PACKAGE  
PACKAGE OUTLINE  
0.25 0.05  
0.50 BSC  
2.50 REF  
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS  
APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED  
0.40 0.10  
4.00 0.10  
(2 SIDES)  
R = 0.115  
TYP  
7
12  
R = 0.05  
TYP  
3.30 0.10  
3.00 0.10  
(2 SIDES)  
1.70 0.10  
PIN 1  
TOP MARK  
(NOTE 6)  
PIN 1 NOTCH  
R = 0.20 OR  
0.35 × 45°  
CHAMFER  
(UE12/DE12) DFN 0806 REV D  
6
1
0.25 0.05  
0.75 0.05  
0.200 REF  
0.50 BSC  
2.50 REF  
BOTTOM VIEW—EXPOSED PAD  
0.00 – 0.05  
MS Package  
10-Lead Plastic MSOP  
(Reference LTC DWG # 05-08-1661 Rev E)  
3.00 0.102  
(.118 .004)  
(NOTE 3)  
0.889 0.127  
(.035 .005)  
0.497 0.076  
(.0196 .003)  
REF  
10 9  
8
7 6  
5.23  
(.206)  
MIN  
3.20 – 3.45  
(.126 – .136)  
3.00 0.102  
(.118 .004)  
(NOTE 4)  
4.90 0.152  
(.193 .006)  
DETAIL “A”  
0.254  
(.010)  
0° – 6° TYP  
0.50  
(.0197)  
BSC  
0.305 0.038  
(.0120 .0015)  
TYP  
GAUGE PLANE  
1
2
3
4 5  
RECOMMENDED SOLDER PAD LAYOUT  
0.53 0.152  
(.021 .006)  
0.86  
(.034)  
REF  
1.10  
(.043)  
MAX  
DETAIL “A”  
0.18  
(.007)  
SEATING  
PLANE  
NOTE:  
0.17 – 0.27  
(.007 – .011)  
TYP  
0.1016 0.0508  
(.004 .002)  
1. DIMENSIONS IN MILLIMETER/(INCH)  
2. DRAWING NOT TO SCALE  
0.50  
(.0197)  
BSC  
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.  
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE  
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.  
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE  
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX  
MSOP (MS) 0307 REV E  
4216fa  
24  
For more information www.linear.com/LTC4216  
LTC4216  
revision hisTory  
REV  
DATE  
DESCRIPTION  
PAGE NUMBER  
A
4/13  
Corrected Supply Voltage to Output in the tenth feature  
Raised DE storage temperature limit to 150°C. Separated Order Information as per latest format  
1
2
Condition specified for ΔV  
. New specification for t  
without FILTER capacitor.  
3
CB(TH)  
CB(TRIP)  
Added new curve: Analog Current Limit Delay vs Sense Voltage  
Removed curve: V vs Temperature  
4
5
FAULT(TH)  
Updated RESET pin description. Added threshold information to FILTER, TIMER and FB pin descriptions.  
Guidance given for the value of R  
6
12  
13  
Z
R added to Figure 7 and described before Equation 7  
G
4216fa  
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.  
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-  
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.  
25  
LTC4216  
Typical applicaTion  
LTC4216CMS with Gate Capacitor for Slew Rate Control  
BACKPLANE  
CONNECTOR  
(FEMALE)  
PCB EDGE  
CONNECTOR  
(MALE)  
R
M1  
Si9426DY  
SENSE  
V
5V  
2A  
0.01Ω  
LONG  
OUT  
V
IN  
5V  
+
C
LOAD  
R4  
64.9k  
1%  
R5  
10k  
R
Z1  
X
470µF  
10Ω  
C
C4  
22nF  
R
G
10Ω  
R
Y
Y
C
X
330nF  
22Ω  
100nF  
V
GATE  
SENSEP SENSEN  
LTC4216  
CC  
FB  
SHORT  
SHORT  
R3  
10k  
1%  
RESET  
RESET  
R2  
10k  
ON  
TIMER  
FILTER  
GND  
C3  
68nF  
C1  
10nF  
LONG  
GND  
Z1: SMAJ6.0A  
4216 TA02  
relaTeD parTs  
PART NUMBER  
DESCRIPTION  
COMMENTS  
LTC1421  
Dual Channels, Hot Swap Controller  
Single Channel, Hot Swap Controller  
Single Channel, Hot Swap Controller  
Dual Channel, Hot Swap Controller  
Dual Channel, Hot Swap Controller  
Operates from 3V to 12V, Supports –12V, SSOP-24  
Operates from 2.7V to 12V, SO-8  
LTC1422  
LTC1642  
Operates from 3V to 16.5V, Overvoltage Protection up to 33V, SSOP-16  
Operates from 3V to 12V, Power Sequencing, SO-8 or SO-14  
Operates from 2.7V to 16.5V, SO-8 or SSOP-16  
LTC1645  
LTC1647-1/LTC1647-2/  
LTC1647-3  
LTC4210-1/LTC4210-2  
LTC4211  
Single Channel, Hot Swap Controller  
Single Channel, Hot Swap Controller  
Operates from 2.7V to 16.5V, Active Current Limiting, SOT23-6  
Operates from 2.5V to 16.5V, Multifunction Current Control,  
MSOP-8 or MSOP-10  
LTC4212  
LTC4214  
LT4220  
Single Channel, Hot Swap Controller  
Negative Voltage, Hot Swap Controller  
Operates from 2.5V to 16.5V, Power-Up Timeout, MSOP-10  
Operates from 6V to –16V, MSOP-10  
Positive and Negative Voltage,  
Dual Channels, Hot Swap Controller  
Operates from 2.7V to 16.5V, SSOP-16  
LTC4221  
LTC4230  
Dual Hot Swap Controller/Sequencer  
Triple Channels, Hot Swap Controller  
Operates from 1V to 13.5V, Multifunction Current Control, SSOP-16  
Operates from 1.7V to 16.5V, Multifunction Current Control, SSOP-20  
4216fa  
LT 0413 REV A • PRINTED IN USA  
LinearTechnology Corporation  
1630 McCarthy Blvd., Milpitas, CA 95035-7417  
26  
(408)432-1900 FAX: (408) 434-0507 www.linear.com/LTC4216  
ꢀLINEAR TECHNOLOGY CORPORATION 2013  

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