LTC4263IDE-TR [Linear]

Quad Synchronous Step-Down Regulator: 2.25MHz, 300mA, 200mA, 200mA, 100mA; 四,同步降压型稳压器: 2.25MHz的, 300毫安型,200mA型,200mA , 100毫安
LTC4263IDE-TR
型号: LTC4263IDE-TR
厂家: Linear    Linear
描述:

Quad Synchronous Step-Down Regulator: 2.25MHz, 300mA, 200mA, 200mA, 100mA
四,同步降压型稳压器: 2.25MHz的, 300毫安型,200mA型,200mA , 100毫安

稳压器
文件: 总16页 (文件大小:269K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
LTC3544B  
Quad Synchronous  
Step-Down Regulator: 2.25MHz,  
300mA, 200mA, 200mA, 100mA  
FEATURES  
DESCRIPTION  
The LTC®3544B is a quad, high efficiency, monolithic  
High Efficiency: Up to 95%  
Four Independent Regulators Provide Up to 300mA,  
200mA, 200mA and 100mA Output Current  
2.25V to 5.5V Input Voltage Range  
synchronous buck regulator using a constant frequency,  
current mode architecture. The four regulators operate in-  
dependentlywithseparaterunpins.The2.25Vto5.5Vinput  
voltage range makes the LTC3544B well suited for single  
Li-Ion/polymer battery-powered applications. 100% duty  
cycle provides low dropout operation, extending battery  
runtime in portable systems. At moderate and low output  
load levels PWM pulse skip mode operation provides very  
low output ripple voltage for noise sensitive applications.  
2.25MHz Constant Frequency Operation  
No Schottky Diodes Required  
Low Dropout Operation: 100% Duty Cycle  
Pulse Skipping at Low Load for Minimum Ripple  
0.8V Reference Allows Low Output Voltages  
Shutdown Mode Draws <1μA Supply Current  
Current Mode Operation for Excellent Line and Load  
Transient Response  
Switching frequency is internally set to 2.25MHz, al-  
lowing the use of small surface mount inductors and  
capacitors.  
Overtemperature Protected  
Low Profile (3mm × 3mm) 16-Lead QFN Package  
The internal synchronous switches increase efficiency  
and eliminate the need for external Schottky diodes. Low  
outputvoltagesareeasilysupportedwiththe0.8Vfeedback  
reference voltage.  
APPLICATIONS  
Cellular Telephones  
Personal Information Appliances  
TheLTC3544Bisavailableinalowprofile(0.75mm)(3mm  
× 3mm) QFN package.  
, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.  
All other trademarks are the property of their respective owners. Protected by U.S.  
Patents, including 5481178, 6580258, 6304066, 6127815, 6498466, 6611131, 5994885.  
Wireless and DSL Modems  
Digital Still Cameras  
Media Players  
Portable Instruments  
TYPICAL APPLICATION  
High Efficiency Quad Step-Down Converter  
Efficiency vs Load Current, 300mA  
Channel, All Other Channels Off  
V
IN  
100  
90  
80  
70  
60  
50  
40  
30  
20  
10  
0
1
2.25V TO 5.5V  
4.7μF  
V
A
= 1.5V  
OUT  
CER  
T
= 25°C  
V
PV  
IN  
CC  
RUN200B  
SW200B  
RUN200A  
SW200A  
4.7μH  
3.3μH  
V
V
OUT3  
OUT2  
1.5V  
0.8V  
93.1k  
0.1  
EFFICIENCY  
V
V
FB200A  
FB200B  
4.7μF  
CER  
4.7μF  
CER  
100k  
107k  
LTC3544B  
POWER LOSS  
0.01  
0.001  
RUN300  
SW300  
RUN100  
SW100  
3.3μH  
10μH  
V
V
OUT4  
1.8V  
OUT1  
1.2V  
V
V
V
= 2.5V  
= 3.6V  
= 4.3V  
133k  
59k  
IN  
IN  
IN  
V
FB300  
V
FB100  
4.7μF  
CER  
4.7μF  
CER  
GNDA  
PGND  
107k  
118k  
0.0001  
0.001  
0.01  
0.1  
1
LOAD CURRENT (A)  
3544B TA01a  
3544B TA01b  
3544bfa  
1
LTC3544B  
ABSOLUTE MAXIMUM RATINGS  
PIN CONFIGURATION  
(Note 1)  
Input Supply Voltage.....................................–0.3V to 6V  
TOP VIEW  
RUNx ............................................. –0.3V to (V + 0.3V)  
IN  
V
FBx  
................................................ –0.3V to (V + 0.3V)  
IN  
16 15 14 13  
SWx ............................................... –0.3V to (V + 0.3V)  
IN  
V
V
1
2
3
4
12 RUN100  
FB200B  
300mA P-Channel Source Current (DC) (Note 8)..450mA  
300mA N-Channel Sink Current (DC) (Note 8)......450mA  
200mA P-Channel Source Current (DC) (Note 8)..300mA  
200mA N-Channel Sink Current (DC) (Note 8)......300mA  
100mA P-Channel Source Current (DC) (Note 8)..200mA  
100mA N-Channel Sink Current (DC) (Note 8)......200mA  
Peak 300mA SW Sink and Source Current  
11  
10  
9
V
V
FB200A  
FB100  
FB300  
17  
RUN200A  
SW200B  
RUN300  
5
6
7
8
UD PACKAGE  
16-LEAD (3mm × 3mm) PLASTIC QFN  
= 125°C, θ = 68°C/W  
(Note 8) ...........................................................600mA  
Peak 200mA SW Sink and Source Current  
T
JMAX  
JA  
EXPOSED PAD (PIN 17) IS GND, MUST BE SOLDERED TO PCB  
(Note 8) ...........................................................400mA  
Peak 100mA SW Sink and Source Current  
(Note 8) ...........................................................200mA  
Operating Temperature Range...................–40°C to 85°C  
Junction Temperature (Notes 3, 4) ........................ 125°C  
Storage Temperature Range....................–65°C to 125°C  
ORDER INFORMATION  
LEAD FREE FINISH  
LTC3544BEUD#PBF  
LEAD BASED FINISH  
LTC3544BEUD  
TAPE AND REEL  
LTC4263IDE#TRPBF  
TAPE AND REEL  
LTC4263IDE#TR  
PART MARKING  
LCLN  
PACKAGE DESCRIPTION  
16-Lead (3mm × 3mm) Plastic QFN  
TEMPERATURE RANGE  
–40°C to 85°C  
PART MARKING  
LCLN  
PACKAGE DESCRIPTION  
TEMPERATURE RANGE  
16-Lead (3mm × 3mm) Plastic QFN  
–40°C to 85°C  
Consult LTC Marketing for parts specified with wider operating temperature ranges.  
For more information on lead free part marking, go to: http://www.linear.com/leadfree/  
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/  
ELECTRICAL CHARACTERISTICS The denotes the specifications which apply over the full operating  
temperature range, otherwise specifications are at TA = 25°C. VIN = 3.6V unless otherwise noted. (Note 2)  
SYMBOL  
PARAMETER  
CONDITIONS  
MIN  
TYP  
MAX  
UNITS  
General Characteristics  
V
V
Input Voltage Range  
2.25  
5.5  
V
IN  
Regulated Feedback Voltage (Note 5)  
0.792  
0.784  
0.8  
0.8  
0.808  
0.816  
V
V
FBREGx  
ΔV  
Reference Voltage Line Regulation (Note 5)  
Output Voltage Load Regulation (Note 6)  
Input DC Bias Current Active Mode (Pulse Skip)  
V
V
= 2.25V to 5.5V  
0.05  
0.5  
0.25  
%/V  
%
FBREGx  
IN  
V
LOADREG  
I
= 0.7V, I = 0A, 2.25MHz,  
LOAD  
Four Regulators Enabled  
825  
1100  
2
μA  
S
FB  
Shutdown  
0.1  
μA  
f
Oscillator Frequency  
V
IN  
V
IN  
= 3V  
= 2.5V to 5.5V  
2.25  
MHz  
MHz  
OSC  
1.8  
2.7  
3544bfa  
2
LTC3544B  
ELECTRICAL CHARACTERISTICS The denotes the specifications which apply over the full operating  
temperature range, otherwise specifications are at TA = 25°C. VIN = 3.6V unless otherwise noted.  
SYMBOL  
PARAMETER  
CONDITIONS  
MIN  
TYP  
MAX  
UNITS  
V
V
RUNx Input High Voltage  
RUNx Input Low Voltage  
SWx Leakage  
1.0  
RUN(HIGH)  
RUN(LOW)  
LSW  
V
0.3  
1
V
I
I
I
t
V
V
= 0V, V = 0V or 5.5V, V = 5.5V  
0.1  
0.1  
μA  
μA  
nA  
μs  
V
RUN  
SW  
IN  
RUN Leakage Current  
= 5.5V  
1
RUN  
IN  
V
FBx  
Leakage Current  
80  
VFB  
Soft-Start Period  
V
FB  
= 7.5% to 92.5% Full Scale  
650  
400  
875  
1.9  
1200  
2.25  
SS  
V
UVLO  
Undervoltage Lockout  
Individual Regulator Characteristics  
Regulator SW300 – 300mA  
I
I
Peak Switch Current Limit  
V
V
< V , Duty Cycle < 35%  
FBREG  
600  
320  
800  
500  
500  
400  
mA  
μA  
PK  
FB  
Input DC Bias Current–Reg SW300 Only  
Active Mode (Pulse Skip)  
= 0.7V, I  
= 0A, 2.25MHz  
LOAD  
S300  
FB  
Ω
Ω
R
R
R
of P-Channel FET (Note 7)  
of N-Channel FET (Note 7)  
I
I
= 100mA  
0.55  
0.50  
PFET  
DS(ON)  
DS(ON)  
SW  
R
= –100mA  
NFET  
SW  
Regulator SW200A – 200mA  
I
I
Peak Switch Current Limit  
V
V
< V , Duty Cycle < 35%  
FBREG  
300  
300  
200  
400  
320  
mA  
μA  
PK  
FB  
Input DC Bias Current–Reg SW200A Only  
Active Mode (Pulse Skip)  
= 0.7V, I  
= 0A, 2.25MHz  
LOAD  
S200  
FB  
Ω
Ω
R
R
R
of P-Channel FET (Note 7)  
of N-Channel FET (Note 7)  
I
I
= 100mA  
0.65  
0.60  
PFET  
DS(ON)  
DS(ON)  
SW  
R
= –100mA  
NFET  
SW  
Regulator SW200B – 200mA  
I
I
Peak Switch Current Limit  
V
V
< V , Duty Cycle < 35%  
FBREG  
400  
320  
mA  
μA  
PK  
FB  
Input DC Bias Current–Reg SW200B Only  
Active Mode (Pulse Skip)  
= 0.7V, I  
= 0A, 2.25MHz  
LOAD  
S200  
FB  
Ω
Ω
R
R
R
R
of P-Channel FET (Note 7)  
of N-Channel FET (Note 7)  
I
I
= 100mA  
0.65  
0.60  
PFET  
DS(ON)  
SW  
= –100mA  
NFET  
DS(ON)  
SW  
Regulator SW100 – 100mA  
I
I
Peak Switch Current Limit  
V
V
< V , Duty Cycle < 35%  
FBREG  
300  
320  
mA  
μA  
PK  
FB  
Input DC Bias Current–Reg SW100B Only  
Active Mode (Pulse Skip)  
= 0.7V, I  
= 0A, 2.25MHz  
LOAD  
S100  
FB  
Ω
Ω
R
R
R
of P-Channel FET (Note 7)  
of N-Channel FET (Note 7)  
I
I
= 100mA  
0.80  
0.75  
PFET  
DS(ON)  
DS(ON)  
SW  
R
= –100mA  
NFET  
SW  
Note 1: Stresses beyond those listed under Absolute Maximum Ratings  
may cause permanent damage to the device. Exposure to any Absolute  
Maximum Rating condition for extended periods may affect device  
reliability and lifetime.  
Note 2: The LTC3544BE is guaranteed to meet performance specifications  
from 0°C to 85°C. Specifications over the –40°C to 85°C operating  
temperature range are assured by design, characterization and correlation  
with statistical process controls.  
Note 4: This IC includes overtemperature protection that is intended  
to protect the device during momentary overload conditions. Junction  
temperature will exceed 125°C when overtemperature is active.  
Continuous operation above the specified maximum operating junction  
temperature may impair device reliability.  
Note 5: The LTC3544B is tested in a proprietary test mode that connects  
V
to the output of the error amplifier.  
FB  
Note 6: Load regulation is inferred by measuring the regulation loop gain.  
Note 3: T is calculated from the ambient temperature T and power  
J
A
Note 7: The QFN switch on-resistance is guaranteed by correlation to  
wafer level measurements.  
dissipation P according to the following formula:  
D
T = T + (P )(68°C/W).  
J
A
D
Note 8: Guaranteed by long-term current density limitations.  
3544bfa  
3
LTC3544B  
TYPICAL PERFORMANCE CHARACTERISTICS  
Efficiency vs Load Current 300mA  
Channel. All Other Channels at  
50% Peak Current  
VREF vs Temperature at 2.25V,  
3.6V, 5.5V  
Switching Frequency vs Supply  
Voltage and Temperature  
100  
90  
80  
70  
60  
50  
40  
30  
20  
10  
0
3.0  
2.5  
2.0  
1.5  
0.815  
0.810  
CHANNEL 200A  
I
CHANNEL 100 = 50mA  
LOAD  
I
= 100mA  
ALL CHANNELS OPERATING  
LOAD  
ALL CHANNELS OPERATING  
0805  
0.800  
0.795  
0.790  
0.785  
f
f
f
f
–40°C  
0°C  
25°C  
80°C  
V
V
T
= 3.6V  
= 1.8V  
= 25°C  
OSC  
OSC  
OSC  
OSC  
IN  
OUT  
A
V
V
V
= 2.25V  
= 3.6V  
= 5.5V  
IN  
IN  
IN  
ALL OTHER CHANNELS LOADED 50%  
0.001 0.01 0.1  
LOAD CURRENT 300mA CHANNEL (A)  
0.0001  
1
–50  
0
50  
100  
2
3
4
5
6
SUPPLY VOLTAGE (V)  
TEMPERATURE (°C)  
3544B G03  
3544B G01  
3544B G02  
Efficiency vs Load Current 300mA  
Channel. All Other Channels Off  
Efficiency vs Load Current 200mA  
Channel A. All Other Channels Off  
Efficiency vs Load Current 200mA  
Channel B. All Other Channels Off  
100  
90  
80  
70  
60  
50  
40  
30  
20  
10  
0
90  
80  
70  
60  
50  
40  
30  
20  
10  
0
100  
90  
80  
70  
60  
50  
40  
30  
20  
10  
0
V
V
V
= 2.25V  
= 3.6V  
= 5.5V  
V
V
V
= 2.25V  
= 3.6V  
= 5.5V  
V
V
V
= 2.25V  
= 3.6V  
= 5.5V  
IN  
IN  
IN  
IN  
IN  
IN  
IN  
IN  
IN  
V
T
= 1.8V  
V
T
= 0.8V  
V
= 1.5V  
OUT  
OUT  
A
OUT  
A
= 25°C  
= 25°C  
T = 25°C  
A
ALL OTHER CHANNELS OFF  
ALL OTHER CHANNELS OFF  
ALL OTHER CHANNELS OFF  
0.0001  
0.001  
0.01 0.1  
1
0.0001  
0.001  
0.01 0.1  
1
0.0001  
0.001  
0.01 0.1 1  
LOAD CURRENT (A)  
LOAD CURRENT (A)  
LOAD CURRENT (A)  
3544B G04  
3544B G05  
3544B G06  
Efficiency vs Load Current 100mA  
Channel. All Other Channels Off  
Efficiency vs Supply Voltage, All  
Channels 50% Loaded  
Load Regulation, All Channels  
100  
90  
80  
70  
60  
50  
40  
30  
20  
10  
0
1.2  
1.0  
0.8  
0.6  
100  
90  
80  
70  
60  
50  
V
V
V
= 2.25V  
= 3.6V  
= 5.5V  
IN  
IN  
IN  
V
A
= 3.6V  
IN  
T
= 25°C  
CHANNELS NOT UNDER  
TEST HELD AT CONSTANT  
50% MAXIMUM LOAD  
100mA  
200mA (A)  
200mA (B)  
300mA  
0.4  
0.2  
0
V
V
V
V
= 1.2V  
OUT100  
= 0.8V  
= 1.5V  
OUT200A  
OUT200B  
V
T
= 1.2V  
OUT  
A
= 1.8V  
OUT300  
= 25°C  
T
= 25°C  
A
ALL OTHER CHANNELS OFF  
–0.2  
0.0001  
0.001  
0.01 0.1  
1
0
100  
200  
300  
400  
3
4
5
2
LOAD CURRENT (A)  
LOAD (mA)  
SUPPLY VOLTAGE (V)  
3544B G07  
3544B G09  
3544B G08  
3544bfa  
4
LTC3544B  
TYPICAL PERFORMANCE CHARACTERISTICS  
Load Step Response, 300mA  
Channel  
Load Step Response, 200mA  
Channel A  
Start-Up Curves, All Channels  
V
V
OUT200A  
OUT300  
50mV/DIV  
100mV/DIV  
AC COUPLED  
AC COUPLED  
V
OUT100  
V
OUT200A  
I
L
I
250mA/DIV  
L
V
OUT200B  
250mA/DIV  
V
OUT300  
I
LOAD  
100mA/DIV  
I
LOAD  
RUNx  
250mA/DIV  
3544B G11  
3544B G10  
3544B G12  
V
V
T
= 3.6V  
= 1.8V  
= 25°C  
20μs/DIV  
V
T
= 3.6V  
200μs/DIV  
V
V
T
= 3.6V  
= 0.8V  
= 25°C  
20μs/DIV  
IN  
OUT  
A
IN  
A
IN  
OUT  
A
= 25°C  
ALL CHANNELS UNLOADED  
I
= 300μA TO 300mA  
I
= 340μA TO 200mA  
LOAD  
LOAD  
Load Step Response, 100mA  
Channel  
Load Step Response, 200mA  
Channel B  
Load Step Crosstalk  
V
OUT200B  
V
OUT100  
50mV/DIV  
10mV/DIV  
V
OUT100  
AC COUPLED  
50mV/DIV  
AC COUPLED  
V
OUT200A  
I
10mV/DIV  
L
250mA/DIV  
I
L
100mA/DIV  
V
OUT200B  
10mV/DIV  
I
LOAD  
V
I
OUT300  
LOAD  
100mA/DIV  
100mV/DIV  
100mA/DIV  
3544B G14  
3544B G15  
3544B G13  
V
V
T
= 3.6V  
= 1.2V  
= 25°C  
20μs/DIV  
V
A
= 3.6V  
IN  
40μs/DIV  
V
V
T
= 3.6V  
= 1.5V  
= 25°C  
20μs/DIV  
IN  
OUT  
A
IN  
OUT  
A
T
= 25°C  
300mA LOAD STEP ON V  
OUT300  
I
= 200μA TO 100mA  
OTHER CHANNELS LOADED 50% OF MAXIMUM  
I
= 340μA TO 200mA  
LOAD  
LOAD  
PFET RDS(ON) vs Supply Voltage  
NFET RDS(ON) vs Supply Voltage  
1.0  
0.9  
0.8  
0.7  
0.6  
0.5  
0.4  
0.3  
0.2  
0.1  
0
1.2  
1.0  
0.8  
0.6  
0.4  
0.2  
0
T
= 25°C  
T
= 25°C  
A
A
300  
300  
200 (B)  
200 (A)  
100  
200 (B)  
200 (A)  
100  
4.5  
5
2
2.5  
3
3.5  
4
5.5  
6
2
3
4
5
6
V
(V)  
V
(V)  
IN  
IN  
3544B G16  
3544B G17  
3544bfa  
5
LTC3544B  
TYPICAL PERFORMANCE CHARACTERISTICS  
NFET RDS(ON) vs Temperature  
PFET RDS(ON) vs Temperature  
1.0  
0.9  
0.8  
0.7  
0.6  
0.5  
0.4  
0.3  
0.2  
0.1  
0
1.0  
0.9  
0.8  
0.7  
0.6  
0.5  
0.4  
0.3  
0.2  
0.1  
0
V
= 3.6V  
V
= 3.6V  
IN  
IN  
300  
300  
200 (B)  
200 (A)  
100  
200 (B)  
200 (A)  
100  
–50  
30  
70 90  
–30 –10 10  
50  
–50  
50  
0
TEMPERATURE (°C)  
100  
TEMPERATURE (°C)  
3544B G18  
3544B G19  
PIN FUNCTIONS  
FB200B  
pinreceivesthefeedbackvoltagefromanexternalresistive  
divider across the output.  
V
(Pin 1): 200mA Regulator B Feedback Pin. This  
RUN300 (Pin 9): 300mA Regulator Enable Pin. Forcing  
this pin to V enables the 300mA regulator, while forcing  
IN  
it to GND causes the regulator to shut off.  
V
(Pin 2): 200mA Regulator A Feedback Pin. This  
V
(Pin 10): 300mA Regulator Feedback Pin. This pin  
FB200A  
FB300  
pinreceivesthefeedbackvoltagefromanexternalresistive  
receives the feedback voltage from an external resistive  
divider across the output.  
divider across the output.  
RUN200A(Pin3):200mARegulatorAEnablePin. Forcing  
V
(Pin 11): 100mA Regulator Feedback Pin. This pin  
FB100  
this pin to V enables the 200mA regulator (channel A),  
receives the feedback voltage from an external resistive  
divider across the output.  
IN  
while forcing it to GND causes the regulator to shut off.  
SW200B (Pin 4): Switch Node Connection to Inductor for  
200mA Regulator B. This pin connects to the drains of the  
internal power MOSFET switches.  
RUN100 (Pin 12): 100mA Regulator Enable Pin. Forcing  
this pin to V enables the 100mA regulator, while forcing  
IN  
it to GND causes the 100mA regulator to shut off.  
SW200A (Pin 5): Switch node Connection to Inductor for  
200mA Regulator A. This pin connects to the drains of the  
internal power MOSFET switches.  
SW100 (Pin 13): Switch Node Connection to Inductor for  
100mA Regulator. This pin connects to the drains of the  
internal power MOSFET switches.  
PGND (Pin 6): Power Path Return Pin for Both 200mA  
Regulators and the 300mA Regulator.  
GNDA(Pin14):GroundPinforInternalReferenceandCon-  
trol Circuitry. Power path return for the 100mA regulator.  
PV (Pin 7): Power Path Supply Pin for Both 200mA  
V
(Pin15):SupplyPinforInternalReferenceandControl  
IN  
CC  
Regulators and the 300mA Regulator. This pin must  
be closely decoupled to PGND, with a 4.7μF or greater  
ceramic capacitor.  
Circuitry. Power path supply pin for the 100mA regulator.  
RUN200B(Pin16):200mARegulatorBEnablePin.Forcing  
this pin to V enables the 200mA regulator (channel B),  
IN  
SW300 (Pin 8): Switch Node Connection to Inductor for  
300mA Regulator. This pin connects to the drains of the  
internal power MOSFET switches.  
while forcing it to GND causes the regulator to shut off.  
Exposed Pad (Pin 17): Ground. Must be soldered to PCB.  
3544bfa  
6
LTC3544B  
FUNCTIONAL DIAGRAMS  
3
9
15  
14  
GNDA  
16  
RUN200B  
12  
RUN100  
RUN200A RUN300  
V
CC  
SHDN  
0.8V  
REF  
OSC  
RUN  
LOGIC  
SW200A  
SW100  
5
13  
I
I
BIAS100  
BIAS200A  
POWER  
FETs  
POWER  
FETs  
V
V
FB100  
FB200A  
2
8
11  
4
REG200A  
REG100  
SW200B  
SW300  
I
BIAS200B  
I
BIAS300  
POWER  
FETs  
POWER  
FETs  
V
FB200B  
V
FB300  
1
10  
REG300  
REG200B  
PV  
PGND  
IN  
7
6
3544B FD01  
OSC  
SLOPE  
COMP  
PV  
IN  
V
0.8V  
REF  
+
EA  
V
FBX  
+
5Ω  
I
COMP  
SWITCHING  
LOGIC  
OSC  
Q
Q
S
R
AND  
ANTI-  
BLANKING  
CIRCUIT  
SHOOT-  
THRU  
SWX  
RUNX  
+
I
RCMP  
PGND  
3544B FD02  
3544bfa  
7
LTC3544B  
OPERATION  
MAIN CONTROL LOOP  
The LTC3544B uses a constant frequency, current mode  
step-down architecture. Both the main (P-channel  
MOSFET)andsynchronous(N-channelMOSFET)switches  
areinternal.Duringnormaloperation,theinternaltoppower  
MOSFET is turned on each cycle when the oscillator sets  
the RS latch, and turned off when the current comparator,  
V
OUT100  
V
OUT200A  
V
OUT200B  
V
OUT300  
RUNx  
I
, resets the RS latch. The peak inductor current at  
3544B G10  
COMP  
V
A
= 3.6V  
200μs/DIV  
IN  
T
= 25°C  
whichI  
resetstheRSlatch,iscontrolledbytheoutput  
COMP  
ALL CHANNELS UNLOADED  
of error amplifier EA. When the load current increases, it  
causes a slight decrease in the feedback voltage FB rela-  
tive to the 0.8V reference, which in turn, causes the EA  
amplifier’s output voltage to increase until the average  
inductor current matches the new load current. While the  
top MOSFET is off, the bottom MOSFET is turned on until  
eithertheinductorcurrentstartstoreverse,asindicatedby  
Figure 1. Regulator Soft-Start  
Short-Circuit Protection  
Short circuit protection is achieved by monitoring the in-  
ductorcurrent.Whenthecurrentexceedsapredetermined  
level, the main switch is turned off, and the synchronous  
switch is turned on long enough to allow the current in the  
inductor to decay below the fault threshold. This prevents  
a catastrophic inductor current, run-away condition, but  
will still provide current to the output. Output voltage  
regulation in this condition is not achieved.  
the current reversal comparator, I  
of the next clock cycle.  
, or the beginning  
RCMP  
PULSE SKIPPING MODE OPERATION  
At light loads, the inductor current may reach zero or  
reverse on each pulse. The bottom MOSFET is turned off  
DROPOUT OPERATION  
by the current reversal comparator, I  
, and the switch  
RCMP  
Astheinputsupplyvoltagedecreasestoavalueapproach-  
ing the output voltage, the duty cycle increases toward the  
maximumon-time.Furtherreductionofthesupplyvoltage  
forcesthemainswitchtoremainonformorethanonecycle  
until it reaches 100% duty cycle. The output voltage will  
then be determined by the input voltage minus the voltage  
drop across the P-channel MOSFET and the inductor. An  
important detail to remember is that at low input supply  
voltage will ring. This is discontinuous mode operation,  
and is normal behavior for the switching regulator. At very  
light loads, the LTC3544B will automatically skip pulses  
to maintain output regulation.  
SOFT-START  
Soft-start reduces surge currents on V and output  
IN  
overshoot during start-up. Soft-start on the LTC3544B is  
implemented by internally ramping the reference signal  
fedtotheerroramplifieroverapproximatelya1msperiod.  
Figure1showsthebehaviorofthefourregulatorchannels  
during soft-start.  
voltages, the R  
of the P-channel switch increases  
DS(ON)  
(see Typical Performance Characteristics). Therefore,  
the user should calculate the power dissipation when  
the LTC3544B is used at 100% duty cycle with low input  
voltage (See Thermal Considerations in the Applications  
Information section).  
3544bfa  
8
LTC3544B  
APPLICATIONS INFORMATION  
The basic LTC3544B application circuit is shown on the  
first page of this data sheet. External component selec-  
tion is driven by the load requirement and begins with the  
Table 1. Representative Surface Mount Inductors  
Value  
(μH)  
DCR  
MAX DC  
3
Part Number  
(Ω MAX) CURRENT (A) W × L × H (mm )  
selection of L followed by C and C  
.
Sumida  
CDH2D09B  
10  
6.4  
4.7  
3.3  
0.47  
0.32  
0.218  
0.15  
0.48  
0.6  
3.0 × 2.8 × 1.0  
2.8 × 2.8 × 1.35  
2.8 × 2.6 × 1.0  
IN  
OUT  
0.7  
Inductor Selection  
0.85  
Wurth  
TPC744029  
10  
6.8  
4.7  
3.3  
0.50  
0.38  
0.210  
0.155  
0.50  
0.65  
0.80  
0.95  
For most applications, the value of the inductor will fall in  
the range of 1μH to 10μH. Its value is chosen based on the  
desired ripple current. Large inductor values lower ripple  
current and small inductor values result in higher ripple  
TDK  
VLF3010AT  
10  
6.8  
4.7  
3.3  
0.67  
0.39  
0.28  
0.17  
0.49  
0.61  
0.70  
0.87  
currents. Higher V or V  
also increases the ripple  
IN  
OUT  
current as shown in Equation 1. A reasonable starting  
point for setting ripple current for the 300mA regulator is  
ΔI = 120mA (40% of 300mA).  
C and C  
Selection  
L
IN  
OUT  
In continuous mode, a worst-case estimate for the input  
current ripple can be determined my assuming that the  
source current of the top MOSFET is a square wave of duty  
VOUT  
1
ΔIL =  
VOUT 1–  
(1)  
ƒ L  
( )( )  
V
IN  
cycle V /V , and amplitude I  
. To prevent large  
OUT IN  
OUT(MAX)  
TheDCcurrentratingoftheinductorshouldbeatleastequal  
to the maximum load current plus half the ripple current  
to prevent core saturation. Thus, a 360mA rated inductor  
shouldbeenoughformostapplications(300mA+60mA).  
For better efficiency, choose a low DCR inductor.  
voltage transients, a low ESR input capacitor sized for the  
maximumRMScurrentmustbeused.ThemaximumRMS  
capacitor current is given by:  
VOUT V – V  
(
)
IN  
OUT  
IRMS IOUT(MAX)  
Inductor Core Selection  
V
IN  
Different core materials and shapes will change the  
size/current and price/current relationship of an induc-  
tor. Toroid or shielded pot cores in ferrite or permalloy  
materials are small and don’t radiate much energy, but  
generally cost more than powdered iron core inductors  
with similar electrical characteristics. The choice of which  
style inductor to use often depends more on the price vs.  
sizerequirementsandanyradiatedeld/EMIrequirements  
than on what the LTC3544B requires to operate. Table 1  
shows typical surface mount inductors that work well in  
LTC3544B applications.  
This formula has a maximum at V = 2V , where I  
RMS  
IN  
OUT  
= I /2. This simple worst-case condition is commonly  
OUT  
used for design. Note that the capacitor manufacturer’s  
ripple current ratings are often based on 2000 hours of  
life (non-ceramic capacitors). This makes it advisable to  
further de-rate the capacitor, or choose a capacitor rated  
at a higher temperature than required. Always consult the  
manufacturer if there is any question.  
The selection of C  
is driven by the required effective  
OUT  
series resistance (ESR). Typically, once the ESR require-  
ment for C  
has been met, the RMS current rating  
OUT  
3544bfa  
9
LTC3544B  
APPLICATIONS INFORMATION  
0.8V V  
5.5V  
OUT  
generally far exceeds the I  
requirement. The  
RIPPLE(P-P)  
is determined by:  
output ripple ΔV  
OUT  
R2  
C
F
1
V
FB  
ΔVOUT ≅ ΔIL ESR +  
8 • ƒ COUT  
R1  
LTC3544B  
GND  
where f = operating frequency, C  
= output capacitance  
OUT  
3544B F02  
and ΔI = ripple current in the inductor. For a fixed output  
L
voltage, the output ripple is highest at maximum input  
Figure 2. Setting the LTC3544B Output Voltage  
voltage since ΔI increases with input voltage.  
L
Keeping the current in the resistors small maximizes the  
efficiency, but making them too small may allow stray  
capacitance to cause noise problems or reduce the phase  
margin of the control loop. It is recommended that the  
total feedback resistor string be kept to under 100k.  
Using Ceramic Input and Output Capacitors  
Higher value, lower cost, ceramic capacitors are now  
widely available in smaller case sizes. Their high ripple  
current, high voltage rating and low ESR make them  
ideal for switching regulator applications. Because the  
LTC3544B’s control loop does not depend on the output  
capacitor’s ESR for stable operation, ceramic capacitors  
can be used freely to achieve very low output ripple and  
small circuit size.  
To improve the frequency response of the control loop, a  
feedforwardcapacitor, C , maybeused. Greatcareshould  
F
betakentoroutethefeedbacklineawayfromnoisesources  
such as the inductor of the SW line.  
Efficiency Considerations  
However, care must be taken when ceramic capacitors  
are used at the input and the output. When a ceramic  
capacitor is used at the input and the power is supplied  
by a wall adapter through long wires, a load step at the  
Theefficiencyofaswitchingregulatorisequaltotheoutput  
power divided by the input power times 100%. It is often  
useful to analyze individual losses to determine what is  
limiting the efficiency and which change would produce  
the most improvement. Efficiency can be expressed as:  
Efficiency = 100% – (L1 + L2 + L3 + ...) where L1, L2, etc.  
are the individual losses as a percentage of input power.  
output can induce ringing at the input, V . At best, this  
IN  
ringing can couple to the output and be mistaken as loop  
instability. At worst, a sudden inrush of current through  
the long wires can potentially cause a voltage spike at V ,  
IN  
large enough to damage the part.  
Although all dissipative elements in the circuit produce  
losses, two main sources usually account for most of the  
When choosing the input and output ceramic capacitors,  
choose the X5R or X7R dielectric formulations. These  
dielectrics have the best temperature and voltage charac-  
teristics of all the ceramics for a given value and size.  
2
lossesinLTC3544Bcircuits:V quiescentcurrentandI R  
IN  
losses.V quiescentcurrentlossdominatestheefficiency  
IN  
2
loss at low load currents, whereas the I R loss dominates  
the efficiency loss at medium to high load currents.  
Output Voltage Programming  
1. The quiescent current is due to two components: the  
DC bias current as given in the electrical characteristics  
and the internal main switch and synchronous switch  
gate charge currents. The gate charge current results  
from switching the gate capacitance of the internal power  
MOSFET switches. Each time the gate is switched from  
high to low to high again, a packet of charge, dQ, moves  
The output voltage is set by tying V to a resistive divider  
according to the following formula:  
FB  
R2  
R1  
VOUT = 0.8V 1+  
The external resistive divider is connected to the output  
allowing remote voltage sensing as shown in Figure 2.  
fromPV toground. TheresultingdQ/dtisthecurrentout  
IN  
of PV that is typically larger than the DC bias current and  
IN  
3544bfa  
10  
LTC3544B  
APPLICATIONS INFORMATION  
where P is the power dissipated by the regulator and θ  
is the thermal resistance from the junction of the die to  
the ambient temperature.  
proportionaltofrequency.BoththeDCbiasandgatecharge  
D
JA  
losses are proportional to PV and thus their effects will  
IN  
be more pronounced at higher supply voltages.  
2
The junction temperature, T , is given by:  
2. I R losses are calculated from the resistances of the  
J
internal switches, R , and external inductor R . In con-  
SW  
L
T = T + T  
R
J
A
tinuousmode, theaverageoutputcurrentowingthrough  
inductor L is “chopped” between the main switch and the  
synchronous switch. Thus, the series resistance looking  
into the SW pin is a function of both top and bottom  
where T is the ambient temperature.  
A
As an example, consider the LTC3544B in dropout at an  
input voltage of 2.5V, a total load current (all four regula-  
tors)of800mAandanambienttemperatureof85°C.From  
the Typical Performance graphs of switch resistance, the  
MOSFET R  
and the duty cycle (DC) as follows:  
DS(ON)  
R
SW  
= (R )(DC) + (R  
DS(ON)TOP  
)(1 – DC)  
DS(ON)BOT  
R
of the 300mA P-channel switch at 85°C can be  
DS(ON)  
The R  
for both the top and bottom MOSFETs can  
DS(ON)  
estimated as 0.67Ω. Therefore, power dissipated by the  
be obtained from the Typical Performance Characteristics  
300mA channel is:  
2
curves. Thus, to obtain I R losses, simply add R to  
SW  
2
P = I  
• R  
= 60mW  
DS(ON)  
D
LOAD  
R and multiply the result by the square of the average  
L
output current.  
Similar analysis on the other channels gives a total power  
dissipation of 138mW. For the 3mm × 3mm QFN package,  
Other losses when in switching operation, including C  
IN  
the θ is 68°C/W. Thus, the junction temperature of the  
JA  
and C  
ESR dissipative losses and inductor core losses,  
OUT  
regulator is:  
generally account for less than 2% total additional loss.  
T = 85°C + (0.138)(68) = 94.4°C  
J
Thermal Considerations  
which is well below the maximum junction temperature  
of 125°C.  
TheLTC3544Brequiresthepackagebackplanemetaltobe  
well soldered to the PC board. This gives the QFN package  
exceptionalthermalproperties,makingitdifficultinnormal  
operation to exceed the maximum junction temperature  
of the part. In most applications the LTC3544B does not  
dissipate much heat due to its high efficiency. In applica-  
tions where the LTC3544B is running at high ambient  
temperature with low supply voltage and high duty cycles,  
such as in dropout, the heat dissipated may exceed the  
maximum junction temperature of the part if it is not well  
thermally grounded. If the junction temperature reaches  
approximately 150°C, the power switches will be turned  
off and the SW nodes will become high impedance.  
Note that at higher supply voltages, the junction tempera-  
ture is lower due to reduced switch resistance R  
.
DS(ON)  
Checking Transient Response  
The regulator loop response can be checked by looking  
at the load transient response. Switching regulators take  
several cycles to respond to a step in load current. When  
a load step occurs, V  
immediately shifts by an amount  
OUT  
equal to (ΔI  
• ESR), where ESR is the effective series  
LOAD  
resistance of C . ΔI  
also begins to charge or dis-  
OUT  
LOAD  
charge C , which generates a feedback error signal. The  
OUT  
regulator loop then acts to return V  
value. During this recovery time V  
to its steady-state  
can be monitored  
OUT  
OUT  
ToavoidtheLTC3544Bfromexceedingthemaximumjunc-  
tion temperature, the user will need to do some thermal  
analysis. The goal of the thermal analysis is to determine  
whether the power dissipated exceeds the maximum  
junction temperature of the part. The temperature rise is  
given by:  
for overshoot or ringing that would indicate a stability  
problem. For a detailed explanation of switching control  
loop theory, see Application Note 76.  
T = P • θ  
JA  
R
D
3544bfa  
11  
LTC3544B  
APPLICATIONS INFORMATION  
2. Does each of the V  
pins connect directly to the  
A second, more severe transient is caused by switching  
in loads with large (>1ꢀF) supply bypass capacitors. The  
discharged bypass capacitors are effectively put in paral-  
FBx  
respective feedback resistors? The resistive dividers  
must be connected between the (+) plate of the cor-  
respondingoutputltercapacitor(e.g.C13)andGNDA.  
If the circuit being powered is at such a distance from  
the part where voltage drops along circuit traces are  
large, consider a Kelvin connection from the powered  
circuit back to the resistive dividers.  
lel with C , causing a rapid drop in V . No regulator  
OUT  
OUT  
can deliver enough current to prevent this problem if the  
load switch resistance is low and it is driven quickly. The  
only solution is to limit the rise time of the switch drive  
so that the load rise time is limited to approximately (25  
• C  
). Thus, a 10ꢀF capacitor charging to 3.3V would  
LOAD  
3. Keep C8 and C9 as close to the part as possible.  
require a 250ꢀs rise time, limiting the charging current  
4. Keep the switching nodes (SWx) away from the sensi-  
to about 130mA.  
tive V nodes.  
FBx  
PC Board Layout Checklist  
5. Keep the ground connected plates of the input and  
output capacitors as close as possible.  
When laying out the printed circuit board, the following  
checklist should be used to ensure proper operation of the  
LTC3544B. These items are also illustrated graphically in  
Figures 3 and 4. Check the following in your layout:  
6. Care should be taken to provide enough space between  
unshielded inductors in order to minimize any trans-  
former coupling.  
1. The power traces, consisting of the PGND trace, the  
GNDA trace, the SW traces, the PV trace and the V  
IN  
CC  
trace should be kept short, direct and wide.  
V
CC  
GNDA  
C8  
2.25V TO 5.5V  
L4  
C15  
V
OUT1  
R15  
R16  
C13  
SW1000  
RUN100  
V
GNDA  
V
FB200A  
CC  
RUN100  
V
FB200B  
V
V
FB300  
FB100  
V
V
FB300  
FB100  
LTC3544B  
RUN200A  
RUN200A  
RUN300  
RUN300  
L2  
SW200A  
SW200A  
RUN200B  
SW300  
RUN200B  
L1  
V
V
OUT3  
SW200B PGND PV  
R5  
R6  
C6  
IN  
C9  
SW200B  
C4  
SW300  
V
OUT4  
V
FB200A  
L3  
R2  
R3  
C3  
C1  
PGND  
OUT2  
PV  
IN  
2.25V TO 5.5V  
R8  
C12  
V
FB200B  
C10  
3544B F03  
R11  
Figure 3. LTC3544B Layout Diagram  
3544bfa  
12  
LTC3544B  
APPLICATIONS INFORMATION  
C1  
C4  
GND  
L1  
L2  
L4  
L3  
C10  
V
CC  
C9  
C2 C3  
PGND  
3544B F04  
Figure 4  
The feedback resistors program the output voltage.  
Minimizing the current in these resistors will maximize  
efficiency at very light loads, but totals on the order of  
200k are a good compromise between efficiency and im-  
munitytoanyadverseeffectsofPCBparasiticcapacitance  
on the feedback pins. Choosing 10μA with 0.8V feedback  
voltage makes R7 = 80k. A close standard 1% resistor is  
76.8k. Using:  
Design Example  
As a design example, consider using the LTC3544B as  
a portable application with a Li-Ion battery. The battery  
provides V ranging from 2.8V to 4.2V. The demand at  
IN  
2.5V is 250mA necessitating the use of the 300mA output  
for this requirement.  
Beginning with this channel, first calculate the inductor  
valueforabout35%ripplecurrent(100mAinthisexample)  
V
0.8  
OUT  
at maximum V . Using a form of equation:  
IN  
R8 =  
– 1 R7 = 163.2k  
2.5V  
2.25MHz 100mA  
2.5V  
4.2V  
L4 =  
1–  
= 4.5µH  
The closest standard 1% resistor is 162k. An optional  
20pFfeedbackcapacitormaybeusedtoimprovetransient  
response. The component values for the other channels  
are chosen in a similar fashion.  
For the inductor, use the closest standard value of 4.7μH.  
A 4.7μF capacitor should be sufficient for the output ca-  
pacitor. A larger output capacitor will attenuate the load  
transient response, but increase the settling time. A value  
Figure 5 shows the complete schematic for this example,  
along with the efficiency curve and transient response for  
the 300mA channel.  
for C = 4.7μF should suffice as the source impedance of  
IN  
a Li-Ion battery is very low.  
3544bfa  
13  
LTC3544B  
APPLICATIONS INFORMATION  
V
SUPPLY  
3.6V  
C10  
4.7μF  
C9  
4.7μF  
15  
7
V
PV  
L2  
4.7μH  
CC  
IN  
L1  
10μH  
16  
4
12  
RUN200B  
SW200B  
RUN100  
SW100  
13  
V
V
V
OUT1  
OUT2  
1.5V  
1.2V  
R3  
R1  
C6  
C5  
93.1k  
59k  
20pF  
20pF  
1
11  
C2  
C1  
4.7μF  
V
V
FB100  
FB200B  
4.7μF  
R4  
107k  
R2  
118k  
LTC3544B  
L4  
4.7μH  
L3  
4.7μH  
3
5
9
8
RUN200A  
SW200A  
RUN300  
SW300  
V
OUT3  
0.8V  
OUT2  
2.5V  
R5  
0Ω  
R7  
162k  
C7  
20pF  
C8  
20pF  
2
10  
C3  
4.7μF  
C4  
4.7μF  
V
V
FB300  
FB200A  
GNDA  
14  
PGND  
6
R6  
100k  
R8  
76.8k  
3544B F05a  
Figure 5  
Efficiency vs Output Current—300mA Channel,  
All Other Channels Off  
Transient Response  
100  
V
A
= 2.5V  
OUT  
90  
80  
70  
60  
50  
40  
30  
20  
10  
0
T
= 25°C  
V
OUT300  
100mV/DIV  
AC COUPLED  
I
L
250mA/DIV  
I
LOAD  
250mA/DIV  
V
V
V
= 2.7V  
= 3.6V  
= 4.2V  
IN  
IN  
IN  
3544B F05c  
V
= 3.6V  
OUT  
= 25°C  
20μs/DIV  
IN  
V
= 2.5V  
T
A
LOAD STEP = 300μA TO 300mA  
0.0001  
0.001  
0.01  
0.1  
1
LOAD CURRENT (A)  
3544B F05b  
3544bfa  
14  
LTC3544B  
PACKAGE DESCRIPTION  
UD Package  
16-Lead Plastic QFN (3mm × 3mm)  
(Reference LTC DWG # 05-08-1691)  
0.70 0.05  
3.50 0.05  
2.10 0.05  
1.45 0.05  
(4 SIDES)  
PACKAGE OUTLINE  
0.25 0.05  
0.50 BSC  
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS  
BOTTOM VIEW—EXPOSED PAD  
PIN 1 NOTCH R = 0.20 TYP  
OR 0.25 × 45° CHAMFER  
R = 0.115  
TYP  
0.75 0.05  
3.00 0.10  
(4 SIDES)  
15 16  
PIN 1  
TOP MARK  
(NOTE 6)  
0.40 0.10  
1
2
1.45 0.10  
(4-SIDES)  
(UD16) QFN 0904  
0.200 REF  
0.25 0.05  
0.50 BSC  
0.00 – 0.05  
NOTE:  
1. DRAWING CONFORMS TO JEDEC PACKAGE OUTLINE MO-220 VARIATION (WEED-2)  
2. DRAWING NOT TO SCALE  
3. ALL DIMENSIONS ARE IN MILLIMETERS  
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE  
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE  
5. EXPOSED PAD SHALL BE SOLDER PLATED  
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION  
ON THE TOP AND BOTTOM OF PACKAGE  
3544bfa  
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.  
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-  
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.  
15  
LTC3544B  
RELATED PARTS  
PART NUMBER  
DESCRIPTION  
COMMENTS  
95% Efficiency, V : 2.5V to 5.5V, V  
LTC3405/LTC3405A 300mA I , 1.5MHz, Synchronous Step-Down DC/DC  
= 0.8V, I = 20μA,  
Q
OUT  
IN  
OUT(MIN)  
OUT(MIN)  
OUT(MIN)  
OUT(MIN)  
OUT(MIN)  
OUT(MIN)  
OUT(MIN)  
OUT(MIN)  
OUT(MIN)  
OUT(MIN)  
OUT(MIN)  
OUT(MIN)  
OUT(MIN)  
Converters  
I
< 1μA, ThinSOTTM Package  
SD  
LTC3406/LTC3406B 600mA I , 1.5MHz, Synchronous Step-Down DC/DC  
96% Efficiency, V : 2.5V to 5.5V, V  
SD  
= 0.6V, I = 20μA,  
Q
OUT  
Converters  
IN  
I
< 1μA, ThinSOT Package  
LTC3407/LTC3407-2 Dual 600mA/800mA I , 1.5MHz/2.25MHz,  
95% Efficiency, V : 2.5V to 5.5V, V  
= 0.6V, I = 40μA,  
Q
OUT  
IN  
Synchronous Step-Down DC/DC Converters  
I
SD  
< 1μA, 10-Lead MSE, DFN Packages  
LTC3409  
600mA I , 1.7MHz/2.6MHz, Synchronous Step-Down 96% Efficiency, V : 1.6V to 5.5V, V  
= 0.6V, I = 65μA,  
Q
OUT  
IN  
DC/DC Converter  
I
SD  
< 1μA, DFN Package  
LTC3410/LTC3410B 300mA I , 2.25MHz, Synchronous Step-Down DC/DC 95% Efficiency, V : 2.5V to 5.5V, V  
= 0.8V, I = 26μA,  
Q
OUT  
IN  
Converters  
I
SD  
< 1μA, SC70 Package  
LTC3411  
LTC3412  
1.25A I , 4MHz, Synchronous Step-Down DC/DC  
95% Efficiency, V : 2.5V to 5.5V, V  
= 0.8V, I = 60μA,  
Q
OUT  
IN  
Converter  
I
SD  
< 1μA, 10-Lead MSE, DFN Packages  
2.5A I , 4MHz, Synchronous Step-Down DC/DC  
95% Efficiency, V : 2.5V to 5.5V, V  
= 0.8V, I = 60μA,  
Q
OUT  
IN  
Converter  
I
SD  
< 1μA, 16-Lead TSSOPE Package  
LTC3441/LTC3442  
LTC3443  
1.2A I , 2MHz, Synchronous Buck-Boost DC/DC  
95% Efficiency, V : 2.4V to 5.5V, V  
: 2.4V to 5.25V, I = 50μA,  
Q
OUT  
IN  
Converters  
I
SD  
< 1μA, DFN Package  
LTC3531/LTC3531-3 200mA I , 1.5MHz, Synchronous Buck-Boost DC/DC 95% Efficiency, V : 1.8V to 5.5V, V  
: 2V to 5V, I = 16μA,  
Q
OUT  
Converters  
IN  
LTC3531-3.3  
I
SD  
< 1μA, ThinSOT, DFN Packages  
LTC3532  
500mA I , 2MHz, Synchronous Buck-Boost DC/DC  
95% Efficiency, V : 2.4V to 5.5V, V  
: 2.4V to 5.25V, I = 35μA,  
Q
OUT  
IN  
Converter  
I
SD  
< 1μA, 10-Lead MSE, DFN Packages  
LTC3547  
Dual 300mA I , 2.25MHz, Synchronous Step-Down  
95% Efficiency, V : 2.5V to 5.5V, V  
= 0.6V, I = 40μA,  
Q
OUT  
IN  
DC/DC Converter  
I
SD  
< 1μA, 8-Lead DFN Package  
LTC3548/LTC3548-1 Dual 400mA/800mA I , 2.25MHz, Synchronous  
95% Efficiency, V : 2.5V to 5.5V, V  
= 0.6V, I = 40μA,  
Q
OUT  
IN  
LTC3548-2  
Step-Down DC/DC Converters  
I
SD  
< 1μA, 10-Lead MSE, DFN Packages  
LTC3561  
1.25A I , 4MHz, Synchronous Step-Down DC/DC  
95% Efficiency, V : 2.5V to 5.5V, V  
= 0.8V, I = 240μA,  
Q
OUT  
IN  
Converter  
I
SD  
< 1μA, DFN Package  
3544bfa  
LT 0308 REV A • PRINTED IN USA  
LinearTechnology Corporation  
1630 McCarthy Blvd., Milpitas, CA 95035-7417  
16  
© LINEAR TECHNOLOGY CORPORATION 2007  
(408) 432-1900 FAX: (408) 434-0507 www.linear.com  

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