LTC4558EUD#TR [Linear]
IC 1-CHANNEL POWER SUPPLY SUPPORT CKT, PQCC20, 3 X 3 MM, 0.75 MM HEIGHT, PLASTIC, QFN-20, Power Management Circuit;
| 型号： | LTC4558EUD#TR |
| 厂家： | 
Linear |
| 描述： | IC 1-CHANNEL POWER SUPPLY SUPPORT CKT, PQCC20, 3 X 3 MM, 0.75 MM HEIGHT, PLASTIC, QFN-20, Power Management Circuit |
| 文件： | 总12页 (文件大小：151K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LTC4558
Dual SIM/Smart Card
Power Supply and Interface
FEATURES
DESCRIPTION
The LTC®4558 provides the power conversion and signal
level translation needed for advanced cellular telephones
to interface with 1.8V or 3V subscriber identity modules
(SIMs). The device meets all requirements for 1.8V and
3V SIMs and contains LDO regulators to power 1.8V or 3V
SIM cards from a 2.7V to 5.5V input. The output voltages
can be set using the two voltage selection pins and up to
50mA of load current can be supplied. A channel select
pindetermineswhichchannelisopenforcommunication.
Separate enable pins for each channel allow both cards to
be powered at once and allow for faster transition from
one channel to the other.
■
Power Management and Control for Two SIM Cards
or Smart Cards
■
Independent 1.8V/3V V Control for Both Cards
CC
■
Supports Simultaneous Powering of Both Cards
■
Fast Channel Switching
Automatic Level Translation
■
■
Dynamic Pull-Ups Deliver Fast Signal Rise Times*
■
Built-In Fault Protection Circuitry
■
Automatic Activation/Deactivation Sequencing
Circuitry
■
Low Operating/Shutdown Current
■
> 10kV ESD on SIM Card Pins
■
Meets EMV Fault Tolerance Requirements
Internal level translators allow controllers operating with
supplies as low as 1.4V to interface with 1.8V or 3V Smart
Cards. Battery life is maximized by a low operating cur-
rent of 65μA and a shutdown current of less than 1μA.
Board area is minimized by the low profile 3mm × 3mm
× 0.75mm leadless QFN package.
■
Low Profile 20-Lead (3mm × 3mm) QFN Package
APPLICATIONS
+
■
GSM, TD-SCDMA and other 3G Cellular Phones
■
Wireless Point-of-Sale Terminals
, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
*Protected by U.S. Patents, including 6356140.
■
Multiple SIM Card Interfaces
TYPICAL APPLICATION
DV
CC
V
BATT
1.4V TO 4.4V 3V TO 6V
DV
CC
Deactivation Sequence
0.1μF
0.1μF
DV
CC
V
BATT
C7
C2
C3
C1
CLKIN
I/OA
I/O
RSTX
RSTIN
RSTA
CLKA
RST
CLK
1.8V/3V
5V/DIV
SIM
DATA
CARD A
CLKX
5V/DIV
V
CCA
V
CC
CLKRUNA
CLKRUNB
GND
μCONTROLLER
1μF
1μF
C5
GND
I/OX
5V/DIV
ENABLEA
ENABLEB
CSEL
C1
C3
C2
C7
V
V
CCB
V
CC
CCX
2V/DIV
CLKB
RSTB
I/OB
CLK
RST
I/O
1.8V/3V
SIM
CARD B
4558 TA02
C
= 1μF
10μs/DIV
VCCX
VSELA
VSELB
GND
C5
LTC4558
4558 TA01
4558fa
1
LTC4558
ABSOLUTE MAXIMUM RATINGS
PACKAGE/ORDER INFORMATION
(Note 1)
TOP VIEW
V
, DV , DATA, RSTIN, CLKIN, CLKRUNA,
BATT CC
CLKRUNB, ENABLEA, ENABLEB, CSEL, VSELA,
VSELB to GND .............................................–0.3V to 6V
I/OA, CLKA, RSTA ........................ –0.3V to VCCA + 0.3V
I/OB, CLKB, RSTB........................ –0.3V to VCCB + 0.3V
20 19 18 17 16
CLKRUNB
CLKRUNA
CSEL
15
14
13
12
11
V
1
2
3
4
5
CCB
DV
CC
21
8
V
BATT
I
(Note 4) .......................................................80mA
Short-Circuit Duration........................... Indefinite
CCA,B
VSELA
V
CCA
V
CCA,B
ENABLEA
CLKA
Operating Temperature Range (Note 3) ...–40°C to 85°C
Storage Temperature Range...................–65°C to 125°C
6
7
9 10
UD PACKAGE
20-LEAD (3mm × 3mm) PLASTIC QFN
T
= 125°C, θ = 68°C/W, θ = 4.2°C/W
JA JC
JMAX
EXPOSED PAD (PIN 21) IS GND, MUST BE SOLDERED TO PCB
ORDER PART NUMBER
LTC4558EUD
UD PART MARKING
LCSH
Order Options Tape and Reel: Add #TR
Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF
Lead Free Part Marking: http://www.linear.com/leadfree/
Consult LTC Marketing for parts specified with wider operating temperature ranges.
ELECTRICAL CHARACTERISTICS The ● denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VBATT = 3.3V, DVCC = 1.8V, CA = CB = 1μF, unless otherwise specified.
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Input Power Supply
●
●
V
Operating Voltage
Operating Current
2.7
5.5
V
BATT
I
V
CCA
V
CCA
= 3V, V
= 0V, I = 0μA
CCA
65
65
100
100
μA
μA
VBATT
CCB
= 1.8V, V
= 0V, I
= I
= 0μA
CCB
CCB
CCA
●
●
●
●
DV Operating Voltage
1.4
5.5
15
1
V
μA
μA
μA
CC
I
I
I
Operating Current
Shutdown Current
Shutdown Current
6
DVCC
DVCC
VBATT
0.1
0.1
DV = 0V
CC
1
SIM Card Supplies
●
●
V
Output Voltage
3V Mode, 0mA < I
< 50mA
CCA,B
2.85
1.71
3.00
1.8
3.15
1.89
V
V
CCA,B
CCA,B
1.8V Mode, 0mA < I
< 30mA
●
●
V
Turn-On Time
0.8
1
1.5
ms
μs
I
= 0mA, ENABLEA,B to V
at 90% Selected Voltage
CCA,B
CCA,B
CCA,B
Channel Switching Time
ENABLEA = ENABLEB = RSTIN = DV
CSEL to RSTB
CC
4558fa
2
LTC4558
ELECTRICAL CHARACTERISTICS The ● denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VBATT = 3.3V, DVCC = 1.8V, CA = CB = 1μF, unless otherwise specified.
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
CLKA,B
●
●
Low Level Output Voltage (V
)
Sink Current = –200μA (Note 2)
Source Current = 200μA (Note 2)
0.2
V
V
OL
High Level Output Voltage (V
)
OH
V
CCA,B
–0.2
●
●
Rise/Fall Time
CLKA,B Frequency
RSTA,B
Loaded with 50pF (10% to 90%) (Note 2)
(Note 2)
16
ns
10
MHz
●
●
Low Level Output Voltage (V
)
Sink Current = –200μA (Note 2)
Source Current = 200μA (Note 2)
0.2
V
V
OL
High Level Output Voltage (V
)
OH
V
CCA,B
–0.2
●
Rise/Fall Time
Loaded with 50pF (10% to 90%) (Note 2)
100
0.3
ns
I/OA, I/OB
●
●
Low Level Output Voltage (V
)
Sink Current = –1mA (V
= 0V) (Note 2)
DATA
V
V
OL
High Level Output Voltage (V
)
OH
Source Current = 20μA (V
= V ) (Note 2)
DVCC
0.85 •
CCA,B
DATA
V
●
●
Rise/Fall Time
Short-Circuit Current
DATA
Loaded with 50pF (10% to 90%) (Note 2)
= 0V (Note 2)
500
10
ns
V
5
mA
DATA
●
●
Low Level Output Voltage (V
)
Sink Current = –500μA (V
= 0V)
0.3
V
V
OL
I/OA,B
High Level Output Voltage (V
)
OH
Source Current = 20μA (V
= V
)
0.8 •
DV
I/OA,B
CCA,B
CC
●
Rise/Fall Time
Loaded with 50pF (10% to 90%)
125
500
ns
ENABLEA, ENABLEB, RSTIN, CLKIN, CSEL, VSELA, VSELB, CLKRUNA, CLKRUNB
Low Input Threshold (V )
●
●
●
0.15 •
V
V
IL
DV
CC
High Input Threshold (V )
0.85 •
DV
IH
CC
Input Current (I /I )
–1
1
μA
IH IL
Note 3: The LTC4558E is guaranteed to meet performance specifications
from 0°C to 85°C. Specifications over the –40°C to 85°C operating
temperature range are assured by design, characterization and correlation
with statistical process controls.
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 4: Based on long-term current density limitations.
Note 2: This specification applies to both Smart Card classes.
4558fa
3
LTC4558
TA = 25°C unless otherwise noted.
TYPICAL PERFORMANCE CHARACTERISTICS
I/OX Short-Circuit Current
VBATT Quiescent Current
(IVBATT – ICC) vs Load Current
250
No Load Supply Current vs VBATT
vs Temperature
7.0
6.5
100
95
90
85
80
75
70
65
60
55
50
V
V
= V
= 5.5V
BATT
T
= 25°C
T
I
= 25°C
CCA CCB
DVCC
CCX
A
A
= 3V
V
= 3.1V
= I
= 0μA
BATT
I/OX SHORTED TO V
CCX
200
150
DROPOUT
6.0
5.5
5.0
4.5
4.0
V
= 3V
CCX
100
50
0
V
= 1.8V
CCX
–40
–15
10
35
60
85
10
100
1000
10000
100000
2.7 3.1 3.5 3.9 4.3
4.7 5.1 5.5
LOAD CURRENT (μA)
V
SUPPLY VOLTAGE (V)
TEMPERATURE (°C)
BATT
4557 G03
4557 G02
4557 G01
VBATT Shutdown Current
vs Supply Voltage
DVCC Shutdown Current
vs Supply Voltage
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.6
V
= 1.8V
DVCC
V
T
= 5.5V
BATT
A
= –40°C TO 85°C
0.5
0.4
0.3
0.2
0.1
0
T
= –40°C
A
T
= 25°C
A
T
= 85°C
A
0.5
0
4.3
5.1
5.5
2.7 3.1
3.5 3.9
4.7
1.2
2.4
1.6 2.0
2.8
3.2 3.6 4.0 4.4 4.8 5.2 5.6
V
BATT
SUPPLY VOLTAGE (V)
DV SUPPLY VOLTAGE (V)
CC
4557 G04
4557 G05
4558fa
4
LTC4558
TA = 25°C unless otherwise noted.
TYPICAL PERFORMANCE CHARACTERISTICS
Data – I/O Channel, CL = 40pF
I/0X
1V/DIV
DATA
1V/DIV
4557 G06
200ns/DIV
Deactivation Sequence,
CVCCX = 1μF
RSTX
5V/DIV
CLKX
5V/DIV
I/OX
5V/DIV
V
CCX
2V/DIV
4557 G07
20μs/DIV
4558fa
5
LTC4558
PIN FUNCTIONS
DV (Pin 2): Power. Reference voltage for the control
path to both cards. One of the cards may be selected to
communicateviatheDATApinatatime.Thepinpossesses
a weak pull-up current source, allowing the controller to
useanopendrainoutputandmaintainaHIGHstateduring
CC
logic.
V
(Pin 3): Power. Supply voltage for the analog sec-
BATT
tions of the LTC4558.
shutdown, as long as DV is powered.
CC
V
,V (Pins 4, 1): Card Socket. The V ,V
pins
CCA CCB
CCA CCB
RSTIN (Pin 9): Input. The RSTIN pin supplies the reset
signal to the cards. It is level shifted and transmitted
directly to the RST pin of the selected card.
should be connected to the V pins of the respective card
CC
CCA CCB
sockets.TheactivationoftheV ,V pinsarecontrolled
by ENABLEA and ENABLEB. They can be set to 1.8V or 3V
via the VSELA and VSELB inputs.
CLKIN (Pin 10): Input. The CLKIN pin supplies the clock
signal to the cards. It is level shifted and transmitted di-
rectly to the CLK pin of the selected card. If CLKRUNA,B
is HIGH, the clock signal will be transmitted to the CLKA,B
pin, regardless of whether that card is selected, as long
as that card socket is enabled.
CLKA,CKLB (Pins 5, 20): Card Socket. The CLKA,CKLB
pins should be connected to the CLK pins of the respective
cardsockets. TheCLKA,CKLBsignalsarederivedfromthe
CLKIN pin. They provide a level shifted CLKIN signal to
the selected card. The CLKA,CKLB pins are gated off until
V
,V
attain their correct values. When a card socket
ENABLEA, ENABLEB (Pins 11, 17): Inputs. The ENABLEA
and ENABLEB pins enable or disable channel A and chan-
nel B, respectively.
CCA CCB
is deselected, its CLK pin may be left active or brought
LOW using the CLKRUNA, CLKRUNB pins.
RSTA,RSTB (Pins 6, 19): Card Socket. The RSTA,RSTB
pins should be connected to the RST pins of the respec-
tive card sockets. The RSTA,RSTB signals are derived
from the RSTIN pin. When a card is selected, its RST
pin follows RSTIN. The RSTA,RSTB pins are gated off
VSELA, VSELB (Pins 12, 16): Inputs. The VSELA and
VSELB pins select the voltage level of each set of SIM/
Smart Card pins. Bringing either of these pins HIGH will
set the output level of its respective channel to 3V. Bring-
ing either of these pins LOW will set the output level of
its respective channel to 1.8V.
until V ,V
attain their correct values. When a card
CCA CCB
socket is deselected, the state of its RST pin is latched to
its current state.
CSEL (Pin 13): Input. The CSEL pin selects which set of
SIM/Smart Card pins are active.
I/OA,I/OB (Pins 7, 18): Card Socket. The I/OA,I/OB pins
should be connected to the I/O pins of the respective card
sockets. When a card is selected, its I/O pin transmits/re-
ceives data to/from the DATA pin. The I/OA,I/OB pins are
CLKRUNA,CLKRUNB(Pins14,15):Inputs.TheCLKRUNA
and CLKRUNB inputs are used to select whether the clock
signal is always sent to card sockets that are enabled or
whether the clock is gated with the CSEL pin.
gated off until V ,V
attain their correct values.
CCA CCB
Exposed Pad (Pin 21): Ground. This ground pad must be
soldered directly to a PCB ground plane.
DATA (Pin 8): Input/Output. Microcontroller side data I/O
pin.TheDATApinprovidesthebidirectionalcommunication
4558fa
6
LTC4558
BLOCK DIAGRAM
DV
V
CC
BATT
3
2
V
CCA
4
LDOA
LDOB
1
V
CCB
DV
CC
18
I/OB
I/OA
7
6
RSTA
19 RSTB
CLKA
5
20 CLKB
CLKRUNA 14
15 CLKRUNB
DV
CC
DATA
8
9
RSTIN
CONTROL
LOGIC
CLKIN 10
21
GND
13
12
11
16
17
CSEL VSELA ENABLEA VSELB ENABLEB
4558fa
7
LTC4558
OPERATION
The LTC4558 features two independent SIM/Smart Card
channels. Only one of these channels may be open for
communication at a time however both channels can be
enabled and made ready for communication using the
ENABLEA and ENABLEB pins. This allows faster transi-
tion from one channel to the other. Each channel is able
to produce two voltage levels, 1.8V and 3V. The channel
selectionandvoltageselectionarecontrolledbytheCSEL,
VSELA and VSELB pins as shown in the table below:
Dynamic Pull-Up Current Sources
Thecurrentsourcesonthebidirectionalpins(DATA,I/OA,B)
are dynamically activated to achieve a fast rise time with
a relatively small static current. Once a bidirectional pin
is relinquished, a small start-up current begins to charge
the node. An edge rate detector determines if the pin is
released by comparing its slew rate with an internal refer-
ence value. If a valid transition is detected, a large pull-up
current enhances the edge rate on the node. The higher
slew rate corroborates the decision to charge the node
thereby affecting a dynamic form of hysteresis.
Table 1. Channel and Voltage Truth Table
SELECTED
CARD
VOLTAGES
CSEL
VSELA
VSELB
A
B
LOCAL
SUPPLY
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
A
A
A
A
B
B
B
B
1.8V
1.8V
3V
1.8V
3V
V
+
REF
I
START
1.8V
3V
–
3V
dv
dt
4558 F01
1.8V
1.8V
3V
1.8V
3V
BIDIRECTIONAL
PIN
1.8V
3V
3V
Figure 1. Dynamic Pull-Up Current Source
Bidirectional Channels
The bidirectional channels are level shifted to the appro-
priate V voltages at the I/OA,B pins. An NMOS pass
Reset Channels
When a card is selected, the reset channel provides a level
shifted path from the RSTIN pin to the RST pin of the
selected card. When a card is deselected, the last state of
the RSTA,B pin is latched. This allows a deselected card to
remain active, and therefore eliminates delays associated
with card initialization.
CCA,B
transistorperformsthelevelshifting.ThegateoftheNMOS
transistor is biased such that the transistor is completely
off when both sides have relinquished the channel. If one
side of the channel asserts a LOW, then the transistor will
conveytheLOWtotheotherside.Notethatcurrentpasses
from the receiving side of the channel to the transmitting
side. The low output voltage of the receiving side will be
dependent upon the voltage at the transmitting side plus
the IR drop of the pass transistor.
Clock Run Mode
VariousSIM/SmartCardsmayhavedifferentrequirements
for the state of the clock pin when the channel is not open
forcommunication.TheCLKRUNA,Bpinsallowtheuserto
select whether the clock is brought LOW after the channel
is deselected or allowed to run. If a channel is enabled,
bringing its CLKRUN pin HIGH will transmit the clock to
the corresponding card socket, whether or not the channel
is selected using the CSEL.
When a card socket is selected, it becomes a candidate
to drive data on the DATA pin and likewise receive data
from the DATA pin. When a card socket is deselected, its
I/O pin will be pulled HIGH and communication with the
DATA pin will be disabled. If both channels are disabled,
a weak pull-up ensures that the DATA pin is held HIGH,
as long as DV is powered.
CC
4558fa
8
LTC4558
OPERATION
Activation/Deactivation
Fault Detection
The V , I/OA,B, RSTA,B, CLKA,B and DATA pins are all
protected against short-circuit faults. While there are no
logic outputs to indicate that a fault has occurred, these
pins will be able to tolerate the fault condition until it has
been removed.
Activationanddeactivationsequencingishandledbybuilt-
in circuitry. Each channel may be activated or deactivated
independently of the other. The activation sequence for
each channel is initiated by bringing the ENABLEA,B pin
HIGH. The activation sequence is outlined below:
CCA,B
1. The RSTA,B, CLKA,B and I/OA,B pins are held LOW.
The V
, I/OA,B, and RSTA,B pins possess fault protec-
CCA,B
tion circuitry which will limit the current available to the
2. V
is enabled.
CCA,B
pins. Each V pin is capable of supplying approximately
90mA (typ) before the output voltage is reduced.
CC
3. After V
is stable at its selected level, the I/OA,B
CCA,B
and RSTA,B channels are enabled.
TheCLKA,Bpinsaredesignedtotoleratefaultsbyreducing
the current drive capability of their output stages. After a
fault is detected by the internal fault detection logic, the
logic waits for a fault detection delay to elapse before
reducing the current drive capability of the output stage.
The reduced current drive allows the LTC4558 to detect
when the fault has been removed.
4. The clock channel is enabled on the rising edge of the
second clock cycle after the I/OA,B pin is enabled.
The deactivation sequence is initiated by bringing the
ENABLEA,B pin LOW. The deactivation sequence is out-
lined below:
1. The reset channel is disabled and RSTA,B is brought
LOW.
2. The clock channel is disabled and the CLKA,B pin is
brought LOW two clock cycles after ENABLEA,B is
brought LOW. If the clock is not running, the clock
channel will be disabled approximately 9μs after the
ENABLEA,B pin is brought LOW.
3.TheI/OchannelisdisabledandtheI/OA,Bpinisbrought
LOW approximately 9μs after the ENABLEA,B pin is
brought LOW.
4. V
will be depowered after the I/OA,B pin is brought
CCA,B
LOW.
The activation or deactivation sequences will take place
every time a card channel is enabled or disabled. When
a channel is deselected using the CSEL pin, the RSTA,B
state is latched, the I/OA,B channel becomes high imped-
ance and CLKA,B is brought LOW after a maximum of two
clock cycles.
4558fa
9
LTC4558
APPLICATIONS INFORMATION
10kV ESD Protection
packing density but poor performance over their rated
voltage or temperature ranges. Under certain voltage
and temperature conditions Y5V, X5R and X7R ceramic
capacitors can be compared directly by case size rather
than specified value for a desired minimum capacitance.
All Smart Card pins (CLKA,B, RSTA,B, I/OA,B, V
and
CCA,B
GND) can withstand over 10kV of human body model ESD
in-situ. In order to ensure proper ESD protection, careful
board layout is required. The GND pin should be tied di-
rectly to a ground plane. The V
capacitors should be
The V
outputs should be bypassed to GND with a 1μF
CCA,B
CCA,B
located very close to the V
pins and tied immediately
capacitor. A low ESR ceramic capacitor is recommended
on each V pin to ensure ESD compliance.
CCA,B
to the ground plane.
CC
V
and DV should be bypassed with 0.1μF ceramic
CC
BATT
capacitors.
Capacitor Selection
AtotaloffourcapacitorsisrequiredtooperatetheLTC4558.
An input bypass capacitor is required at V and DV .
Compliance Testing
BATT
CC
Output bypass capacitors are required on each of the
Inductance due to long leads on type approval equipment
cancauseringingandovershootthatleadstotestingprob-
lems.Smallamountsofcapacitanceanddampingresistors
can be included in the application without compromising
thenormalelectricalperformanceoftheLTC4558orSmart
Cardsystem.Generallya100Ωresistoranda20pFcapaci-
tor will accomplish this, as shown in Figure 2.
Smart Card V pins.
CC
There are several types of ceramic capacitors available,
each having considerably different characteristics. For
example, X7R ceramic capacitors have excellent voltage
andtemperaturestabilitybutrelativelylowpackingdensity.
Y5V and X5R ceramic capacitors have apparently higher
1μF
LTC4558
V
CCA,B
20pF
100Ω
100Ω
100Ω
CLKA,B
RSTA,B
I/OA,B
SMART
CARD
20pF
SOCKET
20pF
20pF
4558 F02
Figure 2. Additional Components for Improved Compliance Testing
4558fa
10
LTC4558
PACKAGE DESCRIPTION
UD Package
20-Lead Plastic QFN (3mm × 3mm)
(Reference LTC DWG # 05-08-1720 Rev A)
0.70 0.05
3.50 0.05
(4 SIDES)
1.65 0.05
2.10 0.05
PACKAGE
OUTLINE
0.20 0.05
0.40 BSC
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED
BOTTOM VIEW—EXPOSED PAD
PIN 1 NOTCH
R = 0.20 TYP
OR 0.25 × 45°
CHAMFER
R = 0.115
TYP
0.75 0.05
3.00 0.10
(4 SIDES)
R = 0.05
TYP
19 20
PIN 1
TOP MARK
(NOTE 6)
0.40 0.10
1
2
1.65 0.10
(4-SIDES)
(UD20) QFN 0306 REV A
0.200 REF
0.20 0.05
0.40 BSC
0.00 – 0.05
NOTE:
1. DRAWING IS NOT A JEDEC PACKAGE OUTLINE
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION
ON THE TOP AND BOTTOM OF PACKAGE
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Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
11
LTC4558
TYPICAL APPLICATION
DV
V
BATT
CC
1.4V TO 4.4V 3V TO 6V
DV
CC
C4
0.1μF
C3
0.1μF
DV
V
CC
BATT
I/OA
C7
C2
C3
C1
CLKIN
I/O
RSTIN
RSTA
CLKA
RST
CLK
1.8V/3V
SIM
DATA
CARD A
V
CCA
V
CLKRUNA
CLKRUNB
CC
C1
GND
μCONTROLLER
1μF
C5
GND
C2
1μF
ENABLEA
ENABLEB
CSEL
C1
C3
C2
C7
V
CCB
V
CC
CLKB
RSTB
I/OB
CLK
RST
I/O
1.8V/3V
SIM
CARD B
VSELA
VSELB
GND
C5
LTC4558
4558 TA01a
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
V : 2.6V to 6.6V, V
LTC1555L/
LTC1555L-1.8
1MHz, SIM Power Supply and Level
Translator for 1.8V/3V/5V SIM Cards
= 1.8V/3V/5V, I = 32μA, I < 1μA, SSOP16
Q SD
IN
OUT
OUT
LTC1555/LTC1556
LTC1755/LTC1756
650kHz, SIM Power Supply and Level
Translator for 3V/5V SIM Cards
V : 2.7V to 10V, V
IN
= 3V/5V, I = 60μA, I < 1μA, SSOP16, SSOP20
Q SD
850kHz, Smart Card Interface with
Serial Control for 3V/5V Smart Card
Applications
V : 2.7V to 7V, V
= 3V/5V, I = 60μA, I < 1μA, SSOP16, SSOP24
Q SD
IN
OUT
LTC1955
Dual Smart Card Interface with Serial
Control for 1.8V/3V/5V Smart Card
Applications
V : 3V to 5.5V, V
= 1.8V/3V/5V, I = 200μA, I < 1μA, QFN32
Q SD
IN
OUT
LTC1986
LTC4555
LTC4556
LTC4557
900kHz, SIM Power Supply for 3V/5V
SIM Cards
V : 2.6V to 4.4V, V
= 3V/5V, I = 14μA, I < 1μA, ThinSOT
IN
OUT Q SD
SIM Power Supply and Level Translator V : 3V to 6V, V
for 1.8V/3V SIM Cards
= 1.8V/3V, I = 40μA, I < 1μA, QFN16
Q SD
IN
OUT
Smart Card Interface with Serial
Control
V : 2.7V to 5.5V, V
= 1.8V/3V/5V, I = 250μA, I < 1μA, 4 × 4 QFN24
Q SD
IN
OUT
OUT
Dual SIM/Smart Card Power Supply
and Level Translator for 1.8V/3V Cards
V : 2.7V to 5.5V, V
IN
= 1.8V/3V, I = 250μA, I < 1μA, QFN16
Q SD
ThinSOT is a trademark of Linear Technology Corporation.
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LT 0407 REV A • PRINTED IN USA
LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
12
●
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© LINEAR TECHNOLOGY CORPORATION 2007
(408) 432-1900 FAX: (408) 434-0507 www.linear.com
相关型号：
LTC4558EUD#TRPBF
LTC4558 - Dual SIM/Smart Card Power Supply and Interface; Package: QFN; Pins: 20; Temperature Range: -40°C to 85°C
Linear
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