LTC5100_技术文档

LTC5100

3.3V, 3.2Gbps VCSEL Driver

U

DESCRIPTIO

FEATURES

The LTC^®5100 is a 3.2Gbps VCSEL driver offering an

unprecedented level of integration and high speed perfor-

mance. The part incorporates a full range of features to

ensure consistently outstanding eye diagrams. The data

inputs are AC coupled, eliminating the need for external

capacitors. The LTC5100 has a precisely controlled 50Ω

output that is DC coupled to the laser, allowing arbitrary

placement of the IC. No coupling capacitors, ferrite beads

or external transistors are needed, simplifying layout,

reducing board area and the risk of signal corruption. The

unique output stage of the LTC5100 confines the modula-

tioncurrenttothegroundsystem, isolatingthehighspeed

signal from the power supply to minimize RFI.

■

155Mbps to 3.2Gbps Laser Diode Driver for VCSELs*

■

60ps Rise and Fall Times, 10ps Deterministic Jitter

■

Eye Diagram is Stable and Consistent Across

Modulation Range and Temperature

■

1mA to 12mA Modulation Current

■

Easy Board Layout, Laser can be Remotely Located

if Desired

■

No Input Matching or AC Coupling Components

Needed

■

On-Chip ADC for Monitoring Critical Parameters

Digital Setup and Control with I²C^TMSerial Interface

■

Emulation and Set-Up Software Available**

■

Operates Standalone or with a Microprocessor

■

On-Chip DACs Eliminate External Potentiometers

TheLTC5100supportsfullyautomatedproductionwithits

extensivemonitoringandcontrolfeatures.Integrated10-bit

DACseliminatetheneedforexternalpotentiometers.Anon-

board 10-bit ADC provides the laser current and voltage,

as well as monitor diode current and temperature. Status

informationisavailablefrom theI²Cserialinterfaceforfeed-

back and statistical process control.

■

Constant Current or Automatic Power Control

■

First and Second Order Temperature Compensation

■

On-Chip Temperature Sensor

■

Extensive Eye Safety Features

■

Single 3.3V Supply

■

4mm × 4mm QFN Package

U

APPLICATIO S

An internal digital controller compensates laser tempera-

ture drift and provides extensive laser safety features.

■

Gigabit Ethernet and Fibre Channel Transceivers

■

SFF and SFP Transceiver Modules

, LTC and LT are registered trademarks of Linear Technology Corporation.

I²C is a trademark of Philips Electronics N.V.

*Vertical Cavity Surface Emitting Laser

**Downloadable from www.linear.com

■

Proprietary Fiber Optic Links

U

TYPICAL APPLICATIO

3.3V

24LC00 EEPROM

IN SOT-23 PACKAGE

V

DD

SDA

MD

ADC

DAC

SCL

3.2Gbps Electrical Eye Diagram

DIGITAL

CONTROLLER

10nF

SRC

EN

FAULT

50Ω

1mA/DIV

MODA

MODB

ARBITRARY

DISTANCE

+

IN

+

–

100Ω

SERIALIZER

–

IN

3.2Gbps

MODULATOR

50ps/DIV

5100 TA01

V

SS

5100 F01

WARNING: POTENTIAL EYE HAZARD.

SEE “EYE SAFETY INFORMATION”

Figure 1. VCSEL Transmitter with Automatic Power Control

sn5100 5100fs

1

LTC5100

W W U W

U

W

U

ABSOLUTE AXI U RATI GS

PACKAGE/ORDER I FOR ATIO

(Note 1)

V_DD, V_DD(HS)............................................................. 4V

ORDER PART

TOP VIEW

IN⁺, IN^–(Cml_en = 1) (Note 6)

NUMBER

Peak Voltage........... V_DD(HS)– 1.2V to V_DD(HS)+ 0.3V

Average Voltage...... V_DD(HS)– 0.6V to V_DD(HS)+ 0.3V

IN⁺, IN^–(Cml_en = 0) (Note 4).. –0.3V to V_DD(HS)+ 0.3V

Cml_en = 0 (Note 4)

16 15 14 13

LTC5100EUF

V

1

2

3

4

12

V

SS

+

IN

V

11 MODA

17

–

MODB

10

9

Peak Difference Between IN⁺and IN^–.............. ±2.5V

Average Difference Between IN⁺and IN^–....... ±1.25V

MODA, MODB (Transmitter Disabled) ....–0.3V to 2.75V

MODA, MODB

V

SS

5

6

7

8

UF PART MARKING

5100

UF PACKAGE

16-LEAD (4mm × 4mm) PLASTIC QFN

(Transmitter Enabled) ............ V_DD(HS)– 2.75V to 2.75V

EN, SDA, SCL, FAULT .....................–0.3V to V_DD+ 0.3V

MD, SRC................................................... –0.3V to V_DD

Ambient Operating Temperature Range.. –40°C to 85°C

Storage Temperature Range ................ –65°C to 125°C

T_JMAX= 125°C, θ_JA= 37°C/W

EXPOSED PAD IS V_SS(PIN 17)

MUST BE SOLDERED TO PCB GROUND PLANE

Consult LTC Marketing for parts specified with wider operating temperature ranges.

ELECTRICAL CHARACTERISTICS

The ● denotes the specifications which apply over the full operating

temperature range, otherwise specifications are at T_A= 25°C; V_DD= V_DD(HS)= 3.3V, I_S= 24mA; I_M= 12mA (I_MPP= 24mA); 49.9Ω, 1%

resistor from SRC (Pin 14) to MODA (Pin 11); 50Ω, 1% load AC coupled to MODB (Pin 10); 10nF, 10% capacitor from SRC (Pin 14) to

V_SS; Cml_en = 0, Lpc_en = 1, transmitter enabled, unless otherwise noted. Test circuit in Figure 5.

PARAMETER

Power Supply

CONDITIONS

MIN

TYP

MAX

UNITS

V

, V

Operating Voltage

●

3.135

3.3

3.465

V

DD DD(HS)

V

+ V

Quiescent Current,

V

= 3.465V

DD

DD(HS)

Excluding the SRC Pin Current (Note 2)

Transmitter Disabled, Power_down_en = 1

4.5

54

mA

Transmitter Enabled, Is_rng = Im_rng = 3

Impp = 24mA

+

–

High Speed Data Inputs (IN and IN Pins) (Test Circuit, Figure 5)

Input Signal Amplitude

Peak-to-Peak Differential Voltage (The Single-

Ended Peak-to-Peak Voltage is One Half the

Differential Voltage)

500 to 2400

mV

P-P

Common Mode Input Signal Range (Note 3)

Differential Input Resistance

Cml_en = 0 (Note 4)

0

V

Ω

DD(HS)

80 to 120

50

Common Mode Input Resistance

Open-Circuit Voltage

Cml_en = 0 (Note 5)

kΩ

V

1.65

SRC Pin Current, I

S

Full-Scale I Current

Is_rng = 0

Is_rng = 1

Is_rng = 2

Is_rng = 3

6

9

mA

S

12

18

24

18

27

36

Minimum Operating Current (Note 7)

Resolution

1/16 of Full-Scale I Current

S

10

Bits

V

SRC Pin Voltage Range

1.2

V

DD

–

200mV

sn5100 5100fs

2

LTC5100

ELECTRICAL CHARACTERISTICS

The ● denotes the specifications which apply over the full operating

temperature range, otherwise specifications are at T_A= 25°C; V_DD= V_DD(HS)= 3.3V, I_S= 24mA; I_M= 12mA (I_MPP= 24mA); 49.9Ω, 1%

resistor from SRC (Pin 14) to MODA (Pin 11); 50Ω, 1% load AC coupled to MODB (Pin 10); 10nF, 10% capacitor from SRC (Pin 14) to

V_SS; Cml_en = 0, Lpc_en = 1, transmitter enabled, unless otherwise noted. Test circuit in Figure 5.

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

Laser Bias Current, I

B

Full-Scale Current (Note 8)

Is_rng = 0

Is_rng = 1

Is_rng = 2

Is_rng = 3

6 – I

9 – I

mA

M

12 – I

18 – I

24 – I

18 – I

27 – I

36 – I

M

Absolute Accuracy

SRC Pin and MODA, MODB Pin Currents Within

Specified Voltage Ranges

±25

%

Resolution

10

Bits

ppm/°C

Linear Tempco Resolution

Linear Tempco Range

Second Order Tempco Resolution

Second Order Tempco Range

Temperature Stability

Off-State Leakage

122

±15625

3.81

2

ppm/°C

2

±488

±500

ppm/°C

Ib_tc1 = 0, Ib_tc2 = 0

ppm/°C

µA

Transmitter Disabled, V

= 1.2V

50

SRC

MODA, MODB Pin Current, I

M

Full Scale, Peak-to-Peak Modulation Current (Note 9)

Im_rng = 0

Im_rng = 1

Im_rng = 2

Im_rng = 3

6

9

mA

12

18

24

18

27

36

1/8 of Full-Scale Peak-to-Peak

Modulation Current

Minimum Operating Current (Note 10)

Resolution (Note 11)

9

Bits

ppm/°C

V

Current Stability

Im_tc1 = 0, Im_tc2 = 0

±500

Voltage Range

Peak Transient Voltage on MODA and MODB

1.2

2.7

Absolute Accuracy of the Modulation Current

Linear Tempco Resolution

Linear Tempco Range

±25

122

%

ppm/°C

±15625

3.81

±484

3.2

2

Second Order Tempco Resolution

Second Order Tempco Range

Maximum Bit Rate

ppm/°C

2

ppm/°C

Gbps

ps

Modulation Current Rise and Fall Times

20% to 80% Measured with K28.5 Pattern at

2.5Gbps

60

Deterministic Jitter, Peak-to-Peak (Note 12)

Random Jitter, RMS (Note 13)

Pulse Width Distortion

Measured with K28.5 Pattern at 3.2Gbps

10

1

ps

RMS

10

ps

Automatic Power Control (Note 14)

Minimum Operating Current for the Monitor Diode

(Note 15)

20% of Full Scale

Monitor Diode Current

Temperature Stability

Imd_tc1 = 0, Imd_tc2 = 0

≤ 1600µA

±500

ppm/°C

Monitor Diode Bias Voltage (Note 16)

I

1.45

V

MD

sn5100 5100fs

3

LTC5100

ELECTRICAL CHARACTERISTICS

The ● denotes the specifications which apply over the full operating

temperature range, otherwise specifications are at T_A= 25°C; V_DD= V_DD(HS)= 3.3V, I_S= 24mA; I_M= 12mA (I_MPP= 24mA); 49.9Ω, 1%

resistor from SRC (Pin 14) to MODA (Pin 11); 50Ω, 1% load AC coupled to MODB (Pin 10); 10nF, 10% capacitor from SRC (Pin 14) to

V_SS; Cml_en = 0, Lpc_en = 1, transmitter enabled, unless otherwise noted. Test circuit in Figure 5.

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

Automatic Power Control (Note 14)

Temperature Compensation (Note 17)

Linear Tempco Resolution

Linear Tempco Range

ADC

254 • Imd_nom/1024

ppm/°C

±32300 • Imd_nom/1024

Resolution

10

Bits

Source Current Measurement, I (SRC Pin Current)

S

Full Scale

Is_rng = 0

Is_rng = 1

Is_rng = 2

Is_rng = 3

9

mA

18

27

36

Accuracy

±3% of Full Scale

±25% of Reading

Average Modulation Current Measurement, I (Note 18)

M

Full Scale

Im_rng = 0

9

mA

Im_rng = 1

Im_rng = 2

Im_rng = 3

18

27

36

Accuracy

±3% of Full Scale

±25% of Reading

Laser Diode Voltage Measurement

Full Scale

3.5

V

Accuracy

±150mV ±10% of Reading

Monitor Diode Current Measurement (Note 19)

Full Scale

Imd_rng = 0

Imd_rng = 1

Imd_rng = 2

Imd_rng = 3

34

136

544

2176

µA

Zero Scale

ADC Code = 0

1/8 of Full Scale

0.2

Resolution Relative to Reading

%

Accuracy

±25% of Reading

Temperature Measurement

Full Scale

Celsius

239

°C

Sensitivity

0.500

°C/LSB

Termination Resistor Voltage Measurement

Full Scale

Is_rng = 0

Is_rng = 1

Is_rng = 2

Is_rng = 3

400

800

1200

1600

mV

Accuracy

±30mV ±10% of Reading

Safety Shutdown, Undervoltage Lockout (UVLO)

Undervoltage Detection

V

Decreasing

2.8

V

DD

Undervoltage Detection Hysteresis

150

mV

sn5100 5100fs

4

LTC5100

ELECTRICAL CHARACTERISTICS

The ● denotes the specifications which apply over the full operating

temperature range, otherwise specifications are at T_A= 25°C; V_DD= V_DD(HS)= 3.3V, I_S= 24mA; I_M= 12mA (I_MPP= 24mA); 49.9Ω, 1%

resistor from SRC (Pin 14) to MODA (Pin 11); 50Ω, 1% load AC coupled to MODB (Pin 10); 10nF, 10% capacitor from SRC (Pin 14) to

V_SS; Cml_en = 0, Lpc_en = 1, transmitter enabled, unless otherwise noted. Test circuit in Figure 5.

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

Bias Current Limit, I

Set Point Resolution

Set Point Range

B(LIMIT)

7

Bits

Is_rng = 0

Is_rng = 1

Is_rng = 2

Is_rng = 3

9

mA

18

27

36

Optical Power Limit

Overpower Limit

Automatic Power Control Mode Only, Apc_en = 1

Expressed in % Over the Imd Set Point

Expressed in % Under the Imd Set Point

50

%

µs

Underpower Limit

–50

100

Safety Shutdown Response Time

Time from the Fault Occurance to Reduction of

the Laser Bias Current to 10% of Nominal

FAULT Output, Open-Drain Mode, Flt_drv_mode = 0

Output Low Voltage

I

= 3.3mA

0.4

10

V

OL

Output High Leakage Current

V

= 2.4V

µA

FAULT

FAULT Output, Open-Drain Mode with 330µA Internal Pull Up, Flt_drv_mode = 1

Output Low Voltage

Output High Current

I

= 3.3mA

0.4

V

OL

V

= 2.4V

–280

–425

µA

FAULT

FAULT Output, Open-Drain Mode with 500µA Internal Pull Up, Flt_drv_mode = 2

Output Low Voltage

Output High Current

I

= 3.3mA

V

OL

V

= 2.4V

µA

FAULT

FAULT Output, Complementary Drive Mode, Flt_drv_mode = 3

Output High Voltage

Output Low Voltage

I

= –3.3mA

= 3.3mA

2.4

2

V

OH

OL

0.4

0.8

EN Input, Ib_gain or (Apc_gain in APC Mode) = 16, Im_gain = 4, Is_rng = 0, Im_rng = 0

Input Low Voltage

Input High Voltage

V

Input Low Current

Input High Current

Input Low Current

Input High Current

Transmit Enable Time

En_polarity = 0 (EN Active Low), V = 0V

–10

–10 to 10

10

µA

ms

EN

En_polarity = 0 (EN Active Low), V = V

EN

DD

En_polarity = 1 (EN Active High), V = 0V

EN

En_polarity = 1 (EN Active High), V = V

EN

DD

Time from Active Transition on EN to 95% of

Nominal Laser Power and 95% of Full Modulation.

First Time Transmission is Enabled After Power

On or with Rapid_restart_en = 0

100

Transmit Re-Enable Time

Transmit Disable Time

Time from Active Transition on EN to 95% of

Nominal Laser Power and 95% of Full Modulation.

When Transmission is Re-Enabled After the First

Time and with Rapid_restart_en = 1

1

ms

Time from Inactive Transition on EN to 5% of

Nominal Laser Power

10

µs

Minimum Pulse Width Required to Clear

a Latched Fault

10

sn5100 5100fs

5

LTC5100

ELECTRICAL CHARACTERISTICS

The ● denotes the specifications which apply over the full operating

temperature range, otherwise specifications are at T_A= 25°C. V_DD= V_DD(HS)= 3.3V, I_S= 24mA; I_M= 12mA (I_MPP= 24mA); 49.9Ω, 1%

resistor from SRC (Pin 14) to MODA (Pin 11); 50Ω, 1% load AC coupled to MODB (Pin 10); 10nF, 10% capacitor from SRC (Pin 14) to

V_SS; Cml_en = 0, Lpc_en = 1, transmitter enabled, unless otherwise noted. Test circuit in Figure 5.

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

SCL, SDA

SCL, SDA Input Low Voltage, V

–0.5

0.7 •

0.3 •

V

IL

V

DD

SCL, SDA Input High Voltage, V

V

+

IH

DD

0.5

V

DD

SCL, SDA Input Low Current (Note 21)

SCL, SDA Input High Current (Note 21)

SCL, SDA Output Low Voltage

Hysteresis

V

, V

= 0.1 • V

= 0.9 • V

–100

µA

V

SDA SCL

DD

, V

SDA SCL

DD

I

= 3mA

0

4

0.4

OL

280

mV

Serial Interface Timing (Note 20)

SCL Clock Frequency

100

kHz

Hold Time (Repeated) START Condition. After This

Period the First Clock Pulse is Generated

µs

Low Period of the SCL Clock

High Period of the SCL Clock

Set-Up Time for a Repeated START Condition

Data Hold Time

4.7

4

µs

ns

4.7

0

3.45

Data Set-Up Time

250

Input Rise Time of Both SDA and SCL Signals

1000

300

Output Fall Time of SCL and SDA from V

IL(MAX)

to

IH(MIN)

V

with a Bus Capacitance from 10pF to 400pF

Set-Up Time for STOP Condition

4

µs

pF

V

Bus Free Time Between a STOP and START Condition

Capacitive Load for Each Bus Line

4.7

400

Noise Margin at the LOW Level for Each Connected

Device (Including Hysteresis)

0.1 •

V

DD

Noise Margin at the HIGH Level for Each Connected

Device (Including Hysteresis)

0.2 •

V

DD

Note 1: Absolute Maximum Ratings are those values beyond which the life

of the device may be impaired.

Note 7: The SRC pin current can be programmed to near zero in each

range, but the recommended minimum operating level is 1/16 of full scale.

Note 2: The quiescent V and V

zero SRC pin current (i.e., the laser is operating with zero bias current and

zero modulation current). The total power supply current is the quiescent

currents refer to the current with

Note 8: The laser bias current is the average current delivered to the laser.

It is equal to the SRC pin current minus the average modulation current at

DD

DD(HS)

the MODA and MODB pins, or I = I – I . Full scale for the bias current

B

S

M

+

current plus the SRC pin current, I , plus any current sinked from IN and

therefore depends on Is_rng and the actual modulation current.

Note 9: The MODA and MODB pins are connected on-chip. The modulation

S

–

IN .

+

–

Note 3: The peak transient voltage at the IN and IN pins must not

exceed the range of –300mV to V + 300mV.

current refers to the sum of the currents on these pins. I refers to the

M

total average current at the MODA and MODB pins. I

refers to the total

DD(HS)

MPP

peak-to-peak modulation current at the MODA and MODB pins. I

differs

Note 4: When Cml_en = 0 (not in CML mode), the termination is 100Ω

differential with 50k common mode to V /2.

MPP

from the laser modulation current, I

the termination resistor according to I

. I

MOD

splits between the laser and

• R /(R + R ), where

MPP T T LD

MOD MPP

DD(HS)

= I

Note 5: The common mode input resistance is measured relative to

/2 with the inputs tied together.

R is the value of the termination resistor and R is the dynamic

T

LD

V

DD(HS)

resistance of the laser diode.

Note 6: When Cml_en = 1 (CML mode), the termination is nominally 50Ω

+

–

to V

on each of the IN and IN pins.

DD(HS)

sn5100 5100fs

6

LTC5100

ELECTRICAL CHARACTERISTICS

Note 10: The modulation current can be programmed to near zero in each

range, but the high speed performance is not guaranteed for currents less

than the specified minimum.

Note 16: I must be less than 25µA, 100µA, 400µA and 1600µA

corresponding to Imd_rng = 0, 1, 2, 3.

Note 17: The temperature coefficients of the monitor diode current depend

MD

on the I setting because of the logarithmic relationship between the set

point and the monitor diode current. Imd_nom is the digital code setting

for the nominal monitor diode current. Imd_nom lies between 0 and 1023.

Note 11: The effective resolution of the modulation current is 9 bits

because the modulation servo system uses only one-half of the 10-bit

ADC range.

MD

Note 18: The ADC digitizes the average modulation current, which is 50%

of the peak-to-peak current for a 50% duty cycle signal.

Note 12: As defined in ANSI x3.230, Annex A, deterministic jitter is the

peak-to-peak deviation of the 50% crossings of the modulation signal

when compared to the ideal time crossings. The specification for the

LTC5100 pertains to the electrical modulation signal. The K28.5 pattern is

the repeating sequence 00111110101100000101.

Note 13: Random jitter is the standard deviation of the 50% crossings of

the electrical modulation signal as measured by an oscilloscope. It is

measured with a 1GHz square wave after quadrature subtraction of the

random jitter of the pulse generator and oscilloscope. Peak-to-peak

random jitter is defined as 14 times the RMS random jitter.

Note 19: The LTC5100 ADC digitizes the logarithm of the monitor diode

current. This implies that the ADC resolution is a constant percentage of

reading and that the monitor diode current is non-zero when the ADC

reads zero. See the Design Notes for further information.

Note 20: Serial interface timing is guaranteed by design from

–40°C to 85°C.

Note 21: The LTC5100 has 100µA nominal pull-up current sources on the

SCL and SDA pins to eliminate the need for external pull-up resistors when

connected to a single EEPROM device. The LTC5100 meets the maximum

Note 14: The LTC5100 digitizes and servo controls the logarithm of the

monitor diode current. Many of the characteristics of the APC system,

such as range and resolution, are determined by the ADC.

2

rise time specification of 1000ns with external I C bus capacitances up to

25pF. Example: 10pF EEPROM + 150mm trace ~ 25pF.

Note 15: The minimum practical operating current for the monitor diode is

determined by servo settling time considerations.

Note 22: V and V

must be tied together on the PC board.

DD

DD(HS)

sn5100 5100fs

7

LTC5100

U W

TYPICAL PERFOR A CE CHARACTERISTICS

V_DD= V_DD(HS)= 3.3V, T_A= 25°C, Cml_en = 0, Lpc_en = 1, transmitter enabled, unless otherwise noted. Test circuit shown in Figure 5.

Optical Eye Diagram at 3.2Gbps

with 850nm VCSEL

Optical Eye Diagram at 2.5Gbps

with 850nm VCSEL

Effect of Peaking Control on the

Electrical Eye Diagram

3mA/DIV

100µW/DIV

125µW/DIV

50ps/DIV

5100 G03

50ps/DIV

5100 G01

60ps/DIV

5100 G02

3.2Gbps, 2²³PRBS, Im_rng = 2, I_MPP= 12mA,

PEAKING = 4, 8, 16, 30

EMCORE MODE LC-TOSA VCSEL

¹⁵PRBS, 7dB EXTINCTION RATIO, 300µW AVG

EMCORE MODE LC-TOSA VCSEL

2

¹⁵PRBS, 10dB EXTINCTION RATIO, 300µW AVG

2

PWR, 2.4GHz 4TH ORDER BESSEL-THOMPSON

LOWPASS FILTER

PWR, 1.87GHz 4TH ORDER BESSEL-THOMPSON

LOWPASS FILTER

Electrical Eye Diagram at 25°C

3.2Gbps, 2²³PRBS, I_MPP= 3mA

3.2Gbps, 2²³PRBS, I_MPP= 12mA

3.2Gbps, 2²³PRBS, I_MPP= 24mA

0.5mA/DIV

2mA/DIV

4mA/DIV

49ps RISING

54ps FALLING

Im_rng = 0

50ps/DIV

5100 G04

51ps RISING

59ps FALLING

Im_rng = 2

50ps/DIV

5100 G05

50ps RISING

62ps FALLING

Im_rng = 3

50ps/DIV

5100 G06

PEAKING = 16

Electrical Eye Diagram at –40°C,

Electrical Eye Diagram at 85°C,

3.2Gbps, 2²³PRBS, I_MPP= 12mA

2mA/DIV

47ps RISING

56ps FALLING

Im_rng = 2

50ps/DIV

5100 G07

57ps RISING

67ps FALLING

Im_rng = 2

50ps/DIV

5100 G09

PEAKING = 16

sn5100 5100fs

8

LTC5100

U W

TYPICAL PERFOR A CE CHARACTERISTICS

V_DD= V_DD(HS)= 3.3V, T_A= 25°C, Cml_en = 0, Lpc_en = 1, transmitter enabled, unless otherwise noted. Test circuit shown in Figure 5.

Rise and Fall Times vs I_Mat the

Midpoint of Each Im_rng

Rise and Fall Times

vs I_MPPfor Im_rng = 3

Deterministic Jitter vs I_MPPfor

Im_rng = 3

62

60

65

60

8

7

6

t

FALL

3

t

58

56

FALL

2

5

4

3

2

1

0

55

t

RISE

3

50

45

40

1

t

RISE

Im_rng

0

54

52

50

Im_rng

0

3

6

I

9

(mA)

12

15

0

3

6

9

12 15 18 21 24 27

I (mA)

MPP

12 15

(mA)

0

3

6

9

18 21 24 27

MPP

I

MPP

5100 G13

5100 G14

5100 G15

Supply Current vs Modulation

Level (Excluding Laser Current)

Modulator Output Resistance

vs Modulation Level

Supply Current vs Temperature

10000

1000

100

60

50

40

30

20

10

0

48.1

48.0

47.9

47.8

47.7

47.6

47.5

47.4

Im_rng

2

3

Im_rng

1

TRANSMIT

ENABLED

Im_rng

0

Im_rng = 3

TRANSMIT DISABLED

AND Power_down_en = 0

Impp = 12mA

Ib = 0.0mA

(INCLUDES SRC PIN

CURRENT REQUIRED

TO SUPPLY THE AVERAGE

MODULATION CURRENT

TRANSMIT DISABLED

AND Power_down_en = 1

0

8

12

16

20

24

1

10

100

4

40

TEMPERATURE (°C)

80

–40 –20

0

20

60

Impp (mA)

5100 G18

5100 G16

5100 G17

Laser Bias Current

vs Temperature in CCC Mode

Monitor Diode Current

vs Temperature in APC Mode

Laser Modulation Current

vs Temperature, Im_rng = 1

1.01

1.00

0.99

0.98

1.01

1.00

0.99

0.98

1.01

1.00

0.99

0.98

NORMALIZED TO UNITY AT 25°C

Im_tc1 = Im_tc2 = 0

NORMALIZED TO UNITY AT 25°C

Imd_tc1 = Imd_tc2 = 0

NORMALIZED TO UNITY AT 25°C

Ib_tc1 = Ib_tc2 = 0

0.97

–40 –20

0

20

40

60

80

–40 –20

0

20

40

60

80

–40 –20

0

20

40

60

80

TEMPERATURE (°C)

5100 G22

5100 G21

5100 G20

sn5100 5100fs

9

LTC5100

U W

TYPICAL PERFOR A CE CHARACTERISTICS

V_DD= V_DD(HS)= 3.3V, T_A= 25°C, Cml_en = 0, Lpc_en = 1, transmitter enabled, unless otherwise noted.

Hot Plug with EN Active in

CCC Mode

Hot Plug with EN Active in

APC Mode

Start-Up with Slow Ramping

Supply in APC Mode

V

DD

V

DD

SCL

EEPROM READ

FAULT

LASER OUTPUT

10ms/DIV

5100 G23

5100 G24

5100 G25

Transmitter Enable, Rapid Restart

Transmitter Enable

Transmitter Disable

V

DD

V

DD

FAULT

EN

FAULT

EN

FAULT

EN

LASER OUTPUT

10µs/DIV

5µs/DIV

5100 G28

5100 G26

5100 G27

Response to Fault

Fault Recovery Time

FAULT

V

MD

5µs WIDE

PULSE ON EN

FAULT

EN

LASER OUTPUT

10µs/DIV

10ms/DIV

5100 G29

5100 G30

sn5100 5100fs

10

LTC5100

U

PI FU CTIO S

V_SS(Pins 1, 4, 9, 12, 17): Ground for Digital, Analog and

HighSpeedCircuitry.Thesepinsareinternallyconnected.

Connect Pins 1, 4, 9 and 12 to the ground plane with

minimal trace lengths. Place a minimum of four vias

(preferably nine vias) to the ground plane in the Exposed

Pad area. Most of the high speed modulation current is

returned through the Exposed Pad (Pin 17).

IN⁺, IN^–(Pins 2, 3): High Speed Laser Modulation Inputs.

The inputs are differential with internal termination resis-

tors. The input amplifier is internally AC coupled. With

currentmodelogic(CML)enabled,theinputsareindepen-

dently terminated to V_DD(HS)with 50Ω resistors. With

CML disabled, the inputs provide 100Ω differential termi-

nation and permit rail-to-rail common mode range. The

input pins can be AC coupled with external capacitors.

When externally AC coupled, the input pins self-bias to

V_DD(HS)/2. The Cml_en bit selects the termination mode.

MODA, MODB (Pins 11, 10): High Speed Laser Modula-

tion Outputs. MODA and MODB are connected on-chip

and driven by an open-drain output transistor. One of

these pins should be connected to the laser. The other

should be connected to a termination resistor. See the

Applications Information section for details.

MD (Pin 13): Monitor Diode Input for Automatic Power

Control of the Laser Bias Current. The MD pin allows

connection to the cathode or anode of the monitor diode.

The Md_polarity bit selects the polarity of the monitor

diode.

SRC (Pin 14): Current Source for Biasing the Laser. See

the Applications Information section for details.

EN (Pin 15): Transmitter Enable and Disable Input. This

inputisTTLcompatibleandcanbeprogrammedforactive

high or active low operation with the En_polarity bit. An

internal10µAcurrentsourcedisablesthetransmitterifthe

EN pin becomes disconnected. This safety feature oper-

ates whether the EN pin is active high or active low.

FAULT (Pin 5): Signals One of Five Safety Fault Con-

ditions: laserovercurrent,overpower,underpower,power

supply undervoltage and memory load error. The pin can

be programmed active high or active low with the

Flt_pin_polarity bit. The FAULT pin can be programmed to

four different drive modes with the Flt_drv_mode bits.

V_DD(Pin 16): Power Input for Digital and Low Speed

Analog Circuitry. Connect this pin to V_DD(HS)(Pin 8) with

a short trace. No bypassing is needed at the V_DDpin if the

trace length to the V_DD(HS)bypass capacitor is less than

10mm long.

SDA, SCL (Pins 6, 7): Serial Interface Data and Clock

Signals.Thepinsareopendrainwitha100µAinternalpull-

up current. An external pull-up resistor can be added to

drive larger capacitive loads.

V_DD(HS)(Pin 8): Power Input for the High Speed Laser

Modulation Circuitry. Filter this pin with a ferrite bead and

bypass the pin directly to the ground plane with a 10nF

ceramic capacitor.

sn5100 5100fs

11

LTC5100

W

BLOCK DIAGRA

FAULT PIN

DRIVER

Over_current

Over_pwr

Transmit_en

TRANSMIT AND

FAULT

CONTROLLER

Under_pwr

Fault

Under_voltage

UNDERVOLTAGE

DETECTION

5 FAULT

V

DD

16

En_polarity

EN 15

Mem_load_errorr

Flt_drv_mode

Flt_pin_polarity

LOGARITHMIC

AMPLIFIER

100µA

+

–

DATA BUS

CURRENT

ATTENUATOR

I

13 MD

MD(MON)

SDA

6

7

SERIAL DIGITAL

INTERFACE

Over_pwr

Under_pwr

POWER LIMIT

COMPARATORS

SCL

REGISTER

SET

Md_polarity Imd_rng

Over_current

I

+

–

S(MON)

I

M(MON)

LASER POWER

CONTROLLER

Ib LIMIT DAC

7 BITS

Im_rng Is_rng

I

S(MON)

I

M(MON)

V

DD

V

LD

MD(MON)

10-BIT ADC

I

TEMP

SENSOR

Is_rng

V

TERM(MON)

I

S(MON)

sel

I

DAC

S

10 BITS

Transmit_en

I

S

14 SRC

I

DAC

M

Is_rng

10 BITS

V

DD(HS)

+

–

V

8

DD(HS)

V

TERM(MON)

CML_en

20pF

PEAKING DAC

5 BITS

12

V

SS

V

1

2

SS

50Ω

I

11 MODA

10 MODB

M

V

IN+

+

–

LD

Transmit_en

IN–

3

4

I

M(MON)

9

V

SS

V

SS

Im_rng

5100 F02

17

(EXPOSED PAD)

V

SS

Figure 2. Block Diagram

sn5100 5100fs

12

LTC5100

U

W

FU CTIO AL DIAGRA S

V

Imd rng Md polarity

16

DD

FAULT

5

15

6

EN

SDA

SCL

I

MD

CURRENT

ATTENUATOR

Imd adc

ADC

LOG AMP

13 MD

7

V

DD

+

–

Is rng

USER_ADC. Data

ADC

Apc gain

–

Imd set

Imd error

+

∑

Imd nom

Is dac

DAC

TEMP

SENSOR

MINIMUM

GAIN CTRL

Imd tc1

Imd tc2

I

TEMP

COMP

S

I

S

T int adc

14 SRC

+

–

ADC

+

–

+

USER_ADC. Data

V

ADC

TERM

T ext

T nom

–

Ext temp en

V

ADC

LD

Im tc1

Im tc2

TEMP

COMP

Im gain

+

–

Im set

Im error

∑

Im nom

Im dac

DAC

Peaking

V

DAC

8

DD(HS)

12

V

SS

V

1

2

SS

I

11 MODA

M

+

IN

+

–

100Ω

MODB

10

9

–

IN

+

3

4

V

SS

Im adc

ADC

–

Im rng

V

SS

5100 F03

17

(EXPOSED PAD)

V

SS

Figure 3. Functional Diagram—Automatic Power Control Mode

sn5100 5100fs

13

LTC5100

U

W

FU CTIO AL DIAGRA S

V

16

FAULT

5

DD

15

6

EN

SDA

SCL

13 MD

V

DD

7

Is rng

(BIAS CURRENT)

+

–

+

–

Is rng

Is adc

Is dac

ADC

DAC

Im rng

+

–

Ib_error

Ib_set

∑

Ib nom

TEMP

SENSOR

Ib gain

Ib tc1

Ib tc2

TEMP

COMP

I

S

I

S

T int adc

14 SRC

+

–

ADC

+

–

+

USER_ADC. Data

V

ADC

TERM

T ext

T nom

–

Ext temp en

V

ADC

DAC

LD

Im tc1

Im tc2

TEMP

COMP

Im gain

+

–

Im_error

∑

Im nom

Im dac

Peaking

V

DAC

8

DD(HS)

12

V

SS

V

1

2

SS

I

11 MODA

M

+

IN

+

100Ω

MODB

10

9

–

+

IN

3

4

–

V

SS

Im adc

ADC

V

Im rng

SS

–

5100 F04

17

V

(EXPOSED PAD)

SS

Figure 4. Functional Diagram—Constant Current Control Mode

sn5100 5100fs

14

LTC5100

TEST CIRCUIT

V

1.8V POWER SOURCE

10nF

50Ω

DD

16

15

EN

14

SRC

13

MD

V

DD

1

2

3

4

12

11

10

9

V

SS

+

Z

= 50Ω

O

IN

MODA

MODB

FROM

BERT

LTC5100

Z

= 50Ω

O

TO

SCOPE

–

IN

MICROWAVE

BLOCKING

V

SS

CAPACITOR

FAULT SDA SCL

V

DD(HS)

5

6

7

8

10nF

5100 F05

RESISTORS: 0402 SURFACE MOUNT

CAPACITORS: 0402 SURFACE MOUNT, X7R DIELECTRIC

Figure 5. Test Circuit

U U

U

EQUIVALE T I PUT A D OUTPUT CIRCUITS

LTC5100

V

DD

LTC5100

V

DD

V

DD

10µA

V

100µA

DD

0 EN ACTIVE LOW

1 EN ACTIVE HIGH

SDA, SCL

6, 7

EN

15

En_polarity

V

SS

5100 F06

5100 F07

Figure 6. Equivalent Circuit for the EN Pin

Figure 7. Equivalent Circuit for the SDA and SCL Pins

V

DD

LTC5100

V

DD

LTC5100

Md_polarity

0

3.3mA

V

DD

M2

Imd

250µA

400µA

DRIVER

V

DD

COMPLEMENTARY

DRIVE

250µA

PULL-UP

400µA

PULL-UP

MD

13

FAULT

6

1

Imd

M1

3.3mA

DRIVER

5100 F08

5100 F09

Figure 8. Equivalent Circuit for the FAULT Pin.

All Switches are Open in Open-Drain Mode

Figure 9. Equivalent Circuit for the MD Pin

sn5100 5100fs

15

LTC5100

U U

U

EQUIVALE T I PUT A D OUTPUT CIRCUITS

LTC5100

V

DD(HS)

R

ON

3Ω

Cml_en

LTC5100

V

50k

DD

V

DD(HS)

20pF

V

DD(HS)

+

M2

IN

SRC

2

3

14

11

50Ω

25k

TO INPUT

AMPLIFIER

MODA

V

DD(HS)

–

M1

MODB

1M

10

50k

5100 F10

5100 F11

Figure 10. Equivalent Circuit for the IN⁺and IN^–Pins

Figure 11. Equivalent Circuit for the SRC, MODA and MODB Pins

U

OPERATIO

OVERVIEW

provides both constant current and automatic power

control of the laser bias current. In automatic power

control mode, special circuitry maintains constant set-

tling time in spite of variations in the laser slope efficiency

and monitor diode response characteristics.

(Refer to Figure 1 and the Block Diagram in Figure 2)

The LTC5100 is optimized to drive common cathode

VCSELs in high speed fiber optic transceivers. The chip

incorporates several features that make it very compact

and easy-to-use while delivering exceptional high speed

performance. Only a capacitor, a resistor and a small

EEPROM (excluding laser diode and power supply filter-

ing) are needed to build a complete fiber optic transmitter.

Digital control over the I²C serial interface allows fully

automated laser setup to improve manufacturing effi-

ciency. The LTC5100’s extensive set of eye safety features

meet GBIC and SFF requirements but go beyond the

standards with open-pin protection, redundant transmit-

ter enable controls and other interlocks.

The high speed inputs of the LTC5100 are internally

terminated in 50Ω and internally AC coupled, eliminating

all external components at the inputs. The modulation

output is DC coupled to the laser and presents a high

quality resistive drive impedance to deliver very fast and

clean eye diagrams in spite of laser impedance variations.

The modulation output is capable of driving significant

lengths of transmission line, allowing the LTC5100 to be

placed at an arbitrary distance from the laser. This feature

allows for packaging flexibility within the module.

TheLTC5100minimizeselectromagneticinterference(EMI)

with several architectural features. The unique design of

thedriveroutputforcesthehighspeedmodulationcurrent

to circulate only in the laser and ground system. The high

speedamplifierchainandthedigitalcircuitryareinternally

filtered and decoupled to further reduce power supply

noise generation.

10-bit integrated DACs set laser bias and modulation

levels,eliminatingthecostandspaceofdigitalpotentiom-

eters. A multiplexed ADC allows monitoring of tempera-

ture and laser operating conditions in production or field

operation. Laser bias and modulation currents are digi-

tally temperature compensated to second order for tight

controlofaveragepowerandextinctionratio.TheLTC5100

sn5100 5100fs

16

LTC5100

U

OPERATIO

LASER BIAS AND MODULATION

Terminology and Basic Calculations

Figure 12 through Figure 16 define terminology that is

used throughout this data sheet. The current delivered by

the SRC pin is called I_S. The average modulation current

delivered by the chip at the MODA, MODB pins is called I_M.

The laser bias current, I_B, is defined as the average current

in the laser. I_Bis the difference between the source current

and average modulation current.

Modulator Architecture

The LTC5100 drives common cathode lasers using a

method called “shunt switching”. As shown in Figure 12,

shunt switching involves sourcing DC current into the

laser diode and shunting part of that current with a high

speed current switch to produce the required modulation.

The SRC pin provides the DC current and the MODA,

MODB pins (which are connected on chip) provide the

high speed modulation current. This technique results in

a very fast, single-ended driver that confines the high

speed modulation current to the laser and ground system.

The LTC5100 actually uses a modified shunt switching

scheme in which the source current is delivered through

a “termination” resistor, R_T, that is bypassed to ground

with a large capacitor. The resistor brings three advan-

tages to the modulation stage. First, it gives the modulator

a precise resistive output impedance to damp ringing and

absorb reflections from the laser. Second, the resistor

isolates the capacitance of the SRC pin from the high

speed signal path, further improving modulation speed.

Third, the resistor and capacitor heavily filter the high

speedoutputsignalsothatitdoesnotmodulatethepower

supply and cause radiation or interference. On-chip

decoupling of the high speed amplifiers further reduces

power supply noise generation.

The peak-to-peak modulation current delivered by the

chip is called I_MPP. I_MPPis twice the value of I_Mbecause

the high speed data is assumed to have a 50% duty cycle.

The peak-to-peak modulation current is divided between

the termination resistor and the laser. The peak-to-peak

modulation amplitude in the laser is called I_MOD. The

relationship between I_MPPand I_MODdepends on the

relative values of the termination resistor and the laser

dynamic resistance.

I

S

B

I

M

I

MPP

M

0

5100 F13

Figure 13. Components of the LTC5100 Source and

Modulation Currents (The Laser Bias Current is Also Shown)

The relationships between the source, bias, and modula-

tion currents are as follows.

LTC5100

V

DD

I_B= I_S– I_M

_MPP= 2 • I_M

(1)

(2)

C

T

10nF

I

S

I

SRC

14

R

T

R_T

R +R

50Ω

I_MOD

=

•I_MPP

(3)

TYP

MODA, MODB

11, 10

(

)

T

LD

I

= I + I

B

S

B

M

3.2Gbps

MODULATOR

where

I

M

R_Tis the termination resistor value.

I

MOD

R_LDis the dynamic resistance of the laser, defined in

Figure 15.

I

= 2 • I

M

MPP

V

SS

The expression for I_Bin Equation 1 shows that the maxi-

mum achievable laser bias current is a function of the

maximum source current, I_S, and the average modulation

Figure 12. Simplified Laser Bias and Modulation Circuit

sn5100 5100fs

17

LTC5100

U

OPERATIO

V

current, I_M. The maximum value of I_Sis given in the

Electrical Characteristics and the value of I_Mdepends on

thelasercharacteristicsandtheterminationresistorvalue.

R

LD

V

LD

The logic “1” and “0” current levels in the laser are given

by:

I_MOD

2

I1=I_B+

(4)

(5)

I_MOD

2

I

LD

I0 = I_B–

I0

I

I1

B

5100 F15

I

MOD

B

Figure 15. Approximate VI Curve for a Laser Diode

I

TH

0

L

5100 F14

P1

Figure 14. Components of the Laser Bias

and Modulation Currents

η

P

ThepowerlevelscorrespondingtoI1andI0areP1andP0,

as shown in Figure 16.

AVG

P1 = η(I1 – I_TH)

P0 = η(I0 – I_TH)

(6)

(7)

P0

I

LD

5100 F15

whereη istheslopeefficiencyandIthisthelaserthreshold

current, defined in Figure 16.

I

TH

I0

I

I1

B

I

MOD

The average optical power and extinction ratio are given

by:

Figure 16. Approximate LI Curve for a Laser Diode

The voltage across the termination resistor is:

V_TERM= V_SRC– V_MODA

P1+ P0

P_AVG

=

(8)

(9)

2

(11)

P1

P0

= Is • R_T

ER =

The LTC5100 can digitize the voltage across the termina-

tionresistorusingtheon-chipADC, whichcangiveamore

accurate measurement of Is than that given by digitizing

thecurrentinternally. SeetheElectricalCharacteristicsfor

details.

The average voltage on the laser diode relative to ground

is V_LD(see Figure 12 and Figure 15). The voltage on the

SRC pin is:

V_S= V_LD+ I_S• R_T

(10)

= V_LD+ (I_B+ I_M) • R_T

Temperature Compensation

The value V_Sis important because V_Smust not exceed the

limits given in the Electrical Characteristics.

The LTC5100 digitally compensates the temperature drift

of the laser bias current, laser modulation current and

sn5100 5100fs

18

LTC5100

U

OPERATIO

Note that Equation 12 is applied to the digital representa-

tion of the currents, not the physical current themselves.

This is a particularly important point where monitor diode

currentisconcerned, becausethedigitalrepresentationof

the monitor diode current is the logarithm of the current.

Thus the temperature compensation is of the logarithm of

the monitor diode current and not the current itself.

monitorphotodiodecurrent. Ineachcasethefundamental

calculation is the same. The LTC5100’s digital controller

multiplies the nominal value of the quantity (I_B, I_Mor I_MD

)

byaquadraticfunctionoftemperature. Temperaturemea-

surements are supplied either by an on-chip temperature

sensor or by an external microprocessor, according to the

setting of Ext_temp_en. The general temperature com-

pensation formula is:

Notation Used for Registers and Bit Fields

I = I_nom • (TC2 • 2^–18• ∆T²+ TC1 • 2^–13• ∆T + 1) (12)

The LTC5100 has a large set of registers, many of which

aresubdividedintofieldsofbits. Registernamesaregiven

in all capitals (SYS_CONFIG) and bit fields are given in

mixed case (Apc_en). For example, the bit that enables

AutomaticPowerControlmodeiscontainedintheSystem

Configuration register. This bit is denoted by:

where I is the digital representation of the laser bias

current, modulation current or monitor diode current (I_B,

I_Mor I_MD).

Whenusingtheinternaltemperaturesensor(Ext_temp_en

= 0), the temperature measurements are taken by the on-

chip ADC, and ∆T is the change in the LTC5100 die tem-

perature relative to a user defined nominal temperature:

SYS_CONFIG.Apc_en

In many cases this bit field will simply be referred to as

“Apc_en.”

∆T = T_int_adc – T_nom

(13)

The functional diagrams of Figure 3 and Figure 4 show

registers and bit fields within registers between horizontal

bars. For example, the “Data” field in the ADC register is

shown as:

Whenusinganexternaltemperaturesource(Ext_temp_en

= 1), the temperature measurements are provided in

digitalformbyamicroprocessororhostcomputerand ∆T

is the change in temperature relative to a user defined

nominal temperature:

USER_ADC.Data

∆T = T_ext –T_nom

(14)

A write operation to this register is shown as:

T_int_adc,T_ext,andT_nomare10-bit,unsignednumbers

scaledat0.5K/LSB.Themaximumtemperaturethatcanbe

represented is therefore 2¹⁰• 0.5°K = 512°K or 239°C.

USER_ADC.Data

A register read operation is shown as:

TC1 and TC2 are the first and second order temperature

coefficients. They correspond to the registers Im_tc1 and

Im_tc2 for modulation current, Ib_tc1 and Ib_tc2 for bias

current and Imd_tc1 and Imd_tc2 for monitor diode

current. In each case TC1 and TC2 are 8-bit signed

numbers in two’s complement format. The range of the

temperature coefficients is therefore –128 to +127. When

TC1 is multiplied by its weighting coefficient of 2^–13in

Equation 12, the effective value of the first order tempera-

ture coefficient is 122ppm/°C per LSB. The full-scale

range is approximately ±15500 ppm/°C. When TC2 is

multiplied by its weighting coefficient of 2^–18in Equation

12, the effective value of the second order temperature

coefficient is 3.81ppm/°C²per LSB. The full-scale range is

approximately ±484 ppm/°C².

Peaking

Range Selection for the Source

and Modulation Currents

Thesourceandmodulationcurrentseachhavefourranges

of operation to optimize ADC and DAC resolution as well

as high frequency performance. The source current range

iscontrolledbytwobitscalledIs_rng.Similarly,themodu-

lationcurrentrangeiscontrolledbytwobitscalledIm_rng.

Themaximumcurrentthatcanbedeliveredisproportional

to the range, so the current output is 1, 2, 3 or 4 times the

typical base value of 9mA for the source current and

4.5mA for the average modulation current or 9mA peak-

to-peak.

sn5100 5100fs

19

LTC5100

U

OPERATIO

Figure 17 depicts the current ranges for the source cur-

rent. The guaranteed full scale is 6mA per range. The

minimum operating level should be limited to 1/16 of full

scale to avoid the coarse relative quantization seen in any

ADC or DAC when operated at low levels. The source

range, Is_rng, should be selected as low as possible such

that the source current, I_S, stays within the guaranteed

current limits over temperature, considering the laser

temperature characteristics. From Equation 1 we can see

that the source current is the sum of the laser bias and the

average modulation currents:

Figure 18 depicts the current ranges for the average

modulation current. This is the average modulation cur-

rentattheMODAandMODBpinsofthechip(recallthatthe

MODA and MODB pins are connected on-chip). The peak-

to-peak modulation at the pins of the chip is twice the

average. Guaranteed full scale is 3mA average or 6mA pp

per range. The minimum operating level should be limited

to 1/8 of full scale to preserve the quality of the eye

diagram. Operating below 1/8 full scale causes increased

overshootandundershoot.Themodulationrange,Im_rng,

should be selected as low as possible such that the

modulation current, I_M, stays within the guaranteed cur-

rent limits over temperature. The modulation current

varies over temperature to compensate the loss in slope

efficiencytypicalofmostVCSELs. Therefore, thechoiceof

Im_rng should take temperature changes into account.

I_S= I_B+ I_M

(15)

Is_rng should be chosen to support the total current

requiredforlaserbiasandmodulation,takingtemperature

changes in I_Band I_Minto account.

I

(mA)

S

High Speed Aspects of the Modulation Output

36

27

18

Is_rng = 3

The LTC5100 modulation output presents a resistive drive

impedancewithverylowreflectioncoefficient.Thisoutput

design suppresses ringing and reflections to maintain the

quality of the eye diagrams in spite of laser impedance

variations. Thereflectioncoefficientissufficientlylowthat

the LTC5100 can drive the laser over an arbitrary length of

transmission line, as shown in Figure 19. A well designed

transmission line stretching the entire length of a typical

transceiver module goes virtually unnoticed in this sys-

tem. Theonlypracticallimitationoninterconnectlengthto

the laser is high frequency line loss.

Is_rng = 2

Is_rng = 1

RECOMMENDED

MINIMUM IS 1/16

OF FULL SCALE

9

4.5

0

Is_rng = 0

5100 F17

Figure 17. Ranges for the Source Current

LTC5100

V

DD

I

M

(mA)

C

T

18

10nF

I

S

SRC

Im_rng = 3

14

R

T

50Ω

TYP

13.5

9

L

BWA

BWB

MODA

MODB

C1

I

= I + I

B M

S

Im_rng = 2

11

10

Z

= R

T

O

3.2Gbps

MODULATOR

I

M

I

B

TRANSMISSION

LINE

Im_rng = 1

RECOMMENDED

MINIMUM IS 1/8

OF FULL SCALE

M1

4.5

Im_rng = 0

V

SS

0

5100 F18

Figure 18. Ranges for the Modulation Current

Figure 19. High Speed Details of the Modulation Output

sn5100 5100fs

20

LTC5100

U

OPERATIO

Figure 19 shows how the LTC5100 achieves a low reflec-

tion coefficient. The unavoidable capacitance of the high

speed driver transistor, bond pads and ESD protection

circuitry (C1) is compensated by the inductance of the

bond wires (L_BWAand L_BWB).

dynamic impedance or if a narrow, high impedance PC

board trace is needed to connect to the laser.

Figure 21 shows that the high speed modulation current is

confinedtothegroundsystem, laserandbacktermination

network. No high speed current circulates in the power

supply where it could cause radiation and interference

problems.

The high speed behavior of the circuit in Figure 19 can be

understood in greater detail by examining the simplified

circuit in Figure 20. In Figure 20 the switched current

source (M1 in Figure 19) launches a current step (1)

toward the termination resistor (2A) and toward the trans-

mission line (2B) connected to the laser. The laser is

typically mismatched to the line impedance and reflects a

portion of the incident wave (3) back toward the MODB

pin. There it encounters an L-C-L structure composed of

the bond wires and driver capacitance. This structure is

carefully designed as a lumped element approximation to

the transmission line impedance. It therefore transmits

wave (3) through the IC package without reflecting energy

back toward the laser. The traveling wave passes through

the chip largely unimpeded (4) and is absorbed by the

matched termination resistor, R_T.

HIGH SPEED DATA INPUTS

The high speed data inputs, IN⁺and IN^–, are internally

terminated in 50Ω and internally AC coupled, eliminating

the need for external termination resistors and AC cou-

pling capacitors. Figure 10 shows the equivalent circuit

for the high speed data pins. By default, the high speed

data inputs are terminated differentially with 100Ω for

compatibility with LVDS, PECL and similar differential

signaling standards (Cml_en = 0). Alternately, the inputs

can be programmed for 50Ω single-ended termination to

the power supply for biasing a current mode logic (CML)

driver.ToselectCMLcompatibility,programCml_ento1.

AlthoughinternallyACcoupled, theinputsarebiasedwith

highvaluedresistors(50kequivalent)toV_DD(HS)/2,sothe

LTC5100 remains compatible with external AC coupling

capacitors. When externally AC coupled, the inputs self-

bias to approximately V_DD(HS)/2.

The matched termination is provided by the termination

resistor, R_T, decoupled by capacitor C_T. C_Tforms an AC

short across the entire frequency range contained in the

modulation data.

Theterminationresistor, R_T, neednotbe50Ω. 50Ωisbest

for electrical testing because it matches the impedance of

mosthighfrequencyinstruments.R_Tcanbemadesmaller,

35Ω, for example, to more closely match a laser with low

dynamic impedance or to allow more voltage headroom at

the SRC pin. This may be necessary for lasers that run at

highvoltagesorhighbiascurrents. R_Tcanbemadelarger,

70Ω for example, to more closely match a laser with high

Internal AC coupling gives the LTC5100 rail-to-rail input

common mode capability. The inputs can be driven as

much as 300mV beyond the rail during peak excursions.

The AC coupling circuit is a distributed highpass filter with

V

DD

LTC5100

NO HIGH

SPEED

CURRENT

SRC

14

10nF

50Ω

MODA

4

3

11

12

2A

2B

10

MODB

L

BWA

L

BWB

Z

= R

T

O

3.2Gbps

MODULATOR

11

MODB

10

9

C1

MODA

TRANSMISSION

LINE

R

T

M1

50Ω

TYP

1

V

SS

5100 F20

EXPOSED

PAD

5100 F21

Figure 20. Wave Propagation in the Laser Interconnect

Figure 21. High Speed Current Flow in the Modulation Output

sn5100 5100fs

21

LTC5100

U

OPERATIO

approximately second order characteristics. The design

maximizestheflatnessofthestepresponseoverextended

periods, giving optimal performance during long strings

of ones or zeros in the data.

The ADC input for average modulation current is scaled

such that code 512 is the nominal full-scale value, corre-

sponding to 4.5mA per range. Thus, if Im_rng = 0 and

Im = 4.5mA, the ADC digitizes code 512. The control

system for the modulation current effectively has 9-bit

resolution, because at most one-half of the 10-bit ADC

rangeisutilized. Thisprovisionmaximizesthecompliance

voltage range of the modulation output.

MODULATION CURRENT CONTROL

IN APC AND CCC MODES

The LTC5100 controls the modulation current with a

digital servo control loop using feedback from the on-chip

ADC. Figure 3 and Figure 4 are Functional Diagrams of the

LTC5100 operating in Automatic Power Control (APC)

modeandConstantCurrentControl(CCC)modes,respec-

tively. These diagrams show the organization and opera-

tion of the servo control loops for laser bias and laser

modulation. Either diagram can be used to understand the

modulation current control loop.

The difference equation for the modulation servo loop is:

Im_gain

Im_adc_n= Im_adc_n–1

= Im_adc_n−1

+

•Im_error

(16)

8

Im_gain

• Im_set – Im_adc_n−1

(

)

8

Im_gain is a 3-bit digital value, so the scaling factor,

Im_gain/8, takesonthediscretevalues0, 1/8, 2/8, …, 7/8.

If Im_gain = 4, then Im_gain/8 = 0.5 and the error in the

control loop is cut in half with each servo iteration. In this

case the step response of the loop is given by:

Servo Control

The average modulation current is controlled by a digital

servo loop (shown in the lower half of Figure 3). The

nominal modulation current, Im_nom, is multiplied by a

temperature compensation factor, producing a 10-bit

digital set point value, Im_set. Im_set is the target value

for average modulation current. The ADC digitizes the

average modulation current, producing a 10-bit value

Im_adc. The difference between the target value and the

actualvalueproducestheservolooperrorsignal,Im_error.

Im_error is multiplied by a constant, Im_gain, to set the

loop gain. The result is integrated in a digital accumulator

and applied to a 10-bit DAC, increasing or decreasing the

modulationamplitudeasrequiredtodrivethelooperrorto

zero. The servo loop adjusts the modulation amplitude

every four milliseconds, producing 250 servo iterations

per second.

n

Im_gain

Im_adc_n= Im_set• 1– 1–

(17)

8

The step response has the familiar exponential settling

characteristic of a first order system. The step response is

shown in Figure 22 for Im_gain = 4. The remaining error

is reduced by one-half with each servo iteration. In seven

iterations, or about 28ms, the modulation current settles

tounder1%inthisexample.Themeasuredstepresponse,

includingthemodulationenvelope,isshownintheTypical

Performance Characteristics.

Im_set

Im_adc

Themodulationservoloopoperatesontheaveragemodu-

lation current, which is one-half of the peak-to-peak value

for a 50% duty cycle signal. The analog electronics in the

high speed modulator ensure that controlling the average

modulation current is equivalent to controlling the peak-

to-peak current.

SERVO

ITERATIONS

1

2

8

3

4

5

6

7

8

0

4

12 16 20 24 28 32 TIME (ms)

5100 F22

Figure 22. Step Response of the Average Modulation Current

for Im_gain = 4

sn5100 5100fs

22

LTC5100

U

OPERATIO

Reducing Im_gain slows the settling time and increasing

Im_gainspeedsthesettlingtime.Forexample,withIm_gain

= 1, the residual loop error is cut by 1/8 with each servo

iteration. In this case it would take 35 servo iterations

(about 140ms) to settle to 1%. With Im_gain = 7, the

residual servo loop error is cut by 7/8 with each servo

iteration. In this case it would take only three servo

iterations (about 12ms) to settle to 1%, but the servo loop

will tend to “hunt” or oscillate at a low level with such a

high loop gain.

feedback from a monitor photodiode. Setting Apc_en = 1

selects this mode. In APC mode the monitor diode current

can be temperature compensated with first and second

order temperature coefficients.

Figure 9 shows an equivalent circuit for the MD pin and

Figure 23 shows details of the monitor diode circuit. The

Md_polaritybitselectswhetherthemonitordiodesources

orsinkscurrentfromtheMDpin. Aprogrammableattenu-

ator and logarithmic amplifier permit a very wide range of

monitor diode currents spanning 4.25µA to 2176µA (typi-

cal) with constant 0.2% set point resolution. The attenu-

ator divides the monitor diode current by 1, 4, 16 or 64

dependingonthevalueofImd_rng.TwobitscalledImd_rng

control the attenuator setting, selecting a full scale current

range of 34, 136, 544 or 2176µA typical. A 5kHz lowpass

filterprovidesantialiasingandlimitsnoise.Thelogarithmic

amplifier compresses the dynamic range of the monitor

diode current and plays a role in maintaining constant and

predictable settling times regardless of the photodiode

characteristics.

Temperature Compensation

The set point value for the modulation current, Im_set in

Figure 3 and Figure 4, changes with temperature to com-

pensate the temperature dependence of the laser diode’s

slopeefficiency.Temperaturemeasurementsaresupplied

either by an on-chip temperature sensor or by an external

microprocessor, accordingtothesettingofExt_temp_en.

The temperature compensated expression for Im_set is

given by:

Im_ tc2 • 2^–18• ∆T²

+ Im_ tc1• 2^–13• ∆T +1

Range Selection

Im_set = Im_nom •

(18)

Figure24depictsthecurrentrangesforthemonitordiode

current. The full-scale range of the monitor diode current

is34µA•4^Imd_rngtypicalwhereImd_rng=0,1,2or3.The

minimum operating level should be limited to 20% of full

scaletoensureadequatesettlingtimeoftheopticalpower

output of the laser. The range should be selected so that

the monitor diode current stays within the guaranteed

current limits over temperature.

Im_tc1andIm_tc2arethefirstandsecondordertempera-

ture coefficients for the modulation current.

LASER BIAS CURRENT CONTROL IN APC MODE

Figure 3 is a functional diagram of the LTC5100 operating

inautomaticpowercontrol(APC)mode. InAPCmode, the

LTC5100 servo controls the average optical power with

V

DD

Imd_rng

Md_polarity

LTC5100

Md_polarity = 1

Md_polarity = 0

5kHz

LOWPASS

FILTER

MD

ATTENUATOR

÷1, ÷4, ÷16, ÷64

POLARITY

CONTROL

13

Imd_adc

LOG AMP

10-BIT ADC

5100 F32

Figure 23. Detail of the Monitor Photodiode Circuit

sn5100 5100fs

23

LTC5100

U

OPERATIO

I

(µA) (LOG SCALE)

MD

response, γ (Amps/Watt). These parameters vary widely

from laser to laser. If nothing is done to compensate the

variations in η and γ, the settling time of the optical power

output will vary over an unacceptably wide range. For

example, a 4:1 variation in slope efficiency and a 5:1

variation in monitor diode response could create a 20:1

variation in settling time.

2176

Imd_rng = 3

544

RECOMMENDED

MINIMUM IS 20%

OF FULL SCALE

Imd_rng = 2

136

Imd_rng = 1

The LTC5100 uses two techniques to fully compensate for

variations in the laser and monitor diode characteristics,

achieving constant settling times under all conditions.

First, taking the logarithm of the monitor diode current

precisely compensates variations in the monitor diode

response. Second, multiplying the error signal by the

modulation current precisely compensates for variations

in laser slope efficiency.

34

7

Imd_rng = 0

0

5100 F24

Figure 24. Operating Ranges for the Monitor Diode Current

The SRC pin current range, Is_rng, should be chosen so

that the SRC pin can supply the required bias current over

temperature. See the section titled Range Selection for the

Source and Modulation Currents.

The difference equation for the APC loop is:

Im_adc_n=Imd_adc_n−1+ A •Imd_error

(19)

=Imd_adc_n−1+ A • Imd_set –Imd_adc

(

)

n−1

Servo Control

where A is the small-signal loop gain, given by:

The average optical power is controlled by a digital servo

loop shown in the upper half of Figure 3. The loop sets and

controls the logarithm of the monitor diode current. The

logarithmofthenominalmonitordiodecurrent,Imd_nom,

is multiplied by a temperature compensation factor, pro-

ducing a 10-bit digital set point value, Imd_set. Imd_set is

therefore the temperature compensated logarithm of the

target value for monitor diode current. The ADC digitizes

the logarithm of the monitor diode current, producing a

10-bit value called Imd_adc. The difference between the

target value and the actual value produces the servo loop

error signal, Imd_error. Imd_error is multiplied by a

constant, Apc_gain, to set the loop gain. Imd_error is also

multiplied by the set point value of the modulation current

to further stabilize the servo dynamics, as explained

below. The result is integrated in a digital accumulator and

applied to a 10-bit DAC, increasing or decreasing the SRC

pin current (and consequently the laser bias current) as

required to drive the loop error to zero. The servo loop

adjusts the laser bias current every four milliseconds,

producing 250 servo iterations per second.

Apc_gain 1+Is_rng

1

A =

•

(20)

32

1+Im_rng ln(8)

ER – 1 R_T+R_LD

•

ER + 1

R_T

where:

ln(8) = 2.079 is the natural logarithm of 8

ER is the extinction ratio

R_Tis the termination resistance

R_LDis the dynamic resistance of the laser diode

Apc_gain is a 5-bit digital value, so the scaling factor,

Apc_gain/32, takes on the discrete values 0, 1/32, 2/32,

…, 31/32.

In practice, the extinction ratio is usually high (ER >> 1),

and R_T~ R_LD, so Equation 20 simplifies to:

Apc_gain 1+Is_rng

(21)

A ≈

•

32

1+Im_rng

The open-loop gain of the APC loop is proportional to the

laser slope efficiency, η (Watts/Amp), and monitor diode

sn5100 5100fs

24

LTC5100

U

OPERATIO

microprocessor, accordingtothesettingofExt_temp_en.

The temperature compensated expression for Imd_set is

given by:

Equation 20 shows that the loop gain is completely inde-

pendent of the slope efficiency and monitor diode re-

sponse. Consequently the servo dynamics and settling

time are independent of these highly varying quantities.

The Apc_gain quantity can be set to compensate for the

selected values of Is_rng and Im_rng as well as the

extinction ratio, termination resistance and laser dynamic

resistance.

Imd_set =

Imd_ tc2•2^–18• ∆T²

+ Imd_ tc1•2^–13• ∆T +1

(23)

Imd_nom•

Imd_tc1 and Imd_tc2 are the first and second order

temperature coefficients for the monitor diode current.

Equation 23 applies to the digital representation of the

monitordiodecurrent.RecallthatImd_setisthedigitalset

point for the logarithm of the monitor diode current. This

fact has two important implications. First, the first order

temperature coefficient in Equation 23 (Imd_tc1) results

in an exponential change in the physical monitor diode

current with temperature. However, the monitor diode

temperaturedriftisusuallyverysmall,andtheexponential

is well approximated as linear. Second, if Imd_tc2 = 0, the

relative temperature sensitivity of the physical current is

given by:

The step response of the APC loop is:

Imd_adc_n= Imd_set • [1 – (1 – A)ⁿ]

(22)

The step response given in Equation 22 has the familiar

exponential settling characteristic of a first order system.

The step response is shown in Figure 25 for A = 0.5. The

remaining error is reduced by one-half with each servo

iteration. In seven iterations, or about 28ms, the modula-

tion current settles to under 1% in this example. The

measured step response, including the modulation enve-

lope, is shown in the Typical Performance Characteristics.

Choosing A = 0.5 is nearly optimal because it results in

smooth, exponential settling. A = 1 will settle in about two

servo iterations or 8ms, but “hunting” or low level oscil-

lation will be seen in the laser bias current. A > 1 results

in overshoot and A > 2 results in sustained high level

oscillation.

dI_MD

dT I_MD

1

Imd_nom

1024

•

= ln(8)•2^–13•Imd_ tc1•

(24)

where I_MDis the physical monitor diode current in Amps.

Equation 24 shows that the temperature coefficient of the

physical current depends on the nominal monitor diode

current. For example, if Imd_nom = 512 and Imd_tc1 = 4,

the physical temperature compensation would be:

Imd_set

Im_adc

dI_MD

dT I_MD

1

512

1024

•

= ln(8)•2^–13•4 •

= 508ppm/°C

(25)

SERVO

ITERATIONS

1

2

8

3

4

5

6

7

8

0

4

12 16 20 24 28 32 TIME (ms)

The effect of Imd_tc2 on the physical monitor diode

current has no simple physical interpretation. In most

casesitwillbesufficienttosetImd_tc2tozeroandusethe

first order temperature coefficient, Imd_tc1 to correct

monitor diode drift.

5100 F25

Figure 25. Step Response of the Monitor

Diode Current for a Total Loop Gain of 0.5

Temperature Compensation

LASER BIAS CURRENT CONTROL IN CCC MODE

The set point value for the monitor diode current, Imd_set

in Figure 3, can be changed with temperature to compen-

sate the temperature dependence of the monitor diode

response.Temperaturemeasurementsaresuppliedeither

by an on-chip temperature sensor or by an external

Figure 4 is a functional diagram of the LTC5100 operating

in constant current control (CCC) mode. In CCC mode, the

LTC5100 sets the laser bias current directly. Setting

Apc_en = 0 selects this mode. In CCC mode the laser bias

sn5100 5100fs

25

LTC5100

U

OPERATIO

current can be temperature compensated with first and

second order temperature coefficients.

with each servo iteration. In this case the step response of

the loop is given by, assuming Im_nom = 0 :

Servo Control

Ib_adc_n=

n

The laser bias current is controlled by a digital servo loop

(shown in the upper half of Figure 4) and can be under-

stood as follows. The nominal bias current, Ib_nom, is

multipliedbyatemperaturecompensationfactor, produc-

ing a 10-bit digital set point value, Ib_set. Ib_set is the

targetvalueforthelaserbiascurrent.TheADCdigitizesthe

SRC pin current and the average modulation current,

producing10-bitvaluesIs_adcandIm_adc.Thelaserbias

current is the difference between the SRC pin current and

the average modulation current (Equation 1). The system

generates a digital representation of the laser bias current

by calculating:

Ib_gain•(Is_rng + 1)

(28)

Ib_set• 1– 1–

32

The step response has the familiar exponential settling

characteristic of a first order system. The step response

is shown in Figure 26 for Ib_gain • (Is_rng + 1) = 16. The

remaining error is reduced by one-half with each servo

iteration.Inseveniterations,orabout28ms,thelaserbias

current settles to under 1% in this example. The mea-

sured step response is shown in the Typical Performance

Characteristics.

Ib_adc = Is_rng • Is_adc – Im_rng • Im_adc

(26)

Ib_set

where Ib_adc is the result of a calculation. (The ADC never

digitizes the laser bias current directly.)

Ib_adc

The difference between the target value and the actual

value is the servo loop error signal, Ib_error. Ib_error is

multiplied by a constant, Ib_gain, to set the loop gain. The

result is integrated in a digital accumulator and applied to

a10-bitDAC,increasingordecreasingtheSRCpincurrent

as required to drive the loop error to zero. The servo loop

adjusts the SRC pin current every four milliseconds,

producing 250 servo iterations per second.

SERVO

ITERATIONS

1

2

8

3

4

5

6

7

8

0

4

12 16 20 24 28 32 TIME (ms)

5100 F26

Figure 26. Step Response of the Laser Bias

Current for (Ib_gain) • (Is_rngtl ) = 16

Reducing Ib_gain slows the settling time and increasing

Ib_gainspeedsthesettlingtime.Forexample,withIb_gain

•(Is_rng+1)=1, theresiduallooperroriscutby1/32with

each servo iteration. In this case it would take 145 servo

iterations (about 580ms) to settle to 1%. With Ib_gain •

(Is_rng+1)=31, theresidualservolooperroriscutby31/

32 with each servo iteration. In this case it would take only

two servo iterations (about 8ms) to settle to 1%.

The simplified difference equation for the bias current

servo loop is, assuming Im_nom = 0:

Ib_adc_n=

(27)

Ib_gain

32

Ib_adc_n−1

+

•(Is_rng +1)•Ib_error

Ib_gain

Setting Im_nom ≠ 0 slows the settling time of the laser

bias current somewhat. This effect can easily be compen-

sated by increasing Ib_gain.

= Ib_adc_n−1

+

•(Is_rng +1)

32

• Ib_set– Ib_adc

(

)

n−1

Temperature Compensation

Ib_gain is a 5-bit digital value, so the scaling factor,

Ib_gain/32, takes on the discrete values 0, 1/32, 2/32, …,

31/32. If Ib_gain • (Is_rng + 1) = 16, then Ib_gain • (Is_rng

+ 1)/32 = 0.5 and the error in the control loop is cut in half

The set point value for the laser bias current, Ib_set in

Figure 4, can change with temperature to compensate the

temperature dependence of the laser diode’s threshold

current. Temperature measurements are supplied either

sn5100 5100fs

26

LTC5100

U

OPERATIO

by an on-chip temperature sensor or by an external

microprocessor, accordingtothesettingofExt_temp_en.

The temperature compensated expression for Ib_set is

given by:

TRANSMIT ENABLE, FAULT DETECTION

AND EYE SAFETY

The LTC5100 is compatible with the Gigabit Interface

Converter (GBIC) specification, but includes additional

features and safety interlocks. Figure 27 shows the state

diagram for enabling the transmitter and detecting faults.

Ib_ tc2•2^–18• ∆T²

+ Ib_ tc1•2^–13• ∆T +1

(29)

Ib_set = Ib_nom•

The EN pin and Soft_en control bit enable and disable the

transmitter. The EN pin may be programmed for active

high or active low operation with the En_polarity bit.

Ib_tc1 and Ib_tc2 are the first and second order tempera-

ture coefficients for the laser bias current.

POWER ON RESET OR

Operating_mode = 0

TIMEOUT

1

3

READ

EEPROM

WAIT

64ms

FAILED

Mem_load_error = 1

SUCCEEDED OR

Operating_mode = 1

2

READY

(DISABLED)

Transmitter_enabled = 0

ENABLE

4

FAULT DETECTION DISABLED

Transmitter_enabled = 1

SETTLING

(ENABLED)

ENABLE AND

Rep_flt_inhibit = 0

100ms

ENABLE AND TIMEOUT

8

Rapid_restart_en = 0

FAULT PIN ASSERTED

Transmitter_enabled = 0

Transmit_ready = 0

Faulted = 1

5

FAULT

FAULTED

(DISABLED)

SETTLED

(ENABLED)

FAULT DETECTION ENABLED

Transmit_ready = 1

ENABLE AND

Rep_flt_inhibit = 1

ENABLE AND

Rapid_restart_en = 1

9

6

Faulted = 0

Faulted_once = 1

READY

(DISABLED)

READY

(SETTLED

AND

Transmitter_enabled = 0

Transmit_ready = 0

ENABLE

DISABLED)

10

ENABLE

40ms

FAULT DETECTION DISABLED

Transmitter_enabled = 1

SETTLING

(ENABLED)

7

TIMEOUT

FAULT DETECTION DISABLED

Transmit_ready = 1

SETTLING

100ms

TIMEOUT

(ENABLED)

25ms

TIMEOUT

11

FAULT DETECTION ENABLED

Transmit_ready = 1

SETTLING

(ENABLED)

Faulted_once = 0

FAULT

ENABLE = EN AND Soft_en

FAULT = Over_current OR

Over_power OR

12

FAULTED

TWICE

POWER ON RESET

Under_power

5100 F27

(DISABLED) Faulted = 1

Faulted_once = 1

Faulted_twice = 1

Figure 27. State Diagram for Transmitter Enable and Fault Detection

sn5100 5100fs

27

LTC5100

U

OPERATIO

The EN pin and the Soft_en bit must both be active to

enable the transmitter, providing an extra degree of safety

andallowingfullsoftwarecontrolofthetransmitterenable

function. AsshowninFigure6, theENpinhasaweak10µA

current source that pulls it to the inactive state in case of

an accidental open on the pin. The EN and Soft_en bits are

inhibited until the LTC5100 has successfully loaded its

registers from an EEPROM or the Operating_mode bit has

been set, signaling that a microprocessor has assumed

control of the chip.

The LTC5100 has sophisticated eye safety and fault han-

dlingfeatures. Fivetypesoffaultsaredetected:lowsupply

voltage, excessive laser bias current, overpower,

underpower and EEPROM memory load failure. Table 1

summarizes these five faults and how they are handled in

the LTC5100.

Faults are latched in compliance with GBIC requirements.

Faults can be independently enabled (except for low sup-

ply voltage and memory load failure) and are recorded in

an internal register for readout over the serial bus. If two

faults occur simultaneously, the fault with the highest

priority (see Table 1) is recorded in the FLT_STATUS

register. This register indicates the cause of the fault and

is cleared only when read (not when the fault itself is

cleared.) Low supply voltage and memory load failure are

considered hard faults and cannot be masked or overrid-

den. They prevent thetransmitterfrombeginenableduntil

they are cleared.

The first time the transmitter is enabled after initial power

up, the servo loops find the correct DAC settings for bias

and modulation current through a feedback process.

Initial settling is typically within 300ms. If the transmitter

is disabled and subsequently re-enabled, the previously

determined DAC settlings are restored. In this case set-

tling occurs typically within 1ms. This feature is called

“Rapid Restart” and can be overridden by setting the

Rapid_–restart_en bit to zero.

Normally, a fault automatically disables the transmitter

and shuts down the laser. In some systems it may be

desirable to allow data transmission to continue after a

Table 1. Fault Detection and Handling

FAULT TYPE

LASER

OVERCURRENT

LASER

OVERPOWER

LASER

EEPROM MEMORY POWER SUPPLY

UNDERVOLTAGE

SOFTWARE

FORCED FAULT

UNDERPOWER LOAD FAULT

Fault Occurs When

Priority

Laser Bias Current Monitor Diode

Exceeds the Value Current is 50%

Monitor Diode

Current is 50%

Less than the

Set Point

EEPROM Load

Starts But Fails

to Complete

V

Drops

The Flt_pin_override

and Force_flt Bits

are Set

DD

Below 2.8V

in the IB_LIMIT

Register

Greater Than the

Set Point

5

4

3

2

1

NA

Cleared by

Yes

No

Yes

Power-On Reset

Latched in the

FLT_STATUS

Register

Yes

No (Not Part of the

FLT_STATUS Register)

Cleared from the

FLT_STATUS

Register on Read

No (Not Part of the

FLT_STATUS Register)

Latched at the

FAULT Pin

No (The FAULT Pin Yes (Actually Latched

Signals a Fault as in the FLT_CONFIG

Long as the Supply Register)

Voltage Remains

Too Low)

Enabled by

Over_current_en

Over_pwr_en

and Apc_en

Under_pwr_en

and Apc_en

Always Enabled

NA

Always Enabled

Flt_pin_override

NA

Glitch Rejection

4µs

200mV Typical

Hysteresis

sn5100 5100fs

28

LTC5100

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OPERATIO

fault has occurred. For example, the software in the host appropriatelasersafetyfeaturesoftheLTC5100,andtake

system may need to evaluate the cause of the fault before any additional precautions needed to ensure compliance

shutting down the laser. If Auto_shutdn_en = 1, the of the end product with the requirements of the relevant

LTC5100 automatically disables the transmitter after a regulatoryagencies. Inparticular, theLTC5100produces

fault. If Auto_shutdn_en = 0, data transmission continues laser currents in response to digitally programmed com-

after a fault. The transmitter is not disabled until the host mands. The user must ensure software written to control

system drives the EN pin inactive or clears the Soft_en bit. the LTC5100 does not cause excessive levels of radiation

Low power supply voltage and memory load errors are to be emitted by the laser.

considered hard faults and always disable the transmitter,

regardless of the setting of Auto_shutdn_en.

POWER CONSUMPTION AND POWER MANAGEMENT

The LTC5100 implements the GBIC protocol for prevent-

ing software from repeatedly re-enabling a faulted trans-

mitter. When a first fault is detected, it can be cleared by

disabling the transmitter. If the transmitter is re-enabled

andasecondfaultoccurswithin25msafterfaultdetection

is enabled, the transmitter is permanently disabled. Only

cycling power to the LTC5100 can clear this condition.

This feature is called “Repeated Fault Inhibit” and can be

overridden by setting the Repeated_flt_inhibit bit to zero.

The power consumption of the LTC5100 is dependent on

several variables, including the modulation current range

(set by Im_rng), the laser bias and modulation levels, and

the state of the transmitter (whether enabled or disabled.)

If Power_down_en = 1, the LTC5100 turns off its high

speed amplifiers when the transmitter is disabled, reduc-

ing supply current to less than 5mA (typical). See the

TypicalPerformanceChacteristicsforfurtherinformation.

The FAULT pin can be configured active high or active low HIGH SPEED PEAKING CONTROL

with the Flt_pin_polarity bit. The FAULT pin can be pro-

The LTC5100 has the ability to selectively peak the falling

grammed for open drain, 330µA internal pull-up, 500µA

internal pull-up or complementary (push-pull) drive with

the two Flt_drv_mode bits. Refer to Figure 8 for an

equivalent circuit of the FAULT pin.

edgeofthemodulationwaveformtoacceleratetheturn-off

ofthelaserdiode. The5-bitPEAKINGregistercontrolsthis

function. See the Typical Performance Chacteristics for

further information. Lower values in the PEAKING register

The FAULT pin can be overridden in software for testing increase the falling edge peaking.

purposes or to allow a microprocessor in the transceiver

module to fully control the module’s fault output. If the

Flt_pin_override bit is set, then the Force_flt bit fully

controls the state of the FAULT pin.

ANALOG-TO-DIGITAL CONVERSION

Overview

The state of the LTC5100 can be monitored by reading the

FLT_STATUSregister.SeeTable21foradescriptionofthe

status bits.

The ADC in the LTC5100 is a 10-bit, dual slope integrating

converter with excellent linearity and noise rejection. A

multiplexer allows digitizing six quantities:

• SRC pin current, I_S

EYE SAFETY INFORMATION

• Average modulation current, I_M

• Laser diode voltage, V_LD

• Monitor diode current, I_MD

• Termination resistor voltage, V_TERM

• Die temperature, T

Communications lasers can emit levels of optical power

that pose an eye safety risk. While the LTC5100 provides

certain fault detection features, these features alone do

not ensure that a laser transmitter using the LTC5100 is

compliant with IEC 825 or the regulations of any particu-

lar agency. The user must analyze the safety require-

ments of their transceiver module or system, activate the

All of these measurements are available to the user via the

I²C serial bus.

sn5100 5100fs

29

LTC5100

U

OPERATIO

Conversion Sequence

writing the USER_ADC register clears the Valid bit. The

Valid bit remains cleared until the next user conversion is

complete. USER_ADC.Adc_src always corresponds to

thesignalsourcewhosedataisstoredinUSER_ADC.Data,

not the source that was most recently selected by writing

USER_ADC.Adc_src_sel. The Valid bit and ADC_src field

are useful for monitoring when the ADC has updated the

USER_ADC.Data field. Table 3 gives an extended example

of accessing the USER_ADC register.

TheADChasa1msconversiontimeandoperatesinafour-

cycle sequence. Three of these cycles are dedicated to the

needs of the servo controllers for laser bias and modula-

tion current. One cycle is available to the user to convert

any desired quantity. Table 2 shows how the four conver-

sion time slots are allocated. The temperature compensa-

tion and servo loop calculations are done during the User

cycle. The source and modulation DACs are also updated

during this cycle.

NotethatthecontentoftheUSER_ADCregisterisdifferent

for writing and for reading, even though the I²C command

used to access this register is the same in both cases. See

Table 23 and Table 24 for a detailed definition of the bit

fields in the USER_ADC register. Table 23 also shows how

to convert ADC digital codes to real-world quantities.

Table 2. ADC Conversion Sequence

RESULT STORED IN

CYCLE

APC MODE

CCC MODE

REGISTER

1

2

3

4

T

T_INT_ADC

IM_ ADC

I

M

S

IMD_ADC/IS_ADC

USER_ADC

MD

User

DIRECT MICROPROCESSOR CONTROL OF THE LASER

BIAS AND MODULATION CURRENT

User Access to the ADC

Setting Lpc_en to zero turns off the LTC5100’s digital

Laser Power Controller (see Figure 2). The source and

modulationDACs(Is_dacandIm_dac)canthenbewritten

from the I²C serial bus, allowing an external microproces-

sor or test computer to directly control the source and

modulation currents.

The results of each conversion cycle in Table 2 are stored

in user accessible registers. The last die temperature

measurement can be read over the I²C bus at any time by

reading the T_INT_ADC register. Note that the quantity

converted during the third cycle depends on whether the

chip is in APC or CCC mode. The result of the third

conversion cycle is stored in a register that is called DIGITAL CONTROL AND THE I²C SERIAL INTERFACE

IMD_ADC in APC mode and IS_ADC in CCC mode. There

The LTC5100 has extensive digital control and monitoring

is only one register, but it is given two names to indicate

features. Thesefeaturescanbeusedduringfinalassembly

the quantity it actually holds.

of a transceiver module to set up the laser and verify

The fourth cycle, called the user cycle, is available to

digitize any of the six multiplexed signals. The result can

be read out over the I²C serial bus. The signal to be

digitized during the user cycle is selected by setting the

three-bit field USER_ADC.Adc_src_sel (see Table 23).

For example, setting Adc_ src_sel = 2 programs the

performance. In normal operation, the LTC5100 can oper-

ate standalone or under microprocessor supervision. Op-

erating standalone, the LTC5100 automatically loads its

configuration and laser operating parameters (bias cur-

rent, modulation current, monitor diode current) from a

small external EEPROM at power up. Operating under

multiplexer to select the laser diode voltage, V_LD. During microprocessor supervision, the microprocessor is in

the next user conversion cycle, V_LDis converted and total control of setting up the LTC5100.

storedtotheUSER_ADC. Datafield. Whentheconversion

I²C Serial Interface Protocol

is complete, USER_ADC.Valid is set and

USER_ADC.Adc_src indicates the signal source whose

converted value is stored in USER_ADC.Data. Reading or

The digital interface for the LTC5100 is I²C, a 2-wire serial

busstandardthatisfullydocumentedin“I²C-BusandHow

sn5100 5100fs

30

LTC5100

U

OPERATIO

Table 3. Example of User ADC Cycle Access

READ FROM

ADC_USER

REGISTER

ADC

CYCLE

WRITE TO

Adc_src_sel

SIGNAL SOURCE

Adc_src

Valid

Data

COMMENT

Selected Signal Source is V

TERM

1

2

3

4

1

T

V

TERM

V

TERM

V

TERM

V

TERM

V

TERM

0

1

V

TERM

V

TERM

V

TERM

V

TERM

V

TERM

(1)

(2)

I

M

S

User (V

T

)

TERM

ADC Updates Data with New Data,

Setting Valid

2

I

V

LD

V

0

V

(2)

User Selects New Signal Source,

M

TERM

V

LD

, Clearing Valid

3

4

1

V

TERM

V

TERM

V

LD

0

1

V

(2)

S

TERM

User (V

T

)

LD

TERM

(1)

ADC Updates Data with New Data,

Setting Vaild and Changing Adc_src

to Reflect the Source of the New Data

LD

2

3

I

V

1

0

V

(1)

M

S

LD

V

LD

User Reads the ADC_USER Register,

Clearing Valid

LD

4

1

User (V

T

)

V

0

1

V

(1)

(2)

LD

ADC Updates Data with New Data,

Setting Valid

LD

2

3

4

I

V

LD

V

LD

V

LD

1

V

LD

V

LD

V

LD

(2)

M

S

User (V

LD

LTC5100

ADDRESS

COMMAND

LOW BYTE

HIGH BYTE

A

WRITE

READ

S

W A

A

P

BYTE

(7 BITS) 0x0A

LTC5100

ADDRESS

(7 BITS) 0x0A

LTC5100

ADDRESS

0x0A

COMMAND

BYTE

N

A

W A

S

R

A LOW BYTE

HIGH BYTE

A

P

5100 F28

Figure 28. I²C Serial Read/Write Sequences (LTC5100 Responses are Shown in Bold Italics)

to Use It, V1.0” by Philips Semiconductor. The 7-bit I²C

bus address for the LTC5100 is 0x0A (hex). When the

Read/Writebitthatfollowsisa“1”,theresulting8-bitword

becomes 0x15. When the Read/Write bit is a “0”, the 8-bit

word becomes 0x14. To communicate with the LTC5100,

the bus master transmits the LTC5100 address followed

by a command byte and data as defined by the I²C bus

specificationandshowninFigure28andTable4.Notethat

16 bits of data are always transmitted, low byte first, high

byte last. Within each transmitted byte, the bit order is

MSB .. LSB. The register set and I²C command set for the

LTC5100 are documented in Table 7 through Table 30.

Table 4. Legend for the I²C Protocol

SYMBOL

MEANING

Start

S

W

R

Write

Read

A

Acknowledge

No Acknowledge

Stop

NA

P

sn5100 5100fs

31

LTC5100

U

OPERATIO

Standalone Operation

Operating_mode = 1. Table 5 shows the memory map for

the EEPROM.

On power-up the LTC5100 becomes an I²C bus master

and attempts to load its configuration data from an exter-

nalEEPROM. IfanEEPROMresponds,theLTC5100reads

16-bytes of data and transfers this data to the internal

register set. When a 16-byte transfer is completed without

error, the LTC5100 becomes ready to enable the transmit-

ter and begin driving the laser. If a bus error occurs during

this transfer, the load sequence is aborted and a

Mem_load_error is generated, preventing the transmitter

from being enabled until a successful memory load at-

tempt is completed or until an external agent sets the

Operating_mode bit. Every 64ms another attempt is made

to load the EEPROM until the memory is read or until

The LTC5100 generates I²C address 0xAE (1010_1110

binary) when accessing the EEPROM, making it compat-

ible with a wide range of EEPROM sizes. Table 6 details

how the LTC5100 interacts with EEPROMs from 128 bits

to 16k bits and from where it gets its data.

The LTC5100 supports hot plugging in standalone mode.

If the Soft_en bit is set in the EEPROM and the EN pin is

active, the LTC5100 loads its configuration data from the

EEPROM and immediately enables the transmitter. The

transmitter is typically enabled and settled within the

300ms t_init period required by the GBIC specification.

Table 5. EEPROM Memory Map

BIT

BYTE

15

14

13

12

11

10

9

7

6

5

4

3

2

1

0

Reserved

Peaking (4:0)

Ib_gain(4:0)/Apc_gain(4:0)

Reserved

Im_gain(2:0)

Imd_rng(1:0)

T_nom(9:8)

T_nom(7:0)

Im_tc2(7:0)

Im_tc1(7:0)

Reserved

Im_rng(1:0)

Is_rng(1:0)

Im_nom(9:8)

8

Im_nom(7:0)

Ib_tc2(7:0)/Imd_tc2(7:0)

Ib_tc1(7:0)/Imd_tc2(7:0)

Reserved

7

6

5

Ib_nom(9:8)/Imd_nom (9:8)

4

Ib_nom(7:0)/Imd_nom(7:0)

Reserved

3

Rep_flt_inhibit Rapid_restart_en Flt_drv_mode

2

Lpc_en

Auto_shutdn_en Flt_pin_polarity Flt_pin_override Force_flt

Ib_limit

Over_pwr_en

Under_pwr_en Over_current_en

1

Reserved

0

Cml_en

Md_polarity

Ext_temp_en

Power_down_en Apc_en

En_polarity

Soft_en

Operating_mode

sn5100 5100fs

32

LTC5100

U

OPERATIO

Table 6. Effective Base Addresses for Various Sized EEPROMs

GENERIC PART NUMBER

Bits

24LC00

128

24LC01B

1k

24LC02B

2k

24LC04B

4k

24LC16B

16k

Bytes

16

128

256

512

2048

Device Address (Binary)

Word Address Space (Binary)

1010xxx.

xxxx_nnnn

1010xxx.

xnnn_nnnn

1010xxx.

nnnn_nnnn

1010.xxa

nnnn_nnnn

1010cba.

nnnn_nnnn

LTC5100 Generates

Device Address

1010_111.

= 0xAE

1010_111.

= 0xAE

1010_111.

= 0xAE

1010_111.

= 0xAE

1010_111.

= 0xAE

LTC5100 Generates

Word Address

0110_0000

= 0x60

0110_0000

= 0x60

0110_0000

= 0x60

0110_0000

= 0x60

0110_0000

= 0x60

Effective Base Address

0000_0000

= 0x00

0110_0000

= 0x60

0110_0000

= 0x60

0001_0110_0000

= 0x160

0111_0110_0000

= 0x760

Comments

Minimum Size

EEPROM.

Loads Every

Byte in the

EEPROM.

EEPROM Not Big

Enough for GBIC

ID. LTC5100

Loads from 0x60

to 0x6F

Standard GBIC

EEPROM.

LTC5100 Loads

from an Area

Outside the GBIC

LTC5100 Loads

from an Area

Outside the GBIC

Smallest EEPROM

That is Big Enough

to Hold the LTC5100

Data and the GBIC ID.

LTC5100 Loads from

0x60 to 0x6F, the First

16 Bytes of the

ID Data Area

Vendor Area

Microprocessor Controlled Operation

technically necessary to set the Operating_mode bit to

communicate with the LTC5100.

An external microprocessor or a test computer can take

fullcontroloftheLTC5100bysettingtheOperating_mode

bit. When this bit is set, the LTC5100 stops searching for

an external EEPROM and takes commands from the mi-

croprocessor. It is even possible to combine standalone

and microprocessor controlled modes. If an EEPROM is

present, the LTC5100 will load its configuration registers

from the EEPROM at power-up. A microprocessor or test

computer can then read and write the LTC5100 registers

at will.

The LTC5100 attempts to read the EEPROM every 64ms

until it successfully loads its registers or until the

Operating_mode bit is set. There is a finite chance that the

microprocessor and the LTC5100 will generate an I²C bus

collision if an EEPROM load attempt coincides with the

microprocessor’s attempt to access the LTC5100. In this

case, the microprocessor will receive a NACK (not-ac-

knowledged) response to its transmissions. The micro-

processorneedsonlytoceasetransmissioninaccordance

with the I²C protocol and try again. If the microprocessor

makes this second attempt within 64ms (typical), it is

guaranteed not to collide with the LTC5100.

The primary purpose of the Operating_mode bit is to stop

theLTC5100’sEEPROMloadattempts. OncetheLTC5100

has loaded itself from an EEPROM (if present), it is not

sn5100 5100fs

33

LTC5100

U U

REGISTER DEFI ITIO S

Table 7. Register Set Overview

REGISTER NAME

2

CONSTANT CURRENT

CONTROL MODE

AUTOMATIC POWER

CONTROL MODE

I C COMMAND

READ/WRITE

ACCESS

REFERENCE

INFORMATION

REGISTER GROUP

CODE (HEX)

0x10

0x1E

0x1F

System Operating

Configuration

SYS_CONFIG

LOOP_GAIN

PEAKING

Reserved

IB

“

R/W

R

Table 8

Table 9

“

Table 10

Table 11

Table 12

Table 13

Table 14

Table 15

Table 16

Table 17

Table 18

Table 19

Table 20

Table 21

Table 22

Tables 23, 24

Table 25

Table 26

Table 27

Table 28

Table 29

Table 30

“

0x08

0x15

0x16

0x17

0x19

0x1A

0x1B

0x0D

0x1D

0x13

0x12

0x11

0x18

0x05

0x06

0x07

0x01

0x02

0x03

Laser Setup Coefficients

IMD

IB_TC1

IMD_TC1

IB_TC2

IMD_TC2

IM

“

IM_TC1

“

IM_TC2

“

Temperature

T_EXT

“

T_NOM

“

Fault Monitoring

and Eye Safety

FLT_CONFIG

FLT_STATUS

IB_LIMIT

USER_ADC

T_INT_ADC

IM_ADC

“

R/W

R

ADC

“

IS_ADC

IMD_ADC

DAC

IS_DAC

“

IM_DAC

PWR_ LIMIT_DAC

sn5100 5100fs

34

LTC5100

U U

REGISTER DEFI ITIO S

Table 8. Register: SYS_CONFIG—System Configuration (I²C Command Code 0x10)

REGISTER

.BITFIELD

RESET VALUE

(BIN)

BIT

15:8

7

FUNCTION AND VALUES

.Reserved

.Cml_en

0

Current Mode Logic Enable

0: Floating Differential Input Termination: 100Ω Across IN and IN

1: CML Compatible Input Termination: 50Ω from IN to V

+

–

+

–

and from IN to V

DD(HS)

.Md_polarity

.Ext_temp_en

6

5

Monitor Diode Polarity

0: Cathode Connected to the MD Pin, Sinking Current from the Pin

1: Anode Connected to the MD Pin, Sourcing Current Into the Pin

External Temperature Enable

Selects the Source of Temperature Measurements for Temperature Compensation.

0: Internal Temperature Sensor

1: Externally Supplied Through the Serial Interface

.Power_down_en

.Apc_en

4

3

2

1

0

Power Down Enable

Allow Power Reduction When the Transmitter is Disabled.

0: No Power Reduction When the Transmitter is Disabled.

1: Reduce Power Consumption When Transmitter is Disabled by Turning Off the High Speed Amplifiers.

Automatic Power Control Enable

Select the Means of Controlling the Laser Bias Current.

0: Constant Current Control

1: Automatic Power Control Using Feedback from the Monitor Diode

.En_polarity

EN Pin Polarity

Set the Input Polarity of the EN Pin.

0: Active Low: A Logic Low Input Level Enables the Transmitter.

1: Active High: A Logic High Input Level Enables the Transmitter.

Note: In order to Enable the Transmitter, Both the EN Pin and Soft_en Bit Must be Asserted.

.Soft_en

1

0

Soft Transmitter Enable

Enables Transmitter Through the Serial Interface.

0: Disable the Transmitter

1: Enable the Transmitter (if the EN Pin is Active)

Note: In order to Enable the Transmitter, Both the EN Pin and Soft_en Bit Must be Asserted.

.Operating_mode

Digital Operating Control Mode

Select Whether the LTC5100 Operates Autonomously or Under External Control.

0: Standalone Operation: Configuration Parameters are Loaded from an External EEPROM at Power Up.

1: Externally Controlled Operation: Configuration Parameters are Set by an External Microprocessor or

Test Computer.

sn5100 5100fs

35

LTC5100

U U

REGISTER DEFI ITIO S

Table 9. Register: LOOP_GAIN—Control Loop Gain (I²C Command Code 0x1E)

REGISTER

.BITFIELD

RESET VALUE

(BIN)

BIT

15:8

7

FUNCTION AND VALUES

.Reserved

.Ib_gain

0

1

0

Bias Current or APC Loop Gain

(.Apc_gain in APC

Mode)

6

This Bit Field Modifies the Open-Loop Gain of the Bias Current Servo Control Loop. The Effect of This

Bit Field Differs in Constant Current Control (CCC) Mode and in Automatic Power Control (APC) Mode.

In CCC Mode, This Bit Field is Called lb_gain. In APC Mode, This Bit Field is Called Apc_gain.

5

4

3

Constant Current Control (CCC) Mode (Apc_en = 0): The Loop Gain and Settling Time are Independent

of Is_rng. The Default Value of Ib_gain Yields Stable but Slow Settling of the Laser Bias Current for

Any Value of Is_rng.

Automatic Power Control (APC) Mode (Apc_en = 1): The Open-Loop Gain of the Bias Current Servo

Loop Depends on the Value of Is_rng. The Default Value of Apc_gain Yields Stable but Potentially Slow

Settling of the Laser Bias Current for any Value of Is_rng.

Im_gain

2

1

0

1

Modulation Current Loop Gain

This Bit Field Modifies the Open-Loop Gain of the Modulation Current Servo Loop. The Open-Loop.

Gain is Approximately Im_gain/32. The Loop Gain and Settling Time are Independent of Im_rng. The

Default Value of Im_gain Yields Stable but Slow Settling of the Laser Modulation Current.

Table 10. Register: PEAKING—High Speed Modulation Peaking (I²C Command Code 0x1F)

REGISTER

.BITFIELD

RESET VALUE

(BIN)

BIT

15:5

4

FUNCTION AND VALUES

.Reserved

.Peaking

1

0

Peaking Control for the Modulation Output

3

This Bit Field Controls the High Speed Peaking of the Modulation Output. Decreasing the Value of

Peaking Increases the Undershoot on the Falling Edge of the Modulation Signal. The Peaking Control

can be Used to Compensate for Slow Laser Turn-Off Characteristics.

2

1

0

Table 11. Register: Reserved—Reserved for Internal Use. This Register is for Test Puposes Only. Do Not Write to this Register

(I²C Command Code 0x08)

REGISTER

.BITFIELD

RESET VALUE

(BIN)

BIT

15:7

6

FUNCTION AND VALUES

.Reserved

1

0

1

0

Reserved for Internal Use, Do Not Write.

5

4

3

.Reserved

2

Reserved for Internal Use, Do Not Write.

1

0

sn5100 5100fs

36

LTC5100

U U

REGISTER DEFI ITIO S

Table 12. Register: IB (IMD)—Laser Bias Current Register (Monitor Diode Current in APC Mode) (I²C Command Code 0x15)

REGISTER

.BITFIELD

RESET VALUE

(BIN)

BIT

15:12

11

FUNCTION AND VALUES

.Reserved

.Is_rng

0

Source Current Range

10

Is_rng Sets the Full-Scale Range of the SRC Pin Current. The Table Below Shows the Available Ranges.

Values for Is_rng

Nominal Full-

Binary

Value

Decimal

Value

Scale SRC Pin

Current (mA)

00

01

10

11

0

1

2

3

9

18

27

36

See the Electrical Specifications for Guaranteed Limits in Each Range.

Bias Current or Monitor Diode Current Setting at the Nominal Temperature

This Bit Field has Different Functions Depending on Apc_en.

This Bit Field is an Unsigned 10-Bit Integer.

.Ib_nom

(.Imd_nom in

APC Mode)

9

8

7

6

5

4

3

2

1

0

Constant Current Control (CCC) Mode (Apc_en = 0): Ib_nom Sets the Laser Bias Current at

Temperature T = T_nom. The physical Bias Current at T_nom is Given by:

Ib_nom

1024

(typical)

•(Is_rng+ 1)•9mA

I_B=

Automatic Power Control (APC) Mode (Apc_en = 1): Imd_nom Sets the Monitor Diode Current at the

Temperature T = T_nom. The Physical Monitor Diode Current at T_nom is Given by:

Imd_nom

I_MD= 4.25µA •4^Imd_rng•exp ln(8)•

1024

Table 13. Register: IB_TC1 (IMD_TC1)—Laser Bias/Monitor Diode Current First Order Temperature Coefficient

(I²C Command Code 0x16)

REGISTER

.BITFIELD

RESET VALUE

(BIN)

BIT

15:8

7

FUNCTION AND VALUES

.Reserved

.Ib_tc1 (.Imd_tc1

in APC Mode)

0

First Order Temperature Coefficient for Bias Current or Monitor Diode Current

This Bit Field is a Signed 8-Bit, Two’s Complement Integer. Thus its Value Ranges from –128 to 127.

This Bit Field has Different Functions Depending on Apc_en.

6

5

4

Constant Current Control (CCC) Mode (Apc_en = 0): Ib_tc1 Sets the First Order Temperature

Coefficient for the Laser Bias Current. The Nominal Scaling is 2 /°C or 122ppm/°C per LSB.

–13

3

2

Automatic Power Control (APC) Mode (Apc_en = 1): Imd_tc1 Sets the First Order Temperature

Coefficient for the Monitor Diode Current. See Laser Bias Current Control in APC Mode

in the Operation Section for Details.

1

0

sn5100 5100fs

37

LTC5100

U U

REGISTER DEFI ITIO S

Table 14. Register: IB_TC2 (IMD_TC2)—Laser Bias/Monitor Diode Current Second Order Temperature Coefficient

(I²C Command Code 0x17)

REGISTER

.BITFIELD

RESET VALUE

(BIN)

BIT

15:8

7

FUNCTION AND VALUES

.Reserved

.Ib_tc2 (.Imd_tc2

in APC Mode)

0

Second Order Temperature Coefficient for Bias Current or Monitor Diode Current

This Bit Field is a Signed 8-Bit, Two’s Complement Integer. Thus its Value Ranges from –128 to 127.

This Bit Field has Different Functions Depending on Apc_en.

6

5

4

Constant Current Control (CCC) Mode (Apc_en = 0): Ib_tc2 Sets the Second Order Temperature

Coefficient for the Laser Bias Current. The Nominal Scaling is 2 /°C or 3.81ppm/°C per LSB.

–18

2

3

2

Automatic Power Control (APC) Mode (Apc_en = 1): Imd_tc2 Sets the Second Order Temperature

Coefficient for the Monitor Diode Current. See Laser Bias Current Control in APC Mode

in the Operation Section for Details.

1

0

Table 15. Register: IM—Laser Modulation Current (I²C Command Code 0x19)

REGISTER

.BITFIELD

RESET VALUE

(BIN)

BIT

15:12

11

FUNCTION AND VALUES

.Reserved

.Im_rng

0

Modulation Current Range

10

Im_rng Sets the Full-Scale Range of the Modulation Current

Binary Decimal Nominal Full-Scale MODA and MODB Pin Current

Value

Peak-to-Peak (mA)

Average (mA)

00

0

1

2

3

9

4.5

9

01

18

27

36

10

13.5

18

11

See the Electrical Specifications for Guaranteed Limits in Each Range.

These Currents Represent the Peak-to-Peak Current at the MODA and MODB Pins. (The MODA and

MODB Pins are Tied Together On Chip).

.Im_nom

9

8

7

6

5

4

3

2

1

0

Modulation Current Setting at the Nominal Temperature

This Bit Field is an Unsigned 10-Bit Integer. Im_nom Sets the Average Modulation Current Delivered at

the MODA and MODB Pins. (The MODA and MODB Pins are Tied Together On Chip).

The Peak-to-Peak Current is Twice the Average Current for a Data Stream with 50% Duty Cycle.

The Modulation Current Reaching the Laser Depends on its Dynamic Resistance Relative to the

Termination Resistor.

sn5100 5100fs

38

LTC5100

U U

REGISTER DEFI ITIO S

Table 16. Register: IM_TC1—Laser Modulation Current First Order Temperature Coefficient (I²C Command Code 0x1A)

REGISTER

.BITFIELD

RESET VALUE

(BIN)

BIT

15:8

7

FUNCTION AND VALUES

.Reserved

.Im_tc1

0

First Order Temperature Coefficient for Modulation Current

6

This Bit Field is a Signed 8-Bit, Two’s Complement Integer. Thus its Value Ranges from –128 to 127.

Im_tc1 Sets the First Order Temperature Coefficient for the Modulation Current. The Nominal Scaling

5

–13

is 2 /°C or 122ppm/°C per LSB.

4

3

2

1

0

Table 17. Register: IM_TC2—Laser Modulation Current Second Order Temperature Coefficient (I²C Command Code 0x1B)

REGISTER

.BITFIELD

RESET VALUE

(BIN)

BIT

15:8

7

FUNCTION AND VALUES

.Reserved

.Im_tc2

0

Second Order Temperature Coefficient for Modulation Current

6

This Bit Field is a Signed 8-Bit, Two’s Complement Integer. Thus its Value Ranges from –128 to 127.

Im_tc2 Sets the Second Order Temperature Coefficient for the Laser Bias Current. The Nominal

5

–18

2

Scaling is 2 /°C or 3.81ppm/°C per LSB.

4

3

2

1

0

Table 18. Register: T_EXT—External Temperature (I²C Command Code 0x0D)

REGISTER

.BITFIELD

RESET VALUE

(BIN)

BIT

FUNCTION AND VALUES

.Reserved

.T_ext

15:10

9

8

7

6

5

4

3

2

1

0

Externally Supplied Temperature for Temperature Compensation Calculations (Unsigned 10-Bit

Integer)

By Convention the Scaling of T_ext is 512K or 239°C Full Scale, Corresponding to 0.5°C/LSB.

However, Any Scaling is Permissible as Long as the Temperature Compensation Coefficients are Also

Appropriately Scaled.

T_ext = (T + 273°C)/0.5°C, Where T is the External Temperature in Degrees Celsius.

sn5100 5100fs

39

LTC5100

U U

REGISTER DEFI ITIO S

Table 19. Register: T_NOM—Nominal Temperature (Includes Imd_rng) (I²C Command Code 0x1D)

REGISTER

.BITFIELD

RESET VALUE

(BIN)

BIT

15:12

11

FUNCTION AND VALUES

.Reserved

.Imd_rng

0

Monitor Diode Current Range

10

Imd_rng Sets the Full-Scale Range of the Monitor Diode Current.

MD Pin Current Range (µA)

Binary Decimal

Value

Nom Min

4.25

17

Nom Max

34

00

0

1

2

3

01

136

10

68

544

11

272

2176

.T_nom

9

8

7

6

5

4

3

2

1

0

Nominal Temperature

T_nom is the Temperature with Respect to Which All Temperature Compensation Calculations are

Made. T_nom is Usually the Temperature at Which the LTC5100 and Laser Diode were Set Up In

Production.

The Scaling is 512K or 239°C Full Scale, Corresponding to 0.5°C/LSB

T_nom = (T + 273°C)/0.5°C, Where T is the Nominal Temperature in Degrees Celsius.

sn5100 5100fs

40

LTC5100

U U

REGISTER DEFI ITIO S

Table 20. Register: FLT_CONFIG—Fault Configuration (Refer also to Table 1) (I²C Command Code 0x13)

REGISTER

.BITFIELD

RESET VALUE

(BIN)

BIT

15:12

11

FUNCTION AND VALUES

.Reserved

Rep_flt_inhibit

0

1

Repeated Fault Inhibit

0: Allow Repeated Attempts to Clear a Fault and Re-enable the Transmitter.

1: Inhibit Repeated Attempts to Clear a Fault. Only One Attempt to Clear a Fault is Allowed. If the Fault

Recurs Within 25ms of Re-enabling the Transmitter, the Transmitter is Disabled Until Power is

Cycled.

Rapid_restart_en

10

Rapid_restart_en

0: Rapid Restart Disabled: The Servo Controller Settings for the Laser Bias and Modulation Currents

are Reset to Zero when the Transmitter is Disabled. When Re-enabled, the Laser Currents Start from

Zero and Settle Typically Within the 300ms Standard Initialization Time, t_int, from the GBIC

Specification.

1: Rapid Restart Enabled: The Servo Controller Settings for the Laser Bias and Modulation Currents are

Retained when the Transmitter is Disabled. When Re-enabled, the Retained Servo Values are Loaded

into the SRC_DAC and MOD_DAC, Allowing Settling Typically Within the 1ms Standard Turn-On

Time, t_on, from the GBIC Specification.

Flt_drv_mode

Lpc_en

9

8

0

FAULT Pin Drive Mode

00: Open Drain (3.3mA Sink Capability)

01: Open Drain, 280µA Internal Pull Up

10: Open Drain, 425µA Internal Pull Up

11: Push-Pull (3.3mA Source and Sink Capability)

7

6

1

Laser Power Controller (LPC) Enable

0: LPC Disabled: Allows External Control of the SRC_DAC and MOD_DAC Registers from the Serial

Interface. This Setting Gives an External Microprocessor or Test Computer Full Control of the

SRC_DAC and MOD_DAC Registers.

1: LPC Enabled: The LPC Continuously Updates the SRC_DAC and MOD_DAC Registers to Servo

Control the Laser. (Any Values Written to These Registers Over the Serial Interface Will be

Overwritten by the LPC.)

Auto_shutdn_en

Automatic Transmitter Shutdown Enable

0: Disabled: When a Fault Occurs the LTC5100 Continues to Drive the Laser. This Mode Allows a

Microprocessor or Test Computer to Mediate the Decision to Shut Down the Transmitter. The

Microprocessor can Turn Off the Transmitter by Driving the EN Pin Inactive or by Clearing the

Soft_en Bit in the SYS_CONFIG Register.

1: Enabled: When a Fault Occurs, the Transmitter is Automatically Disabled.

Flt_pin_polarity

Flt_pin_override

5

4

1

0

FAULT Pin Polarity

0: Active Low: The FAULT Pin is Driven Low to Signal a Fault.

1: Active High: The FAULT Pin is Driven High to Signal a Fault.

FAULT Pin Override

0: The FAULT Pin is Driven Active when a Fault Occurs.

1: Internal Control of the FAULT Pin is Overridden. When a Fault Occurs, the Fault is Detected and

Latched Internally, but the FAULT Pin Remains Inactive. This Mode Allows a Microprocessor or Test

Computer to Mediate Fault Handling. The Microprocessor can Drive the FAULT Pin Active by Setting

the Force_flt Bit.

Force_flt

3

0

Force the FAULT Pin Output.

Force_flt Gives a Microprocessor or Test Computer Full Control of the FAULT Pin, Allowing External

Mediation of Fault Handling.

0: Force the FAULT Pin Inactive.

1: Force the FAULT Pin Active.

This Bit Has No Effect Unless Flt_pin_override = 1.

Over_pwr_en

2

1

0

1

Enables Detection of a Laser Overpower Fault.

0: Disabled, 1: Enabled

Under_pwr_en

Over_current_en

Enables Detection of a Laser Underpower Fault.

0: Disabled, 1: Enabled

Enables Detection of a Laser Overcurrent Fault.

0: Disabled, 1 Enabled

sn5100 5100fs

41

LTC5100

U U

REGISTER DEFI ITIO S

Table 21. Register: FLT_STATUS—Fault Status (I²C Command Code 0x12)

REGISTER

.BITFIELD

RESET VALUE

(BIN)

BIT

15:11

10

FUNCTION AND VALUES

.Reserved

.Transmit_ready

0

Transmit Ready

Indicates that the Laser Bias and Modulation Currents Have Settled to Within Specification and the

LTC5100 is Ready to Transmit Data. A Fault Clears This Bit.

0: Not Ready, 1: Ready

.Transmitter_

enabled

9

8

Transmitter Enabled

Indicates That the Transmitter is Enabled and the Laser Bias and Modulation Currents Are on (Though

Not Necessarily Settled.) The Transmitter is Enabled When the EN pin and Soft_en Bits are Active and

No Faults Have Occurred. A Fault Clears This Bit.

0: Transmitter is Disabled, 1: Transmitter is Enabled.

.En_pin_state

Varies

EN Pin State

Indicates the Logic Level on the EN Pin. The En_polarity Bit Has No Effect on En_pin_state.

The Power-On Reset Value Reflects the State of the EN Pin.

0: EN Pin is Low.

1: EN Pin is High.

.Faulted_twice

.Faulted_once

7

6

0

1

Faulted Twice (Only Active When Rep_flt_inhibit is Set)

0: Either No Faults or Only One Fault Has Been Detected.

1: A Second Fault Has Been Detected Within 25ms of Attempting to Clear a First Fault. The Transmitter

is Disabled and Can Only be Re-enabled by Cycling the Power.

Faulted Once (Only Active When Rep_flt_inhibit is Set)

Indicates That a First Fault Has Been Detected. After a Fault Occurs, Faulted_once Will be Set at the

Moment the Transmitter is Disabled (by Setting the EN pin of Soft_en Bit Inactive). If the Transmitter

is Subsequently Re-enabled and a Second Fault Occurs Within 25ms, the Faulted_twice Bit is Set. If

No Fault Occurs Within 25ms, the Faulted_once Bit is Cleared.

0: A First Fault Has Not Been Detected or Has Been Cleared.

1: A First Fault Has Been Detected.

.Faulted

5

4

1

Faulted

0: The LTC5100 is Not in the Faulted State.

1: A Fault Has Occurred and the LTC5100 Has Entered the Faulted State (the Transmitter is Not

Disabled Unless Auto_shutdn_en is Set).

.Under_votlage

Cleared-on-read

Undervoltage Fault Indicator (Always Enabled)

Indicates That a Power Supply Undervoltage Event Occurred.

0: No Fault, 1: Undervoltage Fault Detected.

The Undervoltage Bit is Always Set at Power Up. Read the FLT_STATUS Register Immediately After

Power-Up to Clear This Bit.

.Mem_load_error

Cleared-on-read

3

2

1

0

Memory (EEPROM) Load Error Indicator (Always Enabled)

Indicates That an Attempt to Load the Registers from EEPROM Was Started But Did Not Complete

Successfully.

0: No Fault, 1: EEPROM Load Failed.

.Over_power

Cleared-on-read

Laser Overpower Fault Indicator (Enabled by Over_pwr_en)

Indicates That a Laser Overpower Fault Occurred. Overpower Occurs When the Monitor Diode Current

Exceeds its Set Point. An Overpower Fault Can Occur Only in APC Mode.

0: No Fault, 1: Overpower Fault Detected.

.Under_power

Cleared-on-read

Laser Underpower Fault Indicator (Enabled by Under_pwr_en)

Indicates That a Laser Underpower Fault Occurred. Underpower Occurs When the Monitor Diode

Current Falls Below its Set Point. An Underpower Fault Can Occur Only in APC Mode.

0: No Fault, 1: Underpower Fault Detected.

.Over_current

Cleared-on-read

Laser Overcurrent Fault Indicator (Enabled by Over_current_en)

Indicates That the Laser Bias Current Exceeded the Value Set in the IB_LIMIT Register.

0: No Fault, 1: Overcurrent Fault Detected.

sn5100 5100fs

42

LTC5100

U U

REGISTER DEFI ITIO S

Table 22. Register: IB_LIMIT—Laser Bias Current Limit (I²C Command Code 0x11)

REGISTER

.BITFIELD

RESET VALUE

(BIN)

BIT

15:7

6

FUNCTION AND VALUES

.Reserved

.Ib_limit

0

Laser Bias Current Limit

5

This Bit Field is an Unsigned 7-Bit Integer

4

Sets the Detection Level for an Over_current Fault. When the Laser Bias Current Exceeds This Level an

Over_current Fault is Generated (Provided Over_current_en is Set).

3

The Physical Bias Current Level is Given By:

2

Ib_limit

128

1

I_B(LIMIT)

=

•(Is_rng + 1)•9mA (typical)

0

Table 23. Register: USER_ADC—Writing (I²C Command Code 0x18)

REGISTER

.BITFIELD

RESET VALUE

(BIN)

BIT

15:3

2

FUNCTION AND VALUES

.Reserved

.Adc_src_sel

0

ADC Source Select

1

Selects the Signal to be Converted by the ADC During the User ADC Cycle

0

User ADC Signal Sources

Signal

Select

(Binary) Name

Signal

Description

Scaling

000

001

I

Source Current (SRC Pin I = ADC_code/1024 • (Is_rng + 1) • 9mA

Current)

S

I

Average Modulation

Current (MODA +MODB

Pin Current)

I = ADC_code/1024 • (Im_rng + 1) • 9mA

M

010

011

V

Laser Diode Voltage

V

= ADC_code/1024 • 3.5V

LD

lmd_rng

I

Monitor Diode Current

I

= 4.25µA • 4

• exp[In(8) • ADC_code/

MD

1024]

100

101

T

Temperature

T(°C) = ADC_code • 0.5°C – 273°C

V

Termination Resistor

Voltage

V

= ADC_code/1024 • (Is_rng + 1) • 400mV

TERM

110

111

Reserved Reserved

sn5100 5100fs

43

LTC5100

U U

REGISTER DEFI ITIO S

Table 24. Register: USER_ADC—Reading (I²C Command Code 0x18)

REGISTER

.BITFIELD

RESET VALUE

(BIN)

BIT

15

14

13

12

FUNCTION AND VALUES

.Reserved

.Adc_src

0

ADC Signal Source

Specifies the Signal Source of the Last User ADC Conversion. See Table 23 for the Definition of These

Signal Sources. Adc_src Reflects the Last Signal Source Converted. It Does Not Necessarily Hold the

Last Value Written to the ADC_src_sel Bit Field.

.Reserved

.Valid

11

10

0

ADC Data Valid

Indicates That the Result in the Data Bit Field (Defined Below) Contains Newly Converted Data Since

the Last Time Adc_src_sel Was Written or This Register Was Read. Immediately After Power Up

Valid is False. Valid Becomes True as Soon as the First User ADC Conversion is Completed.

0: The ADC Result is Not a Valid Conversion of the Most Recently Selected ADC Source.

1: The ADC Has Finished Conversion and the Result is Valid.

.Data

9

8

7

6

5

4

3

2

1

0

ADC Data (10-Bit Unsigned Integer)

Contains the Result of the Last User ADC Conversion. See Table 23 for the Definition of the Available

Signal Sources.

Table 25. Register: T_INT_ADC—Internal Temperature ADC (I²C Command Code 0x05)

REGISTER

.BITFIELD

RESET VALUE

(BIN)

BIT

FUNCTION AND VALUES

.Reserved

.T_int_adc

15:10

9

8

7

6

5

4

3

2

1

0

ADC Reading of the Internal (Die) Temperature (10-Bit Unsigned Integer)

This Bit Field Contains the Result of the Last Conversion of the LTC5100’s Internal Die Temperature.

The Scaling is 512°K or 239°C Full Scale, Corresponding to 0.5°C/LSB.

T = T_int_adc • 0.5°C – 273°C, Where T is the Internal Temperature in Degrees Celsius.

sn5100 5100fs

44

LTC5100

U U

REGISTER DEFI ITIO S

Table 26. Register: IM_ADC—Modulation Current ADC (I²C Command Code 0x06)

REGISTER

.BITFIELD

RESET VALUE

(BIN)

BIT

FUNCTION AND VALUES

.Reserved

.Im_adc

15:10

9

8

7

6

5

4

3

2

1

0

ADC Reading of the Modulation Current (10-Bit Unsigned Integer)

Im_adc Contains the Last ADC Conversion of the Average Modulation Current Delivered at the MODA

and MODB Pins. (The MODA and MODB Pins are Tied Together On-Chip.) The Peak-to-Peak Current

s Twice the Average Current for a Data Stream with 50% Duty Cycle. The Modulation Current

Reaching the Laser Depends on its Resistance Relative to the Termination Resistor.

The Average Physical Current at the MODA and MODB Pins is Given By:

ADC_code

1024

I_M

=

•(Im_rng + 1)•9mA (typical)

Table 27. Register: IS_ADC (IMD_ADC)—Source Current/Monitor Diode Current ADC (I²C Command Code 0x07)

REGISTER

.BITFIELD

RESET VALUE

(BIN)

BIT

FUNCTION AND VALUES

.Reserved

15:10

.Is_adc

(.Imd_adc in

APC Mode)

9

8

7

6

5

4

3

2

1

0

ADC Reading of the SRC Pin Current or Monitor Diode Current

This Bit Field Has Different Functions Depending on Apc_en.

Constant Current Control (CCC) Mode (Apc_en = 0): Is_adc Contains the Last ADC Conversion of

the SRC Pin Current. The Physical SRC Pin Current is Given By:

ADC_code

1024

I_S=

•(Is _rng + 1)•9mA (typical)

Automatic Power Control (APC) Mode (Apc_en = 1): Imd_adc Contains the Last ADC Conversion of

the Monitor Diode Current. The Physical Monitor Diode Current is Given By:

ADC _code

I_MD= 4.25µA •4^Imd_rng•exp In(8)•

1024

Table 28. Register: IS_DAC—Souce Current DAC (I²C Command Code 0x01)

REGISTER

.BITFIELD

RESET VALUE

(BIN)

BIT

FUNCTION AND VALUES

.Reserved

.Is_dac

15:10

9

8

7

6

5

4

3

2

1

0

DAC Setting for the Source Current (the SRC Pin Current)

Read Access to This DAC is Always Available. Write Access is Only Valid if LPC_en = 0.

Is_dac

1024

I_S=

•(Is _rng + 1)•9mA (typical)

sn5100 5100fs

45

LTC5100

U U

REGISTER DEFI ITIO S

Table 29. Register: IM_DAC—Modulation Current DAC (I²C Command Code 0x02)

REGISTER

.BITFIELD

RESET VALUE

(BIN)

BIT

FUNCTION AND VALUES

.Reserved

.Im_dac

15:10

9

8

7

6

5

4

3

2

1

0

DAC Setting for the Peak-to-Peak Modulation Current (the Combined MODA and MODB Pin Currents)

Read Access to This DAC is Always Available. Write Access is Only Valid if LPC_en = 0.

Im_dac

I_M

=

•(Im_rng + 1)•9mA (typical)

1024

Table 30. Register: PWR_LIMIT_DAC—Optical Power Limit DAC—Read Only (I²C Command Code 0x03)

REGISTER

.BITFIELD

RESET VALUE

(BIN)

BIT

15:7

6

FUNCTION AND VALUES

.Reserved

.pwr_limit_dac

Read Only

0

DAC Setting for the Over and Underpower Fault Detection Comparator (Read Only)

This Bit Field Has Different Functions Depending on Apc_en.

5

4

Constant Current Control (CCC) Mode (Apc_en = 0): Pwr_limit_dac Has No Function in This Mode.

Its Contents are Undefined.

3

2

Automatic Power Control (APC) Mode (Apc_en = 1): Pwr_limit_dac Tracks the Value of the Monitor

Diode Current. The Laser Power Controller Continuously Updates the PWR_LIMIT_DAC with the

Most Recent ADC Reading of Imd. Reading the DAC Will Return the Value of Imd_adc Shifted Right

by Three Bits.

1

0

sn5100 5100fs

46

LTC5100

W U U

APPLICATIO S I FOR ATIO

U

HIGH SPEED DESIGN AND LAYOUT

and 12) have webs of copper connecting them to the cen-

tral pad to reduce ground inductance. The laser modula-

tion current returns to the ground plane primarily through

the exposed pad. Any measures that reduce the induc-

tancefromthepadtothegroundplaneimprovethemodu-

lation waveforms and reduce RFI.

Figure 29 and Figure 30 show the schematic and layout of

a minimum component count circuit for standalone op-

eration. The exposed pad of the package is soldered to a

copper pad on top of the board, and nine vias couple this

pad to the ground plane. The four V_SSpins (Pins 1, 4, 9,

ENABLE

L1

V

+ 3.3V

DD

16

15

EN

14

SRC

13

MD

FERRITE

BEAD

V

DD

V

SS

1

2

3

4

12

11

10

9

C1

V

SS

+

R1

10nF

50Ω

Z

O

= 50Ω

+TX_DATA

–TX_DATA

IN

MODA

MODB

LTC5100

Z

O

= 50Ω

–

IN

V

SS

FAULT SDA SCL

V

DD(HS)

FIBER

5

6

7

8

FAULT

C3

10nF

NC

SDA

5100 F29

V

SS

V

CC

SCL

24LC00

EEPROM

PROGRAMMING

PADS

SOT23 PACKAGE

Figure 29. Schematic of a Minimum Component Count Circuit

C1

16

15

14

13

12

SCL

V

CC

V

1

SS

R1

+

–

2

11

IN

MODA

V

SS

MODB

3

4

10

9

L1

C3

V

SS

5

6

7

8

NC

SDA

EEPROM

5100 F30

Figure 30. Layout of the Minimum Component Count Circuit Using 0402 Passive Components

sn5100 5100fs

47

LTC5100

W U U

U

APPLICATIO S I FOR ATIO

Theterminationresistor, R1, anditsdecouplingcapacitor,

C1, are placed as close as possible to the LTC5100 to

reduce inductance. Inductance in these two components

causes high frequency peaking and overshoot in the

currentdeliveredtothelaser. R1andC1arefoldedagainst

each other so that their mutual inductance and counter-

flowing current partially cancel their self-inductance. C1

has two vias to the ground plane and a trace directly to Pin

12. The layout shows the EEPROM placed next to the

LTC5100. However, placement of the EEPROM is not

critical. It can be placed several centimeters from the

LTC5100 or on the back of the PC board if desired.

The transmission line connecting the MODB pin to the

laser has a short length of minimum width trace. The net

inductance of this section of trace helps compensate on-

chip capacitance to further reduce reflections from the

chip.

ENABLE

L1

C2

V

DD

+ 3.3V

10nF

16

15

EN

14

SRC

13

MD

FERRITE

BEAD

V

DD

V

SS

1

2

3

4

12

11

10

9

C1

10nF

V

SS

+

R1

50Ω

Z

O

= 50Ω

+TX_DATA

–TX_DATA

IN

MODA

MODB

LTC5100

Z

= 50Ω

O

–

IN

V

SS

FAULT SDA SCL

V

DD(HS)

FIBER

5

6

7

8

FAULT

C3

10nF

NC

SDA

5100 F29

V

SS

V

CC

SCL

24LC00

EEPROM

PROGRAMMING

PADS

SOT23 PACKAGE

Figure 31. Schematic of a Minimum Output Reflection Coefficient Circuit

C1

16

15

14

13

12

SCL

V

CC

V

SS

V

SS

1

R1

C2

+

–

2

11

IN

MODA

V

SS

MODB

3

4

10

9

L1

C3

V

SS

V

SS

5

6

7

8

NC

SDA

EEPROM

5100 F32

Figure 32. Layout of the Minimum Reflection Coeffieicnt Circuit Using 0402 Passive Components

sn5100 5100fs

48

LTC5100

W U U

APPLICATIO S I FOR ATIO

U

Figure 31 and Figure 32 show the schematic and layout of

a minimum reflection coefficient, minimum peaking solu-

tion. Two capacitors, C1 and C2 are used to further reduce

theinductanceintheterminationnetwork. C2hastwovias

to the ground plane.

The above procedure not only corrects for the laser

temperature drift, but also corrects the small temperature

drift found in the LTC5100’s internal references.

DEMONSTRATION BOARD

Figure 33 shows the schematic of the DC499 demonstra-

tion board. Details of the use of this demo board and

accompanying software can be found in the DC499 demo

board manual. Figure 34 shows the layout of the demo

board and Table 31 gives the bill of materials for the demo

board.

TEMPERATURE COMPENSATION

The LTC5100 has first and second order digital tempera-

ture compensation for the laser bias current, laser modu-

lation current, and monitor diode current. Recall that in

constant current control mode, the LTC5100 provides

direct temperature compensation of the laser bias current

and the laser modulation current. In automatic power

control mode, the laser bias current is under closed-loop

control and the LTC5100 provides temperature compen-

sation for the monitor diode current and the laser modu-

lationcurrent. Thesimplestprocedurefordeterminingthe

temperature coefficients (TC1 and TC2 in Equation 12,

Equation 18, Equation 23, and Equation 29) is as follows:

The core applications circuit for the LTC5100 VCSEL

driver appears inside the box in Figure 33. This is the

complete circuit for an optical transceiver module, includ-

ing power supply filtering. It consists of the LTC5100 with

EEPROM for storing setup parameters, L1 and C3 for

power supply filtering, and R1, C1, and C2 for terminating

the 50Ω modulation output. The circuitry outside the box

in Figure 33 is for support of the demonstration. 5V power

enters through 2-pin connector P2 and is regulated by U3

to 3.3V to power the LTC5100. Connector P1 sends 5V

power and serial control signals to another board, allow-

ing a personal computer to control the LTC5100. U4

produces 1.8VDC to bias the modulation output for elec-

trical eye measurements.

• Select a nominal or representative laser diode and

assembleitintoatransceivermodulewiththeLTC5100.

• Set all temperature coefficients to zero.

• Place the transceiver module in a temperature chamber

and find the values of Ib_nom, Im_nom, and Imd_nom

that give constant average optical power and extinction

ratio at several temperature points.

High speed data enters the LTC5100 through SMA con-

nectors J1 and J2. The LTC5100 high speed inputs are

internallyACcoupledwithrail-to-railcommonmodeinput

voltage range. The input signal swing can go as much as

300mVaboveV_DDorbelowV_SSwithoutdegradingperfor-

mance or causing excessive current flow. The high speed

inputs may be AC coupled, in which case the common

mode voltage floats to mid-supply or 1.65V nominally.

• Record the LTC5100’s temperature reading, T_int, at

each temperature point.

• Select a convenient value for T_nom, the nominal tem-

perature. (It is customary, but not mandatory, to use

25°C for the nominal temperature.)

• Find the best values of TC1 and TC2 by fitting the

quadratic temperature compensation formula (Equa-

tion 12) to the experimental values of Ib_nom, Im_nom,

Imd_nom, and T_int.

A common cathode VCSEL can be attached to the demo

board via SMA connector J3. R1 establishes a precision,

low reflection coefficient 50Ω modulation drive. By main-

taining a wide band microwave quality 50Ω path, the

lengthoftheconnectiontothelasercanbearbitrarilylong.

The LTC5100 generates 20% to 80% transition times of

60ps (80ps 10% to 90%), corresponding to an instanta-

neous transition filtered by a 4.4GHz Gaussian lowpass

filter. At these speeds the primary limitation on line length

is high frequency loss. For high grade, low loss laboratory

cabling with silver coated center conductor and foamed

To configure the LTC5100 for normal operation, set the

nominal current to the value found at the nominal tem-

perature. Set TC1 and TC2 to the values determined by the

best fit of the data. For standalone operation, store these

values in the EEPROM. For microprocessor operation,

store the values in the microprocessor’s internal non-

volatilememoryorinanothersourceofnonvolatilememory

and load them into the LTC5100 after power-up.

PTFE dielectric, a practical limit is about 30cm.

sn5100 5100fs

49

LTC5100

W U U

U

APPLICATIO S I FOR ATIO

The laser’s monitor diode (if needed) can be attached to

either pin of 2-pin header H2 (labeled MD) or to the test

turret labeled MD. H2 is a 2mm, 2-pin header with 0.5mm

square pins.

careful with this mode of operation! It is possible to

leavetheEEPROMinastatethatautomaticallyturnsthe

laser on at power up.

The LTC5100’s FAULT output is available at the test turret

labeled “FAULT.” The FAULT pin can be software config-

ured with several output pull-up options, including open

drain.

The demo board includes an EEPROM that provides non-

volatile storage for the LTC5100’s configuration settings

and parameters. For example, the EEPROM stores param-

eters for the laser bias and modulation levels as well as

temperature coefficients and fault detection modes. The

LTC5100 transfers the data in the EEPROM to its internal

registers at power up. The LTC5100 is designed for hot

plugging and can be configured to load the EEPROM and

enable the transmitter as soon as power is applied. Be

The demo board has three jumpers for enabling the

transmitter, observing the electrical eye diagram, and

measuringtheLTC5100’spowersupplycurrent.Detailsof

the use of these jumpers are given in the DC499 demo

manual.

5V

P2

5V

GND

U3

V

DD2

DD1

R2

U4

LT1762EMS8-3.3

I

DD

3.3V

NC

22.1k

V

LT1812

5

3

4

8

7

6

5

1

2

3

4

1

2

CC

R4

10Ω

+

–

IN

NC SENSE

NC BYP

OUT

+

–

5V ±5%

V

JP3

+

1

150mA MAX

R3

26.7k

C4

C5

10µF

V

OUT

D3

EN

10µF

C7

0.1µF

SHDN GND

1.8V

2

R5

22.1k

3A SCHOTTKY

+

C6

10µF

D2

SRC

MD

REMOVE JUMPER

BEFORE ATTACHING

A LASER DIODE!

3A SCHOTTKY

ENABLE

TRANS

H2

MD

1

ELEC

EYE

1

2

1

2

JP2

1

JP1

C2

C1

10nF

V

DD

10nF

(OPTIONAL)

TERMINATION

RESISTOR

16 15 14 13

J1

SMA

R1

49.9Ω

1

2

3

4

12

50Ω

+

–

V

SS

IN

SS

+

11

10

9

IN

MODA

MODB

U1

LTC5100

J3

SMA

–

IN

SDA

GND

SCL FAULT

50Ω

V

SS

J2

SMA

P1

5

6

7

8

5V

C3

10nF

SDA

SCL

GND1

GND2

H3

SDA GND SCL

L1

GND

BLM15AG121PN1D

U2

24LC00 EEPROM

5-LEAD SOT23 PACKAGE

128 BITS

LTC5100 CORE

APPLICATIONS CIRCUIT

5100 F33

Figure 33. Schematic Diagram of the DC499 Demo Board

sn5100 5100fs

50

LTC5100

W U U

APPLICATIO S I FOR ATIO

U

Figure 34 Layout of the DC499 Demo Board (Silkscreen and Top Layer Copper)

Table 31. Bill of Materials for the DC499 Demo Board

REFERENCE QUANTITY PART NUMBER

DESCRIPTION

VENDOR

TELEPHONE

5V, V , V , SDA,

12

2501-2

1-Pin Terminal Turret Test Point

Mill-Max

(516) 922-6000

DD1 DD2

SCL, FAULT, EN,

SRC, MD, GND(3)

C1, C2, C3

3

1

2

0

4

1

3

1

2

1

GRP155R71E103JA01

12066D106MAT

0603YC104KAT

B320A

0.01µF 25V 5% X7R 0402 Capacitor

10µF 6.3V 20% X5R 1206 Capacitor

0.1µF 16V 10% X7R 0603 Capacitor

3A Schottky Rectifier Diode

N/A (No Load)

Murata

AVX

(770) 436-1300

(843) 946-0362

(805) 446-4800

C4, C5, C6

C7

AVX

D2,D3

Diodes, Inc.

N/A

D4

Option (No Load)

2802S-02G2

H2, JP1, JP2, JP3

2mm 2-Pin Header

Comm Con

(626) 301-4200

H3

2802S-03G2

2mm 3-Pin Header

J1, J2, J3

L1

142-0701-851

BLM15AG121PN1D

70553-0004

50Ω SMA Edge-Lanch Connector

0402 Ferrite Bead

Johnson Components (800) 247-8256

Murata

Molex

AAC

(770) 436-1300

(630) 969-4550

(800) 508-1521

(408) 432-1900

P1

5-Pin Right Angle Header

P2

70553-0001

2-Pin Right Angle Header

R1

CR05-49R9FM

CR16-2212FM

CR16-2672FM

CR16-10R0FM

LTC5100

49.9Ω 1% 1/16W 0402 Resistor

22.1k 1% 1/16W 0603 Resistor

26.7k 1% 1/16W 0603 Resistor

10Ω 1% 1/16W 0603 Resistor

QFN 4mm × 4mm IC

R2, R5

R3

AAC

R4

AAC

U1

LTC

U2

24LC00

128-Bit IC Bus Serial EEPROM 5-Pin SOT-23

Low Noise LDO Micropower Regulator IC

Op Amp with Shutdown IC

2-Pin 2mm Shunt

Microchip

LTC

U3

LT1762EMS8-3.3

LT1812CS5

(408) 432-1900

(626) 301-4200

U4

LTC

H3

CCIJ2mm-138G

Comm Con

sn5100 5100fs

Information furnished by Linear Technology Corporation is believed to be accurate and reliable.

However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-

tationthattheinterconnectionofitscircuitsasdescribedhereinwillnotinfringeonexistingpatentrights.

51

LTC5100

U

PACKAGE DESCRIPTIO

UF Package

16-Lead Plastic QFN (4mm × 4mm)

(Reference LTC DWG # 05-08-1692)

BOTTOM VIEW—EXPOSED PAD

0.75 ± 0.05

R = 0.115

TYP

0.55 ± 0.20

4.00 ± 0.10

(4 SIDES)

15

16

0.72 ±0.05

PIN 1

TOP MARK

1

2

4.35 ± 0.05

2.90 ± 0.05

2.15 ± 0.05

(4 SIDES)

2.15 ± 0.10

(4-SIDES)

PACKAGE

OUTLINE

(UF) QFN 0802

0.30 ± 0.05

0.65 BSC

0.200 REF

0.30 ±0.05

0.65 BCS

0.00 – 0.05

NOTE:

RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS

1. DRAWING CONFORMS TO JEDEC PACKAGE OUTLINE MO-220 VARIATION (WGGC)

2. ALL DIMENSIONS ARE IN MILLIMETERS

3. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE

MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE

4. EXPOSED PAD SHALL BE SOLDER PLATED

RELATED PARTS

PART NUMBER

DESCRIPTION

COMMENTS

LTC1773

Current Mode Synchronous Buck Regulator

Design Note 295 “High Efficiency Adaptable Power Supply for

XENPAK 10Gbps Ethernet Transceivers”

LTC1923

LT^®1930A

High Efficiency Thermoelectric Cooler Controller

2.2MHz Step-Up DC/DC Converter in 5-Lead SOT-23

Design Note 273 “Fiber Optic Communication Systems Benefit

from Tiny, Low Noise Avalanche Photodiode Bias Supply”

sn5100 5100fs

LT/TP 0903 1K • PRINTED IN USA

52 ^{LinearTechnology Corporation}

1630 McCarthy Blvd., Milpitas, CA 95035-7417

●

(408) 432-1900 FAX: (408) 434-0507 www.linear.com

LINEAR TECHNOLOGY CORPORATION 2003


型号：	LTC5100
厂家：	Linear
描述：	3.3V, 3.2Gbps VCSEL Driver 3.3V ， 3.2Gbps的VCSEL驱动器驱动器
文件：	总52页 (文件大小：572K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

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