LTM4601AHVMPV-PBF [Linear]
12A, 28VIN DC/DC μModule with PLL, Output Tracking and Margining; 12A ， 28VIN DC / DC微型模块与PLL ，输出跟踪和裕
| 型号： | LTM4601AHVMPV-PBF |
| 厂家： | 
Linear |
| 描述： | 12A, 28VIN DC/DC μModule with PLL, Output Tracking and Margining |
| 文件： | 总28页 (文件大小：357K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LTM4601AHV
12A, 28V DC/DC µModule
IN
with PLL, Output Tracking
and Margining
DESCRIPTION
FEATURES
The LTM®4601AHV is a complete 12A step-down switch
mode DC/DC power supply with onboard switching
controller, MOSFETs, inductor and all support compo-
nents. The μModule is housed in a small surface mount
15mm×15mm×2.8mmLGApackage. TheLTM4601AHV
LGA package is designed with redundant mounting pads
to enhance solder-joint strength for extended temperature
cycling endurance. Operating over an input voltage range
of 4.5 to 28V, the LTM4601AHV supports an output volt-
age range of 0.6V to 5V as well as output voltage tracking
and margining. The high efficiency design delivers 12A
continuouscurrent(14Apeak). Onlybulkinputandoutput
capacitors are needed to complete the design.
n
Complete Switch Mode Power Supply
n
Wide Input Voltage Range: 4.5V to 28V
n
12A DC Typical, 14A Peak Output Current
n
0.6V to 5V Output Voltage
n
Output Voltage Tracking and Margining
n
Redundant Mounting Pads for Enhanced Solder-
Joint Strength
Parallel Multiple μModulesTM for Current Sharing
n
n
Differential Remote Sensing for Precision Regulation
n
PLL Frequency Synchronization
1.5% Total DC Error
n
n
Current Foldback Protection (Disabled at Start-Up)
n
Pb-Free (e4) RoHS Compliant Package with Gold
Finish Pads
The low profile (2.8mm) and light weight (1.7g) pack-
age easily mounts in unused space on the back side of
PC boards for high density point of load regulation. The
μModule can be synchronized with an external clock for
reducing undesirable frequency harmonics and allows
PolyPhase® operation for high load currents.
n
–55°C to 125°C Operating Temperature Range
(LTM4601AHVMPV)
n
Ultrafast™ Transient Response
n
Up to 95% Efficiency at 5V , 3.3V
IN
OUT
n
n
n
Programmable Soft-Start
Output Overvoltage Protection
An onboard differential remote sense amplifier can be
used to accurately regulate an output voltage independent
of load current.
Enhanced (15mm × 15mm × 2.8mm) Surface Mount
LGA Package
L, LT, LTC and LTM are registered trademarks of Linear Technology Corporation. PolyPhase is
a registered trademark of Linear Technology Corporation. μModule and Ultrafast are trademarks
of Linear Technology Corporation. All other trademarks are the property of their respective
owners. Protected by U.S. Patents including 5481178, 5847554, 6580258, 6304066, 6476589,
6774611, 6677210.
APPLICATIONS
n
Telecom, Industrial and Networking Equipment
n
Military and Avionics Systems
TYPICAL APPLICATION
Efficiency and Power Loss
vs Load Current
2.5V/12A Power Supply with 4.5V to 28V Input
95
90
85
80
75
70
65
60
55
50
45
6
5
4
3
2
1
0
12V
IN
CLOCK SYNC
TRACK/SS CONTROL
EFFICIENCY
V
IN
4.5V TO 28V
V
PLLIN TRACK/SS
V
24V
IN
V
2.5V
12A
IN
OUT
PGOOD
OUT
100pF
POWER LOSS
V
FB
ON/OFF
RUN
COMP
INTV
CC
MARG0
MARG1
V
OUT_LCL
MARGIN
CONTROL
24V
IN
C
LTM4601AHV
OUT
C
IN
12V
IN
DRV
CC
DIFFV
OUT
+
MPGM
SGND PGND
V
V
OSNS
–
OSNS
R1
392k
f
SET
R
SET
19.1k
0
4
6
8
10
12
14
2
5% MARGIN
4601AHV TA01a
LOAD CURRENT (A)
4601AHV TA01b
4601ahvf
1
LTM4601AHV
ABSOLUTE MAXIMUM RATINGS
PIN CONFIGURATION
(Note 1)
TOP VIEW
INTV , DRV , V
, V
(V
≤ 3.3V with
CC
CC OUT_LCL OUT OUT
Remote Sense Amp).................................... –0.3V to 6V
PLLIN, TRACK/SS, MPGM, MARG0, MARG1,
PGOOD, f .............................. –0.3V to INTV + 0.3V
V
f
SET
MARG0
SET
CC
IN
MTP1
RUN ............................................................. –0.3V to 5V
MARG1
DRV
INTV
CC
V , COMP................................................ –0.3V to 2.7V
MTP2
MTP3
FB
CC
V ............................................................. –0.3V to 28V
V
FB
IN
OSNS
PGND
+
–
PGOOD
V
, V
.......................... –0.3V to INTV + 0.3V
OSNS CC
SGND
+
Operating Temperature Range (Note 2)
V
OSNS
DIFFV
OUT
E and I Grades ..................................... –40°C to 85°C
MP Grade........................................... –55°C to 125°C
Junction Temperature ........................................... 125°C
Storage Temperature Range................... –55°C to 125°C
V
OUT
V
V
OUT_LCL
–
OSNS
LGA PACKAGE
133-LEAD (15mm s 15mm s 2.8mm)
= 125°C, θ = 15°C/W, θ = 6°C/W,
T
JMAX
JA
JC
θ
DERIVED FROM 95mm × 76mm PCB WITH 4 LAYERS
JA
WEIGHT = 1.7g
ORDER INFORMATION
LEAD FREE FINISH
PART MARKING*
LTM4601AHVV
LTM4601AHVV
LTM4601AHVMPV
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LTM4601AHVEV#PBF
LTM4601AHVIV#PBF
LTM4601AHVMPV#PBF
–40°C to 85°C
–40°C to 85°C
–55°C to 125°C
133-Lead (15mm × 15mm × 2.8mm) LGA
133-Lead (15mm × 15mm × 2.8mm) LGA
133-Lead (15mm × 15mm × 2.8mm) LGA
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
This product is only offered in trays. For more information go to: http://www.linear.com/packaging/
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C, VIN = 12V. Per typical application (front page) configuration, RSET = 40.2k.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
l
l
V
V
Input DC Voltage
4.5
28
V
IN(DC)
Output Voltage Total Variation with
Line and Load
C
= 10μF ×3, C
IN
= 200μF, R = 40.2k
OUT SET
OUT(DC)
IN
1.478
1.5
3.2
1.522
4
V
V
V
= 5V to 28V, I
= 0A to 12A (Note 5)
OUT
Input Specifications
V
Undervoltage Lockout Threshold
Input Inrush Current at Startup
I
I
= 0A
IN(UVLO)
OUT
I
= 0A. V
= 1.5V
INRUSH(VIN)
OUT
OUT
V
= 5V
0.6
0.7
A
A
IN
IN
V
= 12V
I
Input Supply Bias Current
V
V
V
V
= 12V, V
= 12V, V
= 1.5V, No Switching
3.8
38
mA
mA
mA
mA
μA
Q(VIN,NO LOAD)
IN
IN
IN
IN
OUT
OUT
= 1.5V, Switching Continuous
= 5V, V
= 5V, V
= 1.5V, No Switching
= 1.5V, Switching Continuous
2.5
42
OUT
OUT
Shutdown, RUN = 0, V = 12V
22
IN
4601ahvf
2
LTM4601AHV
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C, VIN = 12V. Per typical application (front page) configuration, RSET = 40.2k.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
I
Input Supply Current
V
IN
V
IN
V
IN
= 12V, V
= 12V, V
= 1.5V, I
= 3.3V, I
= 12A
= 12A
1.81
3.63
4.29
A
A
A
S(VIN)
OUT
OUT
OUT
OUT
= 5V, V
= 1.5V, I
= 12A
OUT
OUT
INTV
V
= 12V, RUN > 2V
IN
No Load
4.7
0
5
5.3
V
CC
Output Specifications
I
Output Continuous Current Range
Line Regulation Accuracy
V
V
= 12V, V = 1.5V (Note 5)
OUT
12
A
OUTDC
IN
l
l
= 1.5V, I
= 0A, V = 4.5V – 28V
0.3
%
ΔV
ΔV
V
OUT
OUT
IN
OUT(LINE)
OUT
V
Load Regulation Accuracy
Output Ripple Voltage
V
OUT
= 1.5V, I
= 0A to 12A, V = 12V, with
0.25
%
OUT
IN
OUT(LOAD)
V
Remote Sense Amplifier, (Note 5)
OUT
I
= 0A, C
= 2×, 100μF/X5R/Ceramic
OUT
OUT(AC)
OUT
20
18
mV
mV
V
= 12V, V
= 5V, V
= 1.5V
P-P
P-P
IN
IN
OUT
OUT
V
= 1.5V
f
Output Ripple Voltage Frequency
I
= 5A, V = 12V, V = 1.5V
OUT
850
kHz
S
OUT
IN
Turn-On Overshoot,
TRACK/SS = 10nF
C
= 200μF, V
IN
IN
= 1.5V, I
= 0A
OUT
ΔV
OUT(START)
OUT
OUT
V
= 12V
= 5V
20
20
mV
mV
V
t
Turn-On Time, TRACK/SS = Open
C
OUT
= 200μF, V
OUT
= 1.5V,
START
OUT
I
= 1A Resistive Load
V
= 12V
= 5V
0.5
0.7
ms
ms
IN
IN
V
Peak Deviation for Dynamic Load
Load: 0% to 50% to 0% of Full Load,
= 2 × 22μF/Ceramic, 470μF, 4V Sanyo
ΔV
OUTLS
C
OUT
POSCAP
V
IN
V
IN
= 12V
= 5V
35
35
mV
mV
t
I
Settling Time for Dynamic Load Step Load: 0% to 50%, or 50% to 0% of Full Load
SETTLE
V
= 12V
25
μs
IN
Output Current Limit
C
= 200μF, Table 2
OUTPK
OUT
V
= 12V, V
= 1.5V
OUT
17
17
A
A
IN
IN
V
= 5V, V
= 1.5V
OUT
Remote Sense Amp (Note 3)
+
–
V
, V
Common Mode Input Voltage Range
V
V
= 12V, RUN > 2V
0
0
INTV – 1
V
V
OSNS
OSNS
IN
CC
CM Range
DIFFV Range
Output Voltage Range
= 12V, DIFF OUT Load = 100k
INTV
CC
OUT
IN
V
OS
Input Offset Voltage Magnitude
1.25
2
mV
mV
l
A
Differential Gain
1
3
V/V
MHz
V/μs
kΩ
V
GBP
Gain Bandwidth Product
Slew Rate
SR
2
+
R
Input Resistance
V
OSNS
to GND
20
100
IN
CMRR
Common Mode Rejection Mode
dB
4601ahvf
3
LTM4601AHV
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C, VIN = 12V. Per typical application (front page) configuration, RSET = 40.2k.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Control Stage
l
V
Error Amplifier Input Voltage
Accuracy
I
= 0A, V = 1.5V
OUT
0.594
0.6
0.606
V
FB
OUT
V
RUN Pin On/Off Threshold
Soft-Start Charging Current
Minimum On Time
1
1.5
–1.5
50
1.9
–2.0
100
400
V
μA
ns
RUN
I
t
t
V
= 0V
–1.0
SS/TRACK
ON(MIN)
OFF(MIN)
SS/TRACK
(Note 4)
(Note 4)
Minimum Off Time
250
50
ns
R
PLLIN Input Resistance
kΩ
mA
PLLIN
I
Current into DRV Pin
V
= 1.5V, I = 1A, Frequency = 850kHz,
OUT
18
25
DRVCC
CC
OUT
DRV = 5V
CC
R
Resistor Between V
and V
FB
60.098
60.4
1.18
1.4
60.702
kΩ
V
FBHI
OUT
V
V
Margin Reference Voltage
MPGM
, V
MARG0, MARG1 Voltage Thresholds
V
MARG0 MARG1
PGOOD Output
PGOOD Upper Threshold
PGOOD Lower Threshold
PGOOD Hysteresis
V
V
V
Rising
Falling
7
10
–10
1.5
13
%
%
%
V
ΔV
FB
FBH
–7
–13
ΔV
FBL
FB
Returning
ΔV
FB(HYS)
FB
V
PGL
PGOOD Low Voltage
I
= 5mA
0.15
0.4
PGOOD
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
guaranteed and tested over the –40°C to 85°C temperature range. The
LTM4601AHVMP is guaranteed and tested over the –55°C to 125°C
temperature range. For output current derating at high temperature, please
refer to Thermal Considerations and Output Current Derating discussion.
Note 2: The LTM4601AHVE is guaranteed to meet performance
specifications from 0°C to 85°C. Specifications over the –40°C to 85°C
operating temperature range are assured by design, characterization
and correlation with statistical process controls. The LTM4601AHVI is
Note 3: Remote sense amplifier recommended for ≤3.3V output.
Note 4: 100% tested at wafer level only.
Note 5: See output current derating curves for different V , V
and T .
IN OUT
A
4601ahvf
4
LTM4601AHV
TYPICAL PERFORMANCE CHARACTERISTICS
(See Figures 19 and 20 for all curves)
Efficiency vs Load Current
with 24VIN
Efficiency vs Load Current
with 5VIN
Efficiency vs Load Current
with 12V
100
95
90
85
80
75
70
65
60
55
50
100
95
95
90
85
80
75
90
85
80
75
70
65
0.6V
1.2V
1.5V
2.5V
3.3V
OUT
OUT
OUT
OUT
OUT
0.6V
OUT
60
55
50
45
70
65
60
1.2V
1.5V
2.5V
3.3V
OUT
OUT
OUT
OUT
1.5V
2.5V
3.3V
5.0V
OUT
OUT
OUT
OUT
5V
OUT
5
10
15
0
0
5
10
LOAD CURRENT (A)
15
0
10
15
5
LOAD CURRENT (A)
LOAD CURRENT (A)
4601AHV G02
4601AHV G03
4601AHV G01
1.2V Transient Response
1.5V Transient Response
1.8V Transient Response
V
V
V
OUT
OUT
OUT
50mV/DIV
50mV/DIV
50mV/DIV
I
OUT
I
I
OUT
OUT
5A/DIV
5A/DIV
5A/DIV
4601AHV G05
4601AHV G04
4601AHV G06
20μs/DIV
20μs/DIV
20μs/DIV
1.5V AT 6A/μs LOAD STEP
1.2V AT 6A/μs LOAD STEP
1.8V AT 6A/μs LOAD STEP
C
OUT
= 3x 22μF 6.3V CERAMICS
C
OUT
= 3x 22μF 6.3V CERAMICS
C
OUT
= 3x 22μF 6.3V CERAMICS
470μF 4V SANYO POSCAP
C3 = 100pF
470μF 4V SANYO POSCAP
C3 = 100pF
470μF 4V SANYO POSCAP
C3 = 100pF
2.5V Transient Response
3.3V Transient Response
Vvs Temperature
0.606
0.604
0.602
0.600
0.598
0.596
0.594
V
OUT
V
OUT
50mV/DIV
50mV/DIV
I
I
OUT
OUT
5A/DIV
5A/DIV
4601AHV G08
4601AHV G07
20μs/DIV
20μs/DIV
3.3V AT 6A/μs LOAD STEP
2.5V AT 6A/μs LOAD STEP
C
OUT
= 3x 22μF 6.3V CERAMICS
C
OUT
= 3x 22μF 6.3V CERAMICS
470μF 4V SANYO POSCAP
C3 = 100pF
470μF 4V SANYO POSCAP
C3 = 100pF
–55
35
65
95
125
–25
5
TEMPERATURE (°C)
4601AHV G15
4601ahvf
5
LTM4601AHV
TYPICAL PERFORMANCE CHARACTERISTICS (See Figures 19 and 20 for all curves)
Start-Up, IOUT = 12A
(Resistive Load)
Start-Up, TA = –55°C
Start-Up, IOUT = 0A
V
V
OUT
OUT
0.5V/DIV
0.5V/DIV
NO LOAD
10A LOAD
I
IN
I
IN
1A/DIV
0.5A/DIV
4601AHV G16
4601AHV G09
4601AHV G10
10ms/DIV
5ms/DIV
2ms/DIV
V
V
C
= 12V
OUT
OUT
V
V
C
= 12V
OUT
OUT
V
V
C
= 12V
OUT
OUT
IN
IN
IN
= 1.5V
= 1.5V
= 1.5V
= 470μF, 3x 22μF
SOFT-START = 10nF
= 470μF, 3x 22μF
= 470μF, 3x 22MF
SOFT-START = 10nF
SOFT-START = 10nF
VIN to VOUT Step-Down Ratio
Track, IOUT = 12A
5.5
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
3.3V OUTPUT WITH
130k FROM V
TRACK/SS
0.5V/DIV
OUT
TO f
SET
V
5V OUTPUT WITH
100k RESISTOR
FB
0.5V/DIV
ADDED FROM f
TO GND
SET
V
OUT
1V/DIV
5V OUTPUT WITH
NO RESISTOR ADDED
FROM f
TO GND
4601AHV G12
SET
2ms/DIV
2.5V OUTPUT
1.8V OUTPUT
1.5V OUTPUT
1.2V OUTPUT
V
V
C
= 12V
IN
OUT
OUT
= 1.5V
= 470μF, 3x 22μF
SOFT-START = 10nF
0
2
4
6
8 10 12 14 16 18 20 22 24 26 28
INPUT VOLTAGE (V)
4601AHV G11
Short-Circuit Protection, IOUT = 0A
Short-Circuit Protection, IOUT = 12A
V
V
OUT
OUT
0.5V/DIV
0.5V/DIV
I
I
IN
IN
1A/DIV
1A/DIV
4601AHV G13
4601AHV G14
50μs/DIV
50μs/DIV
V
V
C
= 12V
OUT
OUT
V
V
C
= 12V
IN
IN
= 1.5V
= 1.5V
OUT
OUT
= 470μF, 3x 22μF
SOFT-START = 10nF
= 470μF
3x 22μF
SOFT-START = 10nF
4601ahvf
6
LTM4601AHV
PIN FUNCTIONS
IN
(See Package Description for Pin Assignment)
V (Bank 1): Power Input Pins. Apply input voltage be-
PLLIN (Pin A8): External Clock Synchronization Input to
the Phase Detector. This pin is internally terminated to
SGND with a 50k resistor. Apply a clock above 2V and
tween these pins and PGND pins. Recommend placing
input decoupling capacitance directly between V pins
IN
and PGND pins.
below INTV . See Applications Information.
CC
V
(Bank 3): Power Output Pins. Apply output load
TRACK/SS(PinA9):OutputVoltageTrackingandSoft-Start
Pin.Whenthemoduleisconfiguredasamasteroutput,then
asoft-startcapacitorisplacedonthispintogroundtocontrol
the master ramp rate. A soft-start capacitor can be used for
soft-start turn on as a stand alone regulator. Slave operation
is performed by putting a resistor divider from the master
output to the ground, and connecting the center point of the
divider to this pin. See Applications Information.
OUT
between these pins and PGND pins. Recommend placing
outputdecouplingcapacitancedirectlybetweenthesepins
and PGND pins. Review the figure below.
PGND (Bank 2): Power ground pins for both input and
output returns.
–
V
(PinM12):(–)InputtotheRemoteSenseAmplifier.
OSNS
This pin connects to the ground remote sense point. The
MPGM (Pins A12, B11): Programmable Margining Input.
A resistor from this pin to ground sets a current that is
equal to 1.18V/R. This current multiplied by 10kΩ will
equal a value in millivolts that is a percentage of the 0.6V
referencevoltage.SeeApplicationsInformation.Toparallel
LTM4601AHVs,eachrequiresanindividualMPGMresistor.
Do not tie MPGM pins together. Both pins are internally
connected. Pin A12 is a test pin.
remote sense amplifier is used for V
≤3.3V.
OUT
+
V
(PinJ12):(+)InputtotheRemoteSenseAmplifier.
OSNS
This pin connects to the output remote sense point. The
remote sense amplifier is used for V ≤3.3V.
OUT
DIFFV
(Pin K12): Output of the Remote Sense Ampli-
OUT
fier. This pin connects to the V
pin.
OUT_LCL
DRV (Pin E12): This pin normally connects to INTV
CC
CC
f
(Pins B12, C11): Frequency Set Internally to 850kHz.
SET
for powering the internal MOSFET drivers. This pin can
be biased up to 6V from an external supply with about
50mA capability, or an external circuit shown in Figure 18.
This improves efficiency at the higher input voltages by
reducing power dissipation in the module.
An external resistor can be placed from this pin to ground
to increase frequency. This pin can be decoupled with a
1000pF capacitor. See Applications Information for fre-
quency adjustment. Both pins are internally connected.
Pin B12 is a test pin.
INTV (Pin A7, D9): This pin is for additional decoupling
CC
V
(Pin F12): The Negative Input of the Error Amplifier.
FB
of the 5V internal regulator. These pins are internally con-
Internally, this pin is connected to V
pin with a
OUT_LCL
nected. Pin A7 is a test pin.
60.4k precision resistor. Different output voltages can be
programmed with an additional resistor between V and
FB
TOP VIEW
SGND pins. See Applications Information.
MARG0 (Pin C12): This pin is the LSB logic input for the
margining function. Together with the MARG1 pin will
determine if margin high, margin low or no margin state
is applied. The pin has an internal pull-down resistor of
50k. See Applications Information.
A
V
B
C
D
E
f
SET
MARG0
IN
MTP1
BANK 1
MARG1
DRV
CC
V
FB
PGOOD
INTV
CC
MTP2
MTP3
F
PGND
BANK 2
G
H
J
K
L
MARG1 (Pin D12): This pin is the MSB logic input for the
margining function. Together with the MARG0 pin will
determine if margin high, margin low or no margin state
is applied. The pin has an internal pull-down resistor of
50k. See Applications Information.
SGND
+
V
OSNS
DIFFV
OUT
V
OUT
BANK 3
V
V
OUT_LCL
–
M
OSNS
1
2 3 4 5 6 7 8 9 10 11 12
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7
LTM4601AHV
PIN FUNCTIONS
(See Package Description for Pin Assignment)
SGND (Pins H12, H11, G11): Signal Ground. These pins
RUN (Pin A10): Run Control Pin. A voltage above 1.9V
will turn on the module, and when below 1V, will turn off
the module. A programmable UVLO function can be ac-
connect to PGND at output capacitor point. See Figure 17.
COMP (Pin A11): Current Control Threshold and Error
Amplifier Compensation Point. The current comparator
threshold increases with this control voltage. The voltage
ranges from 0V to 2.4V with 0.7V corresponding to zero
sense voltage (zero current).
complished with a resistor from V to this pin that has a
IN
5.1V zener to ground. Maximum pin voltage is 5V. Limit
current into the RUN pin to less than 1mA.
V
(Pin L12): V
connects directly to this pin to
OUT_LCL
OUT
bypass the remote sense amplifier, or DIFFV
connects
OUT
PGOOD (Pins G12, F11): Output Voltage Power Good
Indicator. Open-drain logic output that is pulled to ground
when the output voltage is not within 10% of the regula-
tion point, after a 25μs power bad mask timer expires.
to this pin when remote sense amplifier is used.
MTP1,MTP2,MPT3(PinsC10,D10,D11):ExtraMounting
Pads with No Internal Connection. These pads are used
for increased solder integrity strength.
SIMPLIFIED BLOCK DIAGRAM
V
OUT_LCL
V
OUT
1M
>2V = ON
<0.9V = OFF
MAX = 5V
RUN
PGOOD
COMP
V
IN
4.5V TO 28V
+
5.1V
ZENER
1.5μF
C
IN
60.4k
INTERNAL
COMP
POWER CONTROL
Q1
Q2
SGND
V
2.5V
12A
OUT
MARG1
MARG0
22μF
V
FB
50k 50k
+
f
SET
R
SET
C
OUT
19.1k
39.2k
PGND
INTV
MPGM
TRACK/SS
PLLIN
CC
10k
–
10k
V
V
OSNS
–
C
SS
+
10k
+
OSNS
50k
4.7μF
10k
INTV
DRV
CC
CC
DIFFV
OUT
4601AHV F01
Figure 1. Simplified LTM4601AHV Block Diagram
4601ahvf
8
LTM4601AHV
DECOUPLING REQUIREMENTS TA = 25°C, VIN = 12V. Use Figure 1 configuration.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
C
External Input Capacitor Requirement
20
30
μF
I
= 12A, 3× 10μF Ceramics
IN
OUT
OUT
(V = 4.5V to 28V, V
= 2.5V)
IN
OUT
C
External Output Capacitor Requirement
(V = 4.5V to 28V, V = 2.5V)
I
= 12A
100
200
μF
OUT
IN
OUT
OPERATION
Power Module Description
overvoltage condition, internal top FET Q1 is turned off
and bottom FET Q2 is turned on and held on until the
overvoltage condition clears.
The LTM4601AHV is a standalone nonisolated switching
mode DC/DC power supply. It can deliver up to 12A of
DC output current with some external input and output
capacitors. This module provides precisely regulated
output voltage programmable via one external resistor
Pulling the RUN pin below 1V forces the controller into its
shutdown state, turning off both Q1 and Q2. At low load
current, the module works in continuous current mode by
default to achieve minimum output voltage ripple.
from 0.6V to 5.0V over a 4.5V to 28V wide input
DC
DC
voltage. The typical application schematics are shown in
When DRV pin is connected to INTV an integrated
CC
CC
Figures 19 and 20.
5V linear regulator powers the internal gate drivers. If a
The LTM4601AHV has an integrated constant on-time
current mode regulator, ultralow R
5V external bias supply is applied on the DRV pin, then
CC
FETs with fast
an efficiency improvement will occur due to the reduced
powerlossintheinternallinearregulator.Thisisespecially
true at the higher input voltage range.
DS(ON)
switchingspeedandintegratedSchottkydiodes.Thetypical
switching frequency is 850kHz at full load. With current
mode control and internal feedback loop compensation,
the LTM4601AHV module has sufficient stability margins
and good transient performance under a wide range of
operating conditions and with a wide range of output
capacitors, even all ceramic output capacitors.
The LTM4601AHV has a very accurate differential remote
sense amplifier with very low offset. This provides for
very accurate remote sense voltage measurement. The
MPGM pin, MARG0 pin and MARG1 pin are used to sup-
port voltage margining, where the percentage of margin
is programmed by the MPGM pin, and the MARG0 and
MARG1 select margining.
Currentmodecontrolprovidescycle-by-cyclefastcurrent
limit. Besides, foldback current limiting is provided in an
overcurrentconditionwhileV drops.Internalovervoltage
andundervoltagecomparatorspulltheopen-drainPGOOD
output low if the output feedback voltage exits a 10%
window around the regulation point. Furthermore, in an
FB
The PLLIN pin provides frequency synchronization of the
device to an external clock. The TRACK/SS pin is used for
power supply tracking and soft-start programming.
4601ahvf
9
LTM4601AHV
APPLICATIONS INFORMATION
ThetypicalLTM4601AHVapplicationcircuitsareshownin
Figures 19and20.Externalcomponentselectionisprimar-
ily determined by the maximum load current and output
voltage. Refer to Table 2 for specific external capacitor
requirements for a particular application.
The MPGM pin programs a current that when multiplied
by an internal 10k resistor sets up the 0.6V reference
offset for margining. A 1.18V reference divided by the
RPGM resistor on the MPGM pin programs the current.
Calculate V
:
OUT(MARGIN)
V to V
Step-Down Ratios
%VOUT
100
IN
OUT
VOUT(MARGIN)
=
• VOUT
There are restrictions in the maximum V and V
step
IN
OUT
down ratio that can be achieved for a given input voltage.
where%V isthepercentageofV youwanttomargin,
OUT
OUT(MARGIN)
OUT
These constraints are shown in the Typical Performance
and V
is the margin quantity in volts:
Characteristics curves labeled “V to V
Step-Down
OUT
IN
VOUT
1.18V
0.6V VOUT(MARGIN)
Ratio”.Notethatadditionalthermalderatingmayapply.See
the Thermal Considerations and Output Current Derating
section of this data sheet.
RPGM
=
•
•10k
where R
is the resistor value to place on the MPGM
PGM
pin to ground.
Output Voltage Programming and Margining
ThePWMcontrollerhasaninternal0.6Vreferencevoltage.
As shown in the Block Diagram, a 1M and a 60.4k 0.5%
The output margining will be margining of the value.
This is controlled by the MARG0 and MARG1 pins. See
the truth table below:
internal feedback resistor connects V
and V pins
OUT
FB
together. The V
pin is connected between the 1M
OUT_LCL
MARG1
LOW
MARG0
LOW
MODE
and the 60.4k resistor. The 1M resistor is used to protect
against an output overvoltage condition if the V
NO MARGIN
MARGIN UP
MARGIN DOWN
NO MARGIN
OUT_LCL
LOW
HIGH
LOW
pin is not connected to the output, or if the remote sense
HIGH
HIGH
amplifier output is not connected to V . The output
OUT_LCL
HIGH
voltagewilldefaultto0.6V. AddingaresistorR fromthe
SET
V
FB
pin to SGND pin programs the output voltage:
Input Capacitors
60.4k +RSET
VOUT = 0.6V
LTM4601AHV module should be connected to a low AC
impedance DC source. Input capacitors are required to
be placed adjacent to the module. In Figure 18, the 10μF
ceramic input capacitors are selected for their ability to
handle the large RMS current into the converter. An input
bulkcapacitorof100μFisoptional.This100μFcapacitoris
onlyneedediftheinputsourceimpedanceiscompromised
by long inductive leads or traces.
RSET
Table 1. Standard 1% Resistor Values
R
SET
Open 60.4
0.6 1.2
40.2
1.5
30.1
1.8
25.5
2
19.1
2.5
13.3
3.3
8.25
5
(kΩ)
V
OUT
(V)
4601ahvf
10
LTM4601AHV
APPLICATIONS INFORMATION
For a buck converter, the switching duty-cycle can be
estimated as:
the corresponding duty cycle and the number of phases
to arrive at the correct ripple current value. For example,
the 2-phase parallel LTM4601AHV design provides 24A
at 2.5V output from a 12V input. The duty cycle is DC =
2.5V/12V = 0.21. The 2-phase curve has a ratio of ~0.25
for a duty cycle of 0.21. This 0.25 ratio of RMS ripple cur-
rent to a DC load current of 24A equals ~6A of input RMS
ripple current for the external input capacitors.
VOUT
D=
V
IN
Without considering the inductor current ripple, the RMS
current of the input capacitor can be estimated as:
IOUT(MAX)
ICIN(RMS)
=
• D• 1–D
(
)
Output Capacitors
η%
TheLTM4601AHVisdesignedforlowoutputvoltageripple.
In the above equation, η% is the estimated efficiency of
The bulk output capacitors defined as C
are chosen
OUT
the power module. C can be a switcher-rated electrolytic
with low enough effective series resistance (ESR) to meet
theoutputvoltagerippleandtransientrequirements. C
IN
aluminum capacitor, OS-CON capacitor or high volume
ceramiccapacitor.Notethecapacitorripplecurrentratings
are often based on temperature and hours of life. This
makes it advisable to properly derate the input capacitor,
or choose a capacitor rated at a higher temperature than
required. Always contact the capacitor manufacturer for
derating requirements.
OUT
can be a low ESR tantalum capacitor, a low ESR polymer
capacitororaceramiccapacitor. Thetypicalcapacitanceis
200μF if all ceramic output capacitors are used. Additional
output filtering may be required by the system designer,
if further reduction of output ripple or dynamic transient
spikeisrequired.Table2showsamatrixofdifferentoutput
voltages and output capacitors to minimize the voltage
droop and overshoot during a 5A/μs transient. The table
optimizes total equivalent ESR and total bulk capacitance
to maximize transient performance.
In Figures 19 and 20, the 10μF ceramic capacitors are to-
getherusedasahighfrequencyinputdecouplingcapacitor.
In a typical 12A output application, three very low ESR,
X5R or X7R (extended temperature range), 10μF ceramic
capacitorsarerecommended.Thesedecouplingcapacitors
shouldbeplaceddirectlyadjacenttothemoduleinputpins
inthePCBlayouttominimizethetraceinductanceandhigh
frequency AC noise. Each 10μF ceramic is typically good
for 2A to 3A of RMS ripple current. Refer to your ceramics
capacitor catalog for the RMS current ratings.
0.6
0.5
1-PHASE
2-PHASE
0.4
3-PHASE
4-PHASE
6-PHASE
0.3
12-PHASE
MultiphaseoperationwithmultipleLTM4601AHVdevicesin
parallelwilllowertheeffectiveinputRMSripplecurrentdue
to the interleaving operation of the regulators. Application
Note 77 provides a detailed explanation. Refer to Figure 2
for the input capacitor ripple current requirement as a
function of the number of phases. The figure provides a
ratio of RMS ripple current to DC load current as function
of duty cycle and the number of paralleled phases. Pick
0.2
0.1
0
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9
DUTY FACTOR (V /V
)
OUT IN
4601AHV F02
Figure 2. Normalized Input RMS Ripple Current
vs Duty Factor for One to Six Modules (Phases)
4601ahvf
11
LTM4601AHV
APPLICATIONS INFORMATION
Multiphase operation with multiple LTM4601AHV devices
in parallel will lower the effective output ripple current due
totheinterleavingoperationoftheregulators.Forexample,
each LTM4601AHV’s inductor current of a 12V to 2.5V
multiphase design can be read from the Inductor Ripple
Current versus Duty Cycle graph (Figure 3). The large
ripple current at low duty cycle and high output voltage
can be reduced by adding an external resistor from f to
SET
ground which increases the frequency. If the duty cycle is
DC = 2.5V/12V = 0.21, the inductor ripple current for 2.5V
output at 21% duty cycle is ~6A in Figure 3.
Figure 4 provides a ratio of peak-to-peak output ripple cur-
rent to the inductor current as a function of duty cycle and
the number of paralleled phases. Pick the corresponding
dutycycleandthenumberofphasestoarriveatthecorrect
output ripple current ratio value. If a 2-phase operation is
chosen at a duty cycle of 21%, then 0.6 is the ratio. This
0.6 ratio of output ripple current to inductor ripple of 6A
equals 3.6A of effective output ripple current. Refer to Ap-
plicationNote77foradetailedexplanationofoutputripple
current reduction as a function of paralleled phases.
12
2.5V OUTPUT
10
5V OUTPUT
1.8V OUTPUT
1.5V OUTPUT
1.2V OUTPUT
8
6
3.3V OUTPUT WITH
130k ADDED FROM
V
TO f
OUT
SET
4
2
0
5V OUTPUT WITH
100k ADDED FROM
The output voltage ripple has two components that are
related to the amount of bulk capacitance and effective
series resistance (ESR) of the output bulk capacitance.
Therefore, the output voltage ripple can be calculated with
the known effective output ripple current. The equation:
f
TO GND
SET
0
20
40
60
80
DUTY CYCLE (V /V
)
OUT IN
4601AHV F03
ΔV
≈ (ΔI /(8 • f • m • C ) + ESR • ΔI ), where
Figure 3. Inductor Ripple Current vs Duty Cycle
OUT(P-P)
L OUT L
1.00
0.95
0.90
0.85
0.80
0.75
0.70
0.65
0.60
0.55
0.50
0.45
0.40
0.35
0.30
0.25
0.20
0.15
0.10
0.05
0
1-PHASE
2-PHASE
3-PHASE
4-PHASE
6-PHASE
0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45 0.5 0.55 0.6 0.65 0.7 0.75 0.8 0.85 0.9
DUTY CYCLE (V /V
)
IN
O
4601AHV F04
Figure 4. Normalized Output Ripple Current vs Duty Cycle, Dlr = VOT/LI, Dlr = Each Phase’s Inductor Current
4601ahvf
12
LTM4601AHV
APPLICATIONS INFORMATION
f is frequency and m is the number of parallel phases.
This calculation process can be easily fulfilled using our
Excel tool (Refer to the Linear Technology μModule Power
Design Tool).
downwithanotherregulator.Themasterregulator’soutput
is divided down with an external resistor divider that is the
same as the slave regulator’s feedback divider. Figure 5
shows an example of coincident tracking. Ratiometric
modes of tracking can be achieved by selecting different
resistor values to change the output tracking ratio. The
master output must be greater than the slave output for
the tracking to work. Figure 6 shows the coincident output
tracking characteristics.
Fault Conditions: Current Limit and Overcurrent
Foldback
LTM4601AHV has a current mode controller, which inher-
ently limits the cycle-by-cycle inductor current not only in
steady-state operation, but also in transient.
MASTER
OUTPUT
Tofurtherlimitcurrentintheeventofanoverloadcondition,
theLTM4601AHVprovidesfoldbackcurrentlimiting. Ifthe
output voltage falls by more than 50%, then the maximum
output current is progressively lowered to about one sixth
of its full current limit value.
R2
60.4k
TRACK CONTROL
V
IN
R1
40.2k
60.4k FROM
TO V
V
OUT
FB
100k
V
PLLIN TRACK/SS
INTERNAL
IN
SLAVE OUTPUT
PGOOD
V
OUT
MPGM
RUN
COMP
V
C
OUT
FB
Soft-Start and Tracking
MARG0
MARG1
V
OUT_LCL
LTM4601AHV
C
IN
The TRACK/SS pin provides a means to either soft-start
the regulator or track it to a different power supply. A
capacitor on this pin will program the ramp rate of the
output voltage. A 1.5μA current source will charge up the
external soft-start capacitor to 80% of the 0.6V internal
voltagereferenceminusanymargindelta.Thiswillcontrol
the ramp of the internal reference and the output voltage.
The total soft-start time can be calculated as:
INTV
CC
CC
DRV
DIFFV
V
V
OUT
+
OSNS
–
OSNS
f
SGND PGND
SET
R
SET
40.2k
4601AHV F05
Figure 5
CSS
1.5µA
tSOFTSTART = 0.8• 0.6V – V
•
(
)
OUT(MARGIN)
MASTER OUTPUT
SLAVE OUTPUT
When the RUN pin falls below 1.5V, then the SS pin is reset
to allow for proper soft-start control when the regulator
is enabled again. Current foldback and force continuous
mode are disabled during the soft-start process. The
soft-start function can also be used to control the output
ramp up time, so that another regulator can be easily
tracked to it.
OUTPUT
VOLTAGE
4601AHV F06
Output Voltage Tracking
TIME
Figure 6
Output voltage tracking can be programmed externally
usingtheTRACK/SSpin. Theoutputcanbetrackedupand
4601ahvf
13
LTM4601AHV
APPLICATIONS INFORMATION
Run Enable
through the LDO is about 20mA. The internal LDO power
dissipation can be calculated as:
The RUN pin is used to enable the power module. The
pin has an internal 5.1V zener to ground. The pin can be
driven with a logic input not to exceed 5V.
P
= 20mA • (V – 5V)
IN
LDO_LOSS
The LTM4601AHV also provides the external gate driver
The RUN pin can also be used as an undervoltage lock out
(UVLO) function by connecting a resistor divider from the
input supply to the RUN pin:
voltage pin DRV . If there is a 5V rail in the system, it is
CC
recommended to connect DRV pin to the external 5V
CC
rail. This is especially true for higher input voltages. Do
not apply more than 6V to the DRV pin. A 5V output can
CC
R1+R2
be used to power the DRV pin with an external circuit
VUVLO
=
•1.5V
CC
R2
as shown in Figure 18.
Power Good
Parallel Operation of the Module
The PGOOD pin is an open-drain pin that can be used to
monitor valid output voltage regulation. This pin monitors
a 10% window around the regulation point and tracks
with margining.
The LTM4601AHV device is an inherently current mode
controlled device. Parallel modules will have very good
current sharing. This will balance the thermals on the de-
sign. Figure 21 shows a schematic of the parallel design.
The voltage feedback equation changes with the variable
n as modules are paralleled:
COMP Pin
This pin is the external compensation pin. The module
has already been internally compensated for most output
voltages. Table 2 is provided for most application require-
ments. A spice model will be provided for other control
loop optimization.
60.4k
+RFB
N
VOUT = 0.6V
RFB
N is the number of paralleled modules.
Figure 21 shows two LTM4601AHV modules used in a
parallel design. An LTM4601AHV device can be used
without the diff amp.
PLLIN
The power module has a phase-locked loop comprised
of an internal voltage controlled oscillator and a phase
detector. This allows the internal top MOSFET turn-on
to be locked to the rising edge of the external clock. The
frequency range is 30% around the operating frequency
of 850kHz. A pulse detection circuit is used to detect a
clock on the PLLIN pin to turn on the phase lock loop.
The pulse width of the clock has to be at least 400ns and
2V in amplitude. During the start-up of the regulator, the
phase-lock loop function is disabled.
Thermal Considerations and Output Current Derating
The power loss curves in Figures 7 and 8 can be used
in coordination with the load current derating curves in
Figures 9 to 16 for calculating an approximate θ for the
JA
modulewithvariousheatsinkingmethods.Thermalmodels
are derived from several temperature measurements at
the bench and thermal modeling analysis. Thermal Ap-
plication Note 103 provides a detailed explanation of the
analysis for the thermal models and the derating curves.
INTV and DRV Connection
CC
CC
Tables 3 and 4 provide a summary of the equivalent θ
JA
An internal low dropout regulator produces an internal
5V supply that powers the control circuitry and DRV
for the noted conditions. These equivalent θ parameters
JA
CC
are correlated to the measured values, and are improved
with air flow. The case temperature is maintained at 100°C
or below for the derating curves. The maximum case
temperature of 100°C is to allow for a rise of about 13°C
4601ahvf
for driving the internal power MOSFETs. Therefore, if the
system does not have a 5V power rail, the LTM4601AHV
can be directly powered by V . The gate driver current
IN
14
LTM4601AHV
APPLICATIONS INFORMATION
6
5
4
3
2
1
0
5.0
4.5
4.0
3.5
24V LOSS
3.0
24V LOSS
12V LOSS
2.5
2.0
12V LOSS
1.5
5V LOSS
1.0
0.5
0
0
4
6
8
10
12
2
0
2
6
8
10
12
4
OUTPUT CURRENT (A)
OUTPUT CURRENT (A)
4601AHV F08
4601AHV F07
Figure 7. 24VIN and 1.5V Power Loss
Figure 8. 24VIN and 3.3V Power Loss
12
12
10
10
8
6
8
6
4
2
0
4
2
0
5V , 1.5V
0LFM
200LFM
400LFM
5V , 1.5V
0LFM
200LFM
400LFM
IN
OUT
OUT
OUT
IN
OUT
OUT
OUT
5V , 1.5V
5V , 1.5V
IN
IN
5V , 1.5V
5V , 1.5V
IN
IN
50
60
70
80
90
100
50
60
70
80
90
100
AMBIENT TEMPERATURE (°C)
AMBIENT TEMPERATURE (°C)
4601AHV F09
4601AHV F10
Figure 9. No Heat Sink 5VIN
Figure 10. BGA Heat Sink 5VIN
12
10
12
10
8
6
8
6
4
2
0
4
2
0
12V , 1.5V
0LFM
200LFM
400LFM
12V , 1.5V
0LFM
200LFM
400LFM
IN
OUT
OUT
OUT
IN
OUT
OUT
OUT
12V , 1.5V
12V , 1.5V
IN
IN
12V , 1.5V
12V , 1.5V
IN
IN
50
60
70
80
90
100
50
60
70
80
90
100
AMBIENT TEMPERATURE (°C)
AMBIENT TEMPERATURE (°C)
4601AHV F12
4601AHV F11
Figure 11. No Heat Sink 12VIN
Figure 12. BGA Heat Sink 12VIN
4601ahvf
15
LTM4601AHV
APPLICATIONS INFORMATION
12
12
10
10
8
6
8
6
4
4
2
0
12V , 3.3V
0LFM
200LFM
400LFM
12V , 3.3V
0LFM
200LFM
400LFM
IN
OUT
OUT
OUT
IN
OUT
OUT
OUT
2
0
12V , 3.3V
12V , 3.3V
IN
IN
12V , 3.3V
IN
12V , 3.3V
IN
40
60
80
100
40
60
80
100
AMBIENT TEMPERATURE (°C)
AMBIENT TEMPERATURE (°C)
4601AHV F13
4601AHV F14
Figure 14. 12VIN, 3.3VOUT, BGA Heat Sink
Figure 13. 12VIN, 3.3VOUT, No Heat Sink
12
10
12
10
8
6
8
6
4
4
24V , 1.5V
0LFM
200LFM
400LFM
24V , 1.5V
0LFM
200LFM
400LFM
IN
OUT
OUT
OUT
IN
OUT
OUT
OUT
2
0
2
0
24V , 1.5V
24V , 1.5V
IN
IN
24V , 1.5V
IN
24V , 1.5V
IN
40
60
80
100
40
60
80
100
AMBIENT TEMPERATURE (°C)
AMBIENT TEMPERATURE (°C)
4601AHV F15
4601AHV F16
Figure 15. 24VIN, 1.5VOUT, No Heat Sink
Figure 16. 24VIN, 1.5VOUT, BGA Heat Sink
4601ahvf
16
LTM4601AHV
APPLICATIONS INFORMATION
Table 2. Output Voltage Response Versus Component Matrix* (Refer to Figures 19 and 20), 0A to 6A Load Step
TYPICAL MEASURED VALUES
C
VENDORS
PART NUMBER
C
OUT2
VENDORS
PART NUMBER
OUT1
TDK
C4532X5R0J107MZ (100μF,6.3V)
JMK432BJ107MU-T ( 100μF, 6.3V)
JMK316BJ226ML-T501 ( 22μF, 6.3V)
SANYO POSCAP
SANYO POSCAP
SANYO POSCAP
6TPE330MIL (330μF, 6.3V)
2R5TPE470M9 (470μF, 2.5V)
4TPE470MCL (470μF, 4V)
TAIYO YUDEN
TAIYO YUDEN
V
C
C
C
C
V
(V)
DROOP
(mV)
PEAK TO
RECOVERY
TIME (μs)
LOAD STEP
R
SET
OUT
IN
IN
OUT1
OUT2
IN
(V)
1.2
1.2
1.2
1.2
1.2
1.2
1.2
1.2
1.5
1.5
1.5
1.5
1.5
1.5
1.5
1.5
1.8
1.8
1.8
1.8
1.8
1.8
1.8
1.8
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
3.3
3.3
3.3
3.3
3.3
3.3
3.3
3.3
5
(CERAMIC)
2 × 10μF 35V
2 × 10μF 35V
2 × 10μF 35V
2 × 10μF 35V
2 × 10μF 35V
2 × 10μF 35V
2 × 10μF 35V
2 × 10μF 35V
2 × 10μF 35V
2 × 10μF 35V
2 × 10μF 35V
2 × 10μF 35V
2 × 10μF 35V
2 × 10μF 35V
2 × 10μF 35V
2 × 10μF 35V
2 × 10μF 35V
2 × 10μF 35V
2 × 10μF 35V
2 × 10μF 35V
2 × 10μF 35V
2 × 10μF 35V
2 × 10μF 35V
2 × 10μF 35V
2 × 10μF 35V
2 × 10μF 35V
2 × 10μF 35V
2 × 10μF 35V
2 × 10μF 35V
2 × 10μF 35V
2 × 10μF 35V
2 × 10μF 35V
2 × 10μF 35V
2 × 10μF 35V
2 × 10μF 35V
2 × 10μF 35V
2 × 10μF 35V
2 × 10μF 35V
2 × 10μF 35V
2 × 10μF 35V
2 × 10μF 35V
2 × 10μF 35V
(BULK)
(CERAMIC)
(BULK)
470μF 4V
470μF 2.5V
330μF 6.3V
NONE
C
C3
PEAK (mV)
140
70
(A/μs)
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
(kΩ)
60.4
60.4
60.4
60.4
60.4
60.4
60.4
60.4
40.2
40.2
40.2
40.2
40.2
40.2
40.2
40.2
30.1
30.1
30.1
30.1
30.1
30.1
30.1
30.1
19.1
19.1
19.1
19.1
19.1
19.1
19.1
19.1
13.3
13.3
13.3
13.3
13.3
13.3
13.3
13.3
8.25
8.25
COMP
150μF 35V
150μF 35V
150μF 35V
150μF 35V
150μF 35V
150μF 35V
150μF 35V
150μF 35V
150μF 35V
150μF 35V
150μF 35V
150μF 35V
150μF 35V
150μF 35V
150μF 35V
150μF 35V
150μF 35V
150μF 35V
150μF 35V
150μF 35V
150μF 35V
150μF 35V
150μF 35V
150μF 35V
150μF 35V
150μF 35V
150μF 35V
150μF 35V
150μF 35V
150μF 35V
150μF 35V
150μF 35V
150μF 35V
150μF 35V
150μF 35V
150μF 35V
150μF 35V
150μF 35V
150μF 35V
150μF 35V
150μF 35V
150μF 35V
3 × 22μF 6.3V
1 × 100μF 6.3V
2 × 100μF 6.3V
4 × 100μF 6.3V
3 × 22μF 6.3V
1 × 100μF 6.3V
2 × 100μF 6.3V
4 × 100μF 6.3V
3 × 22μF 6.3V
1 × 100μF 6.3V
2 × 100μF 6.3V
4 × 100μF 6.3V
3 × 22μF 6.3V
1 × 100μF 6.3V
2 × 100μF 6.3V
4 × 100μF 6.3V
3 × 22μF 6.3V
1 × 100μF 6.3V
2 × 100μF 6.3V
4 × 100μF 6.3V
3 × 22μF 6.3V
1 × 100μF 6.3V
2 × 100μF 6.3V
4 × 100μF 6.3V
1 × 100μF 6.3V
2 × 100μF 6.3V
3 × 22μF 6.3V
4 × 100μF 6.3V
1 × 100μF 6.3V
3 × 22μF 6.3V
2 × 100μF 6.3V
4 × 100μF 6.3V
2 × 100μF 6.3V
1 × 100μF 6.3V
3 × 22μF 6.3V
4 × 100μF 6.3V
1 × 100μF 6.3V
3 × 22μF 6.3V
2 × 100μF 6.3V
4 × 100μF 6.3V
4 × 100μF 6.3V
4 × 100μF 6.3V
NONE
47pF
5
70
35
30
20
20
30
30
20
20
20
35
30
30
30
35
30
25
25
30
20
30
30
30
30
30
20
30
30
30
25
30
30
30
25
30
30
30
30
30
35
35
30
25
25
NONE 100pF
NONE 22pF
5
5
70
140
93
NONE 100pF
NONE 100pF
NONE 100pF
5
40
470μF 4V
470μF 2.5V
330μF 6.3V
NONE
12
12
12
12
5
70
140
70
35
NONE
22pF
70
140
98
NONE 100pF
NONE 100pF
49
470μF 4V
470μF 2.5V
330μF 6.3V
NONE
48
100
109
84
NONE
33pF
5
54
NONE 100pF
NONE 100pF
NONE 100pF
5
44
5
61
118
100
109
89
470μF 4V
470μF 2.5V
330μF 6.3V
NONE
12
12
12
12
5
48
NONE
33pF
54
NONE 100pF
NONE 100pF
44
54
108
100
90
470μF 4V
470μF 2.5V
330μF 6.3V
NONE
NONE
47pF
48
NONE 100pF
NONE 100pF
NONE 100pF
NONE 100pF
NONE 100pF
NONE 100pF
NONE 100pF
NONE 100pF
NONE 220pF
NONE NONE
NONE 100pF
NONE 100pF
NONE NONE
NONE 220pF
NONE 220pF
NONE 100pF
NONE 100pF
NONE 100pF
NONE 100pF
NONE 100pF
NONE 150pF
NONE 100pF
NONE 100pF
5
44
5
68
140
130
120
120
140
130
103
113
116
115
103
102
113
140
240
214
214
230
214
214
214
230
375
320
5
65
470μF 4V
470μF 2.5V
330μF 6.3V
NONE
12
12
12
12
5
60
60
68
65
470μF 4V
330μF 6.3V
470μF 4V
NONE
48
5
56
5
57
5
60
470μF 4V
470μF 4V
330μF 6.3V
NONE
12
12
12
12
7
48
51
56
70
330μF 6.3V
470μF 4V
470μF 4V
NONE
120
110
110
114
110
110
110
114
188
159
7
7
7
470μF 4V
470μF 4V
330μF 6.3V
NONE
12
12
12
12
15
20
NONE
NONE
NONE
22pF
22pF
5
NONE
*X7R is recommended for extended temperature range
4601ahvf
17
LTM4601AHV
APPLICATIONS INFORMATION
Table 3. 1.5V Output at 12A
DERATING CURVE
Figures 9, 11, 15
Figures 9, 11, 15
Figures 9, 11, 15
Figures 10, 12, 16
Figures 10, 12, 16
Figures 10, 12, 16
V
(V)
POWER LOSS CURVE
Figure 7
AIR FLOW (LFM)
HEAT SINK
None
θ
JA
(°C/W)
IN
5, 12, 24
5, 12, 24
5, 12, 24
5, 12, 24
5, 12, 24
5, 12, 24
0
15.2
14
Figure 7
200
400
0
None
Figure 7
None
12
Figure 7
BGA Heat Sink
BGA Heat Sink
BGA Heat Sink
13.9
11.3
10.25
Figure 7
200
400
Figure 7
Table 4. 3.3V Output at 12A
DERATING CURVE
Figure 13
V
IN
(V)
POWER LOSS CURVE
Figure 8
AIR FLOW (LFM)
HEAT SINK
None
θ
JA
(°C/W)
12
0
15.2
14.6
13.4
13.9
11.1
10.5
Figure 13
12
12
12
12
12
Figure 8
200
400
0
None
Figure 13
Figure 8
None
Figure 14
Figure 8
BGA Heat Sink
BGA Heat Sink
BGA Heat Sink
Figure 14
Figure 8
200
400
Figure 14
Figure 8
Heat Sink Manufacturer
Wakefield Engineering
Part No: 20069
Phone: 603-635-2800
4601ahvf
18
LTM4601AHV
APPLICATIONS INFORMATION
to 25°C inside the μModule with a thermal resistance θ
from junction to case between 6°C/W to 9°C/W. This will
maintain the maximum junction temperature inside the
μModule below 125°C.
• Place high frequency ceramic input and output capaci-
JC
tors next to the V , PGND and V
pins to minimize
IN
OUT
high frequency noise.
• Place a dedicated power ground layer underneath the
unit. Refer frequency synchronization source to power
ground.
Safety Considerations
The LTM4601AHV modules do not provide isolation
• Tominimizetheviaconductionlossandreducemodule
thermal stress, use multiple vias for interconnection
between top layer and other power layers.
from V to V . There is no internal fuse. If required,
IN
OUT
a slow blow fuse with a rating twice the maximum input
current needs to be provided to protect each unit from
catastrophic failure.
• Do not put vias directly on pads unless they are
capped.
Layout Checklist/Example
• Use a separated SGND ground copper area for com-
ponents connected to signal pins. Connect the SGND
to PGND underneath the unit.
The high integration of LTM4601AHV makes the PCB
board layout very simple and easy. However, to optimize
its electrical and thermal performance, some layout con-
siderations are still necessary.
Figure 17 gives a good example of the recommended
layout.
• Use large PCB copper areas for high current path, in-
cluding V , PGND and V . It helps to minimize the
IN
OUT
PCB conduction loss and thermal stress.
V
IN
C
C
IN
CONTROL
IN
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
• • • • • •
•
•
•
•
•
•
•
•
CONTROL
PGND
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
• • • • • • • •
SIGNAL
GND
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
CONTROL
•C• • • •C• • •
OUT
OUT
V
OUT
4601AHV F17
Figure 17. Recommended Layout
4601ahvf
19
LTM4601AHV
APPLICATIONS INFORMATION
Frequency Adjustment
the 14A peak specified value. A 100k resistor is placed
from f to ground, and the parallel combination of 100k
SET
TheLTM4601AHVisdesignedtotypicallyoperateat850kHz
and 39.2k equates to 28k. The I
calculation with 28k
fSET
across most input conditions. The f pin is normally left
SET
and 28V input voltage equals 333μA. This equates to a t
ON
open or decoupled with an optional 1000pF capacitor. The
switching frequency has been optimized for maintaining
constant output ripple noise over most operating ranges.
The 850kHz switching frequency and the 400ns minimum
off time can limit operation at higher duty cycles like 5V to
3.3V, and produce excessive inductor ripple currents for
lower duty cycle applications like 28V to 5V. The 5V and
3.3V drop out curves are modified by adding an external
of 144ns. This will increase the switching frequency from
~884kHz to ~1.24MHz for the 28V to 5V conversion. The
minimum on time is above 100ns at 28V input. Since
the switching frequency is approximately constant over
input and output conditions, then the lower input voltage
range is limited to 10V for the 1.24MHz operation due to
the 400ns minimum off time. Equation: t = (V /V ) •
ON
OUT IN
(1/Frequency) equates to a 400ns on time, and a 400ns off
resistor on the f
pin to allow for lower input voltage
SET
time. The “V to V Step-Down Ratio” curves reflect an
IN
OUT
operation, or higher input voltage operation.
operating range of 10V to 28V for 1.24MHz operation with
a 100k resistor to ground as shown in Figure 18, and an
Example for 5V Output
8V to 16V operation for f floating. These modifications
SET
LTM4601AHV minimum on-time = 100ns;
are made to provide wider input voltage ranges for the 5V
output designs while limiting the inductor ripple current,
and maintaining the 400ns minimum off time.
t
= ((4.8 • 10pf)/I
)
ON
fSET
LTM4601AHV minimum off-time = 400ns;
= t – t , where t = 1/Frequency
t
OFF
ON
Example for 3.3V Output
Duty Cycle = t /t or V /V
ON
OUT IN
LTM4601AHV minimum on-time = 100ns;
t
= ((3.3 • 10pF)/I
)
Equations for setting frequency:
ON
fSET
LTM4601AHV minimum off-time = 400ns;
= t – t , where t = 1/Frequency
I
t
= (V /(3 • R )), for 28V operation, I
= 238μA,
fSET
IN
fSET
fSET
t
= ((4.8 • 10pF)/I ), t = 202ns, where the internal
OFF
ON
ON
R
fSET ON
is 39.2k. Frequency = (V /(V • t )) = (5V/(28 •
fSET
OUT IN ON
Duty Cycle (DC) = t /t or V /V
ON
OUT IN
202ns)) ~ 884kHz. The inductor ripple current begins to
get high at the higher input voltages due to a larger voltage
across the inductor. This is noted in the Typical Inductor
Ripple Current verses Duty Cycle graph (Figure 3) where
Equations for setting frequency:
I
t
R
= (V /(3 • R )), for 28V operation, I
= 238μA,
fSET
IN
fSET
fSET
= ((3.3 • 10pf)/I ), t = 138.7ns, where the internal
ON
fSET ON
I ≈ 10A at 20% duty cycle. The inductor ripple current
is39.2k. Frequency=(V /(V •t ))=(3.3V/(28•
L
fSET
OUT IN ON
can be lowered at the higher input voltages by adding an
138.7ns))~850kHz.Theminimumon-timeandminimum-
off time are within specification at 139ns and 1037ns. The
4.5V minimum input for converting 3.3V output will not
externalresistorfromf togroundtoincreasetheswitch-
SET
ing frequency. A 7A ripple current is chosen, and the total
peak current is equal to 1/2 of the 7A ripple current plus
the output current. The 5V output current is limited to 8A,
so the total peak current is less than 11.5A. This is below
meet the minimum off-time specification of 400ns. t
=
ON
868ns, Frequency = 850kHz, t = 315ns.
OFF
4601ahvf
20
LTM4601AHV
APPLICATIONS INFORMATION
Solution
540kHz operation. As shown in Figure 19, a resistor can
be placed from V
to f
to lower the effective I
OUT
SET fSET
Lower the switching frequency at lower input voltages to
allow for higher duty cycles, and meet the 400ns mini-
mum off-time at 4.5V input voltage. The off-time should
be about 500ns with 100ns guard band. The duty cycle
current out of the f pin to 24μA. The f pin is 4.5V/3
SET
SET
=1.5V and V
= 3.3V, therefore 130k will source 14μA
node and lower the I
OUT
into the f
current to 24μA.
SET
fSET
This enables the 540kHz operation and the 4.5V to 28V
input operation for down converting to 3.3V output. The
frequency will scale from 540kHz to 1.1 MHz over this
input range. This provides for an effective output current
of 8A over the input range.
for (3.3V/4.5) = ~73%. Frequency = (1 – DC)/t
or
OFF
(1 – 0.73)/500ns = 540kHz. The switching frequency
needs to be lowered to 540kHz at 4.5V input. t = DC/
ON
frequency, or 1.35μs. The f
pin voltage compliance
SET
is 1/3 of V , and the I
current equates to 38μA with
IN
fSET
the internal 39.2k. The I
current needs to be 24μA for
fSET
V
OUT
TRACK/SS CONTROL
V
IN
10V TO 28V
REVIEW TEMPERATURE
DERATING CURVE
R2
R4
V
PLLIN TRACK/SS
V
5V
8A
IN
100k 100k
OUT
PGOOD
V
OUT
C3
100μF
6.3V
SANYO
POSCAP
+
MPGM
RUN
COMP
V
FB
MARG0
MARG1
22μF
6.3V
REFER TO
TABLE 2
LTM4601AHV
INTV
V
OUT_LCL
CC
CC
DRV
DIFFV
V
V
OUT
+
5% MARGIN
OSNS
R1
392k
1%
C2
10μF
35V
–
OSNS
f
SGND PGND
SET
C1
R
R
10μF
35V
fSET
SET
100k
8.25k
MARGIN CONTROL
IMPROVE
EFFICIENCY
SOT-323
FOR ≥12V INPUT
CMSSH-3C3
4601AHV F18
Figure 18. 5V at 8A Design Without Differential Amplifier
4601ahvf
21
LTM4601AHV
APPLICATIONS INFORMATION
V
OUT
TRACK/SS CONTROL
V
IN
4.5V TO 16V
REVIEW TEMPERATURE
DERATING CURVE
R2
R4
V
PLLIN TRACK/SS
V
3.3V
10A
IN
100k 100k
OUT
PGOOD
V
OUT
PGOOD
MPGM
RUN
COMP
V
FB
MARG0
MARG1
22μF
6.3V
C3
100μF
6.3V
+
LTM4601AHV
INTV
V
OUT_LCL
CC
CC
SANYO
POSCAP
DRV
DIFFV
V
V
OUT
+
C2
OSNS
10μF
25V
3x
R1
392k
–
OSNS
R
f
fSET
SGND PGND
SET
R
SET
130k
13.3k
5% MARGIN
MARGIN CONTROL
4601AHV F19
Figure 19. 3.3V at 10A Design
CLOCK SYNC
C5
0.01μF
V
OUT
V
IN
22V TO 28V
REVIEW TEMPERATURE
DERATING CURVE
R2
R4
V
PLLIN TRACK/SS
V
1.5V
10A
IN
100k
100k
OUT
PGOOD
V
OUT
C3 100pF
+
C
C
PGOOD
MPGM
RUN
V
OUT1
OUT2
FB
100μF
470μF
6.3V
MARG0
MARG1
V
OUT_LCL
MARGIN
CONTROL
6.3V
ON/OFF
COMP
INTV
DRV
LTM4601AHV
CC
CC
DIFFV
OUT
+
+
C
IN
R1
392k
V
V
OSNS
BULK
OPT
–
REFER TO
TABLE 2 FOR
DIFFERENT
OUTPUT
OSNS
C
IN
f
R
10μF
35V
SGND PGND
SET
fSET
R
SET
175k
40.2k
V
3x CER
IN
VOLTAGE
4601AHV F20
5% MARGIN
Figure 20. Typical 22V to 28V, 1.5V at 10A Design, 500kHz
4601ahvf
22
LTM4601AHV
APPLICATIONS INFORMATION
60.4k
+ R
SET
V
N
OUT
V
= 0.6V
OUT
R
SET
CLOCK SYNC
0° PHASE
N = NUMBER OF PHASES
TRACK/SS CONTROL
V
IN
6V TO 28V
R2
100k
R4
100k
V
PLLIN TRACK/SS
IN
V
OUT
3.3V
PGOOD
V
OUT
C6 220pF
20A
C3
22μF
6.3V
MPGM
RUN
V
FB
MARG0
MARG1
V
OUT_LCL
COMP
INTV
DRV
+
LTM4601AHV
C4
CC
CC
470μF
6.3V
+
C5*
100μF
35V
DIFFV
V
OUT
+
C1
0.1μF
OSNS
LTC6908-1
+
REFER TO
TABLE 2
–
V
OSNS
C2
10μF
35V
2x
1
2
3
6
5
4
118k
1%
V
OUT1
R1
392k
f
SGND PGND
SET
R
SET
6.65k
100pF
GND OUT2
SET
MOD
5%
MARGIN
2-PHASE
OSCILLATOR
MARGIN CONTROL
CLOCK SYNC
180° PHASE
TRACK/SS CONTROL
C7
0.033μF
V
PLLIN TRACK/SS
IN
PGOOD
PGOOD
V
OUT
+
C4
470μF
6.3V
C3
22μF
6.3V
MPGM
RUN
COMP
V
FB
MARG0
MARG1
C8
10μF
35V
2x
LTM4601AHV
REFER TO
TABLE 2
INTV
CC
V
OUT_LCL
DRV
DIFFV
CC
OUT
+
V
V
OSNS
–
392k
OSNS
f
SGND PGND
SET
4601AHV F21
*C5 OPTIONAL TO REDUCE ANY LC RINGING.
NOT NEEDED FOR LOW INDUCTANCE PLANE CONNECTION
Figure 21. 2-Phase Parallel, 3.3V at 20A Design
4601ahvf
23
LTM4601AHV
TYPICAL APPLICATIONS
LTC6908-1
2-PHASE
OSCILLATOR
0° PHASE
+
V
OUT1
C8
0.1μF
R1
118k
GND OUT2
SET
MOD
180° PHASE
3.3V
3.3V
V
IN
6V TO 28V
R3
R4
R7
R8
V
PLLIN
V
PLLIN
V
100k 100k
100k 100k
IN
IN
V
3.3V
10A
V
2.5V
10A
OUT1
OUT2
PGOOD
V
PGOOD
RUN
V
OUT
FB
OUT
FB
C2
100μF
6.3V
C4
C6
100μF
6.3V
C7
RUN
COMP
INTV
DRV
150μF
150μF
R1
R5
19.1k
V
COMP
INTV
DRV
C5
10μF
35V
OUT_LCL
OUT_LCL
6.3V
6.3V
13.3k
DIFFV
V
V
DIFFV
CC
OUT
+
CC
OUT
+
C1
10μF
35V
LTM4601AHV
3.3V
TRACK
LTM4601AHV
V
V
CC
MPGM
OSNS
CC
MPGM
OSNS
–
–
OSNS
OSNS
R16
60.4k
R6
392k
R2
392k
f
MARG0
MARG1
f
MARG0
MARG1
SET
SET
MARGIN CONTROL
MARGIN CONTROL
TRACK/SS
TRACK/SS
C3
0.15μF
R15
19.1k
SGND
PGND
SGND
PGND
4601AHV F22
Figure 22. Dual Outputs (3.3V and 2.5V) with Tracking
LTC6908-1
2-PHASE
OSCILLATOR
0° PHASE
+
V
OUT1
C8
0.1μF
R1
182k
GND OUT2
SET
MOD
180° PHASE
1.8V
1.8V
V
IN
6V TO 28V
V
1.5V
10A
V
1.8V
10A
OUT2
OUT1
R3
R4
R7
R8
V
PLLIN
V
V
PLLIN
100k 100k
100k 100k
IN
IN
C9
47pF
C8
C2
100μF
6.3V
C4
C6
100μF
6.3V
C7
PGOOD
V
PGOOD
RUN
V
OUT
FB
OUT
FB
47pF
220μF
220μF
RUN
COMP
INTV
DRV
6.3V
6.3V
R1
30.1k
R5
40.2k
COMP
INTV
DRV
V
OUT_LCL
C5
10μF
35V
OUT_LCL
DIFFV
V
V
DIFFV
V
V
CC
OUT
+
CC
OUT
+
C1
10μF
35V
LTM4601AHV
LTM4601AHV
3.3V
TRACK
CC
MPGM
OSNS
CC
MPGM
OSNS
–
–
OSNS
OSNS
R16
60.4k
R6
392k
R2
392k
f
MARG0
MARG1
f
MARG0
MARG1
SET
SET
MARGIN CONTROL
MARGIN CONTROL
TRACK/SS
TRACK/SS
C3
0.15μF
R15
40.2k
SGND
PGND
SGND
PGND
4601AHV F23
Figure 23. Dual Outputs (1.8V and 1.5V) with Tracking
4601ahvf
24
LTM4601AHV
PACKAGE DESCRIPTION
Z
b b b
Z
5 8 0 6 . 9
5 . 7 1 5 0
4 . 4 4 5 0
3 . 1 7 5 0
1 . 9 0 5 0
0 . 6 3 5 0
0 . 0 0 0 0
0 . 6 3 5 0
1 . 9 0 5 0
3 . 1 7 5 0
4 . 4 4 5 0
5 . 7 1 5 0
5 8 0 6 . 9
4601ahvf
25
LTM4601AHV
PACKAGE DESCRIPTION
Pin Assignment Table 5
(Arranged by Pin Number)
PIN NAME
PIN NAME
PIN NAME
PIN NAME
D1 PGND
D2 PGND
D3 PGND
D4 PGND
D5 PGND
D6 PGND
PIN NAME
E1 PGND
E2 PGND
E3 PGND
E4 PGND
E5 PGND
E6 PGND
E7 PGND
PIN NAME
F1 PGND
F2 PGND
F3 PGND
F4 PGND
F5 PGND
F6 PGND
F7 PGND
F8 PGND
F9 PGND
A1
A2
A3
A4
A5
A6
V
IN
V
IN
V
IN
V
IN
V
IN
V
IN
B1
B2
B3
B4
B5
B6
V
IN
V
IN
V
IN
V
IN
V
IN
V
IN
C1
C2
C3
C4
C5
C6
V
IN
V
IN
V
IN
V
IN
V
IN
V
IN
A7 INTV
B7 PGND
B8
A9 TRACK/SS B9 PGND
C7 PGND
C8
D7
D8 PGND
D9 INTV
-
CC
A8 PLLIN
-
-
E8
-
C9 PGND
C10 MTP1
E9 PGND
CC
A10 RUN
B10
B11 MPGM
B12
-
D10 MPT2
D11 MPT3
D12 MARG1
E10
E11
-
-
F10
F11 PGOOD
F12
-
A11 COMP
A12 MPGM
C11 f
SET
f
C12 MARG0
E12 DRV
V
FB
SET
CC
PIN NAME
G1 PGND
G2 PGND
G3 PGND
G4 PGND
G5 PGND
G6 PGND
G7 PGND
G8 PGND
G9 PGND
PIN NAME
H1 PGND
H2 PGND
H3 PGND
H4 PGND
H5 PGND
H6 PGND
H7 PGND
H8 PGND
H9 PGND
PIN NAME
PIN NAME
PIN NAME
PIN NAME
J1
V
V
V
V
V
V
V
V
V
V
-
K1
K2
K3
K4
K5
K6
K7
K8
K9
K10
K11
V
OUT
V
OUT
V
OUT
V
OUT
V
OUT
V
OUT
V
OUT
V
OUT
V
OUT
V
OUT
V
OUT
L1
V
V
V
V
V
V
V
V
V
V
V
V
M1
M2
M3
M4
M5
M6
M7
M8
M9
V
V
V
V
V
V
V
V
V
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT_LCL
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OSNS
J2
L2
J3
L3
J4
L4
J5
L5
J6
L6
J7
L7
J8
L8
J9
L9
G10
-
H10
-
J10
J11
J12
L10
L11
L12
M10 V
M11 V
M12 V
G11 SGND
H11 SGND
H12 SGND
+
–
G12 PGOOD
V
K12 DIFFV
OUT
OSNS
4601ahvf
26
LTM4601AHV
PACKAGE DESCRIPTION
Pin Assignment Tables
(Arranged by Pin Function)
PIN NAME
PIN NAME
PGND
PIN NAME
PIN NAME
PIN NAME
A1
A2
A3
A4
A5
A6
V
V
V
V
V
V
D1
D2
D3
D4
D5
D6
D8
J1
J2
J3
J4
J5
J6
J7
J8
J9
J10
V
V
V
V
V
V
V
V
V
V
A7
INTVCC
PLLIN
B7
PGND
IN
IN
IN
IN
IN
IN
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
PGND
PGND
PGND
PGND
PGND
PGND
A8
B8
-
A9
TRACK/SS
RUN
B9
B10
B11
PGND
-
A10
A11
A12
COMP
MPGM
MPGM
C7
PGND
-
B1
B2
B3
B4
B5
B6
V
IN
V
IN
V
IN
V
IN
V
IN
V
IN
B12
C12
D12
E12
F12
G12
H12
J12
K12
L12
M12
f
C8
SET
E1
E2
E3
E4
E5
E6
E7
PGND
PGND
PGND
PGND
PGND
PGND
PGND
C9
PGND
MTP1
MARG0
MARG1
C10
C11
f
SET
K1
K2
K3
K4
K5
K6
K7
K8
K9
K10
K11
V
V
V
V
V
V
V
V
V
V
V
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
DRV
D7
-
CC
D8
PGND
INTVCC
MTP2
MTP3
V
FB
C1
C2
C3
C4
C5
C6
V
IN
V
IN
V
IN
V
IN
V
IN
V
IN
D9
PGOOD
D10
D11
F1
F2
F3
F4
F5
F6
F7
F8
F9
PGND
PGND
PGND
PGND
PGND
PGND
PGND
PGND
PGND
SGND
+
E8
E9
E10
E11
-
V
OSNS
PGND
DIFFV
OUT
-
-
V
V
OUT_LCL
–
F10
F11
-
OSNS
PGOOD
L1
L2
L3
L4
L5
L6
L7
L8
L9
L10
L11
V
V
V
V
V
V
V
V
V
V
V
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
G10
G11
-
SGND
G1
G2
G3
G4
G5
G6
G7
G8
G9
PGND
PGND
PGND
PGND
PGND
PGND
PGND
PGND
PGND
H10
H11
-
SGND
J11
-
M1
M2
M3
M4
M5
M6
M7
M8
M9
M10
M11
V
V
V
V
V
V
V
V
V
V
V
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
H1
H2
H3
H4
H5
H6
H7
H8
H9
PGND
PGND
PGND
PGND
PGND
PGND
PGND
PGND
PGND
4601ahvf
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
27
LTM4601AHV
RELATED PARTS
PART NUMBER
LTC2900
DESCRIPTION
COMMENTS
Quad Supply Monitor with Adjustable Reset Timer
Power Supply Tracking Controller
Synchronous Isolated Flyback Controllers
10A DC/DC μModule
Monitors Four Supplies, Adjustable Reset Timer
Tracks Both Up and Down, Power Supply Sequencing
No Optocoupler Required, 3.3V, 12A Output, Simple Design
Fast Transient Response, LTM4600HVMPV: –55°C to 125°C Tested
LTC2923
LT3825/LT3837
LTM4600
LTM4601
12A DC/DC μModule with PLL, Output Tracking/
Margining and Remote Sensing
Synchronizable, PolyPhase Operation to 48A, LTM4601-1 Version has no
Remote Sensing
LTM4602
LTM4603
6A DC/DC μModule
Pin Compatible with the LTM4600
6A DC/DC μModule with PLL and Outpupt Tracking/
Margining and Remote Sensing
Synchronizable, PolyPhase Operation, LTM4603-1 Version has no
Remote Sensing, Pin Compatible with the LTM4601
LTM4604
LTM4608
LTM8020
LTM8021
4A Low Voltage DC/DC μModule
2.375V ≤ V ≤ 5.5V, 0.8V ≤ V
≤ 5V,
IN
OUT
9mm × 15mm × 2.3mm (Ultra-thin) LGA Package
8A Low Voltage DC/DC μModule
2.375V ≤ V ≤ 5.5V, 0.6V ≤ V ≤ 5V;
IN
OUT
9mm × 15mm × 2.8mm LGA Package
200mA, 36V DC/DC μModule
4V ≤ V ≤ 36V, 1.25V ≤ V ≤ 5V,
IN
IN
OUT
6.25mm × 6.25mm × 2.32mm LGA Package
500mA, 36V DC/DC μModule
3V ≤ V ≤ 36V, 0.8V ≤ V ≤ 5V,
IN
IN
OUT
11.25mm × 6.25mm × 2.8mm LGA Package
LTM8022/ LTM8023 1A/2A, 36V DC/DC μModule Family
3.6V ≤ V ≤ 36V, 0.8V ≤ V ≤ 10V, Pin Compatible,
IN
IN
OUT
11.25mm × 9mm × 2.8mm LGA Package
®
This product contains technology licensed from Silicon Semiconductor Corporation.
4601ahvf
LT 0208 • PRINTED IN USA
LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
28
●
●
© LINEAR TECHNOLOGY CORPORATION 2008
(408) 432-1900 FAX: (408) 434-0507 www.linear.com
相关型号：
LTM4601EV#PBF
LTM4601/LTM4601-1 - 12A µModule (Power Module) Regulator with PLL, Output Tracking and Margining; Package: LGA; Pins: 118; Temperature Range: -40°C to 85°C
Linear
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