LTM4643 [Linear]
Ultrathin Quad μModule Regulator with Configurable 3A Output Array;
| 型号： | LTM4643 |
| 厂家： | 
Linear |
| 描述： | Ultrathin Quad μModule Regulator with Configurable 3A Output Array |
| 文件： | 总32页 (文件大小：567K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LTM4643
Ultrathin Quad µModule
Regulator with Configurable
3A Output Array
FEATURES
DESCRIPTION
Quad Output Step-Down µModule® Regulator with
The LTM®4643 is a quad DC/DC step-down µModule
(powermodule)regulatorwith3Aperoutput. Outputscan
be paralleled in an array for up to ±2A capability. Included
in the package are the switching controllers, power FETs,
inductors and support components. Operating over an
input voltage range of 4V to 20V or 2.375V to 20V with
an external bias supply, the LTM4643 supports an output
voltage range of 0.6V to 3.3V each set by a single external
resistor. Its high efficiency design delivers 3A continuous
output current per channel. Only bulk input and output
capacitors are needed.
n
3A per Output
n
Wide Input Voltage Range: 4V to 20V
n
2.375V to 20V with External Bias
n
0.6V to 3.3V Output Voltage
n
3A DC Output Current Each Channel
n
±±.5ꢀ Total Output Voltage Regulation
n
Current Mode Control, Fast Transient Response
n
Parallelable for Higher Output Current
n
Output Voltage Tracking
n
Internal Temperature Sensing Diode Output
n
External Frequency Synchronization
Fault protection features include overvoltage, overcurrent
and overtemperature protection. The LTM4643 is offered
in a 9mm ×±5mm × ±.82mm LGA and 9mm × ±5mm ×
2.42mmBGApackageswithSnPb(BGA)orRoHScompli-
ant terminal finish.
n
Overvoltage, Current and Temperature Protection
n
9mm × ±5mm × ±.82mm LGA and 9mm × ±5mm ×
2.42mm BGA Packages
APPLICATIONS
Configurable Output Array*
n
FPGAs, GPUs and ASICs Applications
PCIe and Backside PCB Mounting
3A
6A
n
3A
3A
3A
9A
3A
±2A
3A
3A
L, LT, LTC, LTM, Linear Technology, the Linear logo, µModule, LTpowerCAD and PolyPhase
are registered trademarks of Analog Devices, Inc. All other trademarks are the property of their
respective owners.
* Note 4
TYPICAL APPLICATION
4V to 20V Input, Quad 0.9V, 1V, 1.2V and
1.5V Output DC/DC µModule Regulator
1.5V Output Efficiency and
Power Loss (Each Channel)
CLKIN
CLKOUT
95
90
85
80
75
70
65
60
55
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
V
IN1
V
4V to 20V
1.5V/3A
OUT1
FB1
PGOOD1
22µF
×2
SVIN1
RUN1
47µF
4V
40.2k
60.4k
25V
LTM4643
V
V
1.2V/3A
IN2
OUT2
FB2
SVIN2
RUN2
47µF
4V
PGOOD2
V
IN3
V
1V/3A
OUT3
SVIN3
RUN3
FB3
PGOOD3
47µF
4V
90.9k
121k
V
V
= 5V
= 12V
IN
IN
V
IN4
V
0.9V/3A
OUT4
FB4
PGOOD4
SVIN4
RUN4
47µF
4V
0
0.5
1
1.5
2
2.5
3
LOAD CURRENT (A)
TEMP SGND GND
4643 TA01b
4643 TA01a
NOT ALL PINS
ARE SHOWN
4643fb
1
For more information www.linear.com/LTM4643
LTM4643
ABSOLUTE MAXIMUM RATINGS
PIN CONFIGURATION
(Note 1)
TOP VIEW
V , SV (Per Channel).............................. –0.3V to 22V
V
TRACK/SS1
IN
OUT
IN
IN1
1
2
3
4
5
6
7
V
(Per Channel) (Note 3) ............–0.3V to SV or 6V
IN
V
OUT1
GND
FB1
RUN (Per Channel)..................................... –0.3V to 22V
A
B
C
D
E
F
SV
IN1
GND
MODE1
INTV (Per Channel) ............................... –0.3V to 3.6V
CC
COMP1
CLKIN
FB2
RUN1
PGOOD, MODE, TRACK/SS,
PGOOD2 PGOOD1 INTV
CC1
V
V
V
OUT2
TRACK/SS2
FB (Per Channel)...................................–0.3V to INTV
CLKOUT (Note 3), CLKIN.......................–0.3V to INTV
Internal Operating Temperature Range
(Notes 2, 5)............................................ –40°C to ±25°C
Storage Temperature Range .................. –55°C to ±25°C
Peak Solder Reflow Body Temperature.................260°C
CC
CC
SV
IN2
GND
MODE2
COMP2
SGND
V
RUN2
IN2
PGOOD3 TEMP INTV
CC2
OUT3
GND
TRACK/SS3
G
H
J
FB3
SV
IN3
MODE3
COMP3
FB4
V
IN3
INTV
RUN3
CC3
PGOOD4 CLKOUT
OUT4
GND
TRACK/SS4
RUN4
K
L
INTV
CC4
COMP4
V
SV
MODE4
IN4
IN4
LGA PACKAGE (WEIGHT = 0.70g)
77-LEAD (9mm × 15mm × 1.82mm)
BGA PACKAGE (WEIGHT = 0.83g)
77-LEAD (9mm × 15mm × 2.42mm)
T
= ±25°C, θ
= ±7°C/W, θ
BA JA
= 2.75°C/W,
JMAX
JCtop
JCbottom
θ
+ θ = ±±°C/W, θ = ±0°C/W
JB
θ VALUES PER JESD 5±-±2
http://www.linear.com/product/LTM4643#orderinfo
ORDER INFORMATION
PART MARKING*
PACKAGE
MSL
RATING
TEMPERATURE RANGE
(SEE NOTE 2)
PART NUMBER
LTM4643EV#PBF
LTM4643IV#PBF
LTM4643MPV#PBF
LTM4643EY#PBF
LTM4643IY#PBF
LTM4643MPY#PBF
LTM4643IY
PAD OR BALL FINISH
Au (RoHS)
DEVICE
FINISH CODE
TYPE
LGA
LGA
LGA
BGA
BGA
BGA
BGA
BGA
LTM4643V
LTM4643V
LTM4643V
LTM4643Y
LTM4643Y
LTM4643Y
LTM4643Y
LTM4643Y
e4
e4
e4
e±
e±
e±
e0
e0
3
3
3
3
3
3
3
3
–40°C to ±25°C
–40°C to ±25°C
–55°C to ±25°C
–40°C to ±25°C
–40°C to ±25°C
–55°C to ±25°C
–40°C to ±25°C
–55°C to ±25°C
Au (RoHS)
Au (RoHS)
SAC305 (RoHS)
SAC305 (RoHS)
SAC305 (RoHS)
SnPb (63/37)
SnPb (63/37)
LTM4643MPY
Consult Marketing for parts specified with wider operating temperature
ranges. *Device temperature grade is indicated by a label on the shipping
container. Pad or ball finish code is per IPC/JEDEC J-STD-609.
• Recommended LGA and BGA PCB Assembly and Manufacturing
Procedures:
www.linear.com/umodule/pcbassembly
• Package and Tray Drawings:
www.linear.com/packaging
• Terminal Finish Part Markings:
www.linear.com/leadfree
4643fb
2
For more information www.linear.com/LTM4643
LTM4643
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the specified internal
operating junction temperature range, otherwise specifications are at TA = 25°C (Note 2). VIN = 12V, per the typical application.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX UNITS
Switching Regulator Section: per Channel
l
l
V , SV
Input DC Voltage
SV = V
IN
4
20
V
V
IN
IN
IN
V
V
Output Voltage Range
0.6
3.3
OUT(RANGE)
OUT(DC)
Output Voltage, Total Variation
with Line and Load
C
= 22µF, C
= ±00µF Ceramic, R = 40.2k,
IN
OUT FB
l
MODE = INTV ,V = 4V to 20V, I
= 0A to 3A (Note 4)
±.477
±.±
±.50 ±.523
V
V
CC IN
OUT
V
RUN
RUN Pin On Threshold
V
Rising
RUN
±.2
±.3
I
Input Supply Bias Current
V
V
= ±2V, V
= ±2V, V
= ±.5V, MODE = INTV
= ±.5V, MODE = GND
6
2
±±
mA
mA
µA
Q(SVIN)
IN
IN
OUT
OUT
CC
Shutdown, RUN = 0, V = ±2V
IN
I
I
Input Supply Current
V
V
V
V
= ±2V, V
= ±2V, V
= ±.5V, I = 3A
OUT
0.45
A
A
S(VIN)
IN
OUT
OUT
Output Continuous Current Range
Line Regulation Accuracy
Load Regulation Accuracy
Output Ripple Voltage
= ±.5V (Note 4)
0
3
OUT(DC)
IN
l
l
ΔV
ΔV
(Line)/V
= ±.5V, V = 4V to 20V, I = 0A
OUT
0.0±
0.5
5
0.05
±.0
ꢀ/V
ꢀ
OUT
OUT
OUT
OUT
OUT
OUT
IN
(Load)/V
= ±.5V, I
= 0A to 3A
OUT
OUT
V
I
V
= 0A, C
= ±.5V
= ±00µF Ceramic, V = ±2V,
mV
OUT(AC)
OUT
IN
OUT
ΔV
Turn-On Overshoot
Turn-On Time
I
= 0A, C
= ±.5V
= ±00µF Ceramic, V = ±2V,
30
2.5
±60
40
5
mV
ms
mV
µs
OUT(START)
OUT
OUT
OUT
IN
V
t
C
V
= ±00µF Ceramic, No Load, TRACK/SS = 0.0±µF,
= ±.5V
START
OUT
= ±2V, V
IN
OUT
ΔV
OUTLS
Peak Deviation for Dynamic Load Load: 0ꢀ to 50ꢀ to 0ꢀ of Full Load, C
= 47µF
OUT
Ceramic, V = ±2V, V
= ±.5V
IN
OUT
t
Settling Time for Dynamic Load
Step
Load: 0ꢀ to 50ꢀ to 0ꢀ of Full Load, C
Ceramic, V = ±2V, V = ±.5V
= 47µF
SETTLE
OUT
IN
OUT
I
Output Current Limit
Voltage at FB Pin
Current at FB Pin
V
= ±2V, V
= ±.5V
3.5
A
V
OUTPK
IN
OUT
OUT
l
V
FB
I
= 0A, V
= ±.5V, –40°C to ±25°C
0.593
0.60 0.607
±30
OUT
I
FB
(Note 3)
nA
kΩ
R
FBHI
Resistor Between V
Pins
and FB
OUT
60.05 60.40 60.75
I
Track Pin Soft-Start Pull-Up
Current
TRACK/SS = 0V
2.5
4
µA
TRACK/SS
V
V
Undervoltage Lockout
V
IN
V
IN
Falling
Hysteresis
2.4
2.6
350
2.8
V
mV
IN(UVLO)
IN
t
t
Minimum On-Time
Minimum Off-Time
PGOOD Trip Level
(Note 3)
(Note 3)
40
70
ns
ns
ON(MIN)
OFF(MIN)
V
V
With Respect to Set Output
Ramping Negative
Ramping Positive
PGOOD
FB
V
V
–±3
7
–±0
±0
–7
±3
ꢀ
ꢀ
FB
FB
I
PGOOD Leakage
2
µA
V
PGOOD
V
V
V
PGOOD Voltage Low
I
= ±mA
PGOOD
0.02
3.3
0.5
±.2
0.7
0.±
3.4
PGL
Internal V Voltage
SV = 4V to 20V
3.±
V
INTVCC
INTVCC
OSC
CC
IN
Load Reg INTV Load Regulation
I
= 0mA to 20mA
ꢀ
CC
CC
f
Oscillator Frequency
CLKIN Threshold
MHz
V
CLKIN
4643fb
3
For more information www.linear.com/LTM4643
LTM4643
ELECTRICAL CHARACTERISTICS
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
operating temperature range. Note that the maximum ambient temperature
consistent with these specifications is determined by specific operating
conditions in conjunction with board layout, the rated package thermal
resistance and other environmental factors.
Note 2: The LTM4643 is tested under pulsed load conditions such that
Note 3: ±00ꢀ tested at wafer level.
T ≈ T . The LTM4643E is guaranteed to meet performance specifications
J
A
Note 4: See output current derating curves for different V , V
and T .
A
IN OUT
over the 0°C to ±25°C internal operating temperature range. Specifications
over the full –40°C to ±25°C internal operating temperature range are
assured by design, characterization and correlation with statistical process
controls. The LTM4643I is guaranteed to meet specifications over the full
–40°C to ±25°C internal operating temperature range. The LTM4643MP
is guaranteed to meet specifications over the full –55°C to ±25°C internal
Note 5: This IC includes overtemperature protection that is intended
to protect the device during momentary overload conditions. Junction
temperature will exceed ±25°C when overtemperature protection is active.
Continuous operation above the specified maximum operating junction
temperature may impair device reliability.
TYPICAL PERFORMANCE CHARACTERISTICS
(Per Channel)
Efficiency vs Load Current from
5VIN (One Channel Operating)
Efficiency vs Load Current from
12VIN (One Channel Operating)
DCM Mode Efficiency from
1.5VOUT
100
95
90
85
80
75
70
65
60
95
90
85
80
75
70
65
60
55
100
90
80
70
60
50
40
30
20
10
0
3.3V
2.5V
1.8V
1.5V
1.2V
1.0V
3.3V
2.5V
1.8V
1.5V
1.2V
1.0V
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
5V
IN
IN
12V
0.001
0.01
0.1
1
10
0
0.5
2.5
3
0
0.5
2.5
3
1
1.5
2
1
1.5
2
LOAD CURRENT (A)
OUTPUT CURRENT (A)
OUTPUT CURRENT (A)
4643 G03
4643 G01
4643 G02
1.0V Output Transient Response
1.2V Output Transient Response
1.5V Output Transient Response
V
V
V
OUT
OUT
OUT
50mV/DIV
50mV/DIV
50mV/DIV
AC-COUPLED
AC-COUPLED
AC-COUPLED
LOAD STEP
1A/DIV
LOAD STEP
1A/DIV
LOAD STEP
1A/DIV
4643 G04
4643 G05
4643 G06
V
V
= 12V
20µs/DIV
V
V
= 12V
20µs/DIV
V
V
= 12V
20µs/DIV
IN
OUT
IN
OUT
IN
OUT
= 1.0V
= 1.2V
= 1.5V
OUTPUT CAPACITOR = 1 × 47µF CERAMIC CAP
LOAD STEP = 2A TO 3A WITH 1A/µS SLEW RATE
FEED FORWARD CAP = 100pF
OUTPUT CAPACITOR = 1 × 47µF CERAMIC CAP
LOAD STEP = 2A TO 3A WITH 1A/µS SLEW RATE
FEED FORWARD CAP = 100pF
OUTPUT CAPACITOR = 1 × 47µF CERAMIC CAP
LOAD STEP = 2A TO 3A WITH 1A/µS SLEW RATE
FEED FORWARD CAP = 100pF
4643fb
4
For more information www.linear.com/LTM4643
LTM4643
TYPICAL PERFORMANCE CHARACTERISTICS
1.8V Output Transient Response
2.5V Output Transient Response
3.3V Output Transient Response
V
V
OUT
V
OUT
OUT
50mV/DIV
50mV/DIV
50mV/DIV
AC-COUPLED
AC-COUPLED
AC-COUPLED
LOAD STEP
1A/DIV
LOAD STEP
1A/DIV
LOAD STEP
1A/DIV
4643 G07
4643 G08
4643 G09
V
V
= 12V
20µs/DIV
V
V
= 12V
20µs/DIV
V
V
= 12V
20µs/DIV
IN
OUT
IN
OUT
IN
OUT
= 1.8V
= 2.5V
= 3.3V
OUTPUT CAPACITOR = 1 × 47µF CERAMIC CAP
LOAD STEP = 2A TO 3A WITH 1A/µS SLEW RATE
FEED FORWARD CAP = 100pF
OUTPUT CAPACITOR = 1 × 47µF CERAMIC CAP
LOAD STEP = 2A TO 3A WITH 1A/µS SLEW RATE
FEED FORWARD CAP = 100pF
OUTPUT CAPACITOR = 1 × 47µF CERAMIC CAP
LOAD STEP = 2A TO 3A WITH 1A/µS SLEW RATE
FEED FORWARD CAP = 100pF
Short-Circuit with No Load
Applied
Start-Up with No Load Applied
Start-Up with 3A Load Applied
I
I
I
IN
0.5A/DIV
IN
IN
0.5A/DIV
0.5A/DIV
V
OUT
0.5V/DIV
V
V
OUT
0.5V/DIV
OUT
0.5V/DIV
4643 G10
4643 G11
4643 G12
V
V
= 12V
5ms/DIV
V
V
= 12V
5ms/DIV
V
V
= 12V
5ms/DIV
IN
OUT
IN
OUT
IN
OUT
= 1.5V
= 1.5V
= 1.5V
INPUT CAPACITOR = 1 × 22µF CERAMIC CAP
OUTPUT CAPACITOR = 1 × 47µF CERAMIC CAP
SOFT START = 0.1µF
INPUT CAPACITOR = 1 × 22µF CERAMIC CAP
OUTPUT CAPACITOR = 1 × 47µF CERAMIC CAP
SOFT START = 0.1µF
INPUT CAPACITOR = 1 × 22µF CERAMIC CAP
OUTPUT CAPACITOR = 1 × 47µF CERAMIC CAP
Short-Circuit with 3A Load
Applied
Short-Circuit with 3A Load
Applied
Output Ripple
I
I
IN
IN
0.5A/DIV
V
0.5A/DIV
OUT
5mV/DIV
AC-COUPLED
350kHz
V
V
OUT
OUT
0.5V/DIV
0.5V/DIV
BANDWIDTH
4643 G13
4643 G15
4643 G14
V
V
= 12V
20µs/DIV
V
V
= 12V
2µs/DIV
V
V
= 12V
20µs/DIV
IN
OUT
IN
OUT
IN
OUT
= 1.5V
= 1.5V
= 1.5V
INPUT CAPACITOR = 1 × 22µF CERAMIC CAP
OUTPUT CAPACITOR = 1 × 47µF CERAMIC CAP
OUTPUT CAPACITOR = 2 × 47µF CERAMIC CAP
INPUT CAPACITOR = 1 × 22µF CERAMIC CAP
OUTPUT CAPACITOR = 1 × 47µF CERAMIC CAP
4643fb
5
For more information www.linear.com/LTM4643
LTM4643
PIN FUNCTIONS
PACKAGE ROW AND COLUMN LABELING MAY VARY
SV , SV , SV , SV (B5, E5, H5, L5): Signal V .
IN1
IN2
IN
IN4
IN
AMONG µModule PRODUCTS. REVIEW EACH PACKAGE
LAYOUT CAREFULLY.
Filtered input voltage to the internal 3.3V regulator for
the control circuitry of each Switching mode Regulator
V
(A1, A2, A3), V
(C1, D1, D2), V
(F1,
Channel. Tie this pin to the V pin respectively in most
OUT1
OUT2
OUT3
IN
G1, G2), V
(J1, K1, K2): Power Output Pins of Each
applications. Connect SV to an external voltage supply
OUT4
IN
Switching Mode Regulator Channel. Apply output load
between these pins and GND pins. Recommend placing
outputdecouplingcapacitancedirectlybetweenthesepins
and GND pins. See the Applications Information section
for paralleling outputs.
of at least 4V which must also be greater than V
.
OUT
TRACK/SS1, TRACK/SS2, TRACK/SS3, TRACK/SS4 (A6,
D6, G6, K6): Output Tracking and Soft-Start Pin of Each
Switching Mode Regulator Channel. Allows the user to
control the rise time of the output voltage. Putting a volt-
age below 0.6V on this pin bypasses the internal reference
input to the error amplifier, instead it servos the FB pin
to match the TRACK voltage. Above 0.6V, the tracking
function stops and the internal reference resumes control
of the error amplifier. There’s an internal 2.5µA pull-up
GND (A4-A5, B1-B2, C5, D3-D5, E1-E2, F5, G3-G5,
H1-H2, J5, K3-K4, L1-L2): Power Ground Pins for Both
Input and Output Returns. Use large PCB copper areas to
connect all GND together.
V
(B3, B4), V (E3, E4), V (H3, H4), V (L3, L4):
IN2 IN3 IN4
IN1
current from INTV on this pin, so putting a capacitor
CC
Power input pins connect to the drain of the internal top
MOSFET for each switching mode regulator channel.
Apply input voltages between these pins and GND pins.
Recommendplacinginputdecouplingcapacitancedirectly
here provides soft-start function.
MODE1, MODE2, MODE3, MODE4 (B6, E6, H6, L6):
Operation Mode Select for Each Switching Mode Regula-
between each of V pins and GND pins.
tor Channel. Tie this pin to INTV to force continuous
IN
CC
synchronous operation at all output loads. Tying it to
SGND enables discontinuous current mode operation at
light loads. Do not leave floating.
PGOOD1, PGOOD2, PGOOD3, PGOOD4 (C3, C2, F2,
J2): Output Power Good with Open-Drain Logic of Each
Switching Mode Regulator Channel. PGOOD is pulled to
ground when the voltage on the FB pin is not within ±±0ꢀ
of the internal 0.6V reference.
RUN1, RUN2, RUN3, RUN4(C6, F6, J6, K7):RunControl
Input of Each Switching Mode Regulator Channel. Enable
regulator operation by tying the specific RUN pin above
±.2V. Pulling it below ±.±V shuts down the respective
regulator channel. Do not leave floating.
CLKOUT (J3): Output Clock Signal for PolyPhase® Opera-
tion of the Module. The phase of CLKOUT with respect to
CLKIN is set to ±80°. CLKOUT’s peak-to-peak amplitude
is INTV to GND. See the Application Information section
FB1, FB2, FB3, FB4 (A7, D7, G7, J7): The Negative Input
CC
for details. Strictly output; do not drive this pin.
of the Error Amplifier for Each Switching Mode Regulator
Channel. Internally, this pin is connected to V
of each
OUT
INTV , INTV , INTV , INTV (C4, F4, J4, K5):
CC4
CC1
CC2
CC3
channel with a 60.4kΩ precision resistor. Different output
voltages can be programmed with an additional resistor
between the FB and GND pins. In PolyPhase operation,
tying the FB pins together allows for parallel operation.
See the Applications Information section for details.
Internal 3.3V Regulator Output of Each Switching Mode
Regulator Channel. The internal power drivers and con-
trol circuits are powered from this voltage. Each pin is
internally decoupled to GND with ±µF low ESR ceramic
capacitor already.
4643fb
6
For more information www.linear.com/LTM4643
LTM4643
PIN FUNCTIONS
COMP1, COMP2, COMP3, COMP4 (B7, E7, H7, L7): Cur-
rent Control Threshold and Error Amplifier Compensation
Point of Each Switching Mode Regulator Channel. The
internal current comparator threshold is proportional to
thisvoltage. TietheCOMPpinstogetherforparallelopera-
tion. The device is internally compensated.
SGND(F7):SignalGroundConnection.SGNDisconnected
to GND internally through single point. Use a separated
SGND ground copper area for the ground of the feedback
resistor and other components connected to signal pins.
A second connection between the PGND plane and SGND
plane is recommended on the backside of the PCB under-
neath the module.
CLKIN (C7): External Synchronization Input to Phase
Detector of the Module. This pin is internally terminated
to SGND with 20kΩ. The phase-locked loop will force
the channel ± turn-on signal to be synchronized with the
rising edge of the CLKIN signal. Channel 2, channel 3 and
channel 4 will also be synchronized with the rising edge of
the CLKIN signal with a pre-determined phase shift. See
the Applications Information section for details.
TEMP (F3): Onboard Temperature Diode for Monitoring
the VBE Junction Voltage Change with Temperature. See
the Applications Information section.
4643fb
7
For more information www.linear.com/LTM4643
LTM4643
BLOCK DIAGRAM
CLKIN
V
OUT1
100k
100k
100k
100k
PGOOD1
INTV
CC1
60.4k
SV
V
IN1
IN1
FB1
V
INTV
CC1
IN
60.4k
4V TO 20V
0.22µF
1µF
10µF
47µF
1µF
1µH
MODE1
V
1.2V
3A
OUT1
V
OUT1
GND
POWER CONTROL
CLKOUT
TRACK/SS1
RUN1
0.1µF
COMP1
INTERNAL
COMP
SGND
GND
INTERNAL
FILTER
FREQ1
V
OUT2
133k
PGOOD2
INTV
CC2
60.4k
SV
V
IN2
IN2
FB2
INTV
CC2
V
IN
40.2k
0.22µF
1µF
10µF
47µF
1µF
CLKIN
1µH
MODE2
V
1.5V
3A
OUT2
V
OUT2
GND
POWER CONTROL
TRACK/SS2
RUN2
0.1µF
COMP2
CLKOUT
INTERNAL
COMP
INTERNAL
FILTER
FREQ2
V
OUT3
133k
PGOOD3
INTV
CC3
60.4k
SV
V
IN3
IN3
FB3
INTV
CC3
V
IN
30.1k
0.22µF
1µF
10µF
47µF
1µF
CLKIN
1µH
MODE3
TRACK/SS3
RUN3
V
1.8V
3A
OUT3
V
OUT3
GND
POWER CONTROL
0.1µF
COMP3
CLKOUT
INTERNAL
COMP
INTERNAL
FILTER
FREQ3
V
OUT4
133k
PGOOD4
INTV
CC4
60.4k
SV
V
IN4
IN4
FB4
INTV
CC4
V
IN
90.9k
0.22µF
1µF
10µF
47µF
1µF
CLKIN
1µH
MODE4
V
1V
3A
OUT4
V
OUT4
GND
POWER CONTROL
TRACK/SS4
RUN4
0.1µF
COMP4
CLKOUT
INTERNAL
COMP
INTERNAL
FILTER
TEMP
FREQ4
133k
CLKOUT
4643 BD
4643fb
8
For more information www.linear.com/LTM4643
LTM4643
DECOUPLING REQUIREMENTS (per Channel)
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
C
External Input Capacitor Requirement
I
= 3A
= 3A
4.7
±0
µF
IN
OUT
(V = 4V to 20V, V
= ±.5V)
IN
OUT
C
External Output Capacitor Requirement
(V = 4V to 20V, V = ±.5V)
I
22
47
µF
OUT
OUT
IN
OUT
OPERATION
The LTM4643 is a quad output standalone non-isolated
switch mode DC/DC power supply in 9mm × ±5mm
× ±.82mm ultrathin package. It has four separate regula-
tor channels with each of them capable of delivering up
to 3A continuous output current with few external input
and output capacitors. Each regulator provides precisely
regulated output voltage programmable from 0.6V to
3.3V via a single external resistor over 4V to 20V input
voltage range. With an external bias voltage, this module
can operate from an input voltage as low as 2.375V. The
typical application schematic is shown in Figure 29.
for 2+2, 3+± or 4 channels parallel operation providing
more design flexibility for multirail POL applications. Fur-
thermore, the LTM4643 has CLKIN and CLKOUT pins for
frequencysynchronizationorpolyphasingmultipledevices
whichallowupto8phasescascadedtorunsimultaneously.
Current mode control also provides cycle-by-cycle fast
current monitoring. Foldback current limiting is provided
in an overcurrent condition to reduce the inductor valley
current to approximately 40ꢀ of the original value when
V
drops. An internal overvoltage and undervoltage
FB
comparators pull the open-drain PGOOD output low if
the output feedback voltage exits a ±±0ꢀ window around
the regulation point. Continuous conduction mode (CCM)
operation is forced during OV and UV conditions except
duringstart-upwhentheTRACKpinisrampingupto0.6V.
TheLTM4643integratesfourseparateconstantfrequency
controlled on-time valley current mode regulators, power
MOSFETs, inductors, and other supporting discrete com-
ponents. Thetypicalswitchingfrequencyissetto±.2MHz.
For switching noise-sensitive applications, the µModule
regulator can be externally synchronized to a clock from
850kHz to ±.5MHz. See the Applications Information
section.
Pulling the RUN pin below ±.±V forces the controller into
its shutdown state, turning off both power MOSFETs and
most of the internal control circuitry. At light load cur-
rents, discontinuous conduction mode (DCM) operation
can be enabled to achieve higher efficiency compared to
continuous conduction mode (CCM) by setting the MODE
pin to SGND. The TRACK/SS pin is used for power supply
trackingandsoft-startprogramming.SeetheApplications
Information section.
With current mode control and internal feedback loop
compensation, the LTM4643 module has sufficient stabil-
ity margins and good transient performance with a wide
range of output capacitors, even with all ceramic output
capacitors.
Current mode control provides the flexibility of paralleling
any of the separate regulator channels with accurate cur-
rent sharing. With a built-in clock interleaving between
regulatorchannels, theLTM4643caneasilybeconfigured
Atemperaturediodeisincludedinsidethemoduletomoni-
tor the temperature of the module. See the Applications
Information section for details.
4643fb
9
For more information www.linear.com/LTM4643
LTM4643
APPLICATIONS INFORMATION
The typical LTM4643 application circuit is shown in
Figure 29. External component selection is primarily
determined by the input voltage, the output voltage and
the maximum load current. Refer to Table 6 for specific
externalcapacitorrequirementsforaparticularapplication.
the FB and COMP pins together for each paralleled output
with a single resistor to GND as determined by:
60.4k
N
RFB
=
VOUT
– 1
V to V
Step-Down Ratios
IN
OUT
0.6
There are restrictions in the maximum V and V
step-
IN
OUT
down ratio that can be achieved for a given input voltage
due to the minimum off-time and minimum on-time limits
of each regulator. The minimum off-time limit imposes a
maximum duty cycle which can be calculated as:
Input Decoupling Capacitors
The LTM4643 module should be connected to a low AC-
impedance DC source. For each regulator channel, a ±0µF
input ceramic capacitor is recommended for RMS ripple
current decoupling. A bulk input capacitor is only needed
whentheinputsourceimpedanceiscompromisedbylong
inductive leads, traces or not enough source capacitance.
Thebulkcapacitorcanbeanelectrolyticaluminumcapaci-
tor or polymer capacitor.
D
= ± – t
• f
MAX
OFF(MIN) SW
where t
is the minimum off-time, 70ns typical for
SW
OFF(MIN)
LTM4643, and f is the switching frequency. Conversely
theminimumon-timelimitimposesaminimumdutycycle
of the converter which can be calculated as:
Without considering the inductor ripple current, the RMS
current of the input capacitor can be estimated as:
IOUT(MAX)
D
= t
• f
ON(MIN) SW
MIN
where t
is the minimum on-time, 40ns typical for
ON(MIN)
LTM4643. In the rare cases where the minimum duty
cycle is surpassed, the output voltage will still remain
in regulation, but the switching frequency will decrease
from its programmed value. Note that additional thermal
derating may be applied. See the Thermal Considerations
and Output Current Derating section in this data sheet.
ICIN(RMS)
=
• D•(±−D)
ηꢀ
whereηꢀistheestimatedefficiencyofthepowermodule.
Output Decoupling Capacitors
Withanoptimizedhighfrequency, highbandwidthdesign,
only single piece of low ESR output ceramic capacitor is
required for each regulator channel to achieve low output
voltagerippleandverygoodtransientresponse.Additional
output filtering may be required by the system designer,
if further reduction of output ripples or dynamic transient
spikesisrequired.Table6providesareferencematrixshow-
ingtransientperformancefordifferentoutputcapacitorcon-
figurations.Multiphaseoperationwillreduceeffectiveout-
putrippleasafunctionofthenumberofphases.Application
Note77discussesthisnoisereductionversusoutputripple
current cancellation, but the output capacitance will be
more a function of stability and transient response. The
LTpowerCAD® Design Tool is available to download online
for output ripple, stability and transient response analysis
and calculating the output ripple reduction as the number
of phases implemented increases by N times.
Output Voltage Programming
ThePWMcontrollerhasaninternal0.6Vreferencevoltage.
As shown in the Block Diagram, a 60.4k internal feedback
resistor connects each regulator channel from V
pin to
OUT
FBpin.AddingaresistorR fromFBpintoGNDprograms
FB
the output voltage:
60.4k
RFB
=
VOUT
0.6
−±
Table 1. VFB Resistor Table vs Various Output Voltages
V
(V)
0.6
1.0
1.2
1.5
1.8
2.5
3.3
OUT
R
FB
(k)
Open
90.9
60.4
40.2
30.±
±9.±
±3.3
For parallel operation of N channels, use the following
equation can be used to solve for R . Tie the V
and
FB
OUT
4643fb
10
For more information www.linear.com/LTM4643
LTM4643
APPLICATIONS INFORMATION
Discontinuous Conduction Mode (DCM)
The maximum 2A peak-to-peak inductor ripple current
is enforced due to the nature of the valley current mode
control to maintain output voltage regulation at no load.
Inapplicationswherelowoutputrippleandhighefficiency
at intermediate current are desired, discontinuous con-
duction mode (DCM) should be used by connecting the
MODE pin to SGND. At light loads the internal current
comparator may remain tripped for several cycles and
force the top MOSFET to stay off for several cycles, thus
skipping cycles. The inductor current does not reverse
in this mode.
Frequency Synchronization and Clock In
The power module has a phase-locked loop comprised
of an internal voltage controlled oscillator and a phase
detector. This allows all internal top MOSFET turn-on to
be locked to the rising edge of the same external clock.
The external clock frequency range must be within ±30ꢀ
aroundthe±.2MHzsetfrequency. Apulsedetectioncircuit
is used to detect a clock on the CLKIN pin to turn on the
phase-locked loop. The pulse width of the clock has to
be at least ±00ns. The clock high level must be above 2V
and clock low level below 0.3V. During the start-up of
the regulator, the phase-locked loop function is disabled.
Force Continuous Conduction Mode (CCM)
In applications where fixed frequency operation is more
critical than low current efficiency, and where the lowest
output ripple is desired, forced continuous conduction
modeoperationshouldbeused.Forcedcontinuousopera-
tion can be enabled by tying the MODE pin to INTV . In
CC
this mode, inductor current is allowed to reverse during
low output loads, the COMP voltage is in control of the
current comparator threshold throughout, and the top
MOSFETalwaysturnsonwitheachoscillatorpulse.During
start-up, forcedcontinuousmodeisdisabledandinductor
current is prevented from reversing until the LTM4643’s
output voltage is in regulation.
Multichannel Parallel Operation
For loads that demand more than 3A of output current,
the LTM4643 multiple regulator channels can be easily
paralleled to provide more output current without increas-
ing input and output voltage ripples. The LTM4643 has
preset built-in phase shift between each two of the four
regulator channels which is suitable to employ a 2+2, 3+±
or 4 channels parallel operation. Table 2 gives the phase
difference between regulator channels.
Operating Frequency
The operating frequency of the LTM4643 is optimized to
achievethecompactpackagesizeandtheminimumoutput
ripplevoltagewhilestillkeepinghighefficiency.Thedefault
operating frequency is internally set to ±.2MHz. In most
applications,noadditionalfrequencyadjustingisrequired.
Table 2. Phase Difference Between Regulator Channels
CHANNEL
CH1
CH2
CH3
CH4
Phase Difference
±80°
90°
±80°
Figure ± shows a 2+2 and a 4-channels parallel concept
schematic for clock phasing.
If any operating frequency other than ±.2MHz is required
by application, the µModule regulator can be externally
synchronized to a clock from 850kHz to ±.5MHz.
A multiphase power supply significantly reduces the
amount of ripple current in both the input and output ca-
pacitors. The RMS input ripple current is reduced by, and
the effective ripple frequency is multiplied by, the number
of phases used (assuming that the input voltage is greater
thanthenumberofphasesusedtimestheoutputvoltage).
Theoutputrippleamplitudeisalsoreducedbythenumber
of phases used when all of the outputs are tied together
to achieve a single high output current design.
Please note, a minimum switching frequency is required
for given V , V
operating conditions to keep a maxi-
IN OUT
mum peak-to-peak inductor ripple current below 2A for
the LTM4643. The peak-to-peak inductor ripple current
can be calculated as:
VOUT
FS(MHz)
V – V
IN
OUT
ΔIPK−PK
=
•
VOUT
4643fb
11
For more information www.linear.com/LTM4643
LTM4643
APPLICATIONS INFORMATION
The LTM4643 device is an inherently current mode con-
trolled device, so parallel modules will have very good
current sharing. This will balance the thermals on the
design. Please tie the RUN, TRACK/SS, FB and COMP
pins of each paralleling channel together. Figure 3± and
Figure 32 show an example of parallel operation and pin
connection.
180°
180°
CH1
(0°)
CH2
(180°)
CH3
(0°)
CH4
(180°)
V
V
V
OUT3
V
OUT4
OUT1
OUT2
Input RMS Ripple Current Cancellation
LTM4643
Application Note 77 provides a detailed explanation of
multiphase operation. The input RMS ripple current can-
cellation mathematical derivations are presented, and a
graph is displayed representing the RMS ripple current
reductionasafunctionofthenumberofinterleavedphases.
Figure 2 shows this graph.
6A
6A
180°
90°
180°
CH1
(0°)
CH2
(180°)
CH3
(270°)
CH4
(90°)
Soft-Start and Output Voltage Tracking
The TRACK/SS pin provides a means to either soft-start
of each regulator channel or track it to a different power
supply. A capacitor on the TRACK/SS pin will program the
ramp rate of the output voltage. An internal 2.5µA current
source will charge up the external soft-start capacitor
V
V
V
V
OUT4
OUT1
OUT2
OUT3
LTM4643
12A
4643 F01
Figure 1. 2+2 and 4 Channels Parallel Concept Schematic
0.60
1-PHASE
2-PHASE
4-PHASE
0.55
0.50
0.45
0.40
0.35
0.30
0.25
0.20
0.15
0.10
0.05
0
0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45 0.5 0.55 0.6 0.65 0.7 0.75 0.8 0.85 0.9
DUTY CYCLE (V /V
)
OUT IN
4643 F02
Figure 2. Normalized RMS Ripple Current for Single Phase or Polyphase Applications
4643fb
12
For more information www.linear.com/LTM4643
LTM4643
APPLICATIONS INFORMATION
towards the INTV voltage. When the TRACK/SS voltage
CC
V
V
V
V
= 3.3V
= 2.5V
= 1.8V
= 1.2V
OUT1
OUT2
OUT3
OUT4
is below 0.6V, it will take over the internal 0.6V reference
voltage to control the output voltage. The total soft-start
time can be calculated as:
CSS
tSS = 0.6 •
2.5µA
where C is the capacitance on the TRACK/SS pin. Cur-
SS
rent foldback and forced continuous mode are disabled
during the soft-start process.
4643 F03
TIME
Outputvoltagetrackingcanalsobeprogrammedexternally
using the TRACK/SS pin of each regulator channel. The
output can be tracked up and down with another regula-
tor. Figure 3 and Figure 4 show an example waveform
and schematic of a ratiometric tracking where the slave
Figure 3. Output Ratiometric Tracking Waveform
voltage when TRACK/SS voltage is below 0.6V, the slave
outputvoltageandthemasteroutputvoltageshouldsatisfy
the following equation during the start-up.
regulator’s (V
, V
and V
) output slew rate is
RFB(SL)
OUT2 OUT3
OUT4
VOUT(SL)
•
proportional to the master’s (V
).
OUT±
R
FB(SL) + 60.4k
Since the slave regulator’s TRACK/SS is connected to
the master’s output through a R /R resistor
RTR(BOT)
= VOUT(MA)
•
TR(TOP) TR(BOT)
divider and its voltage used to regulate the slave output
R
TR(TOP) +RTR(BOT)
V
IN
5V TO 20V
CH1
CH2
CH3
CH4
4643 F04
C
SS
R
R
R
FB4
60.4k
FB2
FB3
0.1µF
19.1k
30.1k
R
FB1
13.3k
R
R
TR2(TOP)
60.4k
TR2(BOT)
13.3k
R
R
R
TR3(TOP)
60.4k
TR3(BOT)
13.3k
R
TR4(TOP)
60.4k
TR4(BOT)
13.3k
Figure 4. Output Ratiometric Tracking Schematic
4643fb
13
For more information www.linear.com/LTM4643
LTM4643
APPLICATIONS INFORMATION
The R
TR(BOT)
is the feedback resistor and the R
/
From the equation we could easily find out that, in the
coincident tracking, the slave regulator’s TRACK/SS pin
resistor divider is always the same as its output voltage
divider.
FB(SL)
TR(TOP)
R
is the resistor divider on the TRACK/SS pin of
the slave regulator, as shown in Figure 4.
Following the upper equation, the master’s output slew
rate (MR) and the slave’s output slew rate (SR) in volts/
time is determined by:
RFB(SL)
RTR(BOT)
=
R
FB(SL) + 60.4k
R
TR(TOP) +RTR(BOT)
RFB(SL)
FB(SL) + 60.4k
RTR(BOT)
TR(TOP) +RTR(BOT)
For example, R
= 60.4k and R
= 60.4k is
TR4(BOT)
TR4(TOP)
R
MR
SR
=
a good combination for coincident tracking for V
OUT(MA)
= 3.3V and V
= ±.2V application.
OUT(SL)
R
Power Good
Forexample, V =3.3V, MR=3.3V/msandV
OUT(MA)
= ±.2V, SR = ±.2V/ms as V
OUT(SL)
shown in
The PGOOD pins are open drain pins that can be used
to monitor each valid output voltage regulation. This pin
monitors a ±±0ꢀ window around the regulation point. A
resistor can be pulled up to a particular supply voltage for
monitoring. To prevent unwanted PGOOD glitches dur-
and V
OUT±
OUT4
Figure 4. From the equation, we could solve out that
R
= 60.4k and R
= ±3.3k is a good com-
TR4(TOP)
TR4(BOT)
bination. Follow the same equation, we can get the same
/R resistor divider value for V and
R
OUT3
TR(TOP) TR(BOT)
OUT2
ing transients or dynamic V
changes, the LTM4643’s
OUT
V
.
PGOOD falling edge includes a blanking delay of approxi-
The TRACK pins will have the 2.5µA current source on
when a resistive divider is used to implement tracking on
that specific channel. This will impose an offset on the
TRACK pin input. Smaller value resistors with the same
ratios as the resistor values calculated from the above
equation can be used. For example, where the 60.4k is
used then a 6.04k can be used to reduce the TRACK pin
offset to a negligible value.
mately 52 switching cycles.
Stability Compensation
The LTM4643 module internal compensation loop of each
regulator channel is designed and optimized for low ESR
ceramic output capacitors only application. Table 6 is
provided for most application requirements. An optional
±00pF phase boost capacitor could help to boost up the
phase margin in all ceramic output capacitors application.
The LTpowerCAD Design Tool is available to download for
control loop optimization.
The coincident output tracking can be recognized as a
special ratiometric output tracking which the master’s
output slew rate (MR) is the same as the slave’s output
slew rate (SR), as waveform shown in Figure 5.
RUN Enable
V
V
V
V
= 3.3V
= 2.5V
= 1.8V
= 1.2V
OUT1
OUT2
OUT3
OUT4
Pulling the RUN pin of each regulator channel to ground
forcestheregulatorintoitsshutdownstate,turningoffboth
power MOSFETs and most of its internal control circuitry.
Bringing the RUN pin above 0.7V turns on the internal
reference only, while still keeping the power MOSFETs
off. Further increasing the RUN pin voltage above ±.2V
will turn on the entire regulator channel.
4643 F05
TIME
Figure 5. Output Coincident Tracking Waveform
4643fb
14
For more information www.linear.com/LTM4643
LTM4643
APPLICATIONS INFORMATION
Pre-Biased Output Start-Up
Temperature Monitoring
There may be situations that require the power supply to
start up with some charge on the output capacitors. The
LTM4643 can safely power up into a pre-biased output
without discharging it.
A diode connected PNP transistor is used for the TEMP
monitor function by monitoring its voltage over tempera-
ture. The temperature dependence of this diode voltage
can be understood in the equation:
TheLTM4643accomplishesthisbyforcingdiscontinuous
mode (DCM) operation until the TRACK/SS pin voltage
reaches 0.6V reference voltage. This will prevent the BG
from turning on during the pre-biased output start-up
which would discharge the output.
ID
IS
VD = nVT ln
where V is the thermal voltage (kT/q), and n, the ideality
T
factor, is ± for the diode connected PNP transistor be-
ing used in the LTM4643. I is expressed by the typical
Do not pre-bias LTM4643 with an output voltage higher
S
empirical equation:
than INTV (3.3V).
CC
–VG0
VT
Overtemperature Protection
IS =I0 exp
Theinternalovertemperatureprotectionmonitorsthejunc-
tiontemperatureofthemodule.Ifthejunctiontemperature
reachesapproximately±60°C,bothpowerswitcheswillbe
turned off until the temperature drops about ±5°C cooler.
where I is a process and geometry dependent current, (I
0
0
S
is typically around 20k orders of magnitude larger than I
at room temperature) and V is the band gap voltage of
G0
±.2V extrapolated to absolute zero or –273°C.
Low Input Application
If we take the I equation and substitute into the V equa-
tion, then we get:
S
D
The LTM4643 module has a separate SV pin for each
IN
regulator channel which makes it compatible with opera-
kT
q
I0
ID
kT
q
tion from an input voltage as low as 2.375V. The SV pin
IN
VD = VG0
–
ln
, VT =
is the signal input of the regulator control circuitry while
the V pin is the power input which directly connected
IN
to the drain of the top MOSFET. In most application with
The expression shows that the diode voltage decreases
input voltage ranges from 4V to 20V, connect the SV
(linearly if I were constant) with increasing temperature
IN
0
pin directly to the V pin of each regulator channel. An
and constant diode current. Figure 6 shows a plot of V
IN
D
optionalfilter,consistingofaresistor(±Ωto±0Ω)between
SV and V ground, can be placed for additional noise
vs Temperature over the operating temperature range of
the LTM4643.
IN
IN
immunity. This filter is not necessary in most cases if
good PCB layout practices are followed (see Figure 28).
In a low input voltage (2.375V to 4V) application, or to
reducepowerdissipationbytheinternalbiasLDO,connect
If we take this equation and differentiate it with respect to
temperature T, then:
dVD
dT
VG0 – VD
T
= –
SV to an external voltage higher than 4V with a 0.±µF
IN
local bypass capacitor. Figure 30 shows an example of a
This dV /dT term is the temperature coefficient equal to
D
low input voltage application. Please note, SV voltage
IN
about –2mV/K or –2mV/°C. The equation is simplified for
the first order derivation.
cannot go below V
voltage.
OUT
Solving for T, T = –(V – V )/(dV /dT) provides the
G0
D
D
temperature.
4643fb
15
For more information www.linear.com/LTM4643
LTM4643
APPLICATIONS INFORMATION
±st Example: Figure 6 for 27°C, or 300K the diode
voltage is 0.598V, thus, 300K = –(±200mV – 598mV)/
–2.0 mV/K)
The motivation for providing these thermal coefficients in
foundinJESD5±-±2(“GuidelinesforReportingandUsing
Electronic Package Thermal Information”).
2nd Example: Figure 6 for 75°C, or 350K the diode
voltage is 0.50V, thus, 350K = –(±200mV – 500mV)/
–2.0mV/K)
Many designers may opt to use laboratory equipment
and a test vehicle such as the demo board to predict the
µModule regulator’s thermal performance in their appli-
cation at various electrical and environmental operating
conditions to compliment any FEA activities. Without FEA
software, the thermal resistances reported in the Pin Con-
figuration section are in-and-of themselves not relevant to
providing guidance of thermal performance; instead, the
derating curves provided in this data sheet can be used
in a manner that yields insight and guidance pertaining to
one’s application-usage, and can be adapted to correlate
thermal performance to one’s own application.
Converting the Kelvin scale to Celsius is simply taking the
Kelvin temp and subtracting 273 from it.
A typical forward voltage is given in the electrical charac-
teristics section of the data sheet, and Figure 6 is the plot
of this forward voltage. Measure this forward voltage at
27°C to establish a reference point. Then using the above
expression while measuring the forward voltage over
temperature will provide a general temperature monitor.
Connect a resistor between TEMP and V to set the cur-
IN
The Pin Configuration section typically gives four thermal
coefficients explicitly defined in JESD 5±-±2; these coef-
ficients are quoted or paraphrased below:
rent to ±00µA. See Figure 3± for an example.
0.8
I
= 100µA
D
±. θ , the thermal resistance from junction to ambi-
JA
0.7
0.6
0.5
0.4
0.3
ent, is the natural convection junction-to-ambient
air thermal resistance measured in a one cubic foot
sealed enclosure. This environment is sometimes
referred to as “still air” although natural convection
causes the air to move. This value is determined with
the part mounted to a JESD 5±-9 defined test board,
which does not reflect an actual application or viable
operating condition.
–50 –25
0
25
50
75 100 125
2. θ
, the thermal resistance from junction to the
JCbottom
TEMPERATURE (°C)
4643 F06
bottom of the product case, is determined with all of
the component power dissipation flowing through the
bottom of the page. In the typical µModule regulator,
the bulk of the heat flows out the bottom of the pack-
age, but there is always heat flow out into the ambient
environment.Asaresult,thisthermalresistancevalue
may be useful for comparing packages but the test
conditionsdon’tgenerallymatchtheuser’sapplication.
Figure 6. Diode Voltage VD vs Temperature T(°C)
Thermal Considerations and Output Current Derating
The thermal resistances reported in the Pin Configura-
tion section of the data sheet are consistent with those
parameters defined by JESD 5±-±2 and are intended for
use with finite element analysis (FEA) software modeling
tools that leverage the outcome of thermal modeling,
simulation, and correlation to hardware evaluation per-
formed on a µModule package mounted to a hardware
test board: defined by JESD 5±-9 (“Test Boards for Area
Array Surface Mount Package Thermal Measurements”).
3. θ
, the thermal resistance from junction to top of
JCtop
the product case, is determined with nearly all of the
componentpowerdissipationflowingthroughthetop
of the package. As the electrical connections of the
typical µModule regulator are on the bottom of the
4643fb
16
For more information www.linear.com/LTM4643
LTM4643
APPLICATIONS INFORMATION
package, it is rare for an application to operate such
that most of the heat flows from the junction to the
loss is thermally dissipated in both directions away from
the package—granted, in the absence of a heat sink and
airflow, a majority of the heat flow is into the board.
top of the part. As in the case of θ
, this value
JCbottom
may be useful for comparing packages but the test
conditionsdon’tgenerallymatchtheuser’sapplication.
Within the LTM4643, be aware there are multiple power
devices and components dissipating power, with a con-
sequence that the thermal resistances relative to different
junctions of components or die are not exactly linear with
respect to total package power loss. To reconcile this
complication without sacrificing modeling simplicity—
but also, not ignoring practical realities—an approach
has been taken using FEA software modeling along with
laboratory testing in a controlled-environment chamber
to reasonably define and correlate the thermal resistance
valuessuppliedinthisdatasheet:(±)Initially,FEAsoftware
is used to accurately build the mechanical geometry of
the LTM4643 and the specified PCB with all of the cor-
rect material coefficients along with accurate power loss
source definitions; (2) this model simulates a software-
defined JEDEC environment consistent with JESD 5±-±2
to predict power loss heat flow and temperature readings
at different interfaces that enable the calculation of the
JEDEC-defined thermal resistance values; (3) the model
and FEA software is used to evaluate the LTM4643 with
heat sink and airflow; (4) having solved for and analyzed
these thermal resistance values and simulated various
operating conditions in the software model, a thorough
laboratory evaluation replicates the simulated conditions
with thermocouples within a controlled-environment
chamberwhileoperatingthedeviceatthesamepowerloss
4. θ ,thethermalresistancefromjunctiontotheprinted
JB
circuit board, is the junction-to-board thermal resis-
tance where almost all of the heat flows through the
bottom of the µModule regulator and into the board,
and is really the sum of the θ
and the thermal
JCbottom
resistance of the bottom of the part through the solder
joints and through a portion of the board. The board
temperature is measured a specified distance from
the package.
A graphical representation of the aforementioned ther-
mal resistances is given in Figure 7; blue resistances are
contained within the μModule regulator, whereas green
resistances are external to the µModule package.
As a practical matter, it should be clear to the reader that
no individual or sub-group of the four thermal resistance
parameters defined by JESD 5±-±2 or provided in the
Pin Configuration section replicates or conveys normal
operating conditions of a μModule regulator. For example,
in normal board-mounted applications, never does ±00ꢀ
of the device’s total power loss (heat) thermally conduct
exclusively through the top or exclusively through bot-
tom of the µModule package—as the standard defines
for θ
and θ , respectively. In practice, power
JCbottom
JCtop
JUNCTION-TO-AMBIENT THERMAL RESISTANCE COMPONENTS
JUNCTION-TO-CASE (TOP)
RESISTANCE
CASE (TOP)-TO-AMBIENT
RESISTANCE
JUNCTION-TO-BOARD RESISTANCE
JUNCTION
AMBIENT
JUNCTION-TO-CASE
(BOTTOM) RESISTANCE
CASE (BOTTOM)-TO-BOARD
RESISTANCE
BOARD-TO-AMBIENT
RESISTANCE
4643 F07
µMODULE DEVICE
Figure 7. Graphical Representation of JESD 51-12 Thermal Coefficients
4643fb
17
For more information www.linear.com/LTM4643
LTM4643
APPLICATIONS INFORMATION
as that which was simulated. An outcome of this process
and due diligence yields the set of derating curves shown
in this data sheet.
tions can be multiplied by the calculated power loss as
a function of ambient temperature to derive temperature
rise above ambient, thus maximum junction temperature.
Room temperature power loss can be derived from the
efficiencycurvesintheTypicalPerformanceCharacteristics
section and adjusted with the above junction temperature
multiplicative factor. The printed circuit board is a ±.6mm
thick four layer board with two ounce copper for the two
outerlayersandoneouncecopperforthetwoinnerlayers.
The PCB dimensions are 95mm × 76mm.
The ±V to 3.3V power loss curves in Figures 8 to ±3 can
be used in coordination with the load current derating
curves in Figures ±4 to 25 for calculating an approximate
θ thermal resistance for the LTM4643 with various heat
JA
sinking and airflow conditions. The power loss curves are
takenatroomtemperature, andareincreasedwithamulti-
plicativefactoraccordingtothejunctiontemperature.This
approximate factor is ±.3 for ±20°C. The derating curves
are plotted with the output current starting at ±2A and the
ambient temperature starting at 30°C. These are chosen
to include the lower and higher output voltage ranges
for correlating the thermal resistance. Thermal models
are derived from several temperature measurements in a
controlled temperature chamber along with thermal mod-
eling analysis. The junction temperatures are monitored
while ambient temperature is increased with and without
airflow.Thepowerlossincreasewithambienttemperature
change is factored into the derating curves. The junctions
are maintained at ±20°C maximum while lowering output
currentorpowerwithincreasingambienttemperature.The
decreasedoutputcurrentwilldecreasetheinternalmodule
loss as ambient temperature is increased. The monitored
junction temperature of ±20°C minus the ambient operat-
ing temperature specifies how much module temperature
rise can be allowed. As an example, in Figure ±9 the load
current is derated to ±0A at ~67°C with 200LFM of airflow
and no heat sink and the power loss for the ±2V to ±.5V
at ±0A output is about 4.5W. The 4.5W loss is calculated
with 4 times the 0.87W room temperature loss from the
±2V to ±.5V power loss curve each channel at 2.5A, and
the ±.3 multiplying factor at ±20°C junction. If the 67°C
ambienttemperatureissubtractedfromthe±20°Cjunction
temperature, then the difference of 53°C divided by 4.5W
The ±2A represents all four channels in parallel at 3A each.
The four parallel channels have their currents reduced at
the same rate to develop an equivalent θ circuit evalu-
JA
ation with thermal couples or IR camera used to validate
the thermal resistance values.
Maximum Operating Ambient Temperature
Figures 26 and 27 display the Maximum Power Loss
Allowance Curves vs ambient temperature with various
heatsinkingandairflowconditions. Thisdatawasderived
from the thermal impedance generated by various ther-
mal derating examinations with the junction temperature
measured at ±20°C. This maximum power loss limitation
serves as a guideline when designing multiple output rails
with different voltages and currents by calculating the
total power loss.
For example, to determine the maximum ambient tem-
perature when V
OUT3
= 2.5V at 0.6A, V
OUT4
= 3.3V at 3A,
OUT±
= ±.8V at ±A, V
OUT2
V
= ±.2V at 3A, without a heat
sink and 400LFM airflow, simply add up the total power
loss for each channel read from Figure 8 to Figure ±3
which in this example equals 3.0W, then multiply by the
±.3 coefficient for ±20°C junction temperature and com-
pare the total power loss number, 3.9W, with Figure 26.
Figure 26 indicates with a 3.9W total power loss, the
maximum ambient temperature for this particular ap-
plication is around 77°C. Also from Figure 26, it is easy
to determine with a 3.4W total power loss, the maximum
ambient temperature is around 63°C with no airflow and
73°C with 200LFM airflow.
equals ±±.7°C/W θ thermal resistance. Table 3 specifies
JA
a ±2°C/W value which is very close. Tables 3 to 5 provide
equivalent thermal resistances for the different outputs
with and without airflow and heat sinking. The derived
thermal resistances in Tables 3 to 6 for the various condi-
4643fb
18
For more information www.linear.com/LTM4643
LTM4643
APPLICATIONS INFORMATION
1.5
1.5
1.4
1.3
1.2
1.1
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
5V
5V
IN
12V
IN
IN
IN
1.4
1.3
1.2
1.1
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
12V
0
2.5
3
0
2.5
3
0.5
1
1.5
2
0.5
1
1.5
2
LOAD CURRENT (A)
LOAD CURRENT (A)
4643 F08
4643 F09
Figure 8. Power Loss at 1.0V
Output, (Each Channel, 25°C)
Figure 9. Power Loss at 1.2V
Output, (Each Channel, 25°C)
1.5
1.4
1.3
1.2
1.1
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
1.5
1.4
1.3
1.2
1.1
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
5V
IN
5V
IN
12V
IN
12V
IN
0
2.5
3
0
2.5
3
0.5
1
1.5
2
0.5
1
1.5
2
LOAD CURRENT (A)
LOAD CURRENT (A)
4643 F11
4643 F10
Figure 11. Power Loss at 1.8V
Output, (Each Channel, 25°C)
Figure 10. Power Loss at 1.5V
Output, (Each Channel, 25°C)
1.5
1.4
1.3
1.2
1.1
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
1.5
1.4
1.3
1.2
1.1
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
5V
5V
IN
IN
IN
12V
12V
IN
0
2.5
3
0
2.5
3
0.5
1
1.5
2
0.5
1
1.5
2
LOAD CURRENT (A)
LOAD CURRENT (A)
4643 F12
4643 F13
Figure 12. Power Loss at 2.5V
Output, (Each Channel, 25°C)
Figure 13. Power Loss at 3.3V
Output, (Each Channel, 25°C)
4643fb
19
For more information www.linear.com/LTM4643
LTM4643
APPLICATIONS INFORMATION
14
12
10
8
14
12
10
8
14
12
10
8
6
6
6
4
4
4
0LFM
200LFM
400LFM
0LFM
200LFM
400LFM
0LFM
200LFM
400LFM
2
2
2
0
0
0
30
60 70 80 90 100 110 120
40 50
AMBIENT TEMPERATURE (°C)
100 110 120
30
60 70 80 90
40 50
30
60 70 80 90 100 110 120
40 50
AMBIENT TEMPERATURE (°C)
AMBIENT TEMPERATURE (°C)
4643 F14
4643 F15
4643 F16
Figure 14. 5VIN to 1.0VOUT Derating
Curve, 4-Channel Paralleled,
No Heat Sink
Figure 15. 12VIN to 1.0VOUT Derating
Curve, 4-Channel Paralleled,
No Heat Sink
Figure 16. 5VIN to 1.0VOUT Derating
Curve, 4-Channel Paralleled,
BGA Heat Sink
14
12
10
8
14
12
10
8
6
6
4
4
0LFM
200LFM
0LFM
2
2
200LFM
400LFM
0
400LFM
60 70 80 90 100 110 120
AMBIENT TEMPERATURE (°C)
0
30
60 70 80 90 100 110 120
AMBIENT TEMPERATURE (°C)
30
40 50
40 50
4643 F17
4643 F18
Figure 17. 12VIN to 1.0VOUT Derating
Curve, 4-Channel Paralleled,
BGA Heat Sink
Figure 18. 5VIN to 1.5VOUT Derating
Curve, 4-Channel Paralleled,
No Heat Sink
14
14
12
10
8
12
10
8
6
6
4
4
0LFM
200LFM
400LFM
0LFM
200LFM
400LFM
2
2
0
0
30
60 70 80 90 100 110 120
40 50
AMBIENT TEMPERATURE (°C)
30
60 70 80 90 100 110 120
40 50
AMBIENT TEMPERATURE (°C)
4643 F19
4643 F20
Figure 19. 12VIN to 1.5VOUT Derating
Curve, 4-Channel Paralleled,
No Heat Sink
Figure 20. 5VIN to 1.5VOUT Derating
Curve, 4-Channel Paralleled,
BGA Heat Sink
4643fb
20
For more information www.linear.com/LTM4643
LTM4643
APPLICATIONS INFORMATION
14
12
10
8
14
12
10
8
14
12
10
8
6
6
6
4
4
4
0LFM
200LFM
400LFM
0LFM
200LFM
400LFM
0LFM
200LFM
400LFM
2
2
2
0
0
0
30
60 70 80 90 100 110 120
40 50
AMBIENT TEMPERATURE (°C)
30
60 70 80 90 100 110 120
40 50
AMBIENT TEMPERATURE (°C)
30
60 70 80 90 100 110 120
40 50
AMBIENT TEMPERATURE (°C)
4643 F21
4643 F22
4643 F23
Figure 21. 12VIN to 1.5VOUT Derating
Curve, 4-Channel Paralleled,
BGA Heat Sink
Figure 22. 5VIN to 3.3VOUT Derating
Curve, 4-Channel Paralleled,
No Heat Sink
Figure 23. 12VIN to 3.3VOUT Derating
Curve, 4-Channel Paralleled,
No Heat Sink
14
12
10
8
14
12
10
8
6
6
4
4
0LFM
200LFM
0LFM
2
2
200LFM
400LFM
0
400LFM
60 70 80 90 100 110 120
AMBIENT TEMPERATURE (°C)
0
30
60 70 80 90 100 110 120
AMBIENT TEMPERATURE (°C)
30
40 50
40 50
4643 F24
4643 F25
Figure 25. 12VIN to 3.3VOUT Derating
Curve, 4-Channel Paralleled,
BGA Heat Sink
Figure 24. 5VIN to 3.3VOUT Derating
Curve, 4-Channel Paralleled,
BGA Heat Sink
10
10
9
8
7
6
5
4
3
2
1
0
9
8
7
6
5
4
3
2
1
0
0LFM
200LFM
400LFM
0LFM
200LFM
400LFM
30
60 70 80 90 100 110 120
40 50
AMBIENT TEMPERATURE (°C)
30
60 70 80 90 100 110 120
40 50
AMBIENT TEMPERATURE (°C)
4643 F27
4643 F26
Figure 26. Power Loss Allowance vs.
Ambient Temperature, No Heat Sink
Figure 27. Power Loss Allowance vs.
Ambient Temperature, BGA Heat Sink
4643fb
21
For more information www.linear.com/LTM4643
LTM4643
APPLICATIONS INFORMATION
Table 3. 1.0V Output
DERATING CURVE
Figures ±4,±5
Figures ±4, ±5
Figures ±4, ±5
Figures ±6, ±7
Figures ±6, ±7
Figures ±6, ±7
V
(V)
POWER LOSS CURVE
Figure 8
AIR FLOW (LFM)
HEAT SINK
None
Θ
Θ
Θ
(°C/W)
IN
JA
5, ±2
5, ±2
5, ±2
5, ±2
5, ±2
5, ±2
0
±4.5
±2
Figure 8
200
400
0
None
Figure 8
None
±±
Figure 8
BGA Heat Sink
BGA Heat Sink
BGA Heat Sink
±3.5
±0
Figure 8
200
400
Figure 8
9
Table 4. 1.5V Output
DERATING CURVE
Figures ±8, ±9
V
IN
(V)
POWER LOSS CURVE
Figure ±0
AIR FLOW (LFM)
HEAT SINK
None
(°C/W)
JA
5, ±2
0
±4.5
±2
Figures ±8, ±9
5, ±2
5, ±2
5, ±2
5, ±2
5, ±2
Figure ±0
200
400
0
None
Figures ±8, ±9
Figure ±0
None
±±
Figures 20, 2±
Figure ±0
BGA Heat Sink
BGA Heat Sink
BGA Heat Sink
±3.5
±0
Figures 20, 2±
Figure ±0
200
400
Figures 20, 2±
Figure ±0
9
Table 5. 3.3V Output
DERATING CURVE
Figures 22, 23
V
IN
(V)
POWER LOSS CURVE
Figure ±3
AIR FLOW (LFM)
HEAT SINK
None
(°C/W)
JA
5, ±2
0
±4.5
±2
Figures 22, 23
5, ±2
5, ±2
5, ±2
5, ±2
5, ±2
Figure ±3
200
400
0
None
Figures 22, 23
Figure ±3
None
±±
Figures 24, 25
Figure ±3
BGA Heat Sink
BGA Heat Sink
BGA Heat Sink
±3.5
±0
Figures 24, 25
Figure ±3
200
400
Figures 24, 25
Figure ±3
9
4643fb
22
For more information www.linear.com/LTM4643
LTM4643
APPLICATIONS INFORMATION
Table 6
C
PART NUMBER
VALUE
C
PART NUMBER
VALUE
C
OUT1
(POSCAP)
PART NUMBER VALUE
IN
OUT1
(CERAMIC)
Murata
GRM2±BR6±E±06KA73L ±0µF, 25V, Murata
0805, X5R
GRM2±BR60J476ME±5 47µF, 6.3V,
0805, X5R
Sanyo
4TPE±00MZB
4V ±00µF
Taiyo Yuden TMK2±2BBJ±06KG-T
±0µF, 25V, Taiyo Yuden JMK2±2BJ476MG-T
0805, X5R
47µF, 6.3V,
0805, X5R
Murata
GRM3±CR6±C226ME±5L 22µF, 25V,
±206, X5R
Taiyo Yuden TMK3±6BBJ226ML-T
22µF, 25V,
±206, X5R
C
RECOVERY
LOAD STEP
IN
(CERAMIC)
(µF)
C
C
V
DROOP P-P DERIVATION
TIME
(µs)
LOAD STEP SLEW RATE
R
FB
(kΩ)
OUT1
FF
IN
V
(V)
(µF)
(pF)
(V)
(mv)
(mV)
(A)
(A/µs)
OUT
CERAMIC ONLY
±
±.2
±0
±0
±0
±0
±0
±0
47
47
47
47
47
47
±00
±00
±00
±00
±00
±00
5, ±2
5, ±2
5, ±2
5, ±2
5, ±2
5, ±2
±
±
±
±
2
3
59
59
40
40
40
40
50
60
2A to 3A
2A to 3A
2A to 3A
2A to 3A
2A to 3A
2A to 3A
0
0
0
0
0
0
90.9
60.4
40.2
30.±
±9.±
±3.3
±.5
66
±.8
75
2.5
±08
±±±
3.3
POSCAP
±
±0
±0
±0
±0
±0
±0
±00
±00
±00
±00
±00
±00
5, ±2
5, ±2
5, ±2
5, ±2
5, ±2
5, ±2
±
±
±
±
2
3
89
40
40
40
40
50
60
2A to 3A
2A to 3A
2A to 3A
2A to 3A
2A to 3A
2A to 3A
0
0
0
0
0
0
90.9
60.4
40.2
30.±
±9.±
±3.3
±.2
94
±.5
±08
±20
±44
±6±
±.8
2.5
3.3
4643fb
23
For more information www.linear.com/LTM4643
LTM4643
APPLICATIONS INFORMATION
Safety Considerations
• Place a dedicated power ground layer underneath the
unit.
The LTM4643 modules do not provide galvanic isolation
from V to V . There is no internal fuse. If required,
• Tominimizetheviaconductionlossandreducemodule
thermal stress, use multiple vias for interconnection
between top layer and other power layers.
IN
OUT
a slow blow fuse with a rating twice the maximum input
current needs to be provided to protect each unit from
catastrophic failure. The device does support thermal
shutdown and overcurrent protection.
• Do not put via directly on the pad, unless they are
capped or plated over.
Layout Checklist/Example
• Use a separated SGND ground copper area for com-
ponents connected to signal pins. Connect the SGND
to GND underneath the unit.
The high integration of LTM4643 makes the PCB board
layoutverysimpleandeasy.However,tooptimizeitselectri-
cal and thermal performance, some layout considerations
are still necessary.
• For parallel modules, tie the V , V , and COMP pins
OUT FB
together. Use an internal layer to closely connect these
pins together. The TRACK/SS pin can be tied a common
capacitor for regulator soft-start.
• Use large PCB copper areas for high current paths,
including V to V , GND, V
to V
. It helps to
IN±
IN4
OUT±
OUT4
minimize the PCB conduction loss and thermal stress.
• Bring out test points on the signal pins for monitoring.
Figure28givesagoodexampleoftherecommendedlayout.
• Place high frequency ceramic input and output capaci-
tors next to the V , GND and V
pins to minimize
OUT
IN
high frequency noise.
Figure 28. Recommended PCB Layout
4643fb
24
For more information www.linear.com/LTM4643
LTM4643
TYPICAL APPLICATIONS
CLKIN
CLKOUT
V
V
4V to 20V
3.3V/3A
IN1
OUT1
FB1
10µF
×4
25V
1206
47µF
6.3V
0805
SVIN1
RUN1
INTV
CC1
MODE1
LTM4643
COMP1
TRACK/SS1
PGOOD1
13.3k
0.1µF
2.5V/3A
V
V
IN2
OUT2
FB2
47µF
4V
0805
SVIN2
RUN2
INTV
COMP2
TRACK/SS2
PGOOD2
19.1k
CC2
60.4k
MODE2
1.5V/3A
V
V
13.3k
IN3
OUT3
47µF
4V
0805
SVIN3
RUN3
INTV
FB3
COMP3
TRACK/SS3
PGOOD3
40.2k
90.9k
CC3
60.4k
MODE3
1V/3A
V
V
13.3k
IN4
OUT4
47µF
4V
0805
SVIN4
RUN4
INTV
CC4
MODE4
FB4
COMP4
TRACK/SS4
PGOOD4
60.4k
TEMP SGND GND
4643 F29
13.3k
Figure 29. 4V to 20V Input, Quad 1.0V, 1.5V, 2.5V and 3.3V Output with Ratiometric Tracking
CLKIN
CLKOUT
V
V
2.375V to 5V
1.8V/3A
1.5V/3A
IN1
OUT1
FB1
10µF
×4
6.3V
1206
47µF
4V
SVIN1
RUN1
INTV
LTM4643
COMP1
TRACK/SS1
PGOOD1
30.1k
40.2k
60.4k
90.9k
0805
CC1
0.1µF
0.1µF
MODE1
V
V
IN2
OUT2
FB2
47µF
4V
0805
SVIN2
RUN2
INTV
CC2
MODE2
5V BIAS
COMP2
TRACK/SS2
PGOOD2
1µF
6.3V
1.2V/3A
1V/3A
V
V
IN3
OUT3
FB3
47µF
4V
0805
SVIN3
RUN3
INTV
CC3
MODE3
COMP3
TRACK/SS3
PGOOD3
0.1µF
0.1µF
V
V
IN4
OUT4
FB4
47µF
4V
0805
SVIN4
RUN4
INTV
CC4
MODE4
COMP4
TRACK/SS4
PGOOD4
TEMP SGND GND
4643 F30
Figure 30. 2.375V to 5V Input, Quad 1V, 1.2V, 1.5V, 1.8V Output
4643fb
25
For more information www.linear.com/LTM4643
LTM4643
TYPICAL APPLICATIONS
CLKIN
CLKOUT
V
IN
V
V
1.2V/12A
IN1
OUT1
FB1
4V to 20V
47µF
×3
22µF
×2
25V
1206
SVIN1
RUN1
INTV
LTM4643
COMP1
4V
15.1k
TRACK/SS1
PGOOD1
0805
CC1
MODE1
0.1µF
V
V
IN2
OUT2
FB2
SVIN2
RUN2
INTV
COMP2
TRACK/SS2
PGOOD2
CC2
MODE2
V
V
IN3
OUT3
FB3
SVIN3
RUN3
INTV
COMP3
TRACK/SS3
PGOOD3
CC3
MODE3
V
V
IN4
OUT4
FB4
SVIN4
RUN4
INTV
COMP4
TRACK/SS4
PGOOD4
CC4
V
IN
MODE4
V
– 0.6V
100µA
IN
TEMP SGND GND
R
T
=
R
T
4643 F31
A/D
Figure 31. 4V to 20V Input, 4-Phase, 1.2V at 12A Design with Temperature Monitoring
4643fb
26
For more information www.linear.com/LTM4643
LTM4643
TYPICAL APPLICATIONS
CLKIN
CLKOUT
V
V
5V
1.2V/6A
IN1
OUT1
FB1
47µF
22µF
×2
16V
1206
SVIN1
RUN1
INTV
×2
LTM4643
COMP1
TRACK/SS1
PGOOD1
4V
0805
30.2k
CC1
MODE1
0.1µF
V
V
IN2
OUT2
FB2
SVIN2
RUN2
INTV
COMP2
TRACK/SS2
PGOOD2
CC2
MODE2
12V
22µF
×2
V
V
3.3V/6A
IN3
OUT3
FB3
47µF
×2
6.3V
0805
SVIN3
RUN3
INTV
COMP3
TRACK/SS3
PGOOD3
16V
1206
6.65k
CC3
MODE3
0.1µF
V
V
IN4
OUT4
FB4
SVIN4
RUN4
INTV
COMP4
TRACK/SS4
PGOOD4
CC4
MODE4
TEMP SGND GND
4643 F32
Figure 32. 12V and 5V Two Separate Input Rails, 1.2V at 6A and 3.3V at 6A Output
4643fb
27
For more information www.linear.com/LTM4643
LTM4643
PACKAGE DESCRIPTION
PACKAGE ROW AND COLUMN LABELING MAY VARY
AMONG µModule PRODUCTS. REVIEW EACH PACKAGE
LAYOUT CAREFULLY.
LTM4643 Component LGA and BGA Pinout
PIN
A±
A2
A3
A4
A5
A6
A7
NAME
PIN
B±
B2
B3
B4
B5
B6
B7
NAME
GND
PIN
C±
C2
C3
C4
C5
C6
C7
NAME
PIN
D±
D2
D3
D4
D5
D6
D7
NAME
PIN
E±
E2
E3
E4
E5
E6
E7
NAME
GND
PIN
F±
F2
F3
F4
F5
F6
F7
NAME
V
V
V
V
OUT2
V
OUT2
V
OUT2
V
OUT3
OUT±
OUT±
OUT±
GND
PGOOD2
PGOOD±
GND
PGOOD3
TEMP
V
V
GND
GND
V
V
IN±
IN±
IN2
IN2
GND
GND
INTV
INTV
CC2
CC±
SV
GND
GND
SV
GND
IN±
IN2
TRACK/SS±
FB±
MODE±
COMP±
RUN±
CLKIN
TRACK/SS2
FB2
MODE2
COMP2
RUN2
SGND
PIN
G±
G2
G3
G4
G5
G6
G7
NAME
PIN
H±
H2
H3
H4
H5
H6
H7
NAME
GND
PIN
J±
J2
J3
J4
J5
J6
J7
NAME
PIN
K±
K2
K3
K4
K5
K6
K7
NAME
PIN
L±
L2
L3
L4
L5
L6
L7
NAME
GND
V
V
V
OUT4
V
V
OUT3
OUT3
OUT4
OUT4
GND
PGOOD4
CLKOUT
GND
GND
GND
V
IN3
V
IN3
GND
GND
V
IN4
V
IN4
INTV
CC3
GND
SV
IN3
GND
INTV
SV
IN4
CC4
TRACK/SS3
FB3
MODE3
COMP3
RUN3
FB4
TRACK/SS4
RUN4
MODE4
COMP4
4643fb
28
For more information www.linear.com/LTM4643
LTM4643
PACKAGE DESCRIPTION
Please refer to http://www.linear.com/product/LTM4643#packaging for the most recent package drawings.
LGA Package
77-Lead (15.00mm × 9.00mm ×1.82mm)
(Reference LTC DWG # 05-08-±508 Rev Ø)
Z
/ / b b b
Z
3 . 8 1 0
2 . 5 4 0
1 . 2 7 0
0 . 3 1 7 5
0 . 3 1 7 5
1 . 2 7 0
0 . 0 0 0
2 . 5 4 0
3 . 8 1 0
4643fb
29
For more information www.linear.com/LTM4643
LTM4643
PACKAGE DESCRIPTION
Please refer to http://www.linear.com/product/LTM4643#packaging for the most recent package drawings.
Z
/ / b b b
Z
3 . 8 1 0
2 . 5 4 0
1 . 2 7 0
0 . 3 1 7 5
0 . 3 1 7 5
1 . 2 7 0
0 . 0 0 0
2 . 5 4 0
3 . 8 1 0
4643fb
30
For more information www.linear.com/LTM4643
LTM4643
REVISION HISTORY
REV
DATE
03/±7 Added the BGA package
6/±7 Corrected Output Current from 4A to 3A on Figure 4
Corrected Output Voltage from ±.2V to ±.0V on Title of Figure 29
DESCRIPTION
PAGE NUMBER
A
±, 2, 28, 30
B
±3
25
4643fb
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
31
LTM4643
PACKAGE PHOTOS
DESIGN RESOURCES
SUBJECT
DESCRIPTION
µModule Design and Manufacturing Resources
Design:
Manufacturing:
• Selector Guides
• Quick Start Guide
• Demo Boards and Gerber Files
• Free Simulation Tools
• PCB Design, Assembly and Manufacturing Guidelines
• Package and Board Level Reliability
µModule Regulator Products Search
±. Sort table of products by parameters and download the result as a spread sheet.
2. Search using the Quick Power Search parametric table.
TechClip Videos
Quick videos detailing how to bench test electrical and thermal performance of µModule products.
Digital Power System Management
Linear Technology’s family of digital power supply management ICs are highly integrated solutions that
offer essential functions, including power supply monitoring, supervision, margining and sequencing,
and feature EEPROM for storing user configurations and fault logging.
RELATED PARTS
PART NUMBER DESCRIPTION
COMMENTS
LTM4644
LTM4623
LTM4622
Higher Power, Quad
Single, Ultrathin
Dual, Ultrathin
Quad 4A, Pin Compatible, 9mm × ±5mm × 5.0±mm BGA
3A, 6.25mm × 6.25mm × ±.8mm LGA and 6.25mm × 6.25mm × 2.42mm BGA
Dual 2.5A or Single 5A, , 6.25mm × 6.25mm × ±.8mm LGA and 6.25mm ×
6.25mm × 2.42mm BGA
LTM463±
Higher Power, Dual, Ultrathin
Dual ±0A or Single 20A, , ±6mm × ±6mm × ±.9±mm LGA
4643fb
LT 0617 REV B • PRINTED IN USA
www.linear.com/LTM4643
32
LINEAR TECHNOLOGY CORPORATION 2016
相关型号：
LTM4643EV#PBF
LTM4643 - Ultrathin Quad µModule Regulator with Configurable 3A Output Array; Package: LGA; Pins: 77; Temperature Range: -40°C to 85°C
Linear
LTM4643EY#PBF
LTM4643 - Ultrathin Quad µModule Regulator with Configurable 3A Output Array; Package: BGA; Pins: 77; Temperature Range: -40°C to 85°C
Linear
LTM4643IV#PBF
LTM4643 - Ultrathin Quad µModule Regulator with Configurable 3A Output Array; Package: LGA; Pins: 77; Temperature Range: -40°C to 85°C
Linear
LTM4643IY
LTM4643 - Ultrathin Quad µModule Regulator with Configurable 3A Output Array; Package: BGA; Pins: 77; Temperature Range: -40°C to 85°C
Linear
LTM4643IY#PBF
LTM4643 - Ultrathin Quad µModule Regulator with Configurable 3A Output Array; Package: BGA; Pins: 77; Temperature Range: -40°C to 85°C
Linear
LTM4643MPV#PBF
LTM4643 - Ultrathin Quad µModule Regulator with Configurable 3A Output Array; Package: LGA; Pins: 77; Temperature Range: -55°C to 125°C
Linear
LTM4643MPY#PBF
LTM4643 - Ultrathin Quad µModule Regulator with Configurable 3A Output Array; Package: BGA; Pins: 77; Temperature Range: -55°C to 125°C
Linear
LTM4644EY-1#PBF
LTM4644 - Quad DC/DC µModule (Power Module) Regulator with Configurable 4A Output Array; Package: BGA; Pins: 77; Temperature Range: -40°C to 85°C
Linear
©2020 ICPDF网 联系我们和版权申明