LTM8033MPY [Linear]
LTM8033 - Ultralow Noise EMC 36VIN, 3A DC/DC µModule (Power Module) Regulator; Package: BGA; Pins: 76; Temperature Range: -55°C to 125°C;
| 型号： | LTM8033MPY |
| 厂家： | 
Linear |
| 描述： | LTM8033 - Ultralow Noise EMC 36VIN, 3A DC/DC µModule (Power Module) Regulator; Package: BGA; Pins: 76; Temperature Range: -55°C to 125°C 开关 输出元件 |
| 文件： | 总26页 (文件大小：414K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LTM8033
Ultralow Noise EMC 36V ,
IN
3A DC/DC µModule
Regulator
DESCRIPTION
FEATURES
n
Complete Step-Down Switch Mode Power Supply
The LTM®8033 is an electromagnetic compatible (EMC)
36V, 3A DC/DC μModule® buck converter designed to
meet the radiated emissions requirements of EN55022.
Conducted emission requirements can be met by adding
standardfiltercomponents.Includedinthepackagearethe
switching controller, power switches, inductor, filters and
all support components. Operating over an input voltage
range of 3.6V to 36V, the LTM8033 supports an output
voltage range of 0.8V to 24V, and a switching frequency
range of 200kHz to 2.4MHz, each set by a single resistor.
Only the bulk input and output filter capacitors are needed
to finish the design.
n
Wide Input Voltage Range: 3.6V to 36V
n
3A Output Current
n
0.8V to 24V Output Voltage
EN55022 Class B Compliant
n
n
Current Share Multiple LTM8033 Regulators for
More Than 3A Output
n
Selectable Switching Frequency: 200kHz to 2.4MHz
n
Current Mode Control
n
SnPb or RoHS Compliant Finish
n
Programmable Soft-Start
n
Compact Package (11.25mm× 15mm× 4.32mm)
Surface MountLGA and (11.25mm× 15mm×
TheLTM8033ispackagedinacompact(11.25mm×15mm
× 4.32mm)overmoldedlandgridarray(LGA)andballgrid
array (BGA) package suitable for automated assembly by
standardsurfacemountequipment.TheLTM8033isavail-
able with SnPb (BGA) or RoHS compliant terminal finish.
4.92mm) BGA Packages
APPLICATIONS
n
Automotive Battery Regulation
L, LT, LTC, LTM, Linear Technology, the Linear logo, µModule and Burst Mode are registered
trademarks of Linear Technology Corporation. All other trademarks are the property of their
respective owners.
n
Power for Portable Products
n
Distributed Supply Regulation
n
Industrial Supplies
n
Wall Transformer Regulation
TYPICAL APPLICATION
Ultralow Noise 12V/3A DC/DC µModule Regulator
LTM8033
EMI Performance
80
70
60
50
40
30
20
10
0
V
*
V
12V
3A
IN
OUT
V
V
OUT
IN
20V TO 36V
2.2µF
RUN/SS
FIN
AUX
BIAS
1µF
SHARE
PGOOD
47µF
RT SYNC GND ADJ
34.8k
30
226.2
422.4
618.6
814.8
912.9
1010
41.2k
128.1 324.3
520.5
716.7
8033 TA01b
FREQUENCY (MHz)
f = 850kHz
8033 TA01a
* RUNNING VOLTAGE RANGE. PLEASE REFER TO THE
APPLICATIONS INFORMATION SECTION FOR START-UP DETAILS.
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For more information www.linear.com/LTM8033
LTM8033
ABSOLUTE MAXIMUM RATINGS (Note 1)
V , FIN, RUN/SS Voltage ........................................36V
BIAS .........................................................................25V
Maximum Junction Temperature (Note 2) .......... 125°C
Solder Temperature ............................................. 245°C
IN
ADJ, RT, SHARE Voltage ............................................6V
OUT
PGOOD, SYNC ..........................................................30V
V
, AUX ................................................................25V
PIN CONFIGURATION
TOP VIEW
TOP VIEW
SYNC
GND
ADJ
SYNC
GND
ADJ
8
7
6
5
4
3
2
1
RUN/SS
8
7
6
5
4
3
2
1
RUN/SS
PGOOD
PGOOD
BANK 3
FIN
BANK 3
FIN
SHARE
RT
SHARE
RT
BANK 2
GND
BANK 2
GND
BIAS
AUX
BIAS
AUX
BANK 1
BANK 4
BANK 1
BANK 4
V
V
IN
V
V
IN
OUT
OUT
A
B
C
D
E
F
G
H
J
K
L
A
B
C
D
E
F
G
H
J
K
L
BGA PACKAGE
76-LEAD (15mm × 11.25mm × 4.92mm)
LGA PACKAGE
76-LEAD (15mm × 11.25mm × 4.32mm)
T
JMAX
= 125°C, θ = 15.4°C/W, θ
= 5.2°C/W, θ = 9.8°C/W, θ
= 16.7°C/W
T
JMAX
= 125°C, θ = 15.4°C/W, θ
= 5.2°C/W, θ = 9.8°C/W, θ
= 16.7°C/W
JA
JCbottom
JB
JCtop
JA
JCbottom
JB
JCtop
θ VALUES DERIVED FROM A 4 LAYER 6.35cm × 6.35cm PCB
θ VALUES DERIVED FROM A 4 LAYER 6.35cm × 6.35cm PCB
WEIGHT = 2.2g
WEIGHT = 2.2g
ORDER INFORMATION
PART MARKING*
PACKAGE
TYPE
MSL
RATING
TEMPERATURE RANGE
(Note 2)
PART NUMBER
LTM8033EV#PBF
LTM8033IV#PBF
LTM8033MPV#PBF
LTM8033EY#PBF
LTM8033IY#PBF
LTM8033IY
PAD OR BALL FINISH
Au (RoHS)
DEVICE
FINISH CODE
LTM8033V
LTM8033V
LTM8033V
LTM8033Y
LTM8033Y
LTM8033Y
LTM8033Y
LTM8033Y
e4
e4
e4
e1
e1
e0
e1
e0
LGA
LGA
LGA
BGA
BGA
BGA
BGA
BGA
3
3
3
3
3
3
3
3
–40°C to 125°C
–40°C to 125°C
–55°C to 125°C
–40°C to 125°C
–40°C to 125°C
–40°C to 125°C
–55°C to 125°C
–55°C to 125°C
Au (RoHS)
Au (RoHS)
SAC305 (RoHS)
SAC305 (RoHS)
SnPb (63/67)
SAC305 (RoHS)
SnPb (63/67)
LTM8033MPY#PBF
LTM8033MPY
Consult Marketing for parts specified with wider operating temperature
ranges. *Device temperature grade is indicated by a label on the shipping
container. Pad or ball finish code is per IPC/JEDEC J-STD-609.
• Recommended LGA and BGA PCB Assembly and Manufacturing
Procedures:
www.linear.com/umodule/pcbassembly
• LGA and BGA Package and Tray Drawings:
www.linear.com/packaging
• Terminal Finish Part Marking:
www.linear.com/leadfree
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For more information www.linear.com/LTM8033
LTM8033
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VIN = 12V, RUN/SS = 12V unless otherwise noted (Note 2).
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
l
Minimum Input Voltage
Output DC Voltage
3.6
V
0A < I
0A < I
< 3A, R
< 3A, R
Open, V = 24V
0.8
24
V
V
OUT
OUT
ADJ
ADJ
IN
= 16.5k, V = 32V
IN
Output DC Current
V
= 24V
0
3
A
IN
Quiescent Current into V
RUN/SS = 0.2V
Not Switching
BIAS = 0V, Not Switching
0.01
30
100
1
µA
µA
µA
IN
60
150
Quiescent Current into BIAS
RUN/SS = 0.2V
0.01
75
0
0.5
120
5
µA
µA
µA
Not Switching
BIAS = 0V, Not Switching
Line Regulation
5.5V < V < 36V
0.3
0.4
5
%
%
IN
Load Regulation
0A < I
< 3A, V = 24V
OUT IN
Output RMS Voltage Ripple
Switching Frequency
V
= 24V, 0A < I
< 3A
mV
kHz
mV
µA
IN
OUT
R = 45.3k
T
780
790
2
l
Voltage at ADJ Pin
775
2.5
805
Current Out of ADJ Pin
ADJ = 1V, V
= 0V
OUT
Minimum BIAS Voltage for Proper Operation
RUN/SS Pin Current
2
2.8
10
V
RUN/SS = 2.5V
5
µA
RUN/SS Input High Voltage
RUN/SS Input Low Voltage
PGOOD Threshold (at ADJ)
PGOOD Leakage Current
PGOOD Sink Current
V
0.2
1
V
V
Rising
730
0.1
mV
µA
OUT
PGOOD = 30V, RUN/SS = 0V
PGOOD = 0.4V
200
0.5
735
µA
SYNC Input Low Threshold
SYNC Input High Threshold
SYNC Bias Current
f
f
= 550kHz
= 550kHz
V
SYNC
SYNC
0.7
V
SYNC = 0V
24V , 3.3V , I
0.1
89
69
51
µA
500kHz Narrowband Conducted Emissions
1MHz Narrowband Conducted Emissions
3MHz Narrowband Conducted Emissions
= 3A, 5µH LISN
OUT OUT
dBµV
dBµV
dBµV
IN
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LTM8033E is guaranteed to meet performance specifications
from 0°C to 125°C internal. Specifications over the full –40°C to
125°C internal operating temperature range are assured by design,
characterization and correlation with statistical process controls. The
LTM8033I is guaranteed to meet specifications over the full –40°C
to 125°C internal operating temperature range. The LTM8033MP is
guaranteed to meet specifications over the full –55°C to 125°C internal
operating temperature range. Note that the maximum internal temperature
is determined by specific operating conditions in conjunction with board
layout, the rated package thermal resistance and other environmental
factors.
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For more information www.linear.com/LTM8033
LTM8033
TYPICAL PERFORMANCE CHARACTERISTICS TA = 25°C, unless otherwise noted.
2.5VOUT Efficiency
3.3VOUT Efficiency
5VOUT Efficiency
95
90
85
80
75
70
65
60
55
50
90
85
80
75
70
65
60
55
50
95
90
85
80
75
70
65
60
55
50
5.5V
IN
12V
IN
12V
IN
5V
IN
12V
IN
24V
36V
36V
24V
IN
IN
IN
IN
36V
24V
IN
IN
0
500 1000 1500 2000 2500 3000
OUTPUT CURRENT (mA)
8033 G01
0
500 1000 1500 2000 2500 3000
OUTPUT CURRENT (mA)
8033 G02
0
500 1000 1500 2000 2500 3000
OUTPUT CURRENT (mA)
8033 G03
8VOUT Efficiency
12VOUT Efficiency
18VOUT Efficiency
95
90
85
80
75
70
65
60
55
50
95
90
85
80
75
70
65
60
55
50
95
90
85
80
75
70
65
60
55
50
24V
12V
IN
IN
36V
IN
36V
IN
36V
24V
IN
IN
0
500 1000 1500 2000 2500 3000
OUTPUT CURRENT (mA)
8033 G05
0
500 1000 1500 2000 2500 3000
OUTPUT CURRENT (mA)
8033 G04
0
500 1000 1500 2000 2500 3000
OUTPUT CURRENT (mA)
8033 G06
Bias Current vs Load Current,
2.5VOUT
Bias Current vs Load Current,
3.3VOUT
Bias Current vs Load Current,
5VOUT
50
45
40
35
30
25
20
15
10
5
80
70
60
50
40
30
20
10
0
40
35
30
25
20
15
10
5
12V
IN
5V
IN
5V
IN
24V
36V
IN
12V
IN
12V
IN
24V
IN
IN
24V
IN
36V
IN
36V
IN
0
0
0
500 1000 1500 2000 2500 3000
0
500 1000 1500 2000 2500 3000
0
500 1000 1500 2000 2500 3000
LOAD CURRENT (mA)
LOAD CURRENT (mA)
LOAD CURRENT (mA)
8033 G07
8033 G08
8033 G09
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For more information www.linear.com/LTM8033
LTM8033
TA = 25°C, unless otherwise noted.
TYPICAL PERFORMANCE CHARACTERISTICS
Bias Current vs Load Current,
8VOUT
Bias Current vs Load Current,
12VOUT
Bias Current vs Load Current,
18VOUT
90
80
70
60
50
40
30
20
10
0
90
80
70
60
50
40
30
20
10
0
80
70
60
50
40
30
20
10
0
36V
12V
IN
IN
24V
IN
24V
IN
36V
IN
36V
IN
0
500 1000 1500 2000 2500 3000
0
500 1000 1500 2000 2500 3000
0
500 1000 1500 2000 2500 3000
LOAD CURRENT (mA)
LOAD CURRENT (mA)
LOAD CURRENT (mA)
8033 G12
8033 G10
8033 G11
Input Current vs Input Voltage
Output Shorted
Input Current vs Output Current
2.5VOUT
Input Current vs Output Current
3.3VOUT
1000
900
800
700
600
500
400
300
200
100
0
2500
2000
1500
1000
500
2500
2000
1500
1000
500
5.5V
IN
5V
IN
12V
IN
12V
IN
24V
IN
24V
IN
36V
IN
36V
IN
0
0
0
10
20
30
40
0
500 1000 1500 2000 2500 3000
OUTPUT CURRENT (mA)
8033 G15
0
500 1000 1500 2000 2500 3000
OUTPUT CURRENT (mA)
8033 G14
INPUT VOLTAGE (V)
8033 G13
Input Current vs Output Current
5VOUT
Input Current vs Output Current
8VOUT
Input Current vs Output Current
12VOUT
1600
1400
1200
1000
800
600
400
200
0
2500
2000
1500
1000
500
1800
1600
1400
1200
1000
800
600
400
200
0
24V
IN
12V
IN
12V
IN
36V
IN
24V
IN
24V
IN
36V
IN
36V
IN
0
0
500 1000 1500 2000 2500 3000
OUTPUT CURRENT (mA)
8033 G16
0
500 1000 1500 2000 2500 3000
OUTPUT CURRENT (mA)
8033 G17
0
500 1000 1500 2000 2500 3000
OUTPUT CURRENT (mA)
8033 G18
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For more information www.linear.com/LTM8033
LTM8033
TA = 25°C, unless otherwise noted.
TYPICAL PERFORMANCE CHARACTERISTICS
Input Current vs Output Current
18VOUT
Minimum Required Input Voltage
vs Output Voltage, IOUT = 3A
Minimum Required Input Voltage
vs Load Current, 2.5VOUT
40
35
30
25
20
15
10
5
1800
1600
1400
1200
1000
800
600
400
200
0
4.4
4.2
4.0
3.8
3.6
3.4
3.2
3.0
TO START, WITH RUN = V
IN
36V
IN
TO RUN OR SS
CONTROLLED START
0
0
5
10
15
0
500 1000 1500 2000 2500 3000
OUTPUT CURRENT (mA)
8033 G19
0
500 1000 1500 2000 2500 3000
OUTPUT VOLTAGE (V)
LOAD CURRENT (mA)
8033 G20
8033 G21
Minimum Required Input Voltage
vs Load Current, 3.3VOUT
Minimum Required Input Voltage
vs Load Current, 5VOUT
Minimum Required Input Voltage
vs Load Current, 8VOUT
6.0
5.5
5.0
4.5
4.0
3.5
3.0
8.0
7.5
7.0
6.5
6.0
5.5
5.0
4.5
4.0
3.5
3.0
10.5
10.0
9.5
TO START, WITH RUN = V
IN
TO START, WITH RUN = V
IN
TO START, WITH RUN = V
IN
RUN/SS CONTROLLED START
TO RUN
TO RUN OR RUN/SS
CONTROLLED START
9.0
TO RUN OR RUN/SS
CONTROLLED START
8.5
8.0
0
500 1000 1500 2000 2500 3000
0
500 1000 1500 2000 2500 3000
0
500 1000 1500 2000 2500 3000
LOAD CURRENT (mA)
LOAD CURRENT (mA)
LOAD CURRENT (mA)
8033 G22
8033 G23
8033 G24
Minimum Required Input Voltage
vs Load Current, 12VOUT
Minimum Required Input Voltage
vs Load Current, 18VOUT
Radiated Emissions, 36VIN,
24VOUT at 1.5A Load
80
70
60
50
40
30
20
10
0
30
28
26
24
22
20
18
16
14
12
20
19
18
17
16
15
14
13
12
TO START,
WITH RUN = V
IN
TO RUN OR START
TO RUN
RUN/SS CONTROLLED START
0
500 1000 1500 2000 2500 3000
0
500 1000 1500 2000 2500 3000
30
226.2
422.4
618.6
814.8
1010
912.9
128.1 324.3
520.5
716.7
LOAD CURRENT (mA)
LOAD CURRENT (mA)
8033 G26
8033 G25
8033 G27
FREQUENCY (MHz)
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For more information www.linear.com/LTM8033
LTM8033
TA = 25°C, unless otherwise noted.
TYPICAL PERFORMANCE CHARACTERISTICS
Radiated Emissions, 36VIN,
1.2VOUT at 3A Load
Temperature Rise vs Load
Current, 2.5VOUT
Temperature Rise vs Load
Current, 3.3VOUT
80
70
60
50
40
30
20
10
0
40
35
30
25
20
15
10
5
40
35
30
25
20
15
10
5
36V
IN
36V
IN
12V
IN
5V
IN
24V
24V
IN
IN
12V
IN
0
0
0
500 1000 1500 2000 2500 3000 3500
30
226.2
422.4
618.6
814.8
1010
912.9
0
500 1000 1500 2000 2500 3000
128.1 324.3
520.5
716.7
LOAD CURRENT (mA)
LOAD CURRENT (mA)
8033 G29
8033 G28
8033 G30
FREQUENCY (MHz)
Temperature Rise vs Load
Current, 5VOUT
Temperature Rise vs Load
Current, 8VOUT
60
50
40
30
20
10
0
45
40
35
30
25
20
15
10
5
36V
IN
36V
IN
12V
IN
12V
IN
24V
IN
24V
IN
0
0
500 1000 1500 2000 2500 3000
0
500 1000 1500 2000 2500 3000
LOAD CURRENT (mA)
LOAD CURRENT (mA)
8033 G32
8033 G31
Temperature Rise vs Load
Current, 18VOUT
Temperature Rise vs Load
Current, 12VOUT
70
60
50
40
30
20
10
0
70
60
50
40
30
20
10
0
36V
IN
36V
IN
24V
IN
0
500
1000
1500
2000
0
500 1000 1500 2000 2500 3000
LOAD CURRENT (mA)
LOAD CURRENT (mA)
8033 G34
8033 G33
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For more information www.linear.com/LTM8033
LTM8033
PIN FUNCTIONS
V
(Bank 1): Power Output Pins. Apply the output filter
SYNC (Pin B8): This is the external clock synchronization
input.GroundthispinforlowrippleBurstMode® operation
at low output loads. Tie to a stable voltage source greater
than 0.7V to disable Burst Mode operation. Do not leave
this pin floating. Tie to a clock source for synchronization.
Clock edges should have rise and fall times faster than
1μs. See the Synchronization section in the Applications
Information section.
OUT
capacitor and the output load between these pins and
GND pins.
GND (A8, Bank 2): Tie these GND pins to a local ground
plane below the LTM8033 and the circuit components.
Return the feedback divider (R ) to this net.
ADJ
FIN(Bank3):FilteredInput. Thisisthenodeaftertheinput
EMI filter. Apply the capacitor recommended by Table 1.
Additional capacitance may be applied if there is a need
to modify the behavior of the integrated EMI filter; other-
wise, leave these pins unconnected. See the Applications
Information section for more details.
PGOOD (Pin B7): The PGOOD pin is the open-collector
output of an internal comparator. PGOOD remains low
until the ADJ pin is greater than 90% of the final regulation
voltage. PGOOD output is valid when V is above 3.6V
IN
and RUN/SS is high. If this function is not used, leave
V (Bank4):TheV pinsuppliescurrenttotheLTM8033’s
this pin floating.
IN
IN
internal regulator and to the internal power switch. This
pin must be locally bypassed with an external, low ESR
capacitor; see Table 1 for recommended values. Ensure
AUX (Pin G3): Low Current Voltage Source for BIAS.
In many designs, the BIAS pin is simply connected to
V
. The AUX pin is internally connected to V
and
OUT
OUT
that V + BIAS is less than 56V.
IN
is placed adjacent to the BIAS pin to ease printed circuit
SHARE (Pin A6): Tie this to the SHARE pin of another
LTM8033 when paralleling the outputs. Otherwise, do
not connect.
board routing. Although this pin is internally connected
to V , it is not intended to deliver a high current, so do
OUT
not connect this pin to the load. If this pin is not tied to
BIAS, leave it floating.
ADJ (Pin A7): The LTM8033 regulates its ADJ pin to 0.79V.
Connect the adjust resistor from this pin to ground. The
valueofR isgivenbytheequationR =394.21/(V
OUT
BIAS(PinG4):TheBIASpinconnectstotheinternalpower
bus. Connect to a power source greater than 2.8V and less
than 25V. If the output is greater than 2.8V, connect this
pin there. If the output voltage is less, connect this to a
ADJ
ADJ
– 0.79), where R
is in kΩ.
ADJ
RT (Pin B6): The RT pin is used to program the switching
frequency of the LTM8033 by connecting a resistor from
thispintoground.TheApplicationsInformationsectionof
the data sheet includes a table to determine the resistance
value based on the desired switching frequency. Minimize
capacitance at this pin.
voltage source between 2.8V and 25V but ensure that V
+ BIAS is less than 56V.
IN
RUN/SS (Pin G8): Pull the RUN/SS pin below 0.2V to
shut down the LTM8033. Tie to 2.5V or more for normal
operation. If the shutdown feature is not used, tie this pin
to the V pin. RUN/SS also provides a soft-start function;
IN
see the Applications Information section.
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For more information www.linear.com/LTM8033
LTM8033
BLOCK DIAGRAM
V
OUT
V
8.2µH
IN
EMI
FILTER
15pF
1µF
499k
FIN
AUX
BIAS
RUN/SS
SHARE
CURRENT
MODE
CONTROLLER
SYNC
GND
RT
PGOOD
ADJ
8033 BD
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For more information www.linear.com/LTM8033
LTM8033
OPERATION
The LTM8033 is a standalone nonisolated step-down
switching DC/DC power supply that can deliver up to 3A of
outputcurrent.ItisanEMCproduct;itsradiatedemissions
are so quiet that it can pass the stringent requirements of
EN55022 class B as a stand alone product. This µModule
provides a precisely regulated output voltage program-
mable via one external resistor from 0.8V to 24V. The input
voltage range is 3.6V to 36V. Given that the LTM8033 is
a step-down converter, make sure that the input voltage
is high enough to support the desired output voltage and
load current.
To further optimize efficiency, the LTM8033 automatically
switches to Burst Mode operation in light load situations.
Between bursts, all circuitry associated with controlling
the output switch is shut down reducing the input supply
current to 50μA in a typical application.
TheoscillatorreducestheLTM8033’soperatingfrequency
when the voltage at the ADJ pin is low. This frequency
foldback helps to control the output current during start-
up and overload.
The LTM8033 contains a power good comparator which
trips when the ADJ pin is at roughly 90% of its regulated
value. The PGOOD output is an open-collector transistor
that is off when the output is in regulation, allowing an
external resistor to pull the PGOOD pin high. Power good
As shown in the Block Diagram, the LTM8033 contains an
EMI filter, current mode controller, power switching ele-
ment, powerinductor, powerSchottkydiodeandamodest
amount of input and output capacitance. The LTM8033 is
afixedfrequencyPWMregulator. Theswitchingfrequency
is set by simply connecting the appropriate resistor value
from the RT pin to GND.
is valid when the LTM8033 is enabled and V is above
IN
3.6V.
The LTM8033 is equipped with a thermal shutdown that
willinhibitpowerswitchingathighjunctiontemperatures.
Theactivationthresholdofthisfunction,however,isabove
125°C to avoid interfering with normal operation. Thus,
prolonged or repetitive operation under a condition in
which the thermal shutdown activates may damage or
impair the reliability of the device.
Aninternalregulatorprovidespowertothecontrolcircuitry.
The bias regulator normally draws power from the V
IN
pin, but if the BIAS pin is connected to an external volt-
age higher than 2.8V, bias power will be drawn from the
external source (typically the regulated output voltage).
This improves efficiency. The RUN/SS pin is used to place
the LTM8033 in shutdown, disconnecting the output and
reducing the input current to less than 1μA.
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LTM8033
APPLICATIONS INFORMATION
For most applications, the design process is straight for-
ward, summarized as follows:
Capacitor Selection Considerations
The C , C and C capacitor values in Table 1 are the
IN FIN
OUT
• Look at Table 1 and find the row that has the desired
input range and output voltage.
minimum recommended values for the associated oper-
ating conditions. Applying capacitor values below those
indicated in Table 1 is not recommended, and may result
in undesirable operation. Using larger values is generally
acceptable, and can yield improved dynamic response, if
it is necessary. Again, it is incumbent upon the user to
verify proper operation over the intended system’s line,
load and environmental conditions.
• Apply the recommended C , C , C , R
and R
T
IN FIN OUT ADJ
values.
• Connect BIAS as indicated.
As the integrated input EMI filter may ring in response to
an application of a step input voltage, a bulk capacitance
may be applied between FIN and GND. See the Hot-Plug-
ging Safely section for details.
Ceramic capacitors are small, robust and have very low
ESR. However, not all ceramic capacitors are suitable.
X5R and X7R types are stable over temperature and ap-
plied voltage and give dependable service. Other types,
including Y5V and Z5U have very large temperature and
voltage coefficients of capacitance. In an application cir-
cuit they may have only a small fraction of their nominal
capacitanceresultinginmuchhigheroutputvoltageripple
than expected.
While these component combinations have been tested
for proper operation, it is incumbent upon the user to
verify proper operation over the intended system’s line,
load and environmental conditions. Bear in mind that the
maximum output current is limited by junction tempera-
ture, therelationshipbetweentheinputandoutputvoltage
magnitude and polarity and other factors. Please refer to
the graphs in the Typical Performance Characteristics
section for guidance.
Ceramic capacitors are also piezoelectric. In Burst Mode
operation, the LTM8033’s switching frequency depends
on the load current, and can excite a ceramic capacitor
at audio frequencies, generating audible noise. Since the
LTM8033 operates at a lower current limit during Burst
Mode operation, the noise is typically very quiet to a
casual ear.
The maximum frequency (and attendant R value) at
T
which the LTM8033 should be allowed to switch is given
in Table 1 in the f
column, while the recommended
MAX
frequency (and R value) for optimal efficiency over the
T
given input condition is given in the f
column.
OPTIMAL
There are additional conditions that must be satisfied if
the synchronization function is used. Please refer to the
Synchronization section for details.
If this audible noise is unacceptable, use a high perfor-
mance electrolytic capacitor at the output. It may also be
a parallel combination of a ceramic capacitor and a low
cost electrolytic capacitor.
Note: An input bulk capacitance is required at either V
IN
or FIN. Refer to the Typical Performance Characteristics
A final precaution regarding ceramic capacitors concerns
the maximum input voltage rating of the LTM8033. A
ceramic input capacitor combined with trace or cable
inductance forms a high Q (under damped) tank circuit.
If the LTM8033 circuit is plugged into a live supply, the
input voltage can ring to twice its nominal value, possibly
exceeding the device’s rating. This situation can be easily
avoided; see the Hot-Plugging Safely section.
section for load conditions.
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APPLICATIONS INFORMATION
Table 1. Recommended Component Values and Configuration (TA = 25°C)
V
V
OUT
C
C
C
OUT
BIAS
R
f
R
f
R
T(MIN)
IN
IN
FIN
ADJ
OPTIMAL
T(OPTIMAL)
MAX
3.6V to 36V
3.6V to 36V
3.6V to 36V
3.6V to 36V
3.6V to 36V
4.1V to 36V
5.3V to 36V
7.5V to 36V
10.5V to 36V
20V to 36V
25.5V to 36V
32.5V to 36V
3.6V to 15V
3.6V to 15V
3.6V to 15V
3.6V to 15V
3.6V to 15V
4.1V to 15V
5.3V to 15V
7.5V to 15V
10.5V to 15V
9V to 24V
0.8V
1V
4.7µF, 50V, 1206 10µF, 50V, 1210 4 × 100µF, 6.3V, 1210 2.8V to 25V 30M 230kHz
4.7µF, 50V, 1206 10µF, 50V, 1210 4 × 100µF, 6.3V, 1210 2.8V to 25V 1.87M 240kHz
4.7µF, 50V, 1206 10µF, 50V, 1210 4 × 100µF, 6.3V, 1210 2.8V to 25V 953k 255kHz
4.7µF, 50V, 1206 10µF, 50V, 1210 4 × 100µF, 6.3V, 1210 2.8V to 25V 549k 270kHz
4.7µF, 50V, 1206 10µF, 50V, 1210 4 × 100µF, 6.3V, 1210 2.8V to 25V 383k 285kHz
4.7µF, 50V, 1206 10µF, 50V, 1210 3 × 100µF, 6.3V, 1210 2.8V to 25V 226k 345kHz
182k
250kHz 169k
285kHz 147k
315kHz 130k
360kHz 113k
420kHz 95.3k
540kHz 71.5k
675kHz 54.9k
950kHz 36.5k
1.45MHz 20.5k
2.3MHz 9.09k
2.4MHz 8.25k
2.4MHz 8.25k
575kHz 66.5k
660kHz 56.2k
760kHz 47.5k
840kHz 42.2k
1.0MHz 34.0k
1.3MHz 23.7k
1.6MHz 17.8k
2.4MHz 8.25k
2.4MHz 8.25k
360kHz 113k
410kHz 97.6k
475kHz 82.5k
550kHz 69.8k
620kHz 60.4k
800kHz 44.2k
1.0MHz 34.0k
1.4MHz 21.5k
2.2MHz 9.76k
2.3MHz 9.09k
250kHz 169k
285kHz 147k
315kHz 130k
360kHz 113k
420kHz 95.3k
540kHz 71.5k
675kHz 54.9k
950kHz 36.5k
1.45MHz 20.5k
174k
162k
154k
147k
118k
93.1k
76.8k
52.3k
41.2k
29.4k
25.5k
182k
174k
162k
154k
147k
118k
93.1k
76.8k
52.3k
154k
147k
140k
133k
124k
118k
93.1k
76.8k
52.3k
41.2k
182k
174k
162k
154k
147k
118k
93.1k
76.8k
52.3k
1.2V
1.5V
1.8V
2.5V
3.3V
5V
4.7µF, 50V, 1206 10µF, 50V, 1210
4.7µF, 50V, 1206 4.7µF, 50V, 1206
4.7µF, 50V, 1206 1µF, 50V, 1206
2.2µF, 50V, 1206 1µF, 50V, 1206
100µF, 6.3V, 1210
100µF, 6.3V, 1210
47µF, 16V, 1210
47µF, 16V, 1210
22μF, 25V, 1812
22μF, 25V, 1812
AUX
AUX
AUX
AUX
AUX
154k 425kHz
93.1k 500kHz
54.9k 700kHz
34.8k 850kHz
22.6k 1.1MHz
8V
12V
18V
24V
0.8V
1V
2.2µF, 50V, 1206
1µF, 50V, 1206
Open
Open
2.8V to 20V 16.5k 1.2MHz
4.7µF, 25V, 1206 10µF, 16V, 1210 4 × 100µF, 6.3V, 1210
4.7µF, 25V, 1206 10µF, 16V, 1210 4 × 100µF, 6.3V, 1210
4.7µF, 25V, 1206 10µF, 16V, 1210 4 × 100µF, 6.3V, 1210
4.7µF, 25V, 1206 10µF, 16V, 1210 4 × 100µF, 6.3V, 1210
4.7µF, 25V, 1206 10µF, 16V, 1210 4 × 100µF, 6.3V, 1210
4.7µF, 16V, 1206 10µF, 16V, 1210 3 x 100µF, 6.3V, 1210
V
V
V
V
V
V
30M 230kHz
1.87M 240kHz
953k 255kHz
549k 270kHz
383k 285kHz
226k 345kHz
154k 425kHz
93.1k 500kHz
54.9k 700kHz
30M 270kHz
1.87M 285kHz
953k 295kHz
549k 310kHz
383k 330kHz
226k 345kHz
154k 425kHz
93.1k 500kHz
54.9k 700kHz
34.8k 850kHz
IN
IN
IN
IN
IN
IN
1.2V
1.5V
1.8V
2.5V
3.3V
5V
4.7µF, 16V, 1206 10µF, 16V, 1210
4.7µF, 16V, 1206 4.7µF, 50V, 1206
100µF, 6.3V, 1210
100µF, 6.3V, 1210
47µF, 16V, 1210
AUX
AUX
AUX
8V
2.2µF, 25V, 1206
Open
0.8V
1V
4.7µF, 25V, 1206 4.7µF, 25V, 1206 4 × 100µF, 6.3V, 1210
4.7µF, 25V, 1206 4.7µF, 25V, 1206 4 × 100µF, 6.3V, 1210
4.7µF, 25V, 1206 4.7µF, 25V, 1206 4 × 100µF, 6.3V, 1210
4.7µF, 25V, 1206 4.7µF, 25V, 1206 4 × 100µF, 6.3V, 1210
4.7µF, 25V, 1206 4.7µF, 25V, 1206 3 × 100µF, 6.3V, 1210
4.7µF, 25V, 1206 4.7µF, 25V, 1206 2 × 100µF, 6.3V, 1210
V
IN
9V to 24V
V
IN
9V to 24V
1.2V
1.5V
1.8V
2.5V
3.3V
5V
V
IN
9V to 24V
V
IN
9V to 24V
V
IN
9V to 24V
V
IN
9V to 24V
4.7µF, 25V, 1206 4.7µF, 25V, 1206
4.7µF, 25V, 1206 4.7µF, 25V, 1206
2.2µF, 25V, 1206 1µF, 25V, 1206
2.2µF, 25V, 1206 1µF, 25V, 1206
100µF, 6.3V, 1210
100µF, 6.3V, 1210
47µF, 16V, 1210
47µF, 16V, 1210
AUX
AUX
AUX
AUX
9V to 24V
10.5V to 24V
20V to 24V
18V to 36V
18V to 36V
18V to 36V
18V to 36V
18V to 36V
18V to 36V
18V to 36V
18V to 36V
18V to 36V
8V
12V
0.8V
1V
1µF, 50V, 1206 2.2µF, 50V, 1206 4 × 100µF, 6.3V, 1210 2.8V to 25V 30M 230kHz
1µF, 50V, 1206 2.2µF, 50V, 1206 4 × 100µF, 6.3V, 1210 2.8V to 25V 1.87M 240kHz
1µF, 50V, 1206 2.2µF, 50V, 1206 4 × 100µF, 6.3V, 1210 2.8V to 25V 953k 255kHz
1µF, 50V, 1206 2.2µF, 50V, 1206 4 × 100µF, 6.3V, 1210 2.8V to 25V 549k 270kHz
1µF, 50V, 1206 2.2µF, 50V, 1206 3 × 100µF, 6.3V, 1210 2.8V to 25V 383k 285kHz
1µF, 50V, 1206 2.2µF, 50V, 1206 2 × 100µF, 6.3V, 1210 2.8V to 25V 226k 345kHz
1.2V
1.5V
1.8V
2.5V
3.3V
5V
1µF, 50V, 1206 2.2µF, 50V, 1206
1µF, 50V, 1206 1µF, 50V, 1206
2.2µF, 50V, 1206 1µF, 50V, 1206
100µF, 6.3V, 1210
47µF, 10V, 1210
47µF, 16V, 1210
AUX
AUX
AUX
154k 425kHz
93.1k 500kHz
54.9k 700kHz
8V
Note: A bulk capacitor is required. Do not allow V + BIAS above 56V.
IN
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APPLICATIONS INFORMATION
Frequency Selection
BIAS Pin Considerations
TheLTM8033usesaconstantfrequencyPWMarchitecture
thatcanbeprogrammedtoswitchfrom200kHzto2.4MHz
by using a resistor tied from the RT pin to ground. Table 2
The BIAS pinis used to provide drive powerforthe internal
power switching stage and operate other internal circuitry.
Forproperoperation, itmustbepoweredbyatleast2.8V. If
the output voltage is programmed to 2.8V or higher, BIAS
provides a list of R resistor values and their resulting
T
frequencies.
may be simply tied to V . If V
is less than 2.8V, BIAS
OUT
OUT
can be tied to V or some other voltage source. If the BIAS
IN
Table 2. Switching Frequency vs RT Value
pin voltage is too high, the efficiency of the LTM8033 may
suffer.TheoptimumBIASvoltageisdependentuponmany
factors, such as load current, input voltage, output voltage
and switching frequency, but 4V to 5V works well in many
applications. Inallcases,ensurethatthemaximumvoltage
SWITCHING FREQUENCY (MHz)
R VALUE (kΩ)
T
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1
215
137
100
76.8
63.4
52.3
44.2
38.3
34
at the BIAS pin is less than 25V and that the sum of V
IN
and BIAS is less than 56V. If BIAS power is applied from
a remote or noisy voltage source, it may be necessary to
apply a decoupling capacitor locally to the pin.
Load Sharing
1.2
1.4
1.6
1.8
2
25.5
21.5
17.8
14.7
12.1
9.76
8.25
TwoormoreLTM8033maybeparalleledtoproducehigher
currents. To do this, tie the V , ADJ, V
and SHARE
IN
OUT
pins of all the paralleled LTM8033 together. To ensure that
paralleled modules start up together, the RUN/SS pins
may be tied together as well. If the RUN/SS pins are not
tied together, make sure that the same valued soft-start
capacitors are used for each module. Current sharing can
be improved by synchronizing the LTM8033s. An example
of two LTM8033 configured for load sharing is given in
the Typical Applications section.
2.2
2.4
Operating Frequency Trade-Offs
It is recommended that the user apply the optimal R
T
value given in Table 1 for the input and output operating
condition. System level or other considerations, however,
may necessitate another operating frequency. While the
LTM8033 is flexible enough to accommodate a wide range
of operating frequencies, a haphazardly chosen one may
result in undesirable operation under certain operating or
fault conditions. A frequency that is too high can reduce
efficiency, generate excessive heat or even damage the
LTM8033 if the output is overloaded or short-circuited.
A frequency that is too low can result in a final design
that has too much output ripple or too large of an output
capacitor.
Burst Mode Operation
To enhance efficiency at light loads, the LTM8033 auto-
matically switches to Burst Mode operation which keeps
the output capacitor charged to the proper voltage while
minimizingtheinputquiescentcurrent.DuringBurstMode
operation, the LTM8033 delivers single cycle bursts of
current to the output capacitor followed by sleep periods
wheretheoutputpowerisdeliveredtotheloadbytheoutput
capacitor. In addition, V and BIAS quiescent currents are
IN
reduced to typically 30μA and 75μA respectively during
the sleep time. As the load current decreases towards a
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no-loadcondition,thepercentageoftimethattheLTM8033
operates in sleep mode increases and the average input
current is greatly reduced, resulting in higher efficiency.
Soft-Start
The RUN/SS pin can be used to soft-start the LTM8033,
reducing the maximum input current during start-up. The
RUN/SS pin is driven through an external RC filter to cre-
ate a voltage ramp at this pin. Figure 2 shows the start-up
and shutdown waveforms with the soft-start circuit. By
choosing an appropriate RC time constant, the peak start-
up current can be reduced to the current that is required to
regulate the output, with no overshoot. Choose the value
of the resistor so that it can supply at least 20μA when
the RUN/SS pin reaches 2.5V.
BurstModeoperationisenabledbytyingSYNCtoGND. To
disable Burst Mode operation, tie SYNC to a stable voltage
above 0.7V. Do not leave the SYNC pin floating.
Minimum Input Voltage
The LTM8033 is a step-down converter, so a minimum
amount of headroom is required to keep the output in
regulation. In addition, the input voltage required to turn
on is higher than that required to run, and depends upon
BIAS power whether RUN/SS is used. If BIAS is available
Frequency Foldback
The LTM8033 is equipped with frequency foldback which
actstoreducethethermalandenergystressontheinternal
power elements during a short-circuit or output overload
condition.IftheLTM8033detectsthattheoutputhasfallen
out of regulation, the switching frequency is reduced as a
function of how far the output is below the target voltage.
Thisinturnlimitstheamountofenergythatcanbedelivered
totheloadunderfault. Duringthestart-uptime, frequency
foldback is also active to limit the energy delivered to the
potentially large output capacitance of the load.
before V
ramps up, the minimum V voltage to start
OUT
IN
may be reduced. As shown in the Typical Performance
Characteristics section, the minimum input voltage to
run a 3.3V output at light load is only about 3.6V, but, if
RUN/SS is pulled up to V , it takes 5.6V to start. If the
IN
IN
LTM8033 is enabled with the RUN/SS pin, the minimum
voltage to start at light loads is lower, about 4.2V. Similar
curves detailing this behavior of the LTM8033 for other
outputs are also included in the Typical Performance
Characteristics section.
RUN
INTERNAL
INDUCTOR
CURRENT
1A/DIV
15k
RUN/SS
GND
0.22µF
V
RUN/SS
2V/DIV
V
OUT
2V/DIV
8033 F02
2ms/DIV
Figure 2. To Soft-Start the LTM8033, Add a Resistor and Capacitor to the RUN/SS Pin
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Synchronization
Shorted Input Protection
The internal oscillator of the LTM8033 can be synchro-
nized by applying an external 250kHz to 2MHz clock to
the SYNC pin. Do not leave this pin floating. Ground the
SYNC pin if the synchronization function is not used.
Care needs to be taken in systems where the output will be
held high when the input to the LTM8033 is absent. This
may occur in battery charging applications or in battery
backup systems where a battery or some other supply is
When synchronizing the LTM8033, select an R resistor
diode OR-ed with the LTM8033’s output. If the V pin is
T
IN
value that corresponds to an operating frequency 20%
lower than the intended synchronization frequency (see
the Frequency Selection section).
allowed to float and the RUN/SS pin is held high (either
by a logic signal or because it is tied to V ), then the
IN
LTM8033’s internal circuitry will pull its quiescent current
throughitsinternalpowerswitch.Thisisfineifyoursystem
can tolerate a few milliamps in this state. If you ground the
RUN/SS pin, the SW pin current will drop to essentially
Inadditiontosynchronization,theSYNCpincontrolsBurst
Mode behavior. If the SYNC pin is driven by an external
clock, or pulled up above 0.7V, the LTM8033 will not en-
ter Burst Mode operation, but will instead skip pulses to
maintain regulation instead.
zero. However, if the V pin is grounded while the output
IN
is held high, then parasitic diodes inside the LTM8033 can
pull large currents from the output through the V pin.
IN
Figure 3 shows a circuit that will run only when the input
voltage is present and that protects against a shorted or
reversed input.
LTM8033
V
IN
V
OUT
V
V
OUT
IN
RUN/SS
AUX
BIAS
SHARE
ADJ
RT SYNC GND
8033 F03
Figure 3. The Input Diode Prevents a Shorted Input from Discharging
a Backup Battery Tied to the Output. It Also Protects the Circuit from a
Reversed Input. The LTM8033 Runs Only When the Input is Present
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PCB Layout
4. Place the C , C and C
capacitors such that their
OUT
IN FIN
ground currents flow directly adjacent or underneath
Most of the headaches associated with PCB layout have
been alleviated or even eliminated by the high level of
integration of the LTM8033. The LTM8033 is neverthe-
less a switching power supply, and care must be taken to
minimize EMI and ensure proper operation. Even with the
high level of integration, you may fail to achieve specified
operation with a haphazard or poor layout. See Figure 4
for a suggested layout. Ensure that the grounding and
heat sinking are acceptable.
the LTM8033.
5. Connect all of the GND connections to as large a copper
pour or plane area as possible on the top layer. Avoid
breaking the ground connection between the external
components and the LTM8033.
6. Use vias to connect the GND copper area to the board’s
internal ground planes. Liberally distribute these GND
vias to provide both a good ground connection and
thermal path to the internal planes of the printed circuit
board. Pay attention to the location and density of the
thermal vias in Figure 4. The LTM8033 can benefit from
theheatsinkingaffordedbyviasthatconnecttointernal
GND planes at these locations, due to their proximity
to internal power handling components. The optimum
number of thermal vias depends upon the printed
circuit board design. For example, a board might use
very small via holes. It should employ more thermal
vias than a board that uses larger holes.
A few rules to keep in mind are:
1. Place the R
and R resistors as close as possible to
T
ADJ
their respective pins.
2. Place the C and C capacitors as close as possible
IN
FIN
to the V , FIN and GND connections of the LTM8033.
IN
A haphazardly placed C capacitor may impair EMI
FIN
performance.
3. Place the C
capacitors as close as possible to the
OUT
V
OUT
and GND connection of the LTM8033.
PG SYNC
FIN
GND
RUN/SS
R
ADJ
C
FIN
R
T
SHARE
GND
LTM8033
BIAS
AUX
C
C
IN
OUT
V
GND
V
IN
OUT
THERMAL VIAS TO GND
Figure 4. Layout Showing Suggested External
Components, GND Plane and Thermal Vias
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Hot-Plugging Safely
conditions as a whole, of which the LTM8033 is typically
only a component, so conducted emissions are not ad-
dressed at this level.
The small size, robustness and low impedance of ceramic
capacitors make them an attractive option for the input
bypass capacitor of LTM8033. However, these capacitors
can cause problems if the LTM8033 is plugged into a live
supply (see Application Note 88 for a complete discus-
sion). The low loss ceramic capacitor combined with
stray inductance in series with the power source forms an
Thermal Considerations
The LTM8033 output current may need to be derated if it
is required to operate in a high ambient temperature or
deliver a large amount of continuous power. The amount
of current derating is dependent upon the input voltage,
output power and ambient temperature. The temperature
rise curves given in the Typical Performance Charac-
teristics section can be used as a guide. These curves
underdamped tank circuit, and the voltage at the V pin
IN
of the LTM8033 can ring to more than twice the nominal
inputvoltage,possiblyexceedingtheLTM8033’sratingand
damagingthepart.Asimilarphenomenoncanoccurinside
the LTM8033 module, at the output of the integrated EMI
filter (FIN), with the same potential of damaging the part.
If the input supply is poorly controlled or the user will be
plugging the LTM8033 into an energized supply, the input
network should be designed to prevent this overshoot.
This can be accomplished by installing a small resistor
2
were generated by an LTM8033 mounted to a 40cm
4-layer FR4 printed circuit board. Boards of other sizes
and layer count can exhibit different thermal behavior, so
it is incumbent upon the user to verify proper operation
over the intended system’s line, load and environmental
operating conditions.
in series to V , but the most popular method of control-
IN
The thermal resistance numbers listed in the Pin Con-
figuration are based on modeling the µModule package
mounted on a test board specified per JESD51-9 “Test
Boards for Area Array Surface Mount Package Thermal
Measurements.” The thermal coefficients provided in this
page are based on JESD 51-12 “Guidelines for Reporting
and Using Electronic Package Thermal Information.”
ling input voltage overshoot is adding an electrolytic bulk
capacitor to the V or FIN net. This capacitor’s relatively
IN
high equivalent series resistance damps the circuit and
eliminates the voltage overshoot. The extra capacitor
improves low frequency ripple filtering and can slightly
improve the efficiency of the circuit, though it can be a
large component in the circuit.
Forincreasedaccuracyandfidelitytotheactualapplication,
many designers use FEA to predict thermal performance.
To that end, the Pin Configuration typically gives four
thermal coefficients:
Electromagnetic Compliance
The LTM8033 was evaluated by an independent nation-
ally recognized test lab and found to be compliant with
EN 55022 class B: 2006 by a wide margin. Sample graphs
oftheLTM8033’sradiatedEMCperformancearegiveninthe
TypicalPerformanceCharacteristicssection,whilefurther
data, operating conditions and test set-up are detailed in
the electromagnetic compatibility test report, available
on the Linear Technology website. Conducted emissions
requirements may be met by adding an appropriate input
power line filter. The proper implementation of this filter
depends upon the system operating and performance
• θ – Thermal resistance from junction to ambient.
JA
• θ
– Thermal resistance from junction to the
JCBOTTOM
bottom of the product case.
• θ
– Thermal resistance from junction to top of
JCTOP
the product case.
• θ – Thermal resistance from junction to the printed
JB
circuit board.
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For more information www.linear.com/LTM8033
LTM8033
APPLICATIONS INFORMATION
While the meaning of each of these coefficients may seem
to be intuitive, JEDEC has defined each to avoid confu-
sion and inconsistency. These definitions are given in
JESD 51-12, and are quoted or paraphrased in the fol-
lowing:
• θ is the junction-to-board thermal resistance where
JB
almost all of the heat flows through the bottom of the
µModule and into the board, and is really the sum of
the θ
and the thermal resistance of the bottom
JCBOTTOM
of the part through the solder joints and through a por-
tion of the board. The board temperature is measured a
specified distance from the package, using a two sided,
two layer board. This board is described in JESD 51-9.
• θ is the natural convection junction-to-ambient air
JA
thermal resistance measured in a one cubic foot sealed
enclosure.Thisenvironmentissometimesreferredtoas
“still air” although natural convection causes the air to
move. Thisvalueisdeterminedwiththepartmountedto
a JESD 51-9 defined test board, which does not reflect
an actual application or viable operating condition.
The most appropriate way to use the coefficients is when
running a detailed thermal analysis, such as FEA, which
considers all of the thermal resistances simultaneously.
None of them can be individually used to accurately pre-
dict the thermal performance of the product, so it would
be inappropriate to attempt to use any one coefficient to
correlate to the junction temperature versus load graphs
given in the LTM8033 data sheet.
• θ
is the junction-to-board thermal resistance
JCBOTTOM
with all of the component power dissipation flowing
through the bottom of the package. In the typical
µModule, the bulk of the heat flows out the bottom of
the package, but there is always heat flow out into the
ambientenvironment.Asaresult,thisthermalresistance
valuemaybeusefulforcomparingpackagesbutthetest
conditions don’t generally match the user’s application.
A graphical representation of these thermal resistances
is given in Figure 5.
The blue resistances are contained within the µModule,
and the green are outside.
• θ
is determined with nearly all of the component
JCTOP
The die temperature of the LTM8033 must be lower than
the maximum rating of 125°C, so care should be taken
in the layout of the circuit to ensure good heat sinking
of the LTM8033. The bulk of the heat flow out of the
LTM8033isthroughthebottomofthemoduleandtheLGA
pads into the printed circuit board. Consequently a poor
printed circuit board design can cause excessive heating,
resulting in impaired performance or reliability. Please
power dissipation flowing through the top of the pack-
age.AstheelectricalconnectionsofthetypicalµModule
are on the bottom of the package, it is rare for an ap-
plication to operate such that most of the heat flows
from the junction to the top of the part. As in the case
of θ
, this value may be useful for comparing
JCBOTTOM
packages but the test conditions don’t generally match
the user’s application.
JUNCTION-TO-AMBIENT RESISTANCE (JESD 51-9 DEFINED BOARD)
JUNCTION-TO-CASE (TOP)
RESISTANCE
CASE (TOP)-TO-AMBIENT
RESISTANCE
JUNCTION-TO-BOARD RESISTANCE
JUNCTION
A
t
JUNCTION-TO-CASE
(BOTTOM) RESISTANCE
CASE (BOTTOM)-TO-BOARD
BOARD-TO-AMBIENT
RESISTANCE
RESISTANCE
8033 F05
µMODULE REGULATOR
Figure 5
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For more information www.linear.com/LTM8033
LTM8033
APPLICATIONS INFORMATION
refer to the PCB Layout section for printed circuit board
design suggestions.
to temperatures above the 125°C rating for prolonged
or repetitive intervals, which may damage or impair the
reliability of the device.
The LTM8033 is equipped with a thermal shutdown that
willinhibitpowerswitchingathighjunctiontemperatures.
Theactivationthresholdofthisfunction,however,isabove
125°C to avoid interfering with normal operation. Thus,
it follows that prolonged or repetitive operation under a
condition in which the thermal shutdown activates neces-
sarily means that the internal components are subjected
Finally, be aware that at high ambient temperatures the
internal Schottky diode will have significant leakage cur-
rent(seetheTypicalPerformanceCharacteristicssection)
increasing the quiescent current of the LTM8033.
TYPICAL APPLICATIONS
0.8V Step-Down Converter
LTM8033
V
V
0.8V
3A
IN
OUT
V
V
OUT
IN
3.6V TO 15V
4.7µF
400µF
BIAS
AUX
RUN/SS
FIN
PGOOD
10µF
SHARE
RT SYNC GND ADJ
8033 TA02
182k
30M
f = 230kHz
1.8V Step-Down Converter
LTM8033
V
V
1.8V
3A
IN
OUT
V
V
OUT
IN
3.6V TO 36V
4.7µF
400µF
2.8V TO 25V
10µF
BIAS
AUX
RUN/SS
FIN
PGOOD
SHARE
RT SYNC GND ADJ
8033 TA03
147k
383k
f = 285kHz
NOTE: DO NOT ALLOW V + BIAS TO BE GREATER THAN 56V.
IN
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For more information www.linear.com/LTM8033
LTM8033
TYPICAL APPLICATIONS
2.5V Step-Down Converter
LTM8033
V
*
V
2.5V
3A
IN
OUT
V
V
OUT
IN
4.1V TO 36V
4.7µF
300µF
SHARE
BIAS
AUX
2.8V to 25V
10µF
RUN/SS
FIN
PGOOD
RT SYNC GND ADJ
8033 TA04
118k
226k
f = 345kHz
NOTE: DO NOT ALLOW V + BIAS TO BE GREATER THAN 56V.
IN
* RUNNING VOLTAGE RANGE. PLEASE REFER TO THE
APPLICATIONS INFORMATION SECTION FOR START-UP DETAILS.
5V Step-Down Converter
LTM8033
V
V
5V
3A
IN
OUT
V
V
OUT
IN
7.5V TO 36VDC
100µF
SHARE
RUN/SS
FIN
AUX
BIAS
PGOOD
4.7µF
RT SYNC GND ADJ
93.1k
4.7µF
76.8k
8033 TA05
f = 500kHz
8V Step-Down Converter
LTM8033
V
*
V
8V
3A
IN
OUT
V
V
OUT
IN
11V TO 36V
4.7µF
SHARE
RUN/SS
FIN
AUX
BIAS
PGOOD
47µF
1µF
RT SYNC GND ADJ
54.9k
52.3k
f = 700kHz
8033 TA06
* RUNNING VOLTAGE RANGE. PLEASE REFER TO THE
APPLICATIONS INFORMATION SECTION FOR START-UP DETAILS.
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20
For more information www.linear.com/LTM8033
LTM8033
TYPICAL APPLICATIONS
Current Sharing Two LTM8033 Parts
LTM8033
V
*
V
2.5V
5.8A
IN
OUT
V
V
OUT
IN
4.8V TO 36V
FIN
AUX
BIAS
10µF
RUN/SS
SHARE
PGOOD
4.7µF
RT SYNC GND ADJ
137k
113k
2.8V to 25V
OPTIONAL
SYNCHRONIZATION
CLOCK
LTM8033
V
V
OUT
IN
FIN
AUX
BIAS
RUN/SS
SHARE
PGOOD
300µF
10µF
4.7µF
RT SYNC GND ADJ
137k
8033 TA07
* RUNNING VOLTAGE RANGE. PLEASE REFER TO THE APPLICATIONS
INFORMATION SECTION FOR START-UP DETAILS.
NOTE: SYNCHRONIZE THE TWO MODULES TO AVOID BEAT
FREQUENCIES, IF NECESSARY. OTHERWISE, TIE EACH SYNC TO GND.
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For more information www.linear.com/LTM8033
LTM8033
PACKAGE DESCRIPTION
Pin Assignment Table
(Arranged by Pin Number)
PIN
A1
A2
A3
A4
A5
A6
A7
A8
NAME
PIN
B1
B2
B3
B4
B5
B6
B7
B8
NAME
PIN
C1
C2
C3
C4
C5
C6
C7
C8
NAME
PIN
D1
D2
D3
D4
D5
D6
D7
D8
NAME
PIN
E1
E2
E3
E4
E5
E6
E7
E8
NAME
GND
GND
GND
GND
GND
GND
GND
GND
PIN
F1
F2
F3
F4
F5
F6
F7
F8
NAME
GND
GND
GND
GND
GND
GND
GND
GND
V
OUT
V
OUT
V
OUT
V
OUT
V
OUT
V
OUT
V
V
V
V
OUT
V
OUT
V
OUT
OUT
OUT
OUT
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
SHARE
ADJ
RT
PGOOD
SYNC
GND
PIN
G1
G2
G3
G4
G5
G6
G7
G8
NAME
GND
GND
AUX
PIN
NAME
PIN
J1
NAME
PIN
K1
K2
K3
NAME
PIN
L1
NAME
V
IN
V
IN
V
IN
V
IN
V
IN
V
IN
V
V
V
IN
IN
IN
J2
L2
J3
L3
BIAS
GND
GND
GND
RUN
H5
H6
GND
GND
J5
J6
GND
GND
K5
K6
GND
GND
L5
L6
GND
GND
J8
FIN
K8
FIN
L8
FIN
PACKAGE PHOTOGRAPHS
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For more information www.linear.com/LTM8033
LTM8033
PACKAGE DESCRIPTION
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
Z
b b b
Z
4 . 4 4 5
3 . 1 7 5
1 . 9 0 5
0 . 6 3 5
0 . 6 3 5
1 . 9 0 5
3 . 1 7 5
4 . 4 4 5
a a a
Z
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23
For more information www.linear.com/LTM8033
LTM8033
PACKAGE DESCRIPTION
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
Z
/ / b b b
Z
4 . 4 4 5
3 . 1 7 5
1 . 9 0 5
0 . 6 3 5
0 . 6 3 5
0 . 0 0 0
1 . 9 0 5
3 . 1 7 5
4 . 4 4 5
a a a
Z
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24
For more information www.linear.com/LTM8033
LTM8033
REVISION HISTORY
REV
DATE
DESCRIPTION
PAGE NUMBER
A
04/14 Add BGA package option
1, 2, 22, 24
B
09/14 BGA ball A1 was missing, corrected
2
Changed quiescent current V and BIAS from 20µA and 50µA to 30µA and 75µA, respectively
13
IN
8033fb
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
25
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
LTM8033
TYPICAL APPLICATION
3.3V Step-Down Converter
LTM8033
V
V
3.3V
3A
IN
OUT
V
V
OUT
IN
5.5V TO 36VDC
100µF
SHARE
RUN/SS
FIN
AUX
BIAS
PGOOD
4.7µF
RT SYNC GND ADJ
10µF
93.1k
8033 TA08
154k
f = 425kHz
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
LTM8031
Ultralow Noise EMC 1A µModule Regulator
EN55022 Class B Compliant, 3.6V ≤ V ≤ 36V; 0.8V ≤ V
≤ 10V,
≤ 10V
IN
OUT
OUT
9mm × 15mm × 2.82mm LGA
LTM8032
LTM4613
LTM4612
LTM4624
Ultralow Noise EMC 2A µModule Regulator
EN55022 Class B Compliant, 3.6V ≤ V ≤ 36V; 0.8V ≤ V
IN
9mm × 15mm × 2.82mm LGA and 9mm × 15mm × 3.42mm BGA
36V , 8A EN55022 Class B Certified DC/DC
5V ≤ V ≤ 36V, 3.3V ≤ V
≤ 15V, PLL Input, V
Tracking and Margining,
Tracking and Margining,
IN
IN
OUT
OUT
Step-Down μModule Regulator
15mm × 15mm × 4.32mm LGA
36V , 5A EN55022 Class B Certified DC/DC
5V ≤ V ≤ 36V, 3.3V ≤ V ≤ 15V, PLL Input, V
IN
IN
OUT
OUT
Step-Down μModule Regulator
15mm × 15mm × 2.82mm LGA
14V , 4A Step-Down μModule Regulator in
4V ≤ V ≤ 14V, 0.6V ≤ V
≤ 5.5V, V
Tracking, PGOOD, Light Load Mode,
OUT
IN
IN
OUT
2
tiny 6.25mm × 6.25mm × 5.01mm BGA
Complete Solution in 1cm (Single-Sided PCB)
8033fb
LT 0914 REV B • PRINTED IN USA
LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
26
(408)432-1900 FAX: (408) 434-0507 www.linear.com/LTM8033
●
●
© LINEAR TECHNOLOGY CORPORATION 2010
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