LTP5902IPC-WHMAXXX#PBF [Linear]
IC SPECIALTY TELECOM CIRCUIT, Telecom IC:Other;
| 型号： | LTP5902IPC-WHMAXXX#PBF |
| 厂家： | 
Linear |
| 描述： | IC SPECIALTY TELECOM CIRCUIT, Telecom IC:Other 电信 电信集成电路 |
| 文件： | 总32页 (文件大小：2291K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Electrical Specifications Subject to Change
LTP5901-WHM/LTP5902-WHM
SmartMesh WirelessHART Node
Wireless Mote Module
neTwork FeaTures
DescripTion
n
Complete Radio Transceiver, Embedded Processor,
and Networking Software for Forming a Self-Healing
Mesh Network
SmartMesh WirelessHART wireless sensor networks are
self managing, low power networks built from wireless
nodescalledmotes.TheLTP™5901-WHM/LTP5902-WHM
is the WirelessHART mote product in the Eterna®* family
ofIEEE802.15.4printedcircuitboardassemblysolutions,
featuring a highly-integrated, low power radio design by
Dust Networks® as well as an ARM Cortex-M3 32-bit
microprocessor running Dust’s embedded SmartMesh
WirelessHART networking software. Both the LTP5901-
WHM (with chip antenna), at 24mm × 42mm, and the
LTP5902-WHM(withMMCXconnector),at24mm× 37mm,
are designed for surface mount assembly.
n
n
Compliant to WirelessHART (IEC62591) Standard
SmartMesh® Networks Incorporate:
n
Time synchronized Network-Wide Scheduling
n
Per Transmission Frequency Hopping
n
Redundant Spatially Diverse Topologies
n
Network-Wide Reliability and Power Optimization
n
NIST Certified Security
n
SmartMesh Networks Deliver:
n
>99.999% Network Reliability Achieved in the
Most Challenging Dynamic RF Environments Often
Found in Industrial Applications
WithDust’stime-synchronizedWirelessHARTnetworks,all
motes in the network may route, source or terminate data,
while providing many years of battery powered operation.
The SmartMesh WirelessHART software provided with
the LTP5901/2-WHM is fully tested and validated, and is
readilyconfiguredviaasoftwareApplicationProgramming
Interface (API).
n
Sub 50µA Routing Nodes
lTp5901/2-wHM FeaTures
n
Industry-leading low power radio technology with:
n
4.5mA to receive a packet
n
5.4mA to transmit at 0dBm
SmartMesh WirelessHART motes deliver a highly flexible
networkwithprovenreliabilityandlowpowerperformance
in an easy-to-integrate platform.
n
9.7mA to transmit at 8dBm
n
RF modular certifications include USA, Canada, EU,
Japan, Taiwan, Korea, India, Australia and New Zealand
L, LT, LTC, LTM, Eterna, SmartMesh, Linear Technology, the Linear logo, Dust and Dust
Networks are registered trademarks and LTP and the Dust Networks logo are trademarks
of Linear Technology Corporation. All other trademarks are the property of their respective
owners. Protected by U.S. Patents, including 7375594, 7420980, 7529217, 7791419, 7881239,
7898322, 8222965.
n
PCB assembly with chip antenna (LTP5901-WHM)
or with MMCX antenna connector (LTP5902-WHM).
QFN version (LTC®5800-WHM) available
* Eterna is Dust Networks’ low power radio SoC architecture.
Typical applicaTion
LTP5901-WHM
MANAGER
EXPANDED VIEW
LTP5903-WHR
ANTENNA
MOTE
MOTE
IN+
UART
LTC2379-18 SPI
IN–
UART
ETHERNET
SENSOR
µCONTROLLER
HOST
APPLICATION
MOTE
MOTE
MOTE
59012 TA01
59012whmp
1
LINEAR TECHNOLOGY CONFIDENTIAL
LTP5901-WHM/LTP5902-WHM
Table oF conTenTs
Network Features .......................................... 1
LTP5901/2-WHM FEATURES.............................. 1
Typical Application ........................................ 1
Description.................................................. 1
Smartmesh Network Overview........................... 3
Absolute Maximum Ratings.............................. 4
Pin Configuration .......................................... 4
Order Information.......................................... 5
Recommended Operating Conditions................... 5
DC Characteristics......................................... 5
Radio Specifications ...................................... 6
Radio Receiver Characteristics.......................... 6
Radio Transmitter Characteristics....................... 7
Digital I/O Characteristics ................................ 7
Temperature Sensor Characteristics.................... 8
Analog Input Chain Characteristics ..................... 8
System Characteristics ................................... 8
UART AC Characteristics.................................. 9
TIMEn AC Characteristics................................10
Radio Inhibit AC Characteristics........................10
Flash AC Characteristics.................................11
Flash SPI Slave AC Characteristics ....................11
Typical Performance Characteristics ..................13
Pin Functions..............................................17
Operation...................................................21
Power Supply..........................................................21
Supply Monitoring and Reset .................................21
Precision Timing.....................................................21
Application Time Synchronization ..........................23
Time References.....................................................23
Radio ......................................................................23
UARTs.....................................................................23
Autonomous MAC...................................................24
Security ..................................................................25
Temperature Sensor ...............................................25
Radio Inhibit ...........................................................25
Flash Data Retention...............................................25
State Diagram.........................................................26
Applications Information ................................28
Regulatory and Standards Compliance...................28
Soldering Information.............................................28
Related Documentation..................................29
Package Description .....................................30
Typical Application .......................................32
Related Parts..............................................32
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LINEAR TECHNOLOGY CONFIDENTIAL
LTP5901-WHM/LTP5902-WHM
sMarTMesH neTwork overview
ASmartMeshnetworkconsistsofaself-formingmulti-hop,
mesh of nodes, known as motes, which collect and relay
data, and a Network Manager that monitors and manages
network performance and security, and exchanges data
with a host application.
The Network Manager uses health reports to continually
optimizethenetworktomaintain>99.999%datareliability
even in the most challenging RF environments.
The use of TSCH allows SmartMesh devices to sleep in-
between scheduled communications and draw very little
power in this state. Motes are only active in timeslots
where they are scheduled to transmit or receive, typically
resulting in a duty cycle of < 1%. The optimization soft-
ware in the Network Manager coordinates this schedule
automatically. When combined with the Eterna low power
radio, every mote in a SmartMesh network – even busy
routing ones – can run on batteries for years. By default,
all motes in a network are capable of routing traffic from
other motes, which simplifies installation by avoiding the
complexity of having distinct routers vs. non-routing end
nodes. Motesmaybeconfiguredasnon-routingtofurther
reduce that particular mote’s power consumption and to
support a wide variety of network topologies.
SmartMesh networks communicate using a Time Slotted
Channel Hopping (TSCH) link layer, pioneered by Dust
Networks. In a TSCH network, all motes in the network
are synchronized to within less than a millisecond. Time
in the network is organized into timeslots, which enables
collision-free packet exchange and per-transmission
channel-hopping. In a SmartMesh network, every device
has one or more parents (e.g. mote 3 has motes 1 and
2 as parents) that provide redundant paths to overcome
communicationsinterruptionduetointerference,physical
obstruction or multi-path fading. If a packet transmission
fails on one path, the next retransmission may try on a
different path and different RF channel.
Anetworkbeginstoformwhenthenetworkmanagerinstructs
its on-board Access Point (AP) radio to begin sending ad-
vertisements - packets that contain information that enables
a device to synchronize to the network and request to join.
This message exchange is part of the security handshake
that establishes encrypted communications between the
manager or application, and mote. Once motes have joined
the network, they maintain synchronization through time
corrections when a packet is acknowledged.
ALL NODES ARE ROUTERS.
THEY CAN TRANSMIT AND RECEIVE.
THIS NEW NODE CAN JOIN
ANYWHERE BECAUSE ALL
NODES CAN ROUTE.
HOST
APPLICATION
SNO 02
At the heart of SmartMesh motes and network manag-
ers is the Eterna IEEE 802.15.4e System-on-Chip (SoC),
featuring Dust Networks’ highly-integrated, low power
radio design, plus an ARM Cortex-M3 32-bit micropro-
cessor running SmartMesh networking software. The
SmartMesh networking software comes fully compiled
yet is configurable via a rich set of Application Program-
ming Interfaces (APIs) which allows a host application
to interact with the network, e.g. to transfer information
to a device, to configure data publishing rates on one or
more motes, or to monitor network state or performance
metrics. Data publishing can be uniform or different for
each device, with motes being able to publish infrequently
NETWORK MANAGER
AP
Mote
1
Mote
2
Mote
3
SNO 01
An ongoing discovery process ensures that the network
continually discovers new paths as the RF conditions
change. In addition, each mote in the network tracks per-
formance statistics (e.g. quality of used paths, and lists of
potential paths) and periodically sends that information
to the network manager in packets called health reports.
or faster than once per second as needed.
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3
LINEAR TECHNOLOGY CONFIDENTIAL
LTP5901-WHM/LTP5902-WHM
absoluTe MaxiMuM raTings
(Note 1, Note 2)
Supply Voltage on VSUPPLY..................................3.76V
Input Voltage on AI_0/1/2/3 Inputs.........................1.80V
Voltage on any Digital I/O Pin .... –0.3V to VSUPPLY +0.3V
Input RF Level......................................................10dBm
Storage Temperature Range (Note 3)..... –55°C to 105°C
Operating Temperature Range
LTP5901I/LPT5902I.............................–40°C to 85°C
CAUTION: This part is sensitive to electrostatic discharge
(ESD). It is very important that proper ESD precautions be
observed when handling the LTP5901/LTP5902-WHM.
pin conFiguraTion Pin functions shown in italics are currently not supported in software.
1
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
GND
GND
2
RESERVED
NC
3
NC
RADIO_INHIBIT / GPIO15
TIMEn / GPIO1
UART_TX
4
GPIO17
GPIO18
GPIO19
AI_2
5
6
UART_TX_CTSn
UART_TX_RTSn
UART_RX
7
8
AI_1
9
AI_3
UART_RX_CTSn
UART_RX_RTSn
GND
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
AI_0
GND
RESERVED
VSUPPLY
NC
RESERVED
NC
NC
RESETn
NC
TDI
FLASH_P_ENn / GPIO2
SPIS_SSn / SDA
SPIS_SCK / SCL
SPIS_MOSI / GPIO26 / UARTC1_RX
SPIS_MISO / 1_WIRE / UARTC1_TX
PWM0 / GPIO16
DP1 (GPIO20) / TIMER16_IN
SPIM_SS_0n / GPIO12
SPIM_SS_1n / GPIO13
GND
TDO
TMS
TCK
GND
DP4 (GPIO23)
RESERVED
RESERVED
RESERVED
DP3 (GPIO22) / TIMER8_IN
DP2 (GPIO21) / LPTIMER_IN
SLEEPn / GPIO14
DP0 (GPIO0) / SPIM_SS_2n
NC
SPIM_SCK / GPIO9
SPIM_MOSI / GPIO10
IPCS_SSn / GPIO3
SPIM_MISO / GPIO11
GND
GND
31 32 33
34 35 36
PC PACKAGE
66-LEAD PCB
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LINEAR TECHNOLOGY CONFIDENTIAL
LTP5901-WHM/LTP5902-WHM
orDer inForMaTion
LEAD FREE FINISH**
PART MARKING*
PACKAGE DESCRIPTION
TEMPERATURE RANGE
–40°C to 85°C
LTP5901IPC-WHMA???#PBF LTP5901IPC-WHMA???#PBF
LTP5902IPC-WHMA???#PBF LTP5901IPC-WHMA???#PBF
66-Lead (42mm × 24mm × 5.5mm) PCB with Chip Antenna
–40°C to 85°C
66-Lead (37.5mm × 24mm × 5.5mm) PCB with MMCX
Connector
*The temperature grade is identified by a lable on the shipping container.
**The sofware version is indicated by ???. For specific ordering information go to: http://www.linear.com/LTP5901-WHM#orderinfo or
http://www.linear.com/LTP5902-WHM#orderinfo
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
recoMMenDeD operaTing conDiTions The l denotes the specifications which apply
over the full operating temperature range, otherwise specifications are at TA = 25°C and VSUPPLY = 3.6V unless otherwise noted.
SYMBOL PARAMETER
VSUPPLY Supply Voltage
Supply Noise
CONDITIONS
MIN
TYP
MAX
3.76
250
90
UNITS
V
l
l
l
l
Including Noise and Load Regulation
50Hz to 2MHz
2.1
mV
Operating Relative Humidity
Non-Condensing
10
–8
%RH
°C/Min
Temperature Ramp Rate While Operating
in Network
8
Dc cHaracTerisTics The l denotes the specifications which apply over the full operating temperature range,
otherwise specifications are at TA = 25°C and VSUPPLY = 3.6V unless otherwise noted
.
OPERATION/STATE
CONDITIONS
MIN
TYP
MAX
UNITS
Power-on Reset
During Power-on Reset, Maximum 750µs + VSUPPLY Rise
Time from 1V to 1.9V
12
mA
Doze
RAM on, ARM Cortex-M3, Flash, Radio, and Peripherals Off,
All Data and State Retained, 32.768kHz Reference Active
1.2
0.8
20
µA
µA
Deep Sleep
RAM on, ARM Cortex-M3, Flash, Radio, and Peripherals Off,
All Data and State Retained, 32.768kHz Reference Inactive
In-circuit Programming
RESETn and FLASH_P_ENn Asserted, IPCS_SCK at 8MHz
mA
Peak Operating Current
+8dBm
System Operating at 14.7MHz, Radio Transmitting, During
Flash Write. Maximum duration 4.33 ms.
30
26
mA
mA
+0dBm
Active
ARM Cortex M3, RAM and Flash Operating, Radio and All
Other Peripherals Off. Clock Frequency of CPU and Peripherals
Set to 7.3728MHz, VCORE = 1.2V
1.3
mA
Flash Write
Flash Erase
Single Bank Flash Write
3.7
2.5
mA
mA
Single Bank Page or Mass Erase
Radio Tx
+0dBm
+8dBm
Current With Autonomous MAC Managing Radio Operation,
CPU Inactive. Clock Frequency of CPU and Peripherals Set to
7.3728MHz.
5.4
9.7
mA
mA
Radio Rx
Current With Autonomous MAC Managing Radio Operation,
CPU Inactive. Clock Frequency of CPU and Peripherals Set to
7.3728MHz.
4.5
mA
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LINEAR TECHNOLOGY CONFIDENTIAL
LTP5901-WHM/LTP5902-WHM
raDio speciFicaTions The l denotes the specifications which apply over the full operating temperature
range, otherwise specifications are at TA = 25°C and VSUPPLY = 3.6V unless otherwise noted
.
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
l
l
l
l
l
Frequency Band
2.4000
2.4835
GHz
Number of Channels
Channel Separation
Channel Center Frequency
Raw Data Rate
15
5
MHz
MHz
kbps
V
Where k = 11 to 25, as Defined by IEEE.802.4.15
HBM Per JEDEC JESD22-A114F
2405 + 5•(k-11)
250
Antenna Pin ESD Protection
6000
Range (Note 4)
Indoor
25°C, 50% RH, +2dBi Omni-Directional Antenna, Antenna 2m
Above Ground
100
300
1200
m
m
m
Outdoor
Free Space
raDio receiver cHaracTerisTics The l denotes the specifications which apply over the full
operating temperature range, otherwise specifications are at TA = 25°C and VSUPPLY = 3.6V unless otherwise noted
.
PARAMETER
CONDITIONS
MIN
TYP
–93
–95
0
MAX
UNITS
dBm
dBm
dBm
Receiver Sensitivity
Receiver Sensitivity
Saturation
Packet Error Rate (PER) = 1% (Note 5)
PER = 50%
Maximum Input Level the Receiver Will
Properly Receive Packets
Adjacent Channel Rejection (High Side)
Adjacent Channel Rejection (Low Side)
Alternate Channel Rejection (High Side)
Alternate Channel Rejection (Low Side)
Second Alternate Channel Rejection
Co-Channel Rejection
Desired Signal at –82dBm, Adjacent Modulated Channel 5MHz
Above the Desired Signal, PER = 1% (Note 5)
Desired Signal at –82dBm, Adjacent Modulated Channel 5MHz
Below the Desired Signal, PER = 1% (Note 5)
Desired Signal at –82dBm, Alternate Modulated Channel
10MHz Above the Desired Signal, PER = 1% (Note 5)
Desired Signal at –82dBm, Alternate Modulated Channel
10MHz Below the Desired Signal, PER = 1% (Note 5)
Desired Signal at –82dBm, Second Alternate Modulated
Channel Either 15MHz Above or Below, PER = 1% (Note 5)
Desired Signal at –82dBm, Undesired Signal is an 802.15.4
Modulated Signal at the Same Frequency, PER = 1%
22
19
40
36
42
–6
dBc
dBc
dBc
dBc
dBc
dBc
LO Feed Through
–55
50
dBm
ppm
ppm
dBm
Frequency Error Tolerance (Note 6)
Symbol Error Tolerance
50
Received Signal Strength Indicator (RSSI)
Input Range
–90 to –10
RSSI Accuracy
6
1
dB
dB
RSSI Resolution
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LINEAR TECHNOLOGY CONFIDENTIAL
LTP5901-WHM/LTP5902-WHM
raDio TransMiTTer cHaracTerisTics The l denotes the specifications which apply over the
full operating temperature range, otherwise specifications are at TA = 25°C and VSUPPLY = 3.6V unless otherwise noted
.
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Output Power
Delivered to a 50Ω load
High Calibrated Setting
8
0
dBm
dBm
Low Calibrated Setting
Spurious Emissions
Conducted Measurement with a 50Ω Single-ended Load,
+8dBm Output Power. All Measurements Made with Max
Hold.
30 MHz to 1000 MHz
R
BW
R
BW
R
BW
R
BW
R
BW
= 120kHz, V = 100Hz
<–70
–45
–37
–49
–45
dBm
dBm
dBm
dBm
dBc
BW
1 GHz to 12.75 GHz
= 1MHz, V = 3MHz
BW
2.4 GHz ISM Upper Band Edge (Peak)
2.4 GHz ISM Upper Band Edge (Average)
2.4 GHz ISM Lower Band Edge
= 1MHz, V = 3MHz
BW
= 1MHz, V = 10Hz
BW
= 100kHz, V = 100kHz
BW
Harmonic Emissions
2nd Harmonic
Conducted Measurement Delivered to a 50Ω Load,
Resolution Bandwidth = 1MHz, Video Bandwidth = 1MHz.
–50
–45
dBm
dBm
3rd Harmonic
DigiTal i/o cHaracTerisTics The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C and VSUPPLY = 3.6V unless otherwise noted
.
SYMBOL
PARAMETER
CONDITIONS
(Note 7)
MIN
TYP
MAX
UNITS
l
l
V
V
Low Level Input Voltage
High Level Input Voltage
–0.3
0.6
V
V
IL
(Note 8)
VSUPPLY
–0.3
VSUPPLY
+0.3
IH
l
l
V
V
Low Level Output Voltage
High Level Output Voltage
Type 1, I
Type 1, I
= 1.2mA
= -0.8mA
0.4
V
V
OL
OL(MAX)
VSUPPLY
–0.3
VSUPPLY
+0.3
OH
OH(MAX)
l
l
V
V
Low Level Output Voltage
High Level Output Voltage
Type 2, Low Drive, I
Type 2, Low Drive, I
= 2.2mA
0.4
V
V
OL
OL(MAX)
= –1.6mA
VSUPPLY
–0.3
VSUPPLY
+0.3
OH
OH(MAX)
l
l
V
V
Low Level Output Voltage
High Level Output Voltage
Type 2, High Drive, I
Type 2, High Drive, I
= 4.5mA
0.4
V
V
OL
OL(MAX)
= –3.2mA
VSUPPLY
–0.3
VSUPPLY
+0.3
OH
OH(MAX)
Input Leakage Current
Input Driven to VSUPPLY or GND
50
50
nA
Pull-Up / Pull-Down Resistance
kΩ
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LINEAR TECHNOLOGY CONFIDENTIAL
LTP5901-WHM/LTP5902-WHM
TeMperaTure sensor cHaracTerisTics The l denotes the specifications which apply over
the full operating temperature range, otherwise specifications are at TA = 25°C and VSUPPLY = 3.6V unless otherwise noted
.
PARAMETER
Offset
CONDITIONS
MIN
TYP
MAX
UNITS
°C
Temperature Offset Error at 25°C
0.25
0.033
Slope Error
°C/°C
analog inpuT cHain cHaracTerisTics The l denotes the specifications which apply over the
full operating temperature range, otherwise specifications are at TA = 25°C and VSUPPLY = 3.6V unless otherwise noted
.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Variable Gain Amplifier
Gain
1
8
2
Gain Error
%
Offset-Digital to Analog Converter (DAC)
Full-scale
1.80
4
V
Bits
mV
Resolution
DNL
Differential Non-Linearity
2.7
Analog to Digital Converter (ADC)
Full-scale, Signal
Resolution
1.80
1.8
V
mV
LSB
LSB
LSB
µs
Offset
Mid-Scale
1.4
12
1
DNL
INL
Differential Non-Linearity
Integral Non-Linearity
Settling Time
Conversion Time
Current Consumption
1
10kΩ Source Impedance
10
20
µs
40
µA
Analog Inputs (Note 9)
Load
20
1
pF
kΩ
Series Input Resistance
sysTeM cHaracTerisTics The l denotes the specifications which apply over the full operating temperature
range, otherwise specifications are at TA = 25°C and VSUPPLY = 3.6V unless otherwise noted
.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
5
MAX
UNITS
µs
Doze to Active State Transition
Doze to Radio Tx or Rx
1.2
4
ms
Q
Q
Charge to Sample RF Channel RSSI
Charge Consumed Starting from Doze State and
Completing an RSSI Measurement
µC
CCA
l
l
Largest Atomic Charge Operation
RESETn Pulse Width
Flash Erase, 21 ms Max duration
200
µC
µs
MAX
125
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LINEAR TECHNOLOGY CONFIDENTIAL
LTP5901-WHM/LTP5902-WHM
uarT ac cHaracTerisTics The l denotes the specifications which apply over the full operating temperature
range, otherwise specifications are at TA = 25°C and VSUPPLY = 3.6V unless otherwise noted. (Note 13)
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
l
Permitted Rx Baud Rate Error
Both Application Programming
Interface (API) and Command Line
Interface (CLI) UARTs
–2
2
%
l
l
Generated Tx Baud Rate Error
Both API and CLI UARTs
–1
0
1
2
%
ms
t
Assertion of UART_RX_RTSn to Assertion of
UART_RX_CTSn, or Negation of UART_RX_
RTSn to Negation of UART_RX_CTSn
RX_RTS to RX_CTS
l
l
t
t
Assertion of UART_RX_CTSn to Start of Byte
End of Packet (End of the Last Stop Bit) to
Negation of UART_RX_RTSn
0
0
20
22
ms
ms
CTS_R to RX
EOP to RX_RTS
t
t
Assertion of UART_TX_RTSn to Assertion of
UART_TX_CTSn
Negation of UART_TX_CTSn to Negation of
UART_TX_RTSn
0
2
22
ms
BEG_TX_RTS to TX_CTS
END_TX_CTS to TX_RTS
Bit Period
t
t
Assertion of UART_TX_CTSn to Start of Byte
End of Packet (End of the Last Stop Bit) to
Negation of UART_TX_RTSn
0
0
2
1
Bit Period
Bit Period
TX_CTS to TX
l
EOP to TX_RTS
t
t
Receive Inter-Byte Delay
l
l
100
ms
ns
RX_INTERBYTE
Start of Byte to Negation of UART_TX_CTSn
0
TX to TX_CTS
t
EOP to RX_RTS
UART_RX_RTSn
t
RX_RTS to_RX_CTS
t
RX_RTS to_RX_CTS
UART_RX_CTSn
UART_RX
t
RX_INTERBYTE
BYTE 1
t
RX_CTS to RX
BYTE 0
t
EOP to TX_RTS
UART_TX_RTSn
UART_TX_CTSn
t
t
BEG_TX RTS to TX_CTS
END_TX_CTS to_TX_RTS
t
END_TX_RTS to_TX_CTS
t
TX to TX_CTS
t
TX_CTS to TX
UART_TX
BYTE 0
BYTE 1
59012 F01
Figure 1. API UART Timing
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LINEAR TECHNOLOGY CONFIDENTIAL
LTP5901-WHM/LTP5902-WHM
TiMeꢀ ac cHaracTerisTics The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C and VSUPPLY = 3.6V unless otherwise noted. (Note 13)
SYMBOL
PARAMETER
CONDITIONS
MIN
125
0
TYP
MAX
UNITS
µs
l
l
t
TIMEn Signal Strobe Width
STROBE
t
Delay from Rising Edge of TIMEn to the Start
of Time Packet on API UART
100
ms
RESPONSE
l
t
Delay from End of Time Packet on API UART
to Falling Edge of Subsequent TIMEn
0
ns
TIME_HOLD
l
l
Timestamp Resolution (Note 10)
1
5
µs
µs
Network-Wide Time Accuracy (Note 11)
t
STROBE
t
TIME_HOLD
TIMEN
t
RESPONSE
UART_TX
TIME INDICATION PAYLOAD
59012 F02
Figure 2. Timestamp Timing
raDio inHibiT ac cHaracTerisTics The l denotes the specifications which apply over the full
operating temperature range, otherwise specifications are at TA = 25°C and VSUPPLY = 3.6V unless otherwise noted. (Note 13)
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
l
l
t
Delay from Rising Edge of RADIO_INHIBIT to
Radio Disabled
20
ms
RADIO_OFF
t
Maximum RADIO_INHIBIT Strobe Width
2
s
RADIO_INHIBIT_STROBE
t
RADIO_INHIBIT_STROBE
RADIO_INHIBIT
t
RADIO_OFF
ACTIVE/OFF
OFF
ACTIVE/OFF
RADIO STATE
59012 F03
Figure 3. RADIO_INHIBIT Timing
59012whmp
10
LINEAR TECHNOLOGY CONFIDENTIAL
LTP5901-WHM/LTP5902-WHM
FlasH ac cHaracTerisTics The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C and VSUPPLY = 3.6V unless otherwise noted. (Note 13)
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
21
UNITS
µs
l
l
l
t
t
t
Time to Write a 32-bit Word (Note 12)
Time to Erase a 2KByte Page (Note 12)
Time to Erase 256KByte Flash Bank (Note 12)
Data Retention
WRITE
21
ms
PAGE_ERASE
MASS_ERASE
21
ms
25°C
85°C
105°C
100
20
8
Years
Years
Years
FlasH spi slave ac cHaracTerisTics The l denotes the specifications which apply over the full
operating temperature range, otherwise specifications are at TA = 25°C and VSUPPLY = 3.6V unless otherwise noted. (Note 13)
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
l
l
l
t
t
t
Setup from Assertion of FLASH_P_ENn to
Assertion of RESETn
0
ns
FP_EN_to_RESET
Delay from the Assertion RESETn to the First
Falling Edge of IPCS_SSn
125
10
µs
µs
FP_ENTER
Delay from the Completion of the Last Flash SPI
Slave Transaction to the Negation of RESETn
and FLASH_P_ENn (Note 13)
FP_EXIT
l
l
t
t
IPCS_SSn Setup to the Leading Edge of
IPCS_SCK
15
15
ns
ns
SSS
SSH
IPCS_SSn Hold from Trailing Edge of IPCS_
SCK
l
l
l
l
l
t
t
t
t
t
IPCS_SCK Period
50
15
5
ns
ns
ns
ns
ns
CK
IPCS_MOSI Data Setup
IPCS_MOSI Data Hold
IPCS_MISO Data Valid
IPCS_MISO Data Tri-state
DIS
DIH
DOV
OFF
3
0
30
59012whmp
11
LINEAR TECHNOLOGY CONFIDENTIAL
LTP5901-WHM/LTP5902-WHM
FlasH spi slave ac cHaracTerisTics
t
FP_EN to_RESET
FLASH_P_ENn
t
t
FP_ENTER
FP_EXIT
RESETn
t
t
SSH
SSS
IPCS_SSn
IPCS_SCK
t
CK
t
DIS
t
DIH
IPCS_MOSI
59012 F04
Figure 4. Flash Programming Interface Timing
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: ESD (electrostatic discharge) sensitive device. ESD protection
devices are used extensively internal to Eterna. However, high electrostatic
discharge can damage or degrade the device. Use proper ESD handling
precautions.
Note 3: Extended storage at high temperature is discouraged, as this
negatively affects the data retention of Eterna’s calibration data. See the
FLASH Data Retention section for details.
Note 4: Actual RF range is subject to a number of installation-specific
variables including, but not restricted to ambient temperature, relative
humidity, presence of active interference sources, line-of-sight obstacles,
and near-presence of objects (for example, trees, walls, signage, and so
on) that may induce multipath fading. As a result, range varies.
Note 6: IEEE Std. 802.15.4-2006 requires transmitters to maintain a
frequency tolerance of better than 40 ppm.
Note 7: Per pin I/O types are provided in the Pin Functions section.
Note 8: VIH maximum voltage input must respect the VSUPPLY maximum
voltage specification.
Note 9: The analog inputs to the ADC can be modeled as a series resistor
to a capacitor. At a minimum the entire circuit, including the source
impedance for the signal driving the analog input should be designed
to settle to within ¼ LSB within the sampling window to match the
performance of the ADC.
Note 10: See the SmartMesh WirelessHART Mote API Guide for the
timeIndication notification definition.
Note 11: Network time accuracy is a statistical measure and varies over
the temperature range, reporting rate and the location of the device
relative to the manager in the network. See the Typical Performance
Characteristics section for a more detailed description.
Note 12: Code execution from flash banks being written or erased is
suspended until completion of the flash operation.
Note 5: As Specified by IEEE Std. 802.15.4-2006: Wireless Medium
Access Control (MAC) and Physical Layer (PHY) Specifications for Low-
Rate Wireless Personal Area Networks (LR-WPANs) http://standards.ieee.
org/findstds/standard/802.15.4-2011.html.
Note 13: Guaranteed by design. Not production tested.
59012whmp
12
LINEAR TECHNOLOGY CONFIDENTIAL
LTP5901-WHM/LTP5902-WHM
Typical perForMance cHaracTerisTics
Network motes typically route through at least two par-
ents the traffic destined for the manager. The supply
current graphs shown below include a parameter called
traffic-weighted descendants. In these graphs the term
traffic-weighted descendants refers to an amount of
activity equivalent to the number of descendants if all of
the network traffic was directed to the mote in question.
Generally the number of descendants of a parent is more,
typically 2x or more, than the number of traffic-weighted
descendants. For example, with reference to Figure 6 mote
P1 has 0.75 traffic-weighted descendants. To obtain this
value notice that mote D1 routes half its packets through
mote P1 adding 0.5 to the traffic-weighted descendant
value; the other half of D1’s traffic is routed through its
other parent, P2. Mote D2 routes half its packets through
mote D1 (the other half going through parent P3), which
weknowrouteshalfitspacketstomoteP1, addinganother
0.25 to the traffic-weighted descendant value for a total
traffic-weighted descendant value of 0.75.
was performed with the 1-hop mote inside a temperature
chamber. Timing errors due to temperature changes and
temperature differences both between the manager and
this mote and between this mote and its descendents
thereforepropagateddownthroughthenetwork. Thesyn-
chronizationofthe3-hopand5-hopmotestothemanager
was then affected by the temperature ramps even though
they were at room temperature. For 2°C/minute testing
the temperature chamber was cycled between –40°C and
85°C at this rate for 24 hours. For 8°C/minute testing, the
temperaturechamberwasrapidlycycledbetween85°Cand
45°C for 8 hours, followed by rapid cycling between –5°C
and 45°C for 8 hours, and lastly, rapid cycling between
–40°C and 15°C for 8 hours.
MANAGER
P1
1-HOP
P2
As described in the Application Time Synchronization
section, Eternaprovidestwomechanismsforapplications
to maintain a time base across a network. The synchro-
nization performance plots that follow were generated
using the more precise TIMEn input. Publishing rate is
the rate a mote application sends upstream data. Syn-
chronization improves as the publishing rate increases.
Baseline synchronization performance is provided for a
network operating with a publishing rate of zero. Actual
performance for applications in network will improve
as publishing rates increase. All synchronization testing
P3
2-HOP
D1
3-HOP
D2
59012 F06
Figure 6. Example Network Graph
Supply Current vs Temperature
Packet Latency vs Reporting Interval
Supply Current vs Reporting Interval
10
9
8
7
6
5
4
3
2
1
0
250
120
100
5 HOPS
4 HOPS
3 HOPS
2 HOPS
1 HOPS
TWD=TRAFFIC-WEIGHTED DESCENDANTS
TWD=TRAFFIC WEIGHTED
DESCENDANTS
5 TWD
2 TWD
1 TWD
0 TWD
200
150
100
50
5 TWD 30s REPORTING
2 TWD 5s REPORTING
2 TWD 30s REPORTING
0 TWD 5s REPORTING
0 TWD 30s REPORTING
80
60
40
20
0
0
–40 –20
0
20
40
60
80
0
5
10
15
20
25
30
0
5
10
15
20
25
30
TEMPERATURE (°C)
REPORTING INTERVAL (s)
REPORTING INTERVAL (s)
59012 F06a
59012 F06b
59012 F06c
59012whmp
13
LINEAR TECHNOLOGY CONFIDENTIAL
LTP5901-WHM/LTP5902-WHM
Typical perForMance cHaracTerisTics
TIMEn Synchronization Error
0 Packet/s Publishing Rate,
1 Hop, Room Temperature
TIMEn Synchronization Error
0 Packet/s Publishing Rate,
3 Hops, Room Temperature
TIMEn Synchronization Error
0 Packet/s Publishing Rate,
5 Hops, Room Temperature
12
10
8
35
30
25
20
15
10
5
18
16
14
12
10
8
µ = 0.8
σ = 110.7
N = 281493
µ = 0.1
σ = 35.0
N = 281490
µ = 0.7
σ = 63.0
N = 281492
6
4
6
4
2
2
0
0
0
–500
0
100
300
500
–300
–100
–500
0
100
300
500
–500
0
100
300
500
–300
–100
–300
–100
SYNCHRONIZATION ERROR (µs)
SYNCHRONIZATION ERROR (µs)
SYNCHRONIZATION ERROR (µs)
59012 G03
59012 G01
59012 G02
TIMEn Synchronization Error
0 Packet/s Publishing Rate,
1 Hop, 2°C/Min
TIMEn Synchronization Error
0 Packet/s Publishing Rate,
3 Hops, 2°C/Min
TIMEn Synchronization Error
0 Packet/s Publishing Rate,
5 Hops, 2°C/Min
45
40
35
30
25
20
15
10
5
14
12
10
8
9
8
7
6
5
4
3
2
1
0
µ = 10.1
σ = 35.7
N = 92717
µ = 7.2
σ = 75.9
N = 92717
µ = 6
σ = 125.7
N = 92719
6
4
2
0
0
–500
0
100
300
500
–500
0
100
300
500
–500
0
100
300
500
–300
–100
–300
–100
–300
–100
SYNCHRONIZATION ERROR (µs)
SYNCHRONIZATION ERROR (µs)
SYNCHRONIZATION ERROR (µs)
59012 G04
59012 G05
59012 G06
TIMEn Synchronization Error
0 Packet/s Publishing Rate,
1 Hop, 8°C/Min
TIMEn Synchronization Error
0 Packet/s Publishing Rate,
3 Hops, 8°C/Min
TIMEn Synchronization Error
0 Packet/s Publishing Rate,
5 Hops, 8°C/Min
45
40
35
30
25
20
15
10
5
14
12
10
8
8
7
6
5
4
3
2
1
0
µ = 15.3
σ = 39.4
N = 91114
µ = 10.9
σ = 81.5
N = 95165
µ = 10.7
σ = 136.8
N = 95167
6
4
2
0
0
–500
0
100
300
500
–500
0
100
300
500
–500
0
100
300
500
–300
–100
–300
–100
–300
–100
SYNCHRONIZATION ERROR (µs)
SYNCHRONIZATION ERROR (µs)
SYNCHRONIZATION ERROR (µs)
59012 G07
59012 G08
59012 G09
59012whmp
14
LINEAR TECHNOLOGY CONFIDENTIAL
LTP5901-WHM/LTP5902-WHM
Typical perForMance cHaracTerisTics
As described in the SmartMesh Network Overview sec-
tion, devices in network spend the vast majority of their
time inactive in their lowest power state (Doze). On a
synchronous schedule a mote will wake to communicate
with another mote. Regularly occurring sequences which
wake, perform a significant function and return to sleep
are considered atomic. These operations are considered
atomic as the sequence of events can not be separated
into smaller events while performing a useful function.
For example, transmission of a packet over the radio is an
atomicoperation.Atomicoperationsmaybecharacterized
in either charge or energy. In a time slot where a mote
successfully sends a packet, an atomic transmit includes
setuppriortosendingthemessage, sendingthemessage,
receiving the acknowledgment and the post processing
needed as a result of the message being sent. Similarly
in a time slot when a mote successfully receives a packet,
an atomic receive includes setup prior to listening, listen-
ing until the start of the packet transition, receiving the
packet, sending the acknowledge and the post processing
required due to the arrival of the packet.
To ensure reliability each mote in the network is provided
multiple time slots for each packet it nominally will send
and forward. The time slots are assigned to communicate
upstreamwithatleasttwodifferentmotes. Whencombined
with frequency hopping this provides temporal, spatial
and spectral redundancy. Given this approach a mote will
often listen for a message that it will never receive, since
the time slot is not being used by the transmitting mote.
It has already successfully transmitted the packet. Since
typically 3 timeslots are scheduled for every 1 packet to
be sent or forwarded, motes will perform more of these
atomic“IdleListens”thanatomictransmitoratomicreceive
sequences. Examples of transmit, receive and idle listen
atomic operations are shown in Figure 7.
59012whmp
15
LINEAR TECHNOLOGY CONFIDENTIAL
LTP5901-WHM/LTP5902-WHM
Typical perForMance cHaracTerisTics
Atomic Operation - Maximum Length Transmit with Acknowledge, 10ms Time Slot (55.9µC Total Charge at 3.6V)
25
20
15
10
5
80
70
60
50
40
30
20
10
0
POST MESSAGE
PROCESSING
DOZE
POWER UP
PACKET TRANSMISSION
Rx ACKNOWLEDGE
DOZE
CURRENT
0
CHARGE
–5
–2000
0
2000
4000
6000
8000
10000
12000
TIME (µs)
59012 F07a
Atomic Operation - Maximum Length Receive with Acknowledge, 10ms Time Slot (39.2µC Total Charge at 3.6V)
25
20
15
10
5
80
70
60
50
40
30
20
10
0
POST
MESSAGE
PROCESSING
POWER UP
RECEIVE WITH AES
Tx ACKNOWLEDGE
DOZE
DOZE
CURRENT
0
CHARGE
0
–5
–2000
2000
4000
6000
8000
10000
12000
TIME (µs)
59012 F07b
Atomic Operation - Idle Listen, 10ms Time Slot (15.1µC Total Charge at 3.6V)
25
20
15
10
5
80
70
60
50
40
30
20
10
DOZE
IDLE RECEIVE
DOZE
POWER UP
CURRENT
0
CHARGE
0
–5
–2000
0
2000
4000
6000
8000
10000
12000
TIME (µs)
59012 F07c
Figure 7
59012whmp
16
LINEAR TECHNOLOGY CONFIDENTIAL
LTP5901-WHM/LTP5902-WHM
pin FuncTions Pin functions shown in italics are currently not supported in software.
The following table organizes the pins by functional
groups. For those I/O with multiple functions the alternate
functions are shown on the second and third line in their
respective row. The No column provides the pin number.
The second column lists the function. The Type column
lists the I/O type. The I/O column lists the direction of the
signal relative to Eterna. The Pull column shows which
signals have a fixed passive pull-up or pull-down. The
Description column provides a brief signal description.
NO
POWER SUPPLY
TYPE
Power
I/O
-
PULL
DESCRIPTION
1
GND
-
-
-
-
-
-
-
-
-
-
Ground Connection
Ground Connection
Ground Connection
Ground Connection
Ground Connection
Ground Connection
Ground Connection
Ground Connection
Ground Connection
11 GND
20 GND
30 GND
34 GND
37 GND
42 GND
56 GND
66 GND
55 VSUPPLY
Power
Power
Power
Power
Power
Power
Power
Power
Power
-
-
-
-
-
-
-
-
-
Power Supply Input to Eterna
NO
RADIO
TYPE
I/O
PULL
DESCRIPTION
64 RADIO_INHIBIT
1 (Note 14)
I
-
-
Radio Inhibit
General Purpose Digital I/O
GPIO15
I/O
4
5
6
-
GPIO17
GPIO18
GPIO19
ANTENNA
1
1
I/O
I/O
I/O
N/A
-
-
-
-
General Purpose Digital I/O
General Purpose Digital I/O
1
General Purpose Digital I/O
N/A
Chip antenna (LTP5901) or MMCX Connector (LPT5902)
NO
7
ANALOG
TYPE
I/O
PULL
DESCRIPTION
Analog Input 2
AI_2
AI_1
AI_3
Analog
Analog
Analog
Analog
I
I
I
I
-
-
-
-
8
Analog Input 1
9
Analog Input 3
10 AI_0
Analog Input 0
NO
RESET
JTAG
TYPE
I/O
PULL
DESCRIPTION
15 RESETn
1
I
UP
Reset Input, Active Low
NO
TYPE
I/O
PULL
UP
-
DESCRIPTION
JTAG Test Data In
16 TDI
17 TDO
18 TMS
19 TCK
1
1
1
1
I
O
I
JTAG Test Data Out
UP
JTAG Test Mode Select
I
DOWN JTAG Test Clock
59012whmp
17
LINEAR TECHNOLOGY CONFIDENTIAL
LTP5901-WHM/LTP5902-WHM
pin FuncTions Pin functions shown in italics are currently not supported in software.
NO
GPIOs (Note 15)
TYPE
I/O
PULL
DESCRIPTION
21 DP4 (GPIO23)
1
1
I/O
-
General Purpose Digital I/O
25 DP3 (GPIO22)
I/O
I
-
-
General Purpose Digital I/O
External Input to 8-Bit Timer/Counter
TIMER8_EXT
26 DP2 (GPIO21)
1
1
1
I/O
I
-
-
General Purpose Digital I/O
LPTIMER_EXT
External Input to Low Power Timer/Counter
28 DP0 (GPIO0)
SPIM_SS_2n
I/O
O
-
-
General Purpose Digital I/O
SPI Master Slave Select 2, Active Low
45 DP1 (GPIO20)
I/O
I
-
-
General purpose Digital I/O
External input to 16-Bit Timer/Counter
TIMER16_EXT
NO
SPECIAL PURPOSE
TYPE
I/O
PULL
DESCRIPTION
27 SLEEPn
GPIO14
1 (Note 14)
I
-
-
Deep Sleep, Active Low
General Purpose Digital I/O
I/O
46 PWM0
2
O
O
I/O
-
-
-
Pulse Width Modulator 0
16-bit Timer/Counter Match Output/PWM Output
General Purpose Digital I/O
TIMER16_OUT
GPIO16
63 TIMEn
1 (Note 14)
I
-
-
Time Capture Request, Active Low
General Purpose Digital I/O
GPIO1
I/O
NO
CLI
TYPE
I/O
O
PULL
-
DESCRIPTION
CLI UART 0 Transmit
31 UARTC0_TX
32 UARTC0_RX
2
1
I
UP
CLI UART 0 Receive
NO
SPI MASTER
TYPE
I/O
PULL
DESCRIPTION
46 SPIM_MISO
GPIO11
1
I
-
-
SPI Master (MISO) Master In Slave Out Port
General Purpose Digital I/O
I/O
40 SPIM_MOSI
GPIO10
2
2
1
1
O
-
-
SPI Master (MOSI) Master Out Slave In Port
General Purpose Digital I/O
I/O
41 SPIM_SCK
GPIO9
O
I/O
-
-
SPI Master (SCK) Serial Clock Port
General Purpose Digital I/O
43 SPIM_SS_1n
GPIO13
O
I/O
-
-
SPI Master Slave Select 1, Active Low
General Purpose Digital I/O
44 SPIM_SS_0n
GPIO12
O
I/O
-
-
SPI Master Slave Select 0, Active Low
General Purpose Digital I/O
NO
IPCS SPI/FLASH PROGRAMMING (Note 16)
TYPE
I/O
PULL
DESCRIPTION
33 IPCS_MISO
TIMER 16 OUT
GPIO6
2
O
O
I/O
-
-
-
SPI Flash Emulation (MISO) Master In Slave Out Port
16-Bit Timer/Counter Match Output/PWM Output
General Purpose Digital I/O
35 IPCS_MISO
TIMER 16 OUT
GPIO6
1
1
1
1
I
I
-
-
-
SPI Flash Emulation (MOSI) Master Out Slave In Port
External Input to 16-Bit Timer/Counter
General Purpose Digital I/O
I/O
36 IPCS_MISO
TIMER 16 OUT
GPIO6
I
I
-
-
-
SPI Flash Emulation (SCK) Serial Clock Port
External Input to 8-Bit Timer/Counter
General Purpose Digital I/O
I/O
39 IPCS_MISO
TIMER 16 OUT
GPIO6
I
I
-
-
-
SPI Flash Emulation Slave Select, Active Low
External Input to Low Power Timer/Counter
General Purpose Digital I/O
I/O
51 FLASH_P_ENn
I
UP
Flash Program Enable, Active low
59012whmp
18
LINEAR TECHNOLOGY CONFIDENTIAL
LTP5901-WHM/LTP5902-WHM
pin FuncTions Pin functions shown in grey are currently not supported in software.
2
NO
I C/1-Wire/SPI Slave
TYPE
I/O
PULL
DESCRIPTION
47 SPIS_MISO
UARTC1_TX
1_WIRE
2
O
O
I/O
-
-
-
SPI Slave (MISO) Master In Slave Out Port
CLI UART 1 Transmit
1 Wire Master
48 SPIS_MOSI
UARTC1_RX
GPIO26
1
I
I
-
-
-
SPI Slave (MOSI) Master Out Slave In Port
CLI UART 1 Receive
General Purpose Digital I/O
I/O
49 SPIS_SCK
SCL
2
2
I
-
-
SPI Slave (SCK) Serial Clock Port
2
I/O
I C Serial Clock
50 SPIS_SSn
SDA
I
-
-
SPI Slave Select, Active Low
2
I/O
I C Serial Data
NO
API UART
TYPE
I/O
I
PULL
DESCRIPTION
UART Receive (RTS) Request to Send, Active Low
UART Receive (CTS) Clear to Send, Active Low
UART Receive
57 UART_RX_RTSn
58 UART_RX_CTSn
59 UART_RX
1 (Note 14)
-
-
-
-
-
-
1
O
I
1 (Note 14)
60 UART_TX_RTSn
61 UART_TX_CTSn
62 UART_TX
1
O
I
UART Transmit (RTS) Request to Send, Active Low
UART Transmit (CTS) Clear to Send, Active Low
UART Transmit
1 (Note 14)
2
O
Note 14: These inputs are always enabled and must be driven or pulled to
a valid state to avoid leakage.
Note 16: Embedded programming over the IPCS SPI bus is only avaliable
when RESETn is asserted.
Note 15: See also pins 33, 35, 36, and 39 for additional GPIO ports.
ANALOG INPUT
VSUPPLY: System and I/O power supply. Provides power
to the module. The digital-interface I/O voltages are also
set by this voltage.
10-BIT ADC
3-BIT
VGA
+
ANTENNA:Multiplexedreceiverinputandtransmitteroutput
4-BIT DAC
pin. The impedance presented to the MMCX connector
59012 F07
should be 50 , single-ended with respect to ground.
Ω
Figure 8. Analog Input Chain
AI_0, AI_1, AI_2, AI_3: Analog Inputs. These pins are
multiplexed to the analog input chain. The analog input
chain, as shown in Figure 8, is software-configurable
and includes a variable-gain amplifier, an offset-DAC for
adjusting input range, and a 10b ADC. Valid input range
is between 0 to 1.8V.
RESETn:Theasynchronousresetsignalisinternallypulled
up. Resetting Eterna will result in the ARM Cortex M3
rebooting and loss of network connectivity. Use of this
signal for resetting Eterna is not recommended except
during power-on and in-circuit programming.
59012whmp
19
LINEAR TECHNOLOGY CONFIDENTIAL
LTP5901-WHM/LTP5902-WHM
pin FuncTions
RADIO_INHIBIT:RADIO_INHIBITprovideamechanismfor
an external device to temporarily disable radio operaiton.
Failure to observe the timing requirements defined in
the Radio_Inhibit AC Characteristics table, may result
in unreliable netowrk operation. In designs where the
RADIO_INHIBIT function is not needed the input must
either be tied, pulled or actively driven low to avoid excess
leakage.
TIMEn: Strobing the TIMEn input is the most accurate
method to acquire the network time maintained by Eterna.
Eternalatchesthenetworktimestampwithsub-microsec-
ond resolution on the rising edge of the TIMEn signal and
produces a packet on the API serial port containing the
timing information.
UARTC0_RX, UARTC0_TX: The CLI UART provides a
mechanism for monitoring, configuration and control of
Eterna during operation. For a complete description of the
supported commands see the SmartMesh WirelessHART
Mote CLI API Guide.
TMS, TCK, TDI, TDO: JTAG Port Supporting Software
Debug and Boundary Scan.
SLEEPn: The SLEEPn function is not currently supported
in software. The SLEEPn input must either be tied, pulled
or actively driven high to avoid excess leakage.
FLASH_P_ENn, IPCS_SSn, IPCS_SCK, IPCS_MISO,
IPCS_SSn: The In-circuit Programming Control System
(IPCS)busenablesin-circuitprogrammingofEterna’sflash
memory. IPCS_SCK is a clock and should be terminated
appropriately for the driving source to prevent overshoot
and ringing.
UART_RX,UART_RX_RTSn,UART_RX_CTSn,UART_TX,
UART_TX_RTSn,UART_TX_CTSn:TheAPIUARTinterface
includes bi-directional wake up and flow control. Unused
inputsignalsmustbedrivenorpulledtotheirinactivestate.
59012whmp
20
LINEAR TECHNOLOGY CONFIDENTIAL
LTP5901-WHM/LTP5902-WHM
operaTion
TheLTP5901/LTP5902istheworld’smostenergy-efficient
IEEE 802.15.4 compliant platform, enabling battery and
energyharvestedapplications.Withapowerful32-bitARM
Cortex™-M3,best-in-classradio,flash,RAMandpurpose-
built peripherals, Eterna provides a flexible, scalable and
robust networking solution for applications demanding
minimal energy consumption and data reliability in even
the most challenging RF environments.
SUPPLY MONITORING AND RESET
Eterna integrates a Power-on reset (PoR) circuit. As the
RESETn input pin is nominally configured with an internal
pull-up resistor, no connection is required. For a graceful
shutdown, the software and the networking layers should
be cleanly halted via API commands prior to assertion
of the RESETn pin. See the SmartMesh WirelessHART
Mote API Guide for details on the disconnect and reset
commands. Eternaincludesasoftbrown-outmonitorthat
fully protects the flash from corruption in the event that
power is removed while writing to flash. Integrated flash
supervisoryfunctionality,inconjunctionwithafaulttolerant
file system, yields a robust non-volatile storage solution.
ShowninFigure9, Eternaintegratespurpose-builtperiph-
erals that excel in both low operating-energy consump-
tion and the ability to rapidly and precisely cycle between
operating and low-power states. Items in the gray shaded
region labeled “Analog Core” correspond to the analog/
RF components.
PRECISION TIMING
POWER SUPPLY
A major feature of Eterna over competing 802.15.4 prod-
uct offerings is its low-power dedicated timing hardware
and timing algorithms. This functionality provides timing
precision two to three orders of magnitude better than
any other low-power solution available at the time of
publication. Improved timing accuracy allows motes to
minimize the amount of radio listening time required to
ensure packet reception thereby lowering even further
the power consumed by SmartMesh networks. Eterna’s
patented timing hardware and timing algorithms provide
superior performance over rapid temperature changes,
further differentiating Eterna’s reliability when compared
with other wireless products. In addition, precise timing
enablesnetworkstoreducespectraldeadtime, increasing
total network throughput.
Eterna is powered from a single pin, VSUPPLY, which
powers the I/O cells and is also used to generate internal
supplies.Eterna’stwoon-chipDC/DCconvertersminimize
Eterna’senergyconsumptionwhilethedeviceisawake.To
conserve power the DC/DC converters are disabled when
the device is in low-power state. Eterna’s power supply
conditioningarchitecture,includingthetwointegratedDC/
DC converters and three integrated low-dropout regula-
tors, provides excellent rejection of supply noise. Eterna’s
operating supply voltage range is high enough to support
direct connection to lithium-thionyl chloride Li-SOCl
2
sources and wide enough to support battery operation
over a broad temperature range.
59012whmp
21
LINEAR TECHNOLOGY CONFIDENTIAL
LTP5901-WHM/LTP5902-WHM
operaTion
32kHz
DIGITAL CORE
ANALOG CORE
32kHz, 20MHz
TIMERS
VOLTAGE REFERENCE
CORE REGULATOR
SCHED
PRIMARY
DC/DC
SRAM
72kB
CONVERTER
CLOCK REGULATOR
ANALOG REGULATOR
PMU/
CLOCK
CONTROL
RELAXATION
OSCILLATOR
FLASH
512kB
PA
DC/DC
CONVERTER
PoR
20MHz
FLASH
CONTROLLER
802.15.4
MOD
LPF
DAC
AES
PA
CODE
802.15.4
FRAMING
DMA
PLL
AUTO
MAC
SYSTEM
802.15.4
DEMOD
BPF
PPF
LNA
ADC
LIMITER
AGC
RSSI
BAT
LOAD
IPCS
SPI
SLAVE
CLI
UART
(2 PIN)
API
ADC
CTRL
10-BIT
ADC
UART
(6 PIN)
VGA
PTAT
4-BIT
DAC
59012 F08
Figure 9 . Eterna Block Diagram
59012whmp
22
LINEAR TECHNOLOGY CONFIDENTIAL
LTP5901-WHM/LTP5902-WHM
operaTion
APPLICATION TIME SYNCHRONIꢀATION
32.768kHz Crystal
In addition to coordinating timeslots across the network,
which is transparent to the user, Eterna’s timing manage-
mentisusedtosupporttwomechanismstosharenetwork
time. Having an accurate, shared, network-wide time base
enables events to be accurately time stamped or tasks to
be performed in a synchronized fashion across a network.
Eterna will send a time packet through its serial interface
when one of the following occurs:
Once Eterna is powered up and the 32.768kHz crystal
source has begun oscillating, the 32.768kHz crystal re-
mains operational while in the Active state, and is used as
thetimingbasiswheninDozestate. SeetheStateDiagram
section for a description of Eterna’s operational states.
20MHz Crystal
The 20MHz crystal source provides a frequency reference
for the radio, and is automatically enabled and disabled
by Eterna as needed.
n
Eterna receives an API request to read time
The TIMEn signal is asserted
n
The use of TIMEn has the advantage of being more accu-
rate. The value of the timestamp is captured in hardware
relative to the rising edge of TIMEn. If an API request is
used,duetopacketprocessing,thevalueofthetimestamp
may be captured several milliseconds after receipt of
the packet due to packet processing. See the TIMEn AC
Characteristics section for the time function’s definition
and specifications.
RADIO
Eterna includes the lowest-power commercially available
2.4GHz IEEE 802.15.4e radio by a substantial margin.
(Please refer to the Radio Specifications section for
powerconsumptionnumbers.).Eterna’sintegratedpower
amplifier is calibrated and temperature-compensated to
consistentlyprovidepoweratalimitsuitableforworldwide
radio certifications. Additionally, Eterna uniquely includes
a hardware-based autonomous MAC that handles precise
sequencing of peripherals, including the transmitter, the
receiver, and Advanced Encryption Standard (AES) pe-
ripherals.Thehardware-basedautonomousMediaAccess
Controller (MAC) minimizes CPU activity, thereby further
decreasing power consumption.
TIME REFERENCES
Eterna includes three clock sources: an internal relaxation
oscillator,alowpoweroscillatordesignedfora32.768kHz
crystal, and the radio reference oscillator designed for a
20MHz crystal.
Relaxation Oscillator
UARTS
The relaxation oscillator is the primary clock source
for Eterna, providing the clock for the CPU, memory
subsystems, and all peripherals. The internal relaxation
oscillator is dynamically calibrated to 7.3728 MHz. The
internal relaxation oscillator typically starts up in a few
μs, providing an expedient, low-energy method for duty
cyclingbetweenactiveandlowpowerstates.Quickstart-up
from the doze state, defined in the State Diagram section,
allows Eterna to wake up and receive data over the UART
and SPI interfaces by simply detecting activity on the
appropriate signals.
The principal network interface is through the application
programming interface (API) UART. A command-line
interface (CLI) is also provided for support of test and
debug functions. Both UARTs sense activity continuously,
consuming virtually no power until data is transferred
over the port and then automatically returning to their
lowest power state after the conclusion of a transfer. The
definition for packet encoding on the API UART interface
can be found in the SmartMesh WirelessHART Mote API
Guide and the CLI command definitions can be found in
the SmartMesh WirelessHART Mote CLI Guide.
59012whmp
23
LINEAR TECHNOLOGY CONFIDENTIAL
LTP5901-WHM/LTP5902-WHM
operaTion
API UART Protocol
UART_TX_RTSn
UART_TX_CTSn
UART_TX
The API UART protocol was created with the goal of
supporting a wide range of companion Multipoint Control
Units (MCUs) while reducing power consumption of the
system.ThereceivehalfoftheAPIUARTprotocolincludes
twoadditionalsignalsinadditiontoUART_RX:UART_RX_
RTSn and UART_RX_CTSn. The transmit half of the API
UART protocol includes two additional signals in addition
to UART_TX: UART_TX_RTSn and UART_TX_CTSn. The
API UART protocol is referred to as Mode 4.
BYTE 0
BYTE 1
59012 F09
Figure 10. UART Mode 4 Transmit Flow Control
CLI UART
The Command Line Interface (CLI) UART port is a two
wire protocol (TX and RX) that operates at a fixed 9600
baud rate with one stop bit and no parity. The CLI UART
interfaceisintendedtosupportcommandlineinstructions
and response activity.
In the Figures accompanying the protocol descriptions,
signals driven by the companion processor are drawn
in black and signals driven by Eterna are drawn in blue.
UART Mode 4
AUTONOMOUS MAC
UART Mode 4 incorporates level-sensitive flow control
on the TX channel and requires no flow control on the
RX channel, supporting 115200 baud. The use of level-
sensitive flow control signals enables higher data rates
with the option of using a reduced set of the flow control
signals; however, with the companion processor must
negate UART_TX_CTSn prior to the end of the packet
Eterna was designed as a system solution to provide a
reliable, ultra-low power, and secure network. A reliable
network capable of dynamically optimizing operation
over changing environments requires solutions that are
far too complex to completely support through hardware
acceleration alone. As described in the Precision Timing
section,propertimemanagementisessentialforoptimizing
a solution that is both low power and reliable. To address
theserequirementsEternaincludestheAutonomousMAC,
which incorporates a co-processor for controlling all of
the time-critical radio operations. The Autonomous MAC
provides two benefits: first, preventing variable software
latency from affecting network timing and second, greatly
reducing system power consumption by allowing the CPU
to remain inactive during the majority of the radio activity.
The Autonomous MAC, provides software-independent
timing control of the radio and radio-related functions,
resultinginsuperiorreliabilityandexceptionallylowpower.
and waiting at least t
between packets
RX_RTS to RX_CTS
See the UART AC Characteristics section for complete
timingspecifications. PacketsareHDLCencodedwithone
stop bit and no parity bit. The use of the RX flow control
signals(UART_RX_RTSnandUART_RX_CTSn)forMode
4 are optional. The flow control signals for the TX channel
are shown in Figure 10. Transfers are initiated by Eterna
asserting UART_TX_RTSn. The UART_TX_CTSn signal
may be actively driven by the companion processor when
ready to receive a packet or UART_TX_CTSn may be tied
lowifthecompanionprocessorisalwaysreadytoreceivea
packet.Afterdetectingalogic‘0’onUART_TX_CTSnEterna
sends the entire packet. Following the transmission of the
final byte in the packet Eterna negates UART_TX_RTSn
and waits for a minimum period defined in the UART AC
Characteristics section before asserting UART_TX_RTSn
again.
For details on the timing of the UART protocol, see the
UART AC Characteristics section.
59012whmp
24
LINEAR TECHNOLOGY CONFIDENTIAL
LTP5901-WHM/LTP5902-WHM
operaTion
SECURITY
FLASH DATA RETENTION
Network security is an often overlooked component of a
complete network solution. Proper implementation of se-
curity protocols is significant in terms of both engineering
effort and market value in an OEM product. Eterna system
solutionsprovideaFIPS-197validatedencryptionscheme
that includes authentication and encryption at the MAC
and network layers with separate keys for each mote.
This not only yields end-to-end security, but if a mote is
somehowcompromised,communicationfromothermotes
is still secure. A mechanism for secure key exchange al-
lows keys to be kept fresh. To prevent physical attacks,
Eternaincludeshardwaresupportforelectronicallylocking
devices, thereby preventing access to Eterna’s flash and
RAM memory and thus the keys and code stored therein.
Eterna contains internal flash (Non-Volatile Memory) to
store calibration results, unique ID, configuration settings
and software images. Flash retention over the operating
temperature range. See Electrical Characteristics and
Absolute Maximum Ratings sections.
Non destructive storage above the operating temperature
range of –40°C to 85°C is possible; although, this may
result in a degradation of retention characteristics.
The degradation in flash retention for temperatures >85°C
can be approximated by calculating the dimensionless
acceleration factor using the following equation:
Ea
k
1
1
•
−
AF = e
T
+273
T
+273
USE
STRESS
Where:
TEMPERATURE SENSOR
AF = acceleration factor
Eterna includes a calibrated temperature sensor on chip.
The temperature readings are available locally through
Eterna’s serial API, in addition to being available via the
network manager. The performance characteristics of
the temperature sensor can be found in the Temperature
Sensor Characteristics section.
Ea = activation energy = 0.6eV
–5
k = 8.625 • 10 eV/°K
T
T
= is the specified temperature retention in °C
USE
= actual storage temperature in °C
STRESS
Example: Calculate the effect on retention when storing
at a temperature of 105°C.
RADIO INHIBIT
The RADIO_INHIBIT input enables an external controller
to temporarily disable the radio software drivers (for
example, to take a sensor reading that is susceptible to
radio interference). When RADIO_INHIBIT is asserted
the software radio drivers will disallow radio operations
including clear channel assessment, packet transmits,
or packet receipts. If the radio is active in the current
timeslotwhenRADIO_INHIBITisassertedtheradiowillbe
diabled after the present operation completes. For details
on the timing associated with RADIO_INHIBIT, see the
RADIO_INHIBIT AC Characteristics section.
T
T
= 105°C
STRESS
= 85°C
USE
AF = 2.8
So the overall retention of the flash would be degraded
by a factor of 2.8, reducing data retention from 20 years
at 85°C to 7.1 years at 105°C.
59012whmp
25
LINEAR TECHNOLOGY CONFIDENTIAL
LTP5901-WHM/LTP5902-WHM
operaTion
STATE DIAGRAM
Operation
In order to provide capabilities and flexibility in addition
to ultra low power, Eterna operates in various states, as
shown in Figure 13. State transitions shown in red are
not recommended.
Once Eterna has completed startup, Eterna transitions to
the Operational group of states (active/CPU active, active/
CPU inactive, and Doze). There, Eterna cycles between the
various states, automatically selecting the lowest pos-
sible power state while fulfilling the demands of network
operation.
Start Up
StartUpoccursasaresultofeithercrossingthePower-on
reset threshold or asserting RESETn. After the completion
of Power-on reset or the falling edge of an internally
synchronized RESETn, Eterna loads its Fuse Table which,
as described in the previous section, includes setting
I/O direction. In this state, Eterna checks the state of
the FLASH_P_ENn and RESETn and enters the serial
flash emulation mode if both signals are asserted. If the
FLASH_P_ENnpinisnotassertedbutRESETnis asserted,
Eterna automatically reduces its energy consumption to
a minimum until RESETn is released. Once RESETn is
de-asserted, Eterna goes through a boot sequence, and
then enters the Active state.
Active State
IntheActiveState, Eterna’srelaxationoscillatorisrunning
andperipheralsareenabledasneeded.TheARMCortex-M3
cycles between CPU-active and CPU-inactive (referred to
in the ARM Cortex-M3 literature as “Sleep Now” mode).
Eterna’s extensive use of DMA and intelligent peripherals
that independently move Eterna between Active State and
Doze State minimizes the time the CPU is active, signifi-
cantly reducing Eterna’s energy consumption.
Doze State
The Doze State consumes orders of magnitude less cur-
rent than the Active State and is entered when all of the
peripherals and the CPU are inactive. In the Doze State
Eterna’s full state is retained, timing is maintained, and
Eterna is configured to detect, wake, and rapidly respond
to activity on I/Os (such as UART signals and the TIMEn
pin). In the Doze State the 32.768kHz oscillator and as-
sociated timers are active.
Serial Flash Emulation
When both RESETn and FLASH_P_ENn are asserted,
Eterna disables normal operation and enters a mode to
emulate the operation of a serial flash. In this mode, its
flash can be programmed.
59012whmp
26
LINEAR TECHNOLOGY CONFIDENTIAL
LTP5901-WHM/LTP5902-WHM
operaTion
POWER-ON
RESET
VSUPPLY > PoR
RESETn LOW AND
FLASH_P_ENn LOW
LOAD FUSE
SETTINGS
SET RESETn HIGH AND
FLASH_P_ENn HIGH
FOR 125µs, THEN
SERIAL FLASH
EMULATION
SET RESETn LOW
RESETn LOW AND
FLASH_P_ENn HIGH
RESETn HIGH
AND
FLASH_P_ENn
HIGH
RESET
DEASSERT
RESETn
BOOT
START-UP
ASSERT RESETn ASSERT RESETn
ASSERT RESETn
CPU AND
PERIPHERALS
INACTIVE
CPU
ACTIVE
ACTIVE
DEEP SLEEP
DOZE
CPU
INACTIVE
LOW POWER SLEEP
COMMAND
HW OR PMU EVENT
OPERATION
INACTIVE
59012 F10
Figure 11. Eterna State Diagram
59012whmp
27
LINEAR TECHNOLOGY CONFIDENTIAL
LTP5901-WHM/LTP5902-WHM
applicaTions inForMaTion
REGULATORY AND STANDARDS COMPLIANCE
The RoHS-compliant design features include:
n
RoHS-compliant solder for solder joints
Radio Certification
n
RoHS-compliant base metal alloys
The LTP5901 and LTP5902 have been certified under a
single modular certification, with the module name of
ETERNA2. Following the regulatory requirements pro-
vided in the ETERNA2 User’s Guide enables customers
to ship products in the supported geographies, by simply
completing an unintentional radiator scan of the finished
product(s). The ETERNA2 User’s Guide also provides
the technical information needed to enable customers
to further certify either the modules or products based
upon the modules in geographies that have not or do not
support modular certification.
n
RoHS-compliant precious metal plating
n
RoHS-compliant cable assemblies and connector
choices
n
Lead-free QFN package
n
Halogen-free mold compound
n
RoHS-compliant and 245 °C re-flow compatible
Note: Customers may elect to use certain types of lead-
free solder alloys in accordance with the European Com-
munity directive 2011/65/EU. Depending on the type of
solder paste chosen, a corresponding process change to
optimize reflow temperatures may be required.
Compliance to Restriction of Hazardous Substances
(RoHS)
Restriction of Hazardous Substances 2 (RoHS 2) is a
directive that places maximum concentration limits on
the use of certain hazardous substances in electrical and
electronic equipment. Linear Technology is committed to
meeting the requirements of the European Community
directive 2011/65/EU.
SOLDERING INFORMATION
The LTP5901 and LTP5902 are suitable for both eutectic
PbSn and RoHS-6 reflow. The maximum reflow solder-
ing temperature is 260°C. A more detailed description of
layoutrecommendations,assemblyproceduresanddesign
considerations is included in the LTP5901 and LTP5902
Hardware Integration Guide.
This product has been specifically designed to utilize
RoHS-compliant materials and to eliminate or reduce the
use of restricted materials to comply with 2011/65/EU.
59012whmp
28
LINEAR TECHNOLOGY CONFIDENTIAL
LTP5901-WHM/LTP5902-WHM
relaTeD DocuMenTaTion
TITLE
LOCATION
DESCRIPTION
SmartMesh WirelessHART User Guide
http://www.linear.com/docs/41887
The user’s guide provides theory of operation, and details of the
services supported
SmartMesh WirelessHART Mote API Guide http://www.linear.com/docs/41893
SmartMesh WirelessHART Mote CLI Guide http://www.linear.com/docs/41892
Definitions of the applications interface commands available over
the API UART
Definitions of the command line interface commands available
over the CLI UART
LTP5901 and LTP5902 Hardware Integra- http://www.linear.com/docs/41877
tion Guide
Recommended practices for designing with the LTP5901 and
LTP5902
ETERNA2 User’s Guide
http://www.linear.com/docs/42916
The ETERNA2 module user’s guide includes certification
requirements applicable to certified geographies and support
documentation enabling customer certification in additional
geographies for the LTP5901 and LTP5902
59012whmp
29
LINEAR TECHNOLOGY CONFIDENTIAL
LTP5901-WHM/LTP5902-WHM
package DescripTion
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
2.54
.100
1
.039
24
.94
1
.039
1.58 40
1.213 30.80
1.122 28.50
1.102 28
1.063 27
1.031 26.2
0.25
R.010 TYP
42
1.65
1
.039 TYP
.079 2
.039 1
0 0
.039 1
.08 2
Figure 12. LTP5901 Mechanical Drawing
59012whmp
30
LINEAR TECHNOLOGY CONFIDENTIAL
LTP5901-WHM/LTP5902-WHM
package DescripTion
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
2.54
.100
4.50
.177
1
.039
24
.94
1
.039
1.40 35.5
1.272 32.30
1.213 30.80
1.122 28.50
1.102 28
1.063 27
1.031 26.20
0.25
R.010 TYP
37.5
1.48
1
.039 TYP
.078 2
.039 1
0 0
.039 1
.078 2
Figure 13. LTP5902 Mechanical Drawing
59012whmp
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
31
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
LINEAR TECHNOLOGY CONFIDENTIAL
LTP5901-WHM/LTP5902-WHM
Typical applicaTion
Mesh Network Thermistor
TADIRAN TL-5903
RT = 5k • AI_0 / (2 • AI_1 – AI_0)
3
T(°C) = 1 / {A + B [Ln(RT)] + C[Ln(RT)] } – 273.15
–3
–4
A = 1.032 • 10
B = 2.387 • 10
Li-SOCI
2
–7
C = 1.580 • 10
LTP5902-WHM
VSUPPLY
ATMEL SAM4L2
ANTENNA
LT6654-2.048
VDDIN
VDDIO
PA08 (GPO8)
47µF
0.1µF
V
V
IN
OUT
0.1µF
0.1µF
GND2 GND1
5k
4.7µF
0.1µF
FB
0.1%
PA04 (AD0)
VDDANA
10k, 0.2C
OMEGA 4406
1000pF
0.1µF
5k
0.1%
PA15 (USART1_RXD)
PA17 (EXTINT2)
UART_TX
UART_TX_RTSn
UART_TX_CTSn
UART_RX
UART_RX_RTSn
UART_RX_CTSn
PA05 (AD1)
PA13 (GP013)
5k
0.1%
PA16 (USART1_TXD)
PA14 (GPIO14)
PA18 (EXTINT3)
1000pF
GND
22µF
ADVREFP
XOUT32
VDDOUT
VDDCORE
4.7µF
0.1µF
32.768kHz
XIN32
GND
59012 TA02
relaTeD parTs
PART NUMBER
DESCRIPTION
COMMENTS
LTP5903IPC-WHRB
WirelessHART Embedded 250 Mote
Manager
Manages networks of up to 250 SmartMesh WirelessHart nodes.
LTC5800-WHM
LT6654
WirelessHART Mote
Ultra low power mote, 72-lead 10mm x 10mm QFN
Precision High Output Drive Low Noise 1.6ppm Peak-to-Peak Noise (0.1Hz to 10Hz, Sink/Source 10mA, 5ppm/°C Max Drift
Reference
LTC2379-18
18-Bit,1.6Msps/1Msps/500ksps/
250ksps Serial, Low Power ADC
2.5V Supply, Differential Input, 101.2dB SNR, 5V Input Range, DGC
LTC3388-1/LTC3388-3 20V High Efficiency Nanopower Step- 860nA I in Sleep, 2.7V to 20V Input, V : 1.2V to 5.0V, Enable and Standby Pins
Q
OUT
Down Regulator
LTC3588-1
Piezoelectric Energy Generator with
Integrated High Efficiency Buck
Converter
V : 2.7V to 20V; V
: Fixed to 1.8V, 2.5V, 3.3V, 3.6V; I = 0.95μA; 3mm × 3mm
IN
OUT(MIN) Q
DFN-10 and MSOP-10E Packages
LTC3108-1
LTC3459
Ultralow Voltage Step-Up Converter
and Power Manager
V : 0.02V to 1V; V = 2.5V, 3V, 3.7V, 4.5V Fixed; I = 6μA; 3mm × 4mm DFN-12 and
IN
OUT
Q
SSOP-16 Packages
Micropower Synchronous Boost
Converter
V : 1.5V to 5.5V; V
= 10V; I = 10μA; 2mm × 2mm DFN, 2mm × 3mm DFN or
IN
OUT (MAX)
Q
SOT-23 Package
59012whmp
LT 1013 • PRINTED IN USA
LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
32
●
●
LINEAR TECHNOLOGY CORPORATION 2013
(408)432-1900 FAX: (408) 434-0507 www.linear.com/LTP5901-WHM or www.linear.com/LTP5902-WHM
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