LTR3800 [Linear]
Wide Operating Range, No RSENSE Step-Down Controller; 宽工作范围，无检测电阻降压型控制器
| 型号： | LTR3800 |
| 厂家： | 
Linear |
| 描述： | Wide Operating Range, No RSENSE Step-Down Controller |
| 文件： | 总24页 (文件大小：254K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LTC1778/LTC1778-1
Wide Operating Range,
No RSENSETM Step-Down Controller
U
FEATURES
DESCRIPTIO
The LTC®1778 is a synchronous step-down switching
regulator controller optimized for CPU power. The con-
troller uses a valley current control architecture to deliver
very low duty cycles with excellent transient response
without requiring a sense resistor. Operating frequency is
selected by an external resistor and is compensated for
variations in VIN.
■
No Sense Resistor Required
■
True Current Mode Control
■
Optimized for High Step-Down Ratios
■
t
ON(MIN) ≤ 100ns
■
■
■
■
■
■
■
■
■
■
■
■
■
■
Extremely Fast Transient Response
Stable with Ceramic COUT
Dual N-Channel MOSFET Synchronous Drive
Power Good Output Voltage Monitor (LTC1778)
Adjustable On-Time (LTC1778-1)
Wide VIN Range: 4V to 36V
±1% 0.8V Voltage Reference
Adjustable Current Limit
Adjustable Switching Frequency
Programmable Soft-Start
Output Overvoltage Protection
Optional Short-Circuit Shutdown Timer
Micropower Shutdown: IQ < 30µA
Available in a 16-Pin Narrow SSOP Package
U
Discontinuous mode operation provides high efficiency
operation at light loads. A forced continuous control pin
reduces noise and RF interference, and can assist second-
ary winding regulation by disabling discontinuous opera-
tion when the main output is lightly loaded.
Fault protection is provided by internal foldback current
limiting, an output overvoltage comparator and optional
short-circuitshutdowntimer.Soft-startcapabilityforsup-
ply sequencing is accomplished using an external timing
capacitor.Theregulatorcurrentlimitlevelisuserprogram-
mable.Widesupplyrangeallowsoperationfrom4Vto36V
at the input and from 0.8V up to (0.9)VIN at the output.
, LTC and LT are registered trademarks of Linear Technology Corporation.
APPLICATIO S
■
Notebook and Palmtop Computers
Distributed Power Systems
No R
is a trademark of Linear Technology Corporation.
SENSE
All other trademarks are the property of their respective owners.
■
Protected by U.S. Patents, including 5481178, 6100678, 6580258, 5847554, 6304066
U
TYPICAL APPLICATIO
R
ON
Efficiency vs Load Current
1.4MΩ
I
ON
100
C
SS
V
= 2.5V
OUT
V
IN
0.1µF
V
IN
V
= 5V
IN
5V TO 28V
C
IN
M1
10µF
50V
×3
RUN/SS
TG
Si4884
L1
90
80
70
60
C
C
1.8µH
V
OUT
SW
500pF
2.5V
10A
C
0.22µF
V
= 25V
B
IN
C
I
TH
BOOST
OUT
+
D
180µF
4V
B
R
C
20k
LTC1778
SGND INTV
CMDSH-3
×2
CC
M2
Si4874
D1
B340A
BG
+
C
VCC
4.7µF
R2
30.1k
PGOOD PGND
V
FB
0.01
1
10
0.1
R1
14k
LOAD CURRENT (A)
1778 F01b
1778 F01a
Figure 1. High Efficiency Step-Down Converter
1778fb
1
LTC1778/LTC1778-1
W W
U W
ABSOLUTE AXI U RATI GS
(Note 1)
TG, BG, INTVCC, EXTVCC Peak Currents.................... 2A
TG, BG, INTVCC, EXTVCC RMS Currents .............. 50mA
Operating Ambient Temperature Range (Note 4)
LTC1778E........................................... –40°C to 85°C
LTC1778I.......................................... –40°C to 125°C
Junction Temperature (Note 2)............................ 125°C
Storage Temperature Range ................. –65°C to 150°C
Lead Temperature (Soldering, 10 sec).................. 300°C
Input Supply Voltage (VIN, ION)................. 36V to –0.3V
Boosted Topside Driver Supply Voltage
(BOOST) ................................................... 42V to –0.3V
SW Voltage .................................................. 36V to –5V
EXTVCC, (BOOST – SW), RUN/SS,
PGOOD Voltages....................................... 7V to –0.3V
FCB, VON, VRNG Voltages .......... INTVCC + 0.3V to –0.3V
ITH, VFB Voltages...................................... 2.7V to –0.3V
U W
U
PACKAGE/ORDER I FOR ATIO
TOP VIEW
TOP VIEW
ORDER PART
NUMBER
ORDER PART
NUMBER
RUN/SS
PGOOD
1
2
3
4
5
6
7
8
RUN/SS
1
2
3
4
5
6
7
8
16 BOOST
15 TG
16 BOOST
V
ON
15
14
13
12
11
10
9
TG
LTC1778EGN
LTC1778IGN
LTC1778EGN-1
V
14
13
12
11
10
9
V
SW
SW
PGND
BG
RNG
RNG
FCB
FCB
PGND
BG
I
TH
I
TH
SGND
SGND
INTV
INTV
CC
CC
GN PART MARKING
GN PART MARKING
17781
I
ON
I
ON
V
V
IN
IN
V
V
EXTV
EXTV
CC
FB
FB
CC
1778
1778I
GN PACKAGE
16-LEAD PLASTIC SSOP
GN PACKAGE
16-LEAD PLASTIC SSOP
TJMAX = 125°C, θJA = 130°C/ W
TJMAX = 125°C, θJA = 130°C/ W
Consult LTC Marketing for parts specified with wider operating temperature ranges.
ELECTRICAL CHARACTERISTICS
The ● denotes specifications which apply over the full operating
temperature range, otherwise specifications are TA = 25°C. VIN = 15V unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Main Control Loop
I
Input DC Supply Current
Normal
Shutdown Supply Current
Q
900
15
2000
30
µA
µA
V
Feedback Reference Voltage
I
I
= 1.2V (Note 3) LTC1778E
= 1.2V (Note 3) LTC1778I
●
●
0.792
0.792
0.800
0.800
0.808
0.812
V
V
FB
TH
TH
∆V
∆V
Feedback Voltage Line Regulation
Feedback Voltage Load Regulation
Feedback Input Current
V
= 4V to 30V, I = 1.2V (Note 3)
0.002
–0.05
–5
%/V
%
FB(LINEREG)
FB(LOADREG)
IN
TH
I
= 0.5V to 1.9V (Note 3)
= 0.8V
●
–0.3
±50
2
TH
I
V
FB
nA
mS
V
FB
g
Error Amplifier Transconductance
Forced Continuous Threshold
Forced Continuous Pin Current
On-Time
I
= 1.2V (Note 3)
●
●
1.4
1.7
m(EA)
TH
V
0.76
0.8
0.84
–2
FCB
I
t
V
FCB
= 0.8V
–1
µA
FCB
ON
I
I
= 30µA, V = 0V (LTC1778-1)
198
396
233
466
268
536
ns
ns
ON
ON
ON
= 15µA, V = 0V (LTC1778-1)
ON
t
Minimum On-Time
I
= 180µA
50
100
ns
ON(MIN)
ON
1778fb
2
LTC1778/LTC1778-1
ELECTRICAL CHARACTERISTICS
The ● denotes specifications which apply over the full operating
temperature range, otherwise specifications are TA = 25°C. VIN = 15V unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
= 30µA
MIN
TYP
MAX
UNITS
t
Minimum Off-Time
I
250
400
ns
OFF(MIN)
ON
V
Maximum Current Sense Threshold
V
V
V
= 1V, V = 0.76V
●
●
●
113
79
158
133
93
186
153
107
214
mV
mV
mV
SENSE(MAX)
SENSE(MIN)
RNG
RNG
RNG
FB
V
– V
= 0V, V = 0.76V
PGND
SW
FB
= INTV , V = 0.76V
CC FB
V
Minimum Current Sense Threshold
– V
V
V
V
= 1V, V = 0.84V
–67
–47
–93
mV
mV
mV
RNG
RNG
RNG
FB
V
= 0V, V = 0.84V
PGND
SW
FB
= INTV , V = 0.84V
CC FB
∆V
Output Overvoltage Fault Threshold
Output Undervoltage Fault Threshold
RUN Pin Start Threshold
RUN Pin Latchoff Enable Threshold
RUN Pin Latchoff Threshold
Soft-Start Charge Current
Soft-Start Discharge Current
Undervoltage Lockout
5.5
520
0.8
7.5
600
1.5
4
9.5
680
2
%
mV
V
FB(OV)
V
V
V
V
FB(UV)
●
RUN/SS(ON)
RUN/SS(LE)
RUN/SS(LT)
RUN/SS(C)
RUN/SS(D)
RUN/SS Pin Rising
RUN/SS Pin Falling
4.5
4.2
–3
3
V
3.5
–1.2
1.8
3.4
3.5
2
V
I
I
V
V
V
V
= 0V
–0.5
0.8
µA
µA
V
RUN/SS
RUN/SS
= 4.5V, V = 0V
FB
V
V
Falling
●
●
3.9
4
IN(UVLO)
IN
IN
Undervoltage Lockout Release
TG Driver Pull-Up On Resistance
TG Driver Pull-Down On Resistance
BG Driver Pull-Up On Resistance
BG Driver Pull-Down On Resistance
TG Rise Time
Rising
V
IN(UVLOR)
TG R
TG R
BG R
BG R
TG High
TG Low
BG High
BG Low
3
Ω
UP
2
3
Ω
DOWN
UP
3
4
Ω
1
2
Ω
DOWN
TG t
TG t
C
C
C
C
= 3300pF
= 3300pF
= 3300pF
= 3300pF
20
20
20
20
ns
ns
ns
ns
r
f
LOAD
LOAD
LOAD
LOAD
TG Fall Time
BG t
BG t
BG Rise Time
r
f
BG Fall Time
Internal V Regulator
CC
V
Internal V Voltage
6V < V < 30V, V = 4V
EXTVCC
●
●
4.7
4.5
5
5.3
V
%
INTVCC
CC
IN
∆V
Internal V Load Regulation
I
I
I
= 0mA to 20mA, V = 4V
EXTVCC
–0.1
4.7
±2
LDO(LOADREG)
EXTVCC
CC
CC
CC
CC
V
EXTV Switchover Voltage
= 20mA, V
= 20mA, V
Rising
= 5V
V
CC
EXTVCC
EXTVCC
∆V
∆V
EXTV Switch Drop Voltage
150
200
300
mV
mV
EXTVCC
CC
EXTV Switchover Hysteresis
EXTVCC(HYS)
CC
PGOOD Output (LTC1778 Only)
∆V
∆V
∆V
PGOOD Upper Threshold
PGOOD Lower Threshold
PGOOD Hysteresis
V
V
V
Rising
5.5
7.5
–7.5
1
9.5
–9.5
2
%
%
%
V
FBH
FB
Falling
–5.5
FBL
FB
Returning
FB(HYS)
FB
V
PGOOD Low Voltage
I
= 5mA
0.15
0.4
PGL
PGOOD
Note 1: Absolute Maximum Ratings are those values beyond which the life of
a device may be impaired.
Note4:TheLTC1778Eisguaranteedtomeetperformancespecificationsfrom
0°C to 70°C. Specifications over the –40°C to 85°C operating temperature
range are assured by design, characterization and correlation with statistical
process controls. The LTC1778I is guaranteed over the full –40°C to 125°C
operating temperature range.
Note 2: T is calculated from the ambient temperature T and power
J
A
dissipation P as follows:
D
LTC1778E: T = T + (P • 130°C/W)
J
A
D
Note 3: The LTC1778 is tested in a feedback loop that adjusts V to achieve
FB
a specified error amplifier output voltage (I ).
TH
1778fb
3
LTC1778/LTC1778-1
U W
TYPICAL PERFOR A CE CHARACTERISTICS
Transient Response
(Discontinuous Mode)
Transient Response
Start-Up
RUN/SS
2V/DIV
VOUT
50mV/DIV
VOUT
50mV/DIV
VOUT
1V/DIV
IL
IL
IL
5A/DIV
5A/DIV
5A/DIV
20µs/DIV
LOAD STEP 0A TO 10A
VIN = 15V
1778 G01
20µs/DIV
LOAD STEP 1A TO 10A
VIN = 15V
1778 G02
50ms/DIV
1778 G19
VIN = 15V
VOUT = 2.5V
V
OUT = 2.5V
V
OUT = 2.5V
RLOAD = 0.25Ω
FCB = 0V
FIGURE 9 CIRCUIT
FCB = INTVCC
FIGURE 9 CIRCUIT
Efficiency vs Load Current
Efficiency vs Input Voltage
Frequency vs Input Voltage
100
90
80
70
60
50
100
95
300
280
260
240
220
200
FCB = 5V
FCB = 0V
FIGURE 9 CIRCUIT
FIGURE 9 CIRCUIT
DISCONTINUOUS
MODE
I
= 10A
= 0A
OUT
I
= 1A
LOAD
CONTINUOUS
90
MODE
I
= 10A
LOAD
I
OUT
85
V
V
= 10V
IN
OUT
= 2.5V
EXTV = 5V
CC
FIGURE 9 CIRCUIT
80
0.01
0.1
1
0
5
10
15
20
25
30
5
10
15
INPUT VOLTAGE (V)
20
0.001
10
25
INPUT VOLTAGE (V)
LOAD CURRENT (A)
1778 G03
1778 G04
1778 G05
Frequency vs Load Current
Load Regulation
ITH Voltage vs Load Current
300
250
0
–0.1
–0.2
–0.3
–0.4
2.5
2.0
1.5
1.0
0.5
0
FIGURE 9 CIRCUIT
FIGURE 9 CIRCUIT
CONTINUOUS MODE
200
150
DISCONTINUOUS
MODE
CONTINUOUS
MODE
100
50
0
DISCONTINUOUS
MODE
0
2
4
6
8
10
0
2
4
6
8
10
0
5
10
LOAD CURRENT (A)
15
LOAD CURRENT (A)
LOAD CURRENT (A)
1778 G26
1778 G06
1778 G07
1778fb
4
LTC1778/LTC1778-1
U W
TYPICAL PERFOR A CE CHARACTERISTICS
Current Sense Threshold
On-Time vs ION Current
On-Time vs VON Voltage
vs ITH Voltage
10k
1k
300
200
100
0
1000
V
= 0V
2V
VON
I
= 30µA
ION
V
=
RNG
800
600
400
200
0
1.4V
1V
0.7V
0.5V
100
10
–100
–200
1
10
100
0
1.0
I
1.5
2.0
2.5
3.0
0
1
2
3
0.5
I
ON
CURRENT (µA)
VOLTAGE (V)
V
VOLTAGE (V)
TH
ON
1778 G20
1778 G08
1778 G21
Maximum Current Sense
Threshold vs VRNG Voltage
Current Limit Foldback
On-Time vs Temperature
150
125
300
250
200
150
100
50
300
250
200
150
V
RNG
= 1V
I
= 30µA
VON
ION
V
= 0V
100
75
50
25
0
100
50
0
0
0
0.2
0.4
(V)
0.6
0.8
50
TEMPERATURE (°C)
100 125
0.5
1.0
V
1.25
1.5
1.75
2.0
–50 –25
0
25
75
0.75
V
VOLTAGE (V)
FB
RNG
1778 G09
1778 G10
1778 G22
Maximum Current Sense
Threshold vs RUN/SS Voltage
Feedback Reference Voltage
vs Temperature
Maximum Current Sense
Threshold vs Temperature
150
125
150
140
130
120
110
100
0.82
0.81
0.80
0.79
V
RNG
= 1V
V
RNG
= 1V
100
75
50
25
0
0.78
1.5
2
2.5
3
3.5
–50 –25
0
25
50
75 100 125
–50 –25
0
25
50
75 100 125
RUN/SS VOLTAGE (V)
TEMPERATURE (°C)
TEMPERATURE (°C)
1778 G23
1778 G12
1778 G11
1778fb
5
LTC1778/LTC1778-1
U W
TYPICAL PERFOR A CE CHARACTERISTICS
Input and Shutdown Currents
vs Input Voltage
INTVCC Load Regulation
Error Amplifier gm vs Temperature
2.0
1.8
1.6
1.4
1.2
1.0
0
–0.1
–0.2
–0.3
–0.4
–0.5
1200
1000
800
60
50
40
30
20
10
0
EXTV OPEN
CC
SHUTDOWN
600
400
200
0
EXTV = 5V
CC
0
10
20
30
40
50
–50 –25
0
25
50
75 100 125
20
INPUT VOLTAGE (V)
30
35
0
5
10
15
25
TEMPERATURE (°C)
INTV LOAD CURRENT (mA)
CC
1778 G25
1778 G13
1778 G24
RUN/SS Pin Current
vs Temperature
EXTVCC Switch Resistance
vs Temperature
FCB Pin Current vs Temperature
3
2
10
8
0
–0.25
–0.50
–0.75
PULL-DOWN CURRENT
1
6
0
4
–1.00
–1.25
–1.50
PULL-UP CURRENT
–1
2
–2
0
–50 –25
0
25
50
75 100 125
–50 –25
0
25
50
75 100 125
50
TEMPERATURE (°C)
100 125
–50 –25
0
25
75
TEMPERATURE (°C)
TEMPERATURE (°C)
1778 G16
1778 G14
1778 G15
RUN/SS Latchoff Thresholds
vs Temperature
Undervoltage Lockout Threshold
vs Temperature
5.0
4.5
4.0
3.5
4.0
3.5
3.0
2.5
LATCHOFF ENABLE
LATCHOFF THRESHOLD
3.0
2.0
–50 –25
0
25
50
75 100 125
–50 –25
0
25
50
75 100 125
TEMPERATURE (°C)
TEMPERATURE (C)
1778 G17
1778 G18
1778fb
6
LTC1778/LTC1778-1
U
U
U
PI FU CTIO S
RUN/SS (Pin 1): Run Control and Soft-Start Input. A
capacitor to ground at this pin sets the ramp time to full
output current (approximately 3s/µF) and the time delay
for overcurrent latchoff (see Applications Information).
Forcing this pin below 0.8V shuts down the device.
I
ON (Pin 7): On-Time Current Input. Tie a resistor from VIN
tothispintosettheone-shottimercurrentandtherebyset
the switching frequency.
VFB (Pin 8): Error Amplifier Feedback Input. This pin
connects the error amplifier input to an external resistive
PGOOD (Pin 2, LTC1778): Power Good Output. Open
drain logic output that is pulled to ground when the output
voltage is not within ±7.5% of the regulation point.
divider from VOUT
.
EXTVCC (Pin 9): External VCC Input. When EXTVCC ex-
ceeds 4.7V, an internal switch connects this pin to INTVCC
and shuts down the internal regulator so that controller
andgatedrivepowerisdrawnfromEXTVCC.Donotexceed
7V at this pin and ensure that EXTVCC < VIN.
V
ON (Pin 2, LTC1778-1): On-Time Voltage Input. Voltage
trip point for the on-time comparator. Tying this pin to the
output voltage or an external resistive divider from the
output makes the on-time proportional to VOUT. The
comparatorinputdefaultsto0.7Vwhenthepinisgrounded
or unavailable (LTC1778) and defaults to 2.4V when the
pin is tied to INTVCC. Tie this pin to INTVCC in high VOUT
applications to use a lower RON value.
VIN (Pin 10): Main Input Supply. Decouple this pin to
PGND with an RC filter (1Ω, 0.1µF).
INTVCC (Pin 11): Internal 5V Regulator Output. The driver
and control circuits are powered from this voltage. De-
couple this pin to power ground with a minimum of 4.7µF
low ESR tantalum capacitor.
VRNG (Pin 3): Sense Voltage Range Input. The voltage at
this pin is ten times the nominal sense voltage at maxi-
mum output current and can be set from 0.5V to 2V by a
resistive divider from INTVCC. The nominal sense voltage
defaults to 70mV when this pin is tied to ground, 140mV
when tied to INTVCC.
BG (Pin 12): Bottom Gate Drive. Drives the gate of the
bottom N-channel MOSFET between ground and INTVCC.
PGND (Pin 13):Power Ground. Connect this pin closely to
the source of the bottom N-channel MOSFET, the (–)
terminal of CVCC and the (–) terminal of CIN.
FCB (Pin 4): Forced Continuous Input. Tie this pin to
ground to force continuous synchronous operation at low
load, to INTVCC to enable discontinuous mode operation
atlowloadortoaresistivedividerfromasecondaryoutput
when using a secondary winding.
SW (Pin 14): Switch Node. The (–) terminal of the boot-
strap capacitor CB connects here. This pin swings from a
diode voltage drop below ground up to VIN.
TG (Pin 15): Top Gate Drive. Drives the top N-channel
MOSFET with a voltage swing equal to INTVCC superim-
posed on the switch node voltage SW.
ITH (Pin 5): Current Control Threshold and Error Amplifier
Compensation Point. The current comparator threshold
increases with this control voltage. The voltage ranges
from 0V to 2.4V with 0.8V corresponding to zero sense
voltage (zero current).
BOOST (Pin 16): Boosted Floating Driver Supply. The (+)
terminal of the bootstrap capacitor CB connects here. This
pin swings from a diode voltage drop below INTVCC up to
VIN + INTVCC.
SGND (Pin 6): Signal Ground. All small-signal compo-
nents and compensation components should connect to
this ground, which in turn connects to PGND at one point.
1778fb
7
LTC1778/LTC1778-1
U
U
W
FU CTIO AL DIAGRA
R
ON
V
IN
**
10
V
IN
2
V
ON
7
I
ON
4
FCB
9
EXTV
CC
4.7V
+
C
IN
0.7V
2.4V
1µA
+
–
0.8V
REF
1
0.8V
5V
REG
+
–
F
BOOST
16
V
I
VON
ION
t
=
(10pF)
R
S
ON
C
TG
B
Q
I
FCNT
M1
15
SW
14
ON
20k
+
–
+
–
L1
SWITCH
LOGIC
I
V
CMP
REV
OUT
D
B
INTV
11
CC
SHDN
OV
+
C
C
VCC
OUT
1.4V
BG
12
M2
V
RNG
PGND
13
3
×
PGOOD*
2
0.7V
3.3µA
R2
1
0.74V
240k
+
–
1V
Q2 Q4
UV
OV
Q6
I
V
THB
FB
8
Q3
Q1
R1
+
–
SGND
6
Q5
+
–
0.86V
0.8V
RUN
SHDN
SS
–
+
1.2µA
EA
×4
–
+
6V
0.6V
C
C
SS
C1
I
TH
RUN/SS
1
5
0.8V
0.6V
R
C
1778 FD
*LTC1778
**LTC1778-1
1778fb
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LTC1778/LTC1778-1
U
OPERATIO
Main Control Loop
Furthermore, in an overvoltage condition, M1 is turned off
and M2 is turned on and held on until the overvoltage
condition clears.
The LTC1778 is a current mode controller for DC/DC
step-down converters. In normal operation, the top
MOSFET is turned on for a fixed interval determined by a
one-shot timer OST. When the top MOSFET is turned off,
the bottom MOSFET is turned on until the current com-
parator ICMP trips, restarting the one-shot timer and initi-
ating the next cycle. Inductor current is determined by
sensing the voltage between the PGND and SW pins using
the bottom MOSFET on-resistance . The voltage on the ITH
pin sets the comparator threshold corresponding to in-
ductor valley current. The error amplifier EA adjusts this
voltage by comparing the feedback signal VFB from the
output voltage with an internal 0.8V reference. If the load
current increases, it causes a drop in the feedback voltage
relativetothereference. TheITH voltagethenrisesuntilthe
average inductor current again matches the load current.
Foldback current limiting is provided if the output is
shorted to ground. As VFB drops, the buffered current
threshold voltage ITHB is pulled down by clamp Q3 to a 1V
level set by Q4 and Q6. This reduces the inductor valley
current level to one sixth of its maximum value as VFB
approaches 0V.
Pulling the RUN/SS pin low forces the controller into its
shutdown state, turning off both M1 and M2. Releasing
the pin allows an internal 1.2µA current source to charge
up an external soft-start capacitor CSS. When this voltage
reaches 1.5V, the controller turns on and begins switch-
ing, but with the ITH voltage clamped at approximately
0.6V below the RUN/SS voltage. As CSS continues to
charge, the soft-start current limit is removed.
At low load currents, the inductor current can drop to zero
and become negative. This is detected by current reversal
comparator IREV which then shuts off M2, resulting in
discontinuous operation. Both switches will remain off
with the output capacitor supplying the load current until
the ITH voltage rises above the zero current level (0.8V) to
initiate another cycle. Discontinuous mode operation is
disabled by comparator F when the FCB pin is brought
below 0.8V, forcing continuous synchronous operation.
INTVCC/EXTVCC Power
Power for the top and bottom MOSFET drivers and most
of the internal controller circuitry is derived from the
INTVCC pin. The top MOSFET driver is powered from a
floating bootstrap capacitor CB. This capacitor is re-
chargedfromINTVCC throughanexternalSchottkydiode
DB when the top MOSFET is turned off. When the EXTVCC
pin is grounded, an internal 5V low dropout regulator
supplies the INTVCC power from VIN. If EXTVCC rises
above 4.7V, the internal regulator is turned off, and an
internal switch connects EXTVCC to INTVCC. This allows
ahighefficiencysourceconnectedtoEXTVCC, suchasan
external 5V supply or a secondary output from the
converter, to provide the INTVCC power. Voltages up to
7V can be applied to EXTVCC for additional gate drive. If
the input voltage is low and INTVCC drops below 3.5V,
undervoltage lockout circuitry prevents the power
switches from turning on.
The operating frequency is determined implicitly by the
top MOSFET on-time and the duty cycle required to
maintain regulation. The one-shot timer generates an on-
time that is proportional to the ideal duty cycle, thus
holding frequency approximately constant with changes
in VIN. The nominal frequency can be adjusted with an
external resistor RON.
Overvoltage and undervoltage comparators OV and UV
pull the PGOOD output low if the output feedback voltage
exits a ±7.5% window around the regulation point.
1778fb
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The basic LTC1778 application circuit is shown in
Figure 1. External component selection is primarily de-
termined by the maximum load current and begins with
the selection of the sense resistance and power MOSFET
switches. The LTC1778 uses the on-resistance of the
synchronous power MOSFET for determining the induc-
tor current. The desired amount of ripple current and
operatingfrequencylargelydeterminestheinductorvalue.
Finally, CIN is selected for its ability to handle the large
RMS current into the converter and COUT is chosen with
low enough ESR to meet the output voltage ripple and
transient specification.
resulting in nominal sense voltages of 50mV to 200mV.
Additionally, the VRNG pin can be tied to SGND or INTVCC
in which case the nominal sense voltage defaults to 70mV
or 140mV, respectively. The maximum allowed sense
voltage is about 1.33 times this nominal value.
Power MOSFET Selection
The LTC1778 requires two external N-channel power
MOSFETs, one for the top (main) switch and one for the
bottom (synchronous) switch. Important parameters for
the power MOSFETs are the breakdown voltage V(BR)DSS
threshold voltage V(GS)TH, on-resistance RDS(ON), reverse
transfercapacitanceCRSS andmaximumcurrentIDS(MAX)
,
.
Choosing the LTC1778 or LTC1778-1
The gate drive voltage is set by the 5V INTVCC supply.
Consequently, logic-level threshold MOSFETs must be
used in LTC1778 applications. If the input voltage is
expected to drop below 5V, then sub-logic level threshold
MOSFETs should be considered.
The LTC1778 has an open-drain PGOOD output that
indicates when the output voltage is within ±7.5% of the
regulationpoint.TheLTC1778-1tradesthePGOODpinfor
a VON pin that allows the on-time to be adjusted. Tying the
VON pinhighresultsinlowervaluesforRON whichisuseful
in high VOUT applications. The VON pin also provides a
means to adjust the on-time to maintain constant fre-
quency operation in applications where VOUT changes and
to correct minor frequency shifts with changes in load
current. Finally, the VON pin can be used to provide
additionalcurrentlimitinginpositive-to-negativeconvert-
ers and as a control input to synchronize the switching
frequency with a phase locked loop.
When the bottom MOSFET is used as the current sense
element, particular attention must be paid to its on-
resistance. MOSFET on-resistance is typically specified
with a maximum value RDS(ON)(MAX) at 25°C. In this case,
additional margin is required to accommodate the rise in
MOSFET on-resistance with temperature:
RSENSE
RDS(ON)(MAX)
=
ρT
Maximum Sense Voltage and VRNG Pin
The ρT term is a normalization factor (unity at 25°C)
accounting for the significant variation in on-resistance
Inductor current is determined by measuring the voltage
across a sense resistance that appears between the PGND
and SW pins. The maximum sense voltage is set by the
voltage applied to the VRNG pin and is equal to approxi-
mately (0.133)VRNG. The current mode control loop will
not allow the inductor current valleys to exceed
(0.133)VRNG/RSENSE. In practice, one should allow some
margin for variations in the LTC1778 and external compo-
nent values and a good guide for selecting the sense
resistance is:
2.0
1.5
1.0
0.5
0
VRNG
10 •IOUT(MAX)
RSENSE
=
50
100
–50
150
0
JUNCTION TEMPERATURE (°C)
1778 F02
An external resistive divider from INTVCC can be used to
set the voltage of the VRNG pin between 0.5V and 2V
Figure 2. RDS(ON) vs. Temperature
1778fb
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with temperature, typically about 0.4%/°C as shown in
Figure 2. For a maximum junction temperature of 100°C,
using a value ρT = 1.3 is reasonable.
Tying a resistor RON from VIN to the ION pin yields an on-
time inversely proportional to VIN. For a step-down con-
verter, this results in approximately constant frequency
operation as the input supply varies:
The power dissipated by the top and bottom MOSFETs
strongly depends upon their respective duty cycles and
the load current. When the LTC1778 is operating in
continuous mode, the duty cycles for the MOSFETs are:
VOUT
f =
[HZ]
VVON RON(10pF)
Toholdfrequencyconstantduringoutputvoltagechanges,
tie the VON pin to VOUT or to a resistive divider from VOUT
when VOUT > 2.4V. The VON pin has internal clamps that
limit its input to the one-shot timer. If the pin is tied below
0.7V, the input to the one-shot is clamped at 0.7V. Simi-
larly, if the pin is tied above 2.4V, the input is clamped at
2.4V. In high VOUT applications, tying VON to INTVCC so
that the comparator input is 2.4V results in a lower value
for RON. Figures 3a and 3b show how RON relates to
switching frequency for several common output voltages.
VOUT
DTOP
DBOT
=
=
V
IN
V – VOUT
IN
V
IN
The resulting power dissipation in the MOSFETs at maxi-
mum output current are:
PTOP = DTOP OUT(MAX)
I
2 ρT(TOP) RDS(ON)(MAX)
+ k VIN IOUT(MAX) CRSS
PBOT = DBOT OUT(MAX)
2 ρT(BOT) RDS(ON)(MAX)
2
1000
f
I
Both MOSFETs have I2R losses and the top MOSFET
includesanadditionaltermfortransitionlosses,whichare
largest at high input voltages. The constant k = 1.7A–1 can
be used to estimate the amount of transition loss. The
bottomMOSFETlossesaregreatestwhenthebottomduty
cycle is near 100%, during a short-circuit or at high input
voltage.
V
= 3.3V
OUT
V
= 1.5V
V
= 2.5V
OUT
OUT
100
100
1000
(kΩ)
10000
1778 F03a
R
ON
Operating Frequency
Figure 3a. Switching Frequency vs RON
for the LTC1778 and LTC1778-1 (VON = 0V)
The choice of operating frequency is a tradeoff between
efficiency and component size. Low frequency operation
improvesefficiencybyreducingMOSFETswitchinglosses
but requires larger inductance and/or capacitance in order
to maintain low output ripple voltage.
1000
V
= 12V
OUT
TheoperatingfrequencyofLTC1778applicationsisdeter-
mined implicitly by the one-shot timer that controls the
on-time tON of the top MOSFET switch. The on-time is set
by the current into the ION pin and the voltage at the VON
pin (LTC1778-1) according to:
V
= 5V
OUT
V
= 3.3V
OUT
100
100
V
1000
(kΩ)
10000
1778 F03b
tON
=
VON (10pF)
R
ON
I
ION
Figure 3b. Switching Frequency vs RON
for the LTC1778-1 (VON = INTVCC
)
VON defaults to 0.7V in the LTC1778.
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Because the voltage at the ION pin is about 0.7V, the
currentintothispinisnotexactlyinverselyproportionalto
VIN, especially in applications with lower input voltages.
To correct for this error, an additional resistor RON2
connected from the ION pin to the 5V INTVCC supply will
further stabilize the frequency.
due to a dropping input voltage for example, then the
output will drop out of regulation. The minimum input
voltage to avoid dropout is:
tON + tOFF(MIN)
V
= VOUT
IN(MIN)
tON
A plot of maximum duty cycle vs frequency is shown in
Figure 5.
5V
0.7V
RON2
=
RON
Inductor Selection
Changes in the load current magnitude will also cause
frequency shift. Parasitic resistance in the MOSFET
switches and inductor reduce the effective voltage across
the inductance, resulting in increased duty cycle as the
loadcurrentincreases.Bylengtheningtheon-timeslightly
as current increases, constant frequency operation can be
maintained. This is accomplished with a resistive divider
from the ITH pin to the VON pin and VOUT. The values
required will depend on the parasitic resistances in the
specific application. A good starting point is to feed about
25% of the voltage change at the ITH pin to the VON pin as
shown in Figure 4a. Place capacitance on the VON pin to
filter out the ITH variations at the switching frequency. The
resistor load on ITH reduces the DC gain of the error amp
and degrades load regulation, which can be avoided by
using the PNP emitter follower of Figure 4b.
Given the desired input and output voltages, the inductor
value and operating frequency determine the ripple
current:
⎛
⎜
⎝
⎞
⎟
⎠
⎛
⎞
VOUT
f L
VOUT
V
IN
∆IL =
1−
⎜
⎟
⎝
⎠
Lower ripple current reduces core losses in the inductor,
ESR losses in the output capacitors and output voltage
2.0
1.5
DROPOUT
REGION
1.0
0.5
0
Minimum Off-time and Dropout Operation
The minimum off-time tOFF(MIN) is the smallest amount of
time that the LTC1778 is capable of turning on the bottom
MOSFET, tripping the current comparator and turning the
MOSFET back off. This time is generally about 250ns. The
minimum off-time limit imposes a maximum duty cycle of
tON/(tON +tOFF(MIN)).Ifthemaximumdutycycleisreached,
0
0.25
0.50
0.75
1.0
DUTY CYCLE (V /V
)
OUT IN
1778 F05
Figure 5. Maximum Switching Frequency vs Duty Cycle
R
R
VON1
VON1
3k
30k
V
V
V
ON
V
ON
OUT
OUT
C
R
VON
C
VON2
VON
R
VON2
100k
0.01µF
10k
10k
0.01µF
LTC1778
TH
LTC1778
TH
INTV
CC
R
R
C
C
Q1
2N5087
I
I
C
C
C
C
1778 F04
(4a)
(4b)
Figure 4. Correcting Frequency Shift with Load Current Changes
1778fb
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ripple. Highest efficiency operation is obtained at low
frequency with small ripple current. However, achieving
this requires a large inductor. There is a tradeoff between
component size, efficiency and operating frequency.
This formula has a maximum at VIN = 2VOUT, where
IRMS = IOUT(MAX)/2. This simple worst-case condition is
commonly used for design because even significant
deviations do not offer much relief. Note that ripple
current ratings from capacitor manufacturers are often
basedononly2000hoursoflifewhichmakesitadvisable
to derate the capacitor.
A reasonable starting point is to choose a ripple current
that is about 40% of IOUT(MAX). The largest ripple current
occurs at the highest VIN. To guarantee that ripple current
does not exceed a specified maximum, the inductance
should be chosen according to:
The selection of COUT is primarily determined by the ESR
required to minimize voltage ripple and load step
transients. The output ripple ∆VOUT is approximately
bounded by:
⎛
⎞⎛
⎞
VOUT
f ∆I
VOUT
L =
1−
⎜
⎟⎜
⎟
V
⎝
⎠⎝
⎠
L(MAX)
IN(MAX)
⎛
⎞
1
∆VOUT ≤ ∆IL ESR +
⎜
⎟
Once the value for L is known, the type of inductor must
be selected. High efficiency converters generally cannot
afford the core loss found in low cost powdered iron
cores, forcing the use of more expensive ferrite, molyper-
malloyorKoolMµ® cores. Avarietyofinductorsdesigned
for high current, low voltage applications are available
from manufacturers such as Sumida, Panasonic, Coil-
tronics, Coilcraft and Toko.
8fCOUT
⎝
⎠
Since ∆IL increases with input voltage, the output ripple is
highestatmaximuminputvoltage.Typically,oncetheESR
requirement is satisfied, the capacitance is adequate for
filtering and has the necessary RMS current rating.
Multiple capacitors placed in parallel may be needed to
meet the ESR and RMS current handling requirements.
Dry tantalum, special polymer, aluminum electrolytic and
ceramic capacitors are all available in surface mount
packages. Special polymer capacitors offer very low ESR
but have lower capacitance density than other types.
Tantalum capacitors have the highest capacitance density
but it is important to only use types that have been surge
tested for use in switching power supplies. Aluminum
electrolytic capacitors have significantly higher ESR, but
can be used in cost-sensitive applications providing that
consideration is given to ripple current ratings and long
term reliability. Ceramic capacitors have excellent low
ESRcharacteristicsbutcanhaveahighvoltagecoefficient
and audible piezoelectric effects. The high Q of ceramic
capacitors with trace inductance can also lead to signifi-
cant ringing. When used as input capacitors, care must be
taken to ensure that ringing from inrush currents and
switching does not pose an overvoltage hazard to the
power switches and controller. To dampen input voltage
transients, add a small 5µF to 50µF aluminum electrolytic
capacitor with an ESR in the range of 0.5Ω to 2Ω. High
performance through-hole capacitors may also be used,
Schottky Diode D1 Selection
The Schottky diode D1 shown in Figure 1 conducts during
the dead time between the conduction of the power
MOSFET switches. It is intended to prevent the body diode
ofthebottomMOSFETfromturningonandstoringcharge
during the dead time, which can cause a modest (about
1%) efficiency loss. The diode can be rated for about one
half to one fifth of the full load current since it is on for only
a fraction of the duty cycle. In order for the diode to be
effective, the inductance between it and the bottom MOS-
FET must be as small as possible, mandating that these
components be placed adjacently. The diode can be omit-
ted if the efficiency loss is tolerable.
CIN and COUT Selection
The input capacitance CIN is required to filter the square
wave current at the drain of the top MOSFET. Use a low
ESR capacitor sized to handle the maximum RMS current.
VOUT
V
IN
V
IN
VOUT
IRMS ≅ IOUT(MAX)
– 1
Kool Mµ is a registered trademark of Magnetics, Inc.
1778fb
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LTC1778/LTC1778-1
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APPLICATIO S I FOR ATIO
but an additional ceramic capacitor in parallel is recom-
transformer. However, if the controller goes into discon-
tinuous mode and halts switching due to a light primary
load current, then VOUT2 will droop. An external resistor
divider from VOUT2 to the FCB pin sets a minimum voltage
VOUT2(MIN) below which continuous operation is forced
until VOUT2 has risen above its minimum.
mended to reduce the effect of their lead inductance.
Top MOSFET Driver Supply (CB, DB)
AnexternalbootstrapcapacitorCBconnectedtotheBOOST
pinsuppliesthegatedrivevoltageforthetopsideMOSFET.
This capacitor is charged through diode DB from INTVCC
when the switch node is low. When the top MOSFET turns
on, the switch node rises to VIN and the BOOST pin rises
to approximately VIN + INTVCC. The boost capacitor needs
to store about 100 times the gate charge required by the
topMOSFET. Inmostapplications0.1µFto0.47µF, X5Ror
X7R dielectric capacitor is adequate.
⎛
⎞
R4
R3
VOUT2(MIN) = 0.8V 1+
⎜
⎟
⎝
⎠
Fault Conditions: Current Limit and Foldback
The maximum inductor current is inherently limited in a
currentmodecontrollerbythemaximumsensevoltage.In
the LTC1778, the maximum sense voltage is controlled by
the voltage on the VRNG pin. With valley current control,
the maximum sense voltage and the sense resistance
determine the maximum allowed inductor valley current.
The corresponding output current limit is:
Discontinuous Mode Operation and FCB Pin
The FCB pin determines whether the bottom MOSFET
remains on when current reverses in the inductor. Tying
this pin above its 0.8V threshold enables discontinuous
operation where the bottom MOSFET turns off when
inductor current reverses. The load current at which
current reverses and discontinuous operation begins de-
pends on the amplitude of the inductor ripple current and
will vary with changes in VIN. Tying the FCB pin below the
0.8Vthresholdforcescontinuoussynchronousoperation,
allowing current to reverse at light loads and maintaining
high frequency operation.
VSNS(MAX)
1
2
ILIMIT
=
+ ∆IL
RDS(ON) ρT
The current limit value should be checked to ensure that
ILIMIT(MIN) >IOUT(MAX).Theminimumvalueofcurrentlimit
generally occurs with the largest VIN at the highest ambi-
ent temperature, conditions that cause the largest power
loss in the converter. Note that it is important to check for
self-consistency between the assumed MOSFET junction
temperature and the resulting value of ILIMIT which heats
the MOSFET switches.
In addition to providing a logic input to force continuous
operation, the FCB pin provides a means to maintain a
flyback winding output when the primary is operating in
discontinuous mode. The secondary output VOUT2 is nor-
mally set as shown in Figure 6 by the turns ratio N of the
Caution should be used when setting the current limit
based upon the RDS(ON) of the MOSFETs. The maximum
current limit is determined by the minimum MOSFET on-
resistance. Data sheets typically specify nominal and
maximum values for RDS(ON), but not a minimum. A
reasonable assumption is that the minimum RDS(ON) lies
the same amount below the typical value as the maximum
liesaboveit.ConsulttheMOSFETmanufacturerforfurther
guidelines.
V
IN
+
C
IN
V
IN
1N4148
V
TG
OUT2
•
OPTIONAL
+
LTC1778
EXTV
C
OUT2
EXTV
CC
CONNECTION
5V < V < 7V
SW
1µF
CC
V
OUT1
R4
R3
•
OUT2
T1
1:N
+
C
FCB
OUT
To further limit current in the event of a short circuit to
ground, the LTC1778 includes foldback current limiting. If
the output falls by more than 25%, then the maximum
sense voltage is progressively lowered to about one sixth
BG
SGND
PGND
1778 F06
Figure 6. Secondary Output Loop and EXTVCC Connection
of its full value.
1778fb
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will start-up using the internal linear regulator until the
boosted output supply is available.
INTVCC Regulator
An internal P-channel low dropout regulator produces the
5V supply that powers the drivers and internal circuitry
within the LTC1778. The INTVCC pin can supply up to
50mA RMS and must be bypassed to ground with a
minimum of 4.7µF low ESR tantalum capacitor. Good
bypassing is necessary to supply the high transient cur-
rents required by the MOSFET gate drivers. Applications
using large MOSFETs with a high input voltage and high
frequency of operation may cause the LTC1778 to exceed
its maximum junction temperature rating or RMS current
rating. Most of the supply current drives the MOSFET
gates unless an external EXTVCC source is used. In con-
tinuousmodeoperation,thiscurrentisIGATECHG =f(Qg(TOP)
+ Qg(BOT)). The junction temperature can be estimated
from the equations given in Note 2 of the Electrical
Characteristics. For example, the LTC1778CGN is limited
to less than 14mA from a 30V supply:
External Gate Drive Buffers
The LTC1778 drivers are adequate for driving up to about
30nC into MOSFET switches with RMS currents of 50mA.
Applications with larger MOSFET switches or operating at
frequencies requiring greater RMS currents will benefit
fromusingexternalgatedrivebufferssuchastheLTC1693.
Alternately, the external buffer circuit shown in Figure 7
can be used. Note that the bipolar devices reduce the
signal swing at the MOSFET gate, and benefit from an
increased EXTVCC voltage of about 6V.
BOOST
INTV
CC
Q1
Q3
FMMT619
GATE
OF M1
FMMT619
10Ω
10Ω
GATE
OF M2
TG
BG
Q2
FMMT720
Q4
FMMT720
TJ = 70°C + (14mA)(30V)(130°C/W) = 125°C
SW
PGND
1778 F07
Forlargercurrents, considerusinganexternalsupplywith
the EXTVCC pin.
Figure 7. Optional External Gate Driver
EXTVCC Connection
Soft-Start and Latchoff with the RUN/SS Pin
The EXTVCC pin can be used to provide MOSFET gate drive
and control power from the output or another external
source during normal operation. Whenever the EXTVCC
pin is above 4.7V the internal 5V regulator is shut off and
an internal 50mA P-channel switch connects the EXTVCC
pintoINTVCC.INTVCC powerissuppliedfromEXTVCC until
this pin drops below 4.5V. Do not apply more than 7V to
the EXTVCC pin and ensure that EXTVCC ≤ VIN. The follow-
ing list summarizes the possible connections for EXTVCC:
The RUN/SS pin provides a means to shut down the
LTC1778 as well as a timer for soft-start and overcurrent
latchoff. Pulling the RUN/SS pin below 0.8V puts the
LTC1778 into a low quiescent current shutdown (IQ <
30µA). Releasing the pin allows an internal 1.2µA current
source to charge up the external timing capacitor CSS. If
RUN/SS has been pulled all the way to ground, there is a
delay before starting of about:
1. EXTVCC grounded. INTVCC is always powered from the
internal 5V regulator.
1.5V
1.2µA
tDELAY
=
CSS = 1.3s/µF CSS
(
)
2. EXTVCC connected to an external supply. A high effi-
ciency supply compatible with the MOSFET gate drive
requirements (typically 5V) can improve overall
efficiency.
When the voltage on RUN/SS reaches 1.5V, the LTC1778
begins operating with a clamp on ITH of approximately
0.9V. As the RUN/SS voltage rises to 3V, the clamp on ITH
is raised until its full 2.4V range is available. This takes an
additional 1.3s/µF, during which the load current is folded
backuntiltheoutputreaches75%ofitsfinalvalue. Thepin
can be driven from logic as shown in Figure 7. Diode D1
3. EXTVCC connected to an output derived boost network.
The low voltage output can be boosted using a charge
pump or flyback winding to greater than 4.7V. The system
1778fb
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reduces the start delay while allowing CSS to charge up
shown in Figure 8b eliminates the additional shutdown
current, but requires a diode to isolate CSS . Any pull-up
network must be able to pull RUN/SS above the 4.2V
maximum threshold of the latchoff circuit and overcome
the 4µA maximum discharge current.
slowly for the soft-start function.
After the controller has been started and given adequate
time to charge up the output capacitor, CSS is used as a
short-circuit timer. After the RUN/SS pin charges above
4V, if the output voltage falls below 75% of its regulated
value, then a short-circuit fault is assumed. A 1.8µA cur-
rent then begins discharging CSS. If the fault condition
persists until the RUN/SS pin drops to 3.5V, then the con-
troller turns off both power MOSFETs, shutting down the
converter permanently. The RUN/SS pin must be actively
pulled down to ground in order to restart operation.
Efficiency Considerations
The percent efficiency of a switching regulator is equal to
the output power divided by the input power times 100%.
It is often useful to analyze individual losses to determine
what is limiting the efficiency and which change would
produce the most improvement. Although all dissipative
elements in the circuit produce losses, four main sources
account for most of the losses in LTC1778 circuits:
1. DC I2R losses. These arise from the resistances of the
MOSFETs, inductor and PC board traces and cause the
efficiency to drop at high output currents. In continuous
mode the average output current flows through L, but is
chopped between the top and bottom MOSFETs. If the two
MOSFETs have approximately the same RDS(ON), then the
resistanceofoneMOSFETcansimplybesummedwiththe
resistances of L and the board traces to obtain the DC I2R
loss.Forexample,ifRDS(ON) =0.01ΩandRL =0.005Ω,the
loss will range from 15mW to 1.5W as the output current
varies from 1A to 10A.
Theovercurrentprotectiontimerrequiresthatthesoft-start
timing capacitor CSS be made large enough to guarantee
that the output is in regulation by the time CSS has reached
the 4V threshold. In general, this will depend upon the size
of the output capacitance, output voltage and load current
characteristic. A minimum soft-start capacitor can be
estimated from:
CSS > COUT VOUT RSENSE (10–4 [F/V s])
Generally 0.1µF is more than sufficient.
Overcurrent latchoff operation is not always needed or
desired. Load current is already limited during a short-
circuit by the current foldback circuitry and latchoff
operation can prove annoying during troubleshooting.
The feature can be overridden by adding a pull-up current
greater than 5µA to the RUN/SS pin. The additional
current prevents the discharge of CSS during a fault and
also shortens the soft-start period. Using a resistor to VIN
as shown in Figure 8a is simple, but slightly increases
shutdown current. Connecting a resistor to INTVCC as
2. Transition loss. This loss arises from the brief amount
of time the top MOSFET spends in the saturated region
duringswitchnodetransitions. Itdependsupontheinput
voltage, load current, driver strength and MOSFET
capacitance, among other factors. The loss is significant
at input voltages above 20V and can be estimated from:
2
Transition Loss ≅ (1.7A–1) VIN IOUT CRSS
f
INTV
CC
3. INTVCC current. This is the sum of the MOSFET driver
and control currents. This loss can be reduced by supply-
ing INTVCC current through the EXTVCC pin from a high
efficiency source, such as an output derived boost net-
work or alternate supply if available.
R
*
SS
V
IN
RUN/SS
3.3V OR 5V
RUN/SS
*
D2*
R
SS
D1
2N7002
C
SS
C
SS
4. CIN loss. The input capacitor has the difficult job of
filtering the large RMS input current to the regulator. It
must have a very low ESR to minimize the AC I2R loss and
sufficient capacitance to prevent the RMS current from
causing additional upstream losses in fuses or batteries.
1778fb
1778 F08
*OPTIONAL TO OVERRIDE
OVERCURRENT LATCHOFF
(8a)
(8b)
Figure 8. RUN/SS Pin Interfacing with Latchoff Defeated
16
LTC1778/LTC1778-1
W U U
APPLICATIO S I FOR ATIO
U
Other losses, including COUT ESR loss, Schottky diode D1
conduction loss during dead time and inductor core loss
generally account for less than 2% additional loss.
Selecting a standard value of 1.8µH results in a maximum
ripple current of:
⎛
⎞
2.5V
2.5V
28V
When making adjustments to improve efficiency, the
input current is the best indicator of changes in efficiency.
Ifyoumakeachangeandtheinputcurrentdecreases,then
the efficiency has increased. If there is no change in input
current, then there is no change in efficiency.
∆IL =
1–
= 5.1A
⎜
⎟
⎝
⎠
250kHz 1.8µH
(
)(
)
Next, choose the synchronous MOSFET switch. Choosing
a Si4874 (RDS(ON) = 0.0083Ω (NOM) 0.010Ω (MAX),
θJA = 40°C/W) yields a nominal sense voltage of:
Checking Transient Response
VSNS(NOM) = (10A)(1.3)(0.0083Ω) = 108mV
The regulator loop response can be checked by looking at
the load transient response. Switching regulators take
several cycles to respond to a step in load current. When
a load step occurs, VOUT immediately shifts by an amount
equal to ∆ILOAD (ESR), where ESR is the effective series
resistance of COUT. ∆ILOAD also begins to charge or
dischargeCOUT generatingafeedbackerrorsignalusedby
the regulator to return VOUT to its steady-state value.
During this recovery time, VOUT can be monitored for
overshoot or ringing that would indicate a stability prob-
lem. The ITH pin external components shown in Figure 9
will provide adequate compensation for most applica-
tions. For a detailed explanation of switching control loop
theory see Application Note 76.
TyingVRNG to1.1V willsetthecurrentsensevoltagerange
for a nominal value of 110mV with current limit occurring
at 146mV. To check if the current limit is acceptable,
assume a junction temperature of about 80°C above a
70°C ambient with ρ150°C = 1.5:
146mV
1
2
ILIMIT
≥
+
5.1A = 12A
(
)
1.5 0.010Ω
(
)(
)
and double check the assumed TJ in the MOSFET:
2
28V –2.5V
PBOT
=
12A 1.5 0.010Ω = 1.97W
28V
TJ = 70°C + (1.97W)(40°C/W) = 149°C
Because the top MOSFET is on for such a short time, an
Si4884 RDS(ON)(MAX) = 0.0165Ω, CRSS = 100pF, θJA
Design Example
=
As a design example, take a supply with the following
specifications:VIN =7Vto28V(15Vnominal), VOUT =2.5V
±5%, IOUT(MAX) = 10A, f = 250kHz. First, calculate the
40°C/W will be sufficient. Checking its power dissipation
at current limit with ρ100°C = 1.4:
timing resistor with VON = VOUT
:
2
2.5V
28V
PTOP
=
12A 1.4 0.0165Ω +
(
) ( )(
)
2.5V
RON
=
= 1.42MΩ
2
0.7V 250kHz 10pF
)( )(
(
)
1.7 28V 12A 100pF 250kHz
(
)( ) ( )( )(
)
and choose the inductor for about 40% ripple current at
the maximum VIN:
= 0.30W + 0.40W = 0.7W
TJ = 70°C + (0.7W)(40°C/W) = 98°C
⎛
⎞
2.5V
2.5V
28V
L =
1−
= 2.3µH
The junction temperatures will be significantly less at
nominal current, but this analysis shows that careful
attention to heat sinking will be necessary in this circuit.
⎜
⎟
⎝
⎠
250kHz 0.4 10A
(
)( )(
)
1778fb
17
LTC1778/LTC1778-1
W U U
U
APPLICATIO S I FOR ATIO
CIN is chosen for an RMS current rating of about 5A at
85°C. The output capacitors are chosen for a low ESR of
0.013Ω to minimize output voltage changes due to induc-
tor ripple current and load steps. The ripple voltage will be
only:
• The ground plane layer should not have any traces and
it should be as close as possible to the layer with power
MOSFETs.
• Place CIN, COUT, MOSFETs, D1 and inductor all in one
compactarea.Itmayhelptohavesomecomponentson
the bottom side of the board.
∆VOUT(RIPPLE) = ∆IL(MAX) (ESR)
= (5.1A) (0.013Ω) = 66mV
• Place LTC1778 chip with pins 9 to 16 facing the power
components. Keep the components connected to pins
1 to 8 close to LTC1778 (noise sensitive components).
However, a 0A to 10A load step will cause an output
change of up to:
∆VOUT(STEP) =∆ILOAD (ESR)=(10A)(0.013Ω)=130mV
•
Use an immediate via to connect the components to
ground plane including SGND and PGND of LTC1778.
Use several bigger vias for power components.
An optional 22µF ceramic output capacitor is included to
minimize the effect of ESL in the output ripple. The
complete circuit is shown in Figure 9.
• Use compact plane for switch node (SW) to improve
cooling of the MOSFETs and to keep EMI down.
PC Board Layout Checklist
• Use planes for VIN and VOUT to maintain good voltage
filtering and to keep power losses low.
When laying out a PC board follow one of the two sug-
gested approaches. The simple PC board layout requires
a dedicated ground plane layer. Also, for higher currents,
it is recommended to use a multilayer board to help with
heat sinking power components.
• Flood all unused areas on all layers with copper. Flood-
ing with copper will reduce the temperature rise of
powercomponent.Youcanconnectthecopperareasto
any DC net (VIN, VOUT, GND or to any other DC rail in
your system).
C
SS
0.1µF
D
B
CMDSH-3
LTC1778
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
V
IN
5V TO 28V
RUN/SS BOOST
C
IN
R
PG
100k
C
B
10µF
35V
×3
0.22µF
R3
11k
R4
M1
L1
PGOOD
TG
SW
39k
Si4884
1.8µH
V
OUT
2.5V
10A
V
RNG
C
C
OUT3
OUT1-2
+
180µF
4V
22µF
6.3V
X7R
M2
Si4874
D1
B340A
FCB
PGND
BG
C
C1
500pF
R
C
20k
×2
I
TH
C
C
VCC
C2
+
4.7µF
100pF
SGND
INTV
CC
R
F
1Ω
I
ON
V
IN
R1
14.0k
C
F
0.1µF
V
FB
EXTV
CC
R
ON
1.4MΩ
C2
6.8nF
R2
30.1k
1778 F09
C
C
: UNITED CHEMICON THCR60EIHI06ZT
IN
: CORNELL DUBILIER ESRE181E04B
OUT1-2
L1: SUMIDA CEP125-1R8MC-H
Figure 9. Design Example: 2.5V/10A at 250kHz
1778fb
18
LTC1778/LTC1778-1
W U U
APPLICATIO S I FOR ATIO
U
When laying out a printed circuit board, without a ground
plane, use the following checklist to ensure proper opera-
tion of the controller. These items are also illustrated in
Figure 10.
•
Connect the input capacitor(s) CIN close to the power
MOSFETs. This capacitor carries the MOSFET AC
current.
• Keep the high dV/dT SW, BOOST and TG nodes away
from sensitive small-signal nodes.
• Segregate the signal and power grounds. All small
signal components should return to the SGND pin at
onepointwhichisthentiedtothePGNDpinclosetothe
source of M2.
• Connect the INTVCC decoupling capacitor CVCC closely
to the INTVCC and PGND pins.
• Connect the top driver boost capacitor CB closely to the
BOOST and SW pins.
• Place M2 as close to the controller as possible, keeping
the PGND, BG and SW traces short.
• Connect the VIN pin decoupling capacitor CF closely to
the VIN and PGND pins.
C
C
B
SS
LTC1778
L
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
RUN/SS BOOST
PGOOD
TG
SW
D
B
V
+
RNG
M1
FCB
PGND
BG
C
D1
C
IN
C1
V
IN
R
C
M2
I
TH
C
VCC
C
C2
–
–
+
SGND
INTV
CC
V
C
OUT
OUT
C
I
V
F
ON
IN
R1
R2
R
F
V
EXTV
FB
CC
R
ON
1778 F10
BOLD LINES INDICATE HIGH CURRENT PATHS
Figure 10. LTC1778 Layout Diagram
1778fb
19
LTC1778/LTC1778-1
U
TYPICAL APPLICATIO S
1.5V/10A at 300kHz from 3.3V Input
C
SS
D
B
0.1µF
CMDSH-3
LTC1778
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
V
IN
RUN/SS BOOST
3.3V
C
IN1-2
R
R
R
C
PG
+
R1
R2
B
C
IN3
22µF
6.3V
×2
100k
11k
39k
0.22µF
M1
330µF
PGOOD
TG
SW
IRF7811A
6.3V
V
1.5V
10A
OUT
L1, 0.68µH
V
RNG
C
OUT
+
270µF
2V
M2
IRF7811A
D1
B320B
FCB
PGND
BG
C
C1
R
C
20k
×2
680pF
I
TH
C
VCC
C
C2
4.7µF
100pF
SGND
INTV
CC
I
ON
V
IN
5V
R1
10k
V
FB
EXTV
CC
R
ON
576k
R2
8.87k
1778 TA01
C
C
: MURATA GRM42-2X5R226K6.3
IN1-2
OUT
: CORNELL DUBILIER ESRE271M02B
1.2V/6A at 300kHz
C
SS
0.1µF
D
B
CMDSH-3
LTC1778
RUN/SS BOOST
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
V
IN
5V TO 25V
C
R
PG
100k
IN
C
B
10µF
25V
×2
0.22µF
M1
PGOOD
TG
SW
1/2 FDS6982S
V
1.2V
6A
OUT
L1
1.8µH
V
RNG
+
C
C
OUT2
OUT1
180µF
10µF
M2
1/2 FDS6982S
FCB
PGND
BG
C
C1
2V
6.3V
R
C
470pF
20k
I
TH
C
C
VCC
4.7µF
C2
100pF
SGND
INTV
CC
R
1Ω
F
I
V
ON
IN
R1
20k
C
F
0.1µF
V
EXTV
FB
CC
R
ON
510k
R2
10k
C2
2200pF
1778 TA02
C
C
C
: TAIYO YUDEN TMK432BJ106MM
IN
: CORNELL DUBILIER ESRD181M02B
OUT1
: TAIYO YUDEN JMK316BJ106ML
OUT2
L1: TOKO 919AS-1R8N
1778fb
20
LTC1778/LTC1778-1
U
TYPICAL APPLICATIO S
Single Inductor, Positive Output Buck/Boost
V
I
IN OUT
18V 6A
12V 5A
6V 3.3A
C
SS
D
B
0.1µF
CMDSH-3
LTC1778-1
RUN/SS BOOST
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
V
IN
6V TO 18V
C
IN
C
B
22µF
50V
×2
D2
0.22µF
M1
V
V
TG
SW
IR 12CWQ03FN
ON
IRF7811A
V
12V
OUT
L1 4.8µH
RNG
C
OUT
+
100µF
20V
M2
IRF7811A
M3
FCB
PGND
BG
Si4888
C
1nF
R
47k
×6
C1
C
I
TH
C
D1
B340A
C
VCC
4.7µF
C2
220pF
SGND
INTV
CC
R
1Ω
F
C
1
I
ON
V
IN
100pF
C
F
0.1µF
V
EXTV
FB
CC
PGND
C
C
: MARCON THER70EIH226ZT
: AVX TPSV107M020R0085
IN
OUT
R1
10k 1%
R
1.5M
1%
ON1
L1: SCHOTT 36835-1
R
1.5M
1%
ON2
R2
140k
1%
1778 TA04
12V/5A at 300kHz
C
SS
D
B
0.1µF
CMDSH-3
LTC1778-1
RUN/SS BOOST
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
V
IN
14V TO 28V
C
C
B
IN
0.22µF
22µF
V
V
TG
SW
M1
L1 10µH
M2
ON
50V
V
OUT
12V
5A
RNG
+
C
OUT
220µF
FCB
PGND
BG
C
2.2nF
C1
D1
16V
R
C
20k
I
TH
C
C
VCC
4.7µF
C2
+
100pF
SGND
INTV
CC
R
F
1Ω
I
ON
V
IN
R1
10k
C
F
0.1µF
V
EXTV
FB
CC
R
R2
140k
ON
1.6M
C2
2200pF
1778 TA05
C
OUT
: UNITED CHEMICON THCR70E1H226ZT (847) 696-2000
IN
C
: SANYO 16SV220M
(619) 661-6835
(847) 956-0667
(408) 822-2126
(805) 446-4800
L1: SUMIDA CDRH127-100
M1, M2: FAIRCHILD FDS6680A
D1: DIODES, INC. B340A
1778fb
21
LTC1778/LTC1778-1
U
TYPICAL APPLICATIO S
Positive-to-Negative Converter, –5V/5A at 300kHz
V
I
IN OUT
20V 8A
10V 6.7A
5V 5A
C
SS
0.1µF
D
B
CMDSH-3
LTC1778-1
RUN/SS BOOST
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
V
IN
5V TO 20V
C
C
IN1
B
C
IN2
10µF
25V
×2
0.22µF
10µF
M1
V
V
TG
SW
ON
35V
IRF7811A
L1 2.7µH
RNG
+
C
OUT
100µF
6V
M2
IRF7822
D1
B340A
FCB
PGND
BG
C
C1
R
C
4700pF
×3
10k
V
OUT
–5V
I
TH
C
C
C2
100pF
VCC
4.7µF
SGND
INTV
CC
RF
1Ω
I
V
ON
IN
R1
10k
C
F
0.1µF
V
EXTV
FB
CC
R
ON
698k
R2
52.3k
1778 TA06
C
C
C
: TAIYO YUDEN TMK432BJ106MM
: SANYO 35CV10GX
IN1
IN2
OUT
: PANASONIC EEFUD0J101R
L1: PANASONIC ETQPAF2R7H
1778fb
22
LTC1778/LTC1778-1
U
PACKAGE DESCRIPTIO
GN Package
16-Lead Plastic SSOP (Narrow 0.150)
(LTC DWG # 05-08-1641)
.189 – .196*
(4.801 – 4.978)
.045 ±.005
.009
(0.229)
REF
16 15 14 13 12 11 10 9
.254 MIN
.150 – .165
.229 – .244
.150 – .157**
(5.817 – 6.198)
(3.810 – 3.988)
.0165 ±.0015
.0250 BSC
RECOMMENDED SOLDER PAD LAYOUT
1
2
3
4
5
6
7
8
.015 ± .004
(0.38 ± 0.10)
× 45°
.0532 – .0688
(1.35 – 1.75)
.004 – .0098
(0.102 – 0.249)
.007 – .0098
(0.178 – 0.249)
0° – 8° TYP
.016 – .050
(0.406 – 1.270)
.0250
(0.635)
BSC
.008 – .012
GN16 (SSOP) 0204
(0.203 – 0.305)
TYP
NOTE:
1. CONTROLLING DIMENSION: INCHES
INCHES
2. DIMENSIONS ARE IN
(MILLIMETERS)
3. DRAWING NOT TO SCALE
*DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
**DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
1778fb
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection ofits circuits as described herein willnotinfringe on existing patentrights.
23
LTC1778/LTC1778-1
U
TYPICAL APPLICATIO
Typical Application 2.5V/3A at 1.4MHz
C
SS
D
B
0.1µF
CMDSH-3
LTC1778
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
V
IN
RUN/SS BOOST
9V TO 18V
R
C
PG
C
B
IN
100k
0.22µF
10µF
M1
PGOOD
TG
SW
25V
1/2 Si9802
V
2.5V
3A
OUT
L1, 1µH
V
RNG
+
C
OUT
120µF
M2
1/2 Si9802
FCB
PGND
BG
C
C1
4V
R
C
470pF
33k
I
TH
C
C
VCC
C2
4.7µF
100pF
SGND
INTV
CC
RF
1Ω
I
ON
V
IN
R1
11.5k
C
F
0.1µF
V
EXTV
FB
CC
R
ON
220k
R2
24.9k
C2
2200pF
1778 TA03
C
C
: TAIYO YUDEN TMK432BJ106MM
IN
: CORNELL DUBILIER ESRD121M04B
OUT
L1: TOKO A921CY-1R0M
RELATED PARTS
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DESCRIPTION
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550kHz Step-Down Controller
8-Pin MSOP; Synchronizable; Soft-Start; Current Mode
97% Efficiency; No Sense Resistor; 16-Pin SSOP
Power Good Output; Minimum Input/Output Capacitors;
LTC1625/LTC1775
LTC1628-PG
No R
Current Mode Synchronous Step-Down Controller
SENSE
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3.5V ≤ V ≤ 36V
IN
LTC1628-SYNC
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Dual, 2-Phase Synchronous Step-Down Controller
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with 5-Bit VID
Up to 42A Output; 0.925V ≤ V
≤ 2V
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LTC1735
High Efficiency, 2-Phase Synchronous Step-Down Controller
High Efficiency, Synchronous Step-Down Controller
Up to 42A Output; VRM 8.4; 1.3V ≤ V
≤ 3.5V
OUT
Burst Mode® Operation; 16-Pin Narrow SSOP;
3.5V ≤ V ≤ 36V
IN
LTC1736
LTC1772
LTC1773
High Efficiency, Synchronous Step-Down Controller with 5-Bit VID Mobile VID; 0.925V ≤ V
≤ 2V; 3.5V ≤ V ≤ 36V
OUT IN
SOT-23 Step-Down Controller
Current Mode; 550kHz; Very Small Solution Size
Synchronous Step-Down Controller
Up to 95% Efficiency, 550kHz, 2.65V ≤ V ≤ 8.5V,
IN
0.8V ≤ V
≤ V , Synchronizable to 750kHz
OUT
IN
LTC1876
2-Phase, Dual Synchronous Step-Down Controller with
Step-Up Regulator
3.5V ≤ V ≤ 36V, Power Good Output, 300kHz Operation
IN
LTC3713
LTC3778
LT®3800
Low V High Current Synchronous Step-Down Controller
1.5V ≤ V ≤ 36V, 0.8V ≤ V
≤ (0.9)V , I
Up to 20A
Up to 20A
IN
IN
OUT
IN OUT
Low V , No R
Synchronous Step-Down Controller
0.6V ≤ V
≤ (0.9)V , 4V ≤ V ≤ 36V, I
OUT IN IN OUT
OUT
SENSE
60V Synchronous Step-Down Controller
Current Mode, Output Slew Rate Control
Burst Mode is a registered trademark of Linear Technology Corporation.
1778fb
LT/LT 0405 REV B • PRINTED IN USA
LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
24
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(408) 432-1900 FAX: (408) 434-0507 www.linear.com
©LINEAR TECHNOLOGY CORPORATION 2001
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