DS1217M1/2-25/KODAK-OB1 [MAXIM]
Memory Circuit;
| 型号： | DS1217M1/2-25/KODAK-OB1 |
| 厂家： | 
MAXIM INTEGRATED PRODUCTS |
| 描述： | Memory Circuit 内存集成电路 |
| 文件： | 总8页 (文件大小：206K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
DS1217M
Nonvolatile Read/Write Cartridge
www.maxim-ic.com
GENERAL DESCRIPTION
FEATURES
The DS1217M is a nonvolatile RAM designed for
portable applications requiring a rugged and durable
package. The nonvolatile cartridge has memory
capacities from 64k x 8 to 512k x 8. The cartridge is
accessed in continuous 32k byte banks. Bank
switching is accomplished under software control by
pattern recognition from the address bus. A card
edge connector is required for connection to a host
system. A standard 30-pin connector can be used for
direct mount to a printed circuit board. Alternatively,
remote mounting can be accomplished with a ribbon
cable terminated with a 28-pin DIP plug. The remote
method can be used to retrofit existing systems that
have JEDEC 28-pin bytewide memory sites.
.
.
.
.
User Insertable
Data Retention Greater than 5 Years
Capacity to 512k x 8
Standard Bytewide Pinout Facilitates
Connection to JEDEC 28-Pin DIP Through
Ribbon Cable
.
.
.
Software-Controlled Banks Maintain 32 x 8
JEDEC 28-Pin Compatibility
Multiple Cartridges Can Reside on a Common
Bus
Automatic Write Protection Circuitry
Safeguards Against Data Loss
.
.
.
.
Manual Switch Unconditionally Protects Data
Compact Size and Shape
ORDERING INFORMATION
PART
TEMP RANGE
PIN-PACKAGE
DS1217M
0°C to +70°C
30 Cartridge
Rugged and Durable
Operating Temperature Range: 0°C to +70°C
PIN CONFIGURATION
TOP VIEW
Package Drawing appears at end of data sheet.
Note: Some revisions of this device may incorporate deviations from published specifications known as errata. Multiple revisions of any device
may be simultaneously available through various sales channels. For information about device errata, click here: www.maxim-ic.com/errata.
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REV: 111803
DS1217M Nonvolatile Read/Write Cartridge
ABSOLUTE MAXIMUM RATINGS
Voltage Range on Connection Relative to Ground
Operating Temperature Range
-0.3V to + 7.0V
0°C to +70°C
Storage Temperature Range
-40°C to +70°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only,
and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is
not implied. Exposure to the absolute maximum rating conditions for extended periods may affect device reliability.
RECOMMENDED DC OPERATING CONDITIONS
(TA = 0°C to +70°C)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Power Supply Voltage
Input High Voltage
Input Low Voltage
VCC
VIH
VIL
4.5
2.2
0
5.0
5.5
VCC
+0.8
V
V
V
DC ELECTRICAL CHARACTERISTICS
(VCC = 5V ±10%, TA = 0°C to +70°C.)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Input Leakage Current
IIL
-60
+60
A
I/O Leakage Current
CE VIH VCC
IIO
IOH
-10
-1.0
+2.0
+10
A
mA
mA
mA
mA
Output Current at 2.4V
Output Current at 0.4V
Standby Current CE = 2.2V
Operating Current
-2.0
+3.0
15
IOL
ICCS1
ICCO1
25
50
100
CAPACITANCE
(TA = +25°C)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Input Capacitance
CIN
100
100
pF
pF
Input/Output Capacitance
COUT
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DS1217M Nonvolatile Read/Write Cartridge
AC ELECTRICAL CHARACTERISTICS
(VCC = 5V ±10%, TA = 0°C to +70°C.)
PARAMETER
Read Cycle Time
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
tRC
250
ns
Access Time
tACC
tOE
250
125
210
ns
ns
ns
ns
ns
OE to Output Valid
CE to Output Valid
OE or CE to Output Active
tCO
tCOE
tOD
tOH
tRR
(Note 1)
(Note 1)
5
Output High-Z from
Deselection
125
Output Hold from Address
Change
5
40
250
170
0
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Read Recovery Time
Write Cycle Time
tWC
tWP
tAW
tWR
tODW
tOEW
tDS
Write Pulse Width
(Note 2)
Address Setup Time
Write Recovery Time
Output High-Z from WE
Output Active from WE
Data Setup Time
20
(Note 1)
(Note 1)
(Note 3)
(Note 3)
100
5
100
20
tDH
Data Hold Time from WE
Note 1: These parameters are sampled with a 5pF load and are not 100% tested.
Note 2:
tWP is specified as the logical AND of CE and WE tWP is measured from the latter of CE or WE going low to the earlier of CE or WE
going high.
Note 3:
tDH, tDS are measured form the earlier of CE or WE going high.
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DS1217M Nonvolatile Read/Write Cartridge
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DS1217M Nonvolatile Read/Write Cartridge
POWER-DOWN/POWER-UP CONDITION
POWER-DOWN/POWER-UP TIMING
(TA = 0°C to +70°C)
PARAMETER
SYMBOL
CONDITIONS
(Note 9)
MIN
TYP
MAX
UNITS
tPD
0
CE at VIH Before Power-Down
s
VCC Slew from 4.5V to 0
(CE at VIH)
tF
100
s
VCC Slew from 0 to 4.5V
(CE at VIH)
tR
0
2
s
tREC
(Note 9)
125
ms
CE at VIH After Power-Up
(TA = +25°C)
PARAMETER
SYMBOL
CONDITIONS
(Note 10)
MIN
TYP
MAX
UNITS
Expected Data Retention
Time
tDR
5
years
WARNING: Under no circumstances are negative undershoots of any amplitude allowed when the device is in
battery-backup mode.
WE is high for a read cycle.
Note 4:
Note 5:
Note 6:
OE = VIH or VIL. If OE = VIH during a write cycle, the output buffers remain in a high-impedance state.
If the CE low transition occurs simultaneously with or later than the WE high transition in Write Cycle 1, that output buffers remain in
a high-impedance state in this period.
Note 7:
Note 8:
Note 9:
If the CE high transition occurs prior to or simultaneously with the WE high transition in Write Cycle 1, the output buffers remain in a
high-impedance state in this period.
If WE is low or the WE low transition occurs prior to or simultaneously with the CE low transition, the output buffers remain in a high-
impedance state in this period.
Removing and installing the cartridge with power applied may disturb data.
Note 10: Each DS1217M I smarked with a 4-digit code AABB. AA designates the year of manufacture. BB designates the week of
manufacture. The expected tDR is defined as starting at the date of manufacture. This parameter is assured by component selection,
process control, and design. It is not measured directly during production testing.
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DS1217M Nonvolatile Read/Write Cartridge
DC TEST CONDITIONS
Outputs Open
t Cycle = 250ns
AC TEST CONDITIONS
Output Load: 100pF + 1TTL Gate
Input Pulse Levels: 0 to 3.0V
Timing Measurement Reference Levels
Input: 1.5V
All voltages are referenced to ground.
Output: 1.5V
Input Pulse Rise and Fall Times: 5ns
DETAILED DESCRIPTION
Read Mode
The DS1217M executes a read cycle whenever WE (write enable) is inactive (high) and CE (cartridge enable) is
active (low). The unique address specified by the address inputs (A0–A14) defines which byte of data is to be
accessed. Valid data will be available to the eight data I/O pins within tACC (access time) after the last address input
signal is stable, provided that CE (cartridge enable) and OE (output enable) access times are also satisfied. If OE
and CE times are not satisfied, then data access must be measured from the late occurring signal (CE or OE) and
the limiting parameter is either tCO for CE or tOE for OE rather than address access. Read cycles can only occur
when VCC is greater than 4.5V. When VCC is less than 4.5V, the memory is inhibited and all accesses are ignored.
Write Mode
The DS1217M is in the write mode whenever both the WE and CE signals are in the active (low) state after address
inputs are stable. The last occurring falling edge of either CE or WE will determine the start of the write cycle. The
write cycle is terminated by the first rising edge of either CE or WE. All address inputs must be kept valid
throughout the write cycle. WE must return to the high state for a minimum recovery time (tWR) before another cycle
can be initiated. The OE control signal should be kept inactive (high) during write cycles to avoid bus contention.
However, if the output bus has been enabled (CE and OE active), then WE will disable the outputs in tODW from its
falling edge. Write cycles can only occur when VCC is greater than 4.5 V. When VCC is less than 4.5Vs, the memory
is write-protected.
Data Retention Mode
The nonvolatile cartridge provides full functional capability for VCC greater than 4.5V and guarantees write
protection for VCC less than 4.5V. Data is maintained in the absence of VCC without any additional support circuitry.
The DS1217M constantly monitors VCC. Should the supply voltage decay, the RAM is automatically write-protected
below 4.5V. As VCC falls below approximately 3.0V, the power switching circuit connects a lithium energy source to
RAM to retain data. During power-up, when VCC rises above approximately 3.0V, the power switching circuit
connects the external VCC to the RAM and disconnects the lithium energy source. Normal RAM operation can
resume after VCC exceeds 4.5V.
The DS1217M checks battery status to warn of potential data loss. Each time that VCC power is restored to the
cartridge, the battery voltage is checked with a precision comparator. If the battery supply is less than 2.0V, the
second memory cycle is inhibited. Battery status can, therefore, be determined by performing a read cycle after
power-up to any location in memory, recording that memory location content. A subsequent write cycle can then be
executed to the same memory location, altering data. If the next read cycle fails to verify the written data, the
contents of the memory are questionable.
In many applications, data integrity is paramount. The cartridge thus has redundant batteries and an internal
isolation switch that provides for the connection of two batteries. During battery backup time, the battery with the
highest voltage is selected for use. If one battery fails, the other will automatically take over. The switch between
batteries is transparent to the user. A battery status warning will occur only if both batteries are less than 2.0V.
Bank Switching
Bank switching is accomplished via address lines A8, A9, A10, and A11. Initially, on power-up all banks are
deselected so that multiple cartridges can reside on a common bus. Bank switching requires that a predefined
pattern of 64 bits is matched by sequencing 4 address inputs (A8 through A11) 16 times while ignoring all other
address inputs. Prior to entering the 64-bit pattern, which will set the band switch, a read cycle of 1111 (address
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DS1217M Nonvolatile Read/Write Cartridge
inputs A8 through A11) must be executed to guarantee that pattern entry starts with the first set of 3 bits. Each set
of address inputs is entered into the DS1217M by executing read cycles. The first 11 cycles must match the exact
bit pattern as shown in Table 2. The last five cycles must match the exact bit pattern for addresses A9, A10, and
A11. However, address line 8 defines which of the 16 banks is to be enabled, or all banks are deselected, as per
Table 3. Switching from one bank to another occurs as the last of the 16 read cycles is completed. A single bank is
selected at any one time. A selected bank will remain active until a new bank is selected, all banks are deselected,
or until power is lost. (See the DS1222 BankSwitch Chip data sheet for more detail.)
Remote Connection through a Ribbon Cable
Existing systems that contain 28-pin bytewide sockets can be retrofitted using a 28-pin DIP plug. The DIP plug,
AMP Part Number 746616-2, can be inserted into the 28-pin site after the memory is removed. Connection to the
cartridge is accomplished via a 28-pin cable connected to a 30-contact card edge connector, AMP Part Number
499188-4. The 28-pin ribbon cable must be right justified, such that positions A1 and B1 are left disconnected. For
applications where the cartridge is installed or removed with power applied, both ground contacts (A1 and B1) on
the card edge connector should be grounded to further enhance data integrity. Access time push-out may occur as
the distance between the cartridge and the driving circuitry is increased.
Table 1. Cartridge Numbering
PART
DENSITY
NO. OF BANKS
DS1217M 1/2-25
DS1217M 1-25
DS1217M 2-25
DS1217M 3-25
DS1217M 4-25
64kB x 8
128kB x 8
256kB x 8
384kB x 8
512kB x 8
2
4
8
12
16
Table 2. Address Input Pattern
BIT SEQUENCE
ADDRESS
INPUTS
0
1
2
3
4
0
1
0
1
5
0
1
0
1
6
1
0
1
0
7
1
0
1
0
8
0
1
0
1
9
1
0
1
0
10
0
11
X
0
12
X
0
13
X
0
14
X
1
15
X
1
A8
A9
1
0
1
0
0
1
0
1
0
1
0
1
0
1
0
1
1
A10
A11
0
1
1
1
0
0
1
0
0
0
1
1
X = See Table 3
Table 3. Bank Select Table
BANK
SELECTED
BANKS OFF
BANK 0
A8 BIT SEQUENCE
BANK
BANK 7
A8 BIT SEQUENCE
11
0
12
X
0
13
X
0
14
X
0
15
X
0
1
1
1
1
1
1
1
1
1
0
1
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
1
0
0
1
1
0
0
1
1
1
0
1
0
1
0
1
0
1
BANK 8
X
1
BANK 9
BANK 1
0
0
0
1
BANK 10
BANK 11
BANK 12
BANK 13
BANK 14
BANK 15
BANK 2
1
0
0
1
0
BANK 3
1
0
0
1
1
BANK 4
1
0
1
0
0
BANK 5
1
0
1
0
1
BANK 6
1
0
1
1
0
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DS1217M Nonvolatile Read/Write Cartridge
PACKAGE INFORMATION
For the latest package outline information and land patterns, go to www.maxim-ic.com/packages.
Maxim/Dallas Semiconductor cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim/Dallas Semiconductor product.
No circuit patent licenses are implied. Maxim/Dallas Semiconductor reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
© 2003 Maxim Integrated Products
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