DS18S20 [MAXIM]

High-Precision 1-Wire Digital Thermometer; 高精度的1-Wire数字温度计
DS18S20
型号: DS18S20
厂家: MAXIM INTEGRATED PRODUCTS    MAXIM INTEGRATED PRODUCTS
描述:

High-Precision 1-Wire Digital Thermometer
高精度的1-Wire数字温度计

传感器 换能器 输出元件
文件: 总23页 (文件大小:317K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
DS18S20  
High-Precision 1-Wire Digital Thermometer  
FEATURES  
PIN CONFIGURATIONS  
. Unique 1-Wire® Interface Requires Only One  
Port Pin for Communication  
MAXIM  
DS1820  
. Each Device has a Unique 64-Bit Serial Code  
Stored in an On-Board ROM  
1 2 3  
. Multidrop Capability Simplifies Distributed  
Temperature Sensing Applications  
. Requires No External Components  
. Can Be Powered from Data Line. Power  
Supply Range is 3.0V to 5.5V  
8
7
N.C.  
N.C.  
VDD  
N.C.  
N.C.  
N.C.  
GND  
1
2
3
4
. Measures Temperatures from -55°C to  
+125°C (-67°F to +257°F)  
6
5
DQ  
. ±0.5°C Accuracy from -10°C to +85°C  
. 9-Bit Thermometer Resolution  
. Converts Temperature in 750ms (max)  
. User-Definable Nonvolatile (NV) Alarm  
Settings  
SO (150 mils)  
(DS18S20Z)  
. Alarm Search Command Identifies and  
Addresses Devices Whose Temperature is  
Outside Programmed Limits (Temperature  
Alarm Condition)  
1
2 3  
(BOTTOM VIEW)  
TO-92  
.
Applications Include Thermostatic Controls,  
Industrial Systems, Consumer Products,  
Thermometers, or Any Thermally Sensitive  
System  
(DS18S20)  
DESCRIPTION  
The DS18S20 digital thermometer provides 9-bit Celsius temperature measurements and has an alarm  
function with nonvolatile user-programmable upper and lower trigger points. The DS18S20  
communicates over a 1-Wire bus that by definition requires only one data line (and ground) for  
communication with a central microprocessor. It has an operating temperature range of –55°C to +125°C  
and is accurate to ±0.5°C over the range of –10°C to +85°C. In addition, the DS18S20 can derive power  
directly from the data line (“parasite power”), eliminating the need for an external power supply.  
Each DS18S20 has a unique 64-bit serial code, which allows multiple DS18S20s to function on the same  
1-Wire bus. Thus, it is simple to use one microprocessor to control many DS18S20s distributed over a  
large area. Applications that can benefit from this feature include HVAC environmental controls,  
temperature monitoring systems inside buildings, equipment, or machinery, and process monitoring and  
control systems.  
1-Wire is a registered trademark of Maxim Integrated Products, Inc.  
For pricing, delivery, and ordering information, please contact Maxim Direct  
at 1-888-629-4642, or visit Maxim’s website at www.maximintegrated.com.  
19-5474; Rev 8/10  
DS18S20  
ORDERING INFORMATION  
PART  
DS18S20  
TEMP RANGE  
–55°C to +125°C  
–55°C to +125°C  
–55°C to +125°C  
–55°C to +125°C  
–55°C to +125°C  
–55°C to +125°C  
–55°C to +125°C  
–55°C to +125°C  
–55°C to +125°C  
–55°C to +125°C  
PIN-PACKAGE  
3 TO-92  
3 TO-92  
3 TO-92 (2000 Piece)  
3 TO-92 (2000 Piece)  
3 TO-92 (2000 Piece)*  
3 TO-92 (2000 Piece)*  
8 SO  
DS18S20+  
DS18S20/T&R  
DS18S20+T&R  
DS18S20-SL/T&R  
DS18S20-SL+T&R  
DS18S20Z  
DS18S20Z+  
DS18S20Z/T&R  
DS18S20Z+T&R  
8 SO  
8 SO (2500 Piece)  
8 SO (2500 Piece)  
+Denotes a lead(Pb)-free/RoHS-compliant package. A “+” appears on the top mark of lead(Pb)-free packages.  
T&R = Tape and reel.  
*TO-92 packages in tape and reel can be ordered with straight or formed leads. Choose “SL” for straight leads. Bulk TO-92 orders are straight  
leads only.  
PIN DESCRIPTION  
PIN  
NAME  
FUNCTION  
TO-92  
SO  
1
5
GND  
Ground  
Data Input/Output. Open-drain 1-Wire interface pin. Also provides  
power to the device when used in parasite power mode (see the  
Powering the DS18S20 section.)  
2
4
DQ  
Optional VDD. VDD must be grounded for operation in parasite  
power mode.  
3
3
VDD  
1, 2, 6, 7,  
8
N.C.  
No Connection  
OVERVIEW  
Figure 1 shows a block diagram of the DS18S20, and pin descriptions are given in the Pin Description  
table. The 64-bit ROM stores the device’s unique serial code. The scratchpad memory contains the 2-byte  
temperature register that stores the digital output from the temperature sensor. In addition, the scratchpad  
provides access to the 1-byte upper and lower alarm trigger registers (TH and TL). The TH and TL registers  
are nonvolatile (EEPROM), so they will retain data when the device is powered down.  
The DS18S20 uses Maxim’s exclusive 1-Wire bus protocol that implements bus communication using  
one control signal. The control line requires a weak pullup resistor since all devices are linked to the bus  
via a 3-state or open-drain port (the DQ pin in the case of the DS18S20). In this bus system, the  
microprocessor (the master device) identifies and addresses devices on the bus using each device’s unique  
64-bit code. Because each device has a unique code, the number of devices that can be addressed on one  
bus is virtually unlimited. The 1-Wire bus protocol, including detailed explanations of the commands and  
“time slots,” is covered in the 1-Wire Bus System section.  
Another feature of the DS18S20 is the ability to operate without an external power supply. Power is  
instead supplied through the 1-Wire pullup resistor via the DQ pin when the bus is high. The high bus  
signal also charges an internal capacitor (CPP), which then supplies power to the device when the bus is  
low. This method of deriving power from the 1-Wire bus is referred to as “parasite power.” As an  
alternative, the DS18S20 may also be powered by an external supply on VDD.  
2 of 23  
DS18S20  
Figure 1. DS18S20 Block Diagram  
VPU  
PARASITE POWER  
4.7k  
MEMORY CONTROL  
LOGIC  
DS18S20  
CIRCUIT  
DQ  
TEMPERATURE SENSOR  
64-BIT ROM  
AND  
INTERNAL VDD  
1-Wire PORT  
ALARM HIGH TRIGGER (TH)  
REGISTER (EEPROM)  
GND  
SCRATCHPAD  
CPP  
ALARM LOW TRIGGER (TL)  
REGISTER (EEPROM)  
POWER-  
SUPPLY  
SENSE  
VDD  
8-BIT CRC GENERATOR  
OPERATION—MEASURING TEMPERATURE  
The core functionality of the DS18S20 is its direct-to-digital temperature sensor. The temperature sensor  
output has 9-bit resolution, which corresponds to 0.5°C steps. The DS18S20 powers-up in a low-power  
idle state; to initiate a temperature measurement and A-to-D conversion, the master must issue a Convert  
T [44h] command. Following the conversion, the resulting thermal data is stored in the 2-byte  
temperature register in the scratchpad memory and the DS18S20 returns to its idle state. If the DS18S20  
is powered by an external supply, the master can issue “read-time slots” (see the 1-Wire Bus System  
section) after the Convert T command and the DS18S20 will respond by transmitting 0 while the  
temperature conversion is in progress and 1 when the conversion is done. If the DS18S20 is powered with  
parasite power, this notification technique cannot be used since the bus must be pulled high by a strong  
pullup during the entire temperature conversion. The bus requirements for parasite power are explained in  
detail in the Powering the DS18S20 section.  
The DS18S20 output data is calibrated in degrees centigrade; for Fahrenheit applications, a lookup table  
or conversion routine must be used. The temperature data is stored as a 16-bit sign-extended two’s  
complement number in the temperature register (see Figure 2). The sign bits (S) indicate if the  
temperature is positive or negative: for positive numbers S = 0 and for negative numbers S = 1. Table 1  
gives examples of digital output data and the corresponding temperature reading.  
Resolutions greater than 9 bits can be calculated using the data from the temperature, COUNT REMAIN  
and COUNT PER °C registers in the scratchpad. Note that the COUNT PER °C register is hard-wired to  
16 (10h). After reading the scratchpad, the TEMP_READ value is obtained by truncating the 0.5°C bit  
(bit 0) from the temperature data (see Figure 2). The extended resolution temperature can then be  
calculated using the following equation:  
COUNT _ PER _C COUNT _ REMAIN  
TEMPERATURE = TEMP _ READ 0.25 +  
COUNT _ PER _C  
3 of 23  
 
DS18S20  
Figure 2. Temperature Register Format  
BIT 7  
26  
BIT 6  
25  
BIT 5  
24  
BIT 4  
23  
BIT 3  
22  
BIT 2  
21  
BIT 1  
20  
BIT 0  
2-1  
LS BYTE  
BIT 15  
S
BIT 14  
S
BIT 13  
S
BIT 12  
S
BIT 11  
S
BIT 10  
S
BIT 9  
S
BIT 8  
S
MS BYTE  
S = SIGN  
Table 1. Temperature/Data Relationship  
TEMPERATURE  
DIGITAL OUTPUT  
(BINARY)  
DIGITAL OUTPUT  
(HEX)  
(°C)  
+85.0*  
+25.0  
+0.5  
0
-0.5  
-25.0  
-55.0  
0000 0000 1010 1010  
0000 0000 0011 0010  
0000 0000 0000 0001  
0000 0000 0000 0000  
1111 1111 1111 1111  
1111 1111 1100 1110  
1111 1111 1001 0010  
00AAh  
0032h  
0001h  
0000h  
FFFFh  
FFCEh  
FF92h  
*The power-on reset value of the temperature register is +85°C.  
OPERATION—ALARM SIGNALING  
After the DS18S20 performs a temperature conversion, the temperature value is compared to the user-  
defined two’s complement alarm trigger values stored in the 1-byte TH and TL registers (see Figure 3).  
The sign bit (S) indicates if the value is positive or negative: for positive numbers S = 0 and for negative  
numbers S = 1. The TH and TL registers are nonvolatile (EEPROM) so they will retain data when the  
device is powered down. TH and TL can be accessed through bytes 2 and 3 of the scratchpad as explained  
in the Memory section.  
Figure 3. T and T Register Format  
H
L
BIT 7  
BIT 6  
26  
BIT 5  
25  
BIT 4  
25  
BIT 3  
25  
BIT 2  
22  
BIT 1  
21  
BIT 0  
20  
S
Only bits 8 through 1 of the temperature register are used in the TH and TL comparison since TH and TL  
are 8-bit registers. If the measured temperature is lower than or equal to TL or higher than TH, an alarm  
condition exists and an alarm flag is set inside the DS18S20. This flag is updated after every temperature  
measurement; therefore, if the alarm condition goes away, the flag will be turned off after the next  
temperature conversion.  
The master device can check the alarm flag status of all DS18S20s on the bus by issuing an Alarm Search  
[ECh] command. Any DS18S20s with a set alarm flag will respond to the command, so the master can  
determine exactly which DS18S20s have experienced an alarm condition. If an alarm condition exists and  
the TH or TL settings have changed, another temperature conversion should be done to validate the alarm  
condition.  
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DS18S20  
POWERING THE DS18S20  
The DS18S20 can be powered by an external supply on the VDD pin, or it can operate in “parasite power”  
mode, which allows the DS18S20 to function without a local external supply. Parasite power is very  
useful for applications that require remote temperature sensing or those with space constraints.  
Figure 1 shows the DS18S20’s parasite-power control circuitry, which “steals” power from the 1-Wire  
bus via the DQ pin when the bus is high. The stolen charge powers the DS18S20 while the bus is high,  
and some of the charge is stored on the parasite power capacitor (CPP) to provide power when the bus is  
low. When the DS18S20 is used in parasite power mode, the VDD pin must be connected to ground.  
In parasite power mode, the 1-Wire bus and CPP can provide sufficient current to the DS18S20 for most  
operations as long as the specified timing and voltage requirements are met (see the DC Electrical  
Characteristics and the AC Electrical Characteristics). However, when the DS18S20 is performing  
temperature conversions or copying data from the scratchpad memory to EEPROM, the operating current  
can be as high as 1.5mA. This current can cause an unacceptable voltage drop across the weak 1-Wire  
pullup resistor and is more current than can be supplied by CPP. To assure that the DS18S20 has sufficient  
supply current, it is necessary to provide a strong pullup on the 1-Wire bus whenever temperature  
conversions are taking place or data is being copied from the scratchpad to EEPROM. This can be  
accomplished by using a MOSFET to pull the bus directly to the rail as shown in Figure 4. The 1-Wire  
bus must be switched to the strong pullup within 10µs (max) after a Convert T [44h] or Copy Scratchpad  
[48h] command is issued, and the bus must be held high by the pullup for the duration of the conversion  
(tCONV) or data transfer (tWR = 10ms). No other activity can take place on the 1-Wire bus while the pullup  
is enabled.  
The DS18S20 can also be powered by the conventional method of connecting an external power supply to  
the VDD pin, as shown in Figure 5. The advantage of this method is that the MOSFET pullup is not  
required, and the 1-Wire bus is free to carry other traffic during the temperature conversion time.  
The use of parasite power is not recommended for temperatures above 100°C since the DS18S20 may not  
be able to sustain communications due to the higher leakage currents that can exist at these temperatures.  
For applications in which such temperatures are likely, it is strongly recommended that the DS18S20 be  
powered by an external power supply.  
In some situations the bus master may not know whether the DS18S20s on the bus are parasite powered  
or powered by external supplies. The master needs this information to determine if the strong bus pullup  
should be used during temperature conversions. To get this information, the master can issue a Skip ROM  
[CCh] command followed by a Read Power Supply [B4h] command followed by a “read-time slot”.  
During the read-time slot, parasite powered DS18S20s will pull the bus low, and externally powered  
DS18S20s will let the bus remain high. If the bus is pulled low, the master knows that it must supply the  
strong pullup on the 1-Wire bus during temperature conversions.  
5 of 23  
DS18S20  
Figure 4. Supplying the Parasite-Powered DS18S20 During Temperature Conversions  
VPU  
DS18S20  
GND  
DQ VDD  
VPU  
µP  
4.7k  
TO OTHER  
1-WIRE DEVICES  
1-Wire BUS  
Figure 5. Powering the DS18S20 with an External Supply  
VDD (EXTERNAL SUPPLY)  
TO OTHER  
DS18S20  
VPU  
µP  
GND  
DQ VDD  
4.7k  
1-Wire BUS  
1-WIRE DEVICES  
64-BIT LASERED ROM CODE  
Each DS18S20 contains a unique 64-bit code (see Figure 6) stored in ROM. The least significant 8 bits of  
the ROM code contain the DS18S20’s 1-Wire family code: 10h. The next 48 bits contain a unique serial  
number. The most significant 8 bits contain a cyclic redundancy check (CRC) byte that is calculated from  
the first 56 bits of the ROM code. A detailed explanation of the CRC bits is provided in the CRC  
Generation section. The 64-bit ROM code and associated ROM function control logic allow the  
DS18S20 to operate as a 1-Wire device using the protocol detailed in the 1-Wire Bus System section.  
Figure 6. 64-Bit Lasered ROM Code  
8-BIT CRC  
48-BIT SERIAL NUMBER  
8-BIT FAMILY CODE (10h)  
MSB LSB  
MSB  
LSB MSB  
LSB  
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DS18S20  
MEMORY  
The DS18S20’s memory is organized as shown in Figure 7. The memory consists of an SRAM  
scratchpad with nonvolatile EEPROM storage for the high and low alarm trigger registers (TH and TL).  
Note that if the DS18S20 alarm function is not used, the TH and TL registers can serve as general-purpose  
memory. All memory commands are described in detail in the DS18S20 Function Commands section.  
Byte 0 and byte 1 of the scratchpad contain the LSB and the MSB of the temperature register,  
respectively. These bytes are read-only. Bytes 2 and 3 provide access to TH and TL registers. Bytes 4 and  
5 are reserved for internal use by the device and cannot be overwritten; these bytes will return all 1s when  
read. Bytes 6 and 7 contain the COUNT REMAIN and COUNT PER ºC registers, which can be used to  
calculate extended resolution results as explained in the Operation—Measuring Temperature section.  
Byte 8 of the scratchpad is read-only and contains the CRC code for bytes 0 through 7 of the scratchpad.  
The DS18S20 generates this CRC using the method described in the CRC Generation section.  
Data is written to bytes 2 and 3 of the scratchpad using the Write Scratchpad [4Eh] command; the data  
must be transmitted to the DS18S20 starting with the least significant bit of byte 2. To verify data  
integrity, the scratchpad can be read (using the Read Scratchpad [BEh] command) after the data is  
written. When reading the scratchpad, data is transferred over the 1-Wire bus starting with the least  
significant bit of byte 0. To transfer the TH and TL data from the scratchpad to EEPROM, the master must  
issue the Copy Scratchpad [48h] command.  
Data in the EEPROM registers is retained when the device is powered down; at power-up the EEPROM  
data is reloaded into the corresponding scratchpad locations. Data can also be reloaded from EEPROM to  
the scratchpad at any time using the Recall E2 [B8h] command. The master can issue “read-time slots”  
(see the 1-Wire Bus System section) following the Recall E2 command and the DS18S20 will indicate the  
status of the recall by transmitting 0 while the recall is in progress and 1 when the recall is done.  
Figure 7. DS18S20 Memory Map  
SCRATCHPAD  
(POWER-UP STATE)  
Byte 0 Temperature LSB (AAh)  
(85°C)  
Byte 1 Temperature MSB (00h)  
Byte 2 TH Register or User Byte 1*  
Byte 3 TL Register or User Byte 2*  
Byte 4 Reserved (FFh)  
EEPROM  
TH Register or User Byte 1  
TL Register or User Byte 2  
Byte 5 Reserved (FFh)  
Byte 6 COUNT REMAIN (0Ch)  
Byte 7 COUNT PER °C (10h)  
Byte 8 CRC*  
*Power-up state depends on value(s) stored in EEPROM.  
7 of 23  
 
DS18S20  
CRC GENERATION  
CRC bytes are provided as part of the DS18S20’s 64-bit ROM code and in the 9th byte of the scratchpad  
memory. The ROM code CRC is calculated from the first 56 bits of the ROM code and is contained in the  
most significant byte of the ROM. The scratchpad CRC is calculated from the data stored in the  
scratchpad, and therefore it changes when the data in the scratchpad changes. The CRCs provide the bus  
master with a method of data validation when data is read from the DS18S20. To verify that data has been  
read correctly, the bus master must re-calculate the CRC from the received data and then compare this  
value to either the ROM code CRC (for ROM reads) or to the scratchpad CRC (for scratchpad reads). If  
the calculated CRC matches the read CRC, the data has been received error free. The comparison of CRC  
values and the decision to continue with an operation are determined entirely by the bus master. There is  
no circuitry inside the DS18S20 that prevents a command sequence from proceeding if the DS18S20  
CRC (ROM or scratchpad) does not match the value generated by the bus master.  
The equivalent polynomial function of the CRC (ROM or scratchpad) is:  
CRC = X8 + X5 + X4 + 1  
The bus master can re-calculate the CRC and compare it to the CRC values from the DS18S20 using the  
polynomial generator shown in Figure 8. This circuit consists of a shift register and XOR gates, and the  
shift register bits are initialized to 0. Starting with the least significant bit of the ROM code or the least  
significant bit of byte 0 in the scratchpad, one bit at a time should shifted into the shift register. After  
shifting in the 56th bit from the ROM or the most significant bit of byte 7 from the scratchpad, the  
polynomial generator will contain the re-calculated CRC. Next, the 8-bit ROM code or scratchpad CRC  
from the DS18S20 must be shifted into the circuit. At this point, if the re-calculated CRC was correct, the  
shift register will contain all 0s. Additional information about the Maxim 1-Wire cyclic redundancy check  
is available in Application Note 27: Understanding and Using Cyclic Redundancy Checks with Maxim  
iButton Products.  
Figure 8. CRC Generator  
INPUT  
XOR  
XOR  
XOR  
(MSB)  
(LSB)  
8 of 23  
 
DS18S20  
1-WIRE BUS SYSTEM  
The 1-Wire bus system uses a single bus master to control one or more slave devices. The DS18S20 is  
always a slave. When there is only one slave on the bus, the system is referred to as a “single-drop”  
system; the system is “multidrop” if there are multiple slaves on the bus.  
All data and commands are transmitted least significant bit first over the 1-Wire bus.  
The following discussion of the 1-Wire bus system is broken down into three topics: hardware  
configuration, transaction sequence, and 1-Wire signaling (signal types and timing).  
HARDWARE CONFIGURATION  
The 1-Wire bus has by definition only a single data line. Each device (master or slave) interfaces to the  
data line via an open drain or 3-state port. This allows each device to “release” the data line when the  
device is not transmitting data so the bus is available for use by another device. The 1-Wire port of the  
DS18S20 (the DQ pin) is open drain with an internal circuit equivalent to that shown in Figure 9.  
The 1-Wire bus requires an external pullup resistor of approximately 5k; thus, the idle state for the  
1-Wire bus is high. If for any reason a transaction needs to be suspended, the bus MUST be left in the idle  
state if the transaction is to resume. Infinite recovery time can occur between bits so long as the 1-Wire  
bus is in the inactive (high) state during the recovery period. If the bus is held low for more than 480µs,  
all components on the bus will be reset.  
Figure 9. Hardware Configuration  
VPU  
DS18S20 1-Wire PORT  
DQ  
4.7k  
PIN  
1-Wire BUS  
Rx  
Rx  
Tx  
5μA  
TYP  
TX  
100  
MOSFET  
Rx = RECEIVE  
Tx = TRANSMIT  
9 of 23  
 
DS18S20  
TRANSACTION SEQUENCE  
The transaction sequence for accessing the DS18S20 is as follows:  
Step 1. Initialization  
Step 2. ROM Command (followed by any required data exchange)  
Step 3. DS18S20 Function Command (followed by any required data exchange)  
It is very important to follow this sequence every time the DS18S20 is accessed, as the DS18S20 will not  
respond if any steps in the sequence are missing or out of order. Exceptions to this rule are the Search  
ROM [F0h] and Alarm Search [ECh] commands. After issuing either of these ROM commands, the  
master must return to Step 1 in the sequence.  
INITIALIZATION  
All transactions on the 1-Wire bus begin with an initialization sequence. The initialization sequence  
consists of a reset pulse transmitted by the bus master followed by presence pulse(s) transmitted by the  
slave(s). The presence pulse lets the bus master know that slave devices (such as the DS18S20) are on the  
bus and are ready to operate. Timing for the reset and presence pulses is detailed in the 1-Wire Signaling  
section.  
ROM COMMANDS  
After the bus master has detected a presence pulse, it can issue a ROM command. These commands  
operate on the unique 64-bit ROM codes of each slave device and allow the master to single out a specific  
device if many are present on the 1-Wire bus. These commands also allow the master to determine how  
many and what types of devices are present on the bus or if any device has experienced an alarm  
condition. There are five ROM commands, and each command is 8 bits long. The master device must  
issue an appropriate ROM command before issuing a DS18S20 function command. A flowchart for  
operation of the ROM commands is shown in Figure 14.  
SEARCH ROM [F0h]  
When a system is initially powered up, the master must identify the ROM codes of all slave devices on  
the bus, which allows the master to determine the number of slaves and their device types. The master  
learns the ROM codes through a process of elimination that requires the master to perform a Search ROM  
cycle (i.e., Search ROM command followed by data exchange) as many times as necessary to identify all  
of the slave devices. If there is only one slave on the bus, the simpler Read ROM command (see below)  
can be used in place of the Search ROM process. For a detailed explanation of the Search ROM  
procedure, refer to the iButton® Book of Standards at www.maxim-ic.com/ibuttonbook. After every  
Search ROM cycle, the bus master must return to Step 1 (Initialization) in the transaction sequence.  
READ ROM [33h]  
This command can only be used when there is one slave on the bus. It allows the bus master to read the  
slave’s 64-bit ROM code without using the Search ROM procedure. If this command is used when there  
is more than one slave present on the bus, a data collision will occur when all the slaves attempt to  
respond at the same time.  
MATCH ROM [55h]  
The match ROM command followed by a 64-bit ROM code sequence allows the bus master to address a  
specific slave device on a multidrop or single-drop bus. Only the slave that exactly matches the 64-bit  
ROM code sequence will respond to the function command issued by the master; all other slaves on the  
bus will wait for a reset pulse.  
iButton is a registered trademark of Maxim Integrated Products, Inc.  
10 of 23  
DS18S20  
SKIP ROM [CCh]  
The master can use this command to address all devices on the bus simultaneously without sending out  
any ROM code information. For example, the master can make all DS18S20s on the bus perform  
simultaneous temperature conversions by issuing a Skip ROM command followed by a Convert T [44h]  
command.  
Note that the Read Scratchpad [BEh] command can follow the Skip ROM command only if there is a  
single slave device on the bus. In this case, time is saved by allowing the master to read from the slave  
without sending the device’s 64-bit ROM code. A Skip ROM command followed by a Read Scratchpad  
command will cause a data collision on the bus if there is more than one slave since multiple devices will  
attempt to transmit data simultaneously.  
ALARM SEARCH [ECh]  
The operation of this command is identical to the operation of the Search ROM command except that  
only slaves with a set alarm flag will respond. This command allows the master device to determine if  
any DS18S20s experienced an alarm condition during the most recent temperature conversion. After  
every Alarm Search cycle (i.e., Alarm Search command followed by data exchange), the bus master must  
return to Step 1 (Initialization) in the transaction sequence. See the Operation—Alarm Signaling section  
for an explanation of alarm flag operation.  
DS18S20 FUNCTION COMMANDS  
After the bus master has used a ROM command to address the DS18S20 with which it wishes to  
communicate, the master can issue one of the DS18S20 function commands. These commands allow the  
master to write to and read from the DS18S20’s scratchpad memory, initiate temperature conversions and  
determine the power supply mode. The DS18S20 function commands, which are described below, are  
summarized in Table 2 and illustrated by the flowchart in Figure 15.  
CONVERT T [44h]  
This command initiates a single temperature conversion. Following the conversion, the resulting thermal  
data is stored in the 2-byte temperature register in the scratchpad memory and the DS18S20 returns to its  
low-power idle state. If the device is being used in parasite power mode, within 10µs (max) after this  
command is issued the master must enable a strong pullup on the 1-Wire bus for the duration of the  
conversion (tCONV) as described in the Powering the DS18S20 section. If the DS18S20 is powered by an  
external supply, the master can issue read-time slots after the Convert T command and the DS18S20 will  
respond by transmitting 0 while the temperature conversion is in progress and 1 when the conversion is  
done. In parasite power mode this notification technique cannot be used since the bus is pulled high by  
the strong pullup during the conversion.  
WRITE SCRATCHPAD [4Eh]  
This command allows the master to write 2 bytes of data to the DS18S20’s scratchpad. The first byte is  
written into the TH register (byte 2 of the scratchpad), and the second byte is written into the TL register  
(byte 3 of the scratchpad). Data must be transmitted least significant bit first. Both bytes MUST be  
written before the master issues a reset, or the data may be corrupted.  
READ SCRATCHPAD [BEh]  
This command allows the master to read the contents of the scratchpad. The data transfer starts with the  
least significant bit of byte 0 and continues through the scratchpad until the 9th byte (byte 8 – CRC) is  
read. The master may issue a reset to terminate reading at any time if only part of the scratchpad data is  
needed.  
11 of 23  
DS18S20  
COPY SCRATCHPAD [48h]  
This command copies the contents of the scratchpad TH and TL registers (bytes 2 and 3) to EEPROM. If  
the device is being used in parasite power mode, within 10µs (max) after this command is issued the  
master must enable a strong pullup on the 1-Wire bus for at least 10ms as described in the Powering the  
DS18S20 section.  
RECALL E2 [B8h]  
This command recalls the alarm trigger values (TH and TL) from EEPROM and places the data in bytes 2  
and 3, respectively, in the scratchpad memory. The master device can issue read-time slots following the  
Recall E2 command and the DS18S20 will indicate the status of the recall by transmitting 0 while the  
recall is in progress and 1 when the recall is done. The recall operation happens automatically at power-  
up, so valid data is available in the scratchpad as soon as power is applied to the device.  
READ POWER SUPPLY [B4h]  
The master device issues this command followed by a read-time slot to determine if any DS18S20s on the  
bus are using parasite power. During the read-time slot, parasite powered DS18S20s will pull the bus low,  
and externally powered DS18S20s will let the bus remain high. See the Powering the DS18S20 section  
for usage information for this command.  
Table 2. DS18S20 Function Command Set  
1-Wire BUS ACTIVITY  
COMMAND  
DESCRIPTION  
PROTOCOL  
AFTER COMMAND IS  
ISSUED  
NOTES  
TEMPERATURE CONVERSION COMMANDS  
Convert T  
Initiates temperature  
conversion.  
DS18S20 transmits conversion  
status to master (not applicable  
for parasite-powered  
44h  
1
DS18S20s).  
MEMORY COMMANDS  
Read  
Scratchpad  
Reads the entire  
scratchpad including the  
CRC byte.  
Writes data into  
scratchpad bytes 2 and 3  
(TH and TL).  
Copies TH and TL data  
from the scratchpad to  
EEPROM.  
Recalls TH and TL data  
from EEPROM to the  
scratchpad.  
Signals DS18S20 power  
supply mode to the  
master.  
DS18S20 transmits up to 9  
data bytes to master.  
BEh  
4Eh  
48h  
B8h  
B4h  
2
3
1
Write  
Scratchpad  
Master transmits 2 data bytes  
to DS18S20.  
Copy  
Scratchpad  
None  
Recall E2  
DS18S20 transmits recall  
status to master.  
Read Power  
Supply  
DS18S20 transmits supply  
status to master.  
For parasite-powered DS18S20s, the master must enable a strong pullup on the 1-Wire bus during temperature  
conversions and copies from the scratchpad to EEPROM. No other bus activity may take place during this time.  
The master can interrupt the transmission of data at any time by issuing a reset.  
Note 1:  
Note 2:  
Note 3:  
Both bytes must be written before a reset is issued.  
12 of 23  
 
DS18S20  
1-WIRE SIGNALING  
The DS18S20 uses a strict 1-Wire communication protocol to ensure data integrity. Several signal types  
are defined by this protocol: reset pulse, presence pulse, write 0, write 1, read 0, and read 1. All these  
signals, with the exception of the presence pulse, are initiated by the bus master.  
INITIALIZATION PROCEDURE—RESET AND PRESENCE PULSES  
All communication with the DS18S20 begins with an initialization sequence that consists of a reset pulse  
from the master followed by a presence pulse from the DS18S20. This is illustrated in Figure 10. When  
the DS18S20 sends the presence pulse in response to the reset, it is indicating to the master that it is on  
the bus and ready to operate.  
During the initialization sequence the bus master transmits (TX) the reset pulse by pulling the 1-Wire bus  
low for a minimum of 480µs. The bus master then releases the bus and goes into receive mode (RX).  
When the bus is released, the 5kpullup resistor pulls the 1-Wire bus high. When the DS18S20 detects  
this rising edge, it waits 15µs to 60µs and then transmits a presence pulse by pulling the 1-Wire bus low  
for 60µs to 240µs.  
Figure 10. Initialization Timing  
MASTER TX RESET PULSE  
MASTER RX  
480µs minimum  
480µs minimum  
DS18S20 TX  
presence pulse  
DS18S20  
waits 15-60 µs  
60-240 µs  
VPU  
1-WIRE BUS  
GND  
LINE TYPE LEGEND  
Bus master pulling low  
DS18S20 pulling low  
Resistor pullup  
READ/WRITE TIME SLOTS  
The bus master writes data to the DS18S20 during write time slots and reads data from the DS18S20  
during read-time slots. One bit of data is transmitted over the 1-Wire bus per time slot.  
WRITE TIME SLOTS  
There are two types of write time slots: “Write 1” time slots and “Write 0” time slots. The bus master  
uses a Write 1 time slot to write a logic 1 to the DS18S20 and a Write 0 time slot to write a logic 0 to the  
DS18S20. All write time slots must be a minimum of 60µs in duration with a minimum of a 1µs recovery  
time between individual write slots. Both types of write time slots are initiated by the master pulling the  
1-Wire bus low (see Figure 11).  
To generate a Write 1 time slot, after pulling the 1-Wire bus low, the bus master must release the 1-Wire  
bus within 15µs. When the bus is released, the 5kpullup resistor will pull the bus high. To generate a  
Write 0 time slot, after pulling the 1-Wire bus low, the bus master must continue to hold the bus low for  
the duration of the time slot (at least 60µs). The DS18S20 samples the 1-Wire bus during a window that  
lasts from 15µs to 60µs after the master initiates the write time slot. If the bus is high during the sampling  
window, a 1 is written to the DS18S20. If the line is low, a 0 is written to the DS18S20.  
13 of 23  
 
DS18S20  
READ-TIME SLOTS  
The DS18S20 can only transmit data to the master when the master issues read-time slots. Therefore, the  
master must generate read-time slots immediately after issuing a Read Scratchpad [BEh] or Read Power  
Supply [B4h] command, so that the DS18S20 can provide the requested data. In addition, the master can  
generate read-time slots after issuing Convert T [44h] or Recall E2 [B8h] commands to find out the status  
of the operation as explained in the DS18S20 Function Commands section.  
All read-time slots must be a minimum of 60µs in duration with a minimum of a 1µs recovery time  
between slots. A read-time slot is initiated by the master device pulling the 1-Wire bus low for a  
minimum of 1µs and then releasing the bus (see Figure 11). After the master initiates the read-time slot,  
the DS18S20 will begin transmitting a 1 or 0 on bus. The DS18S20 transmits a 1 by leaving the bus high  
and transmits a 0 by pulling the bus low. When transmitting a 0, the DS18S20 will release the bus by the  
end of the time slot, and the bus will be pulled back to its high idle state by the pullup resister. Output  
data from the DS18S20 is valid for 15µs after the falling edge that initiated the read-time slot. Therefore,  
the master must release the bus and then sample the bus state within 15µs from the start of the slot.  
Figure 12 illustrates that the sum of TINIT, TRC, and TSAMPLE must be less than 15µs for a read-time slot.  
Figure 13 shows that system timing margin is maximized by keeping TINIT and TRC as short as possible  
and by locating the master sample time during read-time slots towards the end of the 15µs period.  
Figure 11. Read/Write Time Slot Timing Diagram  
START  
OF SLOT  
START  
OF SLOT  
MASTER WRITE “0” SLOT  
MASTER WRITE “1” SLOT  
1µs < TREC < ∞  
60µs < TX “0” < 120µs  
> 1µs  
VPU  
1-WIRE BUS  
GND  
DS18S20 Samples  
DS18S20 Samples  
MIN  
TYP  
MAX  
MIN  
TYP  
MAX  
15µs  
15µs  
15µs  
15µs  
30µs  
30µs  
MASTER READ “0” SLOT  
MASTER READ “1” SLOT  
1µs < TREC < ∞  
VPU  
1-WIRE BUS  
GND  
> 1 µs  
Master samples  
Master samples  
> 1µs  
15µs  
45µs  
15µs  
LINE TYPE LEGEND  
Bus master pulling low  
DS18S20 pulling low  
Resistor pullup  
14 of 23  
 
DS18S20  
Figure 12. Detailed Master Read 1 Timing  
VPU  
VIH of Master  
1-WIRE BUS  
GND  
TINT > 1µs  
TRC  
Master samples  
15µs  
Figure 13. Recommended Master Read 1 Timing  
VPU  
VIH of Master  
1-WIRE BUS  
GND  
Master samples  
TINT  
= TRC =  
small small  
15µs  
LINE TYPE LEGEND  
Bus master pulling low  
Resistor pullup  
15 of 23  
 
 
DS18S20  
Figure 14. ROM Commands Flowchart  
Initialization  
Sequence  
MASTER TX  
RESET PULSE  
DS18S20 TX  
PRESENCE  
PULSE  
MASTER TX ROM  
COMMAND  
CCh  
SKIP ROM  
COMMAND  
33h  
READ ROM  
COMMAND  
55h  
MATCH ROM  
COMMAND  
F0h  
SEARCH ROM  
COMMAND  
ECh  
N
N
N
N
N
ALARM SEARCH  
COMMAND  
Y
Y
Y
Y
Y
MASTER TX  
BIT 0  
DS18S20 TX BIT 0  
DS18S20 TX BIT 0  
MASTER TX BIT 0  
DS18S20 TX BIT 0  
DS18S20 TX BIT 0  
MASTER TX BIT 0  
DS18S20 TX  
FAMILY CODE  
1 BYTE  
N
N
DEVICE(S)  
WITH ALARM  
FLAG SET?  
N
BIT 0  
MATCH?  
BIT 0  
MATCH?  
DS18S20 TX  
SERIAL NUMBER  
6 BYTES  
Y
Y
Y
DS18S20 TX BIT 1  
DS18S20 TX BIT 1  
MASTER TX BIT 1  
MASTER TX  
BIT 1  
DS18S20 TX  
CRC BYTE  
N
N
BIT 1  
BIT 1  
MATCH?  
MATCH?  
Y
Y
DS18S20 TX BIT 63  
MASTER TX  
BIT 63  
DS18S20 TX BIT 63  
MASTER TX BIT 63  
N
N
BIT 63  
MATCH?  
BIT 63  
MATCH?  
Y
Y
MASTER TX  
FUNCTION  
COMMAND  
(FIGURE 15)  
16 of 23  
 
DS18S20  
Figure 15. DS18S20 Function Commands Flowchart  
44h  
48h  
COPY  
SCRATCHPAD  
N
N
MASTER TX  
FUNCTION  
COMMAND  
CONVERT  
TEMPERATURE  
?
?
Y
Y
Y
Y
N
N
PARASITE  
POWER  
?
PARASITE  
POWER  
?
MASTER ENABLES  
STRONG PULL-UP ON DQ  
DS18S20 BEGINS  
CONVERSION  
MASTER ENABLES  
STRONG PULLUP ON DQ  
DATA COPIED FROM  
SCRATCHPAD TO EEPROM  
DS18S20 CONVERTS  
TEMPERATURE  
N
COPY IN  
PROGRESS  
?
DEVICE  
CONVERTING  
TEMPERATURE  
?
N
MASTER DISABLES  
STRONG PULLUP  
Y
MASTER DISABLES  
STRONG PULLUP  
Y
MASTER  
RX “0s”  
MASTER  
RX “1s”  
MASTER  
RX “0s”  
MASTER  
RX “1s”  
B4h  
READ  
POWER SUPPLY  
BEh  
READ  
SCRATCHPAD  
4Eh  
WRITE  
SCRATCHPAD  
?
N
B8h  
RECALL E2  
?
N
N
N
?
?
Y
Y
Y
Y
MASTER TX TH BYTE  
TO SCRATCHPAD  
MASTER RX DATA BYTE  
FROM SCRATCHPAD  
N
Y
PARASITE  
POWERED  
?
MASTER BEGINS DATA  
RECALL FROM E2 PROM  
MASTER TX TL BYTE  
TO SCRATCHPAD  
Y
MASTER  
RX “1s”  
MASTER  
RX “0s”  
MASTER  
TX RESET  
?
DEVICE  
BUSY RECALLING  
N
N
DATA  
?
N
Y
HAVE 8 BYTES  
BEEN READ  
?
MASTER  
RX “0s”  
MASTER  
RX “1s”  
Y
MASTER RX SCRATCHPAD  
CRC BYTE  
RETURN TO INITIALIZATION  
SEQUENCE (FIGURE 14) FOR  
NEXT TRANSACTION  
17 of 23  
 
DS18S20  
DS18S20 OPERATION EXAMPLE 1  
In this example there are multiple DS18S20s on the bus and they are using parasite power. The bus  
master initiates a temperature conversion in a specific DS18S20 and then reads its scratchpad and  
recalculates the CRC to verify the data.  
MASTER MODE  
DATA (LSB FIRST)  
Reset  
COMMENTS  
Master issues reset pulse.  
DS18S20s respond with presence pulse.  
Master issues Match ROM command.  
Master sends DS18S20 ROM code.  
Master issues Convert T command.  
Tx  
Rx  
Tx  
Tx  
Tx  
Presence  
55h  
64-bit ROM code  
44h  
DQ line held high by  
strong pullup  
Reset  
Master applies strong pullup to DQ for the duration of the  
conversion (tCONV).  
Master issues reset pulse.  
DS18S20s respond with presence pulse.  
Master issues Match ROM command.  
Master sends DS18S20 ROM code.  
Master issues Read Scratchpad command.  
Master reads entire scratchpad including CRC. The master  
then recalculates the CRC of the first eight data bytes from the  
scratchpad and compares the calculated CRC with the read  
CRC (byte 9). If they match, the master continues; if not, the  
read operation is repeated.  
Tx  
Tx  
Rx  
Tx  
Tx  
Tx  
Presence  
55h  
64-bit ROM code  
BEh  
Rx  
9 data bytes  
DS18S20 OPERATION EXAMPLE 2  
In this example there is only one DS18S20 on the bus and it is using parasite power. The master writes to  
the TH and TL registers in the DS18S20 scratchpad and then reads the scratchpad and recalculates the  
CRC to verify the data. The master then copies the scratchpad contents to EEPROM.  
MASTER MODE  
DATA (LSB FIRST)  
COMMENTS  
Master issues reset pulse.  
DS18S20 responds with presence pulse.  
Master issues Skip ROM command.  
Master issues Write Scratchpad command.  
Master sends two data bytes to scratchpad (TH and TL)  
Master issues reset pulse.  
DS18S20 responds with presence pulse.  
Master issues Skip ROM command.  
Master issues Read Scratchpad command.  
Master reads entire scratchpad including CRC. The master  
then recalculates the CRC of the first eight data bytes from  
the scratchpad and compares the calculated CRC with the  
read CRC (byte 9). If they match, the master continues; if not,  
the read operation is repeated.  
Tx  
Rx  
Tx  
Tx  
Tx  
Tx  
Rx  
Tx  
Tx  
Reset  
Presence  
CCh  
4Eh  
2 data bytes  
Reset  
Presence  
CCh  
BEh  
Rx  
9 data bytes  
Tx  
Rx  
Tx  
Tx  
Reset  
Presence  
CCh  
Master issues reset pulse.  
DS18S20 responds with presence pulse.  
Master issues Skip ROM command.  
Master issues Copy Scratchpad command.  
Master applies strong pullup to DQ for at least 10ms while  
copy operation is in progress.  
48h  
DQ line held high by  
strong pullup  
Tx  
18 of 23  
DS18S20  
DS18S20 OPERATION EXAMPLE 3  
In this example there is only one DS18S20 on the bus and it is using parasite power. The bus master  
initiates a temperature conversion then reads the DS18S20 scratchpad and calculates a higher resolution  
result using the data from the temperature, COUNT REMAIN and COUNT PER °C registers.  
MASTER MODE  
DATA (LSB FIRST)  
COMMENTS  
Master issues reset pulse.  
DS18S20 responds with presence pulse.  
Master issues Skip ROM command.  
Master issues Convert T command.  
Tx  
Tx  
Tx  
Tx  
Reset  
Presence  
CCh  
44h  
DQ line held high by  
strong pullup  
Reset  
Master applies strong pullup to DQ for the duration of the  
conversion (tCONV).  
Master issues reset pulse.  
DS18S20 responds with presence pulse.  
Master issues Skip ROM command.  
Master issues Read Scratchpad command.  
Master reads entire scratchpad including CRC. The master  
then recalculates the CRC of the first eight data bytes from the  
scratchpad and compares the calculated CRC with the read  
CRC (byte 9). If they match, the master continues; if not, the  
read operation is repeated. The master also calculates the  
TEMP_READ value and stores the contents of the COUNT  
REMAIN and COUNT PER °C registers.  
Tx  
Tx  
Rx  
Tx  
Tx  
Presence  
CCh  
BEh  
Rx  
9 data bytes  
Tx  
Rx  
Reset  
Presence  
Master issues reset pulse.  
DS18S20 responds with presence pulse.  
CPU calculates extended resolution temperature using the  
equation in the Operation—Measuring Temperature section.  
19 of 23  
DS18S20  
ABSOLUTE MAXIMUM RATINGS  
Voltage Range on Any Pin Relative to Ground........................................................................................-0.5V to +6.0V  
Continuous Power Dissipation (TA = +70°C)  
8-Pin SO (derate 5.9mW/°C above +70°C)..........................................................................................470.6mW  
3-Pin TO-92 (derate 6.3mW/°C above +70°C).....................................................................................500mW  
Operating Temperature Range ................................................................................................................-55°C to +125°C  
Storage Temperature Range....................................................................................................................-55°C to +125°C  
Lead Temperature (soldering, 10s)..........................................................................................................+260°C  
Soldering Temperature (reflow)  
Lead(Pb)-free ......................................................................................................................................+260°C  
Containing lead(Pb) ............................................................................................................................+240°C  
These are stress ratings only and functional operation of the device at these or any other conditions above those indicated in the operation sections of this  
specification is not implied. Exposure to absolute maximum rating conditions for extended periods of time may affect reliability.  
DC ELECTRICAL CHARACTERISTICS  
(VDD = 3.0V to 5.5V, TA = -55°C to +125°C, unless otherwise noted.)  
PARAMETER  
Supply Voltage  
Pullup Supply  
Voltage  
SYMBOL  
CONDITIONS  
Local Power  
Parasite Power  
Local Power  
-10°C to +85°C  
-55°C to +125°C  
MIN  
+3.0  
+3.0  
+3.0  
TYP  
MAX  
+5.5  
+5.5  
VDD  
±0.5  
±2  
UNITS NOTES  
VDD  
V
1
VPU  
V
1, 2  
Thermometer Error  
Input Logic-Low  
tERR  
VIL  
°C  
V
3
-0.3  
+0.8  
1, 4, 5  
The lower of  
Local Power  
+2.2  
5.5  
or  
Input Logic-High  
VIH  
V
1, 6  
Parasite Power  
VI/O = 0.4V  
+3.0  
4.0  
VDD + 0.3  
Sink Current  
Standby Current  
Active Current  
DQ Input Current  
Drift  
IL  
mA  
nA  
mA  
µA  
°C  
1
7, 8  
9
10  
11  
IDDS  
IDD  
IDQ  
750  
1
5
1000  
1.5  
VDD = 5V  
±0.2  
NOTES:  
1) All voltages are referenced to ground.  
2) The Pullup Supply Voltage specification assumes that the pullup device is ideal, and therefore the high level of  
the pullup is equal to VPU. In order to meet the VIH spec of the DS18S20, the actual supply rail for the strong  
pullup transistor must include margin for the voltage drop across the transistor when it is turned on; thus:  
VPU_ACTUAL = VPU_IDEAL + VTRANSISTOR.  
3) See typical performance curve in Figure 16.  
4) Logic-low voltages are specified at a sink current of 4mA.  
5) To guarantee a presence pulse under low voltage parasite power conditions, VILMAX may have to be reduced to  
as low as 0.5V.  
6) Logic-high voltages are specified at a source current of 1mA.  
7) Standby current specified up to +70°C. Standby current typically is 3µA at +125°C.  
8) To minimize IDDS, DQ should be within the following ranges: GND DQ GND + 0.3V or  
VDD – 0.3V DQ VDD.  
9) Active current refers to supply current during active temperature conversions or EEPROM writes.  
10) DQ line is high (“high-Z” state).  
11) Drift data is based on a 1000-hour stress test at +125°C with VDD = 5.5V.  
20 of 23  
DS18S20  
AC ELECTRICAL CHARACTERISTICS—NV MEMORY  
(VDD = 3.0V to 5.5V, TA = -55°C to +100°C, unless otherwise noted.)  
PARAMETER  
NV Write Cycle Time  
EEPROM Writes  
SYMBOL  
CONDITIONS  
MIN  
TYP  
2
MAX  
10  
UNITS  
ms  
writes  
years  
tWR  
NEEWR  
tEEDR  
-55°C to +55°C  
-55°C to +55°C  
50k  
10  
EEPROM Data Retention  
AC ELECTRICAL CHARACTERISTICS  
(VDD = 3.0V to 5.5V; TA = -55°C to +125°C, unless otherwise noted.)  
PARAMETER  
Temperature Conversion  
Time  
SYMBOL  
CONDITIONS  
MIN TYP MAX UNITS NOTES  
tCONV  
750  
ms  
1
Start Convert T  
Command Issued  
Time to Strong Pullup On  
tSPON  
10  
µs  
Time Slot  
tSLOT  
tREC  
tLOW0  
tLOW1  
tRDV  
tRSTH  
tRSTL  
tPDHIGH  
tPDLOW  
CIN/OUT  
60  
1
60  
1
120  
1
1
1
1
1
1
1, 2  
1
µs  
µs  
µs  
µs  
µs  
µs  
µs  
µs  
µs  
pF  
Recovery Time  
Write 0 Low Time  
Write 1 Low Time  
Read Data Valid  
Reset Time High  
Reset Time Low  
Presence-Detect High  
Presence-Detect Low  
Capacitance  
120  
15  
15  
480  
480  
15  
60  
240  
25  
60  
1
NOTES:  
1) See the timing diagrams in Figure 17.  
2) Under parasite power, if tRSTL > 960µs, a power-on reset may occur.  
Figure 16. Typical Performance Curve  
DS18S20 Typical Error Curve  
0.5  
0.4  
+3s Error  
0.3  
0.2  
0.1  
0
0
10  
20  
30  
40  
50  
60  
70  
-0.1  
-0.2  
-0.3  
-0.4  
-0.5  
Mean Error  
-3s Error  
Temperature (°C)  
21 of 23  
 
DS18S20  
Figure 17. Timing Diagrams  
PACKAGE INFORMATION  
For the latest package outline information and land patterns, go to www.maxim-ic.com/packages. Note that a “+”, “#”, or “-”  
in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing  
pertains to the package regardless of RoHS status.  
PACKAGE TYPE  
8 SO  
PACKAGE CODE  
OUTLINE NO.  
21-0041  
LAND PATTERN NO.  
90-0096  
S8-2  
3 TO-92  
(straight leads)  
3 TO-92  
(formed leads)  
Q3-1  
Q3-4  
21-0248  
21-0250  
22 of 23  
 
DS18S20  
REVISION HISTORY  
REVISION  
PAGES  
CHANGED  
DESCRIPTION  
DATE  
In the Ordering Information table, added TO-92 straight-lead packages and  
included a note that the TO-92 package in tape and reel can be ordered with  
either formed or straight leads  
Removed the Top Mark column from the Ordering Information table;  
added the continuous power dissipation and lead and soldering  
temperatures to the Absolute Maximum Ratings section  
042208  
8/10  
2
2, 20  
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied.  
Maxim reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and max limits) shown in the Electrical  
Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance.  
23  
The Maxim logo and Maxim Integrated are trademarks of Maxim Integrated Products, Inc.  
Maxim Integrated 160 Rio Robles, San Jose, CA 95134 USA 1-408-601-1000  
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2010 Maxim Integrated  

相关型号:

DS18S20+PAR

暂无描述
MAXIM

DS18S20+T&R

Serial Switch/Digital Sensor, 9 Bit(s), 0.50Cel, Rectangular, 3 Pin, Through Hole Mount, ROHS COMPLIANT, TO-92, 3 PIN
MAXIM

DS18S20-C01+

Serial Switch/Digital Sensor
MAXIM

DS18S20-PAR

1-Wire㈢ Parasite-Power Digital Thermometer
DALLAS

DS18S20-PAR+T&R

Serial Switch/Digital Sensor, 9 Bit(s), 0.50Cel, Round, Through Hole Mount, TO-92, 3 PIN
MAXIM

DS18S20-SL+T&R

Serial Switch/Digital Sensor, 9 Bit(s), 0.50Cel, Rectangular, 3 Pin, Through Hole Mount, ROHS COMPLIANT, TO-92, 3 PIN
MAXIM

DS18S20/T&R

Serial Switch/Digital Sensor, 9 Bit(s), 0.50Cel, Rectangular, 3 Pin, Through Hole Mount, TO-92, 3 PIN
MAXIM

DS18S20Z

High Precision 1-Wire Digital Thermometer
DALLAS

DS18S20Z

Serial Switch/Digital Sensor, 9 Bit(s), 0.50Cel, Rectangular, 8 Pin, Surface Mount, SOP-8
MAXIM

DS18S20Z+

Serial Switch/Digital Sensor, 9 Bit(s), 0.50Cel, Rectangular, 8 Pin, Surface Mount, ROHS COMPLIANT, SOP-8
MAXIM

DS18S20Z+T&R

Serial Switch/Digital Sensor, 9 Bit(s), 0.50Cel, Rectangular, 8 Pin, Surface Mount, ROHS COMPLIANT, SOP-8
MAXIM

DS18S20Z/T&R

Serial Switch/Digital Sensor, 9 Bit(s), 0.50Cel, Rectangular, 8 Pin, Surface Mount, SOP-8
MAXIM