DS2252T-128-16# [MAXIM]
Microcontroller, 8-Bit, 16MHz, CMOS, ROHS COMPLIANT, SIMM-40;![DS2252T-128-16#](http://pdffile.icpdf.com/pdf2/p00297/img/icpdf/DS2252T64-16_1795953_icpdf.jpg)
型号: | DS2252T-128-16# |
厂家: | ![]() |
描述: | Microcontroller, 8-Bit, 16MHz, CMOS, ROHS COMPLIANT, SIMM-40 微控制器 |
文件: | 总16页 (文件大小:674K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
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DS2252T
Soft Microcontroller Module
www.maxim-ic.com
GENERAL DESCRIPTION
FEATURES
The DS2252T secure microcontroller module is ꢀ 8051-Compatible Microcontroller
an 8051-compatible microcontroller based on
nonvolatile RAM technology. It is designed for
systems that need to protect memory contents
from disclosure. This includes key data, sensitive
algorithms, and proprietary information of all
types. Like other members of the secure
8, 32, or 64kbytes of Nonvolatile SRAM for
Program and/or Data Memory Storage
In-System Programming via On-Chip Serial
Port
Capable of Modifying its Own Program
and/or Data Memory in the End System
microcontroller family, it provides full ꢀ Firmware Security Features
compatibility with the 8051 instruction set,
timers, serial port, and parallel I/O ports. By
using NV RAM instead of ROM, the user can
program, then reprogram the microcontroller
while in-system. This allows frequent changing of
sensitive processes with minimal effort.
Memory Stored in Encrypted Form
Encryption Using On-Chip 64-Bit Key
Automatic True Random Key Generator
Self-Destruct Input (SDI)
Improved Security Over Previous Generations
Protects Memory Contents from Piracy
ꢀ Crashproof Operation
Maintains All Nonvolatile Resources Up to
10 Years in the Absence of VCC at Room
Temperature
PIN CONFIGURATION
DS2252T
Power-Fail Reset
Early Warning Power-Fail Interrupt
Watchdog Timer
1
20
21
40
Precision Reference for Power Monitor
ꢀ Fully 8051 Compatible
128 Bytes Scratchpad RAM
Two Timer/Counters
40-Pin SIMM
Operating information and detailed summary of this product’s
security features are contained in the Secure Microcontroller
User’s Guide. This data sheet provides ordering information,
pinout, and electrical specifications.
On-Chip Serial Port
32 Parallel I/O Port Pins
ꢀ
Permanently Powered Real-Time Clock
ORDERING INFORMATION
PART
RAM SIZE (kB)
MAX CRYSTAL SPEED (MHz) TIMEKEEPING?
DS2252T-64-16
DS2252T-64-16#
DS2252T-128-16
DS2252T-128-16#
64
64
128
128
16
16
16
16
Yes
Yes
Yes
Yes
# Denotes RoHS-compliant device that may contain lead exempt under the RoHS requirements.
1 of 16
REV: 061306
DS2252T
DETAILED DESCRIPTION
The DS2252T provides an array of mechanisms to prevent an attacker from examining the memory. It is
designed to resist all levels of threat including observation, analysis, and physical attack. As a result, a
massive effort would be required to obtain any information about memory contents. Furthermore, the
“Soft” nature of the DS2252T allows frequent modification of secure information. This minimizes that
value of any information that is obtained.
Using a security system based on the DS5002FP, the DS2252T protects the memory contents from
disclosure. It loads program memory via its serial port and encrypts it in real time prior to storing it in
SRAM. Once encrypted, the RAM contents and the program flow are unintelligible. The real data exists
only inside the processor chip after being decrypted. Any attempt to discover the on-chip data, encryption
keys, etc., results in its destruction. Extensive use of nonvolatile lithium-backed technology creates a
microcontroller that retains data for over 10 years at room temperature, but which can be erased instantly
if tampered with. The DS2252T even interfaces directly to external tamper protection hardware.
The DS2252T provides a permanently powered real time lock with interrupts for time stamp and date. It
keeps time to one hundredth of a second using its onboard 32 kHz crystal.
Like other Secure Microcontrollers in the family, the DS2252T provides crashproof operation in portable
systems or systems with unreliable power. These features include the ability to save the operating state,
Power-fail Reset, Power-fail Interrupt, and Watchdog Timer. All nonvolatile memory and resources are
maintained for over 10 years at room temperature in the absence of power.
A user loads programs into the DS2252T via its on-chip Serial Bootstrap Loader. This function
supervises the loading of software into NV RAM, validates it, then becomes transparent to the user. It
also manages the loading of new encryption keys automatically. Software is stored in onboard CMOS
SRAM. Using its internal Partitioning, the DS2252T can divide a common RAM into user selectable
program and data segments. This Partition can be selected at program loading time, but can be modified
anytime later. The microcontroller will decode memory access to the SRAM, access memory via its Byte-
wide bus and write-protect the memory portion designated as program (ROM).
2 of 16
DS2252T
DS2252T BLOCK DIAGRAM Figure 1
3 of 16
DS2252T
PIN ASSIGNMENT
PIN
1
NAME
P1.0
VCC
PIN
11
12
13
14
15
16
17
18
19
20
NAME
P1.5
P0.4
P1.6
P0.5
P1.7
P0.6
RST
P0.7
PIN
21
22
23
24
25
26
27
28
29
30
NAME
P3.1/TXD
ALE
P3.2/ INT0
PROG
PIN
31
32
33
34
35
36
37
38
39
40
NAME
P3.6/ WR
P2.4
P3.7/ RD
P2.3
XTAL2
P2.2
XTAL1
P2.1
GND
2
3
4
5
6
7
8
9
10
P1.1
P0.0
P1.2
P0.1
P1.3
P0.2
P1.4
P0.3
P3.3/ INT1
P2.7
P3.4/T0
P2.6
P3.5/T1
P2.5
P3.0/RXD
SDI
P2.0
PIN DESCRIPTION
PIN
DESCRIPTION
4, 6, 8, 10,
12, 14, 16,
18
P0.0 - P0.7. General purpose I/O Port 0. This port is open-drain and cannot drive a
logic 1. It requires external pullups. Port 0 is also the multiplexed Expanded
Address/Data bus. When used in this mode, it does not require pullups.
1, 3, 5, 7, 9,
P1.0 - P1.7. General purpose I/O Port 1.
11, 13, 15
40, 38, 36,
34, 32, 30,
28, 26
P2.0 - P2.7. General purpose I/O Port 2. Also serves as the MSB of the Expanded
Address bus.
P3.0 RXD. General purpose I/O port pin 3.0. Also serves as the receive signal for the
19
21
on board UART. This pin should NOT be connected directly to a PC COM port.
P3.1 TXD. General purpose I/O port pin 3.1. Also serves as the transmit signal for the
on board UART. This pin should NOT be connected directly to a PC COM port.
P3.2 INT0 . General purpose I/O port pin 3.2. Also serves as the active low External
Interrupt 0. This pin is also connected to the INTP output of the DS1283 Real Time
Clock.
23
P3.3 INT1 . General purpose I/O port pin 3.3. Also serves as the active low External
25
Interrupt 1.
27
29
P3.4 T0. General purpose I/O port pin 3.4. Also serves as the Timer 0 input.
P3.5 T1. General purpose I/O port pin 3.5. Also serves as the Timer 1 input.
P3.6 WR . General purpose I/O port pin. Also serves as the write strobe for Expanded
31
33
bus operation.
P3.7 RD . General purpose I/O port pin. Also serves as the read strobe for Expanded
bus operation.
4 of 16
DS2252T
PIN
DESCRIPTION
RST - Active high reset input. A logic 1 applied to this pin will activate a reset state.
This pin is pulled down internally, can be left unconnected if not used. An RC power-
on reset circuit is not needed and is NOT recommended.
17
ALE - Address Latch Enable. Used to de-multiplex the multiplexed Expanded
Address/Data bus on Port 0. This pin is normally connected to the clock input on a
’373 type transparent latch.
22
XTAL2, XTAL1. Used to connect an external crystal to the internal oscillator. XTAL1
35, 37
is the input to an inverting amplifier and XTAL2 is the output.
39
2
GND - Logic ground.
VCC - +5V.
PROG - Invokes the Bootstrap loader on a falling edge. This signal should be
debounced so that only one edge is detected. If connected to ground, the
microcontroller will enter Bootstrap loading on power up. This signal is pulled up
internally.
SDI – Self-Destruct Input. A logic 1 applied to this input causes a hardware unlock.
This involves the destruction of Encryption Keys, Vector RAM, and the momentary
removal of power from VCCO. This pin should be grounded if not used.
24
20
INSTRUCTION SET
The DS2252T executes an instruction set that is object code-compatible with the industry standard 8051
microcontroller. As a result, software development packages such as assemblers and compilers that have
been written for the 8051 are compatible with the DS2252T. A complete description of the instruction set
and operation are provided in the Secure Microcontroller User’s Guide.
MEMORY ORGANIZATION
Figure 2 illustrates the memory map accessed by the DS2252T. The entire 64k of program and 64k of
data are available to the Byte-wide bus. This preserves the I/O ports for application use. An alternate
configuration allows dynamic Partitioning of a 64k space as shown in Figure 3. Any data area not mapped
into the NV RAM is reached via the Expanded bus on Ports 0 and 2. Off-board program memory is not
available for security reasons. Selecting PES = 1 provides access to the real-time clock as shown in
Figure 4. These selections are made using Special Function Registers. The memory map and its controls
are covered in detail in the Secure Microcontroller User’s Guide.
5 of 16
DS2252T
DS2252T MEMORY MAP IN NON-PARTITIONABLE MODE (PM = 1) Figure 2
PROGRAM MEMORY
-- 64K
FFFFh --
NV RAM
DATA
NV RAM
PROGRAM
0000h --
DS2252T MEMORY MAP IN PARTITIONABLE (PM = 0) Figure 3
PROGRAM MEMORY
FFFFh --
NV RAM
DATA
PARTITION
NV RAM
PROGRAM
0000h --
NOTE: PARTITIONABLE MODE IS NOT SUPPORTED ON THE 128KB VERSION OF THE DS2252T.
LEGEND:
6 of 16
DS2252T
DS2252T MEMORY MAP WITH (PES = 1) Figure 4
PROGRAM MEMORY
DATA MEMORY (MOVX-- 64K
FFFFh --
C000h --
PARTITION
B000h --
4000h --
NV RAM
-- 16K
PROGRAM
REAL-TIME
CLOCK
0000h --
POWER MANAGEMENT
The DS2252T monitors VCC to provide power-fail reset, early warning power-fail interrupt, and
switchover to lithium backup. It uses an internal band-gap reference in determining the switch points.
These are called VPFW, VCCMIN, and VLI respectively. When VCC drops below VPFW, the DS2252T will
perform an interrupt vector to location 2Bh if the power-fail warning is enabled. Full processor operation
continues regardless. When power falls further to VCCMIN, the DS2252T invokes a reset state. No further
code execution will be performed unless power rises back above VCCMIN. All decoded chip enables and
the R/ W signal go to an inactive (logic 1) state. VCC is still the power source at this time. When VCC
drops further to below VLI, internal circuitry will switch to the built-in lithium cell for power. The
majority of internal circuits will be disabled and the remaining nonvolatile states will be retained. The
Secure Microcontroller User’s Guide has more information on this topic. The trip points VCCMIN and
VPFW are listed in the electrical specifications.
7 of 16
DS2252T
ABSOLUTE MAXIMUM RATINGS
Voltage Range on Any Pin Relative to Ground……………………………………...-0.3V to (VCC + 0.5V)
Voltage Range on VCC Relative to Ground…………………………………………………-0.3V to +6.0V
Operating Temperature Range……………………………………………………………...-40°C to +85°C
Storage Temperature (Note 1)…………………………………………………………….-55°C to +125°C
Soldering Temperature………………………………………………………………+260°C for 10 seconds
This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operation
sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods of time may affect
reliability.
Note 1: Storage temperature is defined as the temperature of the device when VCC = 0V and VLI = 0V. In this state
the contents of SRAM are not battery-backed and are undefined.
DC CHARACTERISTICS
(VCC = 5V ±10%, TA = 0°C to +70°C.)
PARAMETER
SYMBOL MIN TYP
MAX
+0.8
VCC+0.3
VCC+0.3
UNITS NOTES
Input Low Voltage
Input High Voltage
Input High Voltage (RST, XTAL1, PROG )
VIL
VIH1
VIH2
-0.3
2.0
3.5
V
V
V
1
1
1
Output Low Voltage
VOL1
VOL2
VOH1
VOH2
IIL
0.15
0.15
4.8
0.45
0.45
V
V
1
1
1
1
at IOL = 1.6mA (Ports 1, 2, 3)
Output Low Voltage
at IOL = 3.2mA (Ports 0, ALE)
Output High Voltage
at IOH = -80µA (Ports 1, 2, 3)
Output High Voltage
at IOH = -400µA (Ports 0, ALE)
2.4
2.4
V
4.8
V
Input Low Current
-50
-500
±10
µA
µA
µA
VIN = 0.45V (Ports 1, 2, 3)
Transition Current; 1 to 0
ITL
VIN = 2.0V (Ports 1, 2, 3)
Input Leakage Current
IIL
0.45 < VIN < VCC (Port 0)
RST Pulldown Resistor
Power-Fail Warning Voltage
Minimum Operating Voltage
Operating Current at 16MHz
Idle Mode Current at 12MHz
Stop Mode Current
RRE
VPRW
VCCMIN
ICC
IIDLE
ISTOP
CIN
40
150
4.50
4.25
45
7.0
80
kΩ
V
V
mA
mA
µA
pF
4.25 4.37
4.00 4.12
1
1
4
5
6
7
Pin Capacitance
10
8 of 16
DS2252T
DC CHARACTERISTICS (continued)
(VCC = 5V ±10%, TA = 0°C to +70°C.)
PARAMETER
SYMBOL MIN TYP MAX UNITS NOTES
With BAT =
4.0
4.4
4.25
4.65
3.0V
Reset Trip Point in Stop
Mode
V
1
With BAT =
3.3V
SDI Input High Voltage
SDI Input High Voltage
SDI Pulldown Resistor
VIHS
VIHS
RSDI
2.0
2.0
25
VCC
3.5
60
V
V
kΩ
1, 2
1, 2
AC CHARACTERISTICS
(VCC = 0V to 5V, TA = 0°C to +70°C.)
PARAMETER
SYMBOL MIN TYP MAX UNITS NOTES
(4.5V < VCC < 5.5V)
tSPR
2
SDI Pulse Reject
10
µs
(VCC = 0V,
4
VBAT = 2.9V)
(4.5V < VCC < 5.5V)
tSPA
10
50
SDI Pulse
10
µs
Accept
(VCC = 0V,
VBAT = 2.9V)
9 of 16
DS2252T
AC CHARACTERISTICS—EXPANDED BUS MODE TIMING SPECIFICATIONS
(VCC = 5V ±10%, TA = 0°C to +70°C.)
#
1
PARAMETER
SYMBOL
1/tCLK
MIN
1.0
MAX
16 (-16)
UNITS
MHz
ns
Oscillator Frequency
ALE Pulse Width
2
tALPW
2tCLK - 40
tCLK - 40
tCLK - 35
6tCLK - 100
6tCLK - 100
3
4
14
15
Address Valid to ALE Low
Address Hold After ALE Low
RD Pulse Width
tAVALL
tAVAAV
tRDPW
ns
ns
ns
ns
tWRPW
WR Pulse Width
At 12MHz
At 16MHz
5tCLK - 165
5tCLK - 105
16
tRDLDV
ns
RD Low to Valid Data In
17
18
tRDHDV
tRDHDZ
0
ns
ns
Data Hold after RD High
Data Float after RD High
2tCLK - 70
8CLK - 150
8tCLK - 90
9tCLK - 165
9tCLK - 105
At 12MHz
At 16MHz
At 12MHz
At 16MHz
19 ALE Low to Valid Data In
tALLVD
tAVDV
ns
ns
Valid Address to Valid Data
20
In
21
22
23
tALLRDL
tAVRDL
tDVWRL
tDVWRH
3tCLK - 50
4tCLK - 130
tCLK - 60
3tCLK + 50
ns
ns
ns
ALE Low to RD or WR Low
Address Valid to RD or WR Low
Data Valid to WR Going Low
At 12MHz
At 16MHz
7tCLK - 150
7tCLK - 90
tCLK - 50
24
ns
Data Valid to WR High
25
26
27
tWRHDV
tRDLAZ
tRDHALH
ns
ns
ns
Data Valid after WR High
RD Low to Address Float
RD or WR High to ALE High
0
tCLK - 40
tCLK + 50
EXPANDED DATA MEMORY READ CYCLE
10 of 16
DS2252T
EXPANDED DATA MEMORY WRITE CYCLE
11 of 16
DS2252T
AC CHARACTERISTICS—EXTERNAL CLOCK DRIVE
(VCC = 5V ±10%, TA = 0°C to +70°C.)
#
PARAMETER
SYMBOL
MIN
20
MAX
UNITS
At 12MHz
At 16MHz
At 12MHz
At 16MHz
At 12MHz
At 16MHz
At 12MHz
At 16MHz
28 External Clock High Time
29 External Clock Low Time
30 External Clock Rise Time
31 External Clock Fall Time
tCLKHPW
ns
15
20
tCLKLPW
ns
ns
ns
15
20
15
20
15
tCLKR
tCLKF
EXTERNAL CLOCK TIMING
12 of 16
DS2252T
AC CHARACTERISTICS—POWER CYCLE TIMING
(VCC = 5V ±10%, TA = 0°C to +70°C.)
#
PARAMETER
SYMBOL
MIN
MAX
UNITS
32 Slew Rate from VCCMIN to 3.3V
33 Crystal Startup Time
34 Power-On Reset Delay
tF
tCSU
tPOR
130
µs
(Note 8)
21,504
tCLK
POWER CYCLE TIMING
13 of 16
DS2252T
AC CHARACTERISTICS—SERIAL PORT TIMING: MODE 0
(VCC = 5V ±10%, TA = 0°C to +70°C.)
#
PARAMETER
SYMBOL
tSPCLK
MIN
12tCLK
MAX
UNITS
µs
35 Serial Port Clock Cycle Time
36 Output Data Setup to Rising Clock Edge
37 Output Data Hold after Rising Clock Edge
38 Clock Rising Edge to Input Data Valid
39 Input Data Hold after Rising Clock Edge
tDOCH
tCHDO
tCHDV
tCHDIV
10tCLK - 133
2tCLK - 117
ns
ns
ns
ns
10tCLK - 133
0
SERIAL PORT TIMING: MODE 0
NOTES:
1. All voltage referenced to ground.
2. SDI should be taken to a logic high when VCC = +5V, and to approximately 3V when VCC < 3V.
3. SDI is deglitched to prevent accidental destruction. The pulse must be longer than tSPR to pass the
deglitcher, but SDI is not guaranteed unless it is longer than tSPA
.
4. Maximum operating ICC is measured with all output pins disconnected; XTAL1 driven with tCLKR
tCLKF=10 ns, VIL = 0.5V; XTAL2 disconnected; RST = PORT0 = VCC.
,
5. Idle mode IIDLE is measured with all output pins disconnected; XTAL1 driven with tCLKR, tCLKF = 10
ns, VIL = 0.5V; XTAL2 disconnected; PORT0 = VCC, RST = VSS.
6. Stop mode ISTOP is measured with all output pins disconnected; PORT0 = VCC; XTAL2 not
connected; RST = XTAL1 = VSS.
7. Pin capacitance is measured with a test frequency—1 MHz, TA = +25°C.
8. Crystal startup time is the time required to get the mass of the crystal into vibrational motion from the
time that power is first applied to the circuit until the first clock pulse is produced by the on-chip
oscillator. The user should check with the crystal vendor for a worst-case specification on this time.
14 of 16
DS2252T
PACKAGE DRAWING
PKG
DIM
A
INCHES
MIN
MAX
2.655
2.389
1.005
0.405
0.255
2.645
2.379
0.995
0.395
0.245
B
C
D
E
F
0.050 BSC
G
H
0.075
0.245
0.085
0.255
I
0.950 BSC
J
0.120
1.320
1.445
0.057
-
0.130
1.330
1.455
0.067
0.300
0.165
0.054
K
L
M
N
O
P
-
0.047
15 of 16
DS2252T
DATA SHEET REVISION SUMMARY
The following represent the key differences between 12/13/95 and 08/16/96 version of the DS2252T data
sheet. Please review this summary carefully.
1. Change VCC slew rate specification to reference 3.3V instead of VLI.
2. Add minimum value to PCB thickness.
The following represent the key differences between 08/16/96 and 05/28/97 version of the DS2252T data
sheet. Please review this summary carefully.
1. AC characteristics for battery-backed SDI pulse specification added.
The following represent the key differences between 05/28/97 and 11/08/99 version of the DS2252T data
sheet. Please review this summary carefully. (PCN I80903)
1. Correct Absolute Maximum Ratings to reflect changes to DS5002FP microprocessor.
2. Add note clarifying that SRAM contents are not defined under storage temperature conditions.
The following represent the key differences between 11/08/99 and 01/18/00 version of the DS2252T data
sheet. Please review this summary carefully.
1. Data sheet conversion from Interleaf to Word.
The following represent the key differences between 01/18/00 and 06/13/06 version of the DS2252T data
sheet. Please review this summary carefully.
1. Updated reference in Features (Crashproof Operation) to 10-year NV RAM data life to include
room temperature caveat.
2. Added RoHS-compliant packages to Ordering Information table.
3. Replaced references to “Secure Microcontroller Data Book” with “Secure Microcontroller
User’s Guide.”
16 of 16
Maxim/Dallas Semiconductor cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim/Dallas Semiconductor product.
No circuit patent licenses are implied. Maxim/Dallas Semiconductor reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
© 2006 Maxim Integrated Products • Printed USA
The Maxim logo is a registered trademark of Maxim Integrated Products, Inc. The Dallas logo is a registered trademark of Dallas Semiconductor Corporation.
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