DS8314 [MAXIM]
Smart Card Interface; 智能卡接口
| 型号： | DS8314 |
| 厂家： | 
MAXIM INTEGRATED PRODUCTS |
| 描述： | Smart Card Interface |
| 文件： | 总18页 (文件大小：264K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
19-4655; Rev 1; 5/09
Smart Card Interface
/DS8314
General Description
Features
The DS8313 smart card and SIM interface IC is a low-
cost, analog front-end for a smart card reader designed
for smart card applications that do not require the use
of the auxiliary card I/O contacts C4 and C8 (AUX1 and
AUX2). The DS8313 supports 5V, 3V, and 1.8V smart
cards. The absence of a charge pump reduces active
power consumption, and the DS8313 also supports an
ultra-low-power 10nA stop mode.
♦ Analog Interface and Level Shifting for IC Card
Communication
♦ ±±8k ꢀminꢁ ꢂSꢃ ꢀ(HBꢁ ꢄrotection on Card Interfaceꢅ
♦ Ultra-Low Stop-Bode Current, Leꢅꢅ Than 10nA
Typical
♦ Internal IC Card Supply-koltage Generation
5.0k ±5ꢆ, ±0mA ꢀmaꢇꢁ
The DS8313 is designed to interface between a system
microcontroller and the smart card interface, providing
all power supply, protection, and level shifting required
for IC card applications.
3.0k ±±ꢆ, ꢈ5mA ꢀmaꢇꢁ
1.±k ±10ꢆ, 30mA ꢀmaꢇꢁ
♦ Automatic Card Activation and ꢃeactivation
The DS8314 is similar to the DS8313, but only uses one
analog (smart card) power supply. Therefore, the
device has reduced ability to provide power to smart
cards, but it is still sufficient for many applications,
allowing the DS8314 to drop into many TDA8024 sock-
ets without hardware changes.
Controlled by ꢃedicated Internal Sequencer
♦ I/O Lineꢅ from (oꢅt ꢃirectly Level Shifted for
Smart Card Communication
♦ Fleꢇible Card Cloc8 Generation, Supporting
ꢂꢇternal Cryꢅtal Frequency ꢃivided by 1, 2, 4, or ±
The DS8313L and DS8314L use a negative polarity-pres-
ence detect instead of the default positive-polarity detect.
Both devices are available in a 28-pin SO package.
♦ (igh-Current, Short-Circuit and (igh-Temperature
ꢄrotection
♦ Low Active-Bode Current
Applications
Pay/Premium Television
Access Control
Ordering Information
PART
TEMP RANGE
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
PIN-PACKAGE
28 SO
Banking Applications
DS8313-RRX+
DS8313L-RRX+*
DS8314-RRX+*
DS8314L-RRX+*
28 SO
POS Terminals
28 SO
Debit/Credit Payment Terminals
PIN Pads
28 SO
Note: Contact the factory for availability of other variants and
package options.
+Denotes a lead(Pb)-free/RoHS-compliant package.
*Future product—contact factory for availability.
Automated Teller Machines
Telecommunications
Typical Application Circuit, ꢄin Configuration, and Selector
Guide appear at end of data ꢅheet.
Note: Some revisions of this device may incorporate deviations from published specifications known as errata. Multiple revisions of any device may be
simultaneously available through various sales channels. For information about device errata, go to: www.maꢇim-ic.com/errata.
________________________________________________________________ Baꢇim Integrated ꢄroductꢅ
1
For pricing, delivery, and ordering information, pleaꢅe contact Baꢇim ꢃirect at 1-±±±-ꢈ29-4ꢈ42,
or viꢅit Baꢇim’ꢅ webꢅite at www.maꢇim-ic.com.
Smart Card Interface
AHSOLUTꢂ BAXIBUB RATINGS
Voltage Range on V
Voltage Range on V
Relative to GND ...............-0.5V to +6.5V
Maximum Junction Temperature .....................................+125°C
DD
DDA
Relative to GND .............-0.5V to +6.5V
Maximum Power Dissipation (T = -25°C to +85°C) .......700mW
A
Voltage Range on All Other Pins
Relative to GND......................................-0.5V to (V
Storage Temperature Range.............................-55°C to +150°C
Soldering Temperature.........Refer to the IPC/JEDEC J-STD-020
Specification.
+ 0.5V)
DD
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
RꢂCOBBꢂNꢃꢂꢃ ꢃC OꢄꢂRATING CONꢃITIONS
(V
DD
= +3.3V, V
= +5.0V, T = +25°C, unless otherwise noted. All specifications apply to both the DS8313 and DS8314, unless
DDA A
otherwise noted in the CONDITIONS column.) (Note 1)
PARAMETER SYMBOL
POWER SUPPLY
/DS8314
CONDITIONS
MIN
TYP
MAX UNITS
Digital Supply Voltage
V
2.7
4.75
2.35
50
6.0
6.0
V
V
DD
Card Voltage-Generator Supply Voltage
V
DDA
DS8313, DS8314
V
TH2
Threshold voltage (falling)
Hysteresis
2.45
100
2.65
150
V
Reset Voltage Thresholds
V
HYS2
mV
CURRENT CONSUMPTION
Active V Current 5V Cards
DD
(Including 80mA Draw from 5V Card)
I
f
= 80mA, f
= 20MHz,
XTAL
CC
I
I
I
80.75
0.75
65.75
0.75
30.75
0.75
50
85
5
mA
mA
mA
mA
mA
mA
μA
DD_50V
= 10MHz, V
= 5.0V
CLK
DDA
Active V Current 5V Cards (Current
DD
Consumed by DS8313/DS8314 Only)
I
= 80mA, f
= 20MHz,
CC
XTAL
I
DD_IC
f
= 10MHz, V
= 5.0V (Note 2)
CLK
DDA
Active V Current 3V Cards
DD
(Including 65mA Draw from 3V Card)
I
f
= 65mA, f
= 10MHz, V
= 20MHz,
XTAL
CC
70
5
DD_30V
= 5.0V
CLK
DDA
Active V Current 3V Cards (Current
DD
Consumed by DS8313/DS8314 Only)
I
= 65mA, f
= 20MHz,
CC
XTAL
I
DD_IC
f
= 10MHz, V
= 5.0V (Note 2)
CLK
DDA
Active V Current 1.8V Cards
DD
(Including 30mA Draw from 1.8V Card)
I
f
= 30mA, f
= 10MHz, V
= 20MHz,
XTAL
CC
40
5
DD_18V
= 5.0V
CLK
DDA
Active V Current 1.8V Cards (Current
DD
Consumed by DS8313/DS8314 Only)
I
= 30mA, f
= 20MHz,
CC
XTAL
I
DD_IC
f
= 10MHz, V
= 5.0V (Note 2)
CLK
DDA
Card inactive, active-high PRES,
DS8313/DS8314 not in stop mode
Inactive-Mode Current
I
40
DD
DS8313/DS8314 in ultra-low-power
stop mode (CMDVCC, 5V/3V, and
1_8V set to logic 1) (Note 3)
Stop-Mode Current
I
10
μA
DD_STOP
2
_______________________________________________________________________________________
Smart Card Interface
/DS8314
RꢂCOBBꢂNꢃꢂꢃ ꢃC OꢄꢂRATING CONꢃITIONS ꢀcontinuedꢁ
(V
DD
= +3.3V, V
= +5.0V, T = +25°C, unless otherwise noted. All specifications apply to both the DS8313 and DS8314, unless
DDA A
otherwise noted in the CONDITIONS column.) (Note 1)
PARAMETER SYMBOL
CLOCK SOURCE
CONDITIONS
MIN
TYP
MAX UNITS
Crystal Frequency
f
External crystal (Note 1)
(Note 1)
0
0
20
20
MHz
MHz
XTAL
f
XTAL1
0.3 x
V
Low-level input on XTAL1
High-level input on XTAL1
-0.3
IL_XTAL1
V
DD
XTAL1 Operating Conditions
V
0.7 x
V
DD
+
V
IH_XTAL1
V
DD
0.3
C
C
,
XTAL1
External Capacitance for Crystal
15
pF
XTAL2
Internal Oscillator
f
2.2
2.7
3.4
MHz
INT
SHUTDOWN TEMPERATURE
Shutdown Temperature
RST PIN
T
+150
°C
SD
Output Low Voltage
V
I
= 1mA
= 0
0
0
0
0.3
-1
V
mA
V
OL_RST1
OL_RST
Card-Inactive Mode
Card-Active Mode
Output Current
I
V
OL_RST1
OL_RST
Output Low Voltage
V
I
= 200μA
0.3
OL_RST2
OL_RST
Output High
Voltage
V
-
CC
0.5
V
I
= -200μA
V
CC
V
OH_RST2
OH_RST
Rise Time
t
C = 30pF (Note 1)
0.1
0.1
+20
2
μs
μs
R_RST
L
Fall Time
t
C = 30pF (Note 1)
L
F_RST
Current Limitation
RSTIN to RST Delay
I
-20
mA
μs
RST(LIMIT)
t
D(RSTIN-RST)
CLK PIN
Output Low Voltage
Output Current
V
I
= 1mA
= 0
0
0
0
0.3
-1
V
mA
V
OL_CLK1
OLCLK
Card-Inactive Mode
I
V
OL_CLK1
OLCLK
Output Low Voltage
V
I
= 200μA
0.3
OL_CLK2
OLCLK
Output High
Voltage
V
0.5
-
CC
V
I
= -200μA
V
CC
V
OH_CLK2
OHCLK
Rise Time
t
C = 30pF (Notes 1, 4)
8
8
ns
ns
R_CLK
L
Card-Active Mode
Fall Time
t
C = 30pF (Notes 1, 4)
L
F_CLK
Current Limitation
Clock Frequency
Duty Factor
Slew Rate
I
-70
0
+70
10
mA
MHz
%
CLK(LIMIT)
f
Operational
CLK
ꢀ
C = 30pF
L
45
0.2
55
SR
C = 30pF (Note 1)
L
V/ns
VCC PIN
Output Low Voltage
Output Current
V
I
= 1mA
= 0
0
0
0.3
-1
V
CC1
CC
Card-Inactive Mode
I
V
mA
CC1
CC
_______________________________________________________________________________________
3
Smart Card Interface
RꢂCOBBꢂNꢃꢂꢃ ꢃC OꢄꢂRATING CONꢃITIONS ꢀcontinuedꢁ
(V
DD
= +3.3V, V
= +5.0V, T = +25°C, unless otherwise noted. All specifications apply to both the DS8313 and DS8314, unless
DDA A
otherwise noted in the CONDITIONS column.) (Note 1)
PARAMETER SYMBOL
CONDITIONS
< 80mA,
= 4.75V (Note 1)
MIN
TYP
MAX UNITS
DS8313: I
CC(5V)
4.65
5
5.25
V
DDA
DS8313: I
DS8313: I
DS8313: I
< 65mA
< 65mA
4.75
2.78
1.64
4.55
4.75
2.78
1.64
5
3
5.25
3.24
1.98
5.25
5.25
3.24
CC(5V)
CC(3V)
CC(1.8V)
< 30mA
< 80mA
1.8
5
DS8314: 65mA < I
CC(5V)
DS8314: I
DS8314: I
DS8314: I
< 65mA
< 65mA
5
CC(5V)
CC(3V)
CC(1.8V)
3
/DS8314
Output Low Voltage
V
CC2
V
< 30mA
1.8
1.98
5V card; current pulses of 40nC
with I < 200mA, t < 400ns,
f < 20MHz
4.6
5.4
Card-Active Mode
3V card; current pulses of 24nC
with I < 200mA, t < 400ns,
f < 20MHz
2.75
1.62
3.25
1.8V card; current pulses of 12nC
with I < 200mA, t < 400ns,
f < 20MHz
1.98
-80
V
V
V
= 0 to 5V
= 0 to 3V
CC(5V)
CC(3V)
CC(1.8V)
Output Current
I
mA
-65
-30
CC2
= 0 to 1.8V
Shutdown Current
Threshold
I
(Note 1)
120
mA
CC(SD)
Slew Rate
V
CCSR
Up/down; C < 300nF (Note 5)
0.05
0.16
0.22
V/μs
DATA LINES (I/O AND I/OIN)
I/O ꢁ I/OIN Falling Edge Delay
Pullup Pulse Active Time
Maximum Frequency
Input Capacitance
t
(Note 1)
(Note 1)
200
100
1
ns
ns
D(IO-IOIN)
t
PU
f
MHz
pF
IOMAX
C
10
I
I/O PIN
Output Low Voltage
V
I
= 1mA
= 0
0
0
0.3
-1
V
OL_IO1
OL_IO
Output Current
I
V
mA
OL_IO1
OL_IO
Card-Inactive Mode
Internal Pullup
Resistor
R
To V
9
11
19
kꢀ
V
PU_IO
OL_IO2
OH_IO2
CC
Output Low Voltage
V
I
I
I
= 1mA
0
0.3
OL_IO
OH_IO
OH_IO
= < -20μA
0.8 x V
V
Output High
Voltage
CC
CC
CC
V
V
= < -40μA (3V/5V)
0.75 x V
V
CC
Card-Active Mode
Output Rise/Fall
Time
Input Low Voltage
t
C = 30pF (Note 1)
L
0.1
μs
V
OT
V
-0.3
1.5
+0.8
IL_IO
Input High Voltage
V
V
CC
IH_IO
4
_______________________________________________________________________________________
Smart Card Interface
/DS8314
RꢂCOBBꢂNꢃꢂꢃ ꢃC OꢄꢂRATING CONꢃITIONS ꢀcontinuedꢁ
(V
DD
= +3.3V, V
= +5.0V, T = +25°C, unless otherwise noted. All specifications apply to both the DS8313 and DS8314, unless
DDA A
otherwise noted in the CONDITIONS column.) (Note 1)
PARAMETER SYMBOL
Input Low Current
CONDITIONS
MIN
TYP
MAX UNITS
I
V
V
= 0
= V
600
20
μA
μA
μs
IL_IO
IL_IO
IH_IO
Input High Current
Input Rise/Fall Time
Current Limitation
I
IH_IO
CC
t
1.2
+15
IT
IO(LIMIT)
Card-Active Mode
I
C = 30pF
-15
-1
mA
L
Current When
Pullup Active
I
C = 80pF, V
= 0.9 x V
DD
mA
PU
L
OH
I/OIN PIN
Output Low Voltage
V
I
I
= 1mA
0
0.3
V
V
OL
OH
OT
OL
0.75 x
V
+
DD
Output High Voltage
Output Rise/Fall Time
Input Low Voltage
V
< -40μA
OH
V
DD
0.1
t
C = 30pF, 10% to 90%
0.1
μs
V
L
0.3 x
V
-0.3
IL
V
DD
0.7 x
V
+
DD
Input High Voltage
V
V
IH
V
DD
0.3
600
10
Input Low Current
Input High Current
Input Rise/Fall Time
I
V
V
V
= 0
= V
to V
μA
μA
μs
IL_IO
IL
IH
IL
I
IH_IO
DD
IH
t
1.2
13
IT
Integrated Pullup Resistor
Current When Pullup Active
R
Pullup to V
9
11
kꢀ
mA
PU
PU
DD
I
C = 30pF, V
= 0.9 x V
DD
-1
L
OH
CONTROL PINS (CLKDIV1, CLKDIV2, CMDVCC, RSTIN, 5V/3V, 1_8V)
0.3 x
Input Low Voltage
Input High Voltage
V
-0.3
V
V
IL
V
DD
0.7 x
V
DD
+
V
IH
V
DD
0.3
5
Input Low Current
I
0 < V < V
DD
μA
μA
IL_IO
IL
Input High Current
I
0 < V < V
DD
5
IH_IO
IH
INTERRUPT OUTPUT PIN (OFF)
Output Low Voltage
V
I
I
= 2mA
0
0.3
V
V
OL
OL
0.75 x
Output High Voltage
V
= -15μA
OH
OH
V
DD
Integrated Pullup Resistor
R
Pullup to V
16
24
32
kꢀ
PU
DD
PRES PIN
0.3 x
Input Low Voltage
Input High Voltage
V
V
V
IL_PRES
V
DD
0.7 x
V
IH_PRES
V
DD
_______________________________________________________________________________________
5
Smart Card Interface
RꢂCOBBꢂNꢃꢂꢃ ꢃC OꢄꢂRATING CONꢃITIONS ꢀcontinuedꢁ
(V
DD
= +3.3V, V
= +5.0V, T = +25°C, unless otherwise noted. All specifications apply to both the DS8313 and DS8314, unless
DDA A
otherwise noted in the CONDITIONS column.) (Note 1)
PARAMETER SYMBOL
Input Low Current
CONDITIONS
= 0
MIN
TYP
MAX UNITS
I
V
V
5
μA
μA
IL_PRES
IL_PRES
IH_PRES
Input High Current
TIMING
I
= V
10
IH_PRES
DD
Activation Time
Deactivation Time
t
50
50
50
140
5
220
100
130
220
11
μs
μs
ACT
t
80
8
DEACT
Window Start
Window End
t
3
t
5
CLK to Card Start
Time
μs
PRES Debounce Time
t
ms
DEBOUNCE
/DS8314
Note 1: Operation guaranteed at -40°C and +85°C but not tested.
Note 2: I measures the amount of current used by the DS8313 to provide the smart card current minus the load.
DD_IC
Note 3: Stop mode is enabled by setting CMDVCC, 5V/3V, and 1_8V to a logic-high.
Note 4: Parameters are guaranteed to meet all ISO 7816, GSM11-11, and EMV 2000 requirements. For the 1.8V card, the maximum
rise and fall time is 10ns.
Note 5: Parameter is guaranteed to meet all ISO 7816, GSM11-11, and EMV 2000 requirements. For the 1.8V card, the minimum
slew rate is 0.05V/µs and the maximum slew rate is 0.5V/µs.
ꢈ
_______________________________________________________________________________________
Smart Card Interface
/DS8314
Pin Description
PIN
NAME
FUNCTION
CLKDIV1, Clock Divider. Determines the divided-down input clock frequency (presented at XTAL1 or from a
1, 2
CLKDIV2
crystal at XTAL1 and XTAL2) on the CLK output pin. Dividers of 1, 2, 4, and 8 are available.
5V/3V Selection Pin. Allows selection of 5V or 3V for communication with an IC card. Logic-high
selects 5V operation; logic-low selects 3V operation. The 1_8V pin overrides the setting on this pin if
active. See Table 3 for a complete description of choosing card voltages.
3
4
5V/3V
1.8V Operation Selection. Active-high selection for 1.8V smart card communication. An active-high
signal on this pin overrides any setting on the 5V/3V pin.
1_8V
N.C.
5, 7, 8, 9,
12, 13, 27,
28
No Connection/Don’t Care. These pins are not bonded out.
V
DDA
6, 18
Analog (Smart Card) Supply. Connect to 5V power supply. Pin 18 is N.C. for the DS8314.
(N.C.)
Card Presence Indicator. Active-high card presence input from the DS8313 to the microcontroller.
When the presence indicator becomes active, a debounce timeout begins. After 8ms (typ), the OFF
signal becomes active. A trim optim defines whether or not the part provides active-low presence
detection.
10
PRES
11
14
15
16
I/O
CGND
CLK
Smart Card Data-Line Output. Card data communication line, contact C7.
Smart Card Ground
Smart Card Clock. Card clock, contact C3.
RST
Smart Card Reset. Card reset output from contact C2.
Smart Card Supply Voltage. Decouple to CGND (card ground) with 2 x 100nF or 100 + 220nF
capacitors (ESR < 100mꢀ).
17
V
CC
19
20
21
22
CMDVCC Activation Sequence Initiate. Active-low input from host.
RSTIN
Card Reset Input. Reset input from the host.
V
DD
Supply Voltage
GND
Digital Ground
Status Output. Active-low interrupt output to the host. Includes a 24kꢀ integrated pullup resistor to
23
OFF
V
.
DD
Crystal/Clock Input. Connect an input from an external clock to XTAL1 or connect a crystal across
XTAL1 and XTAL2. For the low idle-mode current variant, an external clock must be driven on
XTAL1.
XTAL1,
XTAL2
24, 25
26
I/OIN
I/O Input. Host-to-interface chip data I/O line.
_______________________________________________________________________________________
7
Smart Card Interface
tle current in active-mode operation (during a smart
card communication session), and is suitable for use in
battery-powered devices such as laptops and PDAs,
consuming only 10nA in stop mode. The DS8313 is
designed for applications that do not require communi-
cation using the C4 and C8 card contacts (AUX1 and
AUX2). It is suitable for SIM/SAM interfacing, as well as
for applications where only the I/O line is used to com-
municate with a smart card.
Detailed Description
The DS8313 is an analog front-end for communicating
with 1.8V, 3V, and 5V smart cards. It is a dual input-
voltage device, requiring one supply to match that of a
host microcontroller and a separate +5V supply for
generating correct smart card supply voltages. The
DS8313 translates all communication lines to the cor-
rect voltage level and provides power for smart card
operation. It is a low-power device, consuming very lit-
The DS8314 is nearly identical to the DS8313, but only
uses one V
input; therefore, it has reduced capaci-
DDA
ty to deliver current to 5V smart cards. However, the
DS8314 can drop into many existing TDA8024 applica-
tions with minimal or no hardware changes. See Figure
1 for a functional diagram.
V
GND
V
DDA
V
DDA
POWER-SUPPLY CARD VOLTAGE
DD
SUPERVISOR
GENERATOR
*
/DS8314
Power Supply
XTAL1
XTAL2
CLKDIV1
CLKDIV2
CLOCK
GENERATION
TEMPERATURE
MONITOR
The DS8313/DS8314 are dual-supply devices. The sup-
ply pins for the devices are V , GND, and V
. V
DDA DD
DD
should be in the 2.7V to 6.0V range, and is the supply
for signals that interface with the host controller. It
should, therefore, be the same supply as used by the
host controller. All smart card contacts remain inactive
during power-on or power-off. The internal circuits are
1_8V
5V/3V
V
CC
CMDVCC
RSTIN
CGND
RST
CLK
CONTROL
SEQUENCER
PRES
kept in the reset state until V
reaches V
+ V
DD
TH2 HYS2
OFF
and for the duration of the internal power-on reset
pulse, t . A deactivation sequence is executed when
W
I/OIN
I/O TRANSCEIVER
I/O
V
DD
falls below V
.
TH2
An internal regulator generates the 1.8V, 3V, or 5V card
supply voltage (V ). The regulator should be supplied
CC
DS8313
DS8314
separately by V
. V
should be connected to a
DDA
DDA
minimum 4.75V supply to provide the correct supply
voltage for 5V smart cards.
*USED ONLY ON THE DS8313.
Figure 1. Functional Diagram
V
TH2
V
TH2
+ V
HYS2
V
DD
ALARM
(INTERNAL SIGNAL)
t
W
t
W
POWER ON
SUPPLY DROPOUT
POWER OFF
Figure 2. Voltage Supervisor Behavior
±
_______________________________________________________________________________________
Smart Card Interface
/DS8314
Voltage Supervisor
I/O Transceivers
The voltage supervisor monitors the V
supply. A
I/O and I/OIN are pulled high with an 11kΩ resistor (I/O
DD
220µs reset pulse (t ) is used internally to keep the
to V
and I/OIN to V ) in the inactive state. The first
CC DD
W
device inactive during power-on or power-off of the
side of the transceiver to receive a falling edge
becomes the master. When a falling edge is detected
(and the master is decided), the detection of falling
edges on the line of the other side is disabled; that side
V
DD
supply. See Figure 2.
The DS8313/DS8314 card interface remains inactive
regardless of the levels on the command lines until
then becomes a slave. After a time delay t
, an n
D(EDGE)
duration t after V
has reached a level higher than
DD
W
transistor on the slave side is turned on, thus transmit-
ting the logic 0 present on the master side.
V
+ V
. When V
falls below V
, the
TH2
TH2
HYS2
DD
DS8313/DS8314 execute a card deactivation sequence
if their card interface is active.
When the master side asserts a logic 1, a p transistor
on the slave side is activated during the time delay t
PU
Clock Circuitry
and then both sides return to their inactive (pulled up)
states. This active pullup provides fast low-to-high tran-
The card clock signal (CLK) is derived from a clock sig-
nal input to XTAL1 or from a crystal operating at up to
20MHz connected between XTAL1 and XTAL2. The
output clock frequency of CLK is selectable through
inputs CLKDIV1 and CLKDIV2. The CLK signal frequen-
sitions. After the duration of t , the output voltage
PU
depends only on the internal pullup resistor and the
load current. Current to and from the card I/O lines is
limited internally to 15mA. The maximum frequency on
these lines is 1MHz.
cy can be f
, f
/2, f
/4, or f
XTAL
/8. See Table
XTAL
XTAL XTAL
1 for the frequency generated on the CLK signal given
the inputs to CLKDIV1 and CLKDIV2.
Inactive Mode
The DS8313/DS8314 power up with the card interface
in the inactive mode. Minimal circuitry is active while
waiting for the host to initiate a smart card session.
Note that CLKDIV1 and CLKDIV2 must not be changed
simultaneously; a delay of 10ns minimum between
changes is needed. The minimum duration of any state
of CLK is eight periods of XTAL1.
• All card contacts are inactive (approximately 200Ω
to GND).
The frequency change is synchronous: during a transition
of the clock divider, no pulse is shorter than 45% of the
smallest period, and the first and last clock pulses about
the instant of change have the correct width. When
changing the frequency dynamically, the change is effec-
tive for only eight periods of XTAL1 after the command.
• The I/OIN pin in the high-impedance state (11kΩ
pullup resistor to V ).
DD
• Voltage generators are stopped.
• XTAL oscillator is running (if included in the device).
• Voltage supervisor is active.
The f
duty factor depends on the input signal on
XTAL
XTAL1. To reach a 45% to 55% duty factor on CLK,
XTAL1 should have a 48% to 52% duty factor with tran-
sition times less than 5% of the period.
• The internal oscillator is running at its low frequency.
Activation Sequence
After power-on and the reset delay, the host microcon-
troller can monitor card presence with signals OFF and
CMDVCC, as shown in Table 2.
With a crystal, the duty factor on CLK can be 45% to
55% depending on the circuit layout and on the crystal
characteristics and frequency. In other cases, the duty
factor on CLK is guaranteed between 45% and 55% of
the clock period.
Table 1. Cloc8 Frequency Selection
Table 2. Card ꢄreꢅence Indication
OFF
High
Low
CMDVCC
High
STATUS
Card present.
CLKDIV1
CLKDIV2
f
CLK
0
0
1
1
0
1
1
0
f
f
f
/8
/4
/2
XTAL
XTAL
XTAL
High
Card not present.
f
XTAL
_______________________________________________________________________________________
9
Smart Card Interface
If the card is in the reader (if PRES is active), the host
microcontroller can begin an activation sequence (start
a card session) by pulling CMDVCC low. The following
events form an activation sequence (Figure 3):
2) Set CMDVCC low.
3) Set RSTIN low between t and t ; CLK will now start.
3
5
4) RST stays low until t , then RST becomes the copy
5
of RSTIN.
1) CMDVCC is pulled low.
5) RSTIN has no further effect on CLK after t .
5
2) The internal oscillator changes to high frequency (t ).
0
If the applied clock is not needed, set CMDVCC low
3) The voltage generator is started (between t and t ).
0
1
with RSTIN low. In this case, CLK starts at t (minimum
3
4) V
rises from 0 to 5V, 3V, or 1.8V with a con-
200ns after the transition on I/O, see Figure 4); after t ,
5
CC
trolled slope (t = t + 1.5 × T). T is 64 times the
RSTIN can be set high to obtain an answer to request
(ATR) from an inserted smart card. Do not perform acti-
vation with RSTIN held permanently high.
2
1
internal oscillator period (approximately 25µs).
5) I/O pin is enabled (t = t + 4T) (they were previ-
3
1
ously pulled low).
Active Mode
When the activation sequence is completed, the card
interface is in active mode. The host microcontroller
and the smart card exchange data on the I/O lines.
6) The CLK signal is applied to the C3 contact (t ).
4
/DS8314
7) RST is enabled (t = t + 7T).
5
1
To apply the clock to the card interface:
1) Set RSTIN high.
CMDVCC
V
CC
ATR
I/O
CLK
RSTIN
RST
I/OIN
t
0
t
1
t
2
t
t
t = t
5 ACT
3
4
Figure 3. Activation Sequence Using RSTIN and CMDVCC
10 ______________________________________________________________________________________
Smart Card Interface
/DS8314
CMDVCC
V
CC
ATR
I/O
CLK
200ns
RSTIN
RST
I/OIN
t
0
t
1
t
2
t
t
4
t = t
5 ACT
3
Figure 4. Activation Sequence at t
3
CMDVCC
RST
CLK
I/O
V
CC
t
10
t
12
t
t
14
t
15
13
t
DE
Figure 5. Deactivation Sequence
______________________________________________________________________________________ 11
Smart Card Interface
Deactivation Sequence
Fault Detection
When a session is completed, the host microcontroller
sets the CMDVCC line high to execute an automatic
deactivation sequence and returns the card interface to
the inactive mode (Figure 5).
The following fault conditions are monitored:
• Short-circuit or high current on V
CC
• Removal of a card during a transaction
• V dropping
DD
1) RST goes low (t ).
10
• Card voltage generator operating out of the speci-
2) CLK is held low (t = t + 0.5 × T) where T is 64
12
10
fied values (V
too high)
too low or current consumption
DDA
times the period of the internal oscillator (approxi-
mately 25µs).
• Overheating
3) I/O pin is pulled low (t = t + T).
13
10
There are two different cases (Figure 6):
4) V
starts to fall (t = t + 1.5 × T).
14 10
CC
•
CMDVCC (igh Outꢅide a Card Seꢅꢅion. Output
OFF is low if a card is not in the card reader and
5) When V
reaches its inactive state, the deactiva-
CC
tion sequence is complete (at t ).
DE
/DS8314
high if a card is in the reader. The V
supply is
DD
6) All card contacts become low impedance to GND;
monitored—a decrease in input voltage generates
an internal power-on reset pulse but does not
affect the OFF signal. Short-circuit and tempera-
ture detection is disabled because the card is not
powered up.
I/OIN remains at V
resistor).
(pulled up through an 11kΩ
DD
7) The internal oscillator returns to its lower frequency.
V
Generator
CC
•
CMDVCC Low Within a Card Seꢅꢅion. Output
OFF goes low when a fault condition is detected,
and an emergency deactivation is performed auto-
matically (Figure 7). When the system controller
resets CMDVCC to high, it may sense the OFF
level again after completing the deactivation
sequence. This distinguishes between a card
extraction and a hardware problem (OFF goes high
again if a card is present). Depending on the con-
nector’s card-present switch (normally closed or
normally open) and the mechanical characteristics
of the switch, bouncing can occur on the PRES sig-
nals at card insertion or withdrawal.
The V
generator has a capacity to supply up to
CC
80mA continuously at 5V, 65mA at 3V, and 30mA at
1.8V. An internal overload detector triggers at approxi-
mately 120mA. Current samples to the detector are fil-
tered. This allows spurious current pulses (with a
duration of a few µs) up to 200mA to be drawn without
causing deactivation. The average current must stay
below the specified maximum current value. To main-
tain V
voltage accuracy, a 100nF capacitor (with an
CC
ESR < 100mΩ) should be connected to CGND and
placed near the V pin, and a 100nF or 220nF capaci-
CC
tor (220nF is the best choice) with the same ESR should
be connected to CGND and placed near the smart
card reader’s C1 contact.
The DS8313/DS8314 have a debounce feature with an
8ms typical duration (Figure 6). When a card is insert-
ed, output OFF goes high after the debounce time
delay. When the card is extracted, an automatic deacti-
vation sequence of the card is performed on the first
true/false transition on PRES and output OFF goes low.
12 ______________________________________________________________________________________
Smart Card Interface
/DS8314
PRES
OFF
CMDVCC
DEBOUNCE
DEBOUNCE
V
CC
DEACTIVATION CAUSED
BY CARD WITHDRAWAL
DEACTIVATION CAUSED
BY SHORT CIRCUIT
Figure 6. Behavior of PRES, OFF, CMDVCC, and V
CC
OFF
PRES
RST
CLK
I/O
V
CC
t
t
12
t
13
t
t
15
10
14
t
DE
Figure 7. Emergency Deactivation Sequence (Card Extraction)
______________________________________________________________________________________ 13
Smart Card Interface
pins to a logic-low. An internal 220µs (typ) power-up
delay and the 8ms PRES debounce delay are in effect
and OFF is asserted to allow the internal circuitry to sta-
bilize. This prevents smart card access from occurring
after leaving the stop mode. Figure 8 shows the control
sequence for entering and exiting stop mode. Note that
an in-progress deactivation sequence always finishes
before the DS8313/DS8314 enter low-power stop
mode.
Stop Mode (Low-Power Mode)
A low-power state, stop mode, can be entered by forc-
ing the CMDVCC, 5V/3V, and 1_8V input pins to a
logic-high state. Stop mode can only be entered when
the smart card interface is inactive. In stop mode, all
internal analog circuits are disabled. The OFF pin fol-
lows the status of the PRES pin. To exit stop mode,
change the state of one or more of the three control
DEACTIVATE INTERFACE
CMDVCC
/DS8314
1_8V
ACTIVATE
STOP MODE
DEACTIVATE
STOP MODE
5V/3V
220μs DELAY
8ms DEBOUNCE
STOP MODE
OFF ASSERTED TO
WAIT FOR DELAY
OFF
OFF FOLLOWS
PRES IN STOP MODE
PRES
V
CC
Figure 8. Stop-Mode Sequence
14 ______________________________________________________________________________________
Smart Card Interface
/DS8314
to a logic-low state. Care must be exercised when
Smart Card Power Select
switching from one V
power selection to the other. If
CC
The DS8313/DS8314 support three smart card V
CC
both 1_8V and 5V/3V are high with CMDVCC high at
the same time, the DS8313/DS8314 enter stop mode.
To avoid accidental entry into stop mode, the state of
1_8V and 5V/3V must not be changed simultaneously.
A minimum delay of 100ns should be observed
between changing the states of 1_8V and 5V/3V. See
Figure 9 for the recommended sequence of changing
voltages: 1.8V, 3V, and 5V. The power select is con-
trolled by the 1_8V and 5V/3V signals as shown in
Table 3. The 1_8V signal has priority over 5V/3V. When
1_8V is asserted high, 1.8V is applied to V
when the
CC
smart card is active. When 1_8V is deasserted, 5V/3V
dictates V power range. V is 5V if 5V/3V is assert-
CC
CC
ed to a logic-high state, and V
is 3V if 5V/3V is pulled
CC
the V
range.
CC
Table 3. k
Select and Operation Bode
CC
1_8V
5V/3V
CMDVCC
V
CC
SELECT (V)
CARD INTERFACE STATUS
Activated
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
3
3
Inactivated
5
Activated
5
Inactivated
1.8
1.8
1.8
1.8
Activated
Inactivated
Reserved (Activated)
Not Applicable—Stop Mode
V
CC
SELECT
1.8V
3V
5V
3V
1.8V
STOP MODE
CMDVCC
1_8V
5V/3V
Figure 9. Smart Card Power Select
______________________________________________________________________________________ 15
Smart Card Interface
driven by an external clock, also reference this pin
to V
Applications Information
.
DD
Performance can be affected by the layout of the appli-
cation. For example, an additional cross-capacitance of
1pF between card reader contacts C2 (RST) and C3
(CLK) or C2 (RST) and C7 (I/O) can cause contact C2
to be polluted with high-frequency noise from C3 (or
C7). In this case, include a 100pF capacitor between
contacts C2 and CGND.
• Trace C3 (CLK) should be placed as far as possi-
ble from the other traces.
• The trace connecting CGND to C5 (GND) should
be straight (the two capacitors on C1 (V ) should
CC
be connected to this ground trace).
• Avoid ground loops between CGND and GND.
Application recommendations include the following:
• Decouple V
and VDD separately. If two sup-
DDA
• Ensure there is ample ground area around the
DS8313/DS8314 and the connector; place the
DS8313/DS8314 very near to the connector; decou-
plies are the same in the application, they should
be connected in a star on the main trace
With all these layout precautions, noise should be kept to
an acceptable level and jitter on C3 (CLK) should be less
than 100ps. Reference layouts are available on request.
ple the V
and V
lines separately. These lines
DD
DDA
are best positioned under the connector.
/DS8314
• The device and the host microcontroller must use
Technical Support
For technical support, go to httpꢅ://ꢅupport.maꢇim-
ic.com/micro.
the same V
supply. Pins CLKDIV1, CLKDIV2,
DD
RSTIN, PRES, I/OIN, 5V/3V, 1_8V, CMDVCC, and
OFF are referenced to V ; if pin XTAL1 is to be
DD
Selector Guide
LOW STOP-MODE
POWER
LOW ACTIVE-
MODE POWER
PART
PRES POLARITY
V
INPUTS
PIN-PACKAGE
DDA
DS8313-RRX+
DS8313L-RRX+*
DS8314-RRX+*
DS8314L-RRX+*
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Positive
Negative
Positive
Negative
2
2
1
1
28 SO
28 SO
28 SO
28 SO
Note: Contact the factory for availability of other variants and package options.
+Denotes a lead(Pb)-free/RoHS-compliant package.
*Future product—contact factory for availability.
1ꢈ ______________________________________________________________________________________
Smart Card Interface
/DS8314
Typical Application Circuit
V
CC
GPIO
...
...
...
5V/3V
1_8V
OFF
RSTIN
CMDVCC
I/OIN
RST
CLK
I/O
DS8313
100nF*
220nF*
μC
GPIO
ISO_DATA
ISO_CLOCK
CLKIN
CGND
PRES
GND
V
DD
GND
V
V
DDA DDA
100kΩ
+10μF
+3.3V
100nF
+3.3V
100nF
+5.0V
*PLACE A 100nF CAPACITOR CLOSE TO DS8313 AND PLACE A 220nF CAPACITOR CLOSE TO CARD CONTACT.
Pin Configuration
Package Information
For the latest package outline information and land patterns, go
to www.maꢇim-ic.com/pac8ageꢅ.
TOP VIEW
ꢄACKAGꢂ TYꢄꢂ ꢄACKAGꢂ COꢃꢂ ꢃOCUBꢂNT NO.
CLKDIV1
1
2
3
4
5
6
7
8
9
28 N.C.
27 N.C.
26 I/OIN
25 XTAL2
24 XTAL1
23 OFF
28 SO
W28+1
21-0042
CLKDIV2
5V/3V
1_8V
N.C.
DS8313
DS8314
V
DDA
N.C.
N.C.
N.C.
22 GND
21
V
DD
20 RSTIN
PRES 10
I/O 11
19 CMDVCC
18
17
V
V
(N.C.)
DDA
CC
N.C. 12
N.C. 13
CGND 14
16 RST
15 CLK
SO
() INDICATES DS8314 ONLY.
______________________________________________________________________________________ 17
Smart Card Interface
Revision History
REVISION REVISION
PAGES
CHANGED
DESCRIPTION
NUMBER
DATE
0
1/09
Initial release.
—
Removed the TSSOP package variant from the General Description, Ordering
Information, Selector Guide, and Package Information sections.
1, 16, 17
1
1
5/09
Changed “(IEC)” in the Features section to “(HBM)” for the “ 8kV (min) ESD (HBM)
Protection on Card Interfaces” bullet.
/DS8314
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
1± ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
© 2009 Maxim Integrated Products
Maxim is a registered trademark of Maxim Integrated Products, Inc.
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