MAX11216 [MAXIM]
High-Speed USB, FMC Connector, and PMOD Connector;
| 型号： | MAX11216 |
| 厂家： | 
MAXIM INTEGRATED PRODUCTS |
| 描述： | High-Speed USB, FMC Connector, and PMOD Connector |
| 文件： | 总34页 (文件大小：2942K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Evaluates: MAX11214/MAX11216
MAX1121X Family Evaluation Kit
General Description
Features and Benefits
● High-Speed USB, FMC Connector, and PMOD
The evaluation kit (EV kit) demonstrates the MAX1121X
family of 24-bit, 64ksps delta-sigma ADCs with integrated
PGA. The EV kit includes a graphical user interface (GUI)
that provides communication from the target device to the
PC. The EV kit can operate in multiple modes:
Connector
● 5MHz SPI Interface
● Various Sample Sizes and Sample Rates
●
Collects Up to 1 Million Samples (with FPGA Platform)
1) Standalone Mode: In “Standalone” mode, the EV
kit is connected to the PC through a USB cable and
performs a subset of the complete EV kit functions
with limitation for sample rate and size.
● Time Domain, Frequency Domain, and Histogram
Plotting
● Save Plots as jpg, bmp or csv
2) FPGA Mode: In “FPGA” mode, the EV kit is con-
● Sync In and Sync Out for Coherent Sampling
nected to an Avnet ZedBoard™ through a low-pin-
(with FPGA Platform)
®
count FMC connector. ZedBoard features a Xilinx
● On-Board DAC (MAX542) for DC Signal-Level
®
Zynq -7000 SoC that connects to the PC through an
Generation
Ethernet port, which allows the GUI to perform differ-
ent operations with full control over mezzanine card
functions. The EV kit with FPGA platform performs
the complete suite of evaluation tests for the target IC
● On-Board Voltage Reference (MAX6126)
● Proven PCB Layout
● Fully Assembled and Tested
3) User-Supplied SPI Mode: In addition to the USB
and FMC interfaces, the EV kit provides two 12-pin
PMOD-style headers for user-supplied SPI interface,
to connect the signals for RDYB, SCLK, DIN, DOUT,
and CSB.
● Windows XP-, Windows 7-, and Windows
8.1-Compatible Software
● Savable ADC Configurations
®
®
The EV kit includes Windows XP -, Windows 7 and
Windows 8.1-compatible software to exercise the features
of the IC. The EV kit GUI allows different sample sizes,
adjustable sampling rates, on-board or external reference
options, and graphing software that includes the FFT and
histogram of the sampled signals with the ability to save
plots in .jpg or .csv formats.
Ordering Information appears at end of data sheet.
ZedBoard is a trademark of Avnet, Inc.
Xilinx and Zynq are registered trademarks and Xilinx is a regis-
tered service mark of Xilinx, Inc.
The ZedBoard board accepts a +12V AC-DC wall adapter.
The EV kit can be powered by the ZedBoard or by a local
12V supply. The EV kit has on-board transformers and
digital isolators to separate the IC from the ZedBoard/
on-board processor.
Windows and Windows XP are registered trademarks and reg-
istered service marks of Microsoft Corporation.
The MAX11214 EV kit comes installed with
a
MAX11214EUG+ in a 24-pin TSSOP package and the
MAX11216 EV kit comes installed with a MAX11216EUG+
in a 24-pin TSSOP package.
19-7605; Rev 0; 4/15
Evaluates: MAX11214/MAX11216
MAX1121X Family Evaluation Kit
MAX1121X EV Kit Photo
System Block Diagram
SYNC IN,
SYNC OUT
IN+
ISOLATED
DC-DC
-
+
-
+
CH_A
CH_B
FPGA -
ZedBoard
SCLK_ADC
CS_ADC
MAX44241
ADC_INP
ADC_INN
F
M
C
MAX44241
MAX11214/216
ADC
DAC_OUT+
ADC_REFP
RDYB_ADC
U25
DOUT_ADC
DIN_ADC
-
+
CH_C
-
+
I
S
O
L
A
T
I
O
N
EXT_REFP
EXT_REFN
H
E
A
D
E
R
MAX44241
ADC_REFP
ADC_REFN
User-Supplied
MAX44241
CH_D
IN-
SPI
DAC_OUT-
ADC_REFN
MAX6126
SCLK_DAC
CS_DAC
DAC_OUT+
MAX542
DAC
U15
-
+
DIN_DAC
LDAC
PC - USB
DAC_OUT-
U
MAX9632
S
B
FTDI
MAX9632 x2
MAX6126
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Evaluates: MAX11214/MAX11216
MAX1121X Family Evaluation Kit
7) From the Device menu, select Standalone and click
Search for USB Device. Then select Standalone
again and select a device in the list. Verify that the
lower left status bar indicates the EV kit hardware is
Connected.
MAX1121X EV Kit Files
FILE
DECRIPTION
Application Program
(GUI)
MAX11214_16EVKitSetupV1.1.exe
For FPGA mode (when connected to a ZedBoard):
ZedBoard Firmware
(SD Card to boot Zynq)
Boot.bin
8) Connect the Ethernet cable from the PC to the
ZedBoard and configure the Internet Protocol Version
4 (TCP/Ipv4) properties in the local area connec-
tion to IP address 192.168.1.2 and subnet Mask to
255.255.255.0.
Quick Start
Required Equipment
●
●
●
●
MAX1121X EV kit
9) Verify that the ZedBoard SD card contains the
boot.bin file for the MAX1121X EV kit.
+12V (500mA) power supply
Micro-USB cable
10) Connect the EV kit FMC connector to the ZedBoard
FMC connector. Gently press them together.
ZedBoard development board (optional – Not Included
with EV kit)
11) Verify that all jumpers are in their default positions for
the ZedBoard (Table 1) and EV kit (Table 2).
●
●
Function generator (optional)
12) Connect the 12V wall adapter power supply to the
ZedBoard. Leave the ZedBoard powered off. Connect
the PC to the ZedBoard with an Ethernet cable.
Windows XP, Windows 7, or Windows 8.1 PC with a
spare USB port
Note: In the following sections, software-related items are
identified by bolding. Text in bold refers to items directly
from the EV system software. Text in bold and underline
refers to items from the Windows operating system.
13) Enable the power supply by sliding SW8 to ON.
14) Start the EV kit software by opening its icon in the
Start | Programs menu. The EV kit software appears
as shown in Figure 1. From the Device menu, select
FPGA. Verify that the lower left status bar indicates
the EV kit hardware is Connected.
Procedure
The EV kit is fully assembled and tested. Follow the steps
below to verify board operation:
For either Standalone or FPGA mode:
1) Visit www.maximintegrated.com/evkitsoftware to
download the latest version of the EV kit software,
MAX11214_16EVK.ZIP. Save the EV kit software to a
temporary folder and uncompress the ZIP file.
15) Connect the positive terminal of the function generator
to the IN+ test point on the EV kit. Connect the nega-
tive terminal of the function generator to the IN- test
point on the EV kit. Disable the function generator.
2) InstalltheEVkitsoftwareandUSBdriveronyourcomput-
er by running the MAX11214_16EVKitSetupV1.1.exe
program inside the temporary folder. The program
files are copied to your PC and icons are created in
the Windows Start | Programs menu. At the end of
the installation process, the installer will launch the
installer for the FTDIChip CDM drivers.
16) Enable the function generator. Configure the signal
source to generate a 1kHz, 1V
with +500mV offset.
sinusoidal wave
P-P
17) In the Calibration group, select Self Offset/Gain in
the drop-down list and then click Calibrate.
18) Click on the Scope tab.
For Standalone mode:
19) Check the Remove DC checkbox to remove the DC
3) Verify that all jumpers are in their default positions for
the EV kit (Table 2).
component of the sampled data.
20) Click the Capture button to read sampled data from
4) Connect the PC to the EV kit using a micro-USB
cable.
the ADC.
21) The EV kit software appears as shown in Figure 4.
5) Connect the +12V adapter to the EV kit.
22) Verify the frequency is approximately 1kHz displayed
on the right. The scope graph has buttons in the
upper-right corner that allow zooming in to detail.
6) Start the EV kit software by opening its icon in the
Start | Programs menu. The EV kit software appears
as shown in Figure 1. Verify that the lower left status
bar indicates the EV kit hardware is Connected.
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Evaluates: MAX11214/MAX11216
MAX1121X Family Evaluation Kit
Table 1. ZedBoard Jumper Settings (Optional)
SHUNT
JUMPER
DESCRIPTION
POSITION
J18
JP11
JP10
JP9
1-2
2-3
1-2
1-2
2-3
2-3
—
VDDIO set for 3.3V
Boot from SD card
JP8
JP7
JP10
J12
—
SD card installed
J20
—
Connected to 12V wall adapter
SW8
Off
ZedBoard power switch, off while connecting boards
Table 2. MAX1121X EV Kit User Configuration Jumper Settings*
SHUNT
POSITION
JUMPER
J2 (Red)
J3 (Red)
J4 (Red)
J5 (Red)
DESCRIPTION
1-2
2-3*
1-2
Connects the +10V rail to test point +10VEXT for external power (op amp + supply)
Connects the +10V rail to LDO U2 (op amp + supply)
Connects the +15V rail to test point +15EXT for external power (powers U2)
Connects the +15V rail to isolation transformer (powers U2)
Set ADC DVDD to +3.3V
2-3*
1-2
2-3*
1-2*
2-3
Set ADC DVDD to +2.0V
Connect ADC AVSS to GND (unipolar mode – also set J8 for unipolar)
Connect ADC AVSS to -1.8V (bipolar mode – also set J8 for bipolar)
Apply an offset of ADC_REFP (2.5V default) to amplifier U24
Apply an offset of 2.5V to amplifier U24
1-2
J6 (Black)
J7 (Black)
2-3
Open*
1-2
No offset for amplifier U24
Apply an offset of ADC_REFP (2.5V default) to amplifier U27
Apply an offset of 2.5V to amplifier U27
2-3
Open*
1-2
No offset for amplifier U27
Connect ADC AVDD to +1.8V (bipolar mode)
J8 (Red)
2-3*
1-2*
Open
1-2
Connect ADC AVDD to 3.6V (unipolar mode)
Connects ZedBoard +12V to main power supply (U3). Diode D2 protects supplies.
Disconnects ZedBoard +12V from main power supply
Connects U5 input to GND
J15 (Red)
J17 (Red)
J18 (Red)
3-4
Connects U5 input to test point -15VEXT for external power
Connects U5 input to isolation transformer
5-6*
1-2
Do not connect
3-4
Do not connect
5-6
Connects U5 output to GND, which sets the reference for the -10V supply (op amp - supply)
Connects on-board FTDI chip to 3.3V, necessary for standalone mode
Disconnects on-board FTDI chip power. This jumper does not interfere with the ZedBoard.
Drive ADC REFP pin with on-board voltage reference
Drive ADC REFP pin with external voltage reference
1-2*
Open
1-2*
2-3
J20 (Red)
J21 (Black)
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Evaluates: MAX11214/MAX11216
MAX1121X Family Evaluation Kit
Table 2. MAX1121X EV Kit User Configuration Jumper Settings* (continued)
SHUNT
POSITION
JUMPER
J22 (Black)
J23 (Black)
J24 (Black)
DESCRIPTION
1-2
Ground test point CH_D-
Ground test point CH_D+
3-4
1-2*
2-3
Drive ADC REFN pin with on-board voltage reference
Drive ADC REFN pin with external voltage reference
Ground test point CH_C-
1-2
3-4
Ground test point CH_C+
1-2*
3-4
Connect output of U23 (CH_C) to U24 inverting input
Connect CH_D- to U24 inverting input
J25 (Black)
5-6
Connect output of U23 (CH_C) to U24 noninverting input
Connect CH_D+ to U24 noninverting input
7-8
Set both jumpers to align with silkscreen text “EXT” to drive ADC_INP and ADC_INN with
test points IN+ and IN- (also external connector J10 is on same net)
1-2*
3-4
5-6
7-8
Set both jumpers to align with silkscreen text “AMP” to drive ADC_INP and ADC_INN with U27 and
U24 amplifiers
J26, J27
(Black)
Set both jumpers to align with silkscreen text “DAC” to drive ADC_INP and ADC_INN with DAC_
OUT+ and DAC_OUT-
Set both jumpers to align with silkscreen text “REF” to drive ADC_INP and ADC_INN with ADC_
REFP and ADC_REFN voltage reference
9-10
1-2
ADC_INP to ADC_REF/2, ADC_INN to GND
Ground test point CH_A-
J28 (Black)
J29 (Black)
3-4
Ground test point CH_A+
1-2*
3-4
Connect output of U26 (CH_A) to U27 inverting input
Connect CH_B- to U27 inverting input
5-6
Connect output of U26 (CH_A) to U27 noninverting input
Connect CH_B+ to U27 noninverting input
7-8
1-2
Ground test point CH_B-
J30 (Black)
J36 (Black)
J37 (Red)
J40 (Black)
J44 (Black)
J45 (Black)
J46 (Red)
3-4
Ground test point CH_B+
1-2
Drive ADC CLK pin with signal from SMA connector J34
Drive ADC CLK pin with signal from on-board oscillator U20
Connect ADC to the DVDD voltage selection jumper J4
Attach amp meter between pins 1-2 to measure current consumed by ADC DVDD
Connect ADC RST to DVDD (normal operation)
Connect ADC RST to GND (reset state)
2-3*
1-2*
open
1-2*
2-3
1-2*
2-3
Sets U18 noninverting input to 0V. Gain = -1 with offset = 0. Drives DAC_OUT-.
Sets U18 noninverting input to 2.5V. Gain = -1 with offset = 2.5V. Drives DAC_OUT-.
Sets U17 noninverting input to 0V. Gain = -1 with offset = 0. Drives DAC_OUT+.
Sets U17 noninverting input to 2.5V. Gain = -1 with offset = 2.5V. Drives DAC_OUT+.
Enables main power supply (U3)
1-2*
2-3
1-2*
Open
Disables main power supply (U3)
*Red test points and red jumpers are used for power settings.
Black test points are used for ground points.
White test points are used for all signal points, black jumpers for signal settings.
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Evaluates: MAX11214/MAX11216
MAX1121X Family Evaluation Kit
Table 3. MAX1121X EV Kit User Off-Board Connectors
CONNECTOR
REFERENCE
DESIGNATOR
DESCRIPTION
J1
J9
USB connector for standalone mode
External reference input for EXT_REFP and EXT_REFN
External input for ADC IN+ and IN-
J10
External power connections, 12V. Both wall adapter and screw terminals are provided. When ZedBoard is
used, these connectors are not necessary if jumper J15 is installed.
J12, J16
J13
J14
External connections for AVDD and AVSS
External enable, driven by GPIO1 via FET
Serial EEPROM signal
J19
J31
Sync clock input, SMA
J32
PMOD A, connects to ADC, 12-pin connector
PMOD B, connects to DAC, 12-pin connector
External clock input, SMA
J33
J34
J35
DAC SPI port signal
J38, J41
J39
Sync clock out, SMA
ADC SPI port signal
J42
Split sync clock in, SMA
J43
FMC connector for use with ZedBoard
the Serial Interface block. When a setting is changed,
General Description of Software
the register associated with that setting is automatically
written. The Status Log at the bottom of the GUI shows
the value and register that was changed.
The main window of the EV kit software contains sev-
eral tabs: ADC Config, DAC Config, Function Generator,
Scope, DMM, Histogram, FFT, and ADC Registers. The
ADC Config tab and ADC Registers tab provide control
to communicate with the MAX1121X registers. The DAC
Config tab and Function Generator tab provide control to
communicate with the MAX542. The other four tabs are
used for evaluating the sample data read from the ADC.
The primary mode for calibration is using the drop-down
list to select a calibration mode, followed by clicking the
Calibrate button. The checkboxes for Self Offset, Self
Gain, System Offset, and System Gain allow for the
user to enable or disable the calibration values. The cali-
bration values can also be changed manually by entering
a hex value in the SPI numeric box.
ADC Config Tab
The ADC Config tab provides an interface for configur-
ing the IC from a functional perspective. The main block
provides for calibration, GPIO control, input path selec-
tion, data format, filtering, power, and clocking. To read
all the configuration settings, click the Read All button in
The Power block allows the user to put the part in a
power-down or standby state by selecting one of these
options in the drop-down list. The configuration set-
tings can be reset back to default by clicking the Reset
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Evaluates: MAX11214/MAX11216
MAX1121X Family Evaluation Kit
Registers button. For the Clock source selection, the IC
internal clock is always a valid option. If the external clock
is selected, a clock must be applied at the IC CLK pin by
setting jumper J36 to either SMA or OSC. Once the above
configurations are completed, start conversion by clicking
Convert in the Serial Interface block. To read the data
and status, click Read Data and Status on the lower right
of the GUI.
To save a configuration, select Save ADC Config As…
in the File menu. This saves all the ADC register values
to an XML file. To load a configuration, select Load ADC
Config in the File menu. When the XML file is loaded, all
the register values in the file are written to the ADC.
Figure 1. MAX1121X EV Kit Software (ADC Config Tab)
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MAX1121X Family Evaluation Kit
The voltage outputs are calculated based on the DAC
code and jumper offsets.
DAC Config Tab
In standalone mode, the ADC and DAC cannot oper-
ate concurrently. It is recommended to use FPGA
mode when using the DAC for function generation.
The DAC Config tab sheet provides an interface for
configuring the MAX542 to drive the DAC_OUT+ and
DAC_OUT- pins. Set J45 Offset and J44 Offset to match
the jumper positions on the EV Kit. These jumper posi-
tions apply DC offset to DAC_OUT+ and DAC_OUT-,
see the DAC amplifier section for more details. To write a
value to the DAC, select the output of interest in the drop-
down list, enter a value in the numeric box and then click
DAC Single Shot. The outputs on the right display the
voltage outputs and the decimal code written to the DAC.
The Calibration section of the DAC Config tab can be
used to calibrate the calculated voltages to be closer to
the measured voltages. Select which output to calibrate
with the radio buttons. Enter the maximum and minimum
voltage for this output in the Ideal (V) numeric boxes. Find
the measured voltages of the output for the maximum
and minimum values using the DAC Single Shot to set
the DAC output to the ideal voltages. Enter the measured
voltages in the Measured (V) numeric boxes and click
Calculate to find the new offset and gain. Check the
Enable Calibration to use these values to calculate the
voltage outputs.
Figure 2. MAX1121X EV Kit Software (DAC Config Tab)
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MAX1121X Family Evaluation Kit
Generate to find the DAC codes for the waveform and
generate the waveform on the DAC. The waveform codes
sent to the DAC is displayed on the graph. The Average,
RMS, Maximum, Minimum, and Peak to Peak are also
calculated and displayed on the right. To save the DAC
code waveform, go to Options > Save Graph > Function
Generator. This saves the settings on the left and the
data in the graph to a csv file.
Function Generator
When using the FPGA mode, the Function Generator
tab allows the user to generate a signal with the DAC.
Select the Number of Samples, DAC Update Rate, and
Signal Frequency. Click Calculate to get the Adjust
Frequency for the DAC signal needed for coherent sam-
pling. Then select the Signal Type, Amplitude, Phase, and
Offset to set up the waveform desired for the DAC. Click
Figure 3. MAX1121X EV Kit Software (Function Generator Tab)
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MAX1121X Family Evaluation Kit
form, such as Average, Standard Deviation, Maximum,
Minimum, and Fundamental Frequency. Figure 4 displays
the ADC data when a sinusoidal signal is applied at the
inputs on the EV kit.
Scope Tab
The Scope tab sheet is used to capture data and dis-
play it in the time domain. Sample Rate and Number
of Samples can also be set in this tab if they were not
appropriately adjusted in other tabs. The Display Unit
drop-down list allows counts and voltages. Once the
desired configuration is set, click on the Capture button.
The right side of the tab sheet displays details of the wave-
To save the captured data to a file, go to Options > Save
Graph > Scope. This saves the setting on the left and the
data captured to a csv file.
Figure 4. MAX1121X EV Kit Software (Scope Tab)
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MAX1121X Family Evaluation Kit
by the DMM tab when ADC_INP and ADC_INN (J26 and
J27 set as 7-8) are set to REF, see Table 2 for jumper
positions.
DMM Tab
The DMM tab sheet provides captured data as a digital
multimeter. Once the desired configuration is set, click on
the Capture button. Figure 5 displays the results shown
Figure 5. MAX1121X EV Kit Software (DMM Tab)
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MAX1121X Family Evaluation Kit
Noise, Effective Resolution, and Noise-Free Resolution.
To use this histogram feature, apply a DC voltage at the
input. Figure 5 displays the results shown by the DMM tab
when ADC_INP and ADC_INN are set to REF, see Table
2 for jumper positions.
Histogram Tab
The Histogram tab sheet is used to display a histogram of
the captured data. Sampling rate and number of samples
can also be set in this tab if they were not appropriately
adjusted in other tabs. Once the desired configuration is
set, click on the Capture button. The right side of the tab
sheet displays details of the histogram such as Average,
Standard Deviation, Maximum, Minimum, Peak-to-Peak
To save the histogram data to a file, go to Options > Save
Graph > Histogram. This saves the setting on the left
and the histogram data captured to a csv file.
Figure 6. MAX1121X EV Kit Software (Histogram Tab)
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MAX1121X Family Evaluation Kit
the tab displays the performance based on the FFT, such
as Fundamental Frequency, THD, SNR, SINAD, SFDR,
ENOB, and Noise Floor.
FFT Tab
The FFT tab sheet is used to display the frequency domain
FFT of the captured data. Sample Rate and Number of
Samples can also be set in this tab if they were not appro-
priately adjusted in other tabs. Once the desired configura-
tion is set, click on the Capture button. The right side of
To save the FFT data to a file, go to Options > Save
Graph > FFT. This saves the setting on the left and the
FFT data captured to a csv file.
Figure 7. MAX1121X EV Kit Software (FFT Tab)
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MAX1121X Family Evaluation Kit
The Command Byte is on the right side of the tab sheet.
This byte precedes all SPI transactions and is described
in the ADC data sheet. To send a command byte, enter a
hex value in the Numeric box and click the Send button.
The command byte has two different formats including
Conversion Mode and Register Access Mode. Select the
radio button for the desired mode to see the bit descrip-
tion in the table.
ADC Registers Tab
The ADC Registers tab sheet shows the ADC registers
on the left. The middle section shows the bits and bit
descriptions of the selected register. Click Read All to
read all registers and refresh the window with the register
settings. To write a register first, select the hex value in
the Value (Hex) column, type the desired hex value and
press Enter.
Figure 8. MAX1121X EV Kit Software (ADC Registers Tab)
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MAX1121X Family Evaluation Kit
User-Supplied AVDD
Detailed Description of Hardware
The AVDD supply is set to 3.6V or 1.8V by jumper J8.
For user-supplied AVDD, remove the jumper from J8 and
apply AVDD to the screw-terminals/testpoint at J13. Make
sure that this external supply has the correct relation to
system ground.
This EV kit provides a proven layout to demonstrate the
performance of the MAX1121X 24-bit delta-sigma ADC.
Included in the EV kit are digital isolators (MAX14934),
ultra-low-noise LDOs (MAX8842) to all supply pins of
the IC, an on-board reference (MAX6126), a precision
amplifier (MAX44241) for the analog inputs, 16-bit DAC
(MAX542) with precision amplifiers (MAX9632), and sync-
in and sync-out signals for coherent sampling.
Bipolar Powered vs. Unipolar Powered
The ADC supports both unipolar and bipolar ranges. For
unipolar mode, jumper J8 pins 2-3 to power AVDD with
3.6V and jumper J5 pins 1-2 to set AVSS to GND. For
bipolar mode, jumper J8 pins 1-2 to power AVDD with
1.8V and jumper J5 pins 2-3 to set AVSS to -1.8V.
An on-board controller is provided to allow for evaluation
in standalone mode, which has limitations on maximum
sample size and it cannot perform coherent sampling.
The EV kit can be used with FPGA mode to achieve larger
sample depth and coherent sampling.
External Clock
When the ADC is configured to use an external clock,
Jumper J36 pins 2-3 to select the on-board oscillator as
the clock source. Jumper J36 pins 1-2 to select the SMA
connector (and user-provided clock) as the clock source.
The ADC has several input options which are selected by
J26 and J27. The external option allows for wires attached
to the screw terminals at J10. The amplifier option allows
for signals at testpoints CH_A to CH_D. The DAC option
allows for inputs to be driven from an on-board DAC. The
REF options connect the inputs to the voltage reference
of the ADC.
GPIO
Testpoints are provided for the three GPIO signals from
the ADC, GPIO1, GPIO2, and GPIO3. The ADC Config
tab can configure these as input/output and read/drive the
GPIO pins. GPIO1 connects to a FET which allows J14.1
and TP2 to be connected to ground by driving GPIO1 high
(note that DVDD should be to 3.3V to drive the FET).
User-Supplied SPI
To evaluate the ADC on this EV kit with a user-supplied
SPI bus, disconnect from the FMC bus and remove
jumper J20. Apply the user-supplied SPI signals to SCLK,
CSB, DIN, and DOUT at the PMOD_A header (J32).
Make sure the return ground is connected to PMOD
ground. To communicate to the on-board DAC connect
the user-supplied SPI signals to CSB, SCLK, DIN, and
LDAC at the PMOD_B header (J33). Make sure the return
ground is connected to PMOD ground.
ADC Input Amplifiers
The input amplifiers allow for significant flexibility. The
amplifier input stage begins with testpoints labeled CH_A
to CH_D. Each set of testpoints has options to ground
either the inverting or noninverting inputs. The jumper
block J29 and J25 allow for bypassing the first stage of
amplifiers, or connecting the first stage to the second
stage. Jumper J7 can provide an offset of 2.5V to the
CH_A/CH_B signals – leave unpopulated to have an
offset of 0V. Similarly, jumper J6 can provide an offset of
2.5V to the CH_C/CH_D signals – leave unpopulated to
have an offset of 0V.
The on-board FTDI chip used for standalone mode does
not conflict with the user-supplied SPI if it is powered off
by removing jumper J20.
Caution: Do not plug this header into a standard PMOD
interface found on other FPGA or microcontroller prod-
ucts. The signal definition is unique to this EV kit.
DAC and DAC Amplifiers
In Figure 2, the GUI shows a functional diagram of the
DAC and DAC amplifiers. Here jumper J45 can be con-
nected to 2.5V to add a 2.5V offset to the DAC_OUT+
signal, and J44 can be connected to 2.5V to add 2.5V to
the DAC_OUT- signal.
User-Supplied Reference
For user-supplied reference voltage, set jumpers at J21
and J23 to positions 2-3 and apply external reference to
either J9 or to the EXT_REFN and EXT_REFP testpoints.
The value at DAC_OUT+ and DAC_OUT- are available to
drive to the ADC by use of jumpers J26 and J27.
User-Supplied AVSS
The AVSS supply is set to GND or -1.8V by Jumper J5.
For user-supplied AVSS, remove the jumper from J5 and
apply AVSS to the screw-terminals/testpoint at J13. Make
sure that this external supply has the correct relation to
system ground.
Also, please note that the DAC_OUT+ and DAC_OUT-
values shown by the GUI are only valid if the settings at
J44 and J45 are the same on both the PCB and the GUI.
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MAX1121X Family Evaluation Kit
IN+
CH_A-
-
J28
J29
2
4
1
3
1
3
2
4
MAX44241
J27
ADC_INP
-
1
3
2
4
6
+
MAX44241
5
7
6
8
CH_A+
DAC_OUT+
ADC_REFP
ADC_REF/2
5
7
9
+
8
10
ADC_REFP
CH_B-
CH_B+
J7
J30
1
2
4
3
+2.5V
MAX11214/MAX11216
Sigma-Delta ADC
IN-
CH_C-
CH_C+
-
J24
1
2
4
J25
1
2
3
MAX44241
J26
ADC_INN
-
1
2
4
3
4
3
+
MAX44241
5
7
6
8
DAC_OUT-
ADC_REFN
5
7
9
6
+
8
10
ADC_REFP
CH_D-
CH_D+
J6
J22
1
2
4
3
+2.5V
Figure 9. Analog Front-End
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Table 4. Analog Input Configurations (Ch A - D)
CONFIGURATION
SIGNAL-PATH INPUT
CONFIGURATION
INPUT CONNECTORS
JUMPER POSITIONS
No.
DESCRIPTION
J28: 3-4
J30: 3-4
J24: 3-4
J22: 3-4
J29: 1-2 and 7-8
J25: 1-2 and 7-8
J26: 3-4
Noninverting, differential,
second-order LPF
(default)
1
Channel A and C
Channel A and C
Channel B and D
Channel B and D
CH_A- and CH_C-
J27: 3-4
J7: 1-2 (for bipolar signal) or
Open for unipolar signal
J8: 1-2 (for bipolar signal) or
Open for unipolar signal
J28: 1-2
J30: 3-4
J24: 1-2
J22: 3-4
J29: 1-2 and 7-8
J25: 1-2 and 7-8
J26: 3-4
Inverting, differential,
second-order LPF
2
3
4
CH_A+ and CH_C+
CH_B+ and CH_D+
CH_B- and CH_D-
J27: 3-4
J7: 1-2 (for bipolar signal) or
Open for unipolar signal
J8: 1-2 (for bipolar signal) or
OPEN for unipolar signal
J28: 1-2 and 3-4
J30: 1-2
J24: 1-2 and 3-4
J22: 1-2
J29: 3-4 and 7-8
J25: 3-4 and 7-8
J26: 3-4
Noninverting, differential,
first-order LPF
J27: 3-4
J7: 1-2 (for bipolar signal) or
Open for unipolar signal
J8: 1-2 (for bipolar signal) or
Open for unipolar signal
J28: 1-2 and 3-4
J30: 3-4
J24: 1-2 and 3-4
J22: 3-4
J29: 3-4 and 7-8
J25: 3-4 and 7-8
J26: 3-4
Inverting, differential, first-
order LPF
J27: 3-4
J7: 1-2 (for bipolar signal) or
Open for unipolar signal
J8: 1-2 (for bipolar signal) or
Open for unipolar signal
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MAX1121X Family Evaluation Kit
Table 4. Analog Input Configurations (Ch A - D) (continued)
CONFIGURATION
DESCRIPTION
SIGNAL-PATH INPUT
CONFIGURATION
INPUT CONNECTORS
JUMPER POSITIONS
No.
J28: 1-2 and 3-4
J30: 1-2 and 3-4
J24: 1-2 and 3-4
J22: 1-2 and 3-4
J29: 3-4 and 7-8
J25: 3-4 and 7-8
J26: 1-2
5
External Inputs
User-supplied signals
IN+ and IN-
J27: 1-2
J7: Open
J8: Open
J28: 1-2 and 3-4
J30: 1-2 and 3-4
J24: 1-2 and 3-4
J22: 1-2 and 3-4
J29: 3-4 and 7-8
J25: 3-4 and 7-8
J26: 5-6
DAC output buffered with
MAX9632
DAC_OUT+ and DAC_
OUT-
6
DAC Output
J27: 5-6
J7: Open
J8: Open
J28: 1-2 and 3-4
J30: 1-2 and 3-4
J24: 1-2 and 3-4
J22: 1-2 and 3-4
J29: 3-4 and 7-8
J25: 3-4 and 7-8
J26: 7-8
Voltage reference input
to ADC from MAX6126 or
external source (see J21
and J23)
ADC_REFP and ADC_
REFN
7
ADC Voltage Reference
J27: 7-8
J7: Open
J8: Open
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MAX1121X Family Evaluation Kit
4
2
+ 3 . 3 V
+ 3 . 3 V
1
3
G N D 3
G N D S
4
I . C .
5
I . C .
8
3
1
1
3
5
3
4
2
1
3
1
3
D 4
B A T 5 4 S
1
3
2
1
P C C 0 2 S A A N
2
1
B A T 5 4 S
D 3
1
2
1
3
J 1 1
Figure 10a. MAX1121X EV Kit Schematic (Sheet 1 of 6)
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MAX1121X Family Evaluation Kit
1
8
5
7
4
1
3
1
8
7
5
4
1
8
1
3
5
7
4
I . C .
8
I . C .
5
N C
9
A G N D S
4
A G N D F
3
G N D S
4
1 4
G N D 3
D G N D
1 2
Figure 10b. MAX1121X EV Kit Schematic (Sheet 2 of 6)
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MAX1121X Family Evaluation Kit
A
K
1 0 K
1 0 K
1 0 K
1 0 K
1 0 K
1 0 K
1 0 K
1 0 K
2 2 B R
1 2 B R
0 2 B R
4 2 B R
3 1 B R
1 1 B R
8 B R
6 B R
O I C V C
O I C V C
O I C V C
O I C V C
6 5
2 4
1 3
0 2
D N G
D N G
D N G
D N G
D N G
D N G
D N G
D N G
1 5
7 4
5 3
5 2
5 1
1 1
5
1
E R O C V
E R O C V
E R O C V
4 6
7 3
2 1
L L V P
Y H V P
9
4
D N G A
0 1
6
2
2
1
6
7
8
9
0 1
1 1
Figure 10c. MAX1121X EV Kit Schematic (Sheet 3 of 6)
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MAX1121X Family Evaluation Kit
2
4
3
5
2
4
3
5
2
4
3
5
6
2
8
4
8
4
5
3
4
2
Figure 10d. MAX1121X EV Kit Schematic (Sheet 4 of 6)
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MAX1121X Family Evaluation Kit
3
2
1
3
1
3
+ 1 0 V
5
- 1 0 V
+ 1 0 V
5
- 1 0 V
2
2
+ 1 0 V
5
- 1 0 V
+ 1 0 V
5
- 1 0 V
2
2
Figure 10e. MAX1121X EV Kit Schematic (Sheet 5 of 6)
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MAX1121X Family Evaluation Kit
D S 2
A
K
1
3
3
3
7
7
3
7
4
4
4
0
R B 2 9
1
3
4
3
1
2
4
3
1
2
3
7
5
2
5
2
8
4
D S 1
K
A
E P
1 1
V D D 2
V D D 1
2
1
G N D 2
9
G N D 1
7
3
7
5
2
5
2
4
2
1
J 1 2
Figure 10f. MAX1121X EV Kit Schematic (Sheet 6 of 6)
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MAX1121X Family Evaluation Kit
Figure 11. MAX1121X EV Kit Component Placement Guide—Top Side
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MAX1121X Family Evaluation Kit
Figure 12. MAX1121X EV Kit PCB Layout—Layer 1
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MAX1121X Family Evaluation Kit
Figure 13. MAX1121X EV Kit PCB Layout—Layer 2
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MAX1121X Family Evaluation Kit
Figure 14. MAX1121X EV Kit PCB Layout—Layer 3
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MAX1121X Family Evaluation Kit
Figure 15. MAX1121X EV Kit PCB Layout—Layer 4
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MAX1121X Family Evaluation Kit
Figure 16. MAX1121X EV Kit PCB Layout—Layer 5
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MAX1121X Family Evaluation Kit
Figure 17. MAX1121X EV Kit PCB Layout—Layer 6
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MAX1121X Family Evaluation Kit
Figure 18. MAX1121X EV Kit Component Placement Guide—Bottom Side
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Component List
Refer to file “evkit_bom_max1121X_evkit_a.csv” attached
to this data sheet for component information.
Ordering Information
PART
TYPE
EVKIT
EVKIT
MAX11214EVKIT#
MAX11216EVKIT#
#Denotes RoHS compliant.
Maxim Integrated
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Evaluates: MAX11214/MAX11216
MAX1121X Family Evaluation Kit
Revision History
REVISION REVISION
PAGES
CHANGED
DESCRIPTION
NUMBER
DATE
0
4/15
Initial release
—
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim Integrated’s website at www.maximintegrated.com.
Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent licenses
are implied. Maxim Integrated reserves the right to change the circuitry and specifications without notice at any time.
©
Maxim Integrated and the Maxim Integrated logo are trademarks of Maxim Integrated Products, Inc.
2015 Maxim Integrated Products, Inc.
│ 34
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