MAX12930EASA+ [MAXIM]
Two-Channel, Low-Power, 3kVRMS and 5kVRMS Digital Isolators;
| 型号： | MAX12930EASA+ |
| 厂家： | 
MAXIM INTEGRATED PRODUCTS |
| 描述： | Two-Channel, Low-Power, 3kVRMS and 5kVRMS Digital Isolators |
| 文件： | 总24页 (文件大小：1313K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
EVALUATION KIT AVAILABLE
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MAX12930/MAX12931
Two-Channel, Low-Power,
3kV
and 5kV
Digital Isolators
RMS
RMS
General Description
The MAX12930/MAX12931 are a family of 2-channel,
Benefits and Features
● Robust Galvanic Isolation of Digital Signals
3kV/5kV
digital galvanic isolators using Maxim’s
• Withstands 5kV
for 60s (V ) Wide-Body
ISO
RMS
RMS
proprietary process technology. These devices transfer
digital signals between circuits with different power domains
while using as little as 0.65mW per channel at 1Mbps with 1.8V.
• Withstands 3kV
• Continuously Withstands 848V
Body
• Continuously Withstands 445V
Narrow-Body
• Withstands ±10kV Surge Between GNDA and
GNDB with 1.2/50µs Waveform
for 60s (V
) Narrow-Body
RMS
ISO
(V
) Wide-
)
RMS IOWM
(V
RMS IOWM
The two channels of the MAX12931 transfer data in
opposite directions, and this makes the MAX12931 ideal
for isolating the TX and RX lines of a transceiver. The
MAX12930 features two channels transferring data in the
same direction.
• High CMTI (50kV/µs, typ)
● Options to Support a Broad Range of Applications
• 2 Data Rates (25Mbps/150Mbps)
• 2 Channel Direction Configurations
• 2 Output Default States (High or Low)
● Low Power Consumption
Both devices are available with a maximum data rate
of either 25Mbps or 150Mbps and with the default
outputs that are either high or low. The default is
the state the output assumes when the input is not
powered, or if the input is open-circuit. See the
Ordering Information and Product Selector Guide for
suffixes associated with each option. Independent 1.71V
to 5.5V supplies on each side of the isolator also make
the devices suitable for use as level translators.
• 1.3mW per Channel at 1Mbps with V
= 3.3V
DD
• 3.3mW per Channel at 100Mbps with V
= 1.8V
DD
Safety Regulatory Approvals
(see Safety Regulatory Approvals)
● UL According to UL1577
● cUL According to CSA Bulletin 5A
● VDE 0884-11 Basic Insulation (Narrow SOIC)
The MAX12930/MAX12931 are available in an 8-pin,
narrow-body SOIC package. In addition, the MAX12931
is available in a 16-pin, wide-body SOIC package. The
package material of the 8-pin narrow-body SOIC package
has a minimum comparative tracking index (CTI) of 400V,
which gives it a group II rating in creepage tables. The
package material of the 16-pin wide-body SOIC package
has a CTI of 600V, which gives it a group I rating in creep-
age tables. All devices are rated for operation at ambient
temperatures of -40°C to +125°C.
Applications
● Fieldbus Communications for Industrial Automation
● Isolated RS232, RS-485/RS-422, CAN
● General Isolation Application
● Battery Management
● Medical Systems
Ordering Information and Product Selector Guide appear at
end of data sheet.
Functional Diagrams
MAX12930
MAX12931
V
V
V
V
DDB
DDA
IN1
DDB
DDA
OUT1
OUT1
IN1
OUT2
GNDB
OUT2
GNDB
IN2
IN2
GNDA
GNDA
19-8563; Rev 9; 11/20
MAX12930/MAX12931
Two-Channel, Low-Power,
and 5kV Digital Isolators
3kV
RMS
RMS
Absolute Maximum Ratings
V
to GNDA........................................................-0.3V to +6V
Continuous Power Dissipation (T = +70°C)
A
DDA
V
to GNDB........................................................-0.3V to +6V
Wide SOIC (derate 14.1mW/°C above +70°C) ......1126.8mW
Narrow SOIC (derate 5.79mW/°C above +70°C)...462.96mW
Operating Temperature Range......................... -40°C to +125°C
Maximum Junction Temperature .....................................+150°C
Storage Temperature Range............................ -60°C to +150°C
Soldering Temperature (reflow).......................................+260°C
DDB
IN_ on Side A to GNDA...........................................-0.3V to +6V
IN_ on Side B to GNDB ..........................................-0.3V to +6V
OUT_ on Side A to GNDA........................ -0.3V to V
OUT_ on Side B to GNDB ....................... -0.3V to V
Short-Circuit Duration
+ 0.3V
+ 0.3V
DDA
DDB
OUT_ on Side A to GNDA,
OUT_ on Side B to GNDB.....................................Continuous
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these
or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect
device reliability.
Package Information
PACKAGE TYPE: 8 NARROW SOIC
Package Code
S8MS-22
21-0041
90-0096
Outline Number
Land Pattern Number
THERMAL RESISTANCE, FOUR-LAYER BOARD
Junction to Ambient (θ
)
172.8°C/W
67.6°C/W
JA
Junction to Case (θ
)
JC
PACKAGE TYPE: 16 WIDE SOIC
Package Code
W16MS-11
21-0042
Outline Number
Land Pattern Number
90-0107
THERMAL RESISTANCE, FOUR-LAYER BOARD
Junction to Ambient (θ
)
71°C/W
23°C/W
JA
Junction to Case (θ
)
JC
For the latest package outline information and land patterns (footprints), go to www.maximintegrated.com/packages. Note that a “+”,
“#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing
pertains to the package regardless of RoHS status.
Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer board.
For detailed information on package thermal considerations, refer to www.maximintegrated.com/thermal-tutorial.
Maxim Integrated
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MAX12930/MAX12931
Two-Channel, Low-Power,
and 5kV Digital Isolators
3kV
RMS
RMS
DC Electrical Characteristics
(V
- V
= 1.71V to 5.5V, V
- V
= 1.71V to 5.5V, C = 15pF, T = -40°C to +125°C, unless otherwise noted. Typical
DDA
GNDA
DDB
GNDB L A
values are at V
- V
= 3.3V, V
- V
= 3.3V, GNDA = GNDB, T = 25°C, unless otherwise noted.) (Note 1)
DDA
GNDA
DDB
GNDB A
PARAMETER
POWER SUPPLY
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
V
V
Relative to GNDA
Relative to GNDB
_ rising
1.71
1.71
5.5
5.5
DDA
Supply Voltage
V
DDB
Undervoltage-Lockout
Threshold
Undervoltage-Lockout
Threshold Hysteresis
V
V
1.5
1.6
45
1.66
V
UVLO_
DD
V
mV
UVLO_HYST
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
= 5V
0.32
0.31
0.3
0.58
0.54
0.53
0.39
1.26
1.20
1.18
1.01
3.00
2.91
2.88
2.62
0.83
0.79
0.76
0.67
1.83
1.40
1.22
1.00
4.99
3.39
2.69
2.04
DDA
DDA
DDA
DDA
DDA
DDA
DDA
DDA
DDA
DDA
DDA
DDA
DDB
DDB
DDB
DDB
DDB
DDB
DDB
DDB
DDB
DDB
DDB
DDB
= 3.3V
= 2.5V
= 1.8V
= 5V
1MHz square
wave, C = 0pF
L
0.29
0.81
0.8
12.5MHz square
wave, C = 0pF
L
= 3.3V
= 2.5V
= 1.8V
= 5V
I
mA
DDA
0.78
0.77
2.15
2.09
2.06
2
50MHz square
wave, C = 0pF
L
= 3.3V
= 2.5V
= 1.8V
= 5V
Supply Current (MAX12930_)
(Note 2)
0.5
= 3.3V
= 2.5V
= 1.8V
= 5V
0.47
0.45
0.4
1MHz square
wave, C = 0pF
L
1.37
1.02
0.87
0.71
4.21
2.81
2.21
1.69
12.5MHz square
wave, C = 0pF
L
= 3.3V
= 2.5V
= 1.8V
= 5V
I
mA
DDB
50MHz square
= 3.3V
= 2.5V
= 1.8V
wave, C = 0pF
L
Maxim Integrated
│ 3
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MAX12930/MAX12931
Two-Channel, Low-Power,
and 5kV Digital Isolators
3kV
RMS
RMS
DC Electrical Characteristics (continued)
(V
- V
= 1.71V to 5.5V, V
- V
= 1.71V to 5.5V, C = 15pF, T = -40°C to +125°C, unless otherwise noted. Typical
DDA
GNDA
DDB
GNDB L A
values are at V
- V
= 3.3V, V
- V
= 3.3V, GNDA = GNDB, T = 25°C, unless otherwise noted.) (Note 1)
DDA
GNDA
DDB
GNDB A
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
0.42
0.39
0.38
0.36
1.07
0.89
0.81
0.73
3.06
2.37
2.08
1.82
0.42
MAX
0.70
0.67
0.64
0.56
1.52
1.29
1.19
1.03
3.87
3.06
2.72
2.33
0.70
UNITS
V
= 5V
DDA
V
= 3.3V
= 2.5V
= 1.8V
= 5V
1MHz square
wave, C = 0pF
L
DDA
DDA
DDA
DDA
DDA
DDA
DDA
DDA
DDA
DDA
DDA
DDB
V
V
V
V
V
V
V
V
V
V
V
12.5MHz square
wave, C = 0pF
L
= 3.3V
= 2.5V
= 1.8V
= 5V
I
mA
DDA
50MHz square
wave, C = 0pF
L
= 3.3V
= 2.5V
= 1.8V
= 5V
Supply Current (MAX12931_)
(Note 2)
V
V
V
V
V
V
V
V
V
V
V
= 3.3V
= 2.5V
= 1.8V
= 5V
0.39
0.38
0.36
1.07
0.89
0.81
0.73
3.06
2.37
2.08
1.82
0.67
0.64
0.56
1.52
1.29
1.19
1.03
3.87
3.06
2.72
2.33
DDB
DDB
DDB
DDB
DDB
DDB
DDB
DDB
DDB
DDB
DDB
1MHz square
wave, C = 0pF
L
12.5MHz square
wave, C = 0pF
L
= 3.3V
= 2.5V
= 1.8V
= 5V
mA
I
DDB
50MHz square
= 3.3V
= 2.5V
= 1.8V
wave, C = 0pF
L
LOGIC INPUTS AND OUTPUTS
2.25V ≤ V
1.71V ≤ V
2.25V ≤ V
≤ 5.5V
0.7 x V
DD_
DD_
DD_
DD_
Input High Voltage
V
V
V
IH
< 2.25V
≤ 5.5V
0.75 x V
DD_
0.8
0.7
Input Low Voltage
Input Hysteresis
V
IL
1.71V ≤ V
< 2.25V
DD_
MAX1293_B/E
MAX1293_C/F
410
80
-5
5
V
mV
HYS
Input Pullup Current (Note 3)
Input Pulldown Current (Note 3)
Input Capacitance
I
IN_, MAX1293_B/C
IN_, MAX1293_E/F
-10
1.5
-1.5
10
µA
µA
pF
PU
PD
I
C
IN_, f
= 1MHz
2
IN
SW
Maxim Integrated
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MAX12930/MAX12931
Two-Channel, Low-Power,
and 5kV Digital Isolators
3kV
RMS
RMS
DC Electrical Characteristics (continued)
(V
- V
= 1.71V to 5.5V, V
- V
= 1.71V to 5.5V, C = 15pF, T = -40°C to +125°C, unless otherwise noted. Typical
DDA
GNDA
DDB
GNDB L A
values are at V
- V
= 3.3V, V
- V
= 3.3V, GNDA = GNDB, T = 25°C, unless otherwise noted.) (Note 1)
DDA
GNDA
DDB
GNDB A
PARAMETER
SYMBOL
CONDITIONS
= 4mA source
MIN
TYP
MAX
UNITS
Output Voltage High (Note 3)
Output Voltage Low (Note 3)
V
I
I
V - 0.4
DD_
V
V
OH
OUT
OUT
V
= 4mA sink
0.4
OL
Dynamic Characteristics MAX1293_B/E
(V
- V
= 1.71V to 5.5V, V
- V
= 1.71V to 5.5V, C = 15pF, T = -40°C to +125°C, unless otherwise noted. Typical
DDA
GNDA
DDB
GNDB L A
values are at V
- V
= 3.3V, V
- V
= 3.3V, GNDA = GNDB, T = 25°C, unless otherwise noted.) (Notes 1, 2)
DDA
GNDA
DDB
GNDB A
PARAMETER
SYMBOL
CONDITIONS
IN_ = GND_ or V _ (Note 4)
MIN
TYP
MAX
UNITS
Common-Mode Transient
Immunity
50
CMTI
kV/µs
DD
Maximum Data Rate
Minimum Pulse Width
Glitch Rejection
DR
25
Mbps
ns
MAX
PW
40
MIN
ns
10
17
29
4.5V ≤ V
3.0V ≤ V
≤ 5.5V
≤ 3.6V
≤ 2.75V
17.4
17.6
18.3
20.7
16.9
17.2
17.8
19.8
23.9
24.4
25.8
29.6
23.4
24.2
25.4
29.3
0.4
32.5
33.7
36.7
43.5
33.6
35.1
38.2
45.8
4
DD_
DD_
t
PLH
2.25V ≤ V
1.71V ≤ V
4.5V ≤ V
DD_
≤ 1.89V
DD_
Propagation Delay
(Figure 1)
ns
ns
ns
≤ 5.5V
≤ 3.6V
≤ 2.75V
DD_
3.0V ≤ V
DD_
t
PHL
2.25V ≤ V
DD_
1.71V ≤ V
≤ 1.89V
DD_
Pulse Width Distortion
PWD
4.5V ≤ V
≤ 5.5V
≤ 3.6V
≤ 2.75V
15.1
15
DD_
3.0V ≤ V
DD_
t
SPLH
2.25V ≤ V
1.71V ≤ V
4.5V ≤ V
15.4
20.5
13.9
14.2
16
DD_
≤ 1.89V
DD_
Propagation Delay Skew
Part-to-Part (same channel)
≤ 5.5V
≤ 3.6V
≤ 2.75V
DD_
3.0V ≤ V
DD_
t
SPHL
2.25V ≤ V
DD_
1.71V ≤ V
≤ 1.89V
21.8
DD_
t
2
2
Propagation Delay Skew Chan-
nel-to-Channel (Same Direction)
MAX12930 only
SCSLH
ns
t
SCSHL
Maxim Integrated
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MAX12930/MAX12931
Two-Channel, Low-Power,
and 5kV Digital Isolators
3kV
RMS
RMS
Dynamic Characteristics MAX1293_B/E (continued)
(V
- V
= 1.71V to 5.5V, V
- V
= 1.71V to 5.5V, C = 15pF, T = -40°C to +125°C, unless otherwise noted. Typical
DDA
GNDA
DDB
GNDB L A
values are at V
- V
= 3.3V, V
- V
= 3.3V, GNDA = GNDB, T = 25°C, unless otherwise noted.) (Notes 1, 2)
DDA
GNDA
DDB
GNDB A
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
ns
Propagation Delay Skew
Channel-to-Channel
(Opposite Direction)
MAX12931 Only
t
2
SCOLH
t
2
SCOHL
Peak Eye Diagram Jitter
T
25Mbps
4.5V ≤ V
3.0V ≤ V
250
ps
JIT(PK)
≤ 5.5V
≤ 3.6V
1.6
2.2
3
DD_
DD_
Rise Time
(Figure 1)
t
ns
ns
R
2.25V ≤ V
≤ 2.75V
≤ 1.89V
DD_
DD_
1.71V ≤ V
4.5
1.4
2
4.5V ≤ V
3.0V ≤ V
≤ 5.5V
≤ 3.6V
DD_
DD_
Fall Time
(Figure 1)
t
F
2.25V ≤ V
1.71V ≤ V
≤ 2.75V
≤ 1.89V
2.8
5.1
DD_
DD_
Maxim Integrated
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MAX12930/MAX12931
Two-Channel, Low-Power,
and 5kV Digital Isolators
3kV
RMS
RMS
Dynamic Characteristics MAX1293_C/F
(V
- V
= 1.71V to 5.5V, V
- V
= 1.71V to 5.5V, C = 15pF, T = -40°C to +125°C, unless otherwise noted. Typical
DDA
GNDA
DDB
GNDB L A
values are at V
- V
= 3.3V, V
- V
= 3.3V, GNDA = GNDB, T = 25°C, unless otherwise noted.) (Notes 2,3)
DDA
GNDA
DDB
GNDB A
PARAMETER
SYMBOL
CONDITIONS
IN_ = GND_ or V (Note 4)
MIN
150
TYP
50
MAX
UNITS
kV/μs
Mbps
Common-Mode Transient
Immunity
CMTI
DD_
Maximum Data Rate
DR
MAX
2.25V ≤ V _ ≤ 5.5V
5
DD
Minimum Pulse Width
PW
ns
MIN
1.71V ≤ V _ ≤ 1.89V
6.67
9.2
10.2
13.4
20.3
9.4
10.5
14.1
21.7
2
DD
4.5V ≤ V _ ≤ 5.5V
4.1
4.2
4.9
7.1
4.3
4.4
5.1
7.2
5.4
5.9
DD
3.0V ≤ V _ ≤ 3.6V
DD
t
PLH
2.25V ≤ V _ ≤ 2.75V
7.1
DD
1.71V ≤ V _ ≤ 1.89V
10.9
5.6
DD
Propagation Delay
(Figure 1)
ns
ns
ns
4.5V ≤ V _ ≤ 5.5V
DD
3.0V ≤ V _ ≤ 3.6V
6.2
DD
t
PHL
2.25V ≤ V _ ≤ 2.75V
7.3
DD
1.71V ≤ V _ ≤ 1.89V
10.9
0.3
DD
Pulse Width Distortion
PWD
4.5V ≤ V
3.0V ≤ V
≤ 5.5V
≤ 3.6V
≤ 2.75V
3.7
4.3
6
DD_
DD_
t
SPLH
2.25V ≤ V
1.71V ≤ V
4.5V ≤ V
DD_
≤ 1.89V
10.3
3.8
4.7
6.5
11.5
2
DD_
Propagation Delay Skew
Part-to-Part (Same Channel)
≤ 5.5V
≤ 3.6V
≤ 2.75V
DD_
3.0V ≤ V
DD_
t
SPHL
2.25V ≤ V
DD_
1.71V ≤ V
≤ 1.89V
DD_
Propagation Delay Skew
Channel-to-Channel (Same
Direction) MAX12930 Only
t
t
SCSLH
SCSHL
SCOLH
ns
ns
2
Propagation Delay Skew
Channel-to-Channel (Opposite
Direction) MAX12931 Only
t
t
2
2
SCOHL
Peak Eye Diagram Jitter
Clock Jitter RMS
t
150Mbps
90
ps
ps
JIT(PK)
500kHz Clock Input Rising/Falling
Edges
t
6.5
JCLK(RMS)
Maxim Integrated
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MAX12930/MAX12931
Two-Channel, Low-Power,
and 5kV Digital Isolators
3kV
RMS
RMS
Dynamic Characteristics MAX1293_C/F (continued)
(V
- V
= 1.71V to 5.5V, V
- V
= 1.71V to 5.5V, C = 15pF, T = -40°C to +125°C, unless otherwise noted. Typical
DDA
GNDA
DDB
GNDB L A
values are at V
- V
= 3.3V, V
- V
= 3.3V, GNDA = GNDB, T = 25°C, unless otherwise noted.) (Notes 2,3)
DDA
GNDA
DDB
GNDB A
PARAMETER
SYMBOL
CONDITIONS
≤ 5.5V
MIN
TYP
MAX
1.6
2.2
3
UNITS
4.5V ≤ V
3.0V ≤ V
DD_
DD_
≤ 3.6V
Rise Time
(Figure 1)
t
ns
R
2.25V ≤ V
1.71V ≤ V
≤ 2.75V
≤ 1.89V
DD_
DD_
4.5
1.4
2
4.5V ≤ V
3.0V ≤ V
≤ 5.5V
≤ 3.6V
DD_
DD_
Fall Time
(Figure 1)
t
ns
F
2.25V ≤ V
≤ 2.75V
≤ 1.89V
2.8
5.1
DD_
DD_
1.71V ≤ V
Note 1: All devices are 100% production tested at T = +25°C. Specifications over temperature are guaranteed by design.
A
Note 2: Not production tested. Guaranteed by design and characterization.
Note 3: All currents into the device are positive. All currents out of the device are negative. All voltages are referenced to their
respective ground (GNDA or GNDB), unless otherwise noted.
Note 4: CMTI is the maximum sustainable common-mode voltage slew rate while maintaining the correct output. CMTI applies to
both rising and falling common-mode voltage sedges. Tested with the transient generator connected between GNDA and
GNDB (V
= 1000V).
CM
ESD Protection
PARAMETER
ESD
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Human Body Model, all pins
±3
kV
MAX12930
MAX12931
Figure 1. Test Circuit (A) and Timing Diagram (B)
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MAX12930/MAX12931
Two-Channel, Low-Power,
and 5kV Digital Isolators
3kV
RMS
RMS
Safety Regulatory Approvals
UL
The MAX12930–MAX12931 narrow-body SOIC are certified under UL1577. For more details, refer to file E351759.
Rated up to 3000V isolation voltage for single protection.
RMS
cUL (Equivalent to CSA Notice 5A)
The MAX12930–MAX12931 narrow-body SOIC are certified up to 3000V
for single protection. For more details, refer to file E351759.
RMS
UL
The MAX12931 wide-body SOIC is certified under UL1577. For more details, refer to file E351759.
Rated up to 5000V isolation voltage for single protection.
RMS
cUL (Equivalent to CSA notice 5A)
The MAX12931 wide-body SOIC is certified up to 5000V
for single protection. For more details, refer to file E351759.
RMS
VDE
The MAX12930–MAX12931 narrow-body SOIC are certified to DIN VDE V 0884-11: 2017-01
Basic Insulation, Maximum Transient Isolation Voltage 4200V , Maximum Repetitive Peak Isolation Voltage 630V
PK
.
PK
For details, see file ref. 5015017-4880-0001/272147/TL7/SCT.
This coupler is suitable for “safe electrical insulation” only within the safety ratings. Compliance with the safety ratings shall be
ensured by means of suitable protective circuits.
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MAX12930/MAX12931
Two-Channel, Low-Power,
and 5kV Digital Isolators
3kV
RMS
RMS
Insulation Characteristics
Table 1. Narrow SOIC Insulation Characteristic
PARAMETER
SYMBOL
CONDITIONS
VALUE
1182
UNITS
Method B1 = V x 1.875
IORM
Partial Discharge Test Voltage
V
V
V
PR
P
P
(t = 1s, partial discharge < 5pC)
Maximum Repetitive Peak Isolation
Voltage
V
(Note 5)
630
445
IORM
IOWM
Maximum Working Isolation
Voltage
Continuous RMS voltage
(Note 5)
V
V
V
RMS
Maximum Transient Isolation
Voltage
V
t = 1s (Note 5)
4200
3000
5000
V
P
IOTM
Maximum Withstand Isolation
Voltage
V
f
= 60Hz, duration = 60s (Note 5, 6)
ISO
SW
RMS
Basic Insulation, 1.2/50µs pulse per
IEC 61000-4-5 (Note 5, 8)
Maximum Surge Isolation Voltage
V
V
P
IOSM
12
V
V
V
= 500V, T = 25°C
> 10
IO
A
11
9
Insulation Resistance
R
C
= 500V, 100°C ≤ T ≤ 125°C
> 10
Ω
IO
IO
IO
A
= 500V at T = 150°C
S
> 10
IO
Barrier Capacitance Side A to Side B
Minimum Creepage Distance
Minimum Clearance Distance
Internal Clearance
f
= 1MHz (Note 7)
2
4
pF
SW
CPG
CLR
Narrow SOIC
mm
mm
mm
Narrow SOIC
4
Distance through insulation
Material Group II (IEC 60112)
0.015
> 400
40/125/21
Comparative Tracking Index
Climate Category
CTI
Pollution Degree
(DIN VDE 0110, Table 1)
2
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MAX12930/MAX12931
Two-Channel, Low-Power,
and 5kV Digital Isolators
3kV
RMS
RMS
Table 2. Wide SOIC Insulation Characteristic
PARAMETER
SYMBOL
CONDITIONS
VALUE
2250
UNITS
Method B1 = V x 1.875
IORM
Partial Discharge Test Voltage
V
V
PR
P
P
(t = 1s, partial discharge < 5pC)
Maximum Repetitive Peak
Isolation Voltage
V
(Note 5)
1200
848
V
IORM
IOWM
Maximum Working Isolation
Voltage
Continuous RMS voltage
(Note 5)
V
V
V
RMS
Maximum Transient Isolation
Voltage
V
t = 1s (Note 5)
8400
5000
10000
V
P
IOTM
Maximum Withstand Isolation
Voltage
V
f
= 60Hz, duration = 60s (Note 5, 6)
SW
ISO
RMS
Basic Insulation, 1.2/50µs pulse per
IEC 61000-4-5 (Note 5, 8)
Maximum Surge Isolation Voltage
V
V
P
IOSM
12
V
V
V
= 500V, T = 25°C
> 10
IO
A
11
Insulation Resistance
R
C
= 500V, 100°C ≤ T ≤ 125°C
> 10
Ω
IO
IO
IO
A
9
= 500V at T = 150°C
S
> 10
IO
Barrier Capacitance Side A to Side B
Minimum Creepage Distance
Minimum Clearance Distance
Internal Clearance
f
= 1MHz (Note 7)
2
8
pF
SW
CPG
CLR
Wide SOIC
mm
mm
mm
Wide SOIC
8
Distance through insulation
Material Group I (IEC 60112)
0.015
>600
40/125/21
Comparative Tracking Index
Climate Category
CTI
Pollution Degree
(DIN VDE 0110, Table 1)
2
Note 5: V
Note 6: Product is qualified at V
Note 7: Capacitance is measured with all pins on side A and side B tied together.
Note 8: Devices are immersed in oil during surge characterization.
, V
, V
, V
, and V
IORM
are defined by the IEC 60747-5-5 standard.
for 60s and 100% production tested at 120% of V for 1s.
ISO
ISO IOTM IOSM IOWM
ISO
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MAX12930/MAX12931
Two-Channel, Low-Power,
and 5kV Digital Isolators
3kV
RMS
RMS
Figure 2 and Figure 3 show the thermal derating curves
for the safety power limiting of the devices and Figure 4
shows the thermal derating curve for the safety current
limiting of the devices. Ensure that the junction tempera-
ture does not exceed 150°C.
Safety Limits
Damage to the IC can result in a low-resistance path
to ground or to the supply and, without current limiting,
the MAX12930–MAX12931 could dissipate excessive
amounts of power. Excessive power dissipation can dam-
age the die and result in damage to the isolation barrier,
potentially causing downstream issues. Table 3 shows the
safety limits for the MAX12930–MAX12931.
THERMAL DERATING CURVE
FOR SAFETY POWER LIMITING
800
The maximum safety temperature (T ) for the device is
S
the 150°C maximum junction temperature specified in
the Absolute Maximum Ratings. The power dissipation
8 NARROW SOIC PACKAGE,
MULTILAYER BOARD
700
600
500
400
300
200
100
0
(P ) and junction-to-ambient thermal impedance (θ
)
JA
D
determine the junction temperature. Thermal imped-
ance values (θ and θ ) are available in the Package
JA
JC
Information section of the datasheet and power dissipa-
tion calculations are discussed in the Calculating Power
Dissipation section. Calculate the junction temperature
(T ) as:
J
T = T + (P x θ )
JA
0
25
50
75 100 125 150 175 200
J
A
D
AMBIENT TEMPERATURE (°C)
Figure 3. Thermal Derating Curve for Safety Power
Limiting—8 Narrow SOIC
THERMAL DERATING CURVE
FOR SAFETY CURRENT LIMITING
THERMAL DERATING CURVE
FOR SAFETY POWER LIMITING
350
1800
1600
1400
1200
1000
800
MULTILAYER BOARD
300
16 WIDE SOIC PACKAGE,
MULTILAYER BOARD
250
200
150
100
50
600
400
200
0
0
0
25
50
75 100 125 150 175 200
0
25
50
75 100 125 150 175 200
AMBIENT TEMPERATURE (°C)
AMBIENT TEMPERATURE (°C)
Figure 4. Thermal Derating Curve for Safety Current Limiting
Figure 2. Thermal Derating Curve for Safety Power
Limiting—16 Wide SOIC
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MAX12930/MAX12931
Two-Channel, Low-Power,
and 5kV Digital Isolators
3kV
RMS
RMS
Table 3. Safety Limiting Values for the MAX12930–MAX12931
PARAMETER
SYMBOL
TEST CONDITIONS
MAX
UNITS
Safety Current on Any Pin
(No Damage to Isolation Barrier)
I
T = 150°C, T = 25°C
300
mA
S
J
A
16 Wide SOIC
8 Narrow SOIC
1760
723
Total Safety Power Dissipation
Maximum Safety Temperature
P
T = 150°C, T = 25°C
mW
°C
S
J
A
T
150
S
Typical Operating Characteristics
(V
- V
= +3.3V, V
- V
= +3.3V, V
= V
, T = +25°C, unless otherwise noted.)
VDDA
GNDA
VDDB
GNDB
GNDA
GNDB A
SIDE A SUPPLY CURRENT
vs. DATA RATE
SIDE A SUPPLY CURRENT
vs. DATA RATE
SIDE A SUPPLY CURRENT
vs. DATA RATE
toc01
toc02
toc03
1.0
0.8
0.6
0.4
0.2
0.0
2.5
2.0
1.5
1.0
0.5
1.0
0.8
0.6
0.4
0.2
0.0
DRIVING ONE CHANNEL ON SIDE A
OTHER CHANNEL IS HIGH
MAX12930B/E
DRIVING ONE CHANNEL ON SIDE A
OTHER CHANNEL IS HIGH
MAX12930C/F
DRIVING ONE CHANNEL ON SIDE A
OTHER CHANNEL IS HIGH
MAX12931B/E
V
= 5.0V
= 3.3V
= 2.5V
= 1.8V
V
V
V
V
= 5.0V
V
= 5.0V
= 3.3V
= 2.5V
= 1.8V
DDA
DDA
DDA
DDA
DDA
DDA
V
V
V
= 3.3V
= 2.5V
= 1.8V
V
V
V
DDA
DDA
DDA
DDA
DDA
DDA
0.0
0
0
5
10
15
20
25
25
50
75
100
125
150
0
5
10
15
20
25
DATA RATE (Mbps)
DATA RATE (Mbps)
DATA RATE (Mbps)
SIDE A SUPPLY CURRENT
vs. DATA RATE
toc04
toc05
toc06
2.5
2.0
1.5
1.0
0.5
0.0
1.0
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
DRIVING ONE CHANNEL ON SIDE A
OTHER CHANNEL IS HIGH
MAX12931C/F
DRIVING ONE CHANNEL ON SIDE A
= 0pF, OTHER CHANNEL IS HIGH,
MAX12930B/E
DRIVING ONE CHANNEL ON SIDE A
C = 15pF, OTHER CHANNEL IS HIGH,
L
C
L
MAX12930B/E
0.8
0.6
0.4
0.2
0.0
V
= 5.0V
= 3.3V
= 2.5V
= 1.8V
V
= 5.0V
= 3.3V
= 2.5V
= 1.8V
DDA
DDB
DDB
DDB
DDB
V
= 5.0V
= 3.3V
= 2.5V
= 1.8V
DDB
DDB
DDB
DDB
V
V
V
V
V
V
DDA
DDA
DDA
V
V
V
0
25
50
75
100
125
150
0
5
10
15
20
25
0
5
10
15
20
25
DATA RATE (Mbps)
DATA RATE (Mbps)
DATA RATE (Mbps)
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MAX12930/MAX12931
Two-Channel, Low-Power,
3kV
and 5kV
Digital Isolators
RMS
RMS
Typical Operating Characteristics (continued)
(V
- V
= +3.3V, V
- V
= +3.3V, V
= V , T = +25°C, unless otherwise noted.)
GNDB A
VDDA
GNDA
VDDB
GNDB
GNDA
toc07
toc08
toc09
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
8.0
7.0
6.0
5.0
4.0
3.0
2.0
1.0
1.0
DRIVING ONE CHANNEL ON SIDE A
DRIVING ONE CHANNEL ON SIDE A
DRIVING ONE CHANNEL ON SIDE A
C = 0pF, OTHER CHANNEL IS HIGH
L
MAX12931B/E
C = 0pF, OTHER CHANNEL IS HIGH,
C = 15pF, OTHER CHANNEL IS HIGH,
L
L
MAX12930C/F
MAX12930C/F
0.8
0.6
0.4
0.2
0.0
V
V
V
V
= 5.0V
= 3.3V
= 2.5V
= 1.8V
V
V
V
V
= 5.0V
= 3.3V
= 2.5V
= 1.8V
DDB
DDB
DDB
DDB
DDB
DDB
DDB
DDB
VDDB = 5.0V
VDDB = 3.3V
VDDB = 2.5V
VDDB = 1.8V
0.0
0
0
25
50
75
100
125
150
25
50
75
100
125
150
0
5
10
15
20
25
DATA RATE (Mbps)
DATA RATE (Mbps)
DATA RATE (Mbps)
toc10
toc11
toc12
2.500
2.000
1.500
1.000
0.500
0.000
3.0
2.5
2.0
1.5
1.0
0.5
8.0
DRIVING ONE CHANNEL ON SIDE A
CL = 0pF, OTHER CHANNEL IS HIGH
MAX12931C/F
DRIVING ONE CHANNEL ON SIDE A
DRIVING ONE CHANNEL ON SIDE A
CL = 15pF, OTHER CHANNEL IS HIGH
MAX12931B/E
7.0 CL = 15pF, OTHER CHANNEL IS HIGH
MAX12931C/F
6.0
VDDB = 5.0V
VDDB = 3.3V
VDDB = 2.5V
VDDB = 1.8V
VDDB = 5.0V
VDDB = 3.3V
VDDB = 2.5V
VDDB = 1.8V
VDDB = 5.0V
VDDB = 3.3V
VDDB = 2.5V
VDDB = 1.8V
5.0
4.0
3.0
2.0
1.0
0.0
0.0
0
0
5
10
15
20
25
25
50
75
100
125
150
0
25
50
75
100
125
150
DATA RATE (Mbps)
DATA RATE (Mbps)
DATA RATE (Mbps)
PROPAGATION DELAY
PROPAGATION DELAY
vs. TEMPERATURE
PROPAGATION DELAY
vs. TEMPERATURE
vs. V
VOLTAGE
DDA
toc13
toc14
toc15
15.0
12.0
9.0
35
30
25
20
35.0
30.0
25.0
20.0
15.0
10.0
5.0
V
= V
DDB
VDDA = VDDB
INA TO OUTB
MAX1293_C/F
DDA
V
= 3.3V
DDB
INA TO OUTB,
MAX1293_B/E
INA TO OUTB
MAX1293_B/E
6.0
MAX1293_C/F
VDDA = 1.8V
VDDA = 2.5V
VDDA = 3.3V
VDDA = 5.5V
VDDA = 1.8V
VDDA = 2.5V
VDDA = 3.3V
VDDA = 5.5V
3.0
15
0.0
0.0
-50
-25
0
25
50
75
100 125
-50
-25
0
25
50
75
100 125
1.5
2.5
3.5
4.5
5.5
TEMPERATURE (°C)
TEMPERATURE (°C)
V
VOLTAGE (V)
DDA
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MAX12930/MAX12931
Two-Channel, Low-Power,
and 5kV Digital Isolators
3kV
RMS
RMS
Typical Operating Characteristics (continued)
(V
- V
= +3.3V, V
- V
= +3.3V, V
= V
, T = +25°C, unless otherwise noted.)
VDDA
GNDA
VDDB
GNDB
GNDA
GNDB A
PROPAGATION DELAY
vs. VDDB VOLTAGE
MINIMUM PULSE WIDTH
toc16
toc17
toc18
35.0
30.0
25.0
20.0
15.0
10.0
5.0
MAX1293_B/E
40ns pulse
V
= 3.3V
INA TO OUTB
MAX1293_C/F
5ns pulse
DDA
IN__
IN__
1V
1V
1V/div
1V/div
MAX1293_B/E
MAX1293_C/F
OUT__
OUT__
0.0
5ns/div
1.5
2.5
3.5
4.5
5.5
20ns/div
V
VOLTAGE (V)
DDB
CLOCKJITTER RMS ON RISING EDGE
MAX1293_C/F
CLOCKJITTER RMS ON FALLING EDGE
MAX1293_C/F
EYE DIAGRAM at 150Mbps
MAX12931C/F
toc19
toc20
toc21
500kHz Clock Input
tJCLK(RMS) = 6.5ps
500kHz Clock Input
tJCLK(RMS) = 6.3ps
400mV/div
OUT_
OUT_
400mV/div
400mV/div
1ns/div
125ps/div
125ps/div
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MAX12930/MAX12931
Two-Channel, Low-Power,
3kV
and 5kV
Digital Isolators
RMS
RMS
Pin Configurations
TOP VIEW
+
+
1
2
3
4
8
7
6
5
1
2
3
4
8
7
6
5
V
V
V
V
DDB
DDA
IN1
DDB
DDA
MAX12930
MAX12931
OUT1
OUT2
GNDB
OUT1
IN2
IN1
IN2
OUT2
GNDB
GNDA
GNDA
NARROW SOIC
NARROW SOIC
+
GNDA
N.C.
1
2
3
4
5
6
7
8
16
15
14
GNDB
N.C.
MAX12931
V
V
DDB
DDA
OUT1
IN2
13
12
11
10
9
IN1
OUT2
N.C.
N.C.
GNDA
N.C.
N.C.
GNDB
WIDE SOIC
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MAX12930/MAX12931
Two-Channel, Low-Power,
3kV
and 5kV
Digital Isolators
RMS
RMS
Pin Description
PIN
NAME
FUNCTION
REFERENCE
MAX12930
MAX12931
MAX12931
8-PIN SOIC 8-PIN SOIC
16-PIN SOIC
Power Supply for side A. Bypass V
with
DDA
1
1
3
V
GNDA
DDA
a 0.1µF ceramic capacitor to GNDA.
Logic input for channel 1
Logic output of channel 1
Logic input for channel 2
Ground reference for side A
Ground reference for side B
Logic output of channel 2
Logic output of channel 1
Logic input for channel 1
2
—
3
—
2
—
4
IN1
OUT1
IN2
GNDA
GNDA
GNDA
—
3
5
4
4
1, 7
9, 16
12
GNDA
GNDB
OUT2
OUT1
IN1
5
5
—
6
6
GNDB
GNDB
GNDB
7
—
7
—
—
13
Power Supply for side B. Bypass V
a 0.1µF ceramic capacitor to GNDB.
with
DDB
8
8
14
V
GNDB
—
DDB
—
—
2, 6, 8, 10, 11, 15
N.C.
Not internally connected
Typical Application Circuits
2.5V
3.3V
0.1µF
0.1µF
MICRO
CONTROLLER
TRANSCEIVER
MAX12931
V
V
V
V
DD
DD
DDA
DDB
A
B
RX
OUT1
IN1
RXD
Y
Z
TXD
TX
OUT2
GNDB
IN2
GND
GNDA
GND
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MAX12930/MAX12931
Two-Channel, Low-Power,
and 5kV Digital Isolators
3kV
RMS
RMS
in the narrow SOIC package and up to 1200V
continuous isolation is supported in the wide SOIC pack-
age. The devices withstand differences of up to 3kV
of
PEAK
Detailed Description
The MAX12930/MAX12931 are a family of 2-channel
digital isolators. The MAX12930 transfers digital signals
between circuits with different power domain in one
direction, which is convenient for applications such as
digital I/O. The MAX12931 transfers digital signals in
opposite directions, which is necessary for isolated
RS-485 or other UART applications.
RMS
in the
in the 8-pin narrow SOIC package or 5kV
RMS
16-pin wide SOIC package for up to 60 seconds.
Level-Shifting
The wide supply voltage range of both V
and V
DDB
DDA
allows the MAX12930/MAX12931 family to be used for
Devices available in the 8-pin narrow body SOIC
level translation in addition to isolation. V and V
DDA
DDB
package are rated for up to 3kV
isolation voltage for
can be independently set to any voltage from 1.71V to
5.5V. The supply voltage sets the logic level on the
corresponding side of the isolator.
RMS
60 seconds and the device in the 16-pin wide body SOIC
package is rated for up to 5kV . This family of digital
RMS
isolators offers low-power operation, high electromagnetic
interference (EMI) immunity, and stable temperature
performance through Maxim’s proprietary process technology.
The devices isolate different ground domains and block
high-voltage/high-current transients from sensitive or
human interface circuitry.
Unidirectional Channels
Each channel of the MAX12930/MAX12931 is
unidirectional; it only passes data in one direction, as
indicated in the functional diagram. Each device features
two unidirectional channels that operate independently
with guaranteed data rates from DC up to 25Mbps (B/E
versions), or DC to 150Mbps (C/F versions). The output
driver of each channel is push-pull, eliminating the need
for pullup resistors. The outputs are able to drive both TTL
and CMOS logic inputs.
Devices are available with data rates from DC to 25Mbps
(B/E versions) or 150Mbps (C/F versions). Each device
can be ordered with default-high or default-low outputs.
The default is the state the output assumes when the
input is not powered, or if the input is open circuit.
Startup and Undervoltage-Lockout
The devices have two supply inputs (V
and V
)
DDB
DDA
that independently set the logic levels on either side of
device. V and V are referenced to GNDA and
GNDB, respectively. The MAX12930/MAX12931 family
also features a refresh circuit to ensure output accuracy
when an input remains in the same state indefinitely.
The V
and V
supplies are both internally
DDA
DDB
monitored for undervoltage conditions. Undervoltage
events can occur during power-up, power-down, or during
normal operation due to a sagging supply voltage. When
an undervoltage condition is detected on either supply, all
outputs go to their default states regardless of the state of
the inputs (Table 4). Figure 5 through Figure 8 show the
behavior of the outputs during power-up and power-down.
DDA
DDB
Digital Isolation
The device family provides galvanic isolation for digital
signals that are transmitted between two ground domains.
Up to 630V
of continuous isolation is supported
PEAK
Table 4. Output Behavior During Undervoltage Conditions
V
V
V
V
V
OUTB_
IN_
VDDA
VDDB
OUTA_
1
Powered
Powered
Powered
Powered
1
1
0
X
X
0
0
Undervoltage
Powered
Powered
Default
Default
Default
Default
Undervoltage
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MAX12930/MAX12931
Two-Channel, Low-Power,
3kV
and 5kV
Digital Isolators
RMS
RMS
MAX1293_B/Cꢀ
MAX1293_E/Fꢀ
INPUT SET TO HIGH
INPUT SET TO HIGH
VDDA
VDDB
VDDA
VDDB
2V/div
2V/div
OUT_A
OUT_B
OUT_A
OUT_B
200µs/div
200µs/div
Figure 5. Undervoltage Lockout Behavior (MAX1293_B/C High)
Figure 6. Undervoltage Lockout Behavior (MAX1293_B/C Low)
MAX1293_E/Fꢀ
MAX1293_E/Fꢀ
INPUT SET TO LOW
INPUT SET TO LOW
VDDA
VDDA
2V/div
2V/div
VDDB
VDDB
OUT_A
OUT_A
OUT_B
OUT_B
200µs/div
200µs/div
Figure 7. Undervoltage Lockout Behavior (MAX1293_E/F High)
Figure 8. Undervoltage Lockout Behavior (MAX1293_E/F Low)
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MAX12930/MAX12931
Two-Channel, Low-Power,
and 5kV Digital Isolators
3kV
RMS
RMS
I
= C × f
× V
CL
L
SW DD
Application Information
where,
Power-Supply Sequencing
The MAX12930/MAX12931 do not require special power
supply sequencing. The logic levels are set independently
I
= Current required to drive the capacitive load.
CL
C = Load capacitance on the isolator’s output pin.
L
on either side by V
and V
. Each supply can be
DDA
DDB
f
= Switching frequency (bits per second/2).
SW
present over the entire specified range regardless of the
level or presence of the other supply.
V
DD
= Supply voltage on the output side of the isolator.
Current into a resistive load depends on the load resistance,
the supply voltage and the average duty cycle of the data
waveform. The DC load current can be conservatively
estimated by assuming the output is always high.
Power-Supply Decoupling
To reduce ripple and the chance of introducing data
errors, bypass V
and V
with 0.1µF low-ESR
DDA
DDB
ceramic capacitors to GNDA and GNDB, respectively.
Place the bypass capacitors as close to the power supply
input pins as possible.
I
= V ÷ R
DD L
RL
where,
= Current required to drive the resistive load.
I
RL
Layout Considerations
V
DD
= Supply voltage on the output side of the isolator.
The PCB designer should follow some critical
recommendation in order to get the best performance
from the design.
R = Load resistance on the isolator’s output pin.
L
Example (shown in Figure 11): A MAX12931F is operating
with V
= 2.5V, V
= 3.3V, channel 1 operating at
● Keep the input/output traces as short as possible. To
DDA
DDB
100Mbps with a 15pF capacitive load, and channel 2
operating at 20Mbps with a 10pF capacitive load. Refer
keep signal paths low-inductance, avoid using vias.
● Have a solid ground plane underneath the high-
to Table 5 and Table 6 for V
calculation worksheets.
and V
supply current
DDA
DDB
speed signal layer.
● Keep the area underneath the MAX12930/MAX12931
free from ground and signal planes. Any galvanic or
metallic connection between the field-side and logic-
side defeats the isolation.
V
must supply:
DDA
Channel 1 is an output channel operating at 2.5V and
100Mbps, consuming 1.02mA, estimated from Figure 10.
Channel 2 is an input channel operating at 2.5V and
20Mbps, consuming 0.33mA, estimated from Figure 9.
Calculating Power Dissipation
The required current for a given supply (V
or V
)
DDB
I
on channel 1 for 15pF capacitor at 2.5V and 100Mbps
DDA
CL
can be estimated by summing the current required for
each channel. The supply current for a channel depends
on whether the channel is an input or an output, the channel’s
data rate, and the capacitive or resistive load if it is an
output. The typical current for an input or output at any
data rate can be estimated from the graphs in Figure 9
and Figure 10. Please note that the data in Figure 9
and Figure 10 are extrapolated from the supply current
measurements in a typical operating condition.
is 1.875mA.
Total current for side A = 1.02+ 0.33 + 1.875 = 3.225mA,
typical
V
must supply:
DDB
Channel 1 is an input channel operating at 3.3V and
100Mbps, consuming 1.13mA, estimated from Figure 9.
Channel 2 is an output channel operating at 3.3V and
20Mbps, consuming 0.42mA, estimated from Figure 10.
I
on channel 2 for 10pF capacitor at 3.3V and 20Mbps
CL
The total current for a single channel is the sum of the
“no load” current (shown in Figure 9 and Figure 10) which
is a function of Voltage and Data Rate, and the “load
current” which depends upon the type of load. Current
into a capacitive load is a function of the load capacitance,
the switching frequency, and the supply voltage.
is 0.33mA.
Total current for side B = 1.13 + 0.42 + 0.33 = 1.88mA,
typical
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Two-Channel, Low-Power,
and 5kV Digital Isolators
3kV
RMS
RMS
SUPPLY CURRENT PER INPUT CHANNEL
vs. DATA RATE
SUPPLY CURRENT PER OUTPUT CHANNEL
vs. DATA RATE
2.0
1.6
1.2
0.8
0.4
0.0
4.0
VDD_ = 1.8V
V
= 2.5V
DD_
V
= 3.3V
3.2
2.4
1.6
0.8
0.0
DD_
V
= 5.0V
DD_
CL = 0pF
VDD_ = 1.8V
VDD_ = 2.5V
VDD_ 3.3V
V
= 5.0V
DD_
0
25
50
75
100
125
150
0
25
50
75
100
125
150
DATA RATE (Mbps)
DATA RATE (Mbps)
Figure 9. Supply Current per Input Channel Versus Data Rate
Figure 10. Supply Current per Output Channel Versus Data Rate
2.5V
3.3V
V
V
DDB
DDA
MAX12931F
100Mbps
100Mbps
20Mbps
OUT1
IN1
15pF
20Mbps
IN2
OUT2
GNDB
10pF
GNDA
Figure 11. Example Circuit for Supply Current Calculation
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Two-Channel, Low-Power,
and 5kV Digital Isolators
3kV
RMS
RMS
Table 5. Side A Supply Current Calculation Worksheet
SIDE A
V
= 2.5V
DDA
FREQUENCY
(Mbps)
LOAD
TYPE
CHANNEL IN/OUT
LOAD
“NO LOAD” CURRENT (mA)
LOAD CURRENT (mA)
1
2
OUT
IN
100
20
Capacitive
15pF
1.02
0.33
2.5V x 50MHz x 15pF = 1.875mA
Total:
3.225mA
Table 6. Side B Supply Current Calculation Worksheet
SIDE B
V
= 3.3V
DDB
FREQUENCY
(Mbps)
LOAD
TYPE
CHANNEL IN/OUT
LOAD
“NO LOAD” CURRENT (mA)
LOAD CURRENT (mA)
1
2
IN
100
20
1.13
0.42
OUT
Capacitive
10pF
3.3V x 10MHz x 10pF = 0.33mA
1.88mA
Total:
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MAX12930/MAX12931
Two-Channel, Low-Power,
and 5kV Digital Isolators
3kV
RMS
RMS
Product Selector Guide
MAX1293
1
F A
S
A +
CHANNEL
CONFIGURATION
0: 2/0
MAX DATA RATE
DEVICE CONFIGURATION
1: 1/1
25 Mbps
150Mbps
MAXIMUM DATA RATE
DEFAULT OUTPUT
(SEE TABLE)
DEFAULT-HIGH OUTP UT
DEFAULT-LOW OUTPUT
B
E
C
F
TEMP RANGE: -40°C TO +125°C
PACKAGE
S: N SOIC
W: W SOIC
PINS
A: 8
E: 16
LEAD-FREE/RoHS COMPLIANT
Ordering Information
ISOLATION
VOLTAGE
CHANNEL
CONFIGURATION
DATA RATE DEFAULT
TEMP
RANGE
PIN-
PACKAGE
PART
(Mbps)
OUTPUT
(kV
)
RMS
MAX12930BASA+
MAX12930CASA+
MAX12930EASA+
MAX12930FASA+
MAX12931BASA+
MAX12931CASA+
MAX12931EASA+
MAX12931FASA+
MAX12931BAWE+
2/0
2/0
2/0
2/0
1/1
1/1
1/1
1/1
1/1
25
150
25
High
High
Low
Low
High
High
Low
Low
High
3
-40°C to 125°C
-40°C to 125°C
-40°C to 125°C
-40°C to 125°C
-40°C to 125°C
-40°C to 125°C
-40°C to 125°C
-40°C to 125°C
-40°C to 125°C
8 Narrow SOIC
8 Narrow SOIC
8 Narrow SOIC
8 Narrow SOIC
8 Narrow SOIC
8 Narrow SOIC
8 Narrow SOIC
8 Narrow SOIC
16 Wide SOIC
3
3
150
25
3
3
150
25
3
3
150
25
3
5
+Denotes a lead(Pb)-free/RoHS-compliant package.
Chip Information
PROCESS: BiCMOS
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Two-Channel, Low-Power,
3kV
and 5kV
Digital Isolators
RMS
RMS
Revision History
REVISION REVISION
PAGES
CHANGED
DESCRIPTION
NUMBER
DATE
0
6/16
Initial release
—
Added Safety Regulatory Approvals section, updated Absolute Maximum Rating,
Package Thermal Characteristics, and Electrical Characteristics sections, and
removed future product status from MAX12930FASA+ and MAX12931BASA+
1, 2, 5, 7–13,
15–19
1
3/17
2
3
8/17
Removed future asterisk from MAX12931FASA+ in Ordering Information table
Removed future asterisk from MAX12930BASA+ in Ordering Information table
21
21
10/17
Removed future asterisk from MAX12930EASA+ and MAX12931EASA+ in Ordering
Information table
4
5
6
11/18
3/19
8/19
21
Added “VDE 0884-10 Basic” under Safety Regulatory Approvals, and updated the
table. Updated Table 1 and Table 2
1, 8, 9, 10
1, 9, 10
Updated the General Description, Table 1, and Table 2; corrected subscripts in the
Benefits and Features section
7
8
10/19
11/19
Removed future product asterisk from MAX12930CASA+
Removed future product asterisk from MAX12931CASA+
21
21
Updated General Description, Safety Regulatory Approvals, Absolute Maximum
Ratings, Package Information, Dynamic Characteristics MAX1293_B/E,
Dynamic Characteristics MAX1293_C/F, Safety Regulatory Approvals, Insulation
Characteristics, Typical Operating Circuit, and Layout Considerations sections;
added Safety Limits and Product Selector Guide sections; added new Figure 2‒4
and renumbered subsequent figures; replaced Figure 9‒10; updated Tables 1 and 2;
added Table 3 and renumbered subsequent tables
1–2, 5–11,
15–21
9
11/20
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Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent licenses
are implied. Maxim Integrated reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and max limits)
shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance.
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