MAX12935BAWE+ [MAXIM]
Analog Circuit,;型号: | MAX12935BAWE+ |
厂家: | MAXIM INTEGRATED PRODUCTS |
描述: | Analog Circuit, 信息通信管理 光电二极管 |
文件: | 总20页 (文件大小:1103K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
EVALUATION KIT AVAILABLE
MAX12934/MAX12935
Two-Channel, Fast, Low-Power,
5kV
Digital Isolators
RMS
General Description
Benefits and Features
● Robust Galvanic Isolation for Fast Digital Signals
The MAX12934/MAX12935 are the fastest, lowest power,
2-channel digital galvanic isolators on the market today,
using Maxim’s proprietary process technology. These
devices transfer digital signals between circuits with
different power domains while using as little as 0.65mW
per channel at 1Mbps with a 1.8V supply.
• 200 Mbps Data Rate
• Withstands 5kV
for 60s (VISO)
RMS
• Continuously Withstands 848V
• Withstands ±10kV Surge Between GNDA and
(VIOWM)
RMS
GNDB with 1.2/50µs Waveform
• High CMTI (50kV/µs Typical)
The two channels of the MAX12935 transfer data in opposite
directions, making the MAX12935 ideal for isolating the
TX and RX lines of a transceiver. The two channels of the
MAX12934 transfer data in the same direction.
● Low Power Consumption
• 1.3mW per Channel at 2Mbps with V
• 3.3mW per Channel at 100Mbps with V
= 3.3V
DD
= 1.8V
DD
The MAX12934/MAX12935 have an isolation rating
● Options to Support a Broad Range of Applications
• 2 Data Rates (25Mbps/200Mbps)
of 5kV
for 60 seconds. Both devices are available with
RMS
a maximum data rate of either 25Mbps or 200Mbps
and with outputs that are either default-high or
default-low. The default is the state the output
assumes when the input is not powered or if the
input is open-circuit. See the Ordering Information for
suffixes associated with each option. Independent 1.71V
to 5.5V supplies on each side of the isolator also make
the devices suitable for use as level translators.
• 2 Channel Direction Configurations
• 2 Output Default States (High or Low)
Applications
● Fieldbus Communications for Industrial Automation
● Isolated RS232, RS-485/RS-422, CAN
● General Isolation Application
● Battery Management
● Medical Systems
The MAX12934/MAX12935 are available in a 16-pin,
wide-body SOIC package. The package material has a
minimum comparative tracking index (CTI) of 600V, which
gives it a group 1 rating in creepage tables. All devices
are rated for operation at ambient temperatures of -40°C
to +125°C.
Safety Regulatory Approvals
(see Safety Regulatory Approvals)
● UL According to UL1577
● cUL According to CSA Bulletin 5A
Ordering Information appears at end of data sheet.
Functional Diagrams
MAX12934
MAX12935
V
V
V
V
DDB
DDA
IN1
DDB
DDA
OUT1
OUT1
IN1
OUT2
GNDB
OUT2
GNDB
IN2
IN2
GNDA
GNDA
19-100137; Rev 0; 8/17
MAX12934/MAX12935
Two-Channel, Fast, Low-Power,
5kV Digital Isolators
RMS
Absolute Maximum Ratings
V
to GNDA........................................................-0.3V to +6V
Continuous Power Dissipation (T = +70°C)
A
DDA
V
to GNDB........................................................-0.3V to +6V
Wide SOIC (derate 14.1mW/°C above +70°C) ......1126.8mW
Operating Temperature Range......................... -40°C to +125°C
Maximum Junction Temperature .....................................+150°C
Storage Temperature Range............................ -60°C to +150°C
Soldering Temperature (reflow).......................................+260°C
DDB
IN_ on Side A to GNDA...........................................-0.3V to +6V
IN_ on Side B to GNDB ..........................................-0.3V to +6V
OUT_ on Side A to GNDA......................-0.3V to (V
OUT_ on Side B to GNDB .....................-0.3V to (V
Short-Circuit Duration
+ 0.3V)
+ 0.3V)
DDA
DDA
OUT_ on side A to GNDA,
OUT_ on side B to GNDB.........................................Continuous
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these
or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect
device reliability.
(Note 1)
Package Thermal Characteristics
Wide SOIC
Junction-to-Ambient Thermal Resistance (θ ) ..........71°C/W
JA
Junction-to-Case Thermal Resistance (θ )...............23°C/W
JC
Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer
board. For detailed information on package thermal considerations, refer to www.maximintegrated.com/thermal-tutorial.
DC Electrical Characteristics
(V
V
- V
- V
= 1.71V to 5.5V, V
- V
= 1.71V to 5.5V, T = -40°C to +125°C, unless otherwise noted. Typical values are at
DDA
DDA
GNDA
GNDA
DDB
GNDB A
= 3.3V, V
- V
= 3.3V, GNDA = GNDB, T = 25°C, unless otherwise noted.) (Note 2)
DDB
GNDB A
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
POWER SUPPLY
V
V
Relative to GNDA
Relative to GNDB
rising
1.71
1.71
5.5
5.5
DDA
Supply Voltage
V
DDB
Undervoltage-Lockout
Threshold
Undervoltage-Lockout
Threshold Hysteresis
V
V
1.5
1.6
45
1.66
V
UVLO_
DD_
V
mV
UVLO_HYST
Maxim Integrated
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MAX12934/MAX12935
Two-Channel, Fast, Low-Power,
5kV Digital Isolators
RMS
DC Electrical Characteristics (continued)
(V
V
- V
- V
= 1.71V to 5.5V, V
- V
= 1.71V to 5.5V, T = -40°C to +125°C, unless otherwise noted. Typical values are at
DDA
DDA
GNDA
GNDA
DDB
GNDB A
= 3.3V, V
- V
= 3.3V, GNDA = GNDB, T = 25°C, unless otherwise noted.) (Note 2)
DDB
GNDB A
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
0.32
0.31
0.3
MAX
0.58
0.54
0.53
0.39
1.26
1.20
1.18
1.01
3.00
2.91
2.88
2.62
0.83
0.79
0.76
0.67
1.83
1.40
1.22
1.00
4.99
3.39
2.69
2.04
UNITS
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
= 5V
DDA
DDA
DDA
DDA
DDA
DDA
DDA
DDA
DDA
DDA
DDA
DDA
DDB
DDB
DDB
DDB
DDB
DDB
DDB
DDB
DDB
DDB
DDB
DDB
= 3.3V
= 2.5V
= 1.8V
= 5V
1MHz square
wave, C = 0pF
L
0.29
0.81
0.8
12.5MHz square
wave, C = 0pF
L
= 3.3V
= 2.5V
= 1.8V
= 5V
I
mA
DDA
0.78
0.77
2.15
2.09
2.06
2
50MHz square
wave, C = 0pF
L
= 3.3V
= 2.5V
= 1.8V
= 5V
Supply Current (MAX12934_)
(Note 3)
0.5
= 3.3V
= 2.5V
= 1.8V
= 5V
0.47
0.45
0.4
1MHz square
wave, C = 0pF
L
1.37
1.02
0.87
0.71
4.21
2.81
2.21
1.69
12.5MHz square
wave, C = 0pF
L
= 3.3V
= 2.5V
= 1.8V
= 5V
I
mA
DDB
50MHz square
wave, C = 0pF
= 3.3V
= 2.5V
= 1.8V
L
Maxim Integrated
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MAX12934/MAX12935
Two-Channel, Fast, Low-Power,
5kV Digital Isolators
RMS
DC Electrical Characteristics (continued)
(V
V
- V
- V
= 1.71V to 5.5V, V
- V
= 1.71V to 5.5V, T = -40°C to +125°C, unless otherwise noted. Typical values are at
DDA
DDA
GNDA
GNDA
DDB
GNDB A
= 3.3V, V
- V
= 3.3V, GNDA = GNDB, T = 25°C, unless otherwise noted.) (Note 2)
DDB
GNDB A
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
0.42
0.39
0.38
0.36
1.07
0.89
0.81
0.73
3.06
2.37
2.08
1.82
0.42
MAX
0.70
0.67
0.64
0.56
1.52
1.29
1.19
1.03
3.87
3.06
2.72
2.33
0.70
UNITS
V
= 5V
DDA
V
= 3.3V
= 2.5V
= 1.8V
= 5V
1MHz square
DDA
wave, C = 0pF
L
V
V
V
V
V
V
V
V
V
V
V
DDA
DDA
DDA
DDA
DDA
DDA
DDA
DDA
DDA
DDA
DDB
12.5MHz square
wave, C = 0pF
L
= 3.3V
= 2.5V
= 1.8V
= 5V
I
mA
DDA
50MHz square
wave, C = 0pF
L
= 3.3V
= 2.5V
= 1.8V
= 5V
Supply Current (MAX12935_)
(Note 3)
V
V
V
V
V
V
V
V
V
V
V
= 3.3V
= 2.5V
= 1.8V
= 5V
0.39
0.38
0.36
1.07
0.89
0.81
0.73
3.06
2.37
2.08
1.82
0.67
0.64
0.56
1.52
1.29
1.19
1.03
3.87
3.06
2.72
2.33
DDB
DDB
DDB
DDB
DDB
DDB
DDB
DDB
DDB
DDB
DDB
1MHz square
wave, C = 0pF
L
12.5MHz square
wave, C = 0pF
L
= 3.3V
= 2.5V
= 1.8V
= 5V
mA
I
DDB
50MHz square
= 3.3V
= 2.5V
= 1.8V
wave, C = 0pF
L
LOGIC INPUTS AND OUTPUTS
2.25V ≤ V
1.71V ≤ V
2.25V ≤ V
1.71V ≤ V
≤ 5.5V
0.7 x V
DD_
DD_
DD_
DD_
DD_
Input High Voltage
V
V
V
IH
< 2.25V
≤ 5.5V
0.75 x V
DD_
0.8
0.7
Input Low Voltage
Input Hysteresis
V
IL
< 2.25V
MAX1293_B/E
MAX1293_C/F
410
80
-5
5
V
mV
HYS
Input Pullup Current (Note 4)
Input Pulldown Current (Note 4)
Input Capacitance
I
IN_, MAX1293_B/C
IN_, MAX1293_E/F
-10
1.5
-1.5
10
µA
µA
pF
PU
PD
I
C
IN_, f
= 1MHz
2
IN
SW
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MAX12934/MAX12935
Two-Channel, Fast, Low-Power,
5kV Digital Isolators
RMS
DC Electrical Characteristics (continued)
(V
V
- V
- V
= 1.71V to 5.5V, V
- V
= 1.71V to 5.5V, T = -40°C to +125°C, unless otherwise noted. Typical values are at
DDA
DDA
GNDA
GNDA
DDB
GNDB A
= 3.3V, V
- V
= 3.3V, GNDA = GNDB, T = 25°C, unless otherwise noted.) (Note 2)
DDB
GNDB A
PARAMETER
SYMBOL
CONDITIONS
= 4mA source
MIN
TYP
MAX
UNITS
Output Voltage High (Note 4)
Output Voltage Low (Note 4)
V
I
I
V
- 0.4
V
V
OH
OUT
OUT
DD_
V
= 4mA sink
0.4
OL
Dynamic Characteristics MAX1293_B/E
(V
- V
= 1.71V to 5.5V, V
- V
= 1.71V to 5.5V, C = 15pF, T = -40°C to +125°C, unless otherwise noted. Typical
DDA
GNDA
DDB
GNDB L A
values are at V
- V
= 3.3V, V
- V
= 3.3V, GNDA = GNDB, T = 25°C, unless otherwise noted.) (Note 3)
DDA
GNDA
DDB
GNDB A
PARAMETER
SYMBOL
CONDITIONS
IN_ = GND_ or V (Note 5)
MIN
TYP
MAX
UNITS
Common-Mode Transient Im-
munity
50
CMTI
kV/µs
DD_
Maximum Data Rate
Minimum Pulse Width
Glitch Rejection
DR
25
Mbps
ns
MAX
PW
40
MIN
ns
10
17
29
4.5V ≤ V
3.0V ≤ V
≤ 5.5V
17.4
17.6
18.3
20.7
16.9
17.2
17.8
19.8
23.9
24.4
25.8
29.6
23.4
24.2
25.4
29.3
0.4
32.5
33.7
36.7
43.5
33.6
35.1
38.2
45.8
4
DD_
≤ 3.6V
DD_
t
PLH
2.25V ≤ V
1.71V ≤ V
4.5V ≤ V
≤ 2.75V
DD_
≤ 1.89V
DD_
Propagation Delay
(Figure 1)
ns
ns
ns
≤ 5.5V
≤ 3.6V
≤ 2.75V
DD_
3.0V ≤ V
DD_
t
PHL
2.25V ≤ V
DD_
1.71V ≤ V
≤ 1.89V
DD_
Pulse Width Distortion
PWD
4.5V ≤ V
≤ 5.5V
≤ 3.6V
≤ 2.75V
15.1
15
DD_
3.0V ≤ V
DD_
t
SPLH
2.25V ≤ V
1.71V ≤ V
4.5V ≤ V
15.4
20.5
13.9
14.2
16
DD_
≤ 1.89V
DD_
Propagation Delay Skew
Part-to-Part (same channel)
≤ 5.5V
≤ 3.6V
≤ 2.75V
DD_
3.0V ≤ V
DD_
t
SPHL
2.25V ≤ V
DD_
1.71V ≤ V
≤ 1.89V
21.8
DD_
Propagation Delay Skew
Channel-to-Channel
(Same Direction)
t
2
2
SCSLH
ns
t
SCSHL
MAX12934 only
Maxim Integrated
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MAX12934/MAX12935
Two-Channel, Fast, Low-Power,
5kV Digital Isolators
RMS
Dynamic Characteristics MAX1293_B/E (continued)
(V
- V
= 1.71V to 5.5V, V
- V
= 1.71V to 5.5V, C = 15pF, T = -40°C to +125°C, unless otherwise noted. Typical
DDA
GNDA
DDB
GNDB L A
values are at V
- V
= 3.3V, V
- V
= 3.3V, GNDA = GNDB, T = 25°C, unless otherwise noted.) (Note 3)
DDA
GNDA
DDB
GNDB A
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
ns
t
2
SCOLH
Propagation Delay Skew
Channel-to-Channel
(Opposite Direction)
MAX12935 Only
t
2
SCOHL
Peak Eye Diagram Jitter
T
25Mbps
4.5V ≤ V
3.0V ≤ V
250
ps
JIT(PK)
≤ 5.5V
≤ 3.6V
1.6
2.2
3
DD_
DD_
Rise Time
t
ns
ns
R
2.25V ≤ V
1.71V ≤ V
≤ 2.75V
≤ 1.89V
DD_
DD_
4.5
1.4
2
4.5V ≤ V
3.0V ≤ V
≤ 5.5V
≤ 3.6V
DD_
DD_
Fall Time
t
F
2.25V ≤ V
≤ 2.75V
≤ 1.89V
2.8
5.1
DD_
DD_
1.71V ≤ V
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MAX12934/MAX12935
Two-Channel, Fast, Low-Power,
5kV Digital Isolators
RMS
Dynamic Characteristics MAX1293_C/F
(V
- V
= 1.71V to 5.5V, V
- V
= 1.71V to 5.5V, C = 15pF, T = -40°C to +125°C, unless otherwise noted. Typical
DDA
GNDA
DDB
GNDB L A
values are at V
- V
= 3.3V, V
- V
= 3.3V, GNDA = GNDB, T = 25°C, unless otherwise noted.) (Note 3)
DDA
GNDA
DDB
GNDB A
PARAMETER
SYMBOL
CONDITIONS
IN_ = GND_ or V (Note 5)
MIN
TYP
50
MAX
UNITS
Common-Mode Transient
Immunity
CMTI
kV/µs
DD_
2.25V ≤ V _ ≤ 5.5V
200
150
DD
Maximum Data Rate
Minimum Pulse Width
DR
Mbps
ns
MAX
1.71V ≤ V _ ≤ 1.89V
DD
2.25V ≤ V _ ≤ 5.5V
5
DD
PW
MIN
1.71V ≤ V _ ≤ 1.89V
6.67
9.2
10.2
13.4
20.3
9.4
10.5
14.1
21.7
2
DD
4.5V ≤ V _ ≤ 5.5V
4.1
4.2
4.9
7.1
4.3
4.4
5.1
7.2
5.4
5.9
DD
3.0V ≤ V _ ≤ 3.6V
DD
t
PLH
2.25V ≤ V _ ≤ 2.75V
7.1
DD
1.71V ≤ V _ ≤ 1.89V
10.9
5.6
DD
Propagation Delay
(Figure 1)
ns
ns
ns
4.5V ≤ V _ ≤ 5.5V
DD
3.0V ≤ V _ ≤ 3.6V
6.2
DD
t
PHL
2.25V ≤ V _ ≤ 2.75V
7.3
DD
1.71V ≤ V _ ≤ 1.89V
10.9
0.3
DD
Pulse Width Distortion
PWD
4.5V ≤ V
3.0V ≤ V
≤ 5.5V
≤ 3.6V
≤ 2.75V
3.7
4.3
6
DD_
DD_
t
SPLH
2.25V ≤ V
1.71V ≤ V
4.5V ≤ V
DD_
≤ 1.89V
10.3
3.8
4.7
6.5
11.5
2
DD_
Propagation Delay Skew
Part-to-Part (Same Channel)
≤ 5.5V
≤ 3.6V
≤ 2.75V
DD_
3.0V ≤ V
DD_
t
SPHL
2.25V ≤ V
DD_
1.71V ≤ V
≤ 1.89V
DD_
Propagation Delay Skew
Channel-to-Channel (Same
Direction) MAX12934 Only
t
t
SCSLH
SCSHL
SCOLH
ns
ns
2
Propagation Delay Skew
Channel-to-Channel (Opposite
Direction) MAX12935 Only
t
t
2
2
SCOHL
Peak Eye Diagram Jitter
Clock Jitter RMS
T
200Mbps
90
ps
ps
JIT(PK)
500kHz Clock Input Rising/Falling
Edges
T
6.5
JCLK(RMS)
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MAX12934/MAX12935
Two-Channel, Fast, Low-Power,
5kV Digital Isolators
RMS
Dynamic Characteristics MAX1293_C/F (continued)
(V
- V
= 1.71V to 5.5V, V
- V
= 1.71V to 5.5V, C = 15pF, T = -40°C to +125°C, unless otherwise noted. Typical
DDA
GNDA
DDB
GNDB L A
values are at V
- V
= 3.3V, V
- V
= 3.3V, GNDA = GNDB, T = 25°C, unless otherwise noted.) (Note 3)
DDA
GNDA
DDB
GNDB A
PARAMETER
SYMBOL
CONDITIONS
≤ 5.5V
MIN
TYP
MAX
1.6
2.2
3
UNITS
4.5V ≤ V
3.0V ≤ V
DD_
≤ 3.6V
DD_
Rise Time
t
ns
R
2.25V ≤ V
1.71V ≤ V
≤ 2.75V
≤ 1.89V
DD_
4.5
1.4
2
DD_
4.5V ≤ V
3.0V ≤ V
≤ 5.5V
≤ 3.6V
DD_
DD_
Fall Time
t
ns
F
2.25V ≤ V
≤ 2.75V
≤ 1.89V
2.8
5.1
DD_
DD_
1.71V ≤ V
Note 2: All devices are 100% production tested at T = +25°C. Specifications over temperature are guaranteed by design.
A
Note 3: Not production tested. Guaranteed by design and characterization.
Note 4: All currents into the device are positive. All currents out of the device are negative. All voltages are referenced to their
respective ground (GNDA or GNDB), unless otherwise noted.
Note 5: CMTI is the maximum sustainable common-mode voltage slew rate while maintaining the correct output. CMTI applies to
both rising and falling common-mode voltage edges. Tested with the transient generator connected between GNDA and
GNDB (V
= 1000V).
CM
ESD Protection
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
ESD
Human Body Model, all pins
±3
kV
Safety Regulatory Approvals
UL
The MAX12934–MAX12935 wide-body SOIC are certified under UL1577. For more details, refer to file E351759.
Rated up to 5000V isolation voltage for single protection.
RMS
cUL (Equivalent to CSA notice 5A)
The MAX12934/MAX12935 wide-body SOIC are certified up to 5000V
for single protection. For more details, refer to file E351759.
RMS
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MAX12934/MAX12935
Two-Channel, Fast, Low-Power,
5kV Digital Isolators
RMS
Table 1. Insulation Characteristics
PARAMETER
SYMBOL
CONDITIONS
Method B1 = V x 1.875
VALUE
2250
UNITS
IORM
Partial Discharge Test Voltage
V
V
PR
P
P
(t = 1s, partial discharge < 5pC)
Maximum Repetitive Peak
Isolation Voltage
V
(Note 6)
1200
848
V
IORM
IOWM
Maximum Working Isolation
Voltage
Continuous RMS voltage
(Note 6)
V
V
V
RMS
Maximum Transient Isolation
Voltage
V
t = 1s
8400
5000
10
V
P
IOTM
Maximum Withstand Isolation
Voltage
V
f
= 60Hz, duration = 60s (Note 7)
SW
ISO
RMS
Basic Insulation, 1.2/50µs pulse per
IEC61000-4-5
Maximum Surge Isolation Voltage
V
kV
IOSM
9
Insulation Resistance
R
V
= 500V
>10
Ω
S
IO
Barrier Capacitance Side A to Side B
Minimum Creepage Distance
Minimum Clearance Distance
Internal Clearance
CIO
CPG
CLR
f
= 1MHz (Note 8)
2
8
pF
SW
mm
mm
mm
8
Distance through insulation
Material Group I (IEC60112)
0.015
>600
40/125/21
Comparative Tracking Index
Climate Category
CTI
Pollution Degree
(DIN VDE 0110, Table 1)
2
Note 6: VISO, VIOWM and VIORM are defined by the IEC 60747-5-5 standard.
Note 7: Product is qualified at VISO for 60s and 100% production tested at 120% of VISO for 1s.
Note 8: Capacitance is measured with all pins on side A and side B tied together.
Maxim Integrated
│ 9
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MAX12934/MAX12935
Two-Channel, Fast, Low-Power,
5kV
Digital Isolators
RMS
V
DDA
50%
50%
0.1µF
0.1µF
GNDA
t
t
V
V
DDB
PLH
PHL
DDA
V
V
DDB
DDA
V
DDB
MAX12934
MAX12935
50%
50%
50Ω
GNDB
IN_
OUT_
C
L
t
TEST
SOURCE
SCSLH
90%
t
SCSHL
R
L
V
GNDA
GNDB
DDB
50%
10%
50%
GNDB
(A)
t
t
F
R
(B)
Figure 1. Test Circuit (A) and Timing Diagram (B)
Typical Operating Characteristics
(V
- V
= +3.3V, V
- V
= +3.3V, GNDA = GNDB, T = +25°C, unless otherwise noted.)
A
DDA
GNDA
DDB
GNDB
SIDE A SUPPLY CURRENT
SIDE A SUPPLY CURRENT
vs. DATA RATE
SIDE A SUPPLY CURRENT
vs. DATA RATE
vs. DATA RATE
toc01
toc02
toc03
1.0
2.5
2.0
1.5
1.0
0.5
0.0
1.0
0.8
0.6
0.4
0.2
0.0
DRIVING ONE CHANNEL ON SIDE A
OTHER CHANNEL IS HIGH
MAX12934C/F
DRIVING ONE CHANNEL ON SIDE A
OTHER CHANNEL IS HIGH
MAX12934B/E
DRIVING ONE CHANNEL ON SIDE A
OTHER CHANNEL IS HIGH
MAX12935B/E
0.8
0.6
0.4
0.2
0.0
VDDA = 5.0V
VDDA = 3.3V
VDDA = 2.5V
VDDA = 1.8V
V
V
V
V
= 5.0V
= 3.3V
= 2.5V
= 1.8V
V
V
V
V
= 5.0V
= 3.3V
= 2.5V
= 1.8V
DDA
DDA
DDA
DDA
DDA
DDA
DDA
DDA
0
25
50
75 100 125 150 175 200
DATA RATE (Mbps)
0
5
10
15
20
25
0
5
10
15
20
25
DATA RATE (Mbps)
DATA RATE (Mbps)
Maxim Integrated
│ 10
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MAX12934/MAX12935
Two-Channel, Fast, Low-Power,
5kV
Digital Isolators
RMS
Typical Operating Characteristics (continued)
(V
- V
= +3.3V, V
- V
= +3.3V, GNDA = GNDB, T = +25°C, unless otherwise noted.)
A
DDA
GNDA
DDB
GNDB
SIDE A SUPPLY CURRENT
vs. DATA RATE
toc04
toc05
toc06
2.5
1.0
0.8
0.6
0.4
0.2
0.0
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
DRIVING ONE CHANNEL ON SIDE A
OTHER CHANNEL IS HIGH
MAX12935C/F
DRIVING ONE CHANNEL ON SIDE A
= 0pF, OTHER CHANNEL IS HIGH,
MAX12934B/E
DRIVING ONE CHANNEL ON SIDE A
C = 15pF, OTHER CHANNEL IS HIGH,
L
C
L
MAX12934B/E
2.0
1.5
1.0
0.5
0.0
VDDA = 5.0V
VDDA = 3.3V
VDDA = 2.5V
VDDA = 1.8V
V
V
V
V
= 5.0V
= 3.3V
= 2.5V
= 1.8V
DDB
DDB
DDB
DDB
V
V
V
V
= 5.0V
= 3.3V
= 2.5V
= 1.8V
DDB
DDB
DDB
DDB
0
25
50
75 100 125 150 175 200
DATA RATE (Mbps)
0
5
10
15
20
25
0
5
10
15
20
25
DATA RATE (Mbps)
DATA RATE (Mbps)
SIDE B SUPPLY CURRENT
vs. DATA RATE
SIDE B SUPPLY CURRENT
vs. DATA RATE
toc07
toc08
toc09
1.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
12.0
10.0
8.0
DRIVING ONE CHANNEL ON SIDE A
CL=0pF, OTHER CHANNEL IS HIGH,
MAX12934C/F
DRIVING ONE CHANNEL ON SIDE A
CL=15pF, OTHER CHANNEL IS HIGH,
MAX12934C/F
DRIVING ONE CHANNEL ON SIDE A
= 0pF, OTHER CHANNEL IS HIGH
MAX12935B/E
C
L
0.8
0.6
0.4
0.2
0.0
VDDA = 5.0V
VDDA = 3.3V
VDDA = 2.5V
VDDA = 1.8V
VDDA = 5.0V
VDDA = 3.3V
VDDA = 2.5V
VDDA = 1.8V
6.0
4.0
VDDB = 5.0V
VDDB = 3.3V
VDDB = 2.5V
VDDB = 1.8V
2.0
0.0
0
5
10
15
20
25
0
25
50
75 100 125 150 175 200
DATA RATE (Mbps)
0
25
50
75 100 125 150 175 200
DATA RATE (Mbps)
DATA RATE (Mbps)
SIDE B SUPPLY CURRENT
vs. DATA RATE
SIDE B SUPPLY CURRENT
vs. DATA RATE
toc10
toc11
toc12
2.500
2.000
1.500
1.000
0.500
0.000
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
10.0
DRIVING ONE CHANNEL ON SIDE A
CL = 15pF, OTHER CHANNEL IS HIGH
MAX12935B/E
DRIVING ONE CHANNEL ON SIDE A
CL=0pF, OTHER CHANNEL IS HIGH
MAX12935C/F
DRIVING ONE CHANNEL ON SIDE A
CL=15pF, OTHER CHANNEL IS HIGH
MAX12935C/F
9.0
8.0
7.0
6.0
5.0
4.0
3.0
2.0
1.0
0.0
VDDB = 5.0V
VDDB = 3.3V
VDDB = 2.5V
VDDB = 1.8V
VDDA = 5.0V
VDDA = 3.3V
VDDA = 2.5V
VDDA = 1.8V
VDDA = 5.0V
VDDA = 3.3V
VDDA = 2.5V
VDDA = 1.8V
0
5
10
15
20
25
0
25
50
75 100 125 150 175 200
DATA RATE (Mbps)
0
25
50
75 100 125 150 175 200
DATA RATE (Mbps)
DATA RATE (Mbps)
Maxim Integrated
│ 11
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MAX12934/MAX12935
Two-Channel, Fast, Low-Power,
5kV Digital Isolators
RMS
Typical Operating Characteristics (continued)
(V
- V
= +3.3V, V
- V
= +3.3V, GNDA = GNDB, T = +25°C, unless otherwise noted.)
DDA
GNDA
DDB
GNDB A
PROPAGATION DELAY
vs. TEMPERATURE
PROPAGATION DELAY
vs. TEMPERATURE
PROPAGATIONDELAY
vs. VDDA VOLTAGE
toc13
toc14
toc15
15.0
35
30
25
20
15
35.0
30.0
25.0
20.0
15.0
10.0
5.0
V
= V
DDB
INA TO OUTB,
MAX1293_B/E
VDDA = VDDB
INA TO OUTB
MAX1293_C/F
DDA
VDDB = 3.3V
INA TO OUTB
12.0
9.0
6.0
3.0
0.0
MAX1293_B/E
MAX1293_C/F
VDDA = 1.8V
VDDA = 1.8V
VDDA = 2.5V
VDDA = 3.3V
VDDA = 5.5V
VDDA = 2.5V
VDDA = 3.3V
VDDA = 5.5V
0.0
-50
-25
0
25
50
75
100 125
-50
-25
0
25
50
75
100 125
1.5
2.5
3.5
4.5
5.5
TEMPERATURE (°C)
TEMPERATURE (°C)
VDDA VOLTAGE (V)
PROPAGATIONDELAY
vs. VDDB VOLTAGE
MINIMUM PULSE WIDTH
MINIMUM PULSE WIDTH
toc18
toc17
toc16
35.0
30.0
25.0
20.0
15.0
10.0
5.0
MAX1293_C/F
5ns PULSE
MAX1293_B/E
40ns pulse
VDDA = 3.3V
INA TO OUTB
IN__
IN__
1V/div
1V/div
1V/div
MAX1293_B/E
MAX1293_C/F
OUT__
OUT__
1V/div
0.0
5ns/div
20ns/div
1.5
2.5
3.5
4.5
5.5
VDDB VOLTAGE (V)
EYE DIAGRAM at 200Mbps
MAX1293_C/F
CLOCKJITTER RMS ON RISING EDGE
MAX1293_C/F
CLOCKJITTER RMS ON FALLING EDGE
MAX1293_C/F
toc19
toc20
toc21
VDDB = 3.6V
500kHz Clock Input
tJCLK(RMS) = 6.5ps
500kHz Clock Input
tJCLK(RMS) = 6.3ps
600mV/div
OUT_
400mV/div
OUT_
400mV/div
1ns/div
125ps/div
125ps/div
Maxim Integrated
│ 12
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MAX12934/MAX12935
Two-Channel, Fast, Low-Power,
5kV Digital Isolators
RMS
Pin Configurations
+
+
W-16
SOIC IC
MAX12934
W-16
SOIC IC
MAX12935
GNDA
1
GNDB
N.C.
GNDA
N.C.
GNDB
N.C.
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
N.C.
2
V
V
V
DDA
V
DDA
IN1
3
4
5
6
7
8
DDB
DDB
OUT1
OUT2
N.C.
OUT1
IN2
IN1
IN2
N.C.
OUT2
N.C.
N.C.
GNDA
N.C.
N.C.
GNDA
N.C.
N.C.
GNDB
GNDB
I
I
Pin Description
PIN
NAME
FUNCTION
Power Supply for side A. Bypass V
REFERENCE
MAX12934
MAX12935
with
DDA
3
3
V
GNDA
DDA
a 0.1µF ceramic capacitor to GNDA.
Logic input for channel 1
Logic output of channel 1
Logic input for channel 2
Ground reference for side A
Ground reference for side B
Logic output of channel 2
Logic output of channel 1
Logic input for channel 1
4
—
—
4
IN1
OUT1
IN2
GNDA
GNDA
GNDA
—
5
5
1, 7
9, 16
12
1, 7
9, 16
12
GNDA
GNDB
OUT2
OUT1
IN1
—
GNDB
GNDB
GNDB
13
—
—
13
Power Supply for side B. Bypass V
a 0.1µF ceramic capacitor to GNDB.
with
DDB
14
14
V
GNDB
—
DDB
2, 6, 8, 10, 11, 15
2, 6, 8, 10, 11, 15
N.C.
Not internally connected
Maxim Integrated
│ 13
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MAX12934/MAX12935
Two-Channel, Fast, Low-Power,
5kV Digital Isolators
RMS
Typical Operating Circuit
2.5V
3.3V
0.1µF
0.1µF
MICRO
CONTROLLER
TRANSCEIVER
MAX12935
V
V
V
V
DD
DD
DDA
DDB
A
B
RX
OUT1
IN1
RXD
Y
Z
TXD
TX
OUT2
GNDB
IN2
GND
GNDA
GND
The devices have two supply inputs (V
and V
)
DDB
DDA
Detailed Description
that independently set the logic levels on either side of
device. V and V are referenced to GNDA and
The MAX12934/MAX12935 are a family of 2-channel
digital isolators. The MAX12934 transfers digital signals
between circuits with different power domain in one
direction, which is convenient for applications such as
digital I/O. The MAX12935 transfers digital signals in
opposite directions, which is necessary for isolated
RS-485 or other UART applications.
DDA
DDB
GNDB, respectively. The MAX12934/MAX12935 family
also features a refresh circuit to ensure output accuracy
when an input remains in the same state indefinitely.
Digital Isolation
The device family provides galvanic isolation for digital
signals that are transmitted between two ground domains.
Devices are available in the 16-pin wide body SOIC
package and are rated for up to 5kV
isolation
The devices withstand differences of up to 5kV
for
RMS
RMS
voltage for 60 seconds. This family of digital isola-
tors offers low-power operation, high electromagnetic
interference (EMI) immunity, and stable temperature
performance through Maxim’s proprietary process technology.
The devices isolate different ground domains and block
high-voltage/high-current transients from sensitive or
human interface circuitry.
up to 60 seconds, and up to 1200V
isolation.
of continuous
PEAK
Level-Shifting
The wide supply voltage range of both V
allows the MAX12934/MAX12935 family to be used for
level translation in addition to isolation. V and V
can be independently set to any voltage from 1.71V to
5.5V. The supply voltage sets the logic level on the
corresponding side of the isolator.
and V
DDA
DDB
DDA
DDB
Devices are available with data rates from DC to 25Mbps
(B/E versions) or 200Mbps (C/F versions). Each device
can be ordered with default-high or default-low outputs.
The default is the state the output assumes when the
input is not powered or if the input is open circuit.
Maxim Integrated
│ 14
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MAX12934/MAX12935
Two-Channel, Fast, Low-Power,
5kV Digital Isolators
RMS
Unidirectional Channels
Startup and Undervoltage Lockout
Each channel of the MAX12934/MAX12935 is
unidirectional; it only passes data in one direction, as
indicated in the functional diagram. Each device features
two unidirectional channels that operate independently
with guaranteed data rates from DC up to 25Mbps (B/E
versions), or DC to 200Mbps (C/F versions). The output
driver of each channel is push-pull, eliminating the need
for pullup resistors. The outputs are able to drive both TTL
and CMOS logic inputs.
The V
and V
supplies are both internally
DDA
DDB
monitored for undervoltage conditions. Undervoltage
events can occur during power-up, power-down, or during
normal operation due to a sagging supply voltage. When
an undervoltage condition is detected on either supply, all
outputs go to their default states regardless of the state of
the inputs (Table 2). Figure 2 through Figure 5 show the
behavior of the outputs during power-up and power-down.
Table 2. Output Behavior During Undervoltage Conditions
V
V
V
V
V
OUTB_
IN_
VDDA
VDDB
OUTA_
1
Powered
Powered
Powered
Powered
1
1
0
X
X
0
0
Undervoltage
Powered
Powered
Default
Default
Default
Default
Undervoltage
VDDA
VDDB
VDDA
VDDB
2V/div
2V/div
OUT_A
OUT_B
OUT_A
OUT_B
200µs/div
200µs/div
Figure 2. Undervoltage Lockout Behavior (MAX1293_B/C High)
Figure 3. Undervoltage Lockout Behavior (MAX1293_B/C Low)
VDDA
VDDA
2V/div
2V/div
VDDB
VDDB
OUT_A
OUT_A
OUT_B
OUT_B
200µs/div
200µs/div
Figure 4. Undervoltage Lockout Behavior (MAX1293_E/F High)
Figure 5. Undervoltage Lockout Behavior (MAX1293_E/F Low)
Maxim Integrated
│ 15
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MAX12934/MAX12935
Two-Channel, Fast, Low-Power,
5kV Digital Isolators
RMS
I
= C × f
× V
CL
L
SW DD
Application Information
where
Power-Supply Sequencing
The MAX12934/MAX12935 do not require special power
supply sequencing. The logic levels are set independently
I
is the current required to drive the capacitive load.
C is the load capacitance on the isolator’s output pin.
CL
L
on either side by V
and V
. Each supply can be
f is the switching frequency (bits per second/2).
SW
DDA
DDB
present over the entire specified range regardless of the
level or presence of the other supply.
V
is the supply voltage on the output side of the isolator.
DD
Current into a resistive load depends on the load resistance,
the supply voltage and the average duty cycle of the data
waveform. The DC load current can be conservatively
estimated by assuming the output is always high.
Power-Supply Decoupling
To reduce ripple and the chance of introducing data
errors, bypass V
and V
with 0.1µF low-ESR
DDA
DDB
I
= V ÷ R
DD L
RL
ceramic capacitors to GNDA and GNDB, respectively.
Place the bypass capacitors as close to the power supply
input pins as possible.
where
is the current required to drive the resistive load.
I
RL
Layout Considerations
V
DD
is the supply voltage on the output side of the isolator.
The PCB designer should follow some critical
recommendation in order to get the best performance
from the design.
R is the load resistance on the isolator’s output pin.
L
Example (shown in Figure 8): A MAX12935F is operating
with V
= 2.5V, V
= 3.3V, channel 1 operating
DDA
DDB
● Keep the input/output traces as short as possible.
Avoid using vias to make low-inductance paths for
the signals.
at 100Mbps with a 15pF capacitive load, and channel 2
operating at 20Mbps with a 10pF capacitive load. Refer
to Table 3 and Table 4 for V
calculation worksheets.
and V
supply current
DDA
DDB
● Have a solid ground plane underneath the high-
speed signal layer.
V
must supply:
DDA
● Keep the area underneath the MAX12934/MAX12935
free from ground and signal planes. Any galvanic or
metallic connection between the field-side and logic-
side defeats the isolation.
Channel 1 is an output channel operating at 2.5V and
100Mbps, consuming 1.02mA, estimated from Figure 7.
Channel 2 is an input channel operating at 2.5V and
20Mbps, consuming 0.33mA, estimated from Figure 6.
I
on channel 1 for 15pF capacitor at 2.5V and 100Mbps
CL
Calculating Power Dissipation
is 1.875mA.
The required current for a given supply (V
or V
)
DDB
DDA
Total current for side A = 1.02 + 0.33 + 1.875 = 3.225mA,
can be estimated by summing the current required for
each channel. The supply current for a channel depends
on whether the channel is an input or an output, the channel’s
data rate, and the capacitive or resistive load if it is an
output. The typical current for an input or output at any
data rate can be estimated from the graphs in Figure
6 and Figure 7. Please note that the data in Figure 6
and Figure 7 are extrapolated from the supply current
measurements in a typical operating condition.
typical
V
must supply:
DDB
Channel 1 is an input channel operating at 3.3V and
100Mbps, consuming 1.13mA, estimated from Figure 6.
Channel 2 is an output channel operating at 3.3V and
20Mbps, consuming 0.42mA, estimated from Figure 7.
I
on channel 2 for 10pF capacitor at 3.3V and 20Mbps
CL
is 0.33mA.
The total current for a single channel is the sum of the
“no load” current (shown in Figure 6 and Figure 7) which
is a function of Voltage and Data Rate, and the “load
current” which depends upon the type of load. Current
into a capacitive load is a function of the load capacitance,
the switching frequency, and the supply voltage.
Total current for side B = 1.13 + 0.42 + 0.33 = 1.88mA,
typical
Maxim Integrated
│ 16
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MAX12934/MAX12935
Two-Channel, Fast, Low-Power,
5kV Digital Isolators
RMS
SIDE A SUPPLY CURRENT
SIDE B SUPPLY CURRENT
vs. DATA RATE
vs. DATA RATE
toc07
2.5
2.0
1.5
1.0
0.5
0.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
DRIVING ONE CHANNEL ON SIDE A
OTHER CHANNEL IS HIGH
MAX12935C/F
DRIVING ONE CHANNEL ON SIDE A
CL=0pF, OTHER CHANNEL IS HIGH,
MAX12934C/F
VDDA = 5.0V
VDDA = 3.3V
VDDA = 2.5V
VDDA = 1.8V
VDDA = 5.0V
VDDA = 3.3V
VDDA = 2.5V
VDDA = 1.8V
0
25
50
75
100
125
150
175
200
0
25
50
75
100
125
150
175
200
DATA RATE (Mbps)
DATA RATE (Mbps)
Figure 6. Supply Current per Input Channel Versus Data Rate
Figure 7. Supply Current per Output Channel Versus Data Rate
2.5V
3.3V
VDDA
VDDB
MAX12935F
100Mbps
100Mbps
OUT1
IN1
15pF
20Mbps
OUT2
20Mbps
IN2
10pF
GNDB
GNDA
Figure 8. Example Circuit for Supply Current Calculation
Maxim Integrated
│ 17
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MAX12934/MAX12935
Two-Channel, Fast, Low-Power,
5kV Digital Isolators
RMS
Table 3. Side A Supply Current Calculation Worksheet
SIDE A
V
= 2.5V
DDA
FREQUENCY
LOAD
TYPE
CHANNEL IN/OUT
LOAD
“NO LOAD” CURRENT (mA)
LOAD CURRENT (mA)
(Mbps)
1
2
OUT
IN
100
20
Capacitive
15pF
1.02
0.33
2.5V x 50MHz x 15pF = 1.875mA
Total:
3.225mA
Table 4. Side B Supply Current Calculation Worksheet
SIDE B
V
= 3.3V
DDB
FREQUENCY
LOAD
TYPE
CHANNEL IN/OUT
LOAD
“NO LOAD” CURRENT (mA)
LOAD CURRENT (mA)
(Mbps)
1
2
IN
100
20
1.13
0.42
OUT
Capacitive
Total:
10pF
3.3V x 10MHz x 10pF = 0.33mA
1.88mA
Maxim Integrated
│ 18
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MAX12934/MAX12935
Two-Channel, Fast, Low-Power,
5kV
Digital Isolators
RMS
Ordering Information
ISOLATION
VOLTAGE
CHANNEL
PART
DATA RATE
(Mbps)
DEFAULT
OUTPUT
TEMP
RANGE
PIN-PACKAGE
CONFIGURATION
(KV
)
RMS
MAX12934BAWE+*
MAX12934CAWE+*
MAX12934EAWE+*
MAX12934FAWE+*
MAX12935BAWE+
MAX12935CAWE+*
MAX12935EAWE+*
MAX12935FAWE+*
2/0
2/0
2/0
2/0
1/1
1/1
1/1
1/1
25
200
25
High
High
Low
Low
High
High
Low
Low
5
-40°C to 125°C
-40°C to 125°C
-40°C to 125°C
-40°C to 125°C
-40°C to 125°C
-40°C to 125°C
-40°C to 125°C
-40°C to 125°C
16 Wide SOIC
16 Wide SOIC
16 Wide SOIC
16 Wide SOIC
16 Wide SOIC
16 Wide SOIC
16 Wide SOIC
16 Wide SOIC
5
5
200
25
5
5
200
25
5
5
200
5
+Denotes a lead(Pb)-free/RoHS-compliant package.
Chip Information
PROCESS: BiCMOS
Package Information
For the latest package outline information and land patterns
(footprints), go to www.maximintegrated.com/packages. Note
that a “+”, “#”, or “-” in the package code indicates RoHS status
only. Package drawings may show a different suffix character, but
the drawing pertains to the package regardless of RoHS status.
PACKAGE
TYPE
PACKAGE
CODE
OUTLINE
NO.
LAND
PATTERN NO.
16 Wide
SOIC
W16MS-11
21-0042
90-0107
Maxim Integrated
│ 19
www.maximintegrated.com
MAX12934/MAX12935
Two-Channel, Fast, Low-Power,
5kV
Digital Isolators
RMS
Revision History
REVISION REVISION
PAGES
CHANGED
DESCRIPTION
NUMBER
DATE
0
8/17
Initial release
—
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim Integrated’s website at www.maximintegrated.com.
Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent licenses
are implied. Maxim Integrated reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and max limits)
shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance.
©
Maxim Integrated and the Maxim Integrated logo are trademarks of Maxim Integrated Products, Inc.
2017 Maxim Integrated Products, Inc.
│ 20
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