MAX13325_V01 [MAXIM]
Dual Automotive, Audio Line Drivers with I2C Control and Diagnostic;
| 型号： | MAX13325_V01 |
| 厂家： | 
MAXIM INTEGRATED PRODUCTS |
| 描述： | Dual Automotive, Audio Line Drivers with I2C Control and Diagnostic |
| 文件： | 总21页 (文件大小：1728K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
EVALUATION KIT AVAILABLE
MAX13325/MAX13326
Dual Automotive, Audio Line Drivers
2
with I C Control and Diagnostic
General Description
Features
S Comprehensive Programmability and Diagnostics
The MAX13325/MAX13326 dual audio line drivers provide
a reliable differential interface between automotive audio
components. The devices feature differential inputs and
outputs, integrated output diagnostics, and are controlled
using an I2C interface or operate in stand-alone mode.
Using I2C Interface
S Autoretry Function in Stand-Alone Mode
S Drive Capacitive Loads ≤ 3nF Differentially, ≤ 4nF
to Ground
The outputs can deliver up to 4V
into 100Iloads.
RMS
S 112dB Signal-to-Noise Ratio
The MAX13325 buffers analog audio signals for trans-
mission over long cable distances with a fixed gain of
12dB, whereas the MAX13326 provides a 0dB fixed
gain. The diagnostics on the outputs report conditions
on a per channel basis, including short to GND, short
to battery, overcurrent, overtemperature, and excessive
offset. The output amplifiers can drive capacitive loads
up to 4nF to ground and 3nF differentially.
S Low 0.002% THD at 4V
into 2.7kI Loads
RMS
S High PSRR (70dB at 1kHz)
S High CMRR (80dB at 1kHz)
S Low Output Noise (3µV
), MAX13326
RMS
S Excellent Channel-to-Channel Matching
S Load-Dump Transient Protection
S Protected Output Against Various Short-Circuit
The outputs are protected according to IEC 61000-4-2
Q8kV Contact Discharge, and Q15kV Air Gap. The
MAX13325/MAX13326 are specified from -40NC to
+105NC and are available in a 28-pin TSSOP package
with an exposed pad.
Conditions
S ESD Protection for 8kV Contact Discharge,
1ꢀkV Air Gap
S Long-Distance Drive Capability Typically Up to
1ꢀm or Greater
Applications
Automotive Radio and Rear Seat Entertainment
Professional Remote Audio Amplifiers
S Noise-Rejecting Differential Inputs and Outputs
S Low-Power Shutdown Mode < 10µA
S Hardware or Software MUTE Function
S 28-Pin TSSOP Package with Exposed Pad
Typical Operating Circuit
Ordering Information
V
SUP
+12V
PIN-
PACKAGE
GAIN
(dB)
C1
470nF
D2**
* OPTIONAL
PART
TEMP RANGE
C2
1µF
+5V
R1
1kI
Q1
V
C6
100nF
L
CP
CM CHOLD
-40NC to
+105NC
D1
MAX1332ꢀGUI/V+ 28 TSSOP-EP*
MAX13326GUI/V+ 28 TSSOP-EP*
12
0
ADD1
ADD0
SDA
V
DD
CHARGE
PUMP
C3
1µF
-40NC to
+105NC
PGND
2
I
C INTERFACE
AND
DIGITAL CONTROL
SCL
C4
10µF
FLAG
SHDN
MUTE
BIAS
TO
/V denotes an automotive qualified part.
+Denotes a lead(Pb)-free/RoHS-compliant package.
*EP = Exposed pad.
MICROPROCESSOR
C5
220nF
BIAS
CSS
GND
C7
2.2µF
1nF
OUTLP
OUTLM
INLP
FROM AUDIO
SOURCE
LEFT
1nF
INLM
C8
2.2µF
OUTPUT
DIAGNOSTIC
ESD
PROTECTION
1nF
1nF
C9
2.2µF
OUTRP
OUTRM
INRP
FROM AUDIO
SOURCE
1nF
RIGHT
INRM
C10
2.2µF
1nF
MAX13325
MAX13326
*OPTIONAL : NEEDED FOR AUTOMOTIVE LOAD DUMP PROTECTION ONLY
**USE D2 WHEN CHARGE PUMP IS OFF AND EXTERNAL SUPPLY IS PROVIDED TO C HOLD
For pricing, delivery, and ordering information, please contact Maxim Direct
at 1-888-629-4642, or visit Maxim’s website at www.maximintegrated.com.
19-5136; Rev 5; 4/13
MAX13325/MAX13326
Dual Automotive, Audio Line Drivers
2
with I C Control and Diagnostic
ABSOLUTE MAXIMUM RATINGS
DD
V
to PGND ........................................................-0.3V to +28V
Short Circuits Between Any OUT_ ............................Continuous
CHOLD .................................................................-0.3V to +28V
Continuous Power Dissipation (T = +70NC) (multilayer board)
A
28-Pin TSSOP (derate 27mW/NC above +70NC).....2162.2mW
Operating Temperature Range........................ -40NC to +105NC
Storage Temperature Range............................ -65NC to +150NC
Junction Temperature .....................................................+150NC
Lead Temperature (soldering, 10s) ................................+300NC
Soldering Temperature (reflow) ......................................+260NC
V to GND ...............................................................-0.3V to +6V
GND, PGND ........................................................-0.3V to +0.3V
OUT_ to PGND........................................................ -0.3V to 28V
L
IN_, BIAS to AGND ..................................-0.3V to (V
SCL, SDA, ADD0, ADD1, MUTE, SHDN,
+ 0.3V)
DD
FLAG to GND ..........................................................-0.3V to +6V
OUT_ Short Circuit to PGND or V .........................Continuous
DD
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
PACKAGE THERMAL CHARACTERISTICS (Note 1)
Junction-to-Ambient Thermal Resistance (q ) ..........37°C/W
JA
Junction-to-Case Thermal Resistance (q ).................2°C/W
JC
Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer
board. For detailed information on package thermal considerations, refer to www.maximintegrated.com/thermal-tutorial.
ELECTRICAL CHARACTERISTICS
(V
DD
= 14.4V, V = 5V, R = J, load impedance from OUT_+ to OUT_-, T = T = -40NC to +105NC, typical values are T = +25NC,
L
L
A
J
A
unless otherwise noted.) (Note 2)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
AMPLIFIER DC CHARACTERISTICS
Transient Supply Voltage
(Load Dump)
Using external nMOS-RTR020N05, 300ms
duration
V
50
V
V
DDMAX
V
DD
4.5
2.7
18
Operating Supply Voltage Range
V
5.5
L
V
V
OVLO Threshold
UVLO Threshold
V
V
Rising edge
Falling edge
Falling edge
18.5
3.3
19.2
3.5
2.4
39
V
V
DD
DDOV
DDUV
DD
V UVLO Threshold
L
V
2.2
V
LUV
T
A
T
A
= +25NC, no load
mA
mA
mA
Supply Current
I
DD
= -40NC to +105NC, no load
50
10
2
Logic Supply Current
I
L
V = 5V
L
1.7
0.5
0.5
< 0.1
220
6
T
T
= +25NC
A
I
FA
DD
Shutdown Supply Current
I
= -40NC to +105NC
SHDN
A
I
L
FA
ms
ms
kI
Turn-On Time (from Shutdown)
Turn-On Time (from Mute)
Differential Input Resistance
MUTE = V
L
SHDN = V , C
= 220nF
L
CSS
R
Measure across input
18
15
24
30
25
INDIF
Each input to ground (MAX13325)
20
Single-Ended Input Impedance
Signal-Path Gain (Note 3)
R
kI
IN
Each input to ground (MAX13326)
MAX13325
12
16
12
0
20
11.8
-0.2
12.2
+0.2
A
dB
V
MAX13326
2
Maxim Integrated
MAX13325/MAX13326
Dual Automotive, Audio Line Drivers
2
with I C Control and Diagnostic
ELECTRICAL CHARACTERISTICS (continued)
(V
DD
= 14.4V, V = 5V, R = J, load impedance from OUT_+ to OUT_-, T = T = -40NC to +105NC, typical values are T = +25NC,
L
L
A
J
A
unless otherwise noted.) (Note 2)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Channel-to-Channel Gain
Tracking
Q0.4
dB
Differential Mode Output Balance
OUT_+ to OUT_- (Note 4)
-40
dB
MUTE = GND, T = +25NC
Q0.5
Q0.2
50
Q10
Q3
Output Offset Voltage
(OUT_+ to OUT_-)
A
V
mV
OOS
MUTE = V , T = +25NC
L
A
BIAS Voltage
V
Z
Relative to V
52.5
115
%
BIAS
DD
BIAS Impedance
I
= Q10FA
69
Q12.5
Q4.2
-80
92
kI
BIAS
BIAS
V
V
V
V
V
V
= 14.4V, V = Q14.4V, R = 1kI
IN L
DD
DD
DD
DD
DD
Output-Voltage Swing Differential
Power-Supply Rejection Ratio
V
= 5.0V, V = Q5V, R = 1kI
IN
L
= 4.5V to 18V
-96
-95
-80
-80
PSRR
= 14.5V, +500mV
= 14.5V, +500mV
ripple at 1kHz
dB
dB
P-P
ripple at 10kHz
P-P
Common-Mode Rejection Ratio
CMRR
= 1V , 100Hz to 10kHz
RMS
-48
IN
AMPLIFIER AC CHARACTERISTICS
V
OUT
V
OUT
V
OUT
V
OUT
V
OUT
V
OUT
V
OUT
= 4V
, R = 2.7kI
0.002
0.004
0.03
0.2
RMS
RMS
RMS
RMS
RMS
RMS
RMS
L
= 4V
= 4V
= 7V
= 1V
= 1V
= 2V
, R = 1kI
L
Total Harmonic Distortion Plus
Noise (Note 5)
THD+N
THD+N
%
, R = 100I, V
= 8V
L
DD
, R = 1kI
L
, R = 2.7kI
0.01
0.02
0.8
L
Total Harmonic Distortion Plus
, R = 1kI
%
L
Noise at V
= 5V (Note 5)
DD
, R = 1kI
L
Capacitive-Load Stability
3
4
3
nF
nF
C
C
to GND
No sustained
oscillation
LOAD
Capacitive-Load Drive Capability
differential
LOAD
MAX13325, gain = 12dB, V
A-weighted
= 4V
,
OUT
RMS
112
122
Signal-to-Noise Ratio (Note 5)
SNR
dB
MAX13326, gain = 0dB, V
A-weighted
= 4V
,
OUT
RMS
Unity-Gain Bandwidth
Output Slew Rate
3
2.5
10
MHz
V/Fs
A-weighted, MAX13325
A-weighted, MAX13326
Output-Voltage Noise
FV
3
Crosstalk
V
= 1V
, 1kHz
-110
4
dB
ms
IN
RMS
Mute Time
To achieve soft mute, C
= 220nF
CSS
Mute Attenuation
V
= 1V
, 1kHz
-75
-70
-45
dB
IN
RMS
Click-and-Pop Level (Note 6)
Click-and-Pop Level (Note 6)
K
K
Into and out of mute
Into and out of shutdown, 1kI
dBV
dBV
CP
CP
Maxim Integrated
3
MAX13325/MAX13326
Dual Automotive, Audio Line Drivers
2
with I C Control and Diagnostic
ELECTRICAL CHARACTERISTICS (continued)
(V
DD
= 14.4V, V = 5V, R = J, load impedance from OUT_+ to OUT_-, T = T = -40NC to +105NC, typical values are T = +25NC,
L
L
A
J
A
unless otherwise noted.) (Note 2)
PARAMETER
CHARGE PUMP
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
V
V
= 4.5V, I
= 6.6mA
= 6.6mA
3.2
4.5
4.0
Charge-Pump Overdrive Voltage,
DD
SOURCE
V
V
CPH
V
– V
(Hard Mode)
CHOLD
DD
= 18V, I
5.5
DD
SOURCE
V
unconnected, I
= 40FA,
DD
SOURCE
2.1
V = 3.3V
V
- V
(Soft Mode)
V
L
V
CHOLD
DD
CPS
V = 5V
L
3.9
333
190
426
260
CPF[1:0] = 00
CPF[1:0] = 01
CPF[1:0] = 10
CPF[1:0] = 11
Charge-Pump Frequency
f
CPOFF = 0
kHz
CP
DIAGNOSTICS
Output Current Limit
Short to GND or battery
Valid when muted
580
230
mA
mA
kI
mV
NC
Current-Limit Warning Threshold
Open-Load Detection
Output Offset Detection
Thermal Warning Threshold
Thermal Shutdown Threshold
Thermal Shutdown Hysteresis
ESD PROTECTION
10
Q250
135
165
15
NC
NC
Air Gap IEC 61000-4-2
Contact Discharge IEC 61000-4-2
HBM
OUT_ pins
OUT_ pins
All pins
Q15
Q8
kV
kV
kV
Q2
4
Maxim Integrated
MAX13325/MAX13326
Dual Automotive, Audio Line Drivers
2
with I C Control and Diagnostic
DIGITAL CHARACTERISTICS
(V
DD
= 14.4V, V = 3.3V, T = T = -40NC to +105NC, typical values are T = +25NC, unless otherwise noted.) (Note 2)
L
A
J
A
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
DIGITAL INTERFACE
Input-Voltage High
V
V = 2.7V to 5.5V
0.75 x V
L
V
V
INH
L
Input-Voltage Low
V
V = 2.7V to 5.5V
L
0.25 x V
L
INL
Input-Voltage Hysteresis
Input Leakage Current
Output Low Voltage
Output Leakage Current
50
mV
FA
V
Q100
0.4
2
FLAG, SDA, I
= 3mA
SINK
FLAG, SDA = 5.5V
FA
ms
ms
Stand-Alone FLAG Pulse Width
Stand-Alone Fault Retry Time
I2C TIMING
ADD0, ADD1 = GND
ADD0, ADD1 = GND
100
500
Serial-Clock Frequency
Bus Free Time
f
0
400
kHz
Fs
Fs
Fs
Fs
ns
ns
pF
ns
ns
ns
Fs
ns
SCL
t
Between START and STOP conditions
Repeated START condition
1.3
0.6
1.3
0.6
0
BUF
Hold Time
t
HD:STA
SCL Low Time
t
LOW
SCL High Time
t
HIGH
Data Hold Time
t
HD:DAT
900
Data Setup Time
t
100
SU:DAT
Bus Capacitance
C
B
Per bus line
SCL, SDA
SCL, SDA
400
300
300
250
Receiving Rise Time
Receiving Fall Time
Transmitting Fall Time
STOP Condition Setup Time
t
20 + 0.1C
20 + 0.1C
R
B
t
t
F
B
SDA, V = 3.6V
20 + 0.05C
B
F
L
t
0.6
0
SU:STO
Pulse Width of Suppressed Spike
t
SP
50
Note 2: All devices are 100% tested at T = +25NC. Limits over temperature are guaranteed by design.
A
(V
) − (V
)
OUT_−
OUT_+
20 × log
.
Note 3: Signal path gain is defined as:
Note 3: Signal Path Gain is defined as
(V
) − (V
)
IN_ +
IN
_−
Note 4: Measured in differential output mode, differential input voltage 4V
(for 0dB gain), 1V
(for 12dB gain) 1kHz.
P-P
P-P
( | V
) − ( V )
OUT_−
OUT_+
Common-mode output balance is defined as:
20 × log
.
( V
) + ( V
) × 2
OUT_ +
OUT
_−
Common-Mode Output Balance is defined as
Note ꢀ: 22Hz to 22kHz measurement bandwidth.
Note 6: KCP level is calculated as 20log[(peak voltage during mode transition, no input signal)/1V ]. Units are expressed in
RMS
dBV.
Maxim Integrated
5
MAX13325/MAX13326
Dual Automotive, Audio Line Drivers
2
with I C Control and Diagnostic
Typical Operating Characteristics
(V
DD
= 14.4V, V = 5V, R = 1kI, gain = 12dB, T = +25NC, unless otherwise noted.)
L L A
SHUTDOWN CURRENT
vs. TEMPERATURE
COMMON-MODE REJECTION RATIO
vs. FREQUENCY
TOTAL HARMONIC DISTORTION
PLUS NOISE vs. FREQUENCY
0.40
0
0.010
0.009
0.008
0.007
0.006
0.005
0.004
0.003
0.002
0.001
0
1V
RMS
OUTPUT
NO LOAD
1V
RMS
INPUT
20kHz AES17 FILTER
-10
-20
-30
-40
-50
-60
-70
-80
-90
-100
0.35
0.30
0.25
0.20
0.15
0.10
0.05
0
INPUTS SHORTED
= 0V
V
SHDN
LEFT CHANNEL
RIGHT CHANNEL
-40 -25 -10
5
20 35 50 65 80 95
10
100
1k
FREQUENCY (Hz)
10k
100k
10
100
1k
FREQUENCY (Hz)
10k
100k
TEMPERATURE (°C)
POWER-SUPPLY REJECTION RATIO
vs. FREQUENCY
TOTAL HARMONIC DISTORTION PLUS
NOISE vs. OUTPUT VOLTAGE
CROSSTALK vs. FREQUENCY
0
-10
0
-10
0.020
0.018
0.016
0.014
0.012
0.010
0.008
0.006
0.004
0.002
0
500mV RIPPLE
P-P
f
IN
= 1kHz
1V
INPUT
RMS
-20
-30
-40
-50
-60
-70
-80
-90
-100
-110
-120
-130
-140
20kHz AES17 FILTER
-20
-30
-40
-50
-60
-70
-80
RIGHT TO LEFT
-90
-100
-110
-120
LEFT TO RIGHT
10
100
1k
10k
100k
10
100
1k
10k
100k
0
1
2
3
4
5
6
7
8
9
10
FREQUENCY (Hz)
FREQUENCY (Hz)
OUTPUT VOLTAGE (V
)
RMS
FFT vs. FREQUENCY
MUTE ATTENUATION vs. FREQUENCY
OUTPUT-NOISE VOLTAGE vs. FREQUENCY
0
-15
-60
-64
-68
-72
-76
-80
0
-10
-20
-30
-40
-50
-60
-70
-80
V
OUT
1kHz
= 1V
RMS
2V
INPUT
RMS
A-WEIGHTED
-30
-45
-60
-75
LEFT CHANNEL
-90
90
-100
-110
-120
-130
-140
-150
-105
-120
-135
-150
RIGHT CHANNEL
10
100
1k
FREQUENCY (Hz)
10k
100k
10
100
1k
10k
100k
0
2
4
6
8
10 12 14 16 18 20
FREQUENCY (Hz)
FREQUENCY (kHz)
6
Maxim Integrated
MAX13325/MAX13326
Dual Automotive, Audio Line Drivers
2
with I C Control and Diagnostic
Typical Operating Characteristics (continued)
(V
= 14.4V, V = 5V, R = 1kI, gain = 12dB, T = +25NC, unless otherwise noted.)
DD
L
L
A
OUTPUT VOLTAGE vs. CHARGE-PUMP
OVERDRIVE VOLTAGE
GAIN ERROR vs. TEMPERATURE
GAIN ERROR vs. FREQUENCY
0.020
0.050
0.045
0.040
0.035
0.030
0.025
0.020
0.015
0.010
0.005
0
10.5
1V
OUTPUT
RMS
0.015
0.010
0.005
0
10.0
9.5
9.0
8.5
LEFT CHANNEL
-0.005
-0.010
-0.015
-0.020
-0.025
-0.030
-0.035
-0.040
-0.045
-0.050
-0.005
-0.010
-0.015
-0.020
THDN = 1%
8.0
7.5
7.0
f
IN
= 1kHz
V
DD
= 14.4
R = 1kI
L
CPOFF = 1
RIGHT CHANNEL
-40 -25 -10
5
20 35 50 65 80 95
10
100
1k
FREQUENCY (Hz)
10k
100k
0
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
TEMPERATURE (°C)
(V - V ) (V)
CHOLD DD
GAIN vs. TEMPERATURE
GAIN ERROR vs. FREQUENCY
OUTPUT-NOISE VOLTAGE vs. FREQUENCY
0.20
0.15
0.10
0.05
0
0.050
0.045
0.040
0.035
0.030
0.025
0.020
0.015
0.010
0.005
0
0
-10
-20
-30
-40
-50
-60
-70
-80
MAX13326 (0dB)
1V OUTPUT
MAX13326 (0dB)
MAX13326 (0dB)
VOUT = 1V
RMS
RMS
LEFT CHANNEL
-0.005
-0.010
-0.015
-0.020
-0.025
-0.030
-0.035
-0.040
-0.045
-0.050
-90
-0.05
-0.10
-0.15
-0.20
RIGHT CHANNEL
-100
-110
-120
-130
-140
-150
-40 -25 -10
5
20 35 50 65 80 95
10
100
1k
FREQUENCY (Hz)
10k
100k
0
2
4
6
8
10 12 14 16 18 20
TEMPERATURE (°C)
FREQUENCY (kHz)
Maxim Integrated
7
MAX13325/MAX13326
Dual Automotive, Audio Line Drivers
2
with I C Control and Diagnostic
Pin Configuration
TOP VIEW
+
1
2
3
4
28
27
26
25
24
23
CSS
FLAG
CM
BIAS
V
L
I.C.
I.C.
CP
OUTLP
OUTLM
INLP
5
6
MAX13325
MAX13326
INLM
22 CHOLD
21 PGND
20 OUTRP
19 OUTRM
18 GND
7
V
DD
8
INRM
INRP
I.C.
9
10
11
12
13
14
I.C.
17 ADD1
16 SDA
SHDN
MUTE
ADD0
15 SCL
EP
TSSOP
CONNECT TO PGND.
Pin Description
PIN
NAME
FUNCTION
1
BIAS
Analog Bias Voltage. Bypass BIAS to GND with a 10FF capacitor.
Logic Supply Voltage. Connect V to a 2.7V to 5V logic supply. Bypass V to GND with a 0.1FF
capacitor.
L
L
2
V
L
3, 4, 10, 11
5
I.C.
Internally Connected. Leave unconnected.
Left Audio Positive Input. Either input of each pair can be used as a single-ended input, with the
complementary input bypassed to GND.
INLP
Left Audio Negative Input. Either input of each pair can be used as a single-ended input, with the
complementary input bypassed to GND.
6
7
8
9
INLM
Power-Supply Input. Connect V
capacitor.
to the supply voltage. Bypass V
to GND through a 1FF
DD
DD
V
DD
Right Audio Negative Input. Either input of each pair can be used as a single-ended input, with the
complementary input bypassed to GND.
INRM
INRP
Right Audio Positive Input. Either input of each pair can be used as a single-ended input, with the
complementary input bypassed to GND.
12
13
SHDN
MUTE
Shutdown Input. Drive SHDN low to power down the device.
Mute Input. Drive MUTE low to mute the outputs. The outputs are low impedance in mute.
8
Maxim Integrated
MAX13325/MAX13326
Dual Automotive, Audio Line Drivers
2
with I C Control and Diagnostic
Pin Description (continued)
PIN
NAME
FUNCTION
I2C Address Inputs. Connect ADD0 and ADD1 to V , GND, SCL, or SDA to select 7 I2C addresses.
Connect ADD0 and ADD1 to GND for stand-alone mode.
L
14
ADD0
15
16
SCL
SDA
Serial Clock
Serial-Data IO
I2C Address Inputs. Connect ADD0 and ADD1 to V , GND, SCL, or SDA to select 7 I2C addresses.
L
17
ADD1
Connect ADD0 and ADD1 to GND for stand-alone mode.
Analog Ground. Ground connection for the input bias and gain circuits.
Right Audio Negative Output. Each output is current limited.
Right Audio Positive Output . Each output is current limited.
Power Ground. Ground connection for the output stage drivers.
18
19
20
21
GND
OUTRM
OUTRP
PGND
Charge-Pump Output (When Charge Pump is On; CPOFF = 0). When the charge pump is off,
provide an external supply through a diode to the CHOLD input. Bypass CHOLD with 1µF to PGND.
22
CHOLD
23
24
25
26
OUTLM
OUTLP
CP
Left Audio Negative Output. Each output is current limited.
Left Audio Positive Outputs. Each output is current limited.
Charge-Pump Flying Capacitor, Positive Connection
Charge-Pump Flying Capacitor, Negative Connection
CM
Open-Drain Fault Flag Output. FLAG indicates a fault on any one channel. In stand-alone mode,
FLAG is stretched to a typical pulse width of 100ms.
27
FLAG
Soft-Start Capacitor Connection. CSS is charged/discharged by < 100FA current to get soft mute/
play transition. Bypass to GND through a 220nF capacitor.
28
—
CSS
EP
Exposed Pad. Connect to PGND.
The MAX13325/MAX13326 operate in stand-alone or
Detailed Description
I2C-compatible mode with diagnostic outputs capable
of detecting short to GND or battery, overcurrent, over-
temperature, or excessive offset. A short across another
audio output signal line is also protected.
The MAX13325/MAX13326 audio line drivers are designed
to transmit audio data across noisy environments. The dif-
ferential interface is highly resistant to noise injection from
external sources common to automotive applications.
Table 1. Register Address Map
ADDRESS
0x00
REGISTER TYPE
Configuration
NAME
CONFIG
CMD
READ/WRITE
Read/Write
DEFAULT
0x00
0x01
Command Byte
General Fault
Read/Write
0x00
0x02
GFAULT
LFAULT
RFAULT
Read
0x00
0x03
Left-Channel Fault
Right-Channel Fault
Cleared on Read
Cleared on Read
0x00
0x04
0x00
0x04 (12dB)
0x05 (0dB)
0x05
Flag
FLAG
Read
0x06
0x07
0x08
General Mask
Left-Channel Mask
Right-Channel Mask
GMASK
LMASK
RMASK
Read/Write
Read/Write
Read/Write
0x00
0x00
0x00
Maxim Integrated
9
MAX13325/MAX13326
Dual Automotive, Audio Line Drivers
2
with I C Control and Diagnostic
Configuration Register
Table 2. Configuration Register Format
REGISTER DATA
ADDRESS
CODE (HEX)
POR STATE
FUNCTION
(HEX)
D7
D6
Dꢀ
D4
D3
D2
D1
D0
Configuration
Register
0x00
DIAG
ENABLE
MUTE
CPOFF
OLDL
OLDR
CPF1
CPF0
0x00
DIAG: Set DIAG to 1 to enable diagnostic mode. Write '0' to disable diagnostic mode.
ENABLE: Set ENABLE bit to 1 to enable the device. Write ‘0’ disables the device. Low on the SHDN pin overrides the
ENABLE bit.
MUTE: Set the MUTE bit to 1 to mute both the output channels. Output is low impedance when in mute. Low on the
MUTE pin input overrides the MUTE bit.
CPOFF: Set the CPOFF bit to 1 to turn off the charge pump. CHOLD pin must be externally supplied (see the V
CPH
parameter in the Electrical Characteristics table). Charge pump is enabled when CPOFF = 0.
OLDL: Write 1 to the OLDL bit to initiate the open-load detection for the left channel. To run OLDL again, write ‘0’ and
‘1’ again.
OLDR: Write 1 to the OLDR bit to initiate the open-load detection for the right channel. To run OLDR again, write ‘0’
and ‘1’ again.
Table 2a. Charge-Pump Frequency Bits
CPF1
CPF0
FREQUENCY (kHz)
0
0
1
1
0
1
0
1
333
190
426
260
CPF[1:0]: Sets the frequency of the charge pump.
Command Byte Register
Table 3. Command Byte Register Format
REGISTER DATA
ADDRESS
CODE (HEX)
POR STATE
FUNCTION
(HEX)
D7
D6
RETRYR
Dꢀ
D4
D3
D2
D1
D0
Command Byte
Register
0x01
RETRYL
x
x
x
x
x
x
0x00
RETRYR: The right-channel power amplifier switches off after a fault condition. Write ‘1’ to turn it back on after the fault
condition.
RETRYL: The left-channel power amplifier switches off after a fault condition. Write ‘1’ to turn on the left-channel power
amplifier after the fault condition.
10
Maxim Integrated
MAX13325/MAX13326
Dual Automotive, Audio Line Drivers
2
with I C Control and Diagnostic
General Faults
Table 4. General Fault Register Format
REGISTER DATA
ADDRESS
CODE (HEX)
POR STATE
(HEX)
FUNCTION
D7
D6
Dꢀ
D4
D3
D2
D1
D0
General Fault
Register
0x02
x
TWARN
TSHDN DUMP
x
x
x
x
0x00
TWARN: The TWARN bit is set to ‘1’ when the temperature warning threshold is reached.
TSHDN: The TSHDN is set to ‘1’ when the temperature shutdown threshold is reached.
DUMP: The DUMP bit is set to ‘1’ when the V
voltage exceeds the overvoltage threshold.
DD
Set the appropriate mask bit in the GMASK register to detect the general faults. See Table 8.
Left-Channel Faults
Table ꢀ. Left-Channel Fault Register Format
REGISTER DATA
ADDRESS
CODE
(HEX)
POR STATE
FUNCTION
(HEX)
D7
D6
Dꢀ
D4
D3
D2
D1
D0
Left-Channel
Fault Register
0x03
SVDDL
SGNDL
LIMITL
x
OFFSETL
OPENL
x
x
0x00
SVDDL: The SVDDL bit is set to ‘1’ when a short to V
is detected on the left channel.
DD
SGNDL: The SGNDL bit is set to ‘1’ when a short to GND is detected on the left channel.
LIMITL: The LIMITL bit is set to ‘1’ when the current-limit threshold is tripped for left output.
OFFSETL: The OFFSETL bit is set to ‘1’ when excessive offset is detected on the left-channel output.
OPENL: The OPENL bit is set to ‘1’ when an open load is detected on the left channel.
Set the appropriate mask bit in the LMASK register to detect the faults on the left channel. See Table 9.
When any bit of the LFAULT register is high, the FLAG output is low.
Right-Channel Faults
Table 6. Right-Channel Fault Register Format
REGISTER DATA
ADDRESS
CODE
(HEX)
POR STATE
FUNCTION
(HEX)
D7
D6
Dꢀ
D4
D3
D2
D1
D0
Right-Channel
Fault Register
0x04
SVDDR
SGNDR
LIMITR
x
OFFSETR
OPENR
x
x
0x00
SVDDR: The SVDDR bit is set to ‘1’ when a short to V
is detected on the right channel.
DD
SGNDR: The SGNDR bit is set to ‘1’ when a short to GND is detected on the right channel.
LIMITR: The LIMITR bit is set to ‘1’ when the current-limit threshold is tripped for right output.
OFFSETR: The OFFSETR bit is set to ‘1’ when excessive offset is detected on the right-channel output.
OPENR: The OPENR bit is set to ‘1’ when an open load is detected on the right channel.
Set the appropriate mask bit in the RMASK register to detect the faults on the right channel. See Table 10.
When any bit of the RFAULT register is high, the FLAG output is pulled low.
Maxim Integrated
11
MAX13325/MAX13326
Dual Automotive, Audio Line Drivers
2
with I C Control and Diagnostic
FLAG Register
Table 7. Flag Register Format
REGISTER DATA
D4
ADDRESS
CODE
(HEX)
POR STATE
FUNCTION
(HEX)
D7
D6
Dꢀ
D3
D2
D1
D0
FLAG
Register
0x05
FLAG
LHIGHZ
RHIGHZ
OFFSETL OFFSETR
ID2
ID1
ID0
0x04/0x05
FLAG: FLAG bit is set to ‘1’ when the FLAG output is logic-low. The FLAG bit allows to quickly access the status of the
device without using the FLAG output and without having to read all the fault registers.
LHIGHZ: The LHIGHZ bit is set to ‘1’ when the left-channel output is high impedance; for example due to a short circuit.
RHIGHZ: The RHIGHZ bit is set to ‘1’ when the right-channel output is high impedance; for example due to a short
circuit.
OFFSETL: The OFFSETL bit is set to ‘1’ when excessive offset is detected on the left-channel output.
OFFSETR: The OFFSETR bit is set to ‘1’ when excessive offset is detected on the right-channel output.
ID[2:0]: The ID[2:0] bits indicate the device type (12dB = 100 and 0dB = 101).
General Mask Register
Table 8. General Mask Register Format
REGISTER DATA
D4
ADDRESS
CODE
(HEX)
POR STATE
(HEX)
FUNCTION
D7
D6
Dꢀ
MTSHDN
D3
D2
D1
D0
General Mask
Register
0x06
0
MTWARN
MDUMP
x
x
x
x
0x00
MTWARN: Set MTWARN to ‘1’ to enable the TWARN fault detection. See Table 4.
MTSHDN: Set MTSHDN to ‘1’ to enable the TSHDN fault detection. See Table 4.
MDUMP: Set MDUMP to ‘1’ to enable the DUMP fault detection. See Table 4.
Left-Channel Mask Register
Table 9. Left-Channel Mask Register
REGISTER DATA
ADDRESS
CODE
(HEX)
POR
STATE
(HEX)
FUNCTION
D7
D6
Dꢀ
D4
D3
MOFFSETL
D2
D1
D0
Left-Channel
Mask Register
0x07
MSVDDL
MSGNDL
MLIMITL
0
MOPENL
x
x
0x00
MSVDDL: Set MSVDDL to 1 to enable the short to V
detection on the left channel.
DD
MSGNDL: Set MSGNDL to 1 to enable the short to GND detection on the left channel.
MLIMITL: Set MLIMITL to 1 to enable overcurrent detection on the left channel.
MOFFSETL: Set MOFFSETL to 1 to enable excessive-offset detection on the left-channel output.
MOPENL: Set MOPENL to 1 to enable open-load detection on the left channel.
12
Maxim Integrated
MAX13325/MAX13326
Dual Automotive, Audio Line Drivers
2
with I C Control and Diagnostic
Right-Channel Mask Register
Table 10. Right-Channel Mask Register
REGISTER DATA
ADDRESS
CODE
(HEX)
POR
STATE
(HEX)
FUNCTION
D7
D6
Dꢀ
D4
D3
MOFFSETR
D2
D1
D0
Right-Channel
Mask Register
0x08
MSVDDR MSGNDR
MLIMITR
0
MOPENR
x
x
0x00
MSVDDR: Set MSVDDR to 1 to enable the short to V
detection on the right channel.
DD
MSGNDR: Set MSGNDR to 1 to enable the short to GND detection on the right channel.
MLIMITR: Set MLIMITR to 1 to enable overcurrent detection on the right channel.
MOFFSETR: Set MOFFSETR to 1 to enable excessive-offset detection on the right channel.
MOPENR: Set MOPENR to 1 to enable open-load detection on the right channel.
2
For stand-alone mode, there exists a 500ms stand-alone
fault retry function (for autoretry) until the fault goes
away. The FLAG output is pulsed to indicate a fault.
I C and Stand-Alone Diagnostics
When the DIAG bit and the appropriate mask bits are set
to 1, the MAX13325/MAX13326 enter diagnostic mode.
In this mode, the MAX13325/MAX13326 detect short
to GND, short to battery, overcurrent condition, over-
temperature condition, excessive offset, and report the
diagnosis using the I2C serial interface, FLAG bit, and
the FLAG output.
Output Short to V
DD
When in diagnostic mode, the MAX13325/MAX13326
detect if any of the differential outputs is shorted to V
DD
or battery. Upon detection of the short to V
or battery,
DD
the faulted channel is switched off and its output goes
into a high-impedance state. The fault is reported using
the I2C interface and the FLAG output. See Table 11.
Table 11. Output Short to V /Battery Diagnostic
DD
FAULT CONDITION
STATUS REPORT
UNMASK
RECOVERY
FLAG is asserted low.
Cleared on reading the LFAULT
register. See Table 5.
Note: 500ms autoretry in stand-
alone mode.
In LMASK register, set
MSVDDL bit to 1.
See Table 9.
FLAG bit set. See Table 7.
SVDDL bit is set in the LFAULT
register. See Table 5.
Left-Channel Output
Short to V
DD
Output is enabled by setting the
RETRYL bit to 1 in the Common
Byte register. See Table 3.
Left channel switches off and output
goes to high-impedance state.
Cannot be masked.
FLAG is asserted low.
Cleared on reading the RFAULT
register. See Table 6.
Note: 500ms autoretry in stand-
alone mode.
In RMASK register, set
MSVDDR bit to 1. See
Table 10.
FLAG bit set. See Table 7.
SVDDR bit is set in the RFAULT
register. See Table 6.
Right-Channel
Output Short to V
DD
Right channel switches off and
output goes to high-impedance
state.
Output is enabled by setting the
RETRYR bit to 1 in the Command
Byte register. See Table 3.
Cannot be masked.
Maxim Integrated
13
MAX13325/MAX13326
Dual Automotive, Audio Line Drivers
2
with I C Control and Diagnostic
Output Short to GND
Overtemperature
When in diagnostic mode, the MAX13325/MAX13326
detect if any of the differential outputs is shorted to
ground. Upon detection of the short to ground, the
faulted channel is switched off and its output goes into a
high-impedance state. The fault is reported using the I2C
interface and the FLAG output. See Table 12.
When in diagnostic mode, if the MAX13325/MAX13326
exceed the overtemperature warning or temperature shut-
down thresholds the device reports the condition using
the I2C interface and the FLAG output. See Table 13.
Table 12. Output Short to GND Diagnostic
FAULT CONDITION
STATUS REPORT
UNMASK
RECOVERY
FLAG is asserted low.
Cleared on reading the LFAULT
register. See Table 5.
Note: 500ms autoretry in stand-
alone mode.
In LMASK register, set
MSGNDL bit to 1. See
Table 9.
FLAG bit set. See Table 7.
SGNDL bit is set in the LFAULT
register. See Table 5.
Left-Channel Output
Short to GND
Output is enabled by setting the
RETRYL bit to 1 in the Command
Byte register. See Table 3.
Left channel switches off and output
goes to high-impedance state.
Cannot be masked.
FLAG is asserted low.
Cleared on reading the RFAULT
register. See Table 6.
Note: 500ms autoretry in stand-
alone mode.
In RMASK register, set
MSGNDR bit to 1. See
Table 10.
FLAG bit set. See Table 7.
SGNDR bit is set in the RFAULT
register. See Table 6.
Right-Channel Output
Short to GND
Right channel switches off and
output goes to high-impedance
state.
Output is enabled by setting the
RETRYR bit to 1 in the Command
Byte register. See Table 3.
Cannot be masked.
Table 13. Overtemperature Diagnostic
FAULT CONDITION
STATUS REPORT
UNMASK
RECOVERY
FLAG is asserted low.
Die temperature falls below warning
threshold.
Cleared on reading the GFAULT
register.
In GMASK register, set
MTWARN bit to 1. See
Table 8.
FLAG bit set. See Table 7.
Overtemperature
Warning
TWARN bit is set in the GFAULT
register. See Table 4.
Die temperature falls below
shutdown threshold.
Cleared on reading the GFAULT
register.
Note: 500ms autoretry in stand-
alone mode.
FLAG is asserted low.
FLAG bit set. See Table 7.
In GMASK register, set
MTSHDN bit to 1. See
Table 8.
TSHDN bit is set in the GFAULT
Register. See Table 4.
Overtemperature
Shutdown
Left channel is enabled by setting
the RETRYL bit to 1 in the Command
Byte register.
Right channel is enabled by
setting the RETRYR bit to 1 in the
Command Byte register.
See Table 3.
Left and right channels switch
off and output goes to high-
impedance state.
Cannot be masked.
14
Maxim Integrated
MAX13325/MAX13326
Dual Automotive, Audio Line Drivers
2
with I C Control and Diagnostic
Excessive Offset
When in diagnostic mode with mute enabled, if there
is excessive offset on any output, the MAX13325/
MAX13326 reports the condition through the I2C inter-
face and the FLAG output. See Table 14.
Open Load
When in diagnostic mode and the open-load detec-
tion is initiated, the selected channel is switched off for
1ms during which the diagnosis is taking place. Upon
detecting an open load on any channel, the MAX13325/
MAX13326 report the condition using the I2C interface
and the FLAG output. See Table 16.
Overcurrent
When in diagnostic mode, if any of the output pairs is
excessively loaded, the MAX13325/MAX13326 issue a
warning and report the condition through the I2C inter-
face and the FLAG output. The faulted channel is not
switched off. See Table 15.
Overvoltage
When in diagnostic mode, if the MAX13325/MAX13326
exceed the V
overvoltage threshold (for example
DD
during a load-dump condition), the device reports the
condition using the I2C interface and the FLAG output.
See Table 17.
Table 14. Excessive Offset Diagnostic
FAULT CONDITION
STATUS REPORT
UNMASK
RECOVERY
FLAG is asserted low.
Excessive Output
Offset on Left
Channel
In the LMASK register, set
MOFFSETL bit to 1. See
Table 9.
FLAG bit set. See Table 7.
Cleared on reading the LFAULT
register.
OFFSETL bit is set in the LFAULT
register. See Table 5.
FLAG is asserted low.
Excessive Output
Offset on Right
Channel
In the RMASK register, set
MOFFSETR bit to 1. See
Table 10.
FLAG bit set.
Cleared on reading the RFAULT
register.
OFFSETR bit is set in the RFAULT
register. See Table 6.
Table 1ꢀ. Overcurrent Diagnostic
FAULT CONDITION
STATUS REPORT
UNMASK
RECOVERY
FLAG is asserted low.
Load current falls below the
current-limit threshold.
Cleared on reading the LFAULT
register.
In the LMASK register,
set MLIMITL bit to 1. See
Table 9.
FLAG bit set. See Table 7.
Overcurrent on Left
Channel
LIMITL bit is set in the LFAULT
register. See Table 5.
FLAG is asserted low.
Load current falls below the
current-limit threshold.
Cleared on reading the RFAULT
register.
In the RMASK register,
set MLIMITR bit to 1. See
Table 10.
FLAG bit set. See Table 7.
Overcurrent on Right
Channel
LIMITR bit is set in the RFAULT
register. See Table 6.
Table 16. Open-Load Diagnostic
FAULT CONDITION
STATUS REPORT
UNMASK
RECOVERY
FLAG is asserted low.
In the LMASK register,
set MOPENL bit to 1. See
Table 9.
FLAG bit set. See Table 7.
Left-Channel Open
Load
Cleared on reading
the LFAULT register.
OPENL bit is set in the LFAULT
register. See Table 5.
FLAG is asserted low.
In the RMASK register,
set MOPENR bit to 1. See
Table 10.
FLAG bit set. See Table 7.
Right-Channel Open
Load
Cleared on reading
the RFAULT register.
OPENR bit is set in the RFAULT
register. See Table 6.
Maxim Integrated
15
MAX13325/MAX13326
Dual Automotive, Audio Line Drivers
2
with I C Control and Diagnostic
Table 17. Overvoltage Diagnostic
FAULT CONDITION
STATUS REPORT
UNMASK
RECOVERY
FLAG is asserted low.
V
voltage falls below overvoltage
DD
FLAG bit set. See Table 7.
In GMASK register, set
MDUMP bit to 1.
See Table 8.
threshold. Cleared on reading the
GFAULT register. Note: 500ms
autoretry in stand-alone mode.
DUMP bit is set in the GFAULT
register. See Table 4.
Overvoltage
Shutdown
Left channel is enabled by setting
the RETRYL bit to 1. Right channel
is enabled by setting the RETRYR
bit to 1. See Table 3.
Left and right channels switch
off and output goes to a
high-impedance state.
Cannot be masked.
control of the bus, or a Repeated START (Sr) condition to
communicate to another I2C slave (see Figure 1).
Applications Information
Serial Interface
Writing to the MAX13325/MAX13326 using I2C requires
that first the master sends a START (S) condition fol-
lowed by the device’s I2C address. After the address,
the master sends the register address of the register
that is to be programmed. The master then ends com-
munication by issuing a STOP (P) condition to relinquish
Bit Transfer
Each SCL rising edge transfers one data bit. The data
on SDA must remain stable during the high portion of the
SCL clock pulse (see Figure 2). Changes in SDA while
SCL is high are read as control signals (see the START
and STOP Conditions section). When the serial interface
is inactive, SDA and SCL idle high.
SDA
t
SU:DAT
t
F
t
t
LOW
t
t
t
R
t
BUF
LOW
HD:STA
SP
t
F
SCL
t
t
HD:STA
t
SU:STO
SU:STA
t
t
HD:DAT
HIGH
S
S
r
P
S
Figure 1. I2C Timing
SDA
SCL
DATA LINE
STABLE;
CHANGE OF
DATA ALLOWED
DATA VALID
Figure 2. Bit Transfer
16
Maxim Integrated
MAX13325/MAX13326
Dual Automotive, Audio Line Drivers
2
with I C Control and Diagnostic
START and STOP Conditions
A master device initiates communication by issuing
a START condition, which is a high-to-low transition
on SDA with SCL high. A START condition from the
master signals the beginning of a transmission to the
MAX13325/MAX13326. The master terminates transmis-
sion by a STOP condition (see the Acknowledge Bit
section). A STOP condition is a low-to-high transition
on SDA while SCL is high (Figure 3). The STOP condi-
tion frees the bus. If a Repeated START condition is
generated instead of a STOP condition, the bus remains
active. When a STOP condition or incorrect slave ID is
detected, the device internally disconnects SCL from the
serial interface until the next START or Repeated START
condition, minimizing digital noise and feedthrough.
Acknowledge Bit
The acknowledge (ACK) bit is a clocked 9th bit that
the MAX13325/MAX13326 use to handshake receipt of
each byte of data when in write mode. The MAX13325/
MAX13326 pull down SDA during the entire master-
generated 9th clock pulse if the previous byte is suc-
cessfully received (see Figure 4). Monitoring ACK
allows for detection of unsuccessful data transfers. An
unsuccessful data transfer occurs if a receiving device
is busy or if a system fault has occurred. In the event
START
STOP
CONDITION
CONDITION
SDA
SCL
Figure 3. START/STOP Conditions
NOT ACKNOWLEDGE
S
SDA
ACKNOWLEDGE
1
8
9
SCL
Figure 4. Acknowledge and Not-Acknowledge Bits
Table 18. Slave Address
SLAVE
ADDRESS
READ
SLAVE
ADDRESS
WRITE
ADD1
ADD0
A6
Aꢀ
A4
A3
A2
A1
A0
MODE
R/W
(HEX)
(HEX)
Stand-
alone
GND
GND
GND
—
—
—
—
—
—
—
—
—
—
V
L
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
0
1
1
0
0
1
1
1
0
1
0
1
0
1
1/0
1/0
1/0
1/0
1/0
1/0
1/0
0xC3
0xC5
0xC7
0xC9
0xCB
0xCD
0xCF
0xC2
0xC4
0xC6
0xC8
0xCA
0xCC
0xCE
I2C
I2C
I2C
I2C
I2C
I2C
I2C
GND
V
L
V
L
V
L
SCL
SDA
V
L
V
L
V
L
SCL
SDA
V
L
Maxim Integrated
17
MAX13325/MAX13326
Dual Automotive, Audio Line Drivers
2
with I C Control and Diagnostic
of an unsuccessful data transfer, the bus master may
retry communication. The master must pull down SDA
Register Address Map
Single-Byte Write Operation
For a single-byte write operation, send the slave address
as the first byte followed by the register address and
then a single data byte (see Figure 5).
during the 9th clock cycle to acknowledge receipt of
data when the MAX13325/MAX13326 are in read mode.
An acknowledge must be sent by the master after each
read byte to allow data transfer to continue. A not-
acknowledge is sent when the master reads the final
byte of data from the MAX13325/MAX13326, followed by
a STOP condition.
Burst Write Operation
For a burst write operation, send the slave address as
the first byte followed by the register address and then
the data bytes (see Figure 6).
Slave Address
The MAX13325/MAX13326 are programmable to one of
seven I2C slave addresses. These slave addresses are
Single-Byte Read Operation
For a single-byte read operation, send the slave address
with the read bit set, as the first byte followed by the reg-
ister address. Then send a Repeated START condition
followed by the slave address. After the slave sends the
data byte, send a not-acknowledge followed by a STOP
condition (see Figure 7).
unique device IDs. Connect ADD_ to GND, V , SCL, or
L
SDA to set the I2C slave address. The address is defined
as the seven most significant bits (MSBs) followed by
the read/write bit. Set the read/write bit to 1 to configure
the MAX13325/MAX13326 to read mode. Set the read/
write bit to 0 to configure the device to write mode. The
address is the first byte of information sent after the
START condition.
Burst Read Operation
For a burst read operation, send the slave address with
a write as the first byte followed by the register address.
Then send a Repeated START condition followed by the
slave address. The slave sends data bytes until a not-
acknowledge condition is sent (see Figure 8).
R/W
= 0
S
S7
B6
S6
B5
S5
SLAVE ADDRESS
B4 B3 B2
DATA 1
S4
S3
S2
B1
S1
ACK C7
C6
C5
C4
C3
C2
C1
C0 ACK
REGISTER ADDRESS
B7
B0 ACK
P
Figure 5. A Single-Byte Write Operation
R/W
= 0
S
S7
B7
S6
B6
S5
S4
S3
S2
B2
S1
B1
ACK R7
R6
R5
R4
R3
R2
R1
R0 ACK
SLAVE ADDRESS
REGISTER ADDRESS
B5
B4
B3
B0 ACK B7
B6
B5
B4
B3
B2
B1
B0 ACK
DATA 1
DATA 2
ACK B7
B6
B5
B4
B3
B2
B1
B0 ACK
P
DATA N
Figure 6. A Burst Write Operation
18
Maxim Integrated
MAX13325/MAX13326
Dual Automotive, Audio Line Drivers
2
with I C Control and Diagnostic
R/W
= 0
S
S7
S7
S6
S5
S4
S3
S2
S1
ACK B7
B6
B5
B4
B3
B2
B1
B0 ACK
SLAVE ADDRESS
REGISTER ADDRESS
R/W
= 1
Sr
S6
S5
S4
S3
S2
S1
ACK B7
B6
B5
B4
B3
B2
B1
B0 NACK
P
SLAVE ADDRESS
DATA
Figure 7. A Single-Byte Read Operation
R/W
= 0
S
S7
S7
S6
S6
S5
S4
S3
S2
S2
S1
S1
ACK B7
B6
B6
B5
B5
B4
B3
B2
B1
B1
B0 ACK
SLAVE ADDRESS
REGISTER ADDRESS
R/W
= 1
Sr
S5
S4
S3
ACK B7
B5
B4
B4
B3
B2
B2
B1
B0 ACK
SLAVE ADDRESS
DATA 1
ACK B7
B6
B3
B0 NACK
P
DATA N
Figure 8. A Burst Read Operation
Charge Pump
Flying Capacitor (C1)
The value of the flying capacitor (see the Typical
Operating Circuit) affects the charge pump’s load regu-
lation and output resistance. A C1 value that is too small
degrades the device’s ability to provide sufficient current
drive, which leads to a loss of output voltage. Increasing
the value of C1 improves load regulation and reduces
the charge-pump output resistance. For optimum perfor-
mance, use a 470nF capacitor for C1. When the charge
pump is disabled [CPOFF = 1], the flying capacitor (C1)
is not needed.
The MAX13325/MAX13326 charge pump can be dis-
abled depending on application requirements. When
charge pump is enabled [CPOFF = 0], please follow the
charge-pump capacitor selections. When the charge
pump is disabled [CPOFF = 1], the flying capacitor
(C1) is not needed. There are internal diodes between
V
OUT_ to CHOLD, so it is important that CHOLD
DD/
not be forced below V
or any of the outputs. A series
diode needs to be placed between the external supply
(V ) and CHOLD. See D2 in the Typical Operating
DD
SUP
Circuit.
Hold Capacitor (C2)
The hold capacitor value (see the Typical Operating
Circuit) and ESR directly affect the ripple at the internal
negative rail. Increasing the value of C2 reduces output
ripple. Likewise, decreasing the ESR of C2 reduces both
ripple and output resistance. Lower capacitance values
can be used in systems with low maximum output power
levels. For optimum performance, use a 1FF capacitor
for C2.
Charge-Pump Capacitor Selection
Use ceramic capacitors with a low ESR for optimum per-
formance. For optimal performance over the extended
temperature range, select capacitors with an X7R
dielectric. Table 19 lists suggested manufacturers.
Table 19. Suggested Capacitor Vendors
SUPPLIER
Murata Electronics North America, Inc.
Taiyo Yuden
PHONE
FAX
WEBSITE
www.murata-northamerica.com
www.t-yuden.com
770-436-1300
800-348-2496
847-803-6100
770-436-3030
847-925-0899
847-390-4405
TDK Corp.
www.component.tdk.com
Maxim Integrated
19
MAX13325/MAX13326
Dual Automotive, Audio Line Drivers
2
with I C Control and Diagnostic
Power-Supply Bypass Capacitor (C3)
Zener Diode (D1)
The power-supply bypass capacitor (see the Typical
Operating Circuit) lowers the output impedance of the
power supply, and reduces the impact of the MAX13325/
MAX13326 charge-pump switching transients. Bypass
During short-to-battery condition, OUT_ lifts up CHOLD
using an internal diode. In order not to violate the maxi-
mum gate-source voltage of Q1, a zener diode of appro-
priate clamping voltage should be added between the
gate and source terminals.
V
DD
with C3, the same value as C2, and place it physi-
cally close to the V
and PGND pins.
DD
Series Resistor (R1)
Normally, a series resistor for current limitation is needed
during short-to-battery condition. R1 should be chosen
Load-Dump Protection
With minimal external components, the MAX13325/
MAX13326 can be protected against automotive load-
dump conditions. See the Typical Operating Circuit.
according to (18V - V
- V
)/1mA so that no
ZENER
DD(min)
excessive current is being drawn from CHOLD.
nMOSFET (Q1)
Q1 should be selected to withstand the full-voltage expo-
> 45V). The gate-source turn-on voltage
to ensure initial
startup. Using an external nMOS, RTR020N05, 300ms
Layout and Grounding
Proper layout and grounding are essential for optimum
performance. Connect the EP and GND together at a
single point on the PCB. Ensure ground return resistance
is minimized for optimum crosstalk performance.
sure (BV
DSS
should be chosen to be less than V
CPS
duration component provides 50V load-dump protection.
Chip Information
Package Information
For the latest package outline information and land patterns
(footprints), go to www.maximintegrated.com/packages.
Note that a “+”, “#”, or “-” in the package code indicates RoHS
status only. Package drawings may show a different suffix
character, but the drawing pertains to the package regardless
of RoHS status.
PROCESS: BCD
PACKAGE
TYPE
PACKAGE
CODE
OUTLINE LAND PATTERN
NO.
NO.
28 TSSOP-EP
U28E+5
21-0108
90-0147
20
Maxim Integrated
MAX13325/MAX13326
Dual Automotive, Audio Line Drivers
2
with I C Control and Diagnostic
Revision History
REVISION
NUMBER
REVISION
DATE
PAGES
DESCRIPTION
CHANGED
0
1
1/10
3/10
Initial release
—
1
Updated the Typical Operating Circuit
Added new register bits to Tables 1, 2, and 7. Revised FLAG Register
section and added Table 2a and Charge Pump section.
2
3
4/10
6/10
1, 4, 7, 8–12, 19, 20
1, 4, 5, 7
Introduced the MAX13326. Updated the Electrical Characteristics table
and added new Typical Operating Characteristics graphs.
4
5
9/12
4/13
Corrected slave addresses in Table 18
Corrected bits D[7:6] in Table 3
17
10
Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent
licenses are implied. Maxim Integrated reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and
max limits) shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance.
Maxim Integrated 160 Rio Robles, San Jose, CA 95134 USA 1-408-601-1000
21
©
2013 Maxim Integrated
The Maxim logo and Maxim Integrated are trademarks of Maxim Integrated Products, Inc.
相关型号：
MAX13330GEE
Automotive DirectDrive Headphone Amplifiers with Output Protection and Diagnostics
MAXIM
MAX13330GEE/V+T
Automotive DirectDrive Headphone Amplifiers with Output Protection and Diagnostics
MAXIM
MAX13330GEET
Automotive DirectDrive Headphone Amplifiers with Output Protection and Diagnostics
MAXIM
MAX13330GEEV
Automotive DirectDrive Headphone Amplifiers with Output Protection and Diagnostics
MAXIM
©2020 ICPDF网 联系我们和版权申明