MAX14569EEE+T [MAXIM]

Dual-Pair LLT with Charge Pump and High-ESD Protection; 双对LLT与电荷泵和高ESD保护
MAX14569EEE+T
型号: MAX14569EEE+T
厂家: MAXIM INTEGRATED PRODUCTS    MAXIM INTEGRATED PRODUCTS
描述:

Dual-Pair LLT with Charge Pump and High-ESD Protection
双对LLT与电荷泵和高ESD保护

文件: 总14页 (文件大小:2082K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
19-5523; Rev 0; 9/10  
Dual-Pair LLT with Charge Pump  
and High-ESD Protection  
General Description  
The MAX14569 is a dedicated dual-pair unidirectional  
logic-level translator that is ideal for industrial and meter-  
Features  
S Ultra-Low Shutdown Supply Current, 0.01µA (typ)  
S Ultra-Low V Supply Current, 1µA (max)  
L
ing applications. Voltages V  
and V set the logic  
CC  
L
S Operates Down to 1.6V on V  
L
levels on either side of the device. Logic-high signals  
present on the V side of the device appear as high-  
S Continuous Current Drive Capability > 10mA  
L
voltage logic signals on the V  
vice versa.  
side of the device and  
CC  
S Extended ESD Protection on V  
Output Lines  
Input and  
CC  
±±25V Human Body Model  
±125V IEC 61000-4-± Air-Gap Discharge  
±1±5V IEC 61000-4-± Contact Discharge  
The device has two pairs of logic-level translators in  
back-to-back configuration: one logic-level translator  
from a low voltage to a high voltage and the other logic-  
level translator from a high voltage to a low voltage. The  
device also features a high-efficiency charge pump to  
S 16-Pin QSOP Pac5age  
S -40NC to +82NC Extended Operating Temperature  
boost the battery input, V  
, to V  
(5V).  
BAT  
CC  
Range  
The device features an extreme power-saving mode  
that reduces supply current to a typical 0.01FA. The  
device also features thermal short-circuit protection for  
enhanced protection in applications that route signals  
externally.  
Applications  
Automatic Meter Reader  
Remote Communications System  
Industrial Networking  
In addition, the device features enhanced high electro-  
static discharge (ESD) Human Body Model (HBM) pro-  
tection on OUTAVCC, INBVCC, OUTCVCC, and INDVCC  
ports up to Q25kV. The MAX14569 is available in a  
16-pin QSOP package, and is specified over the -40NC  
to +85NC extended temperature range.  
Ordering Information  
PART  
TEMP RANGE  
PIN-PACKAGE  
MAX14569EEE+T  
-40NC to +85NC  
16 QSOP  
+Denotes a lead(Pb)-free/RoHS-compliant package.  
T = Tape and reel.  
Typical Operating Circuit  
LITHIUM  
BATTERY  
1.8V TO 3.3V  
0.1μF  
1μF  
0.47μF  
V
V
CP1  
CP2  
L
BAT  
2.2μF  
V
CC  
5V  
µPROCESSOR  
EN  
CHARGE  
PUMP  
ENAB  
METER  
TRANSMITTER  
UNIT  
DATA  
DATA  
INAVL  
OUTBVL  
OUTAVCC  
INBVCC  
GND  
MAX14569  
EN  
DATA  
DATA  
ENCD  
INCVL  
OUTDVL  
METER  
TRANSMITTER  
UNIT  
OUTCVCC  
INDVCC  
GND  
GND  
GND  
_______________________________________________________________ Maxim Integrated Products  
1
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,  
or visit Maxim’s website at www.maxim-ic.com.  
Dual-Pair LLT with Charge Pump  
and High-ESD Protection  
ABSOLUTE MAXIMUM RATINGS  
(All voltages referenced to GND.)  
Short-Circuit Duration OUTAVCC, OUTCVCC,  
OUTBVL, OUTDVL to GND....................................Continuous  
V
V
V
, V ..................................................................-0.3V to +6V  
BAT  
CC  
CC  
L
(no shutdown condition).....................(V  
- 0.3V) to +6V  
Continuous Power Dissipation (T = +70NC)  
BAT  
A
(shutdown condition).......................................-0.3V to +6V  
+ 0.3V)  
QSOP (derate 9.6mW/NC above +70NC) ..................771.5mW  
Junction-to-Ambient Thermal Resistance (Note 1)  
CP1..........................................................-0.3V to (V  
BAT  
CP2..........................................................................-0.3V to +6V  
ENAB, ENCD...........................................................-0.3V to +6V  
INAVL, INCVL..........................................................-0.3V to +6V  
B
...........................................................................103.7NC/W  
JA  
Junction-to-Case Thermal Resistance (Note 1)  
...............................................................................37NC/W  
B
JC  
OUTBVL, OUTDVL ...................................... -0.3V to (V + 0.3V)  
Operating Temperature Range.......................... -40NC to +85NC  
Storage Temperature Range............................ -65NC to +150NC  
Junction Temperature .....................................................+150NC  
Lead Temperature (soldering, 10s) ................................+300NC  
Soldering Temperature (reflow) ......................................+260NC  
L
INBVCC, INDVCC .................................... -0.3V to (V  
OUTAVCC, OUTCVCC............................. -0.3V to (V  
Short-Circuit Current OUTAVCC,  
+ 0.3V)  
+ 0.3V)  
CC  
CC  
OUTCVCC, OUTBVL, OUTDVL to GND ................Continuous  
Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-  
layer board. For detailed information on package thermal considerations, refer to www.maxim-ic.com/thermal-tutorial.  
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional  
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute  
maximum rating conditions for extended periods may affect device reliability.  
ELECTRICAL CHARACTERISTICS  
(V  
BAT  
= 2.3V to 5.5V, V = 1.6V to 5.5V, C  
= 1FF, C  
= 2.2FF, C = 0.1FF, T = -40NC to +85NC, unless otherwise noted.  
VCC VL A  
L
VBAT  
Typical values are at V  
= 3.6V, V = 3.0V, and T = +25NC.) (Notes 2, 3, 4)  
BAT  
L
A
PARAMETER  
SYMBOL  
CONDITIONS  
MIN  
TYP  
MAX  
UNITS  
POWER SUPPLIES  
V
V
Supply Range  
V
2.3  
1.6  
5.5  
5.5  
V
V
BAT  
BAT  
Supply Range  
V
L
L
INBVCC = INDVCC = V  
,
CC  
Supply Current from V  
I
1
FA  
FA  
FA  
L
QVL  
INAVL = INCVL = V  
L
V
BAT  
Shutdown Supply  
V
V
= V  
= 0V,  
= 0V  
INAVL  
INCVL  
I
0.01  
0.01  
0.5  
0.5  
SHDN-VBAT  
Current  
= V  
ENAB  
ENCD  
V
Shutdown Supply  
L
I
V
= V  
= 0V  
SHDN-VL  
ENAB  
ENAB  
ENCD  
ENCD  
Current  
V
Change in Supply  
BAT  
V
= V  
= V  
IL  
Current with ENAB and  
ENCD at V  
DI  
1
FA  
VBAT  
(Notes 2, 4, 5)  
IL  
OUTAVCC Shutdown  
Mode Leakage Current  
V
V
= 0V, V  
= V ,  
ENAB  
ENCD IH  
I
0.01  
0.01  
1
1
FA  
FA  
OUTAVCC_LEAK  
= 5V  
OUTAVCC  
OUTCVCC Shutdown  
Mode Leakage Current  
V
V
= V , V  
= 0V,  
IH ENCD  
ENAB  
I
OUTCVCC_LEAK  
= 5V  
OUTCVCC  
OUTBVL, OUTDVL  
Shutdown Mode  
Leakage Current  
I
V
V
= V  
= 0V,  
OUTBVL_LEAK  
ENAB  
ENCD  
0.01  
1
FA  
I
= V  
= 0V  
OUTDVL_LEAK  
OUTBVL  
OUTDVL  
INBVCC Shutdown Mode  
Leakage Current  
V
V
= 0V, V  
= V ,  
ENAB  
ENCD IH  
I
0.01  
0.01  
1
1
FA  
FA  
INBVCC_LEAK  
= 5V  
INBVCC  
INDVCC Shutdown Mode  
Leakage Current  
V
V
= V , V  
= 0V,  
ENAB  
IH ENCD  
I
INDVCC_LEAK  
= 5V  
INDVCC  
2
Dual-Pair LLT with Charge Pump  
and High-ESD Protection  
ELECTRICAL CHARACTERISTICS (continued)  
(V  
BAT  
= 2.3V to 5.5V, V = 1.6V to 5.5V, C  
= 1FF, C  
= 2.2FF, C = 0.1FF, T = -40NC to +85NC, unless otherwise noted.  
L
VBAT  
VCC  
VL  
A
Typical values are at V  
= 3.6V, V = 3.0V, and T = +25NC.) (Notes 2, 3, 4)  
BAT  
L
A
PARAMETER  
SYMBOL  
CONDITIONS  
MIN  
TYP  
MAX  
UNITS  
INAVL, INCVL Leakage  
Current  
I
INAVL_LEAK  
V
V
= V  
= V  
L
0.01  
1
FA  
INAVL  
INCVL  
I
INCVL_LEAK  
ENAB, ENCD Input  
Leakage Current  
I
I
ENAB_LEAK  
= V  
= 5V  
0.01  
250  
1
FA  
ENAB  
ENCD  
ENCD_LEAK  
OUTAVCC, OUTCVCC  
Short-Circuit Output  
Current  
V
V
V
= 0V or  
= 0V,  
OUTAVCC  
OUTCVCC  
I
100  
mA  
SH  
R 2.7V  
BAT  
LOGIC LEVELS  
INAVL, INCVL Input-  
Voltage High  
V
0.7 x V  
V
V
IHL  
L
INAVL, INCVL Input-  
Voltage Low  
V
0.3 x V  
ILL  
L
INBVCC, INDVCC Input-  
Voltage High  
V
IHC  
0.7 x V  
V
CC  
INBVCC, INDVCC Input-  
Voltage Low  
V
ILC  
0.3 x V  
V
CC  
ENAB, ENCD Input-  
Voltage High  
V
IH  
1.2  
V
ENAB, ENCD Input-  
Voltage Low  
V
IL  
0.4  
V
ENAB, ENCD Input-  
Voltage Hysteresis  
V
HYS  
120  
mV  
OUTBVL or OUTDVL source  
current = 100FA, INBVCC or  
V
V
- 0.1  
L
L
INDVCC > V  
IHC  
OUTBVL, OUTDVL  
Output-Voltage High  
V
V
V
OHL  
OUTBVL or OUTDVL source  
current = 4mA, INBVCC or  
- 0.4  
INDVCC > V  
IHC  
OUTBVL or OUTDVL sink  
current = 100FA, INBVCC or  
0.1  
0.4  
INDVCC < V  
ILC  
OUTBVL, OUTDVL  
Output-Voltage Low  
V
OLL  
OUTBVL or OUTDVL sink  
current = 4mA,  
INBVCC or INDVCC < V  
ILC  
OUTAVCC or OUTCVCC  
source current = 100FA,  
4.6  
4.3  
INAVL or INCVL > V , 2.7V P  
IHL  
V
BAT  
P4.5V  
OUTAVCC, OUTCVCC  
Output-Voltage High  
V
OHC  
V
OUTAVCC or OUTCVCC  
source current = 20mA,  
INAVL or INCVL > V  
IHL,  
2.7V P V  
P 4.5V  
BAT  
3
Dual-Pair LLT with Charge Pump  
and High-ESD Protection  
ELECTRICAL CHARACTERISTICS (continued)  
(V  
BAT  
= 2.3V to 5.5V, V = 1.6V to 5.5V, C  
= 1FF, C  
= 2.2FF, C = 0.1FF, T = -40NC to +85NC, unless otherwise noted.  
L
VBAT  
VCC  
VL  
A
Typical values are at V  
= 3.6V, V = 3.0V, and T = +25NC.) (Notes 2, 3, 4)  
BAT  
L
A
PARAMETER  
SYMBOL  
CONDITIONS  
MIN  
TYP  
MAX  
UNITS  
OUTAVCC or OUTCVCC  
sink current = 100FA,  
0.1  
INAVL or INCVL < V  
2.7V P  
ILL,  
V
P4.5V  
BAT  
OUTAVCC, OUTCVCC  
Output-Voltage Low  
V
V
OLC  
OUTAVCC or OUTCVCC  
sink current = 20mA,  
INAVL or INCVL < V  
0.4  
ILL,  
2.7V P V  
P 4.5V  
BAT  
TIMING CHARACTERISTICS (Note 6)  
OUTAVCC, OUTCVCC  
Rise Time  
t
Figure 1  
Figure 1  
Figure 2  
Figure 2  
25  
25  
25  
25  
ns  
ns  
ns  
ns  
RVCC  
OUTAVCC, OUTCVCC  
Fall Time  
t
FVCC  
OUTBVL, OUTDVL Rise  
Time  
t
RVL  
OUTBVL, OUTDVL Fall  
Time  
t
FVL  
Propagation Delay  
(Driving INAVL, INCVL)  
Low-to-High  
t
t
t
t
Figure 1  
Figure 1  
Figure 2  
Figure 2  
30  
30  
30  
30  
ns  
ns  
ns  
PVL-VCC-LH  
PVL-VCC-HL  
PVCC-VL-LH  
PVCC-VL-HL  
Propagation Delay  
(Driving INAVL, INCVL)  
High-to-Low  
Propagation Delay  
(Driving INBVCC,  
INDVCC) Low-to-High  
Propagation Delay  
(Driving INBVCC,  
ns  
INDVCC) High-to-Low  
Maximum Data Rate  
12  
Mbps  
CHARGE PUMP  
I
I
= 10mA, 2.7V PV  
= 40mA, 3.0V PV  
P4.5V  
P4.5V  
4.7  
4.7  
5.0  
5.0  
5.3  
5.3  
CC  
BAT  
V
CC  
Output Voltage  
V
CC  
V
CC  
BAT  
V
Output Voltage  
CC  
I
= 40mA  
45  
mV  
P-P  
CC  
Ripple  
I
= 10mA,  
CC  
V
V
Line Regulation  
Load Regulation  
-1  
+1  
%
CC  
2.7V P V  
P 4.5V  
BAT  
DV  
0 P I  
P 40mA, V = 3.6V  
BAT  
-1  
%
CC  
CC  
CC  
Quiescent Current  
I
I
= 0mA, V  
BAT  
= 3.6V  
200  
0.5  
FA  
Q
CC  
V
V
= 3.6V, V  
CC  
= 0V  
BAT  
CP_ Leakage Current  
I
0.01  
FA  
CP_LEAK  
= V  
= 0V  
ENAB  
ENCD  
4
Dual-Pair LLT with Charge Pump  
and High-ESD Protection  
ELECTRICAL CHARACTERISTICS (continued)  
(V  
BAT  
= 2.3V to 5.5V, V = 1.6V to 5.5V, C  
= 1FF, C  
= 2.2FF, C = 0.1FF, T = -40NC to +85NC, unless otherwise noted.  
L
VBAT  
VCC  
VL  
A
Typical values are at V  
= 3.6V, V = 3.0V, and T = +25NC.) (Notes 2, 3, 4)  
BAT  
L
A
PARAMETER  
SYMBOL  
CONDITIONS  
No capacitor between CP1 and  
MIN  
TYP  
MAX  
UNITS  
CP_ Switching Frequency  
Efficiency  
f
0.5  
1
1.5  
MHz  
CP  
CP2, 2.7V P V  
P 4.5V  
BAT  
I
= 10mA, V  
= 2.7V,  
CC  
BAT  
E
90  
%
V
CC  
= 5.0V  
THERMAL PROTECTION  
Thermal Shutdown  
T
+150  
+20  
NC  
NC  
SHDN  
Thermal Hysteresis  
ESD PROTECTION  
T
HYST  
Human Body Model  
±25  
±15  
IEC 61000-4-2 Air Gap  
Discharge  
OUTAVCC, INBVCC,  
OUTCVCC, INDVCC  
kV  
kV  
IEC 61000-4-2 Contact  
Discharge  
±12  
±2  
All Other Pins  
Human Body Model  
Note 2: V must be less than or equal to V  
during normal operation. However, V can be greater than V  
during startup and  
L
CC  
L
CC  
shutdown conditions.  
Note 3: All units are 100% production tested at T = +25NC. Limits over the operating temperature range are guaranteed by design  
A
and not production tested.  
Note 4: Connect a 0.47µF capacitor between CP1 and CP2.  
Note 5: DI  
= [I  
(V  
= V  
= V ) - I  
(V  
= V = 0V)]. Guaranteed by design and not production tested.  
ENCD  
VBAT  
VBAT ENAB  
ENCD  
IL  
VBAT ENAB  
Note 6: V  
= 5.0V, V = 1.6V to V , V  
= 2.7V to 3.6V, V  
= V > V , R = 50I, R = 1MI, C = 15pF, T = -40NC to  
ENCD IH S L L A  
CC  
L
CC BAT  
ENAB  
+85NC, unless otherwise noted. Typical values are at V  
= 3.6V, V = 3.0V, and T = +25NC.  
BAT  
L A  
5
Dual-Pair LLT with Charge Pump  
and High-ESD Protection  
t
t
FVCC  
RVCC  
V
V
BAT  
L
90%  
90%  
INAVL/  
INCVL  
MAX14569  
V
V
L
CC  
50%  
50%  
OUTAVCC/  
OUTCVCC  
INAVL/  
INCVL  
50I  
50%  
10%  
50%  
C
L
R
L
OUTAVCC/  
OUTCVCC  
10%  
t
t
PVL-VCC-HL  
PVL-VCC-LH  
Figure 1. Push-Pull Driving INAVL/INCVL Test Circuit and Timing  
t
t
FVL  
RVL  
V
V
BAT  
L
OUTBVL/  
OUTDVL  
MAX14569  
V
V
L
CC  
90%  
90%  
50%  
OUTBVL/  
OUTDVL  
INBVCC/  
INDVCC  
50%  
50I  
50%  
50%  
C
L
R
L
INBVCC/  
INDVCC  
10%  
10%  
t
t
PVCC-VL-HL  
PVCC-VL-LH  
Figure 2. Push-Pull Driving INBVCC/INDVCC Test Circuit and Timing  
6
Dual-Pair LLT with Charge Pump  
and High-ESD Protection  
Typical Operating Characteristics  
(V  
= 3.6V, V = 3V, C  
= 1FF, C  
= 2.2FF, C = 0.1FF, connect 0.47FF capacitor between CP1 and CP2, data rate =  
VCC VL  
BAT  
L
VBAT  
1Mbps, T = +25NC, unless otherwise noted.)  
A
V
BAT  
SHUTDOWN SUPPLY CURRENT  
V SHUTDOWN SUPPLY CURRENT  
L
V
SHUTDOWN SUPPLY CURRENT  
vs. TEMPERATURE  
BAT  
vs. V  
VOLTAGE  
vs. V VOLTAGE  
BAT  
L
5.0  
4.5  
4.0  
3.5  
3.0  
2.5  
2.0  
1.5  
1.0  
0.5  
0
0.50  
0.45  
0.40  
0.35  
0.30  
0.25  
0.20  
0.15  
0.10  
0.05  
0
10  
9
8
7
6
5
4
3
2
1
0
V
V
= V  
ENCD  
= 0V  
= 0V  
V
= V = 0V  
ENCD  
V
V
= V  
ENCD  
= 0V  
= 0V  
ENAB  
INAVL  
ENAB  
ENAB  
INAVL  
= V  
INCVL  
= V  
INCVL  
V
= 4.5V  
BAT  
V
= 3.6V  
BAT  
V
= 2.7V  
BAT  
2.3  
3.1  
3.9  
VOLTAGE (V)  
4.7  
5.5  
1.6  
2.3  
0
2.1  
2.6  
V VOLTAGE (V)  
3.1  
3.6  
-40  
-15  
10  
35  
60  
85  
V
TEMPERATURE (°C)  
BAT  
L
V SHUTDOWN SUPPLY CURRENT  
L
CP_ OPERATING FREQUENCY  
V
SHORT-CIRCUIT CURRENT  
CC  
vs. TEMPERATURE  
vs. V  
vs. V  
BAT  
BAT  
0.8  
0.7  
0.6  
0.5  
0.4  
0.3  
0.2  
0.1  
0
1000  
990  
980  
970  
960  
950  
940  
930  
920  
910  
900  
1000  
900  
800  
700  
600  
500  
400  
300  
200  
100  
0
V
= V = 0V  
ENCD  
ENAB  
OUTAVCC/OUTCVCC  
SHORT-TO-GROUND  
T
= -40°C  
A
T
A
= -40°C  
T
= 25°C  
A
V = 3.3V  
L
T
= 25°C  
= 85°C  
A
T
A
= 85°C  
V = 2.7V  
L
T
A
V = 1.8V  
L
-40  
-15  
10  
35  
60  
85  
2.3  
3.2  
4.1  
5.0  
3.2  
4.1  
5.0  
TEMPERATURE (°C)  
V
(V)  
V
BAT  
(V)  
BAT  
CP_ LINE REGULATION  
(V vs. V  
CP_ LOAD REGULATION  
(V vs. I  
)
)
CC  
OUTPUT RIPPLE vs. LOAD CURRENT  
CC  
BAT  
CC  
5.10  
5.08  
5.06  
5.04  
5.02  
5.00  
4.98  
4.96  
4.94  
4.92  
4.90  
5.2  
5.1  
5.0  
4.9  
4.8  
4.7  
4.6  
4.5  
200  
180  
160  
140  
120  
100  
80  
ENAB = ENCD = HIGH  
ENAB = ENCD = HIGH  
ENAB = ENCD = HIGH  
= 10mA  
V
= 3.6V  
I
BAT  
CC  
60  
40  
20  
0
2.7  
3.0  
3.3  
3.6  
(V)  
3.9  
4.2  
4.5  
0
5
10 15 20 25 30 35 40  
(mA)  
5
10 15 20 25 30 35 40  
(mA)  
V
I
CC  
I
BAT  
CC  
7
Dual-Pair LLT with Charge Pump  
and High-ESD Protection  
Typical Operating Characteristics (continued)  
(V  
= 3.6V, V = 3V, C  
= 1FF, C  
= 2.2FF, C = 0.1FF, connect 0.47FF capacitor between CP1 and CP2, data rate =  
VCC VL  
BAT  
L
VBAT  
1Mbps, T = +25NC, unless otherwise noted.)  
A
OUTBVL/OUTDVL FALL TIME  
vs. LOAD CAPACITANCE  
OUTBVL/OUTDVL RISE TIME  
vs. LOAD CAPACITANCE  
10  
9
8
7
6
5
4
3
2
1
0
10  
9
8
7
6
5
4
3
2
1
0
0
20  
40  
60  
80  
100  
0
0
0
20  
40  
60  
80  
100  
1000  
1000  
LOAD CAPACITANCE (pF)  
LOAD CAPACITANCE (pF)  
OUTBVL/OUTDVL PROPAGATION DELAY  
vs. LOAD CAPACITANCE  
OUTAVCC/OUTCVCC FALL TIME  
vs. LOAD CAPACITANCE  
10  
9
8
7
6
5
4
3
2
1
0
100  
90  
80  
70  
60  
50  
40  
30  
20  
10  
0
t
PVCC-VL-HL  
t
PVCC-VL-LH  
0
20  
40  
60  
80  
100  
200  
400  
600  
800  
LOAD CAPACITANCE (pF)  
LOAD CAPACITANCE (pF)  
OUTAVCC/OUTCVCC RISE TIME  
vs. LOAD CAPACITANCE  
OUTAVCC/OUTCVCC PROPAGATION  
DELAY vs. LOAD CAPACITANCE  
100  
90  
80  
70  
60  
50  
40  
30  
20  
10  
0
100  
90  
80  
70  
60  
50  
40  
30  
20  
10  
0
t
PVL-VCC-HL  
t
PVL-VCC-LH  
0
200  
400  
600  
800  
1000  
200  
400  
600  
800  
LOAD CAPACITANCE (pF)  
LOAD CAPACITANCE (pF)  
8
Dual-Pair LLT with Charge Pump  
and High-ESD Protection  
Typical Operating Characteristics (continued)  
(V  
= 3.6V, V = 3V, C  
= 1FF, C  
= 2.2FF, C = 0.1FF, connect 0.47FF capacitor between CP1 and CP2, data rate =  
BAT  
L
VBAT  
VCC  
VL  
1Mbps, T = +25NC, unless otherwise noted.)  
A
DRIVING INAVL/INCVL  
DRIVING INAVL/INCVL  
MAX14569 toc16  
MAX14569 toc17  
C
/C  
= 15pF  
C
/C  
= 150pF  
OUTAVCC OUTCVCC  
OUTAVCC OUTCVCC  
IN_VL  
2V/div  
IN_VL  
2V/div  
OUT_VCC  
2V/div  
OUT_VCC  
2V/div  
400ns/div  
400ns/div  
DRIVING INAVL/INCVL  
DRIVING INBVCC/INDVCC  
MAX14569 toc19  
MAX14569 toc18  
C
/C  
= 1000pF  
OUTAVCC OUTCVCC  
IN_VL  
2V/div  
IN_VCC  
2V/div  
OUT_VCC  
2V/div  
OUT_VL  
2V/div  
C
/C  
= 15pF  
OUTBVL OUTDVL  
400ns/div  
400ns/div  
9
Dual-Pair LLT with Charge Pump  
and High-ESD Protection  
Pin Configuration  
TOP VIEW  
+
V
1
2
3
4
5
6
7
8
16 CP1  
L
V
ENAB  
ENCD  
15  
BAT  
MAX14569  
14 CP2  
V
13  
INAVL  
CC  
OUTBVL  
INCVL  
OUTDVL  
GND  
12 OUTAVCC  
11 INBVCC  
10 OUTCVCC  
9
INDVCC  
QSOP  
Pin Description  
PIN  
NAME  
FUNCTION  
Logic Supply Voltage, +1.6V to +5.5V. Bypass V to GND with a 0.1FF capacitor placed as close  
as possible to the device.  
L
1
V
L
Enable Input for A and B Ports. Drive ENAB low for shutdown mode, or drive ENAB high for normal  
operation.  
2
3
ENAB  
ENCD  
Enable Input for C and D Ports. Drive ENCD low for shutdown mode, or drive ENCD high for normal  
operation.  
4
5
INAVL  
OUTBVL  
INCVL  
Input A Port. Referenced to V .  
L
Output B Port. Referenced to V .  
L
6
Input C Port. Referenced to V .  
L
7
OUTDVL  
GND  
Output D Port. Referenced to V .  
L
8
Ground  
9
INDVCC  
Input D Port. Referenced to V  
.
CC  
10  
11  
12  
OUTCVCC Output C Port. Referenced to V  
.
CC  
INBVCC  
Input B Port. Referenced to V  
.
CC  
OUTAVCC Output A Port. Referenced to V  
.
CC  
Charge-Pump Output. Bypass V  
to GND with a 2.2FF ceramic capacitor placed as close as  
CC  
13  
V
CC  
possible to the V pin to have high ESD protection on OUTAVCC, INBVCC, OUTCVCC, and  
CC  
INDVCC pins.  
14  
15  
16  
CP2  
External Charge-Pump Capacitor Connection  
Battery Input, +2.3V to +5.5V. Bypass V  
possible to the device.  
to GND with a 1FF capacitor placed as close as  
BAT  
V
BAT  
CP1  
External Charge-Pump Capacitor Connection  
10  
Dual-Pair LLT with Charge Pump  
and High-ESD Protection  
Level Translation  
Detailed Description  
The MAX14569 is a dedicated dual-pair unidirectional  
logic-level translator that is ideal for automatic remote-  
For proper operation, ensure that 2.3V P V  
P 5.5V,  
BAT  
1.6V PV P5.5V. The device enters low-power shutdown  
L
mode when ENAB = ENCD = GND (see the Functional  
Table). In shutdown mode, the INAVL, INBVCC, INCVL,  
INDVCC, OUTAVCC and OUTCVCC are in high-imped-  
ance mode and the OUTBVL and OUTDVL are pulled  
down to GND. The maximum data rate depends heavily  
on the load capacitance (see the rise/fall times in the  
Typical Operating Characteristics), output impedance of  
the driver, and the operating voltage range.  
metering applications. Externally applied voltage V  
L
and regulated output voltage V  
either side of the device.  
set the logic levels on  
CC  
The device boosts the V  
supply input voltage to a  
BAT  
charge-pump-regulated output, V . Logic-high signals  
CC  
present on the V side of the device appear as a high-  
L
voltage logic signals on the V  
vice versa.  
side of the device and  
CC  
Output Load Requirements  
The device is designed to drive a wide variety of load  
types including a high capacitive load. To protect the  
The device has two pairs of logic-level translators in  
back-to-back configuration: one logic-level translator  
from a low voltage to a high voltage and the other logic-  
level translator from a high voltage to a low voltage.  
V
outputs (OUTAVCC, OUTCVCC) from a harsh  
CC  
external environment, the V  
outputs are ruggedized  
CC  
The device features an extreme power-saving mode that  
reduces supply current to a typical 0.01FA. The device  
with a high ESD-capable output structure. When the high  
capacitive load is connected to the V output side, the  
CC  
also features thermal short-circuit protection on the V  
CC  
current is limited by the charge-pump circuit along with  
the output driver impedance. The device is also pro-  
tected by the thermal protection.  
side for enhanced protection in applications that route  
signals externally.  
Functional Diagram  
Functional Table  
INPUTS  
DRIVERS OUTPUT EVENTS  
V
V
BAT  
L
ENAB  
ENCD  
Device is in shutdown  
OUTAVCC, OUTCVCC: high impedance  
OUTBVL, OUTDVL: pulldown to GND  
V
CHARGE  
PUMP  
CC  
Low  
Low  
MAX14569  
ENAB  
V
V
L
CC  
OUTAVCC: high impedance  
OUTBVL: pulldown to GND  
INCVL to OUTCVCC  
INAVL  
OUTAVCC  
INBVCC  
Low  
High  
High  
High  
Low  
INDVCC to OUTDVL  
V
V
L
CC  
INAVL to OUTAVCC  
INBVCC to OUTBVL  
OUTCVCC: high impedance  
OUTDVL: pulldown to GND  
OUTBVL  
ENCD  
INCVL  
V
V
V
V
L
L
CC  
CC  
OUTCVCC  
INDVCC  
INAVL to OUTAVCC  
INBVCC to OUTBVL  
INCVL to OUTCVCC  
INDVCC to OUTDVL  
High  
OUTDVL  
GND  
11  
Dual-Pair LLT with Charge Pump  
and High-ESD Protection  
discharges encountered during handling and assem-  
Shutdown Mode  
The device features two enable inputs (ENAB, ENCD)  
that place the device into a low-power shutdown mode  
when both are driven low. If either ENAB or ENCD is  
pulled high, the internal charge pump starts working and  
bly. The OUTAVCC, INBVCC, OUTCVCC, INDVCC pins  
have extra protection against static electricity. Maxim’s  
engineers have developed state-of-the-art structures to  
protect these pins against ESD of Q25kV without dam-  
age. The ESD structures withstand high ESD in all states:  
normal operation, shutdown, and powered down. After  
an ESD event, the device keeps working without latchup  
or damage.  
generates 5V on V . When both ENAB and ENCD are  
CC  
driven low, the MAX14569 enters shutdown mode and  
draws a minimum current from V and V  
. To minimize  
BAT  
L
supply current in shutdown mode, connect INAVL and  
INCVL to ground.  
ESD protection can be tested in various ways. The  
OUTAVCC, INBVCC, OUTCVCC, and INDVCC pins are  
characterized for protection to the following limits:  
Charge Pump  
The internal charge pump provides 5V on V  
when  
CC  
V
is between 2.7V and 4.5V. When V  
is between  
. The  
BAT  
U
U
Q25kV using the Human Body Model  
BAT  
BAT  
2.3V and 2.7V, V  
output is regulated to 5V as long as the battery voltage  
supports it.  
is twice the voltage of V  
CC  
Q15kV using the Air-Gap Discharge Method specified  
in IEC 61000-4-2  
U
Q12kV using the Contact Discharge Method specified  
Thermal Protection  
The device features thermal shutdown function neces-  
sary to protect the device. When the junction tempera-  
ture exceeds +150NC (typ), the charge pump turns off  
and OUTAVCC, OUTBVL, OUTCVCC, OUTDVL are low.  
This limits the device temperature from rising further.  
When the temperature drops 20NC (typ) below +150NC  
(typ), the device resumes normal operation.  
in IEC 61000-4-2  
ESD Test Conditions  
ESD performance depends on a variety of conditions.  
Contact Maxim for a reliability report that documents test  
setup, test methodology, and test results.  
Human Body Model  
Figure 3 shows the Human Body Model, and Figure 4  
shows the current waveform it generates when dis-  
charged into a low-impedance state. This model consists  
of a 100pF capacitor charged to the ESD voltage of inter-  
est, which is then discharged into the test device through  
a 1.5kI resistor.  
Applications Information  
Layout Recommendations  
Use standard high-speed layout practices when laying  
out a board with the device. For example, to minimize  
line coupling, place all other signal lines not connected  
to the device at least 1x the substrate height of the PCB  
away from the input and output lines of the device.  
IEC 61000-4-±  
The IEC 61000-4-2 standard covers ESD testing and  
performance of finished equipment. It does not spe-  
cifically refer to integrated circuits. The major difference  
between tests done using the Human Body Model and  
IEC 61000-4-2 is higher peak current in IEC 61000-4-2,  
because series resistance is lower in the IEC 61000-4-2  
model. Hence, the ESD withstand voltage measured to  
IEC 61000-4-2 is generally lower than that measured  
using the Human Body Model. Figure 5 shows the IEC  
61000-4-2 model, and Figure 6 shows the current wave-  
form for the Q8kV, IEC 61000-4-2, level 4, ESD Contact  
Discharge Method.  
Power-Supply Decoupling  
To reduce ripple and the chance of introducing data  
errors, bypass V to ground with a 0.1FF ceramic capac-  
L
itor, V  
to ground with a 1FF ceramic capacitor, and  
BAT  
V
CC  
to ground with a 2.2FF ceramic capacitor. Place  
all capacitors as close as possible to the power-supply  
inputs.  
±±5ꢀk ESD Protection  
As with all Maxim devices, ESD protection structures are  
incorporated on all pins to protect against electrostatic  
12  
Dual-Pair LLT with Charge Pump  
and High-ESD Protection  
R
C
R
D
R
C
R
D
50Mto 100MΩ  
330Ω  
1M  
1500Ω  
DISCHARGE  
RESISTANCE  
DISCHARGE  
RESISTANCE  
CHARGE CURRENT  
LIMIT RESISTOR  
CHARGE-CURRENT  
LIMIT RESISTOR  
HIGH-  
VOLTAGE  
DC  
HIGH-  
VOLTAGE  
DC  
DEVICE  
UNDER  
TEST  
DEVICE  
UNDER  
TEST  
C
s
150pF  
STORAGE  
CAPACITOR  
C
s
100pF  
STORAGE  
CAPACITOR  
SOURCE  
SOURCE  
Figure 3. Human Body ESD Test Model  
Figure 5. IEC 61000-4-2 ESD Test Model  
I
100%  
90%  
I 100%  
P
90%  
PEAK-TO-PEAK RINGING  
(NOT DRAWN TO SCALE)  
I
r
AMPERES  
36.8%  
10%  
0
TIME  
0
t
RL  
10%  
t = 0.7ns to 1ns  
t
DL  
CURRENT WAVEFORM  
r
t
30ns  
60ns  
Figure 4. Human Body Current Waveform  
Figure 6. IEC 61000-4-2 ESD Generator Current Waveform  
Chip Information  
Pacꢀage Information  
For the latest package outline information and land patterns,  
go to www.maxim-ic.com/packages. Note that a “+”, “#”, or  
“-“ in the package code indicates RoHS status only. Package  
drawings may show a different suffix character, but the drawing  
pertains to the package regardless of RoHS status.  
PROCESS: BiCMOS  
PACKAGE  
TYPE  
PACKAGE  
CODE  
OUTLINE  
NO.  
LAND  
PATTERN NO.  
16 QSOP  
E16+4  
21-0055  
90-0167  
13  
Dual-Pair LLT with Charge Pump  
and High-ESD Protection  
Revision History  
REVISION REVISION  
DESCRIPTION  
PAGES  
CHANGED  
NUMBER  
DATE  
0
9/10  
Initial release  
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied.  
Maxim reserves the right to change the circuitry and specifications without notice at any time.  
14  
Maxim Integrated Products, 1±0 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600  
2010 Maxim Integrated Products Maxim is a registered trademark of Maxim Integrated Products, Inc.  
©

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