MAX15026BATD [MAXIM]
Low-Cost, Small, 4.5V to 28V Wide Operating Range, DC-DC Synchronous Buck Controller; 低成本，小尺寸， 4.5V至28V的宽工作电压范围， DC-DC同步降压控制器
| 型号： | MAX15026BATD |
| 厂家： | 
MAXIM INTEGRATED PRODUCTS |
| 描述： | Low-Cost, Small, 4.5V to 28V Wide Operating Range, DC-DC Synchronous Buck Controller |
| 文件： | 总23页 (文件大小：411K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
19-4108; Rev 4; 2/12
Low-Cost, Small, 4.5V to 28V Wide Operating
Range, DC-DC Synchronous Buck Controller
MAX15026
General Description
Features
o 4.5V to 28V or 5V ±±10 ꢀInpt ꢁpnnꢂl ꢃRIꢄg
The MAX15026 synchronous step-down controller oper-
ates from a 4.5V to 28V input voltage range and gener-
ates an adjustable output voltage from 85% of the input
voltage down to 0.6V while supporting loads up to 25A.
The device allows monotonic startup into a prebiased
bus without discharging the output and features adap-
tive internal digital soft-start.
o 1.6V to (1.85 x V ) AdjpstRbꢂg Optnpt
o AdjpstRbꢂg 211kHz to 2MHz ꢁwitchiIꢄ FrgqpgIcl
o Abiꢂitl to ꢁtRrt iIto R PrgbiRsgd LoRd
o Lossꢂgss, Clcꢂg-bl-Clcꢂg VRꢂꢂgl Modg CprrgIt
Limit with AdjpstRbꢂg, TgmngrRtprg-ComngIsRtgd
Thrgshoꢂd
ꢀN
o ꢁiIk-Modg CprrgIt-Limit ProtgctioI
o AdRntivg ꢀItgrIRꢂ DiꢄitRꢂ ꢁoft-ꢁtRrt
o ±±0 AccprRtg VoꢂtRꢄg ꢃgfgrgIcg
o ꢀItgrIRꢂ Boost Diodg
The MAX15026 offers the ability to adjust the switching
frequency from 200kHz to 2MHz with an external resis-
tor. The MAX15026’s adaptive synchronous rectification
eliminates the need for an external freewheeling
Schottky diode. The device also utilizes the external
low-side MOSFET’s on-resistance as a current-sense
element, eliminating the need for a current-sense resis-
tor. This protects the DC-DC components from damage
during output overloaded conditions or output short-
circuit faults without requiring a current-sense resistor.
Hiccup-mode current limit reduces power dissipation
during short-circuit conditions. The MAX15026 includes
a power-good output and an enable input with precise
turn-on/turn-off threshold, which can be used for input
supply monitoring and for power sequencing.
o AdRntivg ꢁlIchroIops ꢃgctificRtioI EꢂimiIRtgs
ExtgrIRꢂ FrggwhggꢂiIꢄ ꢁchottkl Diodg
o Hiccpn-Modg ꢁhort-Circpit ProtgctioI
o ThgrmRꢂ ꢁhptdowI
o Powgr-Good Optnpt RId EIRbꢂg ꢀInpt for Powgr
ꢁgqpgIciIꢄ
o ±50 AccprRtg EIRbꢂg ꢀInpt Thrgshoꢂd
o AEC-Q±11 QpRꢂifigd (MAX±5126B)
Ordering Information
PART
TEMP RANGE
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
PIN-PACKAGE
14 TDFN-EP*
14 TDFN-EP*
14 TDFN-EP*
14 TDFN-EP*
14 TDFN-EP*
14 TDFN-EP*
Additional protection features include sink-mode cur-
rent limit and thermal shutdown.
MAX15026BETD+
MAX15026BETD/V+T
MAX15026CETD+
MAX15026BATD+
MAX15026CATD+
MAX15026DATD+
Sink-mode current limit prevents reverse inductor cur-
rent from reaching dangerous levels when the device is
sinking current from the output.
The MAX15026 is available in a space-saving and ther-
mally enhanced 3mm x 3mm, 14-pin TDFN-EP pack-
age. The MAX15026 operates over the extended -40°C
to +85°C and automotive -40°C to +125°C temperature
ranges.
+Denotes a lead(Pb)-free/RoHS-compliant package.
*EP = Exposed pad. T = Tape and reel.
/V denotes an automotive qualified part.
MAX15026C recommended for new designs.
The MAX15026C is designed to provide additional mar-
gin for break-before-make times.
Pin Configuration
The MAX15026B/MAX15026C provide a soft-stop
feature to ramp down the output voltage at turn-off. The
soft-stop function is disabled in the MAX15026D.
TOP VIEW
V
IN
1
2
3
4
5
6
7
14 DH
13 LX
+
Applications
CC
Set-Top Boxes
PGOOD
EN
BST
DL
12
11
10
9
LCD TV Secondary Supplies
Switches/Routers
MAX15026
LIM
DRV
GND
RT
Power Modules
COMP
FB
*EP
DSP Power Supplies
Points-of-Load Regulators
8
TDFN
(3mm x 3mm)
*EP = EXPOSED PAD.
________________________________________________________________ MRxim ꢀItgꢄrRtgd Prodpcts
±
For nriciIꢄ, dgꢂivgrl, RId ordgriIꢄ iIformRtioI, nꢂgRsg coItRct MRxim Dirgct Rt ±-888-629-4642,
or visit MRxim’s wgbsitg Rt www.mRxim-ic.com.
Low-Cost, Small, 4.5V to 28V Wide Operating
Range, DC-DC Synchronous Buck Controller
ABꢁOLUTE MAXꢀMUM ꢃATꢀNGꢁ
IN to GND...............................................................-0.3V to +30V
BST to GND............................................................-0.3V to +36V
LX to GND .................................................................-1V to +30V
EN to GND................................................................-0.3V to +6V
PGOOD to GND .....................................................-0.3V to +30V
BST to LX..................................................................-0.3V to +6V
DRV Input Current.............................................................600mA
PGOOD Sink Current ............................................................5mA
Continuous Power Dissipation (T = +70°C) (Note 1)
A
14-Pin TDFN-EP, Multilayer Board
(derate 24.4mW/°C above +70°C)..............................1951mW
Operating Temperature Range
DH to LX ...............................................….-0.3V to (V
DRV to GND .............................................................-0.3V to +6V
+ 0.3V)
MAX15026B/CETD+, MAX15026BETD/V+.......-40°C to +85°C
MAX15026B/C/DATD+ ...................................-40°C to +125°C
Junction Temperature......................................................+150°C
Storage Temperature Range.............................-60°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
Soldering Temperature (reflow) .......................................+260°C
BST
DL to GND ................................................-0.3V to (V
+ 0.3V)
DRV
V
to GND...............-0.3V to the lower of +6V and (V + 0.3V)
CC
IN
CC
MAX15026
All Other Pins to GND.................................-0.3V to (V
+ 0.3V)
V
CC
Short Circuit to GND...........................................Continuous
Notg ±: Dissipation wattage values are based on still air with no heatsink. Actual maximum power dissipation is a function of heat
extraction technique and may be substantially higher. Package thermal resistances were obtained using the method
described in JEDEC specification JESD51-7, using a four-layer board. For detailed information on package thermal consid-
erations, refer to www.mRxim-ic.com/thgrmRꢂ-tptoriRꢂ.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTꢃꢀCAL CHAꢃACTEꢃꢀꢁTꢀCꢁ
(V = 12V, R = 27kΩ, R
A
= 30kΩ, C
= 4.7µF, C = 1µF, T = -40°C to +85°C (MAX15026B/CETD+, MAX15026BETD/V+),
= T = -40°C to +125°C (MAX15026B/C/DATD+), unless otherwise noted. Typical values are at T = +25°C.) (Note 2)
J
A
IN
RT
LIM
VCC IN A
T
CONDꢀTꢀONꢁ
PAꢃAMETEꢃ
ꢁYMBOL
MꢀN
TYP
MAX
UNꢀTꢁ
GENEꢃAL
4.5
4.5
28
5.5
Input Voltage Range
V
V
IN
V
V
= V
= V
CC DRV
IN
Quiescent Supply Current
Shutdown Supply Current
Enable to Output Delay
= 0.9V, no switching
1.75
290
480
375
2.75
500
mA
µA
µs
FB
I
EN = GND
IN_SBY
V
High to Output Delay
EN = V
µs
CC
CC
V
CC
ꢃEGULATOꢃ
6V < V < 28V, I
= 25mA
IN
LOAD
Output Voltage
V
5.0
5.25
5.5
V
CC
V
V
V
V
= 12V, 1mA < I
< 70mA
IN
LOAD
V
V
V
Regulator Dropout
= 4.5V, I = 70mA
LOAD
0.28
300
4.2
V
mA
V
CC
CC
CC
IN
Short-Circuit Output Current
Undervoltage Lockout
= 5V
100
3.8
200
4.0
IN
V
rising
CC_UVLO
CC
V
Undervoltage Lockout
CC
400
mV
Hysteresis
EꢃꢃOꢃ AMPLꢀFꢀEꢃ (FB, COMP)
FB Input Voltage Set-Point
FB Input Bias Current
V
585
-250
600
591
597
mV
nA
FB
I
V
= 0.6V
+250
1800
FB
FB
FB to COMP Transconductance
Amplifier Open-Loop Gain
Amplifier Unity-Gain Bandwidth
g
I
=
20µA
1200
80
µS
M
COMP
dB
Capacitor from COMP to GND = 50pF
= 1.4V
4
MHz
mV
µA
V
Minimum Voltage
160
80
COMP-RAMP
COMP Source/Sink Current
I
V
50
110
COMP
COMP
2
_______________________________________________________________________________________
Low-Cost, Small, 4.5V to 28V Wide Operating
Range, DC-DC Synchronous Buck Controller
MAX15026
ELECTꢃꢀCAL CHAꢃACTEꢃꢀꢁTꢀCꢁ (coItiIpgd)
(V = 12V, R = 27kΩ, R
A
= 30kΩ, C
= 4.7µF, C = 1µF, T = -40°C to +85°C (MAX15026B/CETD+, MAX15026BETD/V+),
= T = -40°C to +125°C (MAX15026B/C/DATD+), unless otherwise noted. Typical values are at T = +25°C.) (Note 2)
J
A
IN
RT
LIM
VCC IN A
T
CONDITIONS
PARAMETER
SYMBOL
MIN
TYP
MAX
UNITS
ENABLE (EN)
EN Input High
V
V
V
V
rising
falling
= 5.5V
1.14
1.20
1.05
1.26
1.103
+1
V
V
EN_H
EN
EN
EN
EN Input Low
V
0.997
-1
EN_L
LEAK_EN
EN Input Leakage Current
I
µA
OSCILLATOR
Switching Frequency
1MHz Switching Frequency
2MHz Switching Frequency
f
R
RT
R
RT
R
RT
= 27kΩ
540
0.9
1.8
600
1
660
1.1
2.4
kHz
MHz
MHz
SW
= 15.7kΩ
= 7.2kΩ
2.0
Switching Frequency Adjustment
Range (Note 3)
200
2000
1.22
kHz
V
RT Voltage
V
1.19
1.205
1.8
RT
PWM Ramp Peak-to-Peak
Amplitude
V
V
RAMP
PWM Ramp Valley
V
0.8
65
V
VALLEY
Minimum Controllable On-Time
Maximum Duty Cycle
100
150
4.4
ns
%
ns
f
= 600kHz
85
75
88
SW
Minimum Low-Side On-Time
R
= 15.7kΩ
110
RT
OUTPUT DRIVERS/DRIVER SUPPLY (DRV)
DRV Undervoltage Lockout
V
V
rising
4.0
4.2
V
DRV_UVLO
DRV
DRV Undervoltage Lockout
Hysteresis
400
mV
Low, sinking 100mA, V
= 5V
1
1.5
1
3
BST
DH On-Resistance
DL On-Resistance
DH Peak Current
DL Peak Current
Ω
Ω
A
A
High, sourcing 100mA, V
= 5V
4.5
3
BST
Low, sinking 100mA, V
= 5.2V
BST
High, sourcing 100mA, V
= 5.2V
1.5
4
4.5
BST
Sinking
C
C
= 10nF
= 10nF
LOAD
LOAD
Sourcing
Sinking
3
4
Sourcing
3
DH/DL Break-Before-Make Time
DL/DH Break-Before-Make Time
SOFT-START
DH at 1V (falling) to DL at 1V (rising)
DL at 1V (falling) to DH at 1V (rising)
10 (18, Note 5)
10 (20, Note 6)
ns
ns
Switching
Cycles
Soft-Start Duration
2048
64
Reference Voltage Steps
Steps
CURRENT LIMIT/HICCUP
Cycle-by-cycle valley current-limit
threshold adjustment range
Current-Limit Threshold
Adjustment Range
30
300
mV
valley limit = V /10
LIM
_______________________________________________________________________________________
3
Low-Cost, Small, 4.5V to 28V Wide Operating
Range, DC-DC Synchronous Buck Controller
ELECTꢃꢀCAL CHAꢃACTEꢃꢀꢁTꢀCꢁ (coItiIpgd)
(V = 12V, R = 27kΩ, R
A
= 30kΩ, C
= 4.7µF, C = 1µF, T = -40°C to +85°C (MAX15026B/CETD+, MAX15026BETD/V+),
= T = -40°C to +125°C (MAX15026B/C/DATD+), unless otherwise noted. Typical values are at T = +25°C.) (Note 2)
J
A
IN
RT
LIM
VCC IN A
T
CONDꢀTꢀONꢁ
PAꢃAMETEꢃ
ꢁYMBOL
MꢀN
45
TYP
50
MAX
UNꢀTꢁ
µA
LIM Reference Current
I
V
V
= 0.3V to 3V (Note 4)
= 0.3V to 3V
55
LIM
LIM
LIM
LIM Reference Current Tempco
2300
ppm/°C
Number of Consecutive Current-
Limit Events to Hiccup
7
Events
MAX15026
Switching
Cycles
Soft-Start Timeout
4096
8192
4096
75
Switching
Cycles
Soft-Start Restart Timeout
Hiccup Timeout
Switching
Cycles
Out of soft-start
Peak Low-Side Sink Current
Limit
Sink limit = 1.5V, R
= 30kΩ (Note 4)
mV
LIM
BOOꢁT
Boost Switch Resistance
POWEꢃ-GOOD OUTPUT
V
= V
= 5V, I = 10mA
BST
3
8
Ω
IN
CC
PGOOD Threshold Rising
90
94.5
92
97.5
%V
%V
FB
PGOOD Threshold Falling
PGOOD Output Leakage
PGOOD Output Low Voltage
THEꢃMAL ꢁHUTDOWN
88
-1
94.5
+1
FB
I
V
= V
= 28V, V = 5V, V = 1V
µA
LEAK_PGD
IN
PGOOD
EN
FB
V
I
= 2mA, EN = GND
0.4
V
PGOOD_L
PGOOD
Thermal-Shutdown Threshold
Thermal-Shutdown Hysteresis
Temperature rising
Temperature falling
+150
20
°C
°C
Notg 2: All devices are 100% tested at room temperature and guaranteed by design over the specified temperature range.
9
17.3 × 10
Notg 3: Select R as:
where f
is in Hertz.
R
=
RT
SW
RT
2
f
+ (1x10−7)x(f
)
SW
SW
Notg 4: T = +25°C.
A
Notg 5: 10ns for MAX15026B, 18ns for the MAX15026C/D.
Notg 6: 10ns for MAX15026B, 20ns for the MAX15026C/D.
4
_______________________________________________________________________________________
Low-Cost, Small, 4.5V to 28V Wide Operating
Range, DC-DC Synchronous Buck Controller
MAX15026
Typical Operating Characteristics
(V = 12V, T = +25°C. The following TOCs are for MAX15026B/C/D, unless otherwise noted.) (See the circuit of Figure 5.)
IN
A
EFFICIENCY vs. LOAD CURRENT
(MAX15026B/C)
EFFICIENCY vs. LOAD CURRENT
V
vs. LOAD CURRENT
(V = 12V, V = V
= 5V)
OUT
IN
CC
DRV
100
0
-0.1
-0.2
-0.3
-0.4
-0.5
-0.6
-0.7
-0.8
-0.9
-1.0
100
90
80
70
60
50
40
30
20
10
0
90
80
70
60
50
40
30
20
10
0
V
= 5V
OUT
V
OUT
= 1.2V
V
= 3.3V
OUT
V
= 3.3V
OUT
V
= 1.2V
OUT
V
= 1.8V
OUT
V
= 5V
OUT
V
= 1.8V
OUT
0
2
4
6
8
10
12
0
2
4
6
8
10
12
0
2
4
6
8
10
12
LOAD CURRENT (A)
LOAD CURRENT (A)
LOAD CURRENT (A)
V LINE REGULATION
CC
V
vs. TEMPERATURE
V
CC
vs. LOAD CURRENT
CC
5.3
5.2
5.1
5.0
4.9
4.8
4.7
4.6
4.5
4.4
4.3
5.248
5.246
5.244
5.242
5.240
5.238
5.236
5.265
5.260
5.255
5.250
5.245
5.240
5.235
5.230
5.225
5mA
50mA
0
5
10
15
(V)
20
25
30
-40
-15
10
35
60
85
0
20
60
LOAD CURRENT (mA)
80
100
40
V
TEMPERATURE (°C)
IN
SWITCHING FREQUENCY
vs. TEMPERATURE
SWITCHING FREQUENCY
vs. RESISTANCE
SUPPLY CURRENT
vs. SWITCHING FREQUENCY
2500
2000
1500
1000
500
90
80
70
60
50
40
30
20
10
0
2500
2000
1500
1000
500
R
= 7.2kΩ
= 15.7kΩ
= 27kΩ
RT
R
RT
R
RT
R
RT
= 85kΩ
0
0
-40
-15
10
35
60
85
100
1000
10,000
0
20
40
60
80
100
TEMPERATURE (°C)
SWITCHING FREQUENCY (kHz)
RESISTANCE (kΩ)
_______________________________________________________________________________________
5
Low-Cost, Small, 4.5V to 28V Wide Operating
Range, DC-DC Synchronous Buck Controller
Typical Operating Characteristics (continued)
(V = 12V, T = +25°C. The following TOCs are for MAX15026B/C/D, unless otherwise noted.) (See the circuit of Figure 5.)
IN
A
LIM REFERENCE CURRENT
vs. TEMPERATURE
SINK AND SOURCE CURRENT-LIMIT
THRESHOLDS vs. RESISTANCE (R
LOAD TRANSIENT ON OUT
)
ILIM
MAX15026 toc12
0.2
0.1
70
60
50
40
30
20
10
0
AC-COUPLED
V
OUT
200mV/div
SINK CURRENT-LIMIT
MAX15026
0
-0.1
-0.2
-0.3
-0.4
SOURCE CURRENT-LIMIT
10A
1A
I
OUT
0
10
20
30
40
50
60
70
-40
-15
10
35
60
85
400µs/div
RESISTANCE (kΩ)
TEMPERATURE (°C)
STARTUP RISE TIME
(MAX15026B)
STARTUP AND DISABLE FROM EN
(R = 1.5Ω)
POWER-DOWN FALL TIME
LOAD
MAX15026 toc15
MAX15026 toc14
MAX15026 toc13
V
IN
V
IN
5V/div
5V/div
V
OUT
1V/div
PGOOD
5V/div
V
OUT
V
1V/div
OUT
1V/div
V
IN
5V/div
4ms/div
1ms/div
4ms/div
OUTPUT SHORT-CIRCUIT BEHAVIOR MONITOR
STARTUP RISE TIME
(MAX15026C/D)
SOFT-START WITH 0.5V
OUTPUT VOLTAGE AND CURRENT
PREBIAS AT NO LOAD (MAX15026C/D)
MAX15026 toc18
MAX15026 toc16
MAX15026 toc17
V
IN
V
IN
5V/div
5V/div
500mV/div
V
OUT
0
20A/div
V
OUT
V
0.5V OUTPUT PREBIAS
OUT
0V OUTPUT
1V/div
1V/div
I
OUT
0
4ms/div
1ms/div
1ms/div
6
_______________________________________________________________________________________
Low-Cost, Small, 4.5V to 28V Wide Operating
Range, DC-DC Synchronous Buck Controller
MAX15026
Pin Description
PIN
NAME
FUNCTION
Regulator Input. Bypass IN to GND with a 1µF minimum ceramic capacitor. Connect IN to V
operating in the 5V 10% range.
when
CC
1
IN
5.25V Linear Regulator Output. Bypass V
to GND with a minimum of 4.7µF low-ESR ceramic
CC
capacitor to ensure stability up to the regulated rated current when V
supplies the drive current at
CC
2
V
CC
DRV. Bypass V
to GND when V
supplies the device core quiescent current with a 2.2µF
CC
CC
minimum ceramic capacitor.
3
4
PGOOD
EN
Open-Drain Power-Good Output. Connect PGOOD with an external resistor to any supply voltage.
Active-High Enable Input. Pull EN to GND to disable the output. Connect EN to V for always-on
CC
operation. EN can be used for power sequencing and as a UVLO adjustment input.
Current-Limit Adjustment. Connect a resistor from LIM to GND to adjust current-limit threshold from
5
6
7
LIM
COMP
FB
30mV (R
= 6kΩ) to 300mV (R
= 60kΩ). See the Setting the Valley Current Limit section.
LIM
LIM
Compensation Input. Connect compensation network from COMP to FB or from COMP to GND. See
the Compensation section.
Feedback Input. Connect FB to a resistive divider between output and GND to adjust the output
voltage between 0.6V and (0.85 x Input Voltage). See the Setting the Output Voltage section.
Oscillator Timing Resistor Input. Connect a resistor from RT to GND to set the oscillator frequency
from 200kHz to 2MHz. See the Setting the Switching Frequency section.
8
RT
GND
DRV
DL
9
Ground
Drive Supply Voltage. DRV is internally connected to the anode terminal of the internal boost diode.
Bypass DRV to GND with a 2.2µF minimum ceramic capacitor (see the Typical Application Circuits).
10
11
12
Low-Side Gate-Driver Output. DL swings from DRV to GND. DL is low during UVLO.
Boost Flying Capacitor. Connect a ceramic capacitor with a minimum value of 100nF between BST
and LX.
BST
External Inductor Connection. Connect LX to the switching side of the inductor. LX serves as the
lower supply rail for the high-side gate driver and as a sensing input of the drain to source voltage
drop of the synchronous MOSFET.
13
LX
14
—
DH
EP
High-Side Gate-Driver Output. DH swings from LX to BST. DH is low during UVLO.
Exposed Pad. Internally connected to GND. Connect EP to a large copper plane at GND potential to
improve thermal dissipation. Do not use EP as the only GND ground connection.
_______________________________________________________________________________________
7
Low-Cost, Small, 4.5V to 28V Wide Operating
Range, DC-DC Synchronous Buck Controller
Functional Diagram
MAX15026
V
REF
CK
FB1
OSCILLATOR
RT
EN
COMP
g
M
V
DAC_VREF
REF
MAX15026
SOFT-START/
SOFT-STOP
LOGIC AND
ENABLE
COMPARATOR
OSC_ENABLE
HICCUP
CK
HICCUP TIMEOUT
HICCUP LOGIC
EN_INT
ENABLE
DH_DL_ENABLE
V
REF
BGAP_OK
PWM
COMPARATOR
BANDGAP
OK
GENERATOR
BGAP_OK
V
REF
CK
RAMP
GENERATOR
V
BGAP
PWM
RAMP
DC-DC
AND
OSCILLATOR
ENABLE
LOGIC
VIN_OK
INTERNAL
VOLTAGE
REGULATOR
BST
DH
V
BGAP
GATEP
BOOST
DRIVER
HIGH-
CK
SIDE
PWM
CONTROL
LOGIC
DRIVER
VL_OK
DH_DL_ENABLE
V
CC
HICCUP
V
CC
UVLO
BGAP_OK
BGAP_OK
HICCUP
TIMEOUT
LX
DRV
LOW-
SIDE
DRIVER
VDRV_OK
DRV
UVLO
DL
V
DRV
LIM/20
GND
FB
THERMAL
SHUTDOWN
AND ILIM
CURRENT
GEN
VIN_OK
SHUTDOWN
VIN_OK
LIM
IN
SINK
CURRENT-LIMIT
COMPARATOR
ENABLE
PGOOD
MAIN
BIAS
CURRENT
GENERATOR
VIN_OK
IN
UVLO
V
REF
I
BIAS
VALLEY
CURRENT-LIMIT
COMPARATOR
PGOOD
COMPARATOR
GND
LIM/10
V
= 0.6V
REF
BANDGAP
REFERENCE
V
BGAP
= 1.24V
8
_______________________________________________________________________________________
Low-Cost, Small, 4.5V to 28V Wide Operating
Range, DC-DC Synchronous Buck Controller
MAX15026
or the maximum duty cycle is reached. During the on-
Detailed Description
time of the high-side MOSFET, the inductor current
The MAX15026 synchronous step-down controller oper-
ramps up. During the second-half of the switching cycle,
ates from a 4.5V to 28V input voltage range and gener-
the high-side MOSFET turns off and the low-side n-chan-
ates an adjustable output voltage from 85% of the input
nel MOSFET turns on. The inductor releases the stored
voltage down to 0.6V while supporting loads up to 25A.
energy as the inductor current ramps down, providing
As long as the device supply voltage is within 5.0V to
current to the output. Under overload conditions, when
5.5V, the input power bus (V ) can be as low as 3.3V.
IN
the inductor current exceeds the selected valley current-
limit threshold (see the Current-Limit Circuit (LIM) sec-
tion), the high-side MOSFET does not turn on at the
subsequent clock rising edge and the low-side MOSFET
remains on to let the inductor current ramp down.
The MAX15026 offers adjustable switching frequency
from 200kHz to 2MHz with an external resistor. The
adjustable switching frequency provides design flexi-
bility in selecting passive components. The MAX15026
adopts an adaptive synchronous rectification to elimi-
nate an external freewheeling Schottky diode and
improve efficiency. The device utilizes the on-resis-
tance of the external low-side MOSFET as a current-
sense element. The current-limit threshold voltage is
resistor-adjustable from 30mV to 300mV and is temper-
ature-compensated, so that the effects of the MOSFET
Internal 5.25V Linear Regulator
An internal linear regulator (V ) provides a 5.25V nomi-
CC
nal supply to power the internal functions and to drive
the low-side MOSFET. Connect IN and V
together
CC
when using an external 5V 10% power supply. The
maximum regulator input voltage (V ) is 28V. Bypass IN
IN
to GND with a 1µF ceramic capacitor. Bypass the output
R
variation over temperature are reduced. This
DS(ON)
of the linear regulator (V ) with a 4.7µF ceramic capac-
CC
current-sensing scheme protects the external compo-
nents from damage during output overloaded condi-
tions or output short-circuit faults without requiring a
current-sense resistor. Hiccup-mode current limit
reduces power dissipation during short-circuit condi-
tions. The MAX15026 includes a power-good output
and an enable input with precise turn-on/-off threshold
to be used for monitoring and for power sequencing.
itor to GND. The V
dropout voltage is typically 125mV.
When V is higher than 5.5V, V
CC
is typically 5.25V. The
IN
CC
MAX15026 also employs an undervoltage lockout circuit
that disables the internal linear regulator when V falls
CC
below 3.6V (typ). The 400mV UVLO hysteresis prevents
chattering on power-up/power-down.
The internal V
linear regulator can source up to
CC
70mA to supply the IC, power the low-side gate driver,
recharge the external boost capacitor, and supply small
external loads. The current available for external loads
depends on the current consumed by the MOSFET
gate drivers.
The MAX15026 features internal digital soft-start that
allows prebias startup without discharging the output.
The digital soft-start function employs sink current limit-
ing to prevent the regulator from sinking excessive cur-
rent when the prebias voltage exceeds the
programmed steady-state regulation level. The digital
soft-start feature prevents the synchronous rectifier
MOSFET and the body diode of the high-side MOSFET
from experiencing dangerous levels of current while the
regulator is sinking current from the output. The
MAX15026 shuts down at a junction temperature of
+150°C to prevent damage to the device.
For example, when switching at 600kHz, a MOSFET
with 18nC total gate charge (at V
= 5V) requires
GS
(18nC x 600kHz) = 11mA. The internal control functions
consume 5mA maximum. The current available for
external loads is:
(70 – (2 x 11) – 5)mA ≅ 43mA
MOSFET Gate Drivers (DH, DL)
DH and DL are optimized for driving large-size n-chan-
nel power MOSFETs. Under normal operating condi-
tions and after startup, the DL low-side drive waveform
is always the complement of the DH high-side drive
waveform, with controlled dead-time to prevent cross-
conduction or shoot-through. An adaptive dead-time
circuit monitors the DH and DL outputs and prevents
the opposite-side MOSFET from turning on until the
other MOSFET is fully off. Thus, the circuit allows the
high-side driver to turn on only when the DL gate driver
has turned off, preventing the low-side (DL) from turn-
ing on until the DH gate driver has turned off.
DC-DC PWM Controller
The MAX15026 step-down controller uses a PWM volt-
age-mode control scheme (see the Functional Diagram).
Control-loop compensation is external for providing max-
imum flexibility in choosing the operating frequency and
output LC filter components. An internal transconduc-
tance error amplifier produces an integrated error volt-
age at COMP that helps to provide higher DC accuracy.
The voltage at COMP sets the duty cycle using a PWM
comparator and a ramp generator. On the rising edge of
an internal clock, the high-side n-channel MOSFET turns
on and remains on until either the appropriate duty cycle
_______________________________________________________________________________________
9
Low-Cost, Small, 4.5V to 28V Wide Operating
Range, DC-DC Synchronous Buck Controller
The adaptive driver dead-time allows operation without
shoot-through with a wide range of MOSFETs, minimiz-
ing delays and maintaining efficiency. There must be a
low-resistance, low-inductance path from DL and DH to
the MOSFET gates for the adaptive dead-time circuits
to function properly. The stray impedance in the gate
discharge path can cause the sense circuitry to inter-
a smooth increase of the output voltage. A logic-low on
EN initiates a soft-stop sequence by stepping down the
reference voltage of the error amplifier. After the soft-
stop sequence is completed, the MOSFET drivers are
both turned off. See Figure 1. The soft-stop feature is
disabled in the MAX15026D.
Connect EN to V
for always-on operation. Owing to
CC
pret the MOSFET gate as off while the V
of the
GS
the accurate turn-on/-off thresholds, EN can be used as
UVLO adjustment input, and for power sequencing
together with the PGOOD output.
MOSFET is still high. To minimize stray impedance, use
very short, wide traces.
MAX15026
Synchronous rectification reduces conduction losses in
the rectifier by replacing the normal low-side Schottky
catch diode with a low-resistance MOSFET switch. The
MAX15026 features a robust internal pulldown transis-
When the valley current limit is reached during soft-start
the MAX15026 regulates to the output impedance times
the limited inductor current and turns off after 4096
clock cycles. When starting up into a large capacitive
load (for example) the inrush current will not exceed the
current-limit value. If the soft-start is not completed
before 4096 clock cycles, the device will turn off. The
device remains off for 8192 clock cycles before trying
to soft-start again. This implementation allows the soft-
start time to be automatically adapted to the time nec-
essary to keep the inductor current below the limit while
charging the output capacitor.
tor with a typical 1Ω R
to drive DL low. This low
DS(ON)
on-resistance prevents DL from being pulled up during
the fast rise time of the LX node, due to capacitive cou-
pling from the drain to the gate of the low-side synchro-
nous rectifier MOSFET.
High-Side Gate-Drive Supply (BST)
and Internal Boost Switch
An internal switch between BST and DH turns on to
boost the gate voltage above V providing the neces-
IN
Power-Good Output (PGOOD)
The MAX15026 includes a power-good comparator to
monitor the output voltage and detect the power-good
threshold, fixed at 94.5% of the nominal FB voltage. The
open-drain PGOOD output requires an external pullup
resistor. PGOOD sinks up to 2mA of current while low.
sary gate-to-source voltage to turn on the high-side
MOSFET. The boost capacitor connected between BST
and LX holds up the voltage across the gate driver dur-
ing the high-side MOSFET on-time.
The charge lost by the boost capacitor for delivering the
gate charge is replenished when the high-side MOSFET
turns off and LX node goes to ground. When LX is low,
an internal high-voltage switch connected between
PGOOD goes high (high-impedance) when the regula-
tor output increases above 94.5% of the designed nom-
inal regulated voltage. PGOOD goes low when the
regulator output voltage drops to below 92% of the
nominal regulated voltage. PGOOD asserts low during
hiccup timeout period.
V
and BST recharges the boost capacitor. See the
DRV
Boost Capacitor section in the Applications Information
to choose the right size of the boost capacitor.
Enable Input (EN), Soft-Start,
and Soft-Stop
Drive EN high to turn on the MAX15026. A soft-start
sequence starts to increase step-wise the reference
voltage of the error amplifier. The duration of the soft-
start ramp is 2048 switching cycles and the resolution
is 1/64th of the steady-state regulation voltage allowing
Startup into a Prebiased Output
When the MAX15026 starts into a prebiased output, DH
and DL are off so that the converter does not sink cur-
rent from the output. DH and DL do not start switching
until the PWM comparator commands the first PWM
pulse. The first PWM pulse occurs when the ramping
reference voltage increases above the FB voltage.
±1 ______________________________________________________________________________________
Low-Cost, Small, 4.5V to 28V Wide Operating
Range, DC-DC Synchronous Buck Controller
MAX15026
UVLO
C
D
G
A
B
E
F
H
I
V
CC
EN
V
OUT
2048 CLK
CYCLES
2048 CLK
CYCLES
DAC_VREF
DH
DL
SYMBOL
DEFINITION
SYMBOL
DEFINITION
Undervoltage threshold value is provided in
B
C
D
E
V
is higher than the UVLO threshold. EN is low.
CC
UVLO
the Electrical Characteristics table.
EN is pulled high. DH and DL start switching.
Normal operation.
V
Internal 5.25V linear regulator output.
Active-high enable input.
CC
EN
V
V
drops below UVLO.
CC
V
Regulator output voltage.
OUT
goes above the UVLO threshold. DH and DL
CC
F
G
H
DAC_VREF
Regulator internal soft-start and soft-stop signal.
Regulator high-side gate-driver output.
Regulator low-side gate-driver output.
start switching. Normal operation.
DH
DL
EN is pulled low. V enters soft-stop.
OUT
EN is pulled high. DH and DL start switching.
Normal operation.
V
rising while below the UVLO threshold.
CC
A
EN is low.
V
CC
drops below UVLO.
I
Figure 1. Power-On/-Off Sequencing for MAX15026B/C.
Valley current limit acts when the inductor current flows
towards the load, and LX is more negative than GND
during the low-side MOSFET on-time. If the magnitude
of current-sense signal exceeds the valley current-limit
threshold at the end of the low-side MOSFET on-time,
the MAX15026 does not initiate a new PWM cycle and
lets the inductor current decay in the next cycle. The
controller also rolls back the internal reference voltage
so that the controller finds a regulation point deter-
mined by the current-limit value and the resistance of
the short. In this manner, the controller acts as a con-
stant current source. This method greatly reduces
inductor ripple current during the short event, which
reduces inductor sizing restrictions, and reduces the
possibility for audible noise. After a timeout, the device
goes into hiccup mode. Once the short is removed, the
internal reference voltage soft-starts back up to the nor-
mal reference voltage and regulation continues.
Current-Limit Circuit (LIM)
The current-limit circuit employs a valley and sink cur-
rent-sensing algorithm that uses the on-resistance of
the low-side MOSFET as a current-sensing element, to
eliminate costly sense resistors. The current-limit circuit
is also temperature compensated to track the on-resis-
tance variation of the MOSFET over temperature. The
current limit is adjustable with an external resistor at
LIM, and accommodates MOSFETs with a wide range
of on-resistance characteristics (see the Setting the
Valley Current Limit section). The adjustment range is
from 30mV to 300mV for the valley current limit, corre-
sponding to resistor values of 6kΩ to 60kΩ. The valley
current-limit threshold across the low-side MOSFET is
precisely 1/10th of the voltage at LIM, while the sink
current-limit threshold is 1/20th of the voltage at LIM.
______________________________________________________________________________________ ±±
Low-Cost, Small, 4.5V to 28V Wide Operating
Range, DC-DC Synchronous Buck Controller
Sink current limit is implemented by monitoring the volt-
age drop across the low-side MOSFET when LX is more
positive than GND. When the voltage drop across the
low-side MOSFET exceeds 1/20th of the voltage at LIM
at any time during the low-side MOSFET on-time, the
low-side MOSFET turns off, and the inductor current
flows from the output through the body diode of the high-
side MOSFET. When the sink current limit activates, the
DH/DL switching sequence is no longer complementary.
unwanted triggering of the thermal-overload protection in
normal operation.
Applications Information
Effective Input Voltage Range
The MAX15026 operates from input supplies up to 28V
and regulates down to 0.6V. The minimum voltage con-
version ratio (V /V ) is limited by the minimum con-
OUT IN
trollable on-time. For proper fixed-frequency PWM
operation, the voltage conversion ratio must obey the
following condition,
Carefully observe the PCB layout guidelines to ensure
that noise and DC errors do not corrupt the current-
sense signals at LX and GND. Mount the MAX15026
close to the low-side MOSFET with short, direct traces
making a Kelvin-sense connection so that trace resis-
tance does not add to the intended sense resistance of
the low-side MOSFET.
MAX15026
V
V
OUT
> t
× f
ON(MIN) SW
IN
where t
is 125ns and f
is the switching fre-
SW
ON(MIN)
quency in Hertz. Pulse-skipping occurs to decrease the
effective duty cycle when the desired voltage conver-
sion does not meet the above condition. Decrease the
Hiccup-Mode Overcurrent Protection
Hiccup-mode overcurrent protection reduces power dis-
sipation during prolonged short-circuit or deep overload
conditions. An internal three-bit counter counts up on
each switching cycle when the valley current-limit
threshold is reached. The counter counts down on each
switching cycle when the threshold is not reached, and
stops at zero (000). The counter reaches 111 (= 7
events) when the valley mode current-limit condition
persists. The MAX15026 stops both DL and DH drivers
and waits for 4096 switching cycles (hiccup timeout
delay) before attempting a new soft-start sequence. The
hiccup-mode protection remains active during the soft-
start time.
switching frequency or lower V to avoid pulse skipping.
IN
The maximum voltage conversion ratio is limited by the
maximum duty cycle (D
):
max
V
V
D
× V
+ (1− D )× V
max DROP1
OUT
max
DROP2
< D
−
max
V
IN
IN
where V
is the sum of the parasitic voltage drops
DROP1
in the inductor discharge path, including synchronous
rectifier, inductor, and PCB resistance. V is the
DROP2
sum of the resistance in the charging path, including
high-side switch, inductor, and PCB resistance. In
practice, provide adequate margin to the above condi-
tions for good load-transient response.
Undervoltage Lockout
The MAX15026 provides an internal undervoltage lockout
(UVLO) circuit to monitor the voltage on V . The UVLO
CC
circuit prevents the MAX15026 from operating when V
CC
Setting the Output Voltage
Set the MAX15026 output voltage by connecting a
resistive divider from the output to FB to GND (Figure
is lower than V
. The UVLO threshold is 4V, with
UVLO
400mV hysteresis to prevent chattering on the rising/falling
edge of the supply voltage. DL and DH stay low to inhibit
switching when the device is in undervoltage lockout.
2). Select R from between 1kΩ and 50kΩ. Calculate
2
R with the following equation:
1
Thermal-Overload Protection
Thermal-overload protection limits total power dissipation
in the MAX15026. When the junction temperature of the
device exceeds +150°C, an on-chip thermal sensor shuts
down the device, forcing DL and DH low, allowing the
device to cool. The thermal sensor turns the device on
again after the junction temperature cools by 20°C. The
regulator shuts down and soft-start resets during thermal
shutdown. Power dissipation in the LDO regulator and
excessive driving losses at DH/DL trigger thermal-over-
load protection. Carefully evaluate the total power dissi-
pation (see the Power Dissipation section) to avoid
⎡
⎢
⎤
⎛
⎝
⎞
⎠
V
V
OUT
R = R
− 1
⎥
1
2
⎜
⎟
⎢
⎣
⎥
⎦
FB
where V = 0.591V (see the Electrical Characteristics
FB
table) and V
can range from 0.591V to (0.85 x V ).
IN
OUT
Resistor R also plays a role in the design of the Type III
compensation network. Review the values of R and R
when using a Type III compensation network (see the
Type III Compensation Network (See Figure 4) section).
1
1
2
±2 ______________________________________________________________________________________
Low-Cost, Small, 4.5V to 28V Wide Operating
Range, DC-DC Synchronous Buck Controller
MAX15026
frequency, input voltage, output voltage, and selected
LIR determine the inductor value as follows,
OUT
V
(V − V )
OUT IN OUT
V f
L =
R
1
I
LIR
IN SW OUT
where V , V
, and I
are typical values (so that
IN OUT
OUT
FB
efficiency is optimum for typical conditions). The switch-
ing frequency is set by R (see the Setting the
RT
R
2
Switching Frequency section). The exact inductor value
is not critical and can be adjusted to make trade-offs
among size, cost, and efficiency. Lower inductor values
minimize size and cost, but also improve transient
response and reduce efficiency due to higher peak cur-
rents. On the other hand, higher inductance increases
efficiency by reducing the RMS current.
MAX15026
Find a low-loss inductor having the lowest possible DC
resistance that fits in the allotted dimensions. The satura-
Figure 2. Adjustable Output Voltage
tion current rating (I
) must be high enough to ensure
SAT
Setting the Switching Frequency
that saturation can occur only above the maximum cur-
rent-limit value (I ), given the tolerance of the on-
An external resistor connecting RT to GND sets the
CL(MAX)
switching frequency (f ). The relationship between
SW
resistance of the low-side MOSFET and of the LIM
reference current (I ). Combining these conditions,
f
and R is:
RT
SW
LIM
select an inductor with a saturation current (I
) of:
SAT
9
17.3 × 10
+ (1x10−7)x(f
R
=
I
≥ 1.35 x I
)
RT
SAT
CL(TYP
2
f
)
SW
SW
where I
is the typical current-limit set-point. The
CL(TYP)
factor 1.35 includes R
variation of 25% and 10%
DS(ON)
where f
is in Hz and R
is in Ω. For example, a
RT
SW
for the LIM reference current error. A variety of inductors
from different manufacturers are available to meet this
requirement (for example, Coilcraft MSS1278-142ML
and other inductors from the same series).
600kHz switching frequency is set with R = 27.2kΩ.
RT
Higher frequencies allow designs with lower inductor
values and less output capacitance. Peak currents and
I2R losses are lower at higher switching frequencies,
but core losses, gate-charge currents, and switching
losses increase.
Setting the Valley Current Limit
The minimum current-limit threshold must be high
enough to support the maximum expected load current
with the worst-case low-side MOSFET on-resistance
Inductor Selection
Three key inductor parameters must be specified for
operation with the MAX15026: inductance value (L),
value as the R
of the low-side MOSFET is used
DS(ON)
as the current-sense element. The inductor’s valley cur-
rent occurs at I minus one half of the ripple
inductor saturation current (I
), and DC resistance
SAT
LOAD(MAX)
(R ). To determine the inductance value, select the
DC
current. The minimum value of the current-limit thresh-
ratio of inductor peak-to-peak AC current to DC average
current (LIR) first. For LIR values which are too high, the
RMS currents are high, and therefore I2R losses are
high. Use high-valued inductors to achieve low LIR val-
ues. Typically, inductance is proportional to resistance
for a given package type, which again makes I2R losses
high for very low LIR values. A good compromise
between size and loss is a 30% peak-to-peak ripple cur-
rent to average-current ratio (LIR = 0.3). The switching
old voltage (V ) must be higher than the voltage on
ITH
the low-side MOSFET during the ripple-current valley:
LIR
2
⎛
⎝
⎞
V
> R
× I
× 1−
⎜
⎟
⎠
ITH
DS(ON,MAX) LOAD(MAX)
where R
is the on-resistance of the low-side
DS(ON)
MOSFET in ohms. Use the maximum value for R
from the data sheet of the low-side MOSFET.
DS(ON)
______________________________________________________________________________________ ±3
Low-Cost, Small, 4.5V to 28V Wide Operating
Range, DC-DC Synchronous Buck Controller
Connect an external resistor (R ) from LIM to GND to
LIM
where I
is the peak-to-peak inductor current ripple
P-P
adjust the current-limit threshold. The relationship
(see the Inductor Selection section). Use these equa-
tions for initial capacitor selection. Decide on the final
values by testing a prototype or an evaluation circuit.
between the current-limit threshold (V ) and R
is:
LIM
ITH
10 × V
50µA
ITH
R
=
LIM
Check the output capacitor against load-transient
response requirements. The allowable deviation of the
output voltage during fast load transients determines
the capacitor output capacitance, ESR, and equivalent
series inductance (ESL). The output capacitor supplies
the load current during a load step until the controller
responds with a higher duty cycle. The response time
where R
is in kΩ and V
ITH
is in mV.
LIM
An R
resistance range of 6kΩ to 60kΩ corresponds
LIM
to a current-limit threshold of 30mV to 300mV. Use 1%
tolerance resistors when adjusting the current limit to
minimize error in the current-limit threshold.
MAX15026
(t
) depends on the closed-loop bandwidth of
RESPONSE
the converter (see the Compensation section). The
resistive drop across the ESR of the output capacitor,
Input Capacitor
The input filter capacitor reduces peak currents drawn
from the power source and reduces noise and voltage
ripple on the input caused by the switching circuitry.
The input capacitor must meet the ripple current
the voltage drop across the ESL (∆V
) of the capaci-
ESL
tor, and the capacitor discharge, cause a voltage
droop during the load step.
Use a combination of low-ESR tantalum/aluminum elec-
trolytic and ceramic capacitors for improved transient
load and voltage ripple performance. Nonleaded
capacitors and capacitors in parallel help reduce the
ESL. Keep the maximum output voltage deviation below
the tolerable limits of the load. Use the following equa-
tions to calculate the required ESR, ESL, and capaci-
tance value during a load step:
requirement (I
) imposed by the switching currents
RMS
as defined by the following equation,
V
(V − V
)
OUT IN OUT
I
= I
RMS LOAD(MAX)
V
IN
I
attains a maximum value when the input voltage
RMS
equals twice the output voltage (V = 2V
), so
OUT
IN
I
= I
/2. For most applications,
RMS(MAX)
LOAD(MAX)
∆V
ESR
ESR =
non-tantalum capacitors (ceramic, aluminum, poly-
mer, or OS-CON) are preferred at the inputs due to
the robustness of non-tantalum capacitors to accom-
modate high inrush currents of systems being pow-
ered from very low-impedance sources. Additionally,
two (or more) smaller-value low-ESR capacitors can
be connected in parallel for lower cost.
I
STEP
I
× t
∆V
STEP
RESPONSE
C
=
OUT
Q
∆V
× t
ESL
I
STEP
ESL =
STEP
1
3 × f
Output Capacitor
The key selection parameters for the output capacitor are
capacitance value, ESR, and voltage rating. These para-
meters affect the overall stability, output ripple voltage, and
transient response. The output ripple has two components:
variations in the charge stored in the output capacitor, and
the voltage drop across the capacitor’s ESR caused by
the current flowing into and out of the capacitor:
t
≅
RESPONSE
O
where I
is the load step, t
RESPONSE
is the rise time of the
STEP
load step, t
STEP
is the response time of the con-
troller and f is the closed-loop crossover frequency.
O
Compensation
The MAX15026 provides an internal transconductance
amplifier with the inverting input and the output avail-
able for external frequency compensation. The flexibility
of external compensation offers a wide selection of out-
put filtering components, especially the output capaci-
tor. Use high-ESR aluminum electrolytic capacitors for
cost-sensitive applications. Use low-ESR tantalum or
ceramic capacitors at the output for size sensitive
applications. The high switching frequency of the
MAX15026 allows the use of ceramic capacitors at the
output. Choose all passive power components to meet
the output ripple, component size, and component cost
∆V
≅ ∆V ∆V
ESR + Q
RIPPLE
The output voltage ripple as a consequence of the ESR
and the output capacitance is:
∆V
= I
× ESR
ESR
P−P
I
P−P
∆V
=
Q
8 × C
× f
OUT SW
⎛
⎞
⎛
⎝
⎞
⎠
V
− V
OUT
V
OUT
IN
f
I
=
×
P−P
⎜
⎟
⎜
⎟
× L
V
⎝
⎠
SW
IN
±4 ______________________________________________________________________________________
Low-Cost, Small, 4.5V to 28V Wide Operating
Range, DC-DC Synchronous Buck Controller
MAX15026
requirements. Choose the small-signal components for
the error amplifier to achieve the desired closed-loop
bandwidth and phase margin.
Type II Compensation Network
(Figure 3)
is lower than f and close to f , the phase lead
O PO
If f
ZO
of the capacitor ESR zero almost cancels the phase
loss of one of the complex poles of the LC filter around
the crossover frequency. Use a Type II compensation
network with a midband zero and a high-frequency
To choose the appropriate compensation network type,
the power-supply poles and zeros, the zero crossover
frequency, and the type of the output capacitor must be
determined.
pole to stabilize the loop. In Figure 3, R and C intro-
F
F
In a buck converter, the LC filter in the output stage intro-
duces a pair of complex poles at the following frequency:
duce a midband zero (f ). R and C in the Type II
Z1
F
CF
compensation network provide a high-frequency pole
(f ), which mitigates the effects of the output high-fre-
P1
1
f
=
quency ripple.
PO
2π × L
× C
OUT
OUT
Follow the instructions below to calculate the component
values for the Type II compensation network in Figure 3:
The output capacitor introduces a zero at:
1
1) Calculate the gain of the modulator (GAIN
),
MOD
comprised of the regulator’s pulse-width modulator,
LC filter, feedback divider, and associated circuitry
at the crossover frequency:
f
=
ZO
2π × ESR × C
OUT
where ESR is the equivalent series resistance of the
output capacitor.
V
ESR
V
FB
IN
GAIN
=
×
×
MOD
The loop-gain crossover frequency (f ), where the loop
O
gain equals 1 (0dB) should be set below 1/10th of the
switching frequency:
V
2π × f × L
V
(
)
RAMP
O
OUT
OUT
where V is the input voltage of the regulator, V
is
IN
RAMP
the amplitude of the ramp in the pulse-width modulator,
is the FB input voltage set-point (0.591V typically,
V
FB
f
10
SW
f
≤
O
see the Electrical Characteristics table), and V
the desired output voltage.
is
OUT
Choosing a lower crossover frequency reduces the
effects of noise pick-up into the feedback loop, such as
jittery duty cycle.
The gain of the error amplifier (GAIN ) in midband fre-
EA
quencies is:
GAIN = g x R
F
EA
M
To maintain a stable system, two stability criteria must
be met:
where g is the transconductance of the error amplifier.
M
The total loop gain, which is the product of the modula-
1) The phase shift at the crossover frequency f , must
O
tor gain and the error amplifier gain at f , is 1.
O
be less than 180°. In other words, the phase margin
of the loop must be greater than zero.
GAIN
× GAIN = 1
EA
MOD
2) The gain at the frequency where the phase shift is
-180° (gain margin) must be less than 1.
So:
V
ESR
(2π × f × L
V
FB
IN
Maintain a phase margin of around 60° to achieve a
robust loop stability and well-behaved transient
response.
×
×
× g × R = 1
M
F
V
)
V
RAMP
O
OUT
OUT
Solving for R :
F
When using an electrolytic or large-ESR tantalum output
capacitor the capacitor ESR zero f
typically occurs
ZO
V
× 2π × f × L
× V
OUT
(
FB
)
RAMP
O
OUT
R =
between the LC poles and the crossover frequency f
O
F
V
× V × g × ESR
IN M
(f
< f
< f ). Choose Type II (PI—proportional-inte-
ZO O
PO
gral) compensation network.
2) Set a midband zero (f ) at 0.75 x f
Z1
(to cancel
PO
When using a ceramic or low-ESR tantalum output
capacitor, the capacitor ESR zero typically occurs
one of the LC poles):
above the desired crossover frequency f , that is f
<
O
PO
1
f
=
= 0.75 × f
PO
f
< f . Choose Type III (PID—proportional, integral,
O
ZO
Z1
2π × R × C
F
F
and derivative) compensation network.
______________________________________________________________________________________ ±5
Low-Cost, Small, 4.5V to 28V Wide Operating
Range, DC-DC Synchronous Buck Controller
Solving for C :
Depending on the location of the ESR zero (f ), use
ZO
P2
the high-frequency output ripple:
F
f
to cancel f , or to provide additional attenuation of
ZO
1
C =
F
2π × R × f × 0.75
1
F
PO
f
=
P3
C × C
F
CF
CF
3) Place a high-frequency pole at f = 0.5 x f
(to
SW
2π × R ×
P1
F
C + C
attenuate the ripple at the switching frequency, f
)
F
SW
and calculate C using the following equation:
CF
f
P3
attenuates the high-frequency output ripple.
Place the zeros and poles so the phase margin peaks
around f .
1
C
=
O
MAX15026
CF
1
π × R × f
− C
F
SW
Ensure that R >>2/g and the parallel resistance of R ,
F M 1
F
R , and R is greater than 1/g . Otherwise, a 180°
2
I
M
phase shift is introduced to the response making the
loop unstable.
Type III Compensation Network
(See Figure 4)
Use the following compensation procedure:
When using a low-ESR tantalum or ceramic type, the
ESR-induced zero frequency is usually above the tar-
1) With R ≥ 10kΩ, place the first zero (f ) at 0.8 x f .
PO
F
Z1
geted zero crossover frequency (f ). Use Type III com-
O
pensation. Type III compensation provides three poles
and two zeros at the following frequencies:
1
f
=
= 0.8 × f
PO
Z1
2π × R × C
F
F
So:
1
f
=
Z1
2π × R × C
F
F
V
IN
GAIN
=
×
1
MOD
V
f
=
RAMP
2π
Z2
2π × C × (R + R )
I
1
I
2) The gain of the modulator (GAIN
), comprises
MOD
Two midband zeros (f
and f ) cancel the pair of
Z2
complex poles introduced by the LC filter:
Z1
the pulse-width modulator, LC filter, feedback
divider, and associated circuitry at the crossover
frequency is:
f
P1
= 0
f
introduces a pole at zero frequency (integrator) for
P1
V
1
IN
nulling DC output voltage errors:
GAIN
=
×
MOD
2
V
RAMP
2π × f
× L
× C
OUT OUT
O
1
f
=
P2
2π × R × C
I
I
V
OUT
C
V
CF
OUT
R
1
C
F
R
F
R
R
1
I
COMP
g
M
R
2
C
I
V
REF
R
F
COMP
g
M
C
CF
C
F
R
2
V
REF
Figure 3. Type II Compensation Network
Figure 4. Type III Compensation Network
±6 ______________________________________________________________________________________
Low-Cost, Small, 4.5V to 28V Wide Operating
Range, DC-DC Synchronous Buck Controller
MAX15026
The gain of the error amplifier (GAIN ) in midband fre-
EA
quencies is:
5) Place the third pole (f ) at 1/2 the switching fre-
P3
quency and calculate C
:
CF
GAIN = 2π x f x C x R
F
EA
O
1
C
F
The total loop gain as the product of the modulator gain
and the error amplifier gain at f is 1.
C
=
CF
2π × 0.5 × f × R × C − 1
(
)
SW
F
F
O
6) Calculate R as:
GAIN
× GAIN = 1
2
MOD
EA
So:
V
FB
− V
R =
× R
1
2
V
V
1
2
OUT
FB
IN
×
V
(2π × f ) × C
× L
OUT
RAMP
O
OUT
MOSFET Selection
The MAX15026 step-down controller drives two external
logic-level n-channel MOSFETs. The key selection
parameters to choose these MOSFETs include:
Solving for C :
I
V
× 2π × f × L
× C
OUT OUT
(
)
RAMP
O
C =
I
V
× R
F
• On-Resistance (R
)
DS(ON)
IN
• Maximum Drain-to-Source Voltage (V
)
DS(MAX)
3) Use the second pole (f ) to cancel f
when f
<
P2
ZO
PO
• Minimum Threshold Voltage (V
)
TH(MIN)
f
< f
< f /2. The frequency response of the
O
ZO SW
loop gain does not flatten out soon after the 0dB
crossover, and maintains a -20dB/decade slope up
to 1/2 of the switching frequency. This is likely to
occur if the output capacitor is a low-ESR tantalum.
• Total Gate Charge (Q )
G
• Reverse Transfer Capacitance (C
• Power Dissipation
)
RSS
Set f = f
.
P2
ZO
The two n-channel MOSFETs must be a logic-level type
with guaranteed on-resistance specifications at V
=
GS
When using a ceramic capacitor, the capacitor ESR
zero f is likely to be located even above 1/2 the
4.5V. For maximum efficiency, choose a high-side
MOSFET that has conduction losses equal to the
switching losses at the typical input voltage. Ensure
that the conduction losses at minimum input voltage do
not exceed the MOSFET package thermal limits, or vio-
late the overall thermal budget. Also, ensure that the
conduction losses plus switching losses at the maxi-
mum input voltage do not exceed package ratings or
violate the overall thermal budget. Ensure that the DL
gate driver can drive the low-side MOSFET. In particu-
lar, check that the dv/dt caused by the high-side
MOSFET turning on does not pull up the low-side
MOSFET gate through the drain-to-gate capacitance
of the low-side MOSFET, which is the most frequent
cause of cross-conduction problems.
ZO
switching frequency, f
< f < f /2 < f . In this
O SW ZO
PO
case, place the frequency of the second pole (f ) high
P2
enough to not significantly erode the phase margin at
the crossover frequency. For example, set f at 5 x f
P2
O
so that the contribution to phase loss at the crossover
frequency f is only about 11°:
O
f
P2
= 5 x f
PO
Once f is known, calculate R
P2
I:
1
R =
I
2π × f × C
P2
I
4) Place the second zero (f ) at 0.2 x f or at f ,
PO
Z2
O
whichever is lower, and calculate R using the fol-
1
Check power dissipation when using the internal linear
regulator to power the gate drivers. Select MOSFETs
with low gate charge so that V
vers without overheating the device.
lowing equation:
can power both dri-
CC
1
R =
− R
I
1
2π × f × C
P
= V
x Q
x f
Z2
I
DRIVE
CC G_TOTAL
SW
where Q
is the sum of the gate charges of the
G_TOTAL
two external MOSFETs.
______________________________________________________________________________________ ±7
Low-Cost, Small, 4.5V to 28V Wide Operating
Range, DC-DC Synchronous Buck Controller
estimation of the junction temperature requires a direct
Boost Capacitor
The MAX15026 uses a bootstrap circuit to generate the
necessary gate-to-source voltage to turn on the high-
side MOSFET. The selected n-channel high-side
MOSFET determines the appropriate boost capaci-
measurement of the case temperature (T ) when actual
C
operating conditions significantly deviate from those
described in the JEDEC standards. The junction tem-
perature is then:
tance value (C
in the Typical Application Circuits)
BST
T = T + (P x θ )
JC
J
C
T
according to the following equation:
Use 8.7°C/W as θ thermal impedance for the 14-pin
JC
TDFN package. The case-to-ambient thermal imped-
QG
C
=
ance (θ ) is dependent on how well the heat is trans-
CA
BST
∆V
BST
ferred from the PCB to the ambient. Solder the exposed
pad of the TDFN package to a large copper area to
spread heat through the board surface, minimizing the
case-to-ambient thermal impedance. Use large copper
areas to keep the PCB temperature low.
MAX15026
where Q is the total gate charge of the high-side
G
MOSFET and ∆V
is the voltage variation allowed on
BST
the high-side MOSFET driver after turn-on. Choose
∆V so the available gate-drive voltage is not signifi-
BST
cantly degraded (e.g. ∆V
determining C
= 100mV to 300mV) when
PCB Layout Guidelines
Place all power components on the top side of the
board, and run the power stage currents using traces
or copper fills on the top side only. Make a star connec-
tion on the top side of traces to GND to minimize volt-
age drops in signal paths.
BST
. Use a low-ESR ceramic capacitor as
BST
the boost flying capacitor with a minimum value of
100nF.
Power Dissipation
The maximum power dissipation of the device depends
on the thermal resistance from the die to the ambient
environment and the ambient temperature. The thermal
resistance depends on the device package, PCB cop-
per area, other thermal mass, and airflow.
Keep the power traces and load connections short,
especially at the ground terminals. This practice is
essential for high efficiency and jitter-free operation. Use
thick copper PCBs (2oz or above) to enhance efficiency.
Place the MAX15026 adjacent to the synchronous recti-
fier MOSFET, preferably on the back side, to keep LX,
GND, DH, and DL traces short and wide. Use multiple
small vias to route these signals from the top to the bot-
tom side. Use an internal quiet copper plane to shield
the analog components on the bottom side from the
power components on the top side.
The power dissipated into the package (P ) depends
T
on the supply configuration (see the Typical Application
Circuits). Use the following equation to calculate power
dissipation:
P = (V - V ) x I
+ V
x I
+ V x I
CC IN
T
IN
CC
LDO
DRV
DRV
where I
is the current supplied by the internal regu-
LDO
DRV
lator, I
is the supply current consumed by the dri-
Make the MAX15026 ground connections as follows:
create a small analog ground plane near the device.
Connect this plane to GND and use this plane for the
vers at DRV, and I is the supply current of the
MAX15026 without the contribution of the I
IN
, as given
DRV
in the Typical Operating Characteristics. For example, in
the application circuit of Figure 5, I = I + I and
ground connection for the V bypass capacitor, com-
IN
LDO
+ I ).
DRV IN
DRV
IN
pensation components, feedback dividers, V
tor, RT resistor, and LIM resistor.
capaci-
CC
V
DRV
= V
so that P = V x (I
CC
T
IN
Use the following equation to estimate the temperature
rise of the die:
Use Kelvin sense connections for LX and GND to the
synchronous rectifier MOSFET for current limiting to
guarantee the current-limit accuracy.
T = T + (P x θ )
JA
J
A
T
Route high-speed switching nodes (BST, LX, DH, and DL)
away from the sensitive analog areas (RT, COMP, LIM,
and FB). Group all GND-referred and feedback compo-
nents close to the device. Keep the FB and compensation
network as small as possible to prevent noise pickup.
where θ is the junction-to-ambient thermal imped-
JA
ance of the package, P is power dissipated in the
T
device, and T is the ambient temperature. The θ is
A
JA
24.4°C/W for 14-pin TDFN package on multilayer
boards, with the conditions specified by the respective
JEDEC standards (JESD51-5, JESD51-7). An accurate
±8 ______________________________________________________________________________________
Low-Cost, Small, 4.5V to 28V Wide Operating
Range, DC-DC Synchronous Buck Controller
MAX15026
Typical Application Circuits
Single 4.5V to 28V Supply Operation
Figure 5 shows an application circuit for a single 4.5V to 28V power-supply operation.
4.5V TO 28V
V
IN
C1
330µF
PANASONIC
EEEFCIE331P
ON-SEMICONDUCTOR
NTMFS4835NTIG
DH
LX
IN
Q1 (
)
MAX15026
COILCRAFT
V
CC
MSS1278-142ML
C3
0.47µF
L1
V
OUT
1.4µH
C5
22µF
C4
BST
DL
PGOOD
ENABLE
PGOOD
LIM
470µF
SANYO
Q2
4C54701
R1*
DRV
EN
C6
2.2µF
ON-SEMICONDUCTOR
NTMFS4835NTIG
(
)
GND
RT
COMP
FB
R3
4.02kΩ
C8
68pF
C7
68pF
R4
27kΩ
C9
0.022µF
R6
15.4kΩ
R5
10kΩ
R1
11.8kΩ
*R1 IS A SMALL-VALUE RESISTOR TO DECOUPLE
SWITCHING TRANSIENTS CAUSED BY THE
MOSFET DRIVER (2.2Ω).
C10
4.7µF
R7
4.02kΩ
C11
1500pF
Figure 5. V = 4.5V to 28V
IN
______________________________________________________________________________________ ±9
Low-Cost, Small, 4.5V to 28V Wide Operating
Range, DC-DC Synchronous Buck Controller
Typical Application Circuits (continued)
Single 4.5V to 5.5V Supply Operation
Figure 6 shows an application circuit for a single 4.5V to 5.5V power-supply operation.
4.5V TO 5.5V
IN
V
MAX15026
DH
LX
IN
Q1
Q2
MAX15026
V
CC
L1
C
V
OUT
BST
BST
DL
PGOOD
ENABLE
PGOOD
LIM
C
F1
DRV
EN
C1
GND
RT
COMP
FB
RT
R3
C3
C2
R2
R
LIM
C4
R1
Figure 6. V
= V = V
= 4.5V to 5.5V
CC
IN
DRV
21 ______________________________________________________________________________________
Low-Cost, Small, 4.5V to 28V Wide Operating
Range, DC-DC Synchronous Buck Controller
MAX15026
Typical Application Circuits (continued)
Auxiliary 5V Supply Operation
Figure 7 shows an application circuit for a +12V supply to drive the external MOSFETs and an auxiliary +5V supply
to power the device.
V
IN
+12V
DH
LX
IN
Q1
MAX15026
V
CC
L1
C
V
OUT
BST
BST
DL
PGOOD
ENABLE
PGOOD
LIM
C
F1
Q2
DRV
EN
C1
GND
RT
COMP
FB
RT
R3
C3
C2
R2
R
LIM
C4
R1
V
AUX
4.5V TO 5.5V
Figure 7. Operation with Auxiliary 5V Supply
______________________________________________________________________________________ 2±
Low-Cost, Small, 4.5V to 28V Wide Operating
Range, DC-DC Synchronous Buck Controller
Package Information
Chip Information
For the latest package outline information and land patterns
(footprints), go to www.mRxim-ic.com/nRckRꢄgs. Note that a
“+”, “#”, or “-” in the package code indicates RoHS status only.
Package drawings may show a different suffix character, but
the drawing pertains to the package regardless of RoHS status.
PROCESS: BiCMOS
LAND
PATTEꢃN NO.
PACKAGE
TYPE
PACKAGE
CODE
OUTLꢀNE NO.
2±-1±37
91-1163
14 TDFN-EP
T1433+2
MAX15026
22 ______________________________________________________________________________________
Low-Cost, Small, 4.5V to 28V Wide Operating
Range, DC-DC Synchronous Buck Controller
MAX15026
Revision History
REVISION
NUMBER
REVISION
DATE
PAGES
DESCRIPTION
CHANGED
0
5/08
Initial release
—
Revised General Description, Ordering Information, Absolute Maximum
Ratings, Electrical Characteristics, Power-Good Output (PGOOD) section,
and Typical Application Circuits
1
5/09
1–4, 10, 15, 19
Added MAX15026C; revised General Description, Ordering Information,
Electrical Characteristics, Typical Operating Characteristics, and Startup
into a Prebiased Output sections
2
9/10
1–6, 10
Added automotive part to Ordering Information, Absolute Maximum Ratings,
and Electrical Characteristics
3
4
4/11
2/12
1, 2, 3
Design modified to meet customer requirements and new OPN added to
Ordering Information
1–6, 10, 11
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and max limits) shown in
the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance.
23 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
© 2012 Maxim Integrated Products
Maxim is a registered trademark of Maxim Integrated Products, Inc.
相关型号：
MAX15026BATD+
Low-Cost, Small, 4.5V to 28V Wide Operating Range, DC-DC Synchronous Buck Controller
MAXIM
MAX15026BATD+T
Switching Controller, Voltage-mode, 2400kHz Switching Freq-Max, BICMOS, PDSO14, 3 X 3 MM, ROHS COMPLIANT, TDFN-14
MAXIM
MAX15026BETD
Low-Cost, Small, 4.5V to 28V Wide Operating Range, DC-DC Synchronous Buck Controller
MAXIM
MAX15026BETD+
Low-Cost, Small, 4.5V to 28V Wide Operating Range, DC-DC Synchronous Buck Controller
MAXIM
MAX15026BETD+T
Switching Controller, Voltage-mode, 2400kHz Switching Freq-Max, BICMOS, PDSO14, 3 X 3 MM, ROHS COMPLIANT, TDFN-14
MAXIM
MAX15026BETD/V T
Low-Cost, Small, 4.5V to 28V Wide Operating Range, DC-DC Synchronous Buck Controller
MAXIM
MAX15026BETD/V+T
Low-Cost, Small, 4.5V to 28V Wide Operating Range, DC-DC Synchronous Buck Controller
MAXIM
MAX15026BETV
Low-Cost, Small, 4.5V to 28V Wide Operating Range, DC-DC Synchronous Buck Controller
MAXIM
MAX15026CATD
Low-Cost, Small, 4.5V to 28V Wide Operating Range, DC-DC Synchronous Buck Controller
MAXIM
MAX15026CATD+
Low-Cost, Small, 4.5V to 28V Wide Operating Range, DC-DC Synchronous Buck Controller
MAXIM
©2020 ICPDF网 联系我们和版权申明