MAX16002DTC+T [MAXIM]

Power Supply Management Circuit, Adjustable, 4 Channel, BICMOS, 4 X 4 MM, ROHS COMPLIANT, TQFN-12;
MAX16002DTC+T
型号: MAX16002DTC+T
厂家: MAXIM INTEGRATED PRODUCTS    MAXIM INTEGRATED PRODUCTS
描述:

Power Supply Management Circuit, Adjustable, 4 Channel, BICMOS, 4 X 4 MM, ROHS COMPLIANT, TQFN-12

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文件: 总26页 (文件大小:275K)
中文:  中文翻译
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19-3870; Rev 3; 12/08  
Low-Voltage, Quad-/Hex-/Octal-Voltage  
µP Supervisors  
–MAX1607  
General Description  
Features  
The MAX16000–MAX16007 are low-voltage, quad-/hex-/  
octal-voltage µP supervisors in small thin QFN and TSSOP  
packages. These devices provide supervisory functions for  
complex multivoltage systems. The MAX16000/  
MAX16001/MAX16002 monitor four voltages, the  
MAX16003/MAX16004/MAX16005 monitor six voltages,  
and the MAX16006/MAX16007 monitor eight voltages.  
o Fixed Thresholds for 5V, 3.3V, 3V, 2.5V, 1.8V,  
1.5V, 1.2V, and 0.9V Systems  
o Adjustable Thresholds Monitor Voltages Down to  
0.4V  
o Open-Drain Outputs with Internal Pullups Reduce  
the Number of External Components  
o Fixed 140ms (min) or Capacitor-Adjustable Reset  
Timeout  
The MAX16000/MAX16001/MAX16003/MAX16004/  
MAX16006 offer independent outputs for each moni-  
tored voltage. The MAX16001/MAX16002/MAX16004–  
MAX16007 offer a reset output that asserts whenever  
any of the monitored voltages fall below their respective  
thresholds or the manual reset input is asserted. The  
reset output remains asserted for the reset timeout after  
all voltages are above their respective thresholds and  
the manual reset input is deasserted. The minimum  
reset timeout is internally set to 140ms or can be adjust-  
ed with an external capacitor.  
o Manual Reset, Margin Enable, and Tolerance  
Select Inputs  
o Watchdog Timer  
1.6s (typ) Timeout Period  
54s Startup Delay After Reset (Except MAX16005)  
o Independent Watchdog Output (MAX16005)  
o RESET Output Indicates All Voltages Present  
o Independent Voltage Monitors  
All open-drain outputs have internal 30µA pullups that  
eliminate the need for external pullup resistors.  
However, each output can be driven with an external  
voltage up to 5.5V. Other features offered include a  
manual reset input, a tolerance pin for selecting 5% or  
10% input thresholds, and a margin enable function for  
deasserting the outputs during margin testing.  
o Guaranteed Correct Logic State Down to V = 1V  
CC  
o Small (4mm x 4mm) Thin QFN Package  
o TSSOP (5mm x 4.4mm) Package (MAX16005)  
Ordering Information  
PART  
TEMP RANGE  
PIN-PACKAGE  
The MAX16001/MAX16002/MAX16004–MAX16007 offer  
a watchdog timer that asserts RESET or an indepen-  
dent watchdog output (MAX16005) when the watchdog  
timeout period (1.6s typ) is exceeded. The watchdog  
timer can be disabled by floating the input.  
MAX16000_TC+  
-40°C to +125°C  
12 TQFN-EP*  
Note: The “_” is a placeholder for the input voltage threshold.  
See Table 1.  
+Denotes lead(Pb)-free/RoHS-compliant package.  
For tape-and-reel, add a “T” after the “+.” Tape-and-reel are  
offered in 2.5k increments.  
These devices are offered in 12-, 16-, 20-, and 24-lead  
thin QFN and 16-lead TSSOP packages. These are fully  
specified from -40°C to +125°C.  
*EP = Exposed pad.  
Ordering Information continued at end of data sheet.  
Typical Operating Circuit  
Applications  
Storage Equipment  
V
SRT  
MARGIN  
CC  
Servers  
V
V
IN1  
IN2  
IN3  
IN4  
IN1  
IN2  
Networking/Telecommunication Equipment  
Multivoltage ASICs  
MAX16005  
V
V
V
V
IN3  
IN4  
IN5  
IN6  
µP  
RESET  
WDI  
RST  
IN5  
IN6  
MR  
I/O  
WDO  
NMI  
GND TOL  
Selector Guide appears at end of data sheet.  
________________________________________________________________ Maxim Integrated Products  
1
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,  
or visit Maxim’s website at www.maxim-ic.com.  
Low-Voltage, Quad-/Hex-/Octal-Voltage  
µP Supervisors  
ABSOLUTE MAXIMUM RATINGS  
Operating Temperature Range .........................-40°C to +125°C  
Junction Temperature .....................................................+150°C  
Storage Temperature Range.............................-65°C to +150°C  
Lead Temperature (soldering, 10s) .................................+300°C  
V
CC  
, OUT_, IN_, RESET, WDO to GND....................-0.3V to +6V  
TOL, MARGIN, MR, SRT, WDI, to GND ..........-0.3V to V  
Input/Output Current (RESET, MARGIN,  
+ 0.3  
CC  
SRT, MR, TOL, OUT_, WDO, WDI) .............................. 20mA  
Continuous Power Dissipation (T = +70°C)  
A
12-Pin TQFN (derate 16.9mW/°C above +70°C) ........1349mW  
16-Pin TQFN (derate 16.9mW/°C above +70°C) ........1349mW  
20-Pin TQFN (derate 16.9mW/°C above +70°C) ........1355mW  
24-Pin TQFN (derate 16.9mW/°C above +70°C) ........1666mW  
16-Pin TSSOP (derate 9.4mW/°C above +70°C) ..........754mW  
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional  
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to  
absolute maximum rating conditions for extended periods may affect device reliability.  
ELECTRICAL CHARACTERISTICS  
(V  
= 2.0V to 5.5V, T = -40°C to +125°C, unless otherwise specified. Typical values are at V  
= 3.3V, T = +25°C.) (Note 1)  
CC A  
CC  
A
PARAMETER  
SYMBOL  
CONDITIONS  
MIN  
TYP  
MAX  
UNITS  
Operating Voltage Range  
V
(Note 2)  
1.0  
5.5  
V
CC  
V
= 3.3V, OUT_, RESET not asserted  
CC  
45  
65  
–MAX1607  
(Note 3)  
Supply Current  
I
µA  
V
CC  
V
V
= 5V, OUT_, RESET not asserted  
50  
70  
CC  
CC  
UVLO (Undervoltage Lockout)  
V
rising  
1.62  
1.8  
1.98  
UVLO  
IN_ (See Table 1)  
5V threshold, TOL = GND  
5V threshold, TOL = V  
4.50  
4.25  
4.625  
4.375  
3.053  
2.888  
2.775  
2.625  
2.313  
2.188  
1.665  
1.575  
1.388  
1.313  
1.11  
4.75  
4.50  
CC  
3.3V threshold, TOL = GND  
3.3V threshold, TOL = V  
2.970  
2.805  
2.70  
3.135  
2.970  
2.85  
CC  
3.0V threshold, TOL = GND  
3.0V threshold, TOL = V  
2.55  
2.70  
CC  
2.5V threshold, TOL = GND  
2.5V threshold, TOL = V  
2.250  
2.125  
1.62  
2.375  
2.250  
1.71  
CC  
Threshold Voltages (IN_ Falling)  
V
V
TH  
1.8V threshold, TOL = GND  
1.8V threshold, TOL = V  
1.53  
1.62  
CC  
1.5V threshold, TOL = GND  
1.5V threshold, TOL = V  
1.350  
1.275  
1.08  
1.425  
1.350  
1.14  
CC  
1.2V threshold, TOL = GND  
1.2V threshold, TOL = V  
1.02  
1.05  
1.08  
CC  
0.9V threshold, TOL = GND  
0.9V threshold, TOL = V  
0.810  
0.765  
0.833  
0.788  
0.855  
0.810  
CC  
2
_______________________________________________________________________________________  
Low-Voltage, Quad-/Hex-/Octal-Voltage  
µP Supervisors  
–MAX1607  
ELECTRICAL CHARACTERISTICS (continued)  
(V  
= 2.0V to 5.5V, T = -40°C to +125°C, unless otherwise specified. Typical values are at V  
= 3.3V, T = +25°C.) (Note 1)  
CC A  
CC  
A
PARAMETER  
SYMBOL  
CONDITIONS  
MIN  
TYP  
0.394  
0.372  
0.5  
MAX  
0.400  
0.378  
UNITS  
TOL = GND  
TOL = V  
0.388  
0.366  
Adjustable Threshold  
(IN_ Falling)  
V
V
TH  
CC  
IN_ Hysteresis  
IN_ Input Current  
RESET  
V
_
IN_ rising  
% V  
TH  
TH HYS  
Fixed thresholds  
3
16  
µA  
nA  
Adjustable thresholds  
-100  
+100  
SRT = V  
140  
200  
3.09  
0.206  
50  
280  
CC  
ms  
C
C
C
= 1500pF (Note 4)  
= 100pF  
2.43  
3.92  
SRT  
SRT  
SRT  
SRT  
Reset Timeout  
t
RP  
= open  
µs  
nA  
V
SRT Ramp Current  
SRT Threshold  
I
V
= 0V  
460  
600  
1.235  
100  
20  
740  
SRT  
1.173  
1.293  
SRT Hysteresis  
mV  
µs  
IN_ to Reset Delay  
t
IN_ falling  
RD  
V
V
V
= 3.3V, I  
= 10mA, RES  E  T   asserted  
= 6mA, RES  E  T   asserted  
= 50µA, RES  E  T   asserted  
0.30  
0.30  
0.30  
CC  
CC  
CC  
SINK  
RESET Output-Voltage Low  
V
V
= 2.5V, I  
= 1.2V, I  
OL  
SINK  
SINK  
V
2.0V, I  
= 6µA, RESET  
0.8 x  
V
CC  
CC  
SOURCE  
RESET Output-Voltage High  
MR Input-Voltage Low  
MR Input-Voltage High  
V
V
V
V
OH  
deasserted  
0.3 x  
V
IL  
V
CC  
0.7 x  
V
IH  
V
CC  
MR Minimum Pulse Width  
MR Glitch Rejection  
MR to Reset Delay  
1
µs  
ns  
ns  
kΩ  
100  
200  
20  
MR Pullup Resistance  
OUTPUTS (OUT_ )  
Pulled up to V  
12  
28  
CC  
V
V
= 3.3V, I  
= 2.5V, I  
= 2mA  
0.30  
0.30  
CC  
CC  
SINK  
OUT_ Output-Voltage Low  
V
V
OL  
= 1.2mA  
SINK  
0.8 x  
OUT_ Output-Voltage High  
V
V
2.0V, I  
= 6µA  
V
OH  
CC  
SOURCE  
V
CC  
IN_ to OUT_ Propagation Delay  
t
(V + 100mV) to (V - 100mV)  
20  
µs  
D
TH  
TH  
_______________________________________________________________________________________  
3
Low-Voltage, Quad-/Hex-/Octal-Voltage  
µP Supervisors  
ELECTRICAL CHARACTERISTICS (continued)  
(V  
= 2.0V to 5.5V, T = -40°C to +125°C, unless otherwise specified. Typical values are at V  
= 3.3V, T = +25°C). (Note 1)  
CC A  
CC  
A
PARAMETER  
SYMBOL  
CONDITIONS  
MIN  
TYP  
MAX  
UNITS  
REFERENCE OUTPUT (MAX16005 Only)  
Reference Short-Circuit Current  
Shorted to GND  
0.8  
1.235  
0.005  
10  
mA  
V
Reference Output Accuracy  
Line Regulation  
V
No load  
1.200  
1.270  
REF  
% / V  
Reference Load Regulation  
Sourcing, 0 I  
40µA  
REF  
WATCHDOG TIMER (MAX16001/MAX16002/MAX16004–MAX16007)  
0.3 x  
WDI Input-Voltage Low  
WDI Input-Voltage High  
V
V
V
IL  
V
CC  
0.7 x  
V
IH  
V
CC  
WDI Pulse Width  
(Note 5)  
50  
1.12  
35  
ns  
s
Watchdog Timeout Period  
Watchdog Startup Period  
Watchdog Input Current  
t
1.6  
54  
2.40  
72  
WDI  
MAX16001/2/4/6/7  
s
V
V
V
= 0 to V (Note 5)  
-1  
+1  
µA  
WDI  
CC  
–MAX1607  
= 3.3V, I  
= 2mA  
0.30  
0.30  
CC  
CC  
SINK  
SINK  
WDO Output-Voltage Low  
(MAX16005 Only)  
V
V
V
OL  
= 2.5V, I  
= 1.2mA  
WDO Output-Voltage High  
(MAX16005 Only)  
V
2.0V, I  
= 6µA, WDO  
0.8 x  
V
CC  
CC  
SOURCE  
V
OH  
deasserted  
DIGITAL LOGIC  
0.3 x  
TOL Input-Voltage Low  
V
V
IL  
V
CC  
0.7 x  
TOL Input-Voltage High  
TOL Input Current  
V
V
nA  
V
IH  
V
CC  
TOL = V  
100  
CC  
0.3 x  
MARGIN Input-Voltage Low  
V
IL  
V
CC  
0.7 x  
MARGIN Input-Voltage High  
V
V
IH  
V
CC  
MARGIN Pullup Resistance  
MARGIN Delay Time  
Pulled up to V  
12  
20  
50  
28  
kΩ  
CC  
t
Rising or falling (Note 6)  
µs  
MD  
Note 1: Devices are tested at T = +25°C and guaranteed by design for T = T  
to T  
= 1V.  
.
MAX  
A
A
MIN  
CC  
Note 2: The outputs are guaranteed to be in the correct logic state down to V  
Note 3: Measured with WDI, MARGIN, and MR unconnected.  
Note 4: The minimum and maximum specifications for this parameter are guaranteed by using the worst case of the SRT ramp cur-  
rent and SRT threshold specifications.  
Note 5: Guaranteed by design and not production tested.  
Note 6: Amount of time required for logic to lock/unlock outputs from margin testing.  
4
_______________________________________________________________________________________  
Low-Voltage, Quad-/Hex-/Octal-Voltage  
µP Supervisors  
–MAX1607  
Typical Operating Characteristics  
(V  
= 3.3V, T = +25°C, unless otherwise noted.)  
CC  
A
NORMALIZED THRESHOLD  
vs. SUPPLY VOLTAGE  
SUPPLY CURRENT vs. SUPPLY VOLTAGE  
SUPPLY CURRENT vs. TEMPERATURE  
1.010  
1.008  
1.005  
1.003  
1.000  
0.998  
0.995  
0.993  
0.990  
60  
55  
50  
45  
40  
35  
30  
60  
55  
50  
45  
40  
35  
30  
WDI, MARGIN, AND MR UNCONNECTED  
WDI, MARGIN, AND MR UNCONNECTED  
V
= 5V  
CC  
V
= 3.3V  
CC  
V
= 2.5V  
CC  
1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5  
SUPPLY VOLTAGE (V)  
1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5  
SUPPLY VOLTAGE (V)  
-40 -25 -10  
5
20 35 50 65 80 95 110 125  
TEMPERATURE (°C)  
NORMALIZED THRESHOLD  
vs. TEMPERATURE  
OUTPUT VOLTAGE vs. SOURCE CURRENT  
OUTPUT VOLTAGE vs. SINK CURRENT  
1.001  
1.000  
0.999  
0.998  
0.997  
0.996  
0.995  
1000  
800  
600  
400  
200  
0
100  
75  
50  
25  
0
OUT_ LOW  
OUT_ HIGH  
-40 -25 -10  
5
20 35 50 65 80 95 110 125  
0
5
10  
15  
20  
25  
30  
0
1
2
3
4
5
6
7
8
TEMPERATURE (°C)  
SOURCE CURRENT (µA)  
SINK CURRENT (mA)  
RESET TIMEOUT PERIOD  
vs. TEMPERATURE  
MAXIMUM TRANSIENT DURATION  
vs. INPUT OVERDRIVE  
RESET TIMEOUT DELAY  
MAX16000 toc09  
600  
500  
400  
300  
200  
100  
0
198  
197  
196  
195  
194  
193  
192  
191  
190  
OUTPUT GOES LOW  
ABOVE THIS LINE  
IN1  
5V/div  
OUT1  
2V/div  
RESET  
2V/div  
SRT = V  
CC  
1
10  
100  
1000  
-40 -25 -10  
5
20 35 50 65 80 95 110 125  
40ms/div  
TEMPERATURE (°C)  
INPUT OVERDRIVE (mV)  
_______________________________________________________________________________________  
5
Low-Voltage, Quad-/Hex-/Octal-Voltage  
µP Supervisors  
Typical Operating Characteristics (continued)  
(V  
= 3.3V, T = +25°C, unless otherwise noted.)  
A
CC  
RESET TIMEOUT PERIOD  
WATCHDOG TIMEOUT PERIOD  
MARGIN ENABLE FUNCTION  
vs. C  
vs. TEMPERATURE  
SRT  
MAX16000 toc12  
1000  
1.60  
1.59  
1.58  
1.57  
1.56  
1.55  
1.54  
1.53  
1.52  
1.51  
1.50  
MARGIN  
2V/div  
100  
10  
1
OUT_  
2V/div  
RESET  
2V/div  
0.1  
OUT_ AND RESET ARE  
BELOW RESPECTIVE  
THRESHOLDS  
0.01  
0.01  
0.1  
1
10  
100  
1000  
100µs/div  
-40 -25 -10  
5
20 35 50 65 80 95 110 125  
C
(nF)  
TEMPERATURE (°C)  
SRT  
REFERENCE VOLTAGE  
vs. SOURCE CURRENT  
–MAX1607  
MARGIN DISABLE FUNCTION  
MAX16000 toc13  
1.260  
1.255  
1.250  
1.245  
1.240  
1.235  
1.230  
1.225  
MAX16005  
MARGIN  
2V/div  
OUT_  
2V/div  
RESET  
2V/div  
OUT_ AND RESET ARE BELOW RESPECTIVE  
THRESHOLDS  
1.220  
0
100µs/div  
100  
200  
300  
400  
500  
600  
SOURCE CURRENT (µA)  
REFERENCE VOLTAGE  
vs. SUPPLY VOLTAGE  
REFERENCE VOLTAGE  
vs. TEMPERATURE  
1.260  
1.28  
MAX16005  
MAX16005  
1.255  
1.250  
1.245  
1.240  
1.235  
1.230  
1.225  
1.220  
1.27  
1.26  
1.25  
1.24  
1.23  
1.22  
1.21  
1.20  
1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5  
SUPPLY VOLTAGE (V)  
-40 -25 -10  
5
20 35 50 65 80 95 110 125  
TEMPERATURE (°C)  
6
_______________________________________________________________________________________  
Low-Voltage, Quad-/Hex-/Octal-Voltage  
µP Supervisors  
–MAX1607  
Pin Description (MAX16000/MAX16001/MAX16002)  
PIN  
NAME  
FUNCTION  
1
2
3
4
1
2
4
5
1
2
4
5
IN3  
IN4  
Monitored Input Voltage 3. See Table 1 for the input voltage threshold.  
Monitored Input Voltage 4. See Table 1 for the input voltage threshold.  
Ground  
GND  
V
Unmonitored Power-Supply Input  
CC  
Output 3. When the voltage at IN3 falls below its threshold, OUT3 goes low and stays low until the  
5
6
7
8
9
6
8
OUT3  
OUT4  
voltage at IN3 exceeds its threshold. The open-drain output has a 30µA internal pullup to V  
.
CC  
Output 4. When the voltage at IN4 falls below its threshold, OUT4 goes low and stays low until the  
voltage at IN4 exceeds its threshold. The open-drain output has a 30µA internal pullup to V  
7
.
CC  
Active-Low Manual Deassert Input. Pull MARGIN low to deassert all outputs (go into high state),  
regardless of the voltage at any monitored input.  
10  
11  
12  
MARGIN  
OUT2  
Output 2. When the voltage at IN2 falls below its threshold, OUT2 goes low and stays low until the  
voltage at IN2 exceeds its threshold. The open-drain output has a 30µA internal pullup to V  
.
CC  
Output 1. When the voltage at IN1 falls below its threshold, OUT1 goes low and stays low until the  
OUT1  
voltage at IN1 exceeds its threshold. The open-drain output has a 30µA internal pullup to V  
.
CC  
10  
11  
14  
15  
10  
11  
IN1  
IN2  
Monitored Input Voltage 1. See Table 1 for the input voltage threshold.  
Monitored Input Voltage 2. See Table 1 for the input voltage threshold.  
Threshold Tolerance Input. Connect TOL to GND to select 5% threshold tolerance. Connect TOL  
to V to select 10% threshold tolerance.  
12  
16  
3
12  
3
TOL  
WDI  
CC  
Watchdog Timer Input. If WDI remains low or high for longer than the watchdog timeout period,  
RESET is asserted. The timer clears whenever a reset is asserted or a rising or falling edge on  
WDI is detected. The watchdog timer enters a startup period that allows 54s for the first  
transition to occur before a reset. Leave WDI unconnected to disable the watchdog timer. The  
WDI floating-state detector uses a small 400nA current. Therefore, do not connect WDI to  
anything that will source or sink more than 200nA. Note that the leakage current specification for  
most three-state drivers exceeds 200nA.  
Active-Low Manual Reset Input. Pull MR low to assert RESET low. RESET remains low for the  
8
9
6
7
MR  
reset timeout period after MR is deasserted. MR is pulled up to V  
through a 20kresistor.  
CC  
Set Reset Timeout Input. Connect a capacitor from SRT to GND to set the reset timeout period.  
The reset timeout period can be calculated as follows:  
6
SRT  
Reset Timeout (s) = 2.06 x 10 () x C  
(F). For the internal timeout period of 140ms (min),  
SRT  
connect SRT to V  
.
CC  
Active-Low Reset Output. RESET asserts low when any of the monitored voltages falls below its  
respective threshold or MR is asserted. RESET remains asserted for the reset timeout period  
after all monitored voltages exceed their respective thresholds and MR is deasserted. This  
open-drain output has a 30µA internal pullup.  
13  
9
RESET  
Exposed Pad. EP is internally connected to GND. Connect EP to the ground plane to provide a  
low thermal resistance path from the IC junction to the PCB. Do not use as the electrical  
connection to GND.  
EP  
_______________________________________________________________________________________  
7
Low-Voltage, Quad-/Hex-/Octal-Voltage  
µP Supervisors  
Pin Description (MAX16003/MAX16004/MAX16005)  
PIN  
NAME  
FUNCTION  
1
2
3
4
5
1
2
3
5
6
3
4
5
7
8
1
2
3
5
6
IN4  
IN5  
Monitored Input Voltage 4. See Table 1 for the input voltage threshold.  
Monitored Input Voltage 5. See Table 1 for the input voltage threshold.  
Monitored Input Voltage 6. See Table 1 for the input voltage threshold.  
Ground  
IN6  
GND  
V
Unmonitored Power-Supply Input  
CC  
Output 4. When the voltage at IN4 falls below its threshold, OUT4 goes low and stays low  
until the voltage at IN4 exceeds its threshold. The open-drain output has a 30µA internal  
6
7
7
8
OUT4  
OUT5  
pullup to V  
.
CC  
Output 5. When the voltage at IN5 falls below its threshold, OUT5 goes low and stays low  
until the voltage at IN5 exceeds its threshold. The open-drain output has a 30µA internal  
pullup to V  
.
CC  
–MAX1607  
Output 6. When the voltage at IN6 falls below its threshold, OUT6 goes low and stays low  
until the voltage at IN6 exceeds its threshold. The open-drain output has a 30µA internal  
8
9
OUT6  
pullup to V  
.
CC  
Manual Deassert Input. Pull MARGIN low to deassert all outputs (go into high state),  
regardless of the voltage at any monitored input.  
9
12  
13  
13  
11  
MARGIN  
Output 3. When the voltage at IN3 falls below its threshold, OUT3 goes low and stays low  
until the voltage at IN3 exceeds its threshold. The open-drain output has a 30µA internal  
10  
OUT3  
pullup to V  
.
CC  
Output 2. When the voltage at IN2 falls below its threshold, OUT2 goes low and stays low  
until the voltage at IN2 exceeds its threshold. The open-drain output has a 30µA internal  
11  
12  
14  
15  
OUT2  
OUT1  
pullup to V  
.
CC  
Output 1. When the voltage at IN1 falls below its threshold, OUT1 goes low and stays low  
until the voltage at IN1 exceeds its threshold. The open-drain output has a 30µA internal  
pullup to V  
.
CC  
13  
14  
15  
17  
18  
19  
15  
16  
1
13  
14  
15  
IN1  
IN2  
IN3  
Monitored Input Voltage 1. See Table 1 for the input voltage threshold.  
Monitored Input Voltage 2. See Table 1 for the input voltage threshold.  
Monitored Input Voltage 3. See Table 1 for the input voltage threshold.  
8
_______________________________________________________________________________________  
Low-Voltage, Quad-/Hex-/Octal-Voltage  
µP Supervisors  
–MAX1607  
Pin Description (MAX16003/MAX16004/MAX16005) (continued)  
PIN  
NAME  
FUNCTION  
Threshold Tolerance Input. Connect TOL to GND to select 5% threshold tolerance.  
16  
20  
2
6
16  
TOL  
Connect TOL to V  
to select 10% threshold tolerance.  
CC  
Watchdog Timer Input.  
MAX16004: If WDI remains low or high for longer than the watchdog timeout period,  
RESET is asserted and the timer is cleared. The timer also clears whenever a reset is  
asserted or a rising or falling edge on WDI is detected. The watchdog timer enters a  
startup period that allows 54s for the first transition to occur before a reset. Leave WDI  
unconnected to disable the watchdog timer.  
MAX16005: If WDI remains low or high for longer than the watchdog timeout period,  
WDO is asserted. The timer clears whenever a rising or falling edge on WDI is detected.  
Leave WDI unconnected to disable the watchdog timer. The MAX16005 does not have a  
startup period.  
4
4
WDI  
MAX16004/MAX16005: The WDI floating-state detector uses a small 100nA current.  
Therefore, do not connect WDI to anything that will source or sink more than 50nA. Note  
that the leakage current specification for most three-state drivers exceeds 50nA.  
Active-Low Manual Reset Input. Pull MR low to assert RESET low. RESET remains low for  
10  
11  
11  
12  
9
MR  
the reset timeout period after MR is deasserted. MR is pulled up to V  
resistor.  
through a 20kΩ  
CC  
Set Reset Timeout Input. Connect a capacitor from SRT to GND to set the reset timeout  
period. The reset timeout period can be calculated as follows:  
6
10  
SRT  
Reset Timeout (s) = 2.06 x 10 () x C  
(F). For the internal timeout period of 140ms  
SRT  
(min), connect SRT to V  
.
CC  
Active-Low Reset Output. RESET asserts low when any of the monitored voltages falls  
below its respective threshold or MR is asserted. RESET remains asserted for the reset  
timeout period after all monitored voltages exceed their respective thresholds and MR is  
deasserted. This open-drain output has a 30µA internal pullup.  
16  
14  
9
12  
7
RESET  
REF  
Reference Output. The reference output voltage of 1.23V can source up to 40µA.  
Active-Low Watchdog Output. WDO asserts and stays low whenever any of the IN_ inputs  
fall below their respective thresholds. WDO deasserts without a timeout delay when all  
the IN_ inputs rise above their thresholds. When all the IN_ inputs rise above their  
thresholds, WDO asserts low whenever the watchdog timer times out. WDO deasserts  
after a valid WDI transition or if MR is pulled low. The watchdog timer begins counting  
after the reset timeout period once MR goes high. Pull MARGIN low to deassert WDO.  
10  
8
WDO  
Exposed Pad. EP is internally connected to GND. Connect EP to the ground plane to  
provide a low thermal resistance path from the IC junction to the PCB. Do not use as the  
electrical connection to GND.  
EP  
_______________________________________________________________________________________  
9
Low-Voltage, Quad-/Hex-/Octal-Voltage  
µP Supervisors  
Pin Description (MAX16006/MAX16007)  
PIN  
NAME  
FUNCTION  
1
2
3
4
1
2
3
4
IN5  
IN6  
IN7  
IN8  
Monitored Input Voltage 5. See Table 1 for the input voltage threshold.  
Monitored Input Voltage 6. See Table 1 for the input voltage threshold.  
Monitored Input Voltage 7. See Table 1 for the input voltage threshold.  
Monitored Input Voltage 8. See Table 1 for the input voltage threshold.  
Watchdog Timer Input. If WDI remains low or high for longer than the watchdog timeout period,  
RESET is asserted and the timer is cleared. The timer also clears whenever a reset is asserted or a  
rising or falling edge on WDI is detected. The watchdog timer enters a startup period that allows 54s  
for the first transition to occur before a reset. Leave WDI unconnected to disable the watchdog timer.  
The WDI floating-state detector uses a small 400nA current. Therefore, do not connect WDI to  
anything that will source or sink more than 200nA. Note that the leakage current specification for most  
three-state drivers exceeds 200nA.  
5
5
WDI  
6
7
6
7
GND  
Ground  
–MAX1607  
V
Unmonitored Power-Supply Input  
CC  
Output 5. When the voltage at IN5 falls below its threshold, OUT5 goes low and stays low until the  
8
10  
OUT5  
OUT6  
OUT7  
OUT8  
MR  
voltage at IN5 exceeds its threshold. The open-drain output has a 30µA internal pullup to V  
.
CC  
Output 6. When the voltage at IN6 falls below its threshold, OUT6 goes low and stays low until the  
voltage at IN6 exceeds its threshold. The open-drain output has a 30µA internal pullup to V  
9
.
CC  
Output 7. When the voltage at IN7 falls below its threshold, OUT7 goes low and stays low until the  
voltage at IN7 exceeds its threshold. The open-drain output has a 30µA internal pullup to V  
10  
11  
12  
.
CC  
Output 8. When the voltage at IN8 falls below its threshold, OUT8 goes low and stays low until the  
voltage at IN8 exceeds its threshold. The open-drain output has a 30µA internal pullup to V  
.
CC  
Active-Low Manual Reset Input. Pull MR low to assert RESET low. RESET remains low for the reset  
timeout period after MR is deasserted. MR is pulled up to V through a 20kresistor.  
CC  
Set Reset Timeout Input. Connect a capacitor from SRT to GND to set the reset timeout period. The  
reset timeout period can be calculated as follows:  
6
13  
11  
SRT  
Reset Timeout (s) = 2.06 x 10 () x C  
(F). For the internal timeout period of 140ms (min), connect  
SRT  
SRT to V  
.
CC  
10 ______________________________________________________________________________________  
Low-Voltage, Quad-/Hex-/Octal-Voltage  
µP Supervisors  
–MAX1607  
Pin Description (MAX16006/MAX16007) (continued)  
PIN  
NAME  
FUNCTION  
Margin Disable Input. Pull MARGIN low to deassert all outputs (go into high state), regardless of the  
voltage at any monitored input.  
14  
15  
16  
17  
18  
12  
MARGIN  
OUT4  
Output 4. When the voltage at IN4 falls below its threshold, OUT4 goes low and stays low until the  
voltage at IN4 exceeds its threshold. The open-drain output has a 30µA internal pullup to V  
.
CC  
Output 3. When the voltage at IN3 falls below its threshold, OUT3 goes low and stays low until the  
voltage at IN3 exceeds its threshold. The open-drain output has a 30µA internal pullup to V  
OUT3  
.
CC  
Output 2. When the voltage at IN2 falls below its threshold, OUT2 goes low and stays low until the  
voltage at IN2 exceeds its threshold. The open-drain output has a 30µA internal pullup to V  
OUT2  
.
CC  
Output 1. When the voltage at IN1 falls below its threshold, OUT1 goes low and stays low until the  
voltage at IN1 exceeds its threshold. The open-drain output has a 30µA internal pullup to V  
OUT1  
.
CC  
Active-Low Reset Output. RESET asserts low when any of the monitored voltages falls below its  
respective threshold or MR is asserted. RESET remains asserted for the reset timeout period after all  
monitored voltages exceed their respective thresholds and MR is deasserted. This open-drain output  
has a 30µA internal pullup.  
19  
15  
RESET  
20  
21  
22  
23  
16  
17  
18  
19  
IN1  
IN2  
IN3  
IN4  
Monitored Input Voltage 1. See Table 1 for the input voltage threshold.  
Monitored Input Voltage 2. See Table 1 for the input voltage threshold.  
Monitored Input Voltage 3. See Table 1 for the input voltage threshold.  
Monitored Input Voltage 4. See Table 1 for the input voltage threshold.  
Threshold Tolerance Input. Connect TOL to GND to select 5% threshold tolerance. Connect TOL to  
24  
20  
TOL  
N.C.  
EP  
V
to select 10% threshold tolerance.  
CC  
8, 9,  
13, 14  
Not Internally Connected  
Exposed Pad. EP is internally connected to GND. Connect EP to the ground plane to provide a low thermal  
resistance path from the IC junction to the PCB. Do not use as the electrical connection to GND.  
______________________________________________________________________________________ 11  
Low-Voltage, Quad-/Hex-/Octal-Voltage  
µP Supervisors  
Table 1. Input-Voltage-Threshold Selector  
PART  
MAX16000A  
MAX16000B  
MAX16000C  
MAX16000D  
MAX16000E  
MAX16001A  
MAX16001B  
MAX16001C  
MAX16001D  
MAX16001E  
MAX16002A  
MAX16002B  
MAX16002C  
MAX16002D  
MAX16002E  
MAX16003A  
MAX16003B  
MAX16003C  
MAX16003D  
MAX16003E  
MAX16004A  
MAX16004B  
MAX16004C  
MAX16004D  
MAX16004E  
MAX16005A  
MAX16005B  
MAX16005C  
MAX16005D  
MAX16005E  
MAX16006A  
MAX16006B  
MAX16006C  
MAX16006D  
MAX16006E  
MAX16006F  
MAX16007A  
MAX16007B  
MAX16007C  
MAX16007D  
MAX16007E  
IN1  
3.3  
IN2  
2.5  
IN3  
ADJ  
ADJ  
ADJ  
ADJ  
ADJ  
ADJ  
ADJ  
ADJ  
ADJ  
ADJ  
ADJ  
ADJ  
ADJ  
ADJ  
ADJ  
ADJ  
ADJ  
ADJ  
ADJ  
ADJ  
ADJ  
ADJ  
ADJ  
ADJ  
ADJ  
ADJ  
ADJ  
ADJ  
ADJ  
ADJ  
ADJ  
ADJ  
ADJ  
ADJ  
ADJ  
3.0  
IN4  
1.8  
IN5  
IN6  
IN7  
IN8  
3.3  
ADJ  
2.5  
1.8  
ADJ  
3.3  
1.8  
2.5  
ADJ  
ADJ  
1.8  
ADJ  
3.3  
ADJ  
2.5  
3.3  
ADJ  
2.5  
1.8  
ADJ  
3.3  
1.8  
2.5  
ADJ  
ADJ  
1.8  
ADJ  
3.3  
ADJ  
2.5  
3.3  
ADJ  
2.5  
1.8  
ADJ  
3.3  
1.8  
2.5  
ADJ  
ADJ  
1.8  
ADJ  
3.3  
ADJ  
2.5  
–MAX1607  
ADJ  
ADJ  
ADJ  
ADJ  
ADJ  
ADJ  
ADJ  
ADJ  
ADJ  
ADJ  
ADJ  
ADJ  
ADJ  
ADJ  
ADJ  
ADJ  
ADJ  
ADJ  
ADJ  
ADJ  
1.8  
ADJ  
ADJ  
ADJ  
ADJ  
ADJ  
ADJ  
ADJ  
ADJ  
ADJ  
ADJ  
ADJ  
ADJ  
ADJ  
ADJ  
ADJ  
ADJ  
ADJ  
ADJ  
ADJ  
ADJ  
1.5  
3.3  
ADJ  
2.5  
1.8  
3.3  
ADJ  
1.8  
ADJ  
ADJ  
3.3  
2.5  
ADJ  
2.5  
ADJ  
1.8  
3.3  
ADJ  
2.5  
1.8  
3.3  
ADJ  
1.8  
ADJ  
ADJ  
3.3  
2.5  
ADJ  
2.5  
ADJ  
1.8  
3.3  
ADJ  
2.5  
1.8  
3.3  
ADJ  
1.8  
ADJ  
ADJ  
3.3  
2.5  
ADJ  
2.5  
ADJ  
1.8  
ADJ  
ADJ  
ADJ  
ADJ  
ADJ  
1.2  
ADJ  
ADJ  
ADJ  
ADJ  
ADJ  
ADJ  
ADJ  
ADJ  
ADJ  
ADJ  
0.9  
ADJ  
ADJ  
ADJ  
ADJ  
ADJ  
3.3  
ADJ  
2.5  
1.8  
3.3  
ADJ  
1.8  
ADJ  
ADJ  
5.0  
2.5  
ADJ  
3.3  
ADJ  
2.5  
3.3  
2.5  
ADJ  
ADJ  
ADJ  
ADJ  
ADJ  
1.8  
ADJ  
ADJ  
ADJ  
ADJ  
ADJ  
ADJ  
ADJ  
ADJ  
ADJ  
ADJ  
3.3  
ADJ  
2.5  
1.8  
3.3  
ADJ  
1.8  
ADJ  
ADJ  
2.5  
ADJ  
ADJ  
Note: Other fixed thresholds may be available. Contact factory for availability.  
12 ______________________________________________________________________________________  
Low-Voltage, Quad-/Hex-/Octal-Voltage  
µP Supervisors  
–MAX1607  
Functional Diagrams  
V
CC  
V
CC  
RESET  
CIRCUIT  
IN1  
IN2  
IN3  
OUT1  
OUT2  
OUT3  
OUT4  
OUTPUT  
DRIVER  
EN  
IN4  
V
V
CC  
CC  
MAX16000  
V
CC  
TOL  
REFERENCE  
UNDERVOLTAGE LOCKOUT  
MARGIN  
Figure 1. MAX16000D Functional Diagram  
______________________________________________________________________________________ 13  
Low-Voltage, Quad-/Hex-/Octal-Voltage  
µP Supervisors  
Functional Diagrams (continued)  
WDI  
MR  
SRT  
V
CC  
V
CC  
WATCHDOG  
TIMER CIRCUIT  
TIMING  
RESET CIRCUIT  
RESET  
(OUT1)  
IN1  
IN2  
IN3  
(OUT2)  
(OUT3)  
(OUT4)  
–MAX1607  
OUTPUT  
DRIVER  
EN  
IN4  
V
V
CC  
CC  
MAX16001/  
MAX16002  
V
CC  
TOL  
REFERENCE  
UNDERVOLTAGE LOCKOUT  
MARGIN  
( ) MAX16001 ONLY  
Figure 2. MAX16001D/MAX16002D Functional Diagram  
14 ______________________________________________________________________________________  
Low-Voltage, Quad-/Hex-/Octal-Voltage  
µP Supervisors  
–MAX1607  
Functional Diagrams (continued)  
(WDI)  
(MR)  
(SRT)  
V
CC  
V
CC  
WATCHDOG  
TIMER CIRCUIT  
TIMING  
RESET CIRCUIT  
(RESET)  
OUT1  
IN1  
IN2  
IN3  
IN4  
IN5  
OUT2  
OUT3  
OUT4  
OUTPUT  
DRIVER  
OUT5  
OUT6  
IN6  
EN  
V
V
CC  
CC  
MAX16003/  
MAX16004  
V
TOL  
REFERENCE  
UNDERVOLTAGE LOCKOUT  
CC  
MARGIN  
( ) MAX16004 ONLY  
Figure 3. MAX16003C/MAX16004C Functional Diagram  
______________________________________________________________________________________ 15  
Low-Voltage, Quad-/Hex-/Octal-Voltage  
µP Supervisors  
Functional Diagrams (continued)  
WDO  
WDI  
MR  
SRT  
V
CC  
V
CC  
WATCHDOG  
TIMER CIRCUIT  
TIMING  
RESET CIRCUIT  
RESET  
IN1  
IN2  
IN3  
IN4  
IN5  
–MAX1607  
OUTPUT  
DRIVER  
IN6  
EN  
V
V
CC  
CC  
V
TOL  
MAX16005  
REFERENCE  
UNDERVOLTAGE LOCKOUT  
CC  
REF  
MARGIN  
Figure 4. MAX16005C Functional Diagram  
16 ______________________________________________________________________________________  
Low-Voltage, Quad-/Hex-/Octal-Voltage  
µP Supervisors  
–MAX1607  
Functional Diagrams (continued)  
WDI  
MR  
SRT  
V
CC  
V
CC  
WATCHDOG  
TIMER CIRCUIT  
TIMING  
RESET CIRCUIT  
RESET  
(OUT1)  
(OUT2)  
IN1  
IN2  
IN3  
(OUT3)  
OUTPUT  
DRIVER  
IN4  
IN5  
(OUT4)  
(OUT5)  
IN6  
IN7  
(OUT6)  
(OUT7)  
OUT8  
IN8  
EN  
V
V
CC  
CC  
MAX16006/  
MAX16007  
V
TOL  
REFERENCE  
UNDERVOLTAGE LOCKOUT  
CC  
MARGIN  
( ) MAX16006 ONLY  
Figure 5. MAX16006C/MAX16007C Functional Diagram  
______________________________________________________________________________________ 17  
Low-Voltage, Quad-/Hex-/Octal-Voltage  
µP Supervisors  
Window Detection  
Detailed Description  
A window detector circuit uses two auxiliary inputs in  
the configuration shown in Figure 8. External resistors  
set the two threshold voltages of the window detector  
circuit. External logic gates create the OUT signal. The  
window detection width is the difference between the  
threshold voltages (Figure 9).  
The MAX16000–MAX16007 are low-voltage, quad-/hex-/  
octal-voltage µP supervisors in small thin QFN and TSSOP  
packages. These devices provide supervisory functions  
for complex multivoltage systems. The MAX16000/  
MAX16001/MAX16002 monitor four voltages, the  
MAX16003/MAX16004/MAX16005 monitor six voltages,  
and the MAX16006/MAX16007 monitor eight voltages.  
The MAX16000/MAX16001/MAX16003/MAX16004/  
MAX16006 offer independent outputs for each moni-  
tored voltage. The MAX16001/MAX16002/MAX16004–  
MAX16007 offer a reset output that asserts whenever  
any of the monitored voltages fall below their respective  
thresholds or the manual reset input is asserted. The  
reset output remains asserted for the reset timeout after  
all voltages are above their respective thresholds and  
the manual reset input is deasserted. The minimum  
reset timeout is internally set to 140ms or can be  
adjusted with an external capacitor.  
5V  
V
CC  
V1  
V2  
IN1  
IN2  
IN3  
IN4  
MAX16000  
MAX16001  
V3  
V4  
OUT1  
OUT2  
OUT3  
OUT4  
All open-drain outputs have internal 30µA pullups that  
eliminate the need for external pullup resistors.  
However, each output can be driven with an external  
voltage up to 5.5V. Other features offered include a  
manual reset input, a tolerance pin for selecting 5% or  
10% input thresholds, and a margin enable function for  
deasserting the outputs during margin testing.  
GND  
–MAX1607  
Figure 6. Quad Undervoltage Detector with LED Indicators  
The MAX16001/MAX16002/MAX16004–MAX16007 offer  
a watchdog timer that asserts RESET or an indepen-  
dent watchdog output (MAX16005) when the watchdog  
timeout period (1.6s typ) is exceeded. The watchdog  
timer can be disabled by floating the input.  
5V  
D1  
D2  
D3  
D4  
V
CC  
Applications Information  
OUT1  
OUT2  
V
(5V)  
IN  
IN1  
Undervoltage-Detection Circuit  
The open-drain outputs of the MAX16000–MAX16007  
can be configured to detect an undervoltage condition.  
Figure 6 shows a configuration where an LED turns on  
when the comparator output is low, indicating an  
undervoltage condition. These devices can also be  
used in applications such as system supervisory moni-  
IN2  
IN3  
IN4  
MAX16000  
MAX16001  
OUT3  
OUT4  
toring, multivoltage level detection, and V  
monitoring (Figure 7).  
bar-graph  
CC  
Tolerance (TOL)  
The MAX16000–MAX16007 feature a pin-selectable  
threshold tolerance. Connect TOL to GND to select 5%  
GND  
threshold tolerance. Connect TOL to V  
threshold tolerance.  
to select 10%  
CC  
Figure 7. V  
Bar-Graph Monitoring  
CC  
18 ______________________________________________________________________________________  
Low-Voltage, Quad-/Hex-/Octal-Voltage  
µP Supervisors  
–MAX1607  
V
INTH  
R1  
R2  
V
=
(
1 + )( TH  
V
+ V  
)
TH1  
TH_HYS  
5V  
R1  
V
CC  
R1  
IN1  
IN2  
IN3  
IN4  
OUT1  
OUT2  
OUT3  
OUT4  
R2  
MAX16000  
MAX16001  
R2  
INPUT  
OUT  
V
TH  
R3  
V
V
INTH  
- 1  
R1 = R2( )  
TH  
R4  
GND  
Figure 10. Setting the Adjustable Input  
R3  
R4  
V
=
(1 +  
)
V
TH  
TH4  
Adjustable Input  
These devices offer several monitor options with  
adjustable input thresholds (see Table 1). The threshold  
voltage at each adjustable IN_ input is typically 0.394V  
Figure 8. Window Detection  
(TOL = GND) or 0.372 (TOL = V ). To monitor a voltage  
CC  
V
, connect a resistive-divider network to the circuit as  
INTH  
shown in Figure 10.  
V
INTH  
= V ((R1 / R2) + 1)  
TH  
R1 = R2 ((V  
/ V ) - 1)  
TH  
OUT1  
INTH  
V
TH1  
Large resistors can be used to minimize current through  
the external resistors. For greater accuracy, use lower-  
value resistors.  
Unused Inputs  
Connect any unused IN_ inputs to a voltage above its  
threshold.  
OUT4  
V
TH4  
OUT_ Outputs  
(MAX16000/MAX16001/MAX16003/  
MAX16004/MAX16006)  
The OUT_ outputs go low when their respective IN_  
inputs drop below their specified thresholds. The output  
is open drain with a 30µA internal pullup to V . For  
CC  
OUT  
many applications, no external pullup resistor is required  
to interface with other logic devices. An external pullup  
resistor to any voltage from 0 to 5.5V overrides the inter-  
nal pullup if interfacing to different logic supply voltages.  
Internal circuitry prevents reverse current flow from the  
V  
TH  
Figure 9. Output Response of Window Detector Circuit  
external pullup voltage to V (Figure 11).  
CC  
______________________________________________________________________________________ 19  
Low-Voltage, Quad-/Hex-/Octal-Voltage  
µP Supervisors  
V
CC  
= 3.3V  
5V  
IN_  
V
V
TH_  
TH_  
100k  
V
V
CC  
CC  
RESET  
90%  
10%  
OUT_  
RESET  
t
t
RP  
RD  
OUT_  
90%  
MAX16001/  
MAX16002/  
MAX16004–MAX16007  
10%  
t
D
t
D
GND  
GND  
–MAX1607  
Figure 12. Output Timing Diagram  
Figure 11. Interfacing to a Different Logic Supply Voltage  
RESET Output (MAX16001/MAX16002/  
MAX16004–MAX16007)  
WDO (MAX16005 Only)  
WDO asserts and stays low whenever any of the IN_  
inputs fall below their respective thresholds. WDO  
deasserts without a timeout delay when all the IN_  
inputs rise above their thresholds. When all the IN_  
inputs rise above their thresholds, WDO asserts low  
whenever the watchdog timer times out. WDO  
deasserts after a valid WDI transition or if MR is pulled  
low. The watchdog timer begins counting after the reset  
timeout period once MR goes high. Pull MARGIN low to  
deassert WDO regardless of any other condition. The  
watchdog timer continues to run when MARGIN is low  
and if a timeout occurs. WDO will assert MR after  
MARGIN is deasserted. This open-drain output has a  
30µA internal pullup. An external pullup resistor to any  
voltage from 0 to 5.5V overrides the internal pullup if  
interfacing to different logic supply voltages. Internal cir-  
cuitry prevents reverse current flow from the external  
RESET asserts low when any of the monitored voltages  
fall below their respective thresholds or MR is asserted.  
RESET remains asserted for the reset timeout period  
after all monitored voltages exceed their respective  
thresholds and MR is deasserted (see Figure 12). This  
open-drain output has a 30µA internal pullup. An exter-  
nal pullup resistor to any voltage from 0 to 5.5V overrides  
the internal pullup if interfacing to different logic supply  
voltages. Internal circuitry prevents reverse current flow  
from the external pullup voltage to V (Figure 11).  
CC  
pullup voltage to V (Figure 11).  
CC  
20 ______________________________________________________________________________________  
Low-Voltage, Quad-/Hex-/Octal-Voltage  
µP Supervisors  
–MAX1607  
V
+ V  
TH_HYST  
V
+ V  
TH_HYST  
TH  
TH  
V
TH  
V
IN  
RESET  
WDO  
t
t
RP  
RP  
WDI  
t<t  
WD  
t
t<t  
WD  
t<t  
WD  
WD  
Figure 13. WDO Timing Related to V and t  
TH  
RP  
V
+ V  
TH_HYST  
V
+ V  
TH_HYST  
TH  
TH  
V
TH  
V
IN  
MARGIN  
RESET  
t
WD  
INTERNAL  
RESET  
SIGNAL  
t
t
RP  
RP  
Figure 14. Margin Output Disable (MARGIN) Affect on RESET within t  
RP  
______________________________________________________________________________________ 21  
Low-Voltage, Quad-/Hex-/Octal-Voltage  
µP Supervisors  
V
+ V  
TH_HYST  
V
+ V  
TH_HYST  
TH  
TH  
V
TH  
V
IN  
MARGIN  
RESET  
INTERNAL  
RESET  
SIGNAL  
–MAX1607  
t
t
RP  
RP  
Figure 15. Margin Output Disable (MARGIN) Affect on RESET Outside t  
RP  
Reset Timeout Capacitor  
The reset timeout period can be adjusted to accommo-  
date a variety of µP applications from 50µs to 1.12s.  
MR to GND to create a manual reset function. External  
debounce circuitry is not required. If MR is driven from  
long cables or if the device is used in a noisy environ-  
ment, connecting a 0.1µF capacitor from MR to GND  
provides additional noise immunity.  
Adjust the reset timeout period (t ) by connecting a  
RP  
capacitor (C  
) between SRT and GND. Calculate the  
SRT  
reset timeout capacitor as follows:  
Margin Output Disable (MARGIN)  
MARGIN allows system-level testing while power sup-  
plies are adjusted from their nominal voltages. Drive  
MARGIN low to force RESET, WDO, and OUT_ high,  
regardless of the voltage at any monitored input. The  
state of each output does not change while MARGIN =  
GND. The watchdog timer continues to run when  
MARGIN is low, and if a timeout occurs, WDO/RESET  
t
(s) xI  
SRT  
RP  
V
C
(F) =  
SRT  
TH_ SRT  
Connect SRT to V  
for a factory-programmed reset  
CC  
timeout of 140ms (min).  
Manual Reset Input (MR)  
(MAX16001/MAX16002/  
MAX16004–MAX16007)  
will assert t  
after MARGIN is deasserted.  
MD  
The MARGIN input is internally pulled up to V . Leave  
CC  
if unused.  
MARGIN unconnected or connect to V  
CC  
Many µP-based products require manual reset capabil-  
ity, allowing the operator, a test technician, or external  
logic circuitry to initiate a reset. A logic-low on MR  
asserts RESET low. RESET remains asserted while MR  
is low, and during the reset timeout period (140ms min)  
after MR returns high. The MR input has an internal  
Power-Supply Bypassing  
The MAX16000–MAX16007 operate from a 2.0V to 5.5V  
supply. An undervoltage lockout ensures that the out-  
puts are in the correct states when the UVLO is exceed-  
ed. In noisy applications, bypass V  
to ground with a  
CC  
0.1µF capacitor as close to the device as possible. The  
additional capacitor improves transient immunity. For  
20kpullup resistor to V , so it can be left uncon-  
CC  
nected if not used. MR can be driven with TTL or  
CMOS-logic levels, or with open-drain/collector out-  
puts. Connect a normally open momentary switch from  
fast-rising V  
be required  
transients, additional capacitance may  
CC  
22 ______________________________________________________________________________________  
Low-Voltage, Quad-/Hex-/Octal-Voltage  
µP Supervisors  
–MAX1607  
Pin Configurations  
TOP VIEW  
TOP VIEW  
9
8
7
9
8
7
OUT4  
OUT3  
MR  
10  
11  
6
5
10  
11  
6
5
IN1  
IN2  
IN1  
IN2  
V
CC  
MAX16000  
MAX16002  
V
CC  
GND  
12  
12  
4
4
TOL  
TOL  
+
+
1
2
3
1
2
3
THIN QFN  
(4mm x 4mm)  
THIN QFN  
(4mm x 4mm)  
TOP VIEW  
TOP VIEW  
12  
11  
10  
9
12  
11  
10  
9
MR  
OUT6  
8
7
6
5
8
7
6
5
RESET 13  
IN1 14  
IN1 13  
IN2 14  
OUT4  
OUT3  
OUT5  
OUT4  
MAX16001  
MAX16003  
IN2  
IN3  
15  
16  
15  
16  
V
CC  
V
CC  
TOL  
TOL  
+
+
1
2
3
4
1
2
3
4
THIN QFN  
(4mm x 4mm)  
THIN QFN  
(4mm x 4mm)  
______________________________________________________________________________________ 23  
Low-Voltage, Quad-/Hex-/Octal-Voltage  
µP Supervisors  
Pin Configurations (continued)  
TOP VIEW  
TOP VIEW  
15  
14  
13  
12  
11  
18  
17  
16  
15  
14  
13  
12  
11  
10  
9
RESET 19  
IN1 20  
IN2 21  
IN3 22  
MR  
MR  
10  
9
RESET 16  
IN1 17  
OUT8  
OUT7  
OUT6  
8
IN2 18  
OUT5  
OUT4  
MAX16004  
MAX16006  
OUT6  
OUT5  
IN3  
7
19  
20  
IN4  
8
23  
24  
+
+
6
V
TOL  
CC  
7
V
TOL  
CC  
1
2
3
4
5
1
2
3
4
5
6
THIN QFN  
(4mm x 4mm)  
THIN QFN  
(4mm x 4mm)  
–MAX1607  
TOP VIEW  
TOP VIEW  
+
12  
11  
10  
9
IN3  
TOL  
IN4  
1
16 IN2  
15 IN1  
2
3
4
5
6
7
8
WDO  
REF  
8
7
6
5
IN1 13  
IN2 14  
14 RESET  
13 MARGIN  
12 SRT  
IN5  
MAX16005  
IN6  
MAX16005  
IN3  
V
CC  
15  
16  
WDI  
GND  
VCC  
11 MR  
GND  
TOL  
10 WDO  
+
9
REF  
1
2
3
4
TSSOP  
TOP VIEW  
THIN QFN  
(4mm x 4mm)  
15  
14  
13  
12  
11  
MR  
10  
IN1 16  
IN2 17  
IN3 18  
N.C.  
N.C.  
9
8
7
6
MAX16007  
IN4  
V
19  
20  
CC  
+
GND  
TOL  
1
2
3
4
5
THIN QFN  
(4mm x 4mm)  
24 ______________________________________________________________________________________  
Low-Voltage, Quad-/Hex-/Octal-Voltage  
µP Supervisors  
–MAX1607  
Ordering Information (continued)  
Chip Information  
PROCESS: BiCMOS  
PART  
TEMP RANGE  
-40°C to +125°C  
-40°C to +125°C  
-40°C to +125°C  
-40°C to +125°C  
-40°C to +125°C  
-40°C to +125°C  
-40°C to +125°C  
-40°C to +125°C  
PIN-PACKAGE  
16 TQFN-EP*  
12 TQFN-EP*  
16 TQFN-EP*  
20 TQFN-EP*  
16 TQFN-EP*  
16 TSSOP  
MAX16001_TE+  
MAX16002_TC+  
MAX16003_TE+  
MAX16004_TP+  
MAX16005_TE+  
MAX16005_UE+  
MAX16006_TG+  
MAX16007_TP+  
24 TQFN-EP*  
20 TQFN-EP*  
Note: The “_” is a placeholder for the input voltage threshold.  
See Table 1.  
+Denotes lead(Pb)-free/RoHS-compliant package.  
For tape-and-reel, add a “T” after the “+.” Tape-and-reel are  
offered in 2.5k increments.  
*EP = Exposed pad.  
Selector Guide  
ADJUSTABLE  
RESET  
TIMEOUT  
MONITORED  
VOLTAGES  
INDEPENDENT  
OUTPUTS  
PART  
RESET  
WDI/WDO  
MR  
MAX16000  
MAX16001  
MAX16002  
MAX16003  
MAX16004  
MAX16005  
MAX16006  
MAX16007  
4
4
4
6
6
6
8
8
4
4
WDI  
6
WDI  
6
WDI  
8
WDI/WDO  
WDI  
WDI  
Package Information  
For the latest package outline information and land patterns, go to www.maxim-ic.com/packages.  
PACKAGE TYPE  
12 TQFN  
PACKAGE CODE  
T1244-4  
DOCUMENT NO.  
21-0139  
16 TSSOP  
16 TQFN  
U16-2  
21-0108  
21-0139  
T1644-4  
20 TQFN  
T2044-3  
21-0139  
24 TQFN  
T2444-4  
21-0139  
______________________________________________________________________________________ 25  
Low-Voltage, Quad-/Hex-/Octal-Voltage  
µP Supervisors  
Revision History  
REVISION  
NUMBER  
REVISION  
DATE  
PAGES  
CHANGED  
DESCRIPTION  
0
1
2
12/05  
1/06  
7/06  
Initial release  
Released MAX16003 and MAX16004.  
20, 21  
Released MAX16005. Updated Pin Description and Detailed Description.  
1, 4, 7, 9, 10, 20, 21  
Added the MAX16005 TSSOP package. Modified the Detailed Description,  
and added Figures 13, 14, and 15.  
1, 2, 7, 8, 9, 10,  
20–26  
3
12/08  
–MAX1607  
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are  
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.  
26 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600  
© 2008 Maxim Integrated Products  
is a registered trademark of Maxim Integrated Products. Inc.  

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