MAX16036PLB29+T [MAXIM]
Power Supply Management Circuit, Fixed, 1 Channel, BICMOS, 2 X 2 MM, LEAD FREE, MICRO, DFN-10;
| 型号： | MAX16036PLB29+T |
| 厂家： | 
MAXIM INTEGRATED PRODUCTS |
| 描述： | Power Supply Management Circuit, Fixed, 1 Channel, BICMOS, 2 X 2 MM, LEAD FREE, MICRO, DFN-10 信息通信管理 |
| 文件： | 总20页 (文件大小：1559K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
MAX16033–MAX16040
Low-Power Battery-Backup
Circuits in Small μDFN Packages
General Description
Features
● Low 1.2V Operating Supply Voltage
The MAX16033–MAX16040 supervisory circuits reduce
the complexity and number of components required for
power-supply monitoring and battery-control functions in
microprocessor (μP) systems. The devices significantly
improve system reliability and accuracy compared to other
ICs or discrete components. The MAX16033–MAX16040
provide μP reset, backup-battery switchover, power-fail
warning, watchdog, and chip-enable gating features.
● Precision Monitoring of 5.0V, 3.3V, 3.0V, and 2.5V
Power-Supply Voltages
● Independent Power-Fail Comparator
● Debounced Manual-Reset Input
● Watchdog Timer, 1.6s Timeout
● Battery-On Output Indicator
● Auxiliary User-Adjustable RESETIN
● Low 13μA Quiescent Supply Current
The MAX16033–MAX16040 operate from supply volt-
ages up to 5.5V. The factory-set reset threshold volt-
age ranges from 2.32V to 4.63V. The devices feature a
manual-reset input (MAX16033/MAX16037), a watchdog
timer input (MAX16034/MAX16038), a battery-on output
(MAX16035/MAX16039), an auxiliary adjustable-reset
input (MAX16036/MAX16040), and chip-enable gating
(MAX16033–MAX16036). Each device includes a power-
fail comparator and offers an active-low push-pull reset or
an active-low open-drain reset.
● Two Available Output Structures:
Active-Low Push-Pull Reset
Active-Low Open-Drain Reset
● Active-Low Reset Valid Down to 1.2V
● Power-Supply Transient Immunity
● 140ms (min) Reset Timeout Period
● Small 2mm x 2mm, 8-Pin and 10-Pin μDFN Paclages
Ordering Information
The MAX16033–MAX16040 are available in 2mm x 2mm,
8-pin or 10-pin μDFN packages and are fully specified
from -40°C to +85°C.
PART*
TEMP RANGE PIN-PACKAGE
-40°C to +85°C 10 µDFN
-40°C to +85°C 10 µDFN
-40°C to +85°C 10 µDFN
-40°C to +85°C 10 µDFN
MAX16033LLB_ _+T
MAX16033PLB_ _+T
MAX16034LLB_ _+T
MAX16034PLB_ _+T
Applications
● Portable/Battery-
Powered Equipment
● POS Equipment
● Critical μP/μC Power
Monitoring
● Controllers
● Computers
● Fax Machines
● Industrial Control
● Real-Time Clocks
● Intelligent Instrument
*These parts offer a choice of reset threshold voltages. From
the Reset Threshold Ranges table, insert the desired threshold
voltage code in the blank to complete the part number. See the
Selector Guide for a listing of device features.
● Set-Top Boxes
+Denotes a lead(Pb)-free/RoHS-compliant package.
T = Tape and reel.
Pin Configurations and Typical Operating Circuit appear at
end of data sheet
Ordering Information continued on last page.
Selector Guide
PART
MR
WATCHDOG
BATTON
RESETIN
CEIN/CEOUT
PFI, PFO
PIN-PACKAGE
10 µDFN-10
10 µDFN-10
10 µDFN-10
10 µDFN-10
8 µDFN-8
MAX16033_
MAX16034_
MAX16035_
MAX16036_
MAX16037_
MAX16038_
MAX16039_
MAX16040_
ü
ü
ü
ü
ü
ü
ü
ü
ü
ü
ü
ü
ü
ü
ü
ü
ü
ü
8 µDFN-8
ü
8 µDFN-8
ü
8 µDFN-8
Note: Replace “_” with L for push-pull or P for open-drain RESET and PFO outputs.
19-0882; Rev 1; 5/14
MAX16033–MAX16040
Low-Power Battery-Backup
Circuits in Small μDFN Packages
Absolute Maximum Ratings
Terminal Voltages (with respect to GND)
Output Current
V
, BATT, OUT.......................................................-0.3V to +6V
OUT..................................Short-Circuit Protected for up to 5s
CC
RESET (open drain), PFO (open drain) ....................-0.3V to +6V
RESET, BATTON............................................................20mA
RESET (push-pull), PFO (push-pull), BATTON, RESETIN, WDI
Continuous Power Dissipation (T = +70°C)
A
MR, CEIN, CEOUT, PFI...........................-0.3V to (V
Input Current
+ 0.3V)
8-Pin μDFN (derate 4.8mW/°C above +70°C)..........380.6mW
10-Pin μDFN (derate 5mW/°C above +70°C)...........402.8mW
Operating Temperature Range ...........................-40°C to +85°C
Storage Temperature Range .............................-65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
OUT
V
V
Peak.............................................................................1A
Continuous............................................................250mA
CC
CC
BATT Peak....................................................................250mA
BATT Continuous............................................................40mA
GND................................................................................75mA
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these
or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect
device reliability.
Electrical Characteristics
(V
= 2.25V to 5.5V, V
= 3V, RESET not asserted, T = -40°C to +85°C, for MAX16039PLA31+T, T = -55°C to +85°C, unless
CC
BATT A A
otherwise noted. Typical values are at T = +25°C.) (Note 1)
A
PARAMETER
SYMBOL
, V
CONDITIONS
No load (Note 2)
MIN
TYP
MAX
5.5
30
35
50
1
UNITS
Operating Voltage Range
V
0
V
CC BATT
V
V
V
= 2.8V
= 3.6V
= 5.5V
13
16
22
CC
CC
CC
Supply Current
I
No load, V
> V
TH
µA
µA
CC
CC
T
T
= +25°C
A
A
= -40°C to +85°C
2
V
V
= 2.8V,
= 0V,
BATT
CC
Supply Current in Battery
Backup Mode
T
= -55°C
A
excluding I
OUT
(MAX16039PLA31+T
10
only)
T
T
= +25°C
-0.1
-0.3
+0.02
+0.02
3.1
(V
< 5.5V
+ 0.2V) < V
A
A
BATT
CC
BATT Standby Current (Note 3)
I
µA
BATT
= -40°C to +85°C
V
V
V
V
V
V
= 4.75V, V
> V , I
= 150mA
> V , I = 65mA
TH OUT
CC
CC
TH OUT
V
to OUT On-Resistance
R
= 3.15V, V
3.7
Ω
CC
ON
CC
CC
= 2.5V, V
> V , I = 25mA
TH OUT
4.6
CC
CC
= 4.50V, V
= 0V, I
= 20mA
= 10mA
V
V
V
- 0.2
BATT
BATT
BATT
CC
CC
OUT
OUT
BATT
BATT
BATT
Output Voltage in Battery
Backup Mode
V
= 3.15V, V
= 0V, I
- 0.15
- 0.15
V
OUT
= 2.5V, V
= 0V, I
= 5mA
CC
OUT
V
rising
0
V
V
- V
< V
,
CC
CC
CC
CC
BATT
TH
Battery-Switchover Threshold
V
mV
SW
V
falling
-40
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MAX16033–MAX16040
Low-Power Battery-Backup
Circuits in Small μDFN Packages
Electrical Characteristics (continued)
(V
= 2.25V to 5.5V, V
= 3V, RESET not asserted, T = -40°C to +85°C, for MAX16039PLA31+T, T = -55°C to +85°C, unless
CC
BATT A A
otherwise noted. Typical values are at T = +25°C.) (Note 1)
A
PARAMETER
RESET OUTPUT
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
MAX160_ _ _L_46
4.50
4.25
3.00
2.85
2.55
2.25
4.63
4.38
3.08
2.93
2.63
2.32
25
4.75
4.50
3.15
3.00
2.70
2.38
MAX160_ _ _L_44
MAX160_ _ _L_31
MAX160_ _ _L_29
MAX160_ _ _L_26
MAX160_ _ _L_23
Reset Threshold
V
V
TH
V
Falling Reset Delay
V
falling at 10V/ms
µs
CC
CC
Reset Active Timeout Period
t
140
280
0.3
0.4
ms
RP
I
I
= 1.6mA, V
= 100µA, V
≥ 2.1V
> 1.2V
SINK
SINK
CC
RESET Output Low Voltage
V
RESET asserted
V
OL
CC
MAX160_ _L only (push-pull), RESET not
asserted, I = 500µA, V > V
0.8 x
RESET Output High Voltage
V
V
OH
V
SOURCE
CC
TH(MAX)
CC
RESET Output Leakage
Current
I
MAX160_ _P only (open drain), not asserted
1
µA
LKG
POWER-FAIL COMPARATOR
PFI Input Threshold
PFI Hysteresis
V
V
V
falling
1.185
1.235
1.285
V
PFI
PFI
1
%
PFI Input Current
= 0V or V
-100
+100
0.3
nA
PFI
CC
V
V
> 2.1V, I
> 1.2V, I
= 1.6mA
CC
SINK
PFO Output Low Voltage
PFO Output High Voltage
V
V
Output asserted
V
OL
= 100µA
0.4
CC
SINK
MAX160_ _L only (push-pull), V
>
CC
0.8 x
V
I
= 500µA, output not
V
OH
TH(MAX), SOURCE
V
CC
asserted
MAX160_ _P only (open drain), V
not asserted
= 5.5V,
PFO
PFO Leakage Current
PFO Delay Time
1
µA
µs
V
+ 100mV to V
- 100mV
4
PFI
PFI
MANUAL RESET (MAX16033/MAX16037)
V
0.3 x V
CC
IL
MR Input Voltage
V
V
0.7 x V
IH
CC
Pullup Resistance to V
Minimum Pulse Width
Glitch Immunity
20
1
165
kΩ
µs
ns
ns
CC
V
= 3.3V
100
120
CC
MR to Reset Delay
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MAX16033–MAX16040
Low-Power Battery-Backup
Circuits in Small μDFN Packages
Electrical Characteristics (continued)
(V
= 2.25V to 5.5V, V
= 3V, RESET not asserted, T = -40°C to +85°C, for MAX16039PLA31+T, T = -55°C to +85°C, unless
CC
BATT A A
otherwise noted. Typical values are at T = +25°C.) (Note 1)
A
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
WATCHDOG (MAX16034/MAX16038)
Watchdog Timeout Period
t
1.00
1.65
2.25
s
WD
Minimum WDI Input Pulse Width
t
(Note 4)
100
ns
WDI
V
0.3 x V
CC
IL
WDI Input Voltage
V
V
0.7 x V
-1.0
IH
CC
WDI Input Current
+1.0
0.4
µA
BATTON (MAX16035/MAX16039)
Output Voltage
V
I
= 3.2mA, V = 2.1V
BATT
V
OL
SINK
Sink current, V
= 5V
60
30
mA
µA
CC
Output Short-Circuit Current
Source current, V
> 2V
10
120
BATT
RESETIN (MAX16036/MAX16040)
RESETIN Threshold
V
1.185
1.235
0.01
1.5
1.285
V
RTH
RESETIN Input Current
25
nA
µs
RESETIN to Reset Delay
(V
+ 100mV) to (V
- 100mV)
RTH
RTH
CHIP-ENABLE GATING (MAX16033–MAX16036)
CEIN Leakage Current
RESET asserted
RESET not asserted, V
±1
µA
Ω
= V
= 10mA
CC
TH(MAX),
CEIN to CEOUT Resistance
CEOUT Short-Circuit Current
100
V
= V /2, I
CEIN
CC
SINK
RESET asserted, V
= 0V
1
1.5
2
2.0
7
mA
ns
CEOUT
V
V
= 4.75V
= 3.15V
CEIN to CEOUT Propagation
Delay (Note 4)
50Ω source impedance driver,
CC
C
= 50pF
LOAD
9
CC
V
V
= 5V, V
> V
, I
= 100µA
= 1µA
0.7 x V
CC
CC
CC
BATT SOURCE
CEOUT Output-Voltage High
RESET to CEOUT Delay
V
= 0V, V
> 2.2V, I
V
- 0.1
CC
BATT
SOURCE
BATT
1
µs
Note 1: All devices are 100% production tested at T = +25°C. All overtemperature limits are guaranteed by design.
A
Note 2: V
can be 0V any time, or V
can go down to 0V if V
is active (except at startup).
BATT
CC
BATT
Note 3: Positive current flows into BATT.
Note 4: Guaranteed by design.
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MAX16033–MAX16040
Low-Power Battery-Backup
Circuits in Small μDFN Packages
Typical Operating Characteristics
(T = +25°C, unless otherwise noted.)
A
SUPPLY CURRENT
vs. TEMPERATURE
BATTERY SUPPLY CURRENT
(BACKUP MODE) vs. TEMPERATURE
BATT-TO-OUT ON-RESISTANCE
vs. TEMPERATURE
20
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
1.0
9
V
CC
= 5V
V
V
= 3V
= 0V
V
CC
= 0V
BATT
19
18
17
16
15
14
13
12
11
10
CC
8
V
BATT
= 2V
7
6
5
4
3
V
BATT
= 5V
2
V
BATT
= 3V
10
1
0
-40
-15
10
35
60
85
-40
-15
10
35
60
85
-40
-15
35
60
85
TEMPERATURE (°C)
TEMPERATURE (°C)
TEMPERATURE (°C)
RESET TIMEOUT PERIOD
vs. TEMPERATURE
V -TO-OUT ON-RESISTANCE
CC
vs. TEMPERATURE
V -TO-RESET PROPAGATION DELAY
CC
vs. TEMPERATURE
230
225
220
215
210
205
200
195
190
185
180
120
105
90
75
60
45
30
15
0
V
CC
= 5V
V
CC
FALLING
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
V
= 2.5V
= 25mA
CC
I
0.25V/ms
OUT
1V/ms
V
= 4.5V
= 150mA
CC
V
CC
= 3V
= 65mA
I
OUT
I
OUT
10V/ms
-40 -25 -10
5
20 35 50 65 80
-40
-15
10
35
60
85
-40
-20
0
20
40
60
80
TEMPERATURE (°C)
TEMPERATURE (°C)
TEMPERATURE (°C)
NORMALIZED RESET THRESHOLD
vs. TEMPERATURE
MAXIMUM TRANSIENT DURATION
vs. RESET THRESHOLD OVERDRIVE
1.003
300
250
200
150
100
50
RESET OCCURS
ABOVE CURVE
1.002
1.001
1.000
0.999
0.998
0.997
0.996
0.995
0.994
0.993
0.992
0.991
0.990
MAX160_ _-46
(V = 4.63V)
TH
MAX160_ _-29
(V = 2.93V)
TH
0
-40
-20
0
20
40
60
80
1
10
100
1000
10,000
TEMPERATURE (°C)
RESET THRESHOLD OVERDRIVE (V - V ) (mV)
TH
CC
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MAX16033–MAX16040
Low-Power Battery-Backup
Circuits in Small μDFN Packages
Typical Operating Characteristics (continued)
(T = +25°C, unless otherwise noted.)
A
BATTERY SUPPLY CURRENT
RESETIN THRESHOLD
vs. TEMPERATURE
RESETIN-TO-RESET PROPAGATION
vs. SUPPLY VOLTAGE
DELAY vs. TEMPERATURE
2.00
1.250
1.245
1.240
1.235
1.230
1.225
1.220
1.215
1.210
3.0
V
= 2.93V
TH
MAX16036/
MAX16040
MAX16036/
MAX16040
V
OD
= 50mV
1.75
1.50
1.25
1.00
0.75
0.50
0.25
0
2.8
2.5
2.3
2.0
1.8
1.5
1.3
1.0
V
BATT
= 2.8V
V
BATT
= 2.5V
V
= 2.3V
BATT
-0.25
0
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
SUPPLY VOLTAGE (V)
-40
-15
10
35
60
85
-40
-15
10
35
60
85
TEMPERATURE (°C)
TEMPERATURE (°C)
CEIN PROPAGATION DELAY
vs. CEOUT LOAD CAPACITANCE
CEIN TO CEOUT ON-RESISTANCE
WATCHDOG TIMEOUT PERIOD
vs. TEMPERATURE
vs. TEMPERATURE
3.0
2.5
2.0
1.5
1.0
0.5
0
35
30
25
20
15
10
5
2.0
1.9
1.8
1.7
1.6
1.5
1.4
1.3
1.2
1.1
1.0
V
CC
= 5V
V
CC
= 3V
V
CC
= 3V
V
CC
= 5V
V
CC
= 5V
0
0
25
50
75 100 125 150 175
-40
-15
10
35
60
85
-40
-15
10
35
60
85
CEOUT LOAD CAPACITANCE (pF)
TEMPERATURE (°C)
TEMPERATURE (°C)
PFI-TO-PFO DELAY
vs. TEMPERATURE
PFI THRESHOLD
vs. TEMPERATURE
5.00
1.250
1.245
1.240
1.235
1.230
1.225
1.220
1.215
1.210
V
OD
= 30mV
4.75
4.50
4.25
4.00
3.75
3.50
3.25
3.00
2.75
2.50
2.25
2.00
FALLING EDGE
-40
-15
10
35
60
85
-40
-15
10
35
60
85
TEMPERATURE (°C)
TEMPERATURE (°C)
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MAX16033–MAX16040
Low-Power Battery-Backup
Circuits in Small μDFN Packages
Pin Description
PIN
MAX16033–
MAX16036
MAX16037–
MAX16040
NAME
FUNCTION
(10-pin µDFN) (8-pin µDFN)
Active-Low Reset Output. RESET remains low when V
is below the reset
CC
threshold (V ), the manual-reset input is low, or RESETIN is low. It asserts low
TH
in pulses when the internal watchdog times out. RESET remains low for the reset
1
1
RESET
timeout period (t ) after V
rises above the reset threshold, after the manual-
RP
CC
reset input goes from low to high, after RESETIN goes high, or after the watchdog
triggers a reset event. The MAX160_ _L is an active-low push-pull output, while the
MAX160_ _P is an active-low open-drain output.
Chip-Enable Input. The input to the chip-enable gating circuit. Connect to GND or
OUT if not used.
2
—
CEIN
3
4
2
3
PFI
Power-Fail Input. PFO goes low when V
falls below 1.235V.
PFI
GND
Ground
Manual-Reset Input (MAX16033/MAX16037). Driving MR low asserts RESET.
RESET remains asserted as long as MR is low and for the reset timeout period (t
)
RP
if not
MR
after MR transitions from low to high. Leave unconnected, or connect to V
CC
used. MR has an internal 20kΩ pullup to V
.
CC
Watchdog Input (MAX16034/MAX16038). If WDI remains high or low for longer than
the watchdog timeout period (t ), the internal watchdog timer runs out and a reset
WD
WDI
pulse is triggered for the reset timeout period (t ). The internal watchdog clears
5
4
RP
whenever RESET asserts or whenever WDI sees a rising or falling edge (Figure 2).
Battery-On Output (MAX16035/MAX16039). BATTON goes high during battery
backup mode.
BATTON
Reset Input (MAX16036/MAX16040). When RESETIN falls below 1.235V, RESET
RESETIN asserts. RESET remains asserted as long as RESETIN is low and for at least t
RP
after RESETIN goes high.
Active-Low Power-Fail Output. PFO goes low when V
falls below 1.235V. PFO
PFI
6
5
PFO
stays low until V
goes above 1.235V. PFO also goes low when V
falls below
CC
PFI
the reset threshold voltage.
7
8
6
7
V
Supply Voltage, 1.2V to 5.5V
Output. OUT sources from V
CC
when RESET is not asserted and from the greater
CC
OUT
of V
or BATT when V
is below the reset threshold voltage.
CC
CC
Backup-Battery Input. When V
falls below the reset threshold, OUT switches
CC
to BATT if V
is 40mV greater than V . When V
rises above V , OUT
BATT
CC
CC
CC
BATT
9
8
BATT
switches to V . The 40mV hysteresis prevents repeated switching if V
falls
CC
slowly.
Chip-Enable Output. CEOUT goes low only when CEIN is low and reset is not
asserted. When CEOUT is disconnected from CEIN, CEOUT is actively pulled up
to OUT.
10
—
CEOUT
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MAX16033–MAX16040
Low-Power Battery-Backup
Circuits in Small μDFN Packages
Pin Description (continued)
BATTON (MAX16035/MAX16039 ONLY)
1.235V
MAX16033
MAX16040
V
CC
OUT
CHIP-ENABLE
OUTPUT
CONTROL
BATT
CEIN
CEOUT
(MAX16033–MAX16036 ONLY)
RESET
GENERATOR
MR
RESET
(MAX16033/MAX16037 ONLY)
WATCHDOG
TRANSITION
DETECTOR
WATCHDOG
TIMER
WDI
(MAX16034/MAX16038 ONLY)
RESETIN
(MAX16036/MAX16040 ONLY)
PFO
1.235V
1.235V
GND
PFI
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MAX16033–MAX16040
Low-Power Battery-Backup
Circuits in Small μDFN Packages
from CEIN to CEOUT allows these devices to be used
with most μPs and high-speed DSPs.
Detailed Description
The Typical Operating Circuit shows a typical connec-
When RESET is deasserted, CEIN is connected to
CEOUT through a low on-resistance transmission gate. If
CEIN is high when RESET is asserted, CEOUT remains
high regardless of any subsequent transitions on CEIN
during the reset event.
tion for the MAX16033–MAX16040. OUT powers the
static random-access memory (SRAM). If V
is greater
CC
than the reset threshold (V ), or if V
is lower than
TH
CC
V
TH
but higher than V
, V
BATT
is connected to OUT.
CC
If V
is lower than V
and V
is less than V
,
BATT
CC
TH
CC
BATT is connected to OUT. OUT supplies up to 200mA
If CEIN is low when RESET is asserted, CEOUT is held
low for 1μs to allow completion of the read/write operation
(Figure 1). After the 1μs delay expires, CEOUT goes high
and stays high regardless of any subsequent transitions
on CEIN during the reset event. When CEOUT is discon-
nected from CEIN, CEOUT is actively pulled up to OUT.
from V . In battery-backup mode, an internal MOSFET
CC
connects the backup battery to OUT. The on-resistance
of the MOSFET is a function of the backup-battery volt-
age and temperature and is shown in the BATT-to-OUT
On-Resistance vs. Temperature graph in the Typical
Operating Characteristics.
The propagation delay through the chip-enable circuitry
depends on both the source impedance of the drive to
CEIN and the capacitive loading at CEOUT. The chip-
enable propagation delay is specified from the 50% point
of CEIN to the 50% point of CEOUT, using a 50Ω driver
and 50pF load capacitance. Minimize the capacitive load
at CEOUT and use a low output-impedance driver to
minimize propagation delay.
Chip-Enable Signal Gating
(MAX16033–MAX16036 Only)
The MAX16033–MAX16036 provide internal gating of
chip-enable (CE) signals to prevent erroneous data from
being written to CMOS RAM in the event of a power fail-
ure or brownout condition. During normal operation, the
CE gate is enabled and passes all CE transitions. When
reset asserts, this path becomes disabled, preventing
erroneous data from corrupting the CMOS RAM. The
MAX16033–MAX16036 provide a series transmission
gate from CEIN to CEOUT. A 2ns (typ) propagation delay
In high-impedance mode, the leakage current at CEIN is
±1μA (max) over temperature. In low-impedance mode,
the impedance of CEIN appears as a 75Ω resistor in
series with the load at CEOUT.
V
CC
V
TH
CEIN
CEOUT
*
RESET-TO-CEOUT DELAY
t
t
RD
RD
t
t
RP
RP
RESET
PFO
PFI > V
PFI
* IF CEIN GOES HIGH BEFORE RESET ASSERTS,
CEOUT GOES HIGH WITHOUT DELAY AS CEIN GOES HIGH.
Figure 1. RESET and Chip-Enable Timing
Maxim Integrated
│ 9
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MAX16033–MAX16040
Low-Power Battery-Backup
Circuits in Small μDFN Packages
high. MR has an internal 20kΩ (min) pullup resistor to
CC
Backup-Battery Switchover
V
. This input can be driven from TTL/CMOS logic
To preserve the contents of the RAM in a brownout or
power failure, the MAX16033–MAX16040 automatically
switch to back up the battery installed at BATT when the
following two conditions are met:
outputs or with open-drain/collector outputs. Connect a
normally open momentary switch from MR to GND to cre-
ate a manual-reset function; external debounce circuitry
is not required. When driving MR from long cables, or
when using the device in a noisy environment, connect
a 0.1μF capacitor from MR to GND to provide additional
noise immunity.
1) V
2) V
falls below the reset threshold voltage.
CC
CC
is below V
.
BATT
Table 1 lists the status of the inputs and outputs in battery-
backup mode. The devices do not power up if the only
Watchdog Input
(MAX16034/MAX16038 Only)
voltage source is V
at startup.
. OUT only powers up from V
BATT
CC
The watchdog monitors μP activity through the watchdog
input (WDI). RESET asserts when the μP fails to toggle
WDI. Connect WDI to a bus line or μP I/O line. A change
of state (high to low, low to high, or a minimum 100ns
pulse) resets the watchdog timer. If WDI remains high or
Table 1. Input and Output Status in
Battery-Backup Mode
PIN
STATUS
Disconnected from OUT
Connected to BATT
Connected to OUT. Current drawn from the
battery is less than 1µA (at V = 2.8V,
low for longer than the watchdog timeout period (t ), the
V
WD
CC
internal watchdog timer runs out and triggers a reset pulse
OUT
for the reset timeout period (t ). The internal watchdog
RP
timer clears whenever RESET is asserted or whenever
WDI sees a rising or falling edge. If WDI remains in either
a high or low state, a reset pulse periodically asserts after
BATT
BATT
excluding I
) when V
= 0V.
OUT
CC
every watchdog timeout period (t ); see Figure 2.
Asserted
RESET
WD
BATTON
High state
MR, RESETIN,
CEIN, and WDI
Inputs ignored
WDI
Connected to OUT
CEOUT
t
t
RP
RP
Asserted
PFO
t
t
WD
WD
RESET
Manual-Reset Input
t
t
= WATCHDOG TIMEOUT PERIOD
= RESET TIMEOUT PERIOD
(MAX16033/MAX16037 Only)
WD
RP
Many μP-based products require manual-reset capabil-
ity, allowing the user or external logic circuitry to initiate
a reset. For the MAX16033/MAX16037, a logic-low on
MR asserts RESET. RESET remains asserted while MR
Figure 2. MAX16034/MAX16038 Watchdog Timeout Period and
Reset Active Time
is low and for a minimum of 140ms (t ) after it returns
RP
Maxim Integrated
│ 10
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MAX16033–MAX16040
Low-Power Battery-Backup
Circuits in Small μDFN Packages
BATTON Indicator
(MAX16035/MAX16039 Only)
Power-Fail Comparator
The MAX16033–MAX16040 issue an interrupt (nonmask-
able or regular) to the μP when a power failure occurs.
The power line is monitored by two external resistors
connected to the power-fail input (PFI). When the voltage
at PFI falls below 1.235V, the power-fail output (PFO)
drives the processor’s NMI input low. An earlier power-fail
warning can be generated if the unregulated DC input of
the regulator is available for monitoring. The MAX16033–
MAX16040 turn off the power-fail comparator and force
BATTON is a push-pull output that asserts high when in
battery-backup mode. BATTON typically sinks 3.2mA at
a 0.4V saturation voltage. In battery-backup mode, this
terminal sources approximately 10μA from OUT. Use
BATTON to indicate battery-switchover status or to supply
base drive to an external pass transistor for higher current
applications (Figure 3).
RESETIN Comparator
(MAX16036/MAX16040 Only)
An internal 1.235V reference sets the RESETIN threshold
voltage. RESET asserts when the voltage at RESETIN is
below 1.235V. Use the RESETIN function to monitor a
secondary power supply.
PFO low when V
falls below the reset threshold voltage
CC
(Figure 1). The MAX160_ _L devices provide push-pull
PFO outputs. The MAX160_ _P devices provide open-
drain PFO outputs.
V
CC
Use the following equations to set the reset threshold volt-
age (V
) of the secondary power supply (see Figure 4):
RTH
V
IN
V
= V
(R1/R2 + 1)
RTH
REF
MAX16036
MAX16040
R1
R2
where V
= 1.235V. To simplify the resistor selection,
choose a value for R2 and calculate R1:
REF
RESETIN
R1 = R2 [(V /V ) - 1]
RTH REF
Since the input current at RESETIN is 25nA (max), large
values (up to 1MΩ) can be used for R2 with no significant
loss in accuracy.
Figure 4. Setting RESETIN Voltage for the MAX16036/
MAX16040
2.4V TO 5.5V
0.1µF
V
CC
BATTON
BATT
OUT
(CEOUT)
CE
CMOS RAM
MAX16035
MAX16039
ADDRESS
A0–A15
(CEIN)
DECODE
µP
GND
RESET
RESET
( ) FOR MAX16035 ONLY
Figure 3. MAX16035/MAX16039 BATTON Driving an External Pass Transistor
Maxim Integrated
│ 11
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MAX16033–MAX16040
Low-Power Battery-Backup
Circuits in Small μDFN Packages
RESET
Applications Information
A μP’s reset input puts the μP in a known state.
The MAX16033–MAX16040 μP supervisory circuits
assert a reset to prevent code-execution errors during
power-up, power-down, and brownout conditions. RESET
Operation Without a Backup Power Source
The MAX16033–MAX16040 provide a battery-backup
function. If a backup power source is not used, connect
BATT to GND and OUT to V
.
CC
asserts when V
is below the reset threshold volt-
CC
age and for at least 140ms (t ) after V
rises above
RP
CC
Using a Super Cap as a
Backup Power Source
the reset threshold. RESET also asserts when MR
is low (MAX16033/MAX16037) or when RESETIN is
below 1.235V (MAX16036/MAX16040). The MAX16034/
MAX16038 watchdog function causes RESET to assert
in pulses following a watchdog timeout (Figure 2). The
MAX160_ _L devices provide push-pull RESET outputs.
The MAX160_ _P devices provide open-drain RESET
outputs.
Super caps are capacitors with extremely high capaci-
tance, such as 0.47F. Figure 5 shows two methods to
use a super cap as a backup power source. Connect the
super cap through a diode to the 3V input (Figure 5a)
or connect the super cap through a diode to 5V (Figure
5b), if a 5V supply is available. The 5V supply charges
the super cap to a voltage close to 5V, allowing a longer
backup period. Since V
can be higher than V
BATT
CC
while V
is above the reset threshold voltage, there
CC
are no special precautions required when using these μP
supervisors with a super cap.
3V OR 3.3V
3V OR 3.3V
V
V
CC
CC
5V
MAX16033
MAX16040
MAX16033
MAX16040
1N4148
0.47F
1N4148
0.47F
BATT
BATT
(a)
(b)
Figure 5. Using a Super Cap as a Backup Source
Maxim Integrated
│ 12
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MAX16033–MAX16040
Low-Power Battery-Backup
Circuits in Small μDFN Packages
V
CC
START
V
CC
RESET
TO µP
SET
WDI
LOW
MAX16033
MAX16040
SUBROUTINE
OR PROGRAM LOOP
SET
V+
MR
WDI HIGH
R1
R2
PFI
PFO
GND
RETURN
END
Figure 6. Watchdog Flow Diagram
Figure 7. Monitoring an Additional Power Supply
Connect PFO to MR in applications that require RESET to
assert when the second voltage falls below its threshold.
RESET remains asserted as long as PFO holds MR low,
and for 140ms (min) after PFO goes high.
Watchdog Software Considerations
One way to help the watchdog timer to monitor software
execution more closely is to set and reset the watchdog
at different points in the program, rather than pulsing the
watchdog input periodically. Figure 6 shows a flow diagram
where the I/O driving the watchdog is set low in the begin-
ning of the program, set high at the beginning of every
subroutine or loop, and set low again when the program
returns to the beginning. If the program should hang in any
subroutine, the watchdog would timeout and reset the μP.
Adding Hysteresis to the Power-Fail Comparator
The power-fail comparator provides a typical hysteresis
of 12mV, which is sufficient for most applications where a
power-supply line is being monitored through an external
voltage-divider. Connect a voltage-divider between PFI
and PFO, as shown in Figure 8a, to provide additional
noise immunity. Select the ratio of R1 and R2 such that
Replacing the Backup Battery
Decouple BATT to GND with a 0.1μF capacitor. The
backup power source can be removed while V
valid without the danger of triggering a reset pulse. The
device does not enter battery-backup mode when V
stays above the reset threshold voltage.
V
falls to 1.235V when V drops to its trip point
PFI
IN
(V
). R3 adds hysteresis and is typically more than
TRIP
remains
CC
10 times the value of R1 or R2. The hysteresis window
extends above (V ) and below (V ) the original trip point,
H
L
CC
V
. Connecting an ordinary signal diode in series with
TRIP
R3, as shown in Figure 8b, causes the lower trip point (V )
L
Power-Fail Comparator
to coincide with the trip point without hysteresis (V
).
TRIP
This method provides additional noise margin without
compromising the accuracy of the power-fail threshold
when the monitored voltage is falling. Set the current
through R1 and R2 to be at least 10μA to ensure that the
100nA (max) PFI input current does not shift the trip point.
Set R3 to be higher than 10kΩ to reduce the load at PFO.
Capacitor C1 adds additional noise rejection.
Monitoring an Additional Power Supply
Monitor another voltage by connecting a resistive divider
to PFI, as shown in Figure 7. The threshold voltage is:
V
= 1.235 (R1/R2 + 1)
TH(PFI)
where V
is the threshold at which the monitored
TH(PFI)
voltage will trip PFO.
To simplify the resistor selection, choose a value for R2
and calculate R1:
R1 = R2 [(V
/1.235) - 1]
TH(PFI)
Maxim Integrated
│ 13
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MAX16033–MAX16040
Low-Power Battery-Backup
Circuits in Small μDFN Packages
(a)
(b)
V
CC
V
CC
V
IN
V
IN
MAX16033
MAX16040
MAX16033
MAX16040
R1
R2
R1
R2
PFI
PFI
R3
R3
C1
C1
PFO (PUSH-PULL)
PFO (PUSH-PULL)
GND
GND
TO µP
TO µP
PFO
0V
PFO
0V
V
IN
V
IN
V
TRIP
V
L
V
H
V
H
V
TRIP
R1
R2
R1
R2
V
V
= V
1 +
V
V
= V
1 +
PFT
TRIP
PFT
TRIP
H
R1 R1
R1 R1
R1
R3
= (V
+ V
) 1+
+
= (V
+ V
) 1+
+
−
V
D
H
PFT
PFH
PFT
PFH
R2 R3
R1
R2 R3
V = V
R1 R1
L
TRIP
V = V
1+
+
−
V
CC
L
PFT
R2 R3
R3
V
V
V
=1.235V
=12mV
PFT
PFH
V
V
=1.235V
PFT
PFH
=12mV
= DIODEFORWARD VOLTAGE
D
Figure 8. (a) Adding Additional Hysteresis to the Power-Fail Comparator. (b) Shifting the Additional Hysteresis above V
TRIP
Maxim Integrated
│ 14
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MAX16033–MAX16040
Low-Power Battery-Backup
Circuits in Small μDFN Packages
Monitoring a Negative Voltage
3.0V OR 3.3V
Connect the circuit, as shown in Figure 9, to use the
power-fail comparator to monitor a negative supply rail.
PFO stays low when V- is good. When V- rises to cause
PFI to be above +1.235V, PFO goes high. Ensure V
comes up before the negative supply.
V
CC
CC
MAX16033
MAX16040
R1
R2
Negative-Going V
Transients
CC
The MAX16033–MAX16040 are relatively immune to
short-duration, negative-going V transients. Resetting
PFI
PFO
CC
the μP when V
experiences only small glitches is not
CC
usually desired.
GND
V-
The Typical Operating Characteristics section contains
a Maximum Transient Duration vs. Reset Threshold
Overdrive graph. The graph shows the maximum pulse
PFO
width of a negative-going V
transient that would not
CC
V-
trigger a reset pulse. As the amplitude of the transient
increases (i.e., goes further below the reset threshold
voltage), the maximum allowable pulse width decreases.
V
V
TRIP
L
0V
1
1
V
CC
Typically, a V
transient that goes 100mV below the reset
CC
V
= R2 V
+ V
PFH
+
−
(
)
TRIP
PFT
R1 R2
R1
threshold and lasts for 25μs does not trigger a reset pulse.
A 0.1μF bypass capacitor mounted close to V
additional transient immunity.
provides
1
1
V
CC
CC
V = R2 V
+
−
(
)
L
PFT
R1 R2
R1
V
V
1.235V
PFT
PFH
12mV
Figure 9. Monitoring a Negative Voltage
Maxim Integrated
│ 15
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MAX16033–MAX16040
Low-Power Battery-Backup
Circuits in Small μDFN Packages
Device Marking Codes
TOP
PART
TOP
MARK
TOP
MARK
TOP
MARK
PART
PART
PART
MARK
MAX16033LLB23+T
MAX16033LLB26+T
+ABE MAX16035LLB23+T
+ABF MAX16035LLB26+T
+ACC
MAX16037LLA23+T
MAX16037LLA26+T
+ABX
+ABY
MAX16039LLA23+T
+ACV
+ACD
MAX16039LLA26+T +ACW
MAX16033LLB29+T +ABG MAX16035LLB29+T +ACE MAX16037LLA29+T +ABZ
MAX16033LLB31+T +ABH MAX16035LLB31+T
MAX16039LLA29+T +ACX
+ACF MAX16037LLA31+T +ACA MAX16039LLA31+T
+ACY
MAX16033LLB44+T
+ABI
MAX16035LLB44+T
+ACG MAX16037LLA44+T
+ACB
MAX16039LLA44+T
+ACZ
MAX16033LLB46+T +ABJ MAX16035LLB46+T +ACH MAX16037LLA46+T +ACC MAX16039LLA46+T +ADA
MAX16033PLB23+T +ABK MAX16035PLB23+T
MAX16033PLB26+T +ABL MAX16035PLB26+T
+ACI
+ACJ
MAX16037PLA23+T +ACD
MAX16037PLA26+T +ACE
MAX16039PLA23+T
MAX16039PLA26+T
+ADB
+ADC
MAX16033PLB29+T +ABM MAX16035PLB29+T +ACK MAX16037PLA29+T +ACF MAX16039PLA29+T +ADD
MAX16033PLB31+T +ABN MAX16035PLB31+T +ACL MAX16037PLA31+T +ACG MAX16039PLA31+T +ADE
MAX16033PLB44+T +ABO MAX16035PLB44+T +ACM MAX16037PLA44+T +ACH MAX16039PLA44+T +ADF
MAX16039PLA46+T +ADG
MAX16033PLB46+T +ABP MAX16035PLB46+T +ACN MAX16037PLA46+T
+ACI
+ACJ
+ACK
MAX16034LLB23+T +ABQ MAX16036LLB23+T
MAX16034LLB26+T +ABR MAX16036LLB26+T
+ACO MAX16038LLA23+T
+ACP MAX16038LLA26+T
MAX16040LLA23+T
MAX16040LLA26+T
MAX16040LLA29+T
+ADH
+ADI
MAX16034LLB29+T +ABS MAX16036LLB29+T +ACQ MAX16038LLA29+T +ACL
+ADJ
MAX16034LLB31+T +ABT MAX16036LLB31+T +ACR MAX16038LLA31+T +ACM MAX16040LLA31+T +ADK
MAX16034LLB44+T +ABU MAX16036LLB44+T
MAX16034LLB46+T +ABV MAX16036LLB46+T
MAX16034PLB23+T +ABW MAX16036PLB23+T
MAX16034PLB26+T +ABX MAX16036PLB26+T
+ACS
MAX16038LLA44+T +ACN
MAX16040LLA44+T
+ADL
+ACT MAX16038LLA46+T +ACO MAX16040LLA46+T +ADM
+ACU MAX16038PLA23+T +ACP
MAX16040PLA23+T
MAX16040PLA26+T
+ADN
+ADO
+ACV MAX16038PLA26+T +ACQ
MAX16034PLB29+T +ABY MAX16036PLB29+T +ACW MAX16038PLA29+T +ACR MAX16040PLA29+T +ADP
MAX16034PLB31+T ABZ MAX16036PLB31+T +ACX MAX16038PLA31+T +ACS MAX16040PAL31+T +ADQ
MAX16034PLB44+T +ACA MAX16036PLB44+T
+ACY MAX16038PLA44+T
+ACT
MAX16040PLA44+T
+ADR
MAX16034PLB46+T +ACB MAX16036PLB46+T
+ACZ MAX16038PLA46+T +ACU MAX16040PLA46+T +ADS
Note: 48 standard versions shown in bold are available. Sample stock is generally held on standard versions only. Contact factory
for nonstandard versions availability.
Maxim Integrated
│ 16
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MAX16033–MAX16040
Low-Power Battery-Backup
Circuits in Small μDFN Packages
Pin Configurations
TOP VIEW
10
9
8
7
6
10
9
8
7
6
MAX16035
MAX16036
MAX16033
MAX16034
+
+
1
2
3
4
5
1
2
3
4
5
10-µDFN
( ) FOR MAX16036 ONLY
10-µDFN
( ) FOR MAX16034 ONLY
8
7
6
5
8
7
6
5
MAX16037
MAX16038
MAX16039
MAX16040
+
+
1
2
3
4
1
2
3
4
8-µDFN
( ) FOR MAX16038 ONLY
8-µDFN
( ) FOR MAX16040 ONLY
+ DENOTES A LEAD(Pb)-FREE PACKAGE.
Maxim Integrated
│ 17
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MAX16033–MAX16040
Low-Power Battery-Backup
Circuits in Small μDFN Packages
Typical Operating Circuit
2.4V TO 5.5V
0.1µF
REAL-
CMOS
TIME
RAM
CLOCK
CE
V
CC
BATT
ADDITIONAL
DC VOLTAGE
OUT
0.1µF
MAX16033
MAX16040
R3
R4
RESETIN*
ADDITIONAL
DC VOLTAGE
A0–A15
RESET
PFO
RESET
R1
R2
I/O
µP
PFI
I/O
WDI***
CEOUT**
CEIN**
GND
ADDRESS
DECODE
* RESETIN APPLIES TO MAX16035/MAX16039 ONLY.
**CEIN AND CEOUT APPLY TO MAX16033–MAX16036 ONLY.
***WDI APPLIES TO MAX16034/MAX16038 ONLY.
Maxim Integrated
│ 18
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MAX16033–MAX16040
Low-Power Battery-Backup
Circuits in Small μDFN Packages
Ordering Information (continued)
Reset Threshold Ranges
PART*
TEMP RANGE PIN-PACKAGE
RESET-THRESHOLD VOLTAGE (V)
SUFFIX
MAX16035LLB_ _+T
MAX16035PLB_ _+T
MAX16036LLB_ _+T
MAX16036PLB_ _+T
MAX16037LLA_ _+T
MAX16037PLA_ _+T
MAX16038LLA_ _+T
MAX16038PLA_ _+T
MAX16039LLA_ _+T
MAX16039PLA_ _+T
MAX16039PLA31+T
MAX16040LLA_ _+T
MAX16040PLA_ _+T
-40°C to +85°C 10 µDFN
-40°C to +85°C 10 µDFN
-40°C to +85°C 10 µDFN
-40°C to +85°C 10 µDFN
-40°C to +85°C 8 µDFN
-40°C to +85°C 8 µDFN
-40°C to +85°C 8 µDFN
-40°C to +85°C 8 µDFN
-40°C to +85°C 8 µDFN
-40°C to +85°C 8 µDFN
-55°C to +85°C 8 µDFN
-40°C to +85°C 8 µDFN
-40°C to +85°C 8 µDFN
MIN
4.50
4.25
3.00
2.85
2.55
2.25
TYP
4.63
4.38
3.08
2.93
2.63
2.32
MAX
4.75
4.50
3.15
3.00
2.70
2.38
46
44
31
29
26
23
Chip Information
PROCESS: BiCMOS
Package Information
For the latest package outline information and land patterns
(footprints), go to www.maximintegrated.com/packages. Note
that a “+”, “#”, or “-” in the package code indicates RoHS status
only. Package drawings may show a different suffix character, but
the drawing pertains to the package regardless of RoHS status.
*These parts offer a choice of reset threshold voltages. From
the Reset Threshold Ranges table, insert the desired threshold
voltage code in the blank to complete the part number. See the
Selector Guide for a listing of device features.
+Denotes a lead(Pb)-free/RoHS-compliant package.
T = Tape and reel.
PACKAGE
TYPE
PACKAGE
CODE
OUTLINE
NO.
LAND
PATTERN NO.
8 μDFN
L822+1
21-0164
21-0164
90-0005
90-0006
10 μDFN
L1022+1
Maxim Integrated
│ 19
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MAX16033–MAX16040
Low-Power Battery-Backup
Circuits in Small μDFN Packages
Revision History
REVISION REVISION
PAGES
CHANGED
DESCRIPTION
NUMBER
DATE
Data sheet rebranded; updated Electrical Characteristics and Ordering Information
tables to support MAX16039PLA31+T option at -55°C
1
5/14
2, 19
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim Integrated’s website at www.maximintegrated.com.
Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent licenses
are implied. Maxim Integrated reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and max limits)
shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance.
©
Maxim Integrated and the Maxim Integrated logo are trademarks of Maxim Integrated Products, Inc.
2014 Maxim Integrated Products, Inc.
│ 20
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MAXIM
MAX16037LLA31+T
1-CHANNEL POWER SUPPLY MANAGEMENT CKT, DSO8, 2 X 2 MM, LEAD FREE, MICRO, DFN-8
ROCHESTER
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