MAX1610-MAX1611 [MAXIM]
Digitally Controlled CCFL Backlight Power Supplies; 数控CCFL背光灯电源
| 型号： | MAX1610-MAX1611 |
| 厂家： | 
MAXIM INTEGRATED PRODUCTS |
| 描述： | Digitally Controlled CCFL Backlight Power Supplies |
| 文件： | 总20页 (文件大小：138K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
19-1128; Rev 0; 9/96
Dig it a lly Co n t ro lle d CCFL Ba c k lig h t
P o w e r S u p p lie s
0/MAX61
_______________Ge n e ra l De s c rip t io n
____________________________Fe a t u re s
The MAX1610/MAX1611 a re fully inte g ra te d , hig h-
efficiency drivers for cold-cathode fluorescent lamps
(CCFLs ). The y op e ra te from a 4.5V to 26V p owe r
source. An on-board, high-switching-frequency power
MOSFET reduces external component count and mag-
netics size. The MAX1610/MAX1611 protect against
open or shorted lamps. The CCFL can be driven from
an isolated transformer secondary winding to improve
e ffic ie nc y a nd a void flic ke r a t d im tub e s e tting s .
Brightness is adjusted by scaling the lamp current, or
by operating with a fixed lamp current and chopping
the CCFL on and off at a rate faster than the eye can
detect.
♦ Direct Digital Control of CCFL Brightness
♦ Low Supply Current: 3mA Max Operating
20µA Max Shutdown
♦ Low-Voltage Operation, Down to 4.5V
♦ Internal 26V, 0.7Ω Power Switch
♦ Protection Against Open or Shorted Lamps
♦ Supports Isolated Transformer Secondary
Winding
♦ SMBus Serial Interface (MAX1611)
♦ No Flicker at Low Brightness (internal 280Hz
The MAX1610’s digital inputs increment, decrement, or
clear an internal, 5-bit up/down counter, which sets
CCFL b rig htne s s . The MAX1611 us e s a Sys te m
Management Bus (SMBus) 2-wire serial interface to
directly set CCFL brightness. Both devices include
micropower shutdown and a linear regulator that elimi-
nates the need for a separate logic supply. The digital
interface remains active in shutdown, preserving the
brightness setting.
current chopping)
♦ High Power-to-Light Efficiency
♦ Selectable 290kHz/145kHz Switching Frequency
♦ Oscillator SYNC Input
♦ 16-Pin Narrow SO Package
________________________Ap p lic a t io n s
______________Ord e rin g In fo rm a t io n
Notebook/Laptop Computers
Point-of-Sale Terminals
Portable Medical Equipment
Instrument Displays
PART
TEMP. RANGE
0°C to +70°C
0°C to +70°C
PIN-PACKAGE
16 Narrow SO
16 Narrow SO
MAX1610CSE
MAX1611CSE
__________________________________________________________P in Co n fig u ra t io n s
TOP VIEW
UP
DN
1
2
3
4
5
6
7
8
16
15
14
SDA
SCL
1
2
3
4
5
6
7
8
16
15
14
13
BATT
LX
BATT
LX
SHDN
SYNC
SS
SMBSUS
SYNC
SS
BST
BST
GND
MAX1610
MAX1611
13 GND
12 VL
11 CS
12 VL
11 CS
CC
CC
CSAV
MINDAC
10
9
CSAV
MINDAC
OTP
REF
10
9
OTP
REF
SO
SO
________________________________________________________________ Maxim Integrated Products
1
For free samples & the latest literature: http://www.maxim-ic.com, or phone 1-800-998-8800
Dig it a lly Co n t ro lle d CCFL Ba c k lig h t
P o w e r S u p p lie s
ABSOLUTE MAXIMUM RATINGS
BATT to GND ............................................................-0.3V to 28V
BST to GND ..............................................................-0.3V to 30V
BST to LX ....................................................................-0.3V to 6V
LX to GND ................................................-0.6V to (BATT + 0.3V)
VL to GND...................................................................-0.3V to 6V
CS, CSAV, CC, SYNC, REF, MINDAC,
BATT, LX Current .....................................................................1A
SDA Current........................................................................50mA
VL Current...........................................................................50mA
Continuous Power Dissipation (T = +70°C)
A
SO (derate 8.70mW/°C above +70°C).........................696mW
Operating Temperature Range
SS, OTP to GND............................................-0.3V to (VL + 0.3V)
SHDN, UP, DN to GND...............................................-0.3V to 6V
SMBSUS, SDA, SCL to GND ......................................-0.3V to 6V
MAX1610CSE/MAX1611CSE..............................0°C to +70°C
Storage Temperature Range .............................-65°C to +160°C
Lead Temperature (soldering, 10sec) .............................+300°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(T = 0°C to +70°C, BATT = 8.2V, MINDAC = 0V, unless otherwise noted. Typical values are at T = +25°C.)
A
A
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
0/MAX61
SUPPLY AND REFERENCE
BATT Input Voltage Range
4.75
26
3
V
BATT Quiescent Supply Current,
Operate Mode
BATT = 25V
1.5
10
mA
BATT Quiescent Supply Current,
Shutdown Mode
µA
20
VL Output Voltage, Operate Mode
VL Output Voltage, Shutdown Mode
REF Output Voltage
4.75V < BATT < 26V
No load
4.25
3.0
4.5
3.6
2.0
6
4.75
4.75
2.08
20
V
V
1.92
V
I
= 100µA
REF Load Regulation
mV
SOURCE
SWITCHING REGULATOR
BATT-to-LX Switch On-Resistance
LX Switch Off-Leakage Current
Ω
BST - LX = 4.1V
0.7
1.0
10
µA
SYNC = REF
SYNC = GND
250
125
240
200
200
-1
290
145
330
165
350
Oscillator Frequency
kHz
Oscillator SYNC Pin Synchronization Range
SYNC High Pulse Width
SYNC Low Pulse Width
kHz
ns
ns
µA
V
SYNC Input Current
SYNC = GND or VL
1
SYNC Input Low Voltage
SYNC Input High Voltage
Power-Switch Maximum Duty Cycle
SS Source Current
0.5
4.0
89
2.5
2
V
SYNC = REF
SS = GND
SS = 0.5V
91
%
µA
mA
4.0
5.5
SS Sink Current
2
_______________________________________________________________________________________
Dig it a lly Co n t ro lle d CCFL Ba c k lig h t
P o w e r S u p p lie s
0/MAX61
ELECTRICAL CHARACTERISTICS (continued)
(T = 0°C to +70°C, BATT = 8.2V, MINDAC = 0V, unless otherwise noted. Typical values are at T = +25°C.)
A
A
PARAMETER
CONDITIONS
Guaranteed monotonic
MIN
TYP
MAX
UNITS
DAC AND ERROR AMPLIFIER
DAC Resolution
5
0
Bits
V
MINDAC Input Voltage Range
MINDAC Input Bias Current
MINDAC Digital PWM Threshold
1
1
µA
-1
3
V
V
CSAV Input Voltage Range
CSAV Regulation Point
CSAV Input Bias Current
0
1.0
D/A at full scale
D/A at 1LSB
232
247
12
260
mV
µA
-5
5
CSAV to CC Voltage-to-Current Converter
Transconductance
µmho
CC = 2V, CSAV = 1V, D/A at 1LSB
85
µA
µA
CC Sink Current
CC = 2V, CSAV = 1V, D/A at 1LSB
CC = 2V, CSAV = 0V, D/A at full scale
80
20
CC Source Current
OPEN AND SHORTED TUBE PROTECTION
OTP Voltage Trip Point
Referred to REF
GND < OTP < VL
OTP rising
-20
-1
20
1
mV
µA
OTP Input Bias Current
CS Overcurrent Cutoff Threshold
MAX1610 LOGIC LEVELS
500
mV
0.8
1
V
V
SHDN, UP, DN Input Low Voltage
SHDN, UP, DN Input High Voltage
SHDN, UP, DN Input Bias Current
MAX1611 LOGIC LEVELS
2.4
-1
µA
SMBSUS, SDA, SCL Input Low Voltage
SMBSUS, SDA, SCL Input High Voltage
SMBSUS, SDA, SCL Input Bias Current
SDA Output Low Sink Current
0.8
1
V
V
2.2
-1
6
µA
mA
V
SDA
= 0.6V
_______________________________________________________________________________________
3
Dig it a lly Co n t ro lle d CCFL Ba c k lig h t
P o w e r S u p p lie s
TIMING CHARACTERISTICS—MAX1610
(Figure 1, T = +25°C, unless otherwise noted.)
A
PARAMETER
UP, DN Pulse Width High
UP, DN Pulse Width Low
UP, DN Pulse Separation
Counter Reset Time
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
µs
t
1
t
2
t
3
t
4
1
1
1
1
µs
µs
µs
TIMING CHARACTERISTICS—MAX1611
(Figures 2 and 3, T = +25°C, unless otherwise noted.)
A
PARAMETER
SCL Serial Clock High Period
SCL Serial Clock Low Period
SCL, SCA Rise Time
SYMBOL
CONDITIONS
MIN
4
TYP
MAX
UNITS
µs
t
HIGH
µs
t
4.7
LOW
0/MAX61
µs
t
R
(Note 1)
(Note 1)
1
µs
SCL, SDA Fall Time
t
F
0.3
µs
Start Condition Setup Time
Start Condition Hold Time
t
4.7
4
SU:STA
HD:STA
µs
t
SDA Valid to SCL Rising Edge
Setup Time, Slave Clocking in Data
t
500
0
SU:DAT
HD:DAT
ns
ns
SCL Falling Edge to SDA
Transition
t
(Note 1)
SCL Falling Edge to SDA Valid,
Reading Out Data
µs
t
1
DV
Note 1: Guaranteed by design.
4
_______________________________________________________________________________________
Dig it a lly Co n t ro lle d CCFL Ba c k lig h t
P o w e r S u p p lie s
0/MAX61
__________________________________________Typ ic a l Op e ra t in g Ch a ra c t e ris t ic s
(T = +25°C, unless otherwise noted.)
A
REF OUTPUT VOLTAGE
vs. REF OUTPUT CURRENT
2.2
BATT SUPPLY CURRENT
vs. BATT VOLTAGE (SHDN = VL)
VL OUTPUT VOLTAGE
vs. VL OUTPUT CURRENT
2.0
1.8
5.0
4.5
SHDN = VL, BATT = 5V
2.1
SHDN = VL, OTP = 3V
SHDN = VL, OTP = 3V
2.0
BATT = 5V
BATT = 12V
4.0
3.5
3.0
1.6
1.4
1.9
1.8
1.7
1.2
1.0
2.5
2.0
1.6
1.5
1
10
100
1000
10000
0
4
8
12
16
20 24
28
0
10
20
30
40
REF OUTPUT CURRENT (µA)
BATT (V)
VL OUTPUT CURRENT (mA)
BATT SUPPLY CURRENT
vs. BATT VOLTAGE (SHDN = OV)
VL OUTPUT VOLTAGE
vs. BATT VOLTAGE (SHDN = OV)
VL OUTPUT VOLTAGE
vs. VL LOAD CURRENT
10
8
5.0
4.5
4.0
3.5
3.0
3.70
3.65
3.60
3.55
3.50
NO LOAD ON VL,
SHDN = OV
SHDN = GND
SHDN = OV
BATT = 12V
6
4
3.45
3.40
3.35
3.30
2
0
BATT = 5V
2.5
2.0
0
4
8
12
16
20 24
28
0
4
8
12
16
20
24
28
0
200
400
600
800
1000
BATT (V)
BATT (V)
VL LOAD CURRENT (µA)
VL OUTPUT VOLTAGE
vs. BATT VOLTAGE (SHDN = VL)
5.0
4.5
4.0
3.5
3.0
2.5
2.0
NO LOAD ON VL,
SHDN = VL
0
4
8
12
16
20 24
28
BATT (V)
_______________________________________________________________________________________
5
Dig it a lly Co n t ro lle d CCFL Ba c k lig h t
P o w e r S u p p lie s
______________________________________________________________P in De s c rip t io n
PIN
NAME
FUNCTION
MAX1610
MAX1611
Logic-Level Input. A rising edge on UP increments the 5-bit counter for the 5-bit DAC.
UP = DN = 1 presets the counter to mid-scale.
1
—
2
—
1
UP
SDA
DN
System Management Bus Serial Data Input and Open-Drain Output
Logic-Level Input. A rising edge on DN decrements the 5-bit counter for the 5-bit DAC.
UP = DN = 1 presets the counter to mid-scale.
—
2
—
3
SCL
SHDN
System Management Bus Serial Clock Input
Logic-Level Shutdown Input Pin. Applying a logic low to SHDN places the chip in a low-
supply-current shutdown mode.
—
System Management Bus Suspend Mode Input. SMBSUS Selects one of two chip-
configuration settings, which are preprogrammed serially.
—
4
3
4
5
6
7
SMBSUS
SYNC
SS
Oscillator Synchronization Input. Tying SYNC to REF sets the oscillator frequency to 290kHz.
Tying SYNC to GND or VL lowers the oscillator frequency to 145kHz.
0/MAX61
Soft-Start Pin. A 4µA current source feeds the capacitor placed on SS. The voltage on this
pin limits the peak current in the switch. When the lamp is turned off, SS pulls to GND.
5
Output of the Voltage-to-Current Converter; Input to the PWM Comparator, which sets the
current limit. A capacitor placed at CC sets the current-regulator-loop bandwidth.
6
CC
Input to the Voltage-to-Current Converter, which averages the voltage on CSAV using the
capacitor on CC.
7
CSAV
The voltage at MINDAC sets the DAC’s minimum-scale output voltage. Tying MINDAC to
VL enables the internal 280Hz current-chopping mode.
8
9
8
9
MINDAC
REF
2.0V Reference Output. Bypass with 0.1µF to GND.
Open-Tube Protection Comparator. As long as OTP exceeds the reference voltage, the
N-channel BATT-to-LX switch is forced off.
10
10
OTP
Low-Side Current-Sense Input. The current-mode regulator terminates the switch cycle
when the voltage at CS exceeds REF - CC.
11
11
CS
Output of the Internal Linear Regulator. VL can be overdriven by a voltage greater than 4.75V
to operate the chip from +5V ± 5%, and to conserve power. Bypass with 0.1µF to GND.
12
13
14
12
13
14
VL
GND
BST
System Ground
Power Input to the High-Side Gate Driver, which switches the internal N-channel MOSFET
on and off.
Ground Connection for the Internal High-Side Gate Driver; source-connection point for the
internal N-channel MOSFET
15
16
15
16
LX
4.5V to 25V Battery-Voltage Input Point. Connects to the internal N-channel power MOSFET’s
drain, and to the input of the internal linear regulator that powers the chip.
BATT
6
_______________________________________________________________________________________
Dig it a lly Co n t ro lle d CCFL Ba c k lig h t
P o w e r S u p p lie s
0/MAX61
t
t
t
1
2
4
UP
t
3
DN
Figure 1. MAX1610 UP and DN Signal Timing
MOST SIGNIFICANT
ADDRESS BIT (A6)
CLOCKED INTO SLAVE
START
CONDITION
A5 CLOCKED
INTO SLAVE
A3 CLOCKED
INTO SLAVE
A4 CLOCKED
INTO SLAVE
SCL
• • •
t
HD:STA
t
t
HIGH
LOW
• • •
SDA
t
SU:STA
t
t
HD:DAT
t
t
HD:DAT
SU:DAT
SU:DAT
Figure 2. MAX1611 SMB Serial-Interface Timing—Address
_______________________________________________________________________________________
7
Dig it a lly Co n t ro lle d CCFL Ba c k lig h t
P o w e r S u p p lie s
ACKNOWLEDGED
BIT CLOCK
INTO MASTER
RW BIT
CLOCKED
INTO SLAVE
MOST SIGNIFICANT
BIT CLOCKED
SCL
SDA
• • •
SLAVE PULLING
SDA LOW
• • •
t
t
DV
DV
Figure 3. MAX1611 SMB Serial-Interface Timing—Acknowledge
0/MAX61
does not exceed its maximum rating, despite T1, C1, and
C2 component-value variations. The Royer oscillator
waveforms for the circuit of Figure 4 are shown in Figures
5 and 6.
_______________De t a ile d De s c rip t io n
Ge t t in g S t a rt e d
A cold-cathode fluorescent lamp (CCFL) has two termi-
nals. For the CCFL to emit light, the two lamp terminals
mus t b e d rive n with a hig h-volta g e (a p p roxima te ly
550V AC RMS) and high-frequency (approximately
45kHz) sine wave. The MAX1610/MAX1611 use a vary-
ing DC input voltage to create this high-voltage, high-
fre q ue nc y s ine -wa ve d rive . To s e le c t the c orre c t
component values for the MAX1610/MAX1611 circuit,
several CCFL parameters and the minimum DC input
voltage must be specified; these are listed in Table 1.
An a lo g Circ u it ry
The MAX1610/MAX1611 maintain fixed CCFL bright-
ness with varying input voltages on BATT by regulating
the current fed into the Royer oscillator. This current is
sensed via resistor R1 between CSAV and GND. An
internal switch from BATT-to-LX pulse-width modulates
at a fixed frequency to servo the CSAV pin to its regula-
tion volta g e . The CSAV re g ula tion volta g e c a n b e
adjusted via the digital interface to set CCFL bright-
ness. The MAX1610 and MAX1611 differ only in the
digital interface they use to adjust the internal 5-bit digi-
tal-to-analog converter (DAC) that sets the CSAV regu-
lation voltage. The minimum-scale (min-scale) CSAV
regulation voltage is resistor adjustable using the MIN-
DAC pin, setting the minimum CCFL brightness. The
D/A setting at MAX1610/MAX1611 power-up is preset
to mid-scale (10000 binary) (Figure 7).
Table 3 shows the recommended component values to
use with the circuit of Figure 4, depending on the par-
ticular CCFL parameters. The C2 values in Table 3
have been selected such that the normal operating
voltage on the secondary of T1 is as close as possible
to the CCFL strike voltage (where the strike voltage
(V ) is assumed to be approximately 1.8 times the
S
CCFL operating voltage (V )).
L
Components T1, C1, R2, Q1, and Q2 form a Royer
oscillator. A Royer oscillator is a resonant tank circuit
that oscillates at a frequency dependent on C1, the pri-
MINDAC Sets the Minimum Scale
The MINDAC p in s e ts the lowe s t CCFL b rig htne s s
level. The voltage at MINDAC is divided by eight, and
sets the minimum CSAV regulation voltage. For exam-
p le , in the c irc uit of Fig ure 4, R5 (150kΩ) a nd R6
(51kΩ) form a resistor divider from REF, which sets
MINDAC to 507mV (REF = 2.0V). This sets a minimum
CSAV re g ula tion volta g e of 63mV with a full-s c a le
CSAV regulation voltage of 247mV.
ma ry ma g ne tizing ind uc ta nc e of T1 (L ), a nd the
P
imp e d a nc e s e e n b y the T1 s e c ond a ry. The
MAX1610/MAX1611 regulate the current fed into the
Royer oscillator by sensing the voltage on R1. For a
given current through the Royer oscillator (I ), the
R1
power delivered to the CCFL depends on the Royer
oscillator frequency. The R1 values in Table 3 have
been selected to ensure that the power into the CCFL
8
_______________________________________________________________________________________
Dig it a lly Co n t ro lle d CCFL Ba c k lig h t
P o w e r S u p p lie s
0/MAX61
V
IN
16
5
12
VL
C2
BATT
SS
+
D3
R7
C9
C4
C3
C6
CCFL
MAX1610
MAX1611*
10
6
T1
14
15
BST
LX
L1
C7
1
2
3
4
5
R2
D1
D2
6
CC
C1
R3
R4
10
11
OTP
Q1
Q2
C5
4
9
SYNC
REF
CS
CSAV
GND
7
R5
R1
13
8
C8
MINDAC
R6
* DIGITAL INTERFACE NOT SHOWN
Figure 4. Typical Floating-Lamp Application Circuit
Table 1. Necessary CCFL Specifications
SPECIFICATION
UNITS
SYMBOL
DESCRIPTION
Although CCFLs typically operate at 550V
CCFL Minimum Strike Voltage
(“Kick-Off Voltage”)
a higher voltage
RMS,
V
RMS
V
S
is required initially to light up the tube.
Once a CCFL has been struck, the voltage required to maintain
light output falls to approximately 550V
operate on as little as 250V . The operating voltage of the
RMS
CCFL stays relatively constant, even as the tube’s brightness is
varied.
. Small tubes may
RMS
CCFL Typical Operating Voltage
(“Lamp Voltage”)
V
RMS
V
L
The maximum root-mean-square AC current through a CCFL is
CCFL Maximum Operating
Current (“Lamp Current”)
mA
I
L
almost always 5mA No DC current is allowed through any
RMS.
RMS
CCFL.
CCFL Maximum Frequency
(“Lamp Frequency”)
The maximum AC-lamp-current frequency.
kHz
f
L
The minimum DC input voltage to the MAX1610/MAX1611 circuit
determines the turns ratio required for the DC-AC conversion
transformer. Decreasing the minimum input voltage increases
the size of the transformer required for a given output power.
DC Power Source Minimum
Input Voltage
V
V
MIN
_______________________________________________________________________________________
9
Dig it a lly Co n t ro lle d CCFL Ba c k lig h t
P o w e r S u p p lie s
Table 2. Typical Application Circuit Component Values
a) Resistors
b) Capacitors
POWER
RATING
TOLER-
ANCE
WORKING
VOLTAGE
SYMBOL VALUE
TOLERANCE
SYMBOL VALUE
NOTES
0.1µF
δF ≤ 0.001 @ 1kHz
R1
R2
R3
R4
R5
R6
R7
(Note)
510Ω
51kΩ
8.2kΩ
150kΩ
51kΩ
20Ω
±1%
±10%
±5%
±5%
±5%
±5%
±10%
1/8W
1/8W
C1
±20%
±10%
±20%
-20%
-50%
±25V
±3kV
25V
(Note 1)
(pF)
C2
High voltage
1/16W
1/16W
1/16W
1/16W
1/16W
C3, C5
27nF
0.1µF
10µF
C4, C6,
C7, C8
Ceramic, larger
values acceptable
25V
C9
35V
Tantalum, low ESR
0/MAX61
c) Other Components
GENERIC
PART
SURFACE-MOUNT
PART
SYMBOL
DESCRIPTION
MANUFACTURER
1A NPN switching transistor,
≥ 50V
Q1, Q2
2N2222A
FMMT619, SOT23
Zetex
V
CEO
D1, D3
D2
50mA silicon diode, V ≥ 40V
1N4148
1N5818
CMPD4448, SOT23
EC10QS04
Central
Nihon
BR
1A Schottky diode, V ≥ 30V
BR
L1
100µH, 1A inductor
CDR125-101
Sumida
6W Royer oscillator transformer, turns ratio 67:1,
secondary (pins 10 and 6) : primary (pins 1 and 3),
T1
CTX110605
Coiltronics
primary magnetizing inductance (L ) of 44µH ±20%
P
Note: Component values depend on lamp characteristics. See Table 3 to select values.
Table 3. Selecting Circuit Values for Figure 4
f
(kHz)
ROY
V
RMS
I
VCT
(V )
MAX
L
L
C2
R1
(V
)
(mA
)
RMS
MIN
50.3
43.3
52.1
45.6
51.1
52.1
52.5
53.6
TYP
MAX
71.8
60.3
75.1
64.7
73.3
75.1
76.7
78.1
1.21Ω
0.715Ω
1.18Ω
250
250
300
300
450
500
550
600
3
22pF
43pF
18pF
36pF
20pF
18pF
18pF
15pF
3.63V
3.61V
4.30V
4.14V
6.55V
7.17V
7.29V
8.41V
58.6
49.7
61.0
52.8
59.7
61.0
61.8
63.1
5
3
5
5
5
5
5
0.681Ω
0.732Ω
0.715Ω
0.665Ω
0.698Ω
Note: f
= Royer oscillator damped resonant oscillation frequency. T1 primary magnetizing inductance (L ) = 44µH ±20%.
P
ROY
VCT = average voltage from the T1 center tap to the emitters of Q1 and Q2 (ignoring Q1, Q2 V
).
CE,SAT
C1 = 0.1µF ± 20%; C2 = ±10% tolerance; R1 = ±1% tolerance.
10 ______________________________________________________________________________________
Dig it a lly Co n t ro lle d CCFL Ba c k lig h t
P o w e r S u p p lie s
0/MAX61
3V
FIGURE 4 CIRCUIT, C2 = 15pF, I = 462mA,
R1
CCFL VL = 500V
RMS
6V
SS
VOLTAGE
T1
FIGURE 4 CIRCUIT, C2 = 15pF,
R1 = 545Ω,
CENTER-TAP
VOLTAGE
0V
6V
CCFL VL = 500V , BATT = 15V,
RMS
MINDAC = 0.5V, D/A VALUE = 10000
BATT = 10V, I
= 0.20A,
0V
1A
BATT
MINDAC = 0.5V, D/A VALUE = 11111
T1
CENTER-TAP
VOLTAGE
C1
CURRENT
-1A
0V
5µs/div
10ms/div
Figure 5. Royer Oscillator Typical Operating Waveforms for
Circuit of Figure 4
Figure 6. Start-Up Waveforms for Circuit of Figure 4
REF / 8 = 250mV
FULL-SCALE
MID-SCALE
MIN-SCALE = MINDAC / 8
OmV
DAC CODE
NOTE: DAC CODE 00000 FORCES THE BATT-TO-LX SWITCH OFF REGARDLESS OF CSAV OR MINDAC VOLTAGE.
Figure 7. CSAV Regulation Voltage Range
______________________________________________________________________________________ 11
Dig it a lly Co n t ro lle d CCFL Ba c k lig h t
P o w e r S u p p lie s
Open-Tube Protection (OTP)
Any real transformer used in a Royer oscillator will have a
maximum-allowed secondary voltage. If the maximum-
allowed secondary voltage is exceeded, the winding
insulation can break down, leading to permanent trans-
former damage. The maximum-allowed secondary volt-
age can be exceeded either when the CCFL drive circuit
is turned on without the CCFL being in place, or when
the CCFL becomes disconnected during normal opera-
tion due to a mechanical failure. To protect against these
fault conditions, use the OTP pin to sense the voltage on
the transformer center tap (pin 2 of Figure 4). Whenever
the voltage on OTP exceeds the REF reference voltage,
the BATT-to-LX power switch is forced off.
Loop-Compensation Capacitor (CC)
The BATT-to-LX switch turns on at fixed frequency, and
turns off when the current-sense voltage on the CS pin
exceeds CC - REF. As the CC pin voltage rises, the CS
current limit rises as well. A transconductance amplifier
compares the voltage on CSAV to the desired regulation
voltage and outputs a current proportional to this error
to the CC pin. A capacitor from CC to GND sets the
bandwidth of this regulation loop, as shown in Equation 2:
85
BW =
2πC3
where BW is the bandwidth of the CSAV regulation loop
in kHz, and C3 is the capacitance from CC to GND
in nF.
For example, in Figure 4, the CTX110605 transformer
has a maximum-allowed continuous secondary voltage
of 1340V
D1 and C5 detect the peak voltage on
RMS.
Soft Start (SS)
Soft start prevents the triggering of OTP upon power-
up. Placing a capacitor from SS to GND soft starts the
Royer oscillator by slowly raising the CS current-limit
volta g e . Inte rna l c irc uitry p ulls SS to GND d uring
power-on reset, or whenever the lamp is turned off (DAC
= 00000, shutdown mode, ON-1 = 0, or ON-0 = 0)
(Figures 10 and 11). When SS is not pulled to GND, an
internal 4µA current sources into the capacitor at the
SS pin. This pin is internally diode clamped to REF so
tha t it ris e s to a ma ximum volta g e of a b out 2.7V.
Regardless of the voltage on CC, the CS current-sense
voltage is never allowed to exceed the voltage on SS
divided by 5.
the center tap of T1. R3 and R4 determine the limit on
the center tap peak voltage. The relationship between
the voltage on the center tap of T1 and the secondary
volta g e is dia gra mme d in Fig ure 8. Ne gle c ting the
Q1/Q2 saturation voltage and the voltage on the R1
current-sense resistor yields Equation 1:
0/MAX61
V
2
SEC
V
=
CTPK
2N
where V
is the maximum root-mean-square voltage
SEC
allowed on the secondary, N is the secondary-to-prima-
ry turns ratio, and V is the peak voltage on the
transformer center tap.
CTPK
Frequency Selection and Synchronization
The SYNC pin performs two functions: it sets the BATT-
to-LX switching frequency, and it allows the BATT-to-LX
switching frequency to be synchronized to an external
os c illa tor. SYNC tie d to GND or VL s e ts a 145kHz
switching frequency; SYNC tied to REF sets a 290kHz
Blo c k Dia g ra m o f t h e An a lo g S e c t io n
Figure 9 shows a functional diagram of the analog cir-
cuitry in the MAX1610/MAX1611. The chips have identi-
c a l a na log c irc uitry, a nd d iffe r only in the ir d ig ita l
interface.
NπV
CT
πV
2
CT
2
-NπV
CT
2
2π
2π
ω
ω
NOTE: V = AVERAGE VOLTAGE FROM THE T1 CENTER TO THE EMITTERS OF Q1 AND Q2 (IGNORING Q1, Q2 V
). ω = 2πf
.
CT
CE, SAT
ROY
Figure 8. Transformer Primary/Secondary Voltage Relationship
12 ______________________________________________________________________________________
Dig it a lly Co n t ro lle d CCFL Ba c k lig h t
P o w e r S u p p lie s
0/MAX61
BATT
BST
VL
DMOS
POWER
SWITCH
LEVEL
SHIFTER
4.5V
REG
GND
LX
CS
CSAV
Σ
GM
CC
÷8
REF
+
2.0V
-
MINDAC
(NOTE)
R
÷5
SYNC
OSC
S
Q
4µA
SS
OTP
5
UP (SDA)
DN (SCL)
DIGITAL INTERFACE
SHDN (SMBSUS)
( ) ARE FOR MAX1611
NOTE: CIRCUITRY TO DETECT MINDAC = VL NOT SHOWN. SEE CHOPPING THE LAMP CURRENT SECTION.
Figure 9. Functional Diagram
______________________________________________________________________________________ 13
Dig it a lly Co n t ro lle d CCFL Ba c k lig h t
P o w e r S u p p lie s
MOST
SIGNIFICANT
ADDRESS BIT
LEAST
SIGNIFICANT
ADDRESS BIT ACKNOWLEDGE
SLAVE
ACKNOWLEDGE
SLAVE
MOST
SIGNIFICANT
DATA BIT
LEAST
SIGNIFICANT
DATA BIT
START
CONDITION
R/W BIT
SCL
SHDNB-0
REGSEL
SLAVE PULLS
SDA LOW
D4-0 D3-0 D2-0 D1-0 D0-0
SDA
STDBY-0
SLAVE PULLS
SDA LOW
Figure 10. MAX1611 Serial-Interface Single-Byte Write Example (REGSEL = 0)
MOST
SIGNIFICANT
ADDRESS BIT
LEAST
SIGNIFICANT
ADDRESS BIT ACKNOWLEDGE
SLAVE
ACKNOWLEDGE
SLAVE
0/MAX61
MOST
SIGNIFICANT
DATA BIT
LEAST
SIGNIFICANT
DATA BIT
START
CONDITION
R/W BIT
SCL
REGSEL SHDNB-1
STDBY-1
D4-1 D3-1 D2-1 D1-1 D0-1
SDA
SLAVE PULLS
SDA LOW
SLAVE PULLS
SDA LOW
Figure 11. MAX1611 Serial-Interface Single-Byte Write Example (REGSEL = 1)
switching frequency. Any rising edge on SYNC restarts
a BATT-to-LX switch cycle by forcing the switch on.
(other than the supply current) is consumed through
the BST pin, requiring VL to source at least 4.5mA of
current. With SHDN = 0, all analog circuitry turns off,
except for a coarse regulator that can source up to
500µA from VL. The coarse regulator preserves the
state of the internal logic and keeps the digital interface
active during shutdown (SHDN = 0).
________MAX1 6 1 0 Dig it a l In t e rfa c e
The MAX1610 contains an internal 5-bit up/down counter
that sets the value of the internal 5-bit DAC. At power-on,
or when both the UP and DN pins are held high simulta-
neously, the 5-bit up/down counter is preset to 10000
binary, which corresponds to mid-scale. A rising edge
on UP increments the 5-bit up/down counter. A rising
edge on DN decrements the 5-bit up/down counter. The
counter will not roll over on either underflow or overflow.
For example, if the CCFL is at maximum intensity level,
rising edges on UP will not change the output.
________MAX1 6 1 1 Dig it a l In t e rfa c e
A s ing le b yte of d a ta writte n ove r the Inte l Sys te m
Management Bus (SMBus™) controls the MAX1611.
Figures 10 and 11 show example single-byte writes. The
MAX1611 contains two 7-bit latches for storing configu-
ration data. Only one of the 7-bit latches is active at a
time. The MAX1611 responds only to its own address,
0101101 binary. The SMBSUS pin selects which of the
two sets of configuration data is used. Figure 12 shows
a schematic diagram of the MAX1611’s digital circuitry.
Notice that the SMBSUS pin selects which one of the
The SHDN pin provides a way to lower the MAX1610
s up p ly c urre nt to 10µA without re s e tting the 5-b it
up/down counter. With SHDN = 1, the MAX1610 oper-
ates normally with VL at 4.5V. When the BATT-to-LX
power switch operates, an additional 3mA of current
14 ______________________________________________________________________________________
Dig it a lly Co n t ro lle d CCFL Ba c k lig h t
P o w e r S u p p lie s
0/MAX61
OTPOK
CONTROL
LOGIC
8
SCL
SDA
8-BIT
SHIFT REGISTER
IN
DATA LE
7
LE
LE
7-BIT LATCH-0
7-BIT LATCH-1
VL
7
7
CLR
S
A
B
OTPOK
MULTIPLEXER
Y = A WHEN S IS LOW
Q
SMBSUS
S
REF
OTP
Y
R
PRE
7
D_
OTP
COMPARATOR
SHDNB
STDBY
5
SS
BIAS
GENERATORS
5-BIT DAC
CIRCUITRY
Figure 12. MAX1611 Serial-Interface Circuitry Block Diagram
______________________________________________________________________________________ 15
Dig it a lly Co n t ro lle d CCFL Ba c k lig h t
P o w e r S u p p lie s
Table 4. MAX1611 Configuration Byte with REGSEL = 0
POR
STATE*
BIT
NAME
DESCRIPTION
Register Select. A zero in this bit writes the remaining seven bits into the 7-bit latch-0
(Figure 13).
7
REGSEL
—
Complete Shutdown. Pulling SMBSUS low with SHDNB-0 = 0 places the MAX1611 into a
low-quiescent-current shutdown mode, with the reference off and the VL linear-regulator
output switched to a low-current, coarse regulation mode. Pulling SMBSUS low with
SHDNB-0 = 1 puts the MAX1611 into its normal operational mode, with the reference and
internal VL linear regulator fully on. SHDNB-0 supersedes STDBY-0. As long as SHDNB-0 = 0
and SMBSUS = 0, it doesn't matter what STDBY-0 is; the MAX1611 still shuts down.
6
SHDNB-0
0
Standby, disables CCFL supply only. As long as SMBSUS stays low and STDBY-0 = 0, the
internal power switch is kept off and SS is held shorted to GND; neither the internal refer-
ence nor the linear regulator is affected. With STDBY = 1 and SMBSUS low, the MAX1611
operates normally.
5
STDBY-0
0
4
3
2
1
0
D4-0
D3-0
D2-0
D1-0
D0-0
1
0
0
0
0
0/MAX61
DAC Input Data. With the SMBSUS pin low, bits D4-0 through D0-0 set the DAC.
* Initial register state after power-up.
Table 5. MAX1611 Configuration Byte with REGSEL = 1
POR
STATE*
BIT
NAME
DESCRIPTION
Register Select. A one in this bit writes the remaining seven bits into the 7-bit latch-1
(Figure 13).
7
REGSEL
—
Complete Shutdown. Pulling SMBSUS high with SHDNB-1 = 0 places the MAX1611 into a
low-quiescent-current shutdown mode, with the reference off and the VL linear regulator
output switched to a low-current coarse regulation mode. Pulling SMBSUS high with
SHDNB-1 = 1 puts the MAX1611 into its normal operational mode, with the reference and
internal VL linear regulator fully on. SHDNB-1 supersedes STDBY-1. As long as SHDNB-1 = 0
and SMBSUS = 0, it doesn’t matter what STDBY-1 is; the MAX1611 still shuts down.
6
SHDNB-1
1
Standby, disables CCFL supply only. As long as SMBSUS stays high and STDBY-1 = 0,
the internal power switch is kept off and SS is held shorted to GND; neither the internal ref-
erence nor the linear regulator is affected. With STDBY-1 = 1 and SMBSUS high, the
MAX1611 operates normally.
5
STDBY-1
1
4
3
2
1
0
D4-1
D3-1
D2-1
D1-1
D0-1
1
0
0
0
0
DAC Input Data. With the SMBSUS pin high, bits D4-1 through D0-1 set the DAC.
* Initial register state after power-up.
16 ______________________________________________________________________________________
Dig it a lly Co n t ro lle d CCFL Ba c k lig h t
P o w e r S u p p lie s
0/MAX61
MOST
LEAST
SIGNIFICANT
ADDRESS BIT
SIGNIFICANT
ADDRESS BIT ACKNOWLEDGE
MOST
SLAVE
START
CONDITION
SIGNIFICANT
DATA BIT
R/W BIT
SCL
OTPOK
DA4
DA3
DA2
DA1
DA0
SDA
SLAVE PULLS
SDA LOW
MAX1611 DRIVES SDA
Figure 13. MAX1611 Serial-Interface Read Example
Table 6. MAX1611 Status Bits
POR
STATE*
BIT
NAME
FUNCTION
Latched Open-Tube Detection. OTPOK = 0 indicates that open-tube detection has been
triggered. As soon as the voltage on the OTP pin exceeds REF, the OTPOK bit is cleared.
Reset the OTPOK pin by entering shutdown or standby.
7
OTPOK
1
6
5
—
—
—
—
Unused. These bits always return a logic one.
4
3
2
1
0
DA4
DA3
DA2
DA1
DA0
Displays the DAC setting selected by SMBSUS.
* Initial register state after power-up.
two 7-bit registers is used. Tables 4 and 5 describe the
data format for the configuration data.
be varied by turning the lamp on and off at a frequency
faster than the eye can detect. The SS pin pulls to GND
during off time and rises to 2.7V during on time. During
on time, the CSAV pin regulates to REF / 8 (250mV).
During off time, the BATT-to-LX power switch is forced
off and the CC compensation node goes high imped-
ance. Omit R5, R6, and C4 of the circuit in Figure 4.
Sta tus informa tion c a n b e re a d from the MAX1611
using the SMBus read-byte protocol. Figure 13 shows
an example status read. Table 6 describes the status
information data format.
During shutdown (SMBSUS = 0 and SHDNB-0 = 0, or
SMBSUS = 1 and SHDNB-1 = 0), the MAX1611 serial
interface remains fully functional and can be used to set
either the SHDNB-0 or SHDNB-1 bits in order to return
the MAX1611 to its normal operational state.
In this mode, leave SS floating and increase the CC
capacitance to 0.1µF. Also, insert a 330Ω resistor in series
with D1 (Figure 4) to prevent the open-lamp detection cir-
cuit from being tripped by the repeated striking of the
lamp. The SS pin will oscillate at the switching frequency
divided by 1024 (283Hz with SYNC = REF). The intensity
can be varied with the duty cycle at the SS pin. The duty
cycle is set by the DAC in 3% increments. Duty cycle will
vary with intensity. Full-scale yields a 100% duty cycle.
DAC c od e s 00001, 00010, a nd 00011 a ll yie ld the
_______ Ch o p p in g t h e La m p Cu rre n t
Chopping the lamp current allows lower sustainable light
levels without lamp flicker. Intensity is varied by control-
ling the on-time duty cycle. Tying MINDAC to VL acti-
vates a special mode, which allows the CCFL intensity to
______________________________________________________________________________________ 17
Dig it a lly Co n t ro lle d CCFL Ba c k lig h t
P o w e r S u p p lie s
minimum 9% duty cycle. DAC code 00000 shuts off the
lamp entirely (0% duty cycle). Figure 14 shows the
chopped waveforms with the DAC set to mid-scale.
tance in the Royer resonant tank. Table 8 lists suppliers
for the high-voltage ballast capacitor, C2.
__________ Ap p lic a t io n s In fo rm a t io n
Dire c t ly Re g u la t in g t h e La m p Cu rre n t
The MAX1610/MAX1611 can directly regulate the CCFL
current by tapping into the secondary of T1 (Figure 15).
This allows more precise setting of the maximum lamp
current (IL). The disadvantage of this approach is that
the secondary-to-ground voltage is twice that shown in
Figure 4, increasing the likelihood of the thermometer
effect, where one end of the lamp is brighter than the
other. Figure 15 uses the same component values as
Figure 4, except for R1, R40, D40, and D41. D40 and
D41 are the same type of diode as D1. R1 should be
0.68Ω ±10% to set a peak current limit of about 735mA.
Use a 107Ω ±1% resistor for R40 to set a lamp current
4V
SS
VOLTAGE
0V
BATT = 15V, MINDAC = VL, SS = OPEN, CC = 0.1µF,
C2 = 15pF, MID-SCALE SETTING, D/A VALUE = 10000
15V
T1
CENTER-TAP
VOLTAGE
0/MAX61
of 5mA
. This circuit accepts a wide range of lamp
RMS
types without component adjustments.
0V
500µs/div
Co m p o n e n t S u p p lie rs
Table 7 lists three different sources for C1. C1 requires
a low dissipation factor to prevent overheating as energy
is cycled between C1 and the T1 magnetizing induc-
Figure 14. Chopped Waveforms
VIN
C2
16
5
12
VL
CCFL
BATT
SS
+
D3
R7
C9
C4
C3
C6
10
T1
6
MAX1610
MAX1611
2
1
3
4
5
14
15
BST
LX
L1
C7
R2
D1
D2
6
C1
CC
R3
R4
10
11
Q1
Q2
OTP
C5
4
9
SYNC
REF
D40
D41
CS
CSAV
GND
7
R5
R1
R40
13
8
C8
MINDAC
R6
Figure 15. Directly Regulating the CCFL Current
18 ______________________________________________________________________________________
Dig it a lly Co n t ro lle d CCFL Ba c k lig h t
P o w e r S u p p lie s
0/MAX61
Table 7. Capacitor C1 Supplier Information
PART
SUPPLIER
LOCATION
Elmsford, NY
Germany
PHONE
914-347-2474
(0621) 8785-0
5-70-11-51
FAX
NOTES/CONTACT
914-347-7230
(0621) 8710457158
58-06-84-74
Dissipation factor (tan δ)
at 1kHz and 20°C ≤ 0.008.
SMD7.3104
WIMA
Hong Kong
Dissipation factor (tan δ)
at 1kHz ≤ 0.002.
PACCOM
Electronics
CHEV0025J104
4040N104M250
Redmond, WA
Valencia, CA
206-883-9200
805-295-5920
206-881-6959
805-295-5928
Dissipation factor (tan δ)
at 1kHz and 20°C ≤ 0.0015.
NOVACAP
Table 8. Capacitor C2 Supplier Information
PART
SUPPLIER
LOCATION
PHONE
FAX
Olean, NY
Vancouver, WA
Germany
716-372-6611
206-696-2840
08131 9004-0
852-363-3303
404-436-1300
49-911-66870
886-2-562-4218
908-679-3366
818-364-9800
716-372-6316
206-695-5836
08131 9004-44
852-765-8185
404-436-3030
49-911-6687193
886-2-536-6721
908-679-3222
818-364-6100
1808HA330KATMA
AVX/Kyocera
Hong Kong
Smyrna, GA
Germany
GHM1040SL330J3K
Murata
Taiwan
302C1812A330K
302R29N330K
Metuchen Capacitors, Inc.
Johanson Dielectrics
Old Bridge, NJ
Sylmar, CA
___________________Ch ip In fo rm a t io n
TRANSISTOR COUNT : 5457
______________________________________________________________________________________ 19
Dig it a lly Co n t ro lle d CCFL Ba c k lig h t
P o w e r S u p p lie s
________________________________________________________P a c k a g e In fo rm a t io n
INCHES
MILLIMETERS
DIM
MIN
0.053
MAX
0.069
0.010
0.019
0.010
0.157
MIN
1.35
0.10
0.35
0.19
3.80
MAX
1.75
0.25
0.49
0.25
4.00
A
D
A1 0.004
B
C
E
e
0.014
0.007
0.150
0°-8°
A
0.101mm
0.004in.
0.050
1.27
e
H
L
0.228
0.016
0.244
0.050
5.80
0.40
6.20
1.27
A1
C
B
L
INCHES
MILLIMETERS
DIM PINS
Narrow SO
SMALL-OUTLINE
PACKAGE
MIN MAX
MIN
MAX
5.00
8.75
8
0.189 0.197 4.80
D
D
D
0/MAX61
E
H
14 0.337 0.344 8.55
16 0.386 0.394 9.80 10.00
(0.150 in.)
21-0041A
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
20 __________________Ma x im In t e g ra t e d P ro d u c t s , 1 2 0 S a n Ga b rie l Drive , S u n n yva le , CA 9 4 0 8 6 (4 0 8 ) 7 3 7 -7 6 0 0
© 1996 Maxim Integrated Products
Printed USA
is a registered trademark of Maxim Integrated Products.
相关型号：
MAX1610CSE+
Fluorescent Light Controller, 290kHz Switching Freq-Max, CMOS, PDSO16, 0.150 INCH, MS-012C, SOIC-16
MAXIM
MAX1610CSE+
FLUORESCENT LIGHT CONTROLLER, 290kHz SWITCHING FREQ-MAX, PDSO16, 0.150 INCH, MS-012C, SOIC-16
ROCHESTER
MAX1610CSE+T
Fluorescent Light Controller, 290kHz Switching Freq-Max, CMOS, PDSO16, 0.150 INCH, MS-012C, SOIC-16
MAXIM
MAX1610CSE-T
Fluorescent Light Controller, Current-mode, 330kHz Switching Freq-Max, CMOS, PDSO16, 0.150 INCH, SOP-16
MAXIM
MAX1611CSE+
Fluorescent Light Controller, 290kHz Switching Freq-Max, CMOS, PDSO16, 0.150 INCH, MS-012C, SOIC-16
MAXIM
MAX1611CSE+T
Fluorescent Light Controller, 290kHz Switching Freq-Max, CMOS, PDSO16, 0.150 INCH, MS-012C, SOIC-16
MAXIM
MAX1611CSE-T
Fluorescent Light Controller, Current-mode, 330kHz Switching Freq-Max, CMOS, PDSO16, 0.150 INCH, SOP-16
MAXIM
©2020 ICPDF网 联系我们和版权申明