MAX16922AUP_/V+ [MAXIM]
2.2MHz, Dual, Step-Down DC-DC Converters, Dual LDOs, and RESET; 2.2MHz，双，降压型DC- DC转换器，双路LDO ，和RESET
| 型号： | MAX16922AUP_/V+ |
| 厂家： | 
MAXIM INTEGRATED PRODUCTS |
| 描述： | 2.2MHz, Dual, Step-Down DC-DC Converters, Dual LDOs, and RESET |
| 文件： | 总17页 (文件大小：989K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
19-5039; Rev 1; 5/10
2.2MHz, Dual, Step-Down DC-DC
Converters, Dual LDOs, and RESET
MAX1692
General Description
Features
o 1.2A High-Efficiency 2.2MHz DC-DC Converter
The MAX16922 power-management integrated circuit
(PMIC) is designed for medium power-level automotive
applications and integrates multiple supplies in a small
footprint. The device includes one high-voltage step-
down converter (OUT1) and three low-voltage cascad-
ed DC-DC converters (OUT2, OUT3, OUT4). OUT1 and
OUT2 are step-down DC-DC converters, and OUT3/
OUT4 are linear regulators. The device also includes a
reset output (RESET) and a high-voltage-compatible
enable input (EN).
3.7V to 28V Operating Supply Voltage
45V Load-Dump Protection
Output Voltage: 3.0V to 5.5V
o 600mA High-Efficiency 2.2MHz DC-DC Converter
2.7V to 5.5V Supply Voltage
Output Voltage: 1.0V to 3.9V
180° Out-of-Phase Operation
Forced-PWM and Auto-PWM Modes
o LDO Linear Regulators
OUT3: 1.0V to 4.15V at 300mA
OUT4: 1.0V to 4.15V at 300mA
Separate Inputs for Increased Efficiency
The 1.2A output high-efficiency, step-down DC-DC con-
verter (OUT1) operates from a voltage up to 28V contin-
uous and is protected from load-dump transients up to
45V. The 600mA output high-efficiency step-down DC-
DC converter (OUT2) runs from a voltage up to 5.5V.
The two 300mA LDO linear regulators offer low dropout
of only 130mV (typ). The power-good RESET output
provides voltage monitoring for OUT1 and OUT2.
o Enable Input
o RESET Output Monitoring on OUT1 and OUT2
o Overtemperature and Short-Circuit Protection
o Available in
5mm x 5mm x 0.8mm, 20-Pin TQFN-EP
4.5mm x 6.5mm, 20-Pin TSSOP-EP
OUT1 and OUT2 use fast 2.2MHz PWM switching and
small external components. The high-voltage converter
(OUT1) enters skip mode automatically under light
loads to prevent an overvoltage condition from occur-
ring at the output. The low-voltage synchronous DC-DC
converter (OUT2) can operate in forced-PWM mode to
prevent any AM band interference or high-efficiency
auto-PWM mode.
Ordering Information
PART
TEMP RANGE
PIN-PACKAGE
MAX16922ATP_ /V+*
MAX16922AUP_ /V+*
-40°C to +125°C 20 TQFN-EP**
-40°C to +125°C 20 TSSOP-EP**
*Insert the desired suffix letters (from the Selector Guide) into
the blank “_” to complete the part number.
+Denotes a lead(Pb)-free/RoHS-compliant package.
/V denotes an automotive qualified part.
**EP = Exposed pad.
The MAX16922 includes overtemperature shutdown
and overcurrent limiting. All devices are designed to
operate from -40°C to +125°C ambient temperature.
Typical Operating Circuit
V
PV1
PV1
EN
OUTS2
2.2µH
4.7µF
LX2
V
OUT2
10µF
PWM
PV3
V
OUT1
PGND2
PV2
BST
4.7µF
4.7µF
MAX16922
0.1µF
V
V
OUT3
GND1
GND3
OUT3
4.7µF
4.7µH
LX1
V
OUT1
V
OUT2
OUTS1
PV4
10µF
4.7µF
V
OUT1
LSUP
OUT4
GND
OUT4
1µF
20kΩ
4.7µF
GND2
RESET
EP
________________________________________________________________ Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
2.2MHz, Dual, Step-Down DC-DC
Converters, Dual LDOs, and RESET
ABSOLUTE MAXIMUM RATINGS
PV1, EN to GND .....................................................-0.3V to +45V
Junction-to-Case Thermal Resistance (θJC) (Note 1)
LX1 to GND.................................................-0.5V to (PV1 + 0.3V)
LX2 to GND.................................................-0.5V to (PV2 + 0.3V)
BST to LX1.............................................................-0.3V to +6.0V
PV2, PV3, PV4, OUTS1, PWM, RESET to GND_....-0.3V to +6.0V
OUTS2 .......................................................-0.3V to (PV2 + 0.3V)
OUT3 .........................................................-0.3V to (PV3 + 0.3V)
OUT4 .........................................................-0.3V to (PV4 + 0.3V)
LX1 RMS Current .................................................................2.0A
LX2 RMS Current .................................................................1.2A
PGND2 to GND_....................................................-0.3V to +0.3V
LSUP to GND............................................................-0.3V to +6V
OUTS_, OUT_ Output Short-Circuit Duration .............Continuous
20-Pin TQFN-EP .......................................................... 2.7°C/W
20-Pin TSSOP-EP ........................................................... 2°C/W
Junction-to-Ambient Thermal Resistance (θJA) (Note 1)
20-Pin TQFN-EP ........................................................... 32°C/W
20-Pin TSSOP-EP ..................................................... 37.7°C/W
ESD (all pins)................................................................... 2kV
HB
ESD
ESD
ESD
(all pins)................................................................ 200V
(corner pins) ....................................................... 750V
(other pins).......................................................... 500V
MM
CDM
CDM
MAX1692
Operating Temperature Range .........................-40°C to +125°C
Junction Temperature......................................................+150°C
Storage Temperature Range.............................-65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
Soldering Temperature (reflow)
TSSOP...........................................................................+240°C
TQFN.............................................................................+260°C
Continuous Power Dissipation (T = +70°C)
A
20-Pin TQFN-EP (derate 31.3 mW/°C above +70°C)....... 2500mW
20-Pin TSSOP-EP (derate 26.5 mW/°C above +70°C)..... 2122mW
Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer
board. For detailed information on package thermal considerations, refer to www.maxim-ic.com/thermal-tutorial.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(V
= 13.5V, V
= V
= V
, V
= V
; T = T = -40°C to +125°C, unless otherwise noted. Typical values are at
PV1
PV2
PV3
OUT1
PV4
OUT2 A J
T
A
= +25°C under normal conditions, unless otherwise noted.) (Note 2)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
OUT1—SYNCHRONOUS STEP-DOWN DC-DC CONVERTER
(Note 3)
3.7
28
45
Supply-Voltage Range
V
V
V
PV1
Operation < 500ms
V
V
PV1 rising
3.7
3.3
4.0
UVLO,R
PV1 Undervoltage Lockout
PV1 falling
2.85
4.75
UVLO,F
BST Refresh Load Enable
BST Refresh Load Hysteresis
LSUP Regulator Voltage
Supply Current
V
PV1 falling (option enabled)
6.45
0.65
5.0
V
V
BRLE
LSUP
V
6V ≤ V
≤ 28V
5.45
V
PV1
I
EN = low
14
µA
MHz
PV1
PWM Switching Frequency
f
Internally generated
2.0
-3
2.2
2.4
+3
SW
Duty cycle = 20% to 90%;
I
= 300mA to 1.2A
Voltage Accuracy
V
LOAD
%
OUT1
SKIP mode (Note 4)
= 4V, V = 9V, I = 0.2A
LX1
-2
+4
700
2.1
DMOS On-Resistance
Current-Limit Threshold
Soft-Start Ramp Time
Maximum Output Current
V
300
1.75
2.2
mΩ
A
PV1
BST
1.4
1.2
ms
A
I
(V
OUT1
+ 1.0V) ≤ V
≤ 28V
OUT1
PV1
V
= 12V, LX1 = GND or V
= -40°C to +85°C
;
PV1
PV1
LX1 Leakage Current
1
µA
T
A
Maximum Duty Cycle
Minimum Duty Cycle
DC
94
20
%
%
MAX
DC
f
= 2.2MHz
MIN
SW
2
_______________________________________________________________________________________
2.2MHz, Dual, Step-Down DC-DC
Converters, Dual LDOs, and RESET
MAX1692
ELECTRICAL CHARACTERISTICS (continued)
(V
= 13.5V, V
= V
= V
, V
= V
; T = T = -40°C to +125°C, unless otherwise noted. Typical values are at
PV1
PV2
PV3
OUT1
PV4
OUT2 A J
T
A
= +25°C under normal conditions, unless otherwise noted.) (Note 2)
PARAMETER
OUTS1 Discharge Resistance
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
EN = low (or optionally EN = high and
70
Ω
V
< 5.7V)
PV1
OUT2—SYNCHRONOUS STEP-DOWN DC-DC CONVERTER
Supply-Voltage Range
V
Fully operational
2.7
2.0
5.5
2.4
V
PV2
SW
PWM Switching Frequency
f
Internally generated
2.2
MHz
Duty cycle = 20% to 90%;
-3
-2
+3
%
I
= 1mA to 600mA, PWM = high
LOAD
Voltage Accuracy
V
OUT2
SKIP mode (Note 4)
+4
250
350
1.05
%
mΩ
mΩ
A
pMOS On-Resistance
V
V
= 5.0V, I
= 0.2A
= 0.2A
150
200
0.9
50
PV2
PV2
LX2
LX2
nMOS On-Resistance
= 5.0V, I
pMOS Current-Limit Threshold
nMOS Zero-Crossing Threshold
Soft-Start Ramp Time
0.75
600
mA
ms
1.5
Maximum Output Current
I
V
V
+ 0.5V ≤ V ≤ 5.5V
PV2
mA
OUT2
OUT2
= 6V, LX2 = PGND2 or V
;
PV2
PV2
LX2 Leakage Current
Duty-Cycle Range
1
µA
T
= -40°C to +85°C
A
Forced-PWM mode only, minimum duty
cycle in skip mode is 0% (Note 4)
15
100
%
OUTS2 Discharge Resistance
OUT3—LDO REGULATOR
Input Voltage
EN = 0V
70
Ω
V
1.7
-2
5.5
+2
V
PV3
Voltage Accuracy
Load Regulation
Dropout Voltage
V
V
+ 0.4V ≤ V
≤ 5.5V, I = 1mA
LOAD
%
OUT3
OUT3
PV3
I
= 0 to 300mA
= 250mA (Note 4)
-0.2
130
%
LOAD
V
= 1.8V, I
320
mV
PV3
LOAD
Current Limit
450
57
1
mA
dB
kΩ
Power-Supply Rejection Ratio
Shutdown Output Resistance
OUT4—LDO REGULATOR
Input Voltage
I
= 30mA, f = 1kHz
OUT3
EN = low
V
1.7
-2
5.5
+2
V
PV4
Voltage Accuracy
V
(V
+ 0.4V) ≤ V
≤ 5.5V, I = 1mA
LOAD
%
%
OUT4
OUT4
PV4
Load Regulation
I
= 0 to 300mA
-0.2
LOAD
Dropout Voltage
V
= 1.8V, I
= 250mA (Note 4)
130
450
57
320
mV
mA
dB
kΩ
PV4
LOAD
Current Limit
Power-Supply Rejection Ratio
Shutdown Output Resistance
THERMAL OVERLOAD
Thermal-Shutdown Temperature
Thermal-Shutdown Hysteresis
I
= 30mA, f = 1kHz
OUT4
EN = low
1
(Note 4)
150
175
15
°C
°C
_______________________________________________________________________________________
3
2.2MHz, Dual, Step-Down DC-DC
Converters, Dual LDOs, and RESET
ELECTRICAL CHARACTERISTICS (continued)
(V
= 13.5V, V
= V
= V
, V
= V
; T = T = -40°C to +125°C, unless otherwise noted. Typical values are at
PV1
PV2
PV3
OUT1
PV4
OUT2 A J
T
A
= +25°C under normal conditions, unless otherwise noted.) (Note 2)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
RESET
OUT1 OV Threshold
OUT1 Reset Threshold
OUT2 Reset Threshold
110
%
%
%
Reset option 1 (see the Selector Guide)
Reset option 2 (see the Selector Guide)
Percentage of nominal output
85
75
85
90
80
90
95
85
95
MAX1692
Reset timeout option 1 (see the Selector
Guide)
14.9
Reset Timeout Period
ms
Reset timeout option 2 (see the Selector
Guide)
1.9
1
Output-High Leakage Current
Output Low Level
µA
V
Sinking -3mA
EN rising
0.4
2.2
UV Propagation Time
EN LOGIC INPUT
EN Threshold Voltage
EN Threshold Hysteresis
Input Current
28
µs
1.4
1.8
1.8
0.4
0.5
V
V
V
= 5V
µA
EN
PWM LOGIC INPUT
Input High Level
PWM rising
PWM falling
V
V
Input Low Level
0.4
Logic-Input Current
0 ≤ V
≤ 5.5V
1
µA
PWM
Note 2: All units are 100% production tested at T = +25°C. All temperature limits are guaranteed by design.
A
Note 3: Once PVI exceeds undervoltage-lockout rising threshold 4.0V and the device is in regulation.
Note 4: Guaranteed by design. Not product tested.
4
_______________________________________________________________________________________
2.2MHz, Dual, Step-Down DC-DC
Converters, Dual LDOs, and RESET
MAX1692
Typical Operating Characteristics
(V
= 13.5V, V
= V
= V
, V
= V
; T = +25°C, unless otherwise specified.)
A
PV1
PV2
PV3
OUT1 PV4
OUT2
OUT1 EFFICIENCY vs. LOAD CURRENT
OUT2 EFFICIENCY vs. LOAD CURRENT
OUT1 EFFICIENCY vs. LOAD CURRENT
100
90
80
70
60
50
40
30
20
10
0
100
100
PV1 = 13.5V
T
= -40°C
A
90
80
70
60
50
40
30
20
10
0
90
80
70
60
50
PV1 = 8V
T = +25°C
A
PV1 = 13.5V
T
A
= +125°C
T
A
= +25°C
T
A
= +125°C
PV1 = 18V
PV2 = 5V
OUT2 = 2.7V
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2
LOAD CURRENT (A)
0.1
0.2
0.3
0.4
0.5
0.6
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2
LOAD CURRENT (A)
LOAD CURRENT (A)
NORMALIZED OUT1 VOLTAGE
vs. LOAD CURRENT
OUT1 VOLTAGE vs. V
SUPPLY CURRENT vs. TEMPERATURE
PV1
2.0
1.5
5.20
5.15
5.10
5.05
5.00
4.95
4.90
4.85
4.80
1.8
1.7
1.6
1.5
1.4
1.3
1.2
1.1
1.0
I
= 1A
OUT1
NO LOAD
PWM = GND
1.0
0.5
0
-0.5
-1.0
-1.5
-2.0
0
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2
(A)
6
9
12
15
18
-40 -25 -10
5
20 35 50 65 80 95 110 125
TEMPERATURE (°C)
I
VPV1 (V)
PV1
POWER-UP/DOWN AT
THERMAL SHUTDOWN
POWER-UP ENABLE TURNING ON
MAX16922 toc07
MAX16922 toc08
EN
RESET
5V/div
OUT1
10V/div
OUT1
5V/div
5V/div
OUT2
2V/div
OUT2
2V/div
OUT3
2V/div
OUT3
2V/div
OUT4
1V/div
OUT4
1V/div
1ms/div
2ms/div
_______________________________________________________________________________________
5
2.2MHz, Dual, Step-Down DC-DC
Converters, Dual LDOs, and RESET
Typical Operating Characteristics (continued)
(V
= 13.5V, V
= V
= V
, V
= V
; T = +25°C, unless otherwise specified.)
OUT2 A
PV1
PV2
PV3
OUT1 PV4
DROPOUT VOLTAGE
vs. LOAD CURRENT
OUT1 DROPOUT VOLTAGE
vs. TEMPERATURE
SWITCHING FREQUENCY
vs. LOAD CURRENT
1.2
1.1
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
1.4
1.3
1.2
1.1
1.0
0.9
0.8
0.7
I
= 1.2A
OUT1
2.0
OUT1
1.6
1.2
0.8
0.4
0
MAX1692
OUT2
OUT3
0
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2
LOAD CURRENT (A)
-40 -25 -10
5
20 35 50 65 80 95 110 125
0
200
400
600
800 1000 1200
TEMPERATURE (°C)
LOAD CURRENT (mA)
OUT2 DROPOUT VOLTAGE
vs. TEMPERATURE
OUT1 LOAD TRANSITION
MAX16922 toc13
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
I
= 600mA
OUT2
I
OUT1
500mA/div
V
OUT1
AC-COUPLED
50mV/div
20ms/div
-40 -25 -10
5
20 35 50 65 80 95 110 125
TEMPERATURE (°C)
OUT1 LINE TRANSIENT
OUT2 LOAD TRANSIENT
MAX16922 toc15
MAX16922 toc14
I
OUT2
200mA/div
PV1
5V/div
OUT1
AC-COUPLED
20mV/div
V
OUT2
AC-COUPLED
20mV/div
4ms/div
20ms/div
6
_______________________________________________________________________________________
2.2MHz, Dual, Step-Down DC-DC
Converters, Dual LDOs, and RESET
MAX1692
Typical Operating Characteristics (continued)
(V
= 13.5V, V
= V
= V
, V
= V
; T = +25°C, unless otherwise specified.)
OUT2 A
PV1
PV2
PV3
OUT1 PV4
SWITCHING FREQUENCY
vs. TEMPERATURE
POWER-SUPPLY REJECTION RATIO
vs. FREQUENCY
2.30
0
-10
-20
-30
-40
-50
-60
-70
-80
-90
-100
PWM = OUT1
LOAD CURRENT = 100mA
2.28
2.26
2.24
2.22
2.20
2.18
2.16
2.14
2.12
2.10
100mV RIPPLE
P-P
OUT4
OUT3
-40 -25 -10
5
20 35 50 65 80 95 110 125
10
100
1k
10k
100k
TEMPERATURE (°C)
FREQUENCY (Hz)
OUT4 OUTPUT-NOISE DENSITY
vs. FREQUENCY
OUT3 OUTPUT-NOISE DENSITY
vs. FREQUENCY
2000
1800
1600
1400
1200
1000
800
4000
3600
3200
2800
2400
2000
1600
1200
800
R = 100Ω
R = 100Ω
L
L
600
400
200
400
0
0
10
100
1k
10k
100k
10
100
1k
10k
100k
FREQUENCY (Hz)
FREQUENCY (Hz)
_______________________________________________________________________________________
7
2.2MHz, Dual, Step-Down DC-DC
Converters, Dual LDOs, and RESET
Functional Diagram
V
OUT1
LSUP
LINEAR
REGULATOR
20kΩ
1µF
BST
PV1
RESET
MAX1692
POR
GENERATION
V
PV1
4.7µF
GND1
PV3
STEP-DOWN
PWM
OUT1
4.7µH
LDO REG 1: 300mA
LX1
V
OUT1
V
OUT1
3.0V TO 5.5V
1.2A
10µF
4.7µF
PWM
EN
EN
OUTS1
OUT3
GND2
1.0V TO 4.15V
4.7µF
MAX16922
PWM
PV4
MODE
SELECT
PV2
LX2
4.7µF
LDO REG 2: 300mA
V
V
OUT2
STEP-DOWN
PWM
OUT2
2.2µH
4.7µF
4.7µF
V
OUT2
10µF
1.0V TO 3.9V
600mA
EN
OUT4
EN
PGND2
OUTS2
OUT4
1.0V TO 4.15V
PWM
EN
100kΩ
EP
8
_______________________________________________________________________________________
2.2MHz, Dual, Step-Down DC-DC
Converters, Dual LDOs, and RESET
MAX1692
Pin Configurations
TOP VIEW
TOP VIEW
+
GND1
EN
1
2
20 RESET
19 LSUP
18 PV4
BST
3
16
17
18
19
20
10
9
LX2
PV4
LSUP
RESET
GND1
EN
PV1
4
17 OUT4
16 GND2
15 OUT3
14 PV3
PGND2
OUTS2
GND
LX1
5
MAX16922
8
MAX16922
GND3
OUTS1
PWM
GND
6
7
7
EP
6
PWM
+
8
13 PV2
EP
9
12 LX2
OUTS2
10
11 PGND2
THIN QFN
TSSOP
Pin Description
PIN
NAME
FUNCTION
TQFN
TSSOP
1
2
3
4
BST
PV1
Bootstrap Capacitor Input. Connect a 0.1µF ceramic capacitor from BST to LX1.
OUT1 Supply Input. Connect a 4.7µF or larger ceramic capacitor from PV1 to PGND.
Inductor Connection for OUT1. Connect a 4.7µH inductor between LX1 and OUTS1, and a
Schottky diode between LX1 (cathode) and the power-ground plane (anode) as shown in the
Functional Diagram.
3
4
5
6
LX1
GND3
Ground. Connect GND, GND1, GND2, and GND3 together.
OUT1 Voltage-Sensing Input. Connect OUTS1 directly to the OUT1 output voltage and
bypass to power-ground plane with a minimum total capacitance of 15µF. The total
capacitance can include input bypass capacitors cascaded from OUT1, discharged by a
70Ω resistance between OUTS1 and GND3 when disabled.
5
7
OUTS1
PWM Control Input. Connect PWM to OUTS1 to force LX2 to switch every cycle. Connect
PWM to high for forced-PWM operation on OUT2. Connect low for auto-PWM operation to
improve efficiency at light loads.
6
7
8
9
PWM
GND
Ground. Connect GND, GND1, GND2, and GND3 together.
_______________________________________________________________________________________
9
2.2MHz, Dual, Step-Down DC-DC
Converters, Dual LDOs, and RESET
Pin Description (continued)
PIN
NAME
FUNCTION
TQFN
TSSOP
OUT2 Voltage Sense Input. Connect OUTS2 directly to the OUT2 output voltage and
bypass to PGND2 with a minimum total capacitance of 10µF. The total capacitance can
include input bypass capacitors cascaded from OUT2, discharged by a 70Ω resistance
between OUTS2 and PGND2 when disabled.
8
10
OUTS2
9
11
12
13
14
PGND2
LX2
Power Ground for BUCK 2. Connect PGND2 and GND_ together near the device.
MAX1692
Inductor Connection for OUT2. Connect a 2.2µH inductor between LX2 and OUT2 as shown
in the Functional Diagram.
10
11
12
PV2
OUT2 Supply Input. Connect a 4.7µF or larger ceramic capacitor from PV2 to ground.
Linear-Regulator Power Input for OUT3. Bypass PV3 to GND with a minimum 2.2µF ceramic
capacitor.
PV3
Linear-Regulator 1 Output. Bypass OUT3 to GND with a minimum 2.2µF ceramic capacitor
internally discharged by a 1kΩ resistance when disabled.
13
14
15
15
16
17
OUT3
GND2
OUT4
Ground. Connect GND, GND1, GND2, and GND3 together.
Linear-Regulator 2 Output. Bypass OUT4 to GND with a minimum 2.2µF ceramic capacitor.
Internally discharged by a 1kΩ resistance when disabled.
Linear-Regulator Power Input for OUT4. Bypass PV4 to GND with a minimum 2.2µF ceramic
capacitor.
16
17
18
19
PV4
5V Logic Supply to Provide Power to Internal Circuitry. Bypass LSUP to GND1 with a 1µF
ceramic capacitor.
LSUP
Open-Drain Reset Output for the Input Monitoring OUT1 and OUT2. External pullup
required.
18
19
20
20
1
RESET
GND1
EN
Ground. Connect GND, GND1, GND2, and GND3 together.
Active-High Enable Input. Connect EN to PV1 or a logic-high voltage to turn on all
regulators. Pull EN input low to place the regulators in shutdown.
2
Exposed Pad. Connect the exposed pad to ground. Connecting the exposed pad to ground
does not remove the requirement for proper ground connections to PGND2 and GND_. The
exposed pad is attached with epoxy to the substrate of the die, making it an excellent path
to remove heat from the device.
—
—
EP
10 ______________________________________________________________________________________
2.2MHz, Dual, Step-Down DC-DC
Converters, Dual LDOs, and RESET
MAX1692
Dropout
Detailed Description
The high-voltage, step-down converter (OUT1) of the
MAX16922 is designed to operate near 100% duty-
cycle. When the input voltage is close to the output
voltage, the device tries to maintain the high-side
switch on with 100% duty cycle. However, to maintain
proper gate charge, the high-side switch must be
turned off periodically so the LX pin can go to ground
and charge the BST capacitor. As the input voltage
approaches the output voltage, the effective duty cycle
of the n-channel MOSFET approaches 94%. Every 4th
cycle is limited to a maximum duty cycle of 75%
(recharge period is approximately 112ns) while the
remaining cycles can go to 100% duty cycle. As a
result, when the MAX16922 is in dropout, the switching
frequency is reduced by a factor of 4.
The MAX16922 PMIC is designed for medium power
level automotive applications requiring multiple sup-
plies in a small footprint. As shown in the Typical
Applications Circuit, the MAX16922 integrates one
high-voltage power supply and three low-voltage cas-
caded power supplies. OUT1 and OUT2 are step-down
DC-DC converters, and OUT3 and OUT4 are linear reg-
ulators. The device also includes a reset output
(RESET) and a high-voltage compatible enable input
(EN). The operating input voltage range is from 3.5V to
28V and tolerant of transient voltages up to 45V.
OUT1 Step-Down DC-DC Regulator
Step-Down Regulator Architecture
OUT1 is a high-input voltage, high-efficiency 2.2MHz
PWM current-mode step-down DC-DC converter that
delivers up to 1.2A. OUT1 has an internal high-side n-
channel switch and uses a low forward-drop free-
wheeling diode for rectification. Under normal
operating conditions, OUT1 is fixed frequency to pre-
vent unwanted AM radio interference. However, under
light loads and high-input voltage, the step-down regu-
lator skips cycles to maintain regulation. The output
voltage is factory selectable from 3.0V to 5.5V in 50mV
increments.
During dropout conditions under light load, the load
current may not be sufficient to enable the LX pin to
reach ground during the recharge period. To ensure
the LX pin is pulled to ground and proper BST capaci-
tor recharge occurs, an internal load is applied to
OUTS1 when PV1 falls below approximately 6.5V. This
load is approximately 70Ω and is connected between
OUTS1 and GND3 through an internal switch.
OUT2 Step-Down DC-DC Regulator
Step-Down Regulator Architecture
OUT2 is a low-input voltage, high-efficiency 2.2MHz
PWM current-mode step-down DC-DC converter that
outputs up to 600mA. OUT2 has an internal high-side
p-channel switch, and low-side n-channel switch for
synchronous rectification. The DC-DC regulator sup-
ports auto-PWM operation so that under light loads the
device automatically enters high-efficiency skip mode.
The auto-PWM mode can be disabled by connecting
the PWM input to OUTS1. The output voltage is factory
selectable from 1.0V to 3.9V in 50mV increments.
Soft-Start
When initially powered up or enabled with EN, the
OUT1 step-down regulator soft-starts by gradually
ramping up the output voltage for approximately 2.2ms.
This reduces inrush current during startup. During soft-
start the full output current is available. Before a soft-
start sequence begins, the outputs of both DC-DC
regulators discharge below 1.25V through an internal
resistor. See the startup waveforms in the Typical
Operating Characteristics section.
Current Limit
The MAX16922 limits the peak inductor current
sourced by the n-channel MOSFET. When the peak
current limit is reached, the internal n-channel MOSFET
turns off for the remainder of the cycle. If the current
limit is exceeded for 16 consecutive cycles and the
output voltage is less than 1.25V, the n-channel MOS-
FET is turned off for 256 clock cycles to allow the
inductor current to discharge and then initiate a soft-
start sequence for all four outputs.
Soft-Start
OUT2 enters soft-start when OUT1 finishes its soft-start
sequence to prevent high startup current from exceed-
ing the maximum capability of OUT1. The step-down
regulator executes a soft-start by gradually ramping up
the output voltage for approximately 1.5ms. This
reduces inrush current during startup. During soft-start,
the full output current is available. The soft-start
sequence on OUT2 begins after the soft-start sequence
is completed on OUT1. See the startup waveforms in
the Typical Operating Characteristics section.
______________________________________________________________________________________ 11
2.2MHz, Dual, Step-Down DC-DC
Converters, Dual LDOs, and RESET
Current Limit
The MAX16922 limits the peak inductor current sourced
by the p-channel MOSFET. When the peak current limit
is reached, the internal p-channel MOSFET turns off for
the remainder of the cycle. If the current limit is exceed-
ed for 16 consecutive cycles, and the output voltage is
less than 1.25V, the p-channel MOSFET is turned off
and enters output discharge mode for 256 clock
cycles, allowing the inductor current and output voltage
to discharge. Once completed, a soft-start sequence is
initiated on OUT2.
Input Supply and Undervoltage Lockout
An undervoltage-lockout circuit turns off the LDO
regulators when the input supply voltage is too low to
guarantee proper operation. When PV3 falls below
1.25V (typ), OUT3 powers down. When PV4 falls below
1.5V (typ), OUT4 powers down.
Soft-Start
OUT3 enters soft-start when PV3 exceeds 1.25V, and
OUT4 enters soft-start when PV4 exceeds 1.5V. This
staggers the surge current during startup to prevent
excess current draw from OUT1 or OUT2 that could
trigger an overcurrent shutdown. The soft-start time for
each LDO is 0.1ms (typ). See the startup waveforms in
the Typical Operating Characteristics section.
MAX1692
Dropout
As the input voltage approaches the output voltage, the
duty cycle of the p-channel MOSFET reaches 100%. In
this state, the p-channel MOSFET is turned on constant-
ly (not switching), and the dropout voltage is the volt-
age drop due to the output current across the
Current Limit
The OUT3 and OUT4 output current is limited to 450mA
(typ). If the output current exceeds the current limit, the
corresponding LDO output voltage drops out of regula-
tion. Excess power dissipation in the device can cause
the device to turn off due to thermal shutdown.
on-resistance of the internal p-channel MOSFET (R
)
PCH
and the inductor’s DC resistance (R ):
L
V
DO
= I
(R
+ R )
LOAD PCH L
Dropout
The dropout voltage for the linear regulators is 320mV
(max) at 250mA load. To avoid dropout, make sure the
input supply voltage corresponding to OUT3 and OUT4
is greater than the corresponding output voltage plus
the dropout voltage based on the application output
current requirements.
PWM
The MAX16922 operates in either auto-PWM or forced-
PWM modes. At light load, auto-PWM switches only as
needed to supply the load to improve light-load efficiency
of the step-down converter. At higher load currents
(~160mA), the step-down converter transitions to fixed
2.2MHz switching frequency. Forced PWM always oper-
ates with a constant 2.2MHz switching frequency regard-
less of the load. Connect PWM high for forced-PWM
applications or low for auto-PWM applications.
LSUP Linear Regulator
LSUP is the output of a 5V linear regulator that powers
MAX16922 internal circuitry. LSUP is internally powered
from PV1 and automatically powers up when EN is high
and PV1 exceeds approximately 3.7V. LSUP automati-
cally powers down when EN is taken low. Bypass LSUP
to GND with a 1µF ceramic capacitor. LSUP remains on
even during a thermal fault.
LDO Linear Regulators
The MAX16922 contains two low-dropout linear regula-
tors (LDOs), OUT3 and OUT4. The LDO output voltages
are factory preset, and each LDO supplies loads up to
300mA. The LDOs include an internal reference, error
amplifier, p-channel pass transistor, and internal volt-
age-dividers. Each error amplifier compares the refer-
ence voltage to the output voltage (divided by the
internal voltage-divider) and amplifies the difference. If
the divided feedback voltage is lower than the refer-
ence voltage, the pass-transistor gate is pulled lower,
allowing more current to pass to the outputs and
increasing the output voltage. If the divided feedback
voltage is too high, the pass-transistor gate is pulled up,
allowing less current to pass to the output. Each output
voltage is factory selectable from 1.0V to 4.15V in 50mV
increments. If not using one of the LDO outputs, then tie
the associated input power pin (PV_) to ground.
Thermal-Overload Protection
Thermal-overload protection limits the total power dissi-
pation in the MAX16922. Thermal-protection circuits
monitor the die temperature. If the die temperature
exceeds +175°C, the device shuts down, allowing it to
cool. Once the device has cooled by 15°C, the device
is enabled again. This results in a pulsed output during
continuous thermal-overload conditions. The thermal-
overload protection protects the MAX16922 in the event
of fault conditions. For continuous operation, do not
exceed the absolute maximum junction temperature of
+150°C. See the Thermal Considerations section for
more information.
12 ______________________________________________________________________________________
2.2MHz, Dual, Step-Down DC-DC
Converters, Dual LDOs, and RESET
MAX1692
Typical Applications Circuit
VBAT
PV1
EN
OUTS2
LX2
2.2µH
0.1µF
220µF
4.7µF
V
OUT2
10µF
PWM
PV3
V
OUT1
PGND2
4.7µF
PV2
BST
4.7µF
0.1µF
4.7µH
MAX16922
OUT3
GND1
GND3
4.7µF
LX1
V
OUT1
V
OUT2
OUTS1
PV4
10µF
4.7µF
V
OUT1
LSUP
OUT4
GND
1µF
20kΩ
4.7µF
GND2
RESET
EP
or when PV1 falls below 3.0V (typ). When a shutdown
occurs, all outputs discharge through an internal resis-
tor connected between each output and ground. When
enable is high, the die temperature is okay, the LSUP
linear regulator is greater than 2.5V (typ), and OUT1 is
less than 1.25V (typ); a complete soft-start power-on
sequence is reinitiated.
Applications Information
Power-On Sequence
When the EN input is pulled high and PV1 is greater
than 3.7V (typ), the 5V LSUP linear regulator turns on.
Once LSUP exceeds 2.5V, the internal reference and
bias are enabled. When the internal bias has stabilized
OUT1, soft-start is initiated. After completion of soft-start
on OUT1 (2.8ms typ), OUT2 soft-start is initiated. OUT3
soft-start is enabled when PV3 is greater than or equal
to 1.25V (typ), and OUT4 soft-start is enabled when PV4
is greater than or equal to 1.5V (typ).
Inductor Selection
The OUT1 step-down converter operates with a 4.7µH
inductor and the OUT2 step-down converter operates
with a 2.2µH inductor. The inductor’s DC current rating
must be high enough to account for peak ripple current
and load transients. The step-down converter’s archi-
tecture has minimal current overshoot during startup
and load transients. In most cases, an inductor capable
of 1.3 times the maximum load current is acceptable.
Care must be taken when driving the EN pin. Digital
input signals deliver a fast edge that is properly detect-
ed by the MAX16922. If driving the EN pin with an ana-
log voltage that has a slew rate of less than 1V/ms or a
voltage-divider from PV1, then the input voltage on PV1
must always be less than 6V when the voltage at EN is
near the turn-off threshold of 1.6V. If this cannot be
guaranteed, then a 1kΩ resistor or 5.6V zener diode
must be placed in parallel with the LSUP output capaci-
tor to prevent possible damage to the device.
For optimum performance choose an inductor with DC-
series resistance in the 50mΩ to 150mΩ range. For
higher efficiency at heavy loads (above 400mA) and
minimal load regulation, the inductor resistance should
be kept as small as possible. For light-load applications
(up to 200mA), higher resistance is acceptable with
very little impact on performance.
Power-Down and Restart Sequence
The MAX16922 can be shut down by thermal shut-
down, enable low (EN), LSUP regulator undervoltage,
______________________________________________________________________________________ 13
2.2MHz, Dual, Step-Down DC-DC
Converters, Dual LDOs, and RESET
(ESR) of the LDO output capacitors affects stability and
Capacitor Selection
output noise. Use output capacitors with an ESR of
0.1Ω or less to ensure stable operation and optimum
transient response. Connect these capacitors as close
as possible to the device to minimize PCB trace induc-
tance.
Input Capacitors
The input capacitor, CIN1, reduces the current peaks
drawn from the supply and reduces switching noise in
the MAX16922. The impedance of CIN1 at the switch-
ing frequency should be kept very low. Ceramic capac-
itors with X5R or X7R dielectrics are recommended due
to their small size, low ESR, and small temperature
coefficients. Use a 4.7µF ceramic capacitor or an
equivalent amount of multiple capacitors in parallel
between PV1 and ground. Connect CIN1 as close to
the device as possible to minimize the impact of PCB
trace inductance.
Thermal Considerations
The maximum package power dissipation of the
MAX16922 in the 20-pin thin QFN package is 2500mW.
The power dissipated by the MAX16922 should not
exceed this rating. The total device power dissipation is
the sum of the power dissipation of the four regulators:
MAX1692
P = P + P + P + P
D4
D
D1
D2
D3
Connect a minimum 4.7µF ceramic capacitor between
PV2 to ground, and a 2.2µF ceramic capacitor between
PV3 to ground and PV4 to ground. Since PV2 is cas-
caded from OUT1, the input capacitor connected to
PV2 can be used as part of the total output capacitance
for OUT1.
Estimate the OUT1 and OUT2 power dissipations as
follows:
1− η
η
P
= I
× V
×
D1 OUT1
OUT1
1− η
η
P
= I
× V
×
D2 OUT2
OUT2
Step-Down Output Capacitors
The step-down output capacitors are required to keep
the output-voltage ripple small and to ensure regulation
loop stability. These capacitors must have low imped-
ance at the switching frequency. Surface-mount ceram-
ic capacitors are recommended due to their small size
and low ESR. The capacitor should maintain its
capacitance overtemperature and DC bias. Ceramic
capacitors with X5R or X7R temperature characteristics
generally perform well. The output capacitance can be
very low. Place a minimum of 15µF ceramic capaci-
tance from OUTS1 to ground and a minimum of 10µF
from OUTS2 to ground. When the OUT2 output voltage
selection is below 2.35V, the output capacitance should
be increased to prevent instability. For optimum load-
transient performance and very low output ripple, the
output capacitance can be increased. The maximum
output capacitance should not exceed 3.8mF for OUT1
and 2.0mF for OUT2.
where η is the efficiency (see the Typical Operating
Characteristics section).
Calculate the OUT3 and OUT4 power dissipations as
follows:
P
D3
= I
x (V
– V
)
OUT3
PV3
OUT3
P
D4
= I
x (V
– V
)
OUT4
PV4
OUT4
The maximum junction temperature of the MAX16922 is
+150°C. The junction-to-case thermal resistance (θ
of the MAX16922 is 2.7°C/W.
)
JC
When mounted on a single-layer PCB, the junction to
ambient thermal resistance (θ ) is approximately
JA
48°C/W. Mounted on a multilayer PCB, θ is approxi-
JA
mately32°C/W. Calculate the junction temperature of
the MAX16922 as follows:
T = T x P x θ
JA
LDO Output Capacitors and Stability
Connect a 4.7µF ceramic capacitor between OUT3 and
GND, and a second 4.7µF ceramic capacitor from
OUT4 to GND. When the input voltage of an LDO is
greater than 2.35V, the output capacitor can be
decreased to 2.2µF. The equivalent series resistance
J
A
D
where T is the maximum ambient temperature. Make
A
sure the calculated value of T does not exceed the
J
+150°C maximum.
14 ______________________________________________________________________________________
2.2MHz, Dual, Step-Down DC-DC
Converters, Dual LDOs, and RESET
MAX1692
The OUTS_ feedback connections are sensitive to
inductor magnetic field interference so route these
traces away from the inductors and noisy traces such
as LX_.
PCB Layout
High-switching frequencies and relatively large peak
currents make PCB layout a very important aspect of
design. Good design minimizes excessive EMI on the
feedback paths and voltage gradients in the ground
plane, both of which can result in instability or regula-
tion errors. Connect the input capacitors as close as
possible to the PV_ and ground. Connect the inductor
and output capacitors as close as possible to the
device and keep the traces short, direct, and wide to
minimize the current loop area.
Connect GND_ and PGND2 to the ground plane.
Connect the exposed paddle to the ground plane
with multiple vias to help conduct heat away from
the device.
Refer to the MAX16922 evaluation kit for a PCB layout
example.
Selector Guide
MAX16922 ATP
x
/V
/V
+
+
LEAD FREE
AEC Q100 QUALIFIED
OUTPUT VOLTAGES RESET THRESHOLD, RESET TIMEOUT
-40°C TO +125°C OPERATION, TQFN, 20 PINS
MAX16922 AUP
x
LEAD FREE
AEC Q100 QUALIFIED
OUTPUT VOLTAGES RESET THRESHOLD, RESET TIMEOUT
-40°C TO +125°C OPERATION, TSSOP, 20 PINS
BST
REFRESH
LOAD
PART
NUMBER
SUFFIX*
OUT1
VOLTAGE
(V)
OUT2
VOLTAGE
(V)
OUT3
VOLTAGE
(V)
OUT4
VOLTAGE
(V)
OUT1 RESET
THRESHOLD
(%)
RESET
TIMEOUT
(ms)
ENABLE
A
B
C
D
E
5.00
5.00
5.00
3.6
2.70
1.20
3.30
1.2
3.30
1.80
1.20
3.3
1.0
3.3
90
90
90
90
90
90
90
90
14.9
14.9
14.9
14.9
14.9
14.9
14.9
14.9
On
On
On
Off
On
On
On
Off
3.0
3.3
5.00
5.00
3.30
3.30
3.30
1.20
Off
2.50
3.15
2.80
2.50
1.80
3.00
1.80
1.80
F
G
H
1.20
*Other standard versions may be available. Contact factory for availability.
______________________________________________________________________________________ 15
2.2MHz, Dual, Step-Down DC-DC
Converters, Dual LDOs, and RESET
Package Information
Chip Information
For the latest package outline information and land patterns, go
to www.maxim-ic.com/packages. Note that a “+”, “#”, or “-” in
the package code indicates RoHS status only. Package draw-
ings may show a different suffix character, but the drawing per-
tains to the package regardless of RoHS status.
PROCESS: BiCMOS
PACKAGE TYPE PACKAGE CODE DOCUMENT NO.
20 TQFN-EP
20 TSSOP-EP
T2055+4
U20E+1
21-0140
21-0108
MAX1692
16 ______________________________________________________________________________________
2.2MHz, Dual, Step-Down DC-DC
Converters, Dual LDOs, and RESET
MAX1692
Revision History
REVISION
NUMBER
REVISION
DATE
PAGES
DESCRIPTION
CHANGED
0
1
10/09
5/10
Initial release
—
Updated Absolute Maximum Ratings, Electrical Characteristics, Typical
Operating Characteristics, Dropout, and Power-On Sequence sections.
1, 2, 4, 6, 11, 13
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 17
© 2010 Maxim Integrated Products
Maxim is a registered trademark of Maxim Integrated Products, Inc.
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