MAX16977SAUE+T [MAXIM]
Switching Regulator, Current-mode, 2A, 2350kHz Switching Freq-Max, BICMOS, PDSO16,;
| 型号： | MAX16977SAUE+T |
| 厂家： | 
MAXIM INTEGRATED PRODUCTS |
| 描述： | Switching Regulator, Current-mode, 2A, 2350kHz Switching Freq-Max, BICMOS, PDSO16, 信息通信管理 开关 光电二极管 |
| 文件： | 总18页 (文件大小：1086K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
EVALUATION KIT AVAILABLE
MAX16977
36V, 2A, 2.2MHz Step-Down Converter
with Low Operating Current
General Description
Features
The MAX16977 is a 2A, current-mode, step-down con-
verter with an integrated high-side switch. The device is
designed to operate with input voltages from 3.5V to 36V
while using only 30FA quiescent current at no load. The
switching frequency is adjustable from 1MHz to 2.2MHz
by an external resistor and can be synchronized to an
external clock. The output voltage is pin selectable to
be 5V fixed or adjustable from 1V to 10V. The wide input
voltage range along with its ability to operate at high duty
cycle during undervoltage transients make the device
ideal for automotive and industrial applications.
S Wide 3.5V to 36V Input Voltage Range
S 42V Input Transients Tolerance
S High Duty Cycle During Undervoltage Transients
S 5V Fixed or 1V to 10V Adjustable Output Voltage
S Integrated 2A Internal High-Side (70mI typ)
Switch
S Fast Load-Transient Response and Current-Mode
Architecture
S Adjustable Switching Frequency (1MHz to 2.2MHz)
S Frequency Synchronization Input
S 30µA Standby Mode Operating Current
S 5µA Typical Shutdown Current
The device operates in skip mode for reduced current
consumption in light-load applications. Protection features
include overcurrent limit, overvoltage, and thermal shut-
down with automatic recovery. The device also features
a power-good monitor to ease power-supply sequencing.
S Spread Spectrum (Optional)
S Overvoltage, Undervoltage, Overtemperature, and
The device operates over the -40NC to +125NC automo-
tive temperature range, and is available in 16-pin TSSOP
and TQFN (5mm x 5mm) packages with exposed pads.
Short-Circuit Protections
Ordering Information appears at end of data sheet.
Applications
Automotive
For related parts and recommended products to use with this part,
refer to: www.maximintegrated.com/MAX16977.related
Industrial/Military
High-Voltage Input DC-DC Converters
Point-of-Load Applications
Typical Application Circuit
V
BAT
C
47µF
C
IN2
4.7µF
IN1
C
BST
0.1µF
SUP
SUPSW
BST
L1
2.2µH
V
EN
OUT
5V AT 2A
LX
FSYNC
V
C
22µF
OUT
OUT
D1
MAX16977
OUT
COMP
C
COMP1
2.2nF
V
BIAS
R
FOSC
C
COMP2
12pF
12kI
V
BIAS
R
COMP
20kI
FOSC
BIAS
FB
R
PGOOD
10kI
PGOOD
POWER GOOD
C
BIAS
1µF
GND
For pricing, delivery, and ordering information, please contact Maxim Direct
at 1-888-629-4642, or visit Maxim’s website at www.maximintegrated.com.
19-5844; Rev 2; 8/13
MAX16977
36V, 2A, 2.2MHz Step-Down Converter
with Low Operating Current
ABSOLUTE MAXIMUM RATINGS
SUP, SUPSW, LX, EN to GND...............................-0.3V to +42V
SUP to SUPSW.....................................................-0.3V to +0.3V
BST to GND...........................................................-0.3V to +47V
BST to LX ...............................................................-0.3V to +6V
OUT to GND..........................................................-0.3V to +12V
FOSC, COMP, BIAS, FSYNC, I.C., PGOOD,
FB to GND............................................................-0.3V to +6V
LX Continuous RMS Current ...................................................3A
Output Short-Circuit Duration....................................Continuous
Continuous Power Dissipation (T = +70NC)
A
o
o
TSSOP (derate 26.1mW/ C above +70 C).......... 2088.8mW*
o
o
TQFN (derate 28.6mW/ C above +70 C)............ 2285.7mW*
Operating Temperature Range........................ -40NC to +125NC
Junction Temperature .....................................................+150NC
Storage Temperature Range............................ -65NC to +150NC
Lead Temperature (soldering, 10s) ................................+300NC
o
Soldering Temperature (reflow) ..................................... +260 C
*As per the JEDEC 51 standard (multilayer board).
PACKAGE THERMAL CHARACTERISTICS (Note 1)
TSSOP
Junction-to-Ambient Thermal Resistance (B ) .......38.3NC/W
TQFN
Junction-to-Ambient Thermal Resistance (B ) ..........35NC/W
JA
JA
Junction-to-Case Thermal Resistance (B ).................3NC/W
Junction-to-Case Thermal Resistance (B )..............2.7NC/W
JC
JC
Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer
board. For detailed information on package thermal considerations, refer to www.maximintegrated.com/thermal-tutorial.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional opera-
tion of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(V
= V
= 14V, V = 14V, C
= 1FF, R
= 12kI, T = T = -40NC to +125NC, unless otherwise noted. Typical values
FOSC A J
SUP
SUPSW
EN
BIAS
are at T = +25NC.)
A
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
V
,
SUP
Supply Voltage Range
3.5
36
V
V
SUPSW
Load-Dump Event Supply
Voltage
V
t
I
< 1s
42
V
SUP_LD
LD
I
= 1.5A
3.5
30
mA
SUP
LOAD
Standby mode, no load, V
= 5V
60
45
OUT
OUT
Supply Current
I
FA
Standby mode, no load, V
T
= 5V,
SUP_STANDBY
30
= +25°C
A
Shutdown Supply Current
BIAS Regulator Voltage
BIAS Undervoltage Lockout
I
V
V
V
= 0V
5
5
12
5.3
3.3
FA
V
SHDN
EN
V
= V = 6V to 36V
SUPSW
4.7
2.9
BIAS
SUP
BIAS
V
rising
3.1
V
UVBIAS
BIAS Undervoltage-Lockout
Hysteresis
400
+175
15
mV
NC
NC
Thermal Shutdown Threshold
Thermal-Shutdown Threshold
Hysteresis
Maxim Integrated
2
MAX16977
36V, 2A, 2.2MHz Step-Down Converter
with Low Operating Current
ELECTRICAL CHARACTERISTICS (continued)
(V
= V
= 14V, V = 14V, C
= 1FF, R
= 12kI, T = T = -40NC to +125NC, unless otherwise noted. Typical values
FOSC A J
SUP
SUPSW
EN
BIAS
are at T = +25NC.)
A
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
OUTPUT VOLTAGE (OUT)
Output Voltage
V
V
= V , normal operation
BIAS
4.925
4.925
5
5
5.075
5.15
V
V
OUT
FB
Skip-Mode Output Voltage
V
No load, V = V
FB BIAS
OUT_SKIP
Adjustable Output Voltage
Range
V
FB connected to external resistive divider
1
10
V
OUT_ADJ
Load Regulation
Line Regulation
V
V
= V
= V
, 30mA < I < 2A
LOAD
0.5
0.02
1.5
3
%
%/V
mA
A
FB
BIAS
, 6V < V
< 36V
FB
BIAS
SUPSW
BST Input Current
LX Current Limit
Skip-Mode Threshold
Spread Spectrum
I
High-side on, V
(Note 2)
- V = 5V
2.5
4
BST_ON
BST
LX
I
2.4
LX
SKIP_TH
I
300
6
mA
%
Spread spectrum enabled
R
measured between SUPSW and LX,
ON
Power-Switch On-Resistance
R
ON
70
150
1
mI
FA
I
= 1A, V
= 5V
LX
BIAS
High-Side Switch Leakage
Current
V
SUP
= 36V, V = 0V, T = +25°C
LX A
TRANSCONDUCTANCE AMPLIFIER (COMP)
FB Input Current
I
10
nA
V
FB
FB connected to an external resistive
0.99
1.0
1.01
divider; 0°C < T < +125°C
A
FB Regulation Voltage
FB Line Regulation
V
FB
FB connected to an external resistive
0.985
1.0
0.02
900
1.015
divider; -40°C < T < +125°C
A
DV
6V < V
< 36V
%/V
FS
LINE
SUP
Transconductance (from FB to
COMP)
g
V
= 1V, V
= 5V (Note 2)
m
FB
BIAS
Minimum On-Time
t
80
98
99
ns
ON_MIN
f
f
= 2.2MHz
= 1MHz
SW
Maximum Duty Cycle
DC
%
MAX
SW
OSCILLATOR FREQUENCY
Oscillator Frequency
R
= 12kI
2.05
2.20
2.35
1
MHz
FOSC
EXTERNAL CLOCK INPUT (FSYNC)
FSYNC Input Current
FA
T
A
at +25°C
External Input Clock Acquisition
Time
t
1
Cycles
FSYNC
f
+
OSC
10%
External Input Clock Frequency
(Note 2)
Hz
V
External Input Clock
V
V
rising
FSYNC
1.4
FSYNC_HI
High Threshold
Maxim Integrated
3
MAX16977
36V, 2A, 2.2MHz Step-Down Converter
with Low Operating Current
ELECTRICAL CHARACTERISTICS (continued)
(V
= V
= 14V, V = 14V, C
= 1FF, R
= 12kI, T = T = -40NC to +125NC, unless otherwise noted. Typical values
FOSC A J
SUP
SUPSW
EN
BIAS
are at T = +25NC.)
A
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
V
External Input Clock
Low Threshold
V
V
falling
FSYNC
0.4
FSYNC_LO
Soft-Start Time
t
8.5
ms
SS
ENABLE INPUT (EN)
Enable Input-High Threshold
Enable Input-Low Threshold
V
2
V
V
EN_HI
V
0.9
EN_LO
Enable Threshold Voltage
Hysteresis
V
0.2
V
EN,HYS
Enable Input Current
I
T
= +25NC
A
1
FA
EN
RESET
Output Overvoltage Trip
Threshold
V
105
110
115
%V
%V
OUT_OV
FB
93
90
10
95
92.5
35
97
95
60
0.4
1
V
V
rising, V
= high
VTH_RISING
FB
PGOOD
PGOOD Switching Level
FB
V
falling, V
= low
TH_FALLING
FB
PGOOD
Fs
PGOOD Debounce
I
= 5mA
V
PGOOD Output Low Voltage
PGOOD Leakage Current
SINK
V
in regulation, T = +25NC
FA
OUT
A
Note 2: Guaranteed by design; not production tested.
Maxim Integrated
4
MAX16977
36V, 2A, 2.2MHz Step-Down Converter
with Low Operating Current
Typical Operating Characteristics
(V
= V
= 14V, V = 14V, V
= 5V, V
= 0V, R
= 12.1kHz, T = +25NC, unless otherwise noted.)
SUP
SUPSW
EN
OUT
FSYNC
FOSC
A
NO-LOAD STARTUP BEHAVIOR
(5V/2.2MHz)
FULL-LOAD STARTUP BEHAVIOR
MAX16977 toc01
MAX16977 toc02
5V/2.2MHz
RESISTIVE LOAD = 2.5Ω
5V/div
SUP SHORTED TO SUPSW
5V/div
V
IN
V
IN
0V
0V
2V/div
2V/div
V
OUT
V
OUT
0V
0V
1A/div
0A
5V/div
0V
I
LOAD
10V/div
0V
V
PGOOD
V
PGOOD
2ms/div
2ms/div
EFFICIENCY vs. LOAD CURRENT
SUPPLY CURRENT vs. SUPPLY VOLTAGE
(5V/2.2MHz)
EFFICIENCY vs. LOAD CURRENT
(V = 14V)
IN
(V = 14V)
IN
100
95
90
85
80
75
70
65
60
55
50
120
110
100
90
80
70
60
50
40
30
20
10
0
100
90
80
70
60
50
40
30
20
10
0
8V
D1: B360B-13-F FROM DIODES, INC.
L1: WURTH 744311220
3.3V
5V
3.3V
8V
5V
f
= 2.2MHz
L1 = 2.2µH (WURTH 744311220)
SW
I
+ I
SUP SUPSW
D1: D360B-13-F FROM DIODES, INC.
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0
5.5 9.0 12.5 16.0 19.5 23.0 26.5 30.0 33.5
SUPPLY VOLTAGE (V)
0
0.0001
0.001
0.01
0.1
I
(A)
LOAD CURRENT (A)
LOAD
SWITCHING FREQUENCY vs. LOAD CURRENT
(5V/2.2MHz)
SWITCHING FREQUENCY vs. R
FOSC
3.0
2.5
2.0
1.5
1.0
0.5
0
3.0
V
IN
= 14V
2.5
2.0
1.5
1.0
0.5
0
V
= 14V
IN
I
= 1.5A
LOAD
12
15
18
(kI)
21
24
0
0.5
1.0
1.5
2.0
R
I
(A)
FOSC
LOAD
Maxim Integrated
5
MAX16977
36V, 2A, 2.2MHz Step-Down Converter
with Low Operating Current
Typical Operating Characteristics (continued)
(V
= V
= 14V, V = 14V, V
= 5V, V
= 0V, R
= 12.1kHz, T = +25NC, unless otherwise noted.)
SUP
SUPSW
EN
OUT
FSYNC
FOSC
A
LOAD-TRANSIENT RESPONSE
LINE-TRANSIENT RESPONSE
(5V/2.2MHz)
(SKIP MODE)
MAX16977 toc08
MAX16977 toc09
5V/2.2MHz
V
OUT
V
OUT
100mV/div
50mV/div
(AC-COUPLED)
AC-COUPLED
100mA/div
0
1A/div
0A
I
500mA
I
LOAD
LOAD
100µs/div
100µs/div
FSYNC TRANSITION FROM INTERNAL TO EXTERNAL FREQUENCY
UNDERVOLTAGE PULSE
(5V/2.2MHz)
(3.3V/2.2MHz CONFIGURATION)
MAX16977 toc11
MAX16977 toc10
f
= 2.475MHz
FSYNC
V
5V/div
IN
5V/div
0V
3.5V
RESISTIVE LOAD = 2.5Ω
0V
V
LX
V
OUT
5V/div
0V
20V/div
0V
V
LX
2V/div
0V
V
FSYNC
V
BIAS
5V/div
0V
10ms/div
200ns/div
OUTPUT RESPONSE TO SLOW INPUT RAMP
(I = 2A)
LOAD DUMP TEST
LOAD
MAX16977 toc13
MAX16977 toc12
5V/2.2MHz
42V
10V/div
0V
V
IN
V
IN
10V/div
0V
5V/div
0V
14V
V
OUT
10V/div
0V
V
V
OUT
LX
5V/div
0V
2A/div
0A
5V/2.2MHz
I
LOAD
4s/div
100ms/div
Maxim Integrated
6
MAX16977
36V, 2A, 2.2MHz Step-Down Converter
with Low Operating Current
Typical Operating Characteristics (continued)
(V
= V
= 14V, V = 14V, V
= 5V, V
= 0V, R
= 12.1kHz, T = +25NC, unless otherwise noted.)
SUP
SUPSW
EN
OUT
FSYNC
FOSC A
SHORT CIRCUIT TO GROUND TEST
(5V/2.2MHz)
V
LOAD REGULATION
(5V/2.2MHz)
OUT
MAX16977 toc14
5.10
5.08
5.06
5.04
5.02
5.00
4.98
4.96
4.94
4.92
4.90
V
= 14V
IN
2V/div
V
OUT
0V
5V/div
0V
V
PGOOD
10A/div
0A
I
LX
10ms/div
0
6
0
0.4
0.8
1.2
(A)
1.6
2.0
I
LOAD
V
vs. TEMPERATURE
(5V/2.2MHz)
V
LINE REGULATION
(5V/2.2MHz)
OUT
OUT
5.10
5.08
5.06
5.04
5.02
5.00
4.98
4.96
4.94
4.92
4.90
5.10
5.08
5.06
5.04
5.02
5.00
4.98
4.96
4.94
4.92
4.90
I
= 2A
V
= 14V
LOAD
IN
I
= 3A
I
= 0A
LOAD
LOAD
8
10
12
14
16
18
-40 -25 -10
5
20 35 50 65 80 95 110 125
SUPPLY VOLTAGE (V)
TEMPERATURE (°C)
V
LINE REGULATION
(5V/2.2MHz)
BIAS LOAD REGULATION
(5V/2.2MHz)
OUT
5.10
5.08
5.06
5.04
5.02
5.00
4.98
4.96
4.94
4.92
4.90
5.10
5.08
5.06
5.04
5.02
5.00
4.98
4.96
4.94
4.92
4.90
I
= 0A
LOAD
T = -40°C
A
T = +125°C T = +25°C
A
A
0
6
12
18
24
30
36
2
4
6
8
10 12 14 16 18 20
(mA)
SUPPLY VOLTAGE (V)
I
BIAS
Maxim Integrated
7
MAX16977
36V, 2A, 2.2MHz Step-Down Converter
with Low Operating Current
Typical Operating Characteristics (continued)
(V
= V
= 14V, V = 14V, V
= 5V, V
= 0V, R
= 12.1kHz, T = +25NC, unless otherwise noted.)
SUP
SUPSW
EN
OUT
FSYNC
FOSC A
I
vs. SUPPLY VOLTAGE
I
vs. TEMPERATURE
SHDN
SHDN
20
18
16
14
12
10
8
6.0
5.8
5.6
5.4
5.2
5.0
4.8
4.6
4.4
4.2
4.0
V
= 0V
EN
V
EN
V
IN
= 0V
= 14V
T = +125°C
A
T = +25°C
A
6
T = -40°C
A
4
2
0
3
10
17
24
31
38
45
-40 -25 -10
5
20 35 50 65 80 95 110 125
TEMPERATURE (°C)
SUPPLY VOLTAGE (V)
LINE-TRANSIENT RESPONSE
DIPS AND DROP TEST
(I
LOAD
= 2A)
MAX16977 toc22
MAX16977 toc23
5V/2.2MHz
14V
V
IN
10V/div
0V
5V
5V/2.2MHz
V
5V/div
0V
IN
V
OUT
5V/div
0V
V
5V/div
0V
20V/div
0V
OUT
10V/div
0V
V
LX
V
LX
V
PGOOD
5V/div
0V
5V/div
0V
V
PGOOD
10ms/div
10ms/div
Maxim Integrated
8
MAX16977
36V, 2A, 2.2MHz Step-Down Converter
with Low Operating Current
Pin Configurations
TOP VIEW
TOP VIEW
12
11
10
9
16 15 14 13 12 11 10
9
SUP
8
7
6
5
EN 13
I.C. 14
BST
MAX16977
MAX16977
FSYNC
GND
BIAS
15
16
EP
FOSC
EP
4
+
+
1
2
3
4
5
6
7
8
1
2
3
TQFN
(5mm × 5mm)
TSSOP
Pin Descriptions
PIN
NAME
FSYNC
FOSC
FUNCTION
TSSOP
TQFN
Synchronization Input. The device synchronizes to an external signal applied to FSYNC.
The external clock frequency must be 10% greater than the internal clock frequency for
proper operation. Connect FSYNC to GND if the internal clock is used.
1
15
Resistor-Programmable Switching-Frequency Setting Control Input. Connect a resistor
from FOSC to GND to set the switching frequency.
2
3
4
5
6
16
1
Open-Drain, Active-Low Output. PGOOD asserts when V
is below the 92.5% regula-
OUT
PGOOD
OUT
tion point. PGOOD deasserts when V
is above the 95% regulation point.
OUT
Switch Regulator Output. OUT also provides power to the internal circuitry when the out-
put voltage of the converter is set between 3V and 5V during standby mode.
2
Feedback Input. Connect an external resistive divider from OUT to FB and GND to set
the output voltage. Connect to BIAS to set the output voltage to 5V.
3
FB
Error-Amplifier Output. Connect an RC network from COMP to GND for stable operation.
See the Compensation Network section for more details.
4
COMP
Linear-Regulator Output. BIAS powers up the internal circuitry. Bypass with a 1FF
capacitor to ground.
7
8
9
5
6
7
BIAS
GND
BST
Ground
High-Side Driver Supply. Connect a 0.1FF capacitor between LX and BST for proper
operation.
Maxim Integrated
9
MAX16977
36V, 2A, 2.2MHz Step-Down Converter
with Low Operating Current
Pin Descriptions (continued)
PIN
NAME
FUNCTION
TSSOP
10
TQFN
8
Voltage Supply Input. SUP powers up the internal linear regulator. Connect a 1FF
SUP
LX
capacitor to ground.
11, 12
13, 14
9, 10
11, 12
Inductor Switching Node. Connect a Schottky diode between LX and GND.
Internal High-Side Switch-Supply Input. SUPSW provides power to the internal switch.
Connect a 1FF and 4.7FF capacitor to ground.
SUPSW
SUP Voltage-Compatible Enable Input. Drive EN low to disable the device. Drive EN
high to enable the device.
15
16
13
14
EN
I.C.
Internally Connected. Connect to ground for proper operation.
Exposed Pad. Connect EP to a large-area contiguous copper ground plane for effective
power dissipation. Do not use as the only IC ground connection. EP must be connected
to GND.
—
—
EP
Internal Block Diagram
OUT
COMP
PGOOD
EN
SUP
BIAS
FB
FBSW
FBOK
AON
HVLDO
SWITCH-
OVER
BST
SUPSW
EAMP
PWM
LOGIC
HSD
REF
LX
CS
SOFT-
START
SLOPE
COMP
MAX16977
OSC
FSYNC FOSC
Maxim Integrated
10
MAX16977
36V, 2A, 2.2MHz Step-Down Converter
with Low Operating Current
needs to maintain a well-regulated output voltage using
an input voltage that varies from 9V to 18V. Additionally,
Detailed Description
the device incorporates an innovative design for fast-loop
response that further ensures good output-voltage regu-
lation during transients.
The MAX16977 is a constant-frequency, current-mode,
automotive buck converter with an integrated high-side
switch. The device operates with input voltages from
3.5V to 36V and tolerates input transients up to 42V.
During undervoltage events, such as cold-crank condi-
tions, the internal pass device maintains 98% duty cycle.
System Enable (EN)
An enable-control input (EN) activates the device from its
low-power shutdown mode. EN is compatible with inputs
from automotive battery level down to 3.3V. The high-
voltage compatibility allows EN to be connected to SUP,
KEY/KL30, or the INH pin of a CAN transceiver.
The switching frequency is resistor programmable from
1MHz to 2.2MHz to allow optimization for efficiency, noise,
and board space. A synchronization input, FSYNC, allows
the device to synchronize to an external clock frequency.
EN turns on the internal regulator. Once V
is above
BIAS
During light-load conditions, the device enters skip mode
for high efficiency. The 5V fixed output voltage eliminates
the need for external resistors and reduces the supply
current to 30FA. See the Internal Block Diagram for more
information.
the internal lockout threshold, V
= 3.1V (typ), the con-
UVL
verter activates and the output voltage ramps up within
8.5ms.
A logic-low at EN shuts down the device. During shut-
down, the internal linear regulator and gate drivers turn
off. Shutdown is the lowest power state and reduces the
quiescent current to 5FA (typ). Drive EN high to bring the
device out of shutdown.
Wide Input Voltage Range (3.5V to 36V)
The device includes two separate supply inputs, SUP
and SUPSW, specified for a wide 3.5V to 36V input volt-
age range. V
provides power to the device, and
SUP
Overvoltage Protection
The device includes overvoltage protection circuitry that
protects the device when there is an overvoltage condi-
tion at the output. If the output voltage increases by more
than 110% of its set voltage, the device stops switching.
The device resumes regulation once the overvoltage
condition is removed.
V
provides power to the internal switch. When
SUPSW
the device is operating with a 3.5V input supply, certain
conditions such as cold crank can cause the voltage at
SUPSW to drop below the programmed output voltage.
As such, the device operates in a high duty-cycle mode
to maintain output regulation.
Linear-Regulator Output (BIAS)
The device includes a 5V linear regulator, BIAS, that
provides power to the internal circuitry. Connect a 1FF
ceramic capacitor from BIAS to GND.
Fast Load-Transient Response
Current-mode buck converters include an integrator
architecture and a load-line architecture. The integra-
tor architecture has large loop gain but slow transient
response. The load-line architecture has fast transient
response but low loop gain. The device features an
integrator architecture with innovative design to improve
transient response. Thus, the device delivers high output-
voltage accuracy, plus the output can recover quickly
from a transient overshoot, which could damage other
on-board components during load transients.
External Clock Input (FSYNC)
The device synchronizes to an external clock signal
applied at FSYNC. The signal at FSYNC must have a
10% higher frequency than the internal clock frequency
for proper synchronization.
Soft-Start
The device includes an 8.5ms fixed soft-start time for up
to 500FF capacitive load with a 2A resistive load.
Overload Protection
The overload protection circuitry is triggered when the
Minimum On-Time
The device features a 80ns minimum on-time that ensures
proper operation at 2.2MHz switching frequency and high
differential voltage between the input and the output. This
feature is extremely beneficial in automotive applications
where the board space is limited and the converter
device is in current limit and V
is below the reset
OUT
threshold. Under these conditions the device turns off
the high-side switch for 16ms and re-enters soft-start. If
the overload condition is still present, the device repeats
the cycle.
Maxim Integrated
11
MAX16977
36V, 2A, 2.2MHz Step-Down Converter
with Low Operating Current
up from the base 2.2MHz frequency. The modulation sig-
nal is a triangular wave with a period of 400μs. Therefore,
fOSC ramps up 6% in 200μs and then ramps down 6%
and back to 2.2MHz in 200μs. The cycle repeats. The
400μs modulation period is fixed for other fOSC frequen-
cy. The internal spread spectrum is disabled if the IC is
synced to an external clock. However, the IC accepts an
external spread-spectrum clock.
Skip Mode/Standby Mode
During light-load operation, I P 185mA, the
INDUCTOR
device enters skip mode operation. Skip mode turns off
the majority of circuitry and allows the output to drop
below regulation voltage before the switch is turned on
again. The lower the load current, the longer it takes for
the regulator to initiate a new cycle. Because the con-
verter skips unnecessary cycles and turns off the majority
of circuitry, the converter efficiency increases. When the
high-side FET stops switching for more than 50Fs, most
of the internal circuitry, including LDO, draws power from
Overtemperature Protection
Thermal-overload protection limits the total power dissipa-
tion in the device. When the junction temperature exceeds
+175NC (typ), an internal thermal sensor shuts down the
internal bias regulator and the step-down converter, allow-
ing the IC to cool. The thermal sensor turns on the IC again
after the junction temperature cools by 15NC.
V
(for V
= 3V to 5.5V), allowing current consump-
OUT
OUT
tion from the battery to drop to only 30FA.
Spread Spectrum
The IC has an internal speread-spectrum option to
optimize EMI performance. This is factory set and the
S-version of the IC should be ordered. For spread-spec-
trum-enabled ICs, the operating frequency is varied ±6%
Applications Information
Setting the Output Voltage
Connect FB to BIAS for a fixed 5V output voltage. To set
the output to other voltages between 1V and 10V, con-
nect a resistive divider from output (OUT) to FB to GND
V
OUT
R
R
FB1
FB2
MAX16977
(Figure 1). Calculate R
following equation:
(OUT to FB resistor) with the
FB1
FB
V
OUT
R
= R
−1
FB2
FB1
V
FB
where V = 1V (see the Electrical Characteristics table).
FB
Figure 1. Adjustable Output-Voltage Setting
Internal Oscillator
The switching frequency, f , is set by a resistor (R
)
SW
FOSC
connected from FOSC to GND. See Figure 2 to select the
correct R value for the desired switching frequency.
SWITCHING FREQUENCY vs. R
FOSC
3.0
2.5
2.0
1.5
1.0
0.5
0
FOSC
For example, a 2.2MHz switching frequency is set with
= 12kI. Higher frequencies allow designs with
R
FOSC
lower inductor values and less output capacitance.
Consequently, peak currents and I2R losses are lower
at higher switching frequencies, but core losses, gate
charge currents, and switching losses increase.
Inductor Selection
Three key inductor parameters must be specified for
operation with the device: inductance value (L), inductor
V
I
= 14V
IN
= 1.5A
LOAD
saturation current (I ), and DC resistance (R ). To
SAT DCR
12
15
18
(kI)
21
24
select inductance value, the ratio of inductor peak-to-
peak AC current to DC average current (LIR) must be
selected first. A good compromise between size and loss
is a 30% peak-to-peak ripple current to average-current
R
FOSC
Figure 2. Switching Frequency vs. R
FOSC
Maxim Integrated
12
MAX16977
36V, 2A, 2.2MHz Step-Down Converter
with Low Operating Current
ratio (LIR = 0.3). The switching frequency, input voltage,
output voltage, and selected LIR then determine the
inductor value as follows:
Table 1. Inductor Size Comparison
INDUCTOR SIZE
SMALLER
Lower price
LARGER
V
(V
− V
)
OUT SUP
OUT
LIR
Smaller ripple
Higher efficiency
L =
V
f
I
SUP SW OUT
Smaller form factor
Larger fixed-frequency
range in skip mode
where V
, V
, and I
are typical values (so that
OUT
Faster load response
SUP OUT
efficiency is optimum for typical conditions). The switch-
ing frequency is set by R (see the Internal Oscillator
FOSC
section). The exact inductor value is not critical and can
be adjusted to make trade-offs among size, cost, efficien-
cy, and transient response requirements. Table 1 shows
a comparison between small and large inductor sizes.
The input capacitor RMS current requirement (I
defined by the following equation:
) is
RMS
V
(V
− V
)
OUT SUP
OUT
I
= I
RMS LOAD(MAX)
The inductor value must be chosen so that the maximum
inductor current does not reach the device’s minimum
current limit. The optimum operating point is usually
found between 25% and 35% ripple current. When pulse
skipping (FSYNC low and light loads), the inductor value
also determines the load-current value at which PFM/
PWM switchover occurs.
V
SUP
I
has a maximum value when the input voltage
RMS
equals twice the output voltage (V
I
= 2V
), so
SUP
OUT
= I
/2.
RMS(MAX)
LOAD(MAX)
Choose an input capacitor that exhibits less than 10NC
self-heating temperature rise at the RMS input current for
optimal long-term reliability.
Find a low-loss inductor having the lowest possible
DC resistance that fits in the allotted dimensions. Most
inductor manufacturers provide inductors in standard
values, such as 1.0FH, 1.5FH, 2.2FH, 3.3FH, etc. Also
look for nonstandard values, which can provide a bet-
ter compromise in LIR across the input voltage range. If
using a swinging inductor (where the no-load inductance
decreases linearly with increasing current), evaluate
the LIR with properly scaled inductance values. For
the selected inductance value, the actual peak-to-peak
The input-voltage ripple is composed of DV (caused
Q
by the capacitor discharge) and DV
(caused by the
ESR
equivalent series resistance (ESR) of the capacitor). Use
low-ESR ceramic capacitors with high ripple-current
capability at the input. Assume the contribution from the
ESR and capacitor discharge equal to 50%. Calculate
the input capacitance and ESR required for a specified
input-voltage ripple using the following equations:
∆V
ESR
inductor ripple current (DI
) is defined by:
INDUCTOR
ESR
=
IN
∆I
L
I
+
OUT
V
(V
− V
)
2
OUT SUP
OUT
∆I
=
INDUCTOR
V
× f
×L
where
and
SUP SW
(V
− V
)× V
×L
SUP
V
OUT OUT
× f
∆I
=
where DI
is in A, L is in H, and f
is in Hz.
L
INDUCTOR
SW
SUP SW
Ferrite cores are often the best choices, although pow-
dered iron is inexpensive and can work well at 200kHz.
The core must be large enough not to saturate at the
I
×D(1− D)
V
OUT
OUT
C
=
and D =
IN
peak inductor current (I
):
PEAK
+
LOAD(MAX)
∆V × f
V
Q
SW
SUPSW
∆I
INDUCTOR
2
I
= I
where I
duty cycle.
is the maximum output current, and D is the
PEAK
OUT
Input Capacitor
Output Capacitor
The input filter capacitor reduces peak currents drawn
from the power source and reduces noise and voltage
ripple on the input caused by the circuit’s switching.
The output filter capacitor must have low enough ESR to
meet output ripple and load-transient requirements, yet
have high enough ESR to satisfy stability requirements.
Maxim Integrated
13
MAX16977
36V, 2A, 2.2MHz Step-Down Converter
with Low Operating Current
The output capacitance must be high enough to absorb
Compensation Network
The device uses an internal transconductance error
amplifier with its inverting input and its output available
to the user for external frequency compensation. The
output capacitor and compensation network determine
the loop stability. The inductor and the output capaci-
tor are chosen based on performance, size, and cost.
Additionally, the compensation network optimizes the
control-loop stability.
the inductor energy while transitioning from full-load
to no-load conditions without tripping the overvoltage
fault protection. When using high-capacitance, low-ESR
capacitors, the filter capacitor’s ESR dominates the
output-voltage ripple. So the size of the output capaci-
tor depends on the maximum ESR required to meet the
output-voltage ripple (V
) specifications:
RIPPLE(P-P)
V
= ESR × I
× LIR
RIPPLE(P-P)
LOAD(MAX)
The controller uses a current-mode control scheme that
regulates the output voltage by forcing the required current
through the external inductor. The device uses the volt-
age drop across the high-side MOSFET to sense inductor
current. Current-mode control eliminates the double pole
in the feedback loop caused by the inductor and output
capacitor, resulting in a smaller phase shift and requiring
less elaborate error-amplifier compensation than voltage-
The actual capacitance value required relates to the
physical size needed to achieve low ESR, as well as
to the chemistry of the capacitor technology. Thus, the
capacitor is usually selected by ESR and voltage rating
rather than by capacitance value.
When using low-capacity filter capacitors, such as
ceramic capacitors, size is usually determined by the
capacity needed to prevent voltage droop and volt-
age rise from causing problems during load transients.
Generally, once enough capacitance is added to meet
the overshoot requirement, undershoot at the rising load
edge is no longer a problem. However, low-capacity filter
capacitors typically have high-ESR zeros that can affect
the overall stability.
mode control. Only a simple single-series resistor (R )
C
and capacitor (C ) are required to have a stable, high-
C
bandwidth loop in applications where ceramic capacitors
are used for output filtering (Figure 3). For other types of
capacitors, due to the higher capacitance and ESR, the
frequency of the zero created by the capacitance and
ESR is lower than the desired closed-loop crossover fre-
quency. To stabilize a nonceramic output capacitor loop,
Rectifier Selection
The device requires an external Schottky diode recti-
fier as a freewheeling diode. Connect this rectifier close
to the device using short leads and short PCB traces.
Choose a rectifier with a voltage rating greater than the
add another compensation capacitor (C ) from COMP to
F
GND to cancel this ESR zero.
The basic regulator loop is modeled as a power modula-
tor, output feedback divider, and an error amplifier. The
maximum expected input voltage, V
. Use a low
SUPSW
power modulator has a DC gain set by g
x R
, the output
,
mc
LOAD
forward-voltage-drop Schottky rectifier to limit the nega-
tive voltage at LX. Avoid higher than necessary reverse-
voltage Schottky rectifiers that have higher forward-
voltage drops.
with a pole and zero pair set by R
capacitor (C
LOAD
), and its ESR. The following equations
OUT
allow to approximate the value for the gain of the power
modulator (GAIN ), neglecting the effect of the
MOD(DC)
ramp stabilization. Ramp stabilization is necessary when
the duty cycle is above 50% and is internally done for
the device.
V
OUT
R1
R2
GAIN
= g
× R
mc LOAD
MOD(DC)
COMP
g
m
where R
= V
/I
in I and g
= 3S.
LOAD
OUT LOUT(MAX)
mc
V
REF
R
C
C
F
C
C
Figure 3. Compensation Network
Maxim Integrated
14
MAX16977
36V, 2A, 2.2MHz Step-Down Converter
with Low Operating Current
In a current-mode step-down converter, the output
capacitor, its ESR, and the load resistance introduce a
pole at the following frequency:
The total loop gain as the product of the modulator gain,
the feedback voltage-divider gain, and the error-amplifier
gain at f should be equal to 1. So:
C
V
FB
GAIN
×
× GAIN
=1
EA(fC)
1
MOD(fC)
V
f
=
pMOD
OUT
2π × C
× R
LOAD
OUT
For the case where f
is greater than f :
C
zMOD
The output capacitor and its ESR also introduce a zero at:
1
GAIN
= g
× R
EA(fC)
m,EA C
f
pMOD
f
=
GAIN
= GAIN
×
MOD(DC)
zMOD
MOD(fC)
2π ×ESR× C
f
OUT
C
Therefore:
GAIN
When C
in parallel, the resulting C
ESR = ESR
is composed of “n” identical capacitors
OUT
V
FB
= n x C
and
OUT
OUT(EACH)
×
×g
×R =1
m,EA C
MOD(fC)
V
/n. Note that the capacitor zero for a
(EACH)
OUT
parallel combination of alike capacitors is the same as
for an individual capacitor.
Solving for R :
C
V
OUT
R
C
=
The feedback voltage-divider has a gain of GAIN
=
FB
g
× V × GAIN
FB MOD(fC)
m,EA
V
/V
, where V is 1V (typ).
FB OUT FB
The transconductance error amplifier has a DC gain of
GAIN = g x R , where g is the
Set the error-amplifier compensation zero formed by R
C
C
and C (f
as follows:
) at the f
. Calculate the value of C
EA(DC)
m,EA
OUT,EA
m,EA
C
zEA
pMOD
error-amplifier transconductance, which is 900FS (typ),
and R is the output resistance of the error amplifier.
1
OUT,EA
C
=
C
2π × f
×R
C
A dominant pole (f
) is set by the compensa-
pMOD
dpEA
tion capacitor (C ) and the amplifier output resistance
C
If f
is less than 5 x f , add a second capacitor,
C
zMOD
(R
). A zero (f
) is set by the compensation
OUT,EA
zEA
C , from COMP to GND and set the compensation pole
F
resistor (R ) and the compensation capacitor (C ).
C
C
formed by R and C (f
) at the f
pEA
. Calculate the
zMOD
C
F
There is an optional pole (f
) set by C and R to
pEA
F C
value of C as follows:
F
cancel the output capacitor ESR zero if it occurs near
1
the crossover frequency (f , where the loop gain equals
C
=
C
F
2π × f
×R
1 (0dB)). Thus:
1
zMOD
C
f
=
As the load current decreases, the modulator pole
also decreases; however, the modulator gain increases
accordingly and the crossover frequency remains the
same.
pdEA
2π × C × (R
+ R )
C
C
OUT,EA
1
f
=
=
zEA
2π × C ×R
C
C
For the case where f
is less than f :
C
zMOD
1
The power-modulator gain at f is:
C
f
pEA
2π × C ×R
f
F
C
pMOD
GAIN
= GAIN
×
MOD(DC)
MOD(fC)
f
zMOD
The loop-gain crossover frequency (f ) should be set
C
below 1/5th of the switching frequency and much higher
The error-amplifier gain at f is:
C
than the power-modulator pole (f
):
pMOD
f
zMOD
GAIN
= g
×R ×
m,EA C
f
EA(fC)
SW
5
f
f
<< f ≤
C
C
pMOD
Maxim Integrated
15
MAX16977
36V, 2A, 2.2MHz Step-Down Converter
with Low Operating Current
Therefore:
GAIN
have adequate cooling. The bottom pad of the device
must be soldered down to this copper plane for effec-
tive heat dissipation and for getting the full power out
of the IC. Use multiple vias or a single large via in this
plane for heat dissipation.
V
f
zMOD
FB
×
×g
×R ×
C
=1
MOD(fC)
m,EA
V
f
OUT
C
Solving for R :
C
2) Isolate the power components and high-current path
from the sensitive analog circuitry. This is essential to
prevent any noise coupling into the analog signals.
V
× f
C
OUT
R
=
C
g
× V × GAIN × f
MOD(fC) zMOD
m,EA
FB
3) Keep the high-current paths short, especially at the
ground terminals. This practice is essential for stable,
jitter-free operation. The high-current path composed
of input capacitor, high-side FET, inductor, and the
output capacitor should be as short as possible.
Set the error-amplifier compensation zero formed by R
C
and C at the f
(f
= f
)
C
pMOD zEA
pMOD
1
C
=
C
2π × f
×R
C
pMOD
4) Keep the power traces and load connections short.
This practice is essential for high efficiency. Use
thick copper PCBs (2oz vs. 1oz) to enhance full-load
efficiency.
If f
is less than 5 x f , add a second capacitor C
C
zMOD
F
F
from COMP to GND. Set f
as follows:
= f
and calculate C
pEA
zMOD
1
C
=
F
5) The analog signal lines should be routed away from
the high-frequency planes. This ensures integrity of
sensitive signals feeding back into the IC.
2π × f
×R
C
zMOD
PCB Layout Guidelines
Careful PCB layout is critical to achieve low switching
losses and clean, stable operation. Use a multilayer
board whenever possible for better noise immunity and
power dissipation. Follow these guidelines for good PCB
layout:
6) The ground connection for the analog and power
section should be close to the IC. This keeps the
ground current loops to a minimum. In cases where
only one ground is used, enough isolation between
analog return signals and high-power signals must
be maintained.
1) Use a large contiguous copper plane under the IC
package. Ensure that all heat-dissipating components
Maxim Integrated
16
MAX16977
36V, 2A, 2.2MHz Step-Down Converter
with Low Operating Current
Chip Information
PROCESS: BiCMOS
Ordering Information
PART
MAX16977RAUE/V+
MAX16977RAUE+
MAX16977SAUE/V+
MAX16977SAUE+
MAX16977RATE/V+
MAX16977RATE+
MAX16977SATE/V+
MAX16977SATE+
SPREAD SPECTURM
Disabled
TEMP RANGE
-40NC to +125NC
-40NC to +125NC
-40NC to +125NC
-40NC to +125NC
-40NC to +125NC
-40NC to +125NC
-40NC to +125NC
-40NC to +125NC
PIN-PACKAGE
16 TSSOP-EP*
16 TSSOP-EP*
16 TSSOP-EP*
16 TSSOP-EP*
16 TQFN-EP*
16 TQFN-EP*
16 TQFN-EP*
16 TQFN-EP*
Disabled
Enabled
Enabled
Disabled
Disabled
Enabled
Enabled
Package Information
For the latest package outline information and land patterns (footprints), go to www.maximintegrated.com/packages. Note that a
“+”, “#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the
drawing pertains to the package regardless of RoHS status.
PACKAGE TYPE
16 TSSOP-EP
16 TQFN-EP
PACKAGE CODE
U16E+3
OUTLINE NO.
21-0108
LAND PATTERN NO.
90-0120
T1655+4
21-0140
90-0121
/V denotes an automotive qualified part.
+Denotes a lead(Pb)-free/RoHS-compliant package.
*EP = Exposed pad.
Maxim Integrated
17
MAX16977
36V, 2A, 2.2MHz Step-Down Converter
with Low Operating Current
Revision History
REVISION REVISION
PAGES
DESCRIPTION
CHANGED
NUMBER
DATE
0
1
5/11
Initial release
—
4/13
Added Spread Spectrum section, updated part numbers
12, 16
Updated the pole frequency and gain calculation equations in the Compensation
Network section
2
8/13
14, 15
Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent
licenses are implied. Maxim Integrated reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and
max limits) shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance.
Maxim Integrated 160 Rio Robles, San Jose, CA 95134 USA 1-408-601-1000
18
©
2013 Maxim Integrated Products, Inc.
Maxim Integrated and the Maxim Integrated logo are trademarks of Maxim Integrated Products, Inc.
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