MAX17114ETM+T [MAXIM]

Switching Regulator,;
MAX17114ETM+T
型号: MAX17114ETM+T
厂家: MAXIM INTEGRATED PRODUCTS    MAXIM INTEGRATED PRODUCTS
描述:

Switching Regulator,

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19-4820; Rev 0; 7/09  
Multi-Output Power Supply with VCOM Amplifier  
and High-Voltage Gamma Reference for LCD TVs  
General Description  
Features  
S 8.0V to 16.5V IN Supply-Voltage Range  
The MAX17114 generates all the supply rails for thin-film  
transistor liquid-crystal display (TFT LCD) TV panels  
operating from a regulated 12V input. It includes a step-  
down and a step-up regulator, a positive and a negative  
charge pump, an operational amplifier, a high-accuracy,  
high-voltage gamma reference, and a high-voltage  
switch control block. The MAX17114 can operate from  
input voltages from 8V to 16.5V and is optimized for an  
LCD TV panel running directly from 12V supplies.  
S Selectable Frequency (500kHz/750kHz)  
S Current-Mode Step-Up Regulator  
Fast Load-Transient Response  
High-Accuracy Output Voltage (1.0%)  
Built-In 20V, 3.5A, 100mI MOSFET  
High Efficiency  
Adjustable Soft-Start  
Adjustable Current Limit  
The step-up and step-down switching regulators feature  
internal power MOSFETs and high-frequency opera-  
tion allowing the use of small inductors and capacitors,  
resulting in a compact solution. The step-up regulator  
provides TFT source driver supply voltage, while the  
step-down regulator provides the system with logic sup-  
ply voltage. Both regulators use fixed-frequency current-  
mode control architectures, providing fast load-transient  
response and easy compensation. A current-limit func-  
tion for internal switches and output-fault shutdown pro-  
tects the step-up and step-down power supplies against  
fault conditions. The MAX17114 provides soft-start func-  
tions to limit inrush current during startup. In addition,  
the MAX17114 integrates a control block that can drive  
an external p-channel MOSFET to sequence power to  
source drivers.  
Low Duty-Cycle Operation (13.2V - 13.5V AVDD)  
IN  
S Current-Mode Step-Down Regulator  
Fast Load-Transient Response  
Built-In 20V, 3.2A, 120mI MOSFET  
High Efficiency  
3ms Internal Soft-Start  
S Adjustable Positive Charge-Pump Regulator  
S Adjustable Negative Charge-Pump Regulator  
S Integrated High-Voltage Switch with Adjustable  
Turn-On Delay  
S High-Speed Operational Amplifier  
200mA Short-Circuit Current  
45V/µs Slew Rate  
S High-Accuracy Reference for Gamma Buffer  
0.5% Feedback Voltage  
The positive and negative charge-pump regulators pro-  
vide TFT gate-driver supply voltages. Both output volt-  
ages can be adjusted with external resistive voltage-  
dividers. A logic-controlled, high-voltage switch block  
allows the manipulation of the positive gate-driver supply.  
Up to 30mA Load Current  
Low-Dropout Voltage 0.5V at 60mA  
S External p-Channel Gate Control for AVDD  
Sequencing  
The MAX17114 includes one high-current operational  
amplifier designed to drive the LCD backplane (VCOM).  
The amplifier features high output current (Q200mA), fast  
slew rate (45V/Fs), wide bandwidth (20MHz), and rail-to-  
rail outputs.  
S XAO Comparator  
S Input Undervoltage-Lockout and Thermal-  
Overload Protection  
S 48-Pin, 7mm x 7mm, Thin QFN Package  
Also featured in the MAX17114 is a high-accuracy, high-  
voltage adjustable reference for gamma correction.  
Ordering Information  
PART  
TEMP RANGE  
PIN-PACKAGE  
The MAX17114 is available in a small (7mm x 7mm),  
ultra-thin (0.8mm), 48-pin, TQFN-EP package and oper-  
ates over the -40NC to +85NC temperature range.  
MAX17114ETM+  
-40NC to +85NC  
48 TQFN-EP*  
+Denotes a lead(Pb)-free/RoHS-compliant package.  
*EP = Exposed pad.  
Applications  
Pin Configuration and Simplified Operating Circuit appear  
at end of data sheet.  
LCD TV Panels  
_______________________________________________________________ Maxim Integrated Products  
1
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,  
or visit Maxim’s website at www.maxim-ic.com.  
Multi-Output Power Supply with VCOM Amplifier  
and High-Voltage Gamma Reference for LCD TVs  
ABSOLUTE MAXIMUM RATINGS  
INVL, IN2, VOP, EN, FSEL to GND .......................-0.3V to +24V  
PGND, OGND, CPGND to GND ..........................-0.3V to +0.3V  
DLY1, GVOFF, THR, VL to GND ..........................-0.3V to +7.5V  
VREF_0, VREF_I, FBP, FBN, FB1, FB2, COMP, SS, CLIM,  
XAO, VDET, VREF_FB, OUT to GND .........-0.3V to (VL + 0.3)  
GD, GD_I to GND..................................................-0.3V to +24V  
LX1 to PGND.........................................................-0.3V to +24V  
OPP, OPN, OPO to OGND.......................-0.3V to (VOP + 0.3V)  
DRVP to CPGND ....................................-0.3V to (SUPP + 0.3V)  
DRVN to CPGND....................................-0.3V to (SUPN + 0.3V)  
LX2 to PGND................................................-0.7 to (IN2 + 0.3V)  
SUPN to GND.............................................-0.3V to (IN2 + 0.3V)  
SUPP to GND ..........................................-0.3V to (GD_I + 0.3V)  
BST to VL...............................................................-0.3V to +30V  
VGH to GND..........................................................-0.3V to +40V  
VGHM, DRN to GND................................-0.3V to (VGH + 0.3V)  
VGHM to DRN .......................................................-0.3V to +40V  
VREF_I to GND......................................................-0.3V to +24V  
VREF_O to GND...................................-0.3V to (VREF_I + 0.3V)  
REF Short Circuit to GND..........................................Continuous  
RMS LX1 Current (total for both pins)..................................3.2A  
RMS PGND Current (total for both pins)..............................3.2A  
RMS IN2 Current (total for both pins) ..................................3.2A  
RMS LX2 Current (total for both pins)..................................3.2A  
RMS DRVN, DRVP Current ..................................................0.8A  
RMS VL Current..................................................................50mA  
Continuous Power Dissipation (T  
A =  
+70NC)  
48-Pin TQFN (derate 38.5mW/NC above +70NC) ....3076.9mW  
Operating Temperature Range.......................... -40NC to +85NC  
Junction Temperature .....................................................+160NC  
Storage Temperature Range............................ -65NC to +165NC  
Lead Temperature (soldering, 10s) .................................. +300N  
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional  
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute  
maximum rating conditions for extended periods may affect device reliability.  
ELECTRICAL CHARACTERISTICS  
(Circuit of Figure 1, VINVL = VIN2 = VIN = 12V, VOPO = VAVDD = 15V, TA = 0°C to +85°C. Typical values are at TA = +25NC,  
unless otherwise noted.)  
PARAMETER  
GENERAL  
CONDITIONS  
MIN  
TYP  
MAX  
UNITS  
INVL, IN2 Input-Voltage Range  
8
16.5  
20  
V
Only LX2 switching (VFB1 = VFBP = 1.5V, VFBN = 0V),  
EN = VL, VFSEL = 1V  
INVL + IN2 Quiescent Current  
10  
2
mA  
LX2 not switching (VFB1 = VFB2 = VFBP = 1.5V,  
VFBN = 0V), EN = VL, VFSEL = high  
INVL + IN2 Standby Current  
SMPS Operating Frequency  
5
mA  
kHz  
V
FSEL = INVL or high impedance  
FSEL = GND  
630  
420  
750  
500  
870  
580  
INVL Undervoltage-Lockout  
Threshold  
INVL rising, 200mV typical hysteresis  
6.0  
7.0  
8.0  
VL REGULATOR  
IVL = 25mA, VFB1 = VFB2 = VFBP = 1.1V, VFBN = 0.4V  
(all regulators switching)  
VL Output Voltage  
4.859  
3.5  
5
5.15  
4.3  
V
V
VL Undervoltage-Lockout  
Threshold  
VL rising, 50mV typical hysteresis  
3.9  
REFERENCE  
REF Output Voltage  
REF Load Regulation  
REF Sink Current  
No external load  
0A < ILOAD < 50FA  
In regulation  
1.2375  
10  
1.250  
1.0  
1.2625  
10  
V
mV  
FA  
REF Undervoltage-Lockout  
Threshold  
Rising edge, 250mV typical hysteresis  
1.2  
V
2
______________________________________________________________________________________  
Multi-Output Power Supply with VCOM Amplifier  
and High-Voltage Gamma Reference for LCD TVs  
ELECTRICAL CHARACTERISTICS (continued)  
(Circuit of Figure 1, VINVL = VIN2 = VIN = 12V, VOPO = VAVDD = 15V, TA = 0°C to +85°C. Typical values are at TA = +25NC,  
unless otherwise noted.)  
PARAMETER  
CONDITIONS  
MIN  
TYP  
3.30  
1.25  
MAX  
UNITS  
STEP-DOWN REGULATOR  
3.25  
3.267  
1.23  
3.35  
3.333  
1.27  
0°C < TA < +85°C  
TA = +25NC  
OUT Voltage in Fixed Mode  
FB2 = GND, no load (Note 1)  
V
V
V
0°C < TA < +85°C  
TA = +25NC  
FB2 Voltage in Adjustable Mode OUT = 2.5V, no load (Note 1)  
1.2375  
1.2625  
FB2 Adjustable-Mode Threshold  
Dual Mode™ comparator  
Voltage  
0.10  
0.15  
0.20  
Output Voltage-Adjust Range  
1.5  
0.96  
50  
5
V
V
FB2 Fault-Trip Level  
FB2 Input Leakage Current  
DC Load Regulation  
DC Line Regulation  
Falling edge  
1.0  
125  
0.5  
0.1  
1.04  
200  
VFB2 = 1.5V  
nA  
%
0A < ILOAD < 2A  
No load, 10.8V < IN2 < 13.2V  
%/V  
LX2-to-IN2 nMOS Switch  
On-Resistance  
100  
10  
200  
23  
mI  
I
LX2-to-GND2 nMOS Switch  
On-Resistance  
6
BST-to-VL pMOS Switch  
On-Resistance  
40  
30  
110  
I
Low-Frequency Operation  
Out Threshold  
LX2 only  
0.8  
V
FSEL = INVL  
FSEL = GND  
125  
83  
Low-Frequency Operation  
Switching Frequency  
kHz  
LX2 Positive Current Limit  
Soft-Start Ramp Time  
Maximum Duty Factor  
2.50  
70  
3.20  
3
3.90  
A
ms  
%
Zero to full limit  
78  
85  
10  
Minimum Duty Factor  
Characterization/Design  
Limit Only  
%
STEP-UP REGULATOR  
Output-Voltage Range  
Oscillator Maximum Duty Cycle  
FB1 Regulation Voltage  
FB1 Fault-Trip Level  
VIN  
69  
20  
81  
V
%
75  
1.25  
1.0  
FB1 = COMP, CCOMP = 1nF  
Falling edge  
1.2375  
0.96  
1.2625  
1.04  
V
V
FB1 Load Regulation  
FB1 Line Regulation  
0A < ILOAD < full  
10.8V < VIN < 13.2V  
VFB1 = 2V  
0.5  
%
0.08  
125  
320  
1400  
%/V  
nA  
FS  
V/V  
FB1 Input-Bias Current  
FB1 Transconductance  
FB1 Voltage Gain  
30  
200  
560  
DI = Q2.5FA at COMP, FB1 = COMP  
150  
FB1 to COMP  
Dual Mode is a trademark of Maxim Integrated Products, Inc.  
_______________________________________________________________________________________  
3
Multi-Output Power Supply with VCOM Amplifier  
and High-Voltage Gamma Reference for LCD TVs  
ELECTRICAL CHARACTERISTICS (continued)  
(Circuit of Figure 1, VINVL = VIN2 = VIN = 12V, VOPO = VAVDD = 15V, TA = 0°C to +85°C. Typical values are at TA = +25NC,  
unless otherwise noted.)  
PARAMETER  
CONDITIONS  
VFB1 = 1.5V, VLX1 = 20V  
MIN  
TYP  
10  
MAX  
40  
UNITS  
VFB1 = 1.1V, RCLIM = floating  
VFB1 = 1.1V, with RCLIM at CLIM pin  
RCLIM = 60.5kI  
3.0  
3.5  
4.2  
LX1 Leakage Current  
A
3.5 -  
(60.5kI/  
RCLIM)  
-20%  
+20%  
CLIM Voltage  
0.56  
0.19  
0.625  
0.21  
100  
16  
0.69  
0.25  
185  
V
Current-Sense Transresistance  
LX1 On-Resistance  
Soft-Start Period  
V/A  
mI  
ms  
FA  
CSS < 200pF  
VSS = 1.2V  
SS Charge Current  
4
5
6
POSITIVE CHARGE-PUMP REGULATORS  
GD_I Input-Supply Range  
8.0  
0.15  
20  
0.3  
V
mA  
V
GD_I Input-Supply Current  
GD_I Overvoltage Threshold  
FBP Regulation Voltage  
FBP Line-Regulation Error  
FBP Input-Bias Current  
VFBP = 1.5V (not switching)  
GD_I rising, 250mV typical hysteresis (Note 2)  
20.1  
21  
22  
1.2375  
1.25  
1.2625  
0.2  
V
VSUP = 11V to 16V, not in dropout  
VFBP = 1.5V, TA = +25°C  
%/V  
nA  
-50  
+50  
DRVP p-Channel MOSFET  
On-Resistance  
1.5  
3
I
DRVP n-Channel MOSFET  
On-Resistance  
1
1.0  
4
2
I
FBP Fault-Trip Level  
Falling edge  
0.96  
1.04  
V
7-bit voltage ramp with filtering to prevent high peak  
currents at 500kHz frequency  
ms  
ms  
Positive Charge-Pump  
Soft-Start Period  
750kHz frequency  
3
NEGATIVE CHARGE-PUMP REGULATORS  
FBN Regulation Voltage  
FBN Input-Bias Current  
FBN Line-Regulation Error  
DRVN PCH On-Resistance  
DRVN NCH On-Resistance  
FBN Fault-Trip Level  
VREF - VFBN  
0.99  
-50  
1.00  
1.01  
+50  
0.2  
3
V
VFBN = 0mV  
nA  
VIN2 = 11V to 16V, not in dropout  
%/V  
I
1.5  
1
2
I
Rising edge  
720  
800  
880  
mV  
7-bit voltage ramp with filtering to prevent high peak  
currents at 500kHz frequency  
3
2
Negative Charge-Pump Soft-  
Start Period  
ms  
750kHz frequency  
AVDD SWITCH GATE CONTROL  
GD to GD_I Pullup Resistance  
GD Output Sink Current  
EN = GND  
25  
10  
6
50  
15  
7
I
EN = VL  
8
5
FA  
GD_I - GD Done Threshold  
OPERATIONAL AMPLIFIERS  
VOP Supply Range  
EN = VL, VGD_I - VGD  
8
20  
V
4
______________________________________________________________________________________  
Multi-Output Power Supply with VCOM Amplifier  
and High-Voltage Gamma Reference for LCD TVs  
ELECTRICAL CHARACTERISTICS (continued)  
(Circuit of Figure 1, VINVL = VIN2 = VIN = 12V, VOPO = VAVDD = 15V, TA = 0°C to +85°C. Typical values are at TA = +25NC,  
unless otherwise noted.)  
PARAMETER  
CONDITIONS  
MIN  
TYP  
MAX  
UNITS  
VOP Overvoltage-Fault  
Threshold  
VVOP = rising, hysteresis = 200mV (Note 2)  
20.1  
21  
22  
V
VOP Supply Current  
Input-Offset Voltage  
Input-Bias Current  
Buffer configuration, VOPP = VOPN = VOP/2, no load  
2V < (VOPP, VOPN ) < (VVOP - 2V), TA = +25NC  
2V < (VOPP, VOPN ) < (VVOP - 2V)  
2
4
mA  
mV  
FA  
-10  
-1  
-2  
+6  
+1  
Input Common-Mode  
Voltage Range  
0
VOP  
300  
V
Input Common-Mode  
Rejection Ratio  
2V < (VOPP, VOPN ) < (VVOP - 2V)  
IOUTx = 25mA  
80  
dB  
mV  
VOP -  
300  
VOP -  
150  
Output-Voltage Swing High  
Output-Voltage Swing Low  
Large-Signal Voltage Gain  
Slew Rate  
IOUTx = -25mA  
150  
80  
mV  
dB  
2V < (VOPP, VOPN ) < (VOP - 2V)  
2V < (VOPP, VOPN ) < (VOP - 2V)  
2V < (VOPP, VOPN ) < (VOP - 2V)  
Short to VOP/2, sourcing  
Short to VOP/2, sinking  
45  
V/Fs  
MHz  
-3dB Bandwidth  
20  
200  
200  
Short-Circuit Current  
mA  
HIGH-VOLTAGE SWITCH ARRAY  
VGH Supply Range  
35  
V
VGH Supply Current  
150  
5
300  
FA  
VGHM-to-VGH Switch  
On-Resistance  
DLY1 = 2V, GVOFF = VL  
VVGH - VVGHM > 5V  
DLY1 = 2V, GVOFF = GND  
VVGHM - VDRN > 5V  
DLY1 = GND  
10  
I
mA  
I
VGHM-to-VGH Switch Saturation  
Current  
150  
390  
20  
VGHM-to-DRN Switch  
On-Resistance  
50  
VGHM-to-DRN Switch Saturation  
Current  
75  
200  
2.5  
mA  
kI  
VGHM-to-GND Switch  
On-Resistance  
1.0  
4.0  
0.6  
GVOFF Input Low Voltage  
GVOFF Input High Voltage  
GVOFF Input Current  
V
V
1.6  
-1  
GVOFF = 0V or VL  
+1  
FA  
1kIfrom DRN to CPGND, GVOFF = 0V to VL step, no  
load on VGHM, measured from GVOFF = 2V to VGHM  
= 20%  
GVOFF-to-VGHM Rising  
Propagation Delay  
100  
ns  
1kIfrom DRN to CPGND, GVOFF = VL to 0V step, no  
load on VGHM, DRN falling, no load on DRN and VGHM,  
measured from GVOFF = 0.6V to VGHM = 80%  
GVOFF-to-VGHM Falling  
Propagation Delay  
200  
10  
ns  
THR-to-VGHM Voltage Gain  
9.4  
10.6  
V/V  
_______________________________________________________________________________________  
5
Multi-Output Power Supply with VCOM Amplifier  
and High-Voltage Gamma Reference for LCD TVs  
ELECTRICAL CHARACTERISTICS (continued)  
(Circuit of Figure 1, VINVL = VIN2 = VIN = 12V, VOPO = VAVDD = 15V, TA = 0°C to +85°C. Typical values are at TA = +25NC,  
unless otherwise noted.)  
PARAMETER  
SEQUENCE CONTROL  
EN Pulldown Resistance  
DLY1 Charge Current  
CONDITIONS  
MIN  
TYP  
MAX  
UNITS  
1
8
MI  
FA  
V
VDLY1 = 1; when DLY1 cap is not used, there is no delay  
6
10  
DLY1 Turn-On Threshold  
1.19  
1.25  
1.31  
DLY1 Discharge Switch  
On-Resistance  
EN = GND or fault tripped  
10  
3
I
FBN Discharge Switch  
On-Resistance  
(EN = GND and INVL < UVLO) or fault tripped  
kI  
GAMMA REFERENCE  
VREF_I Input-Voltage Range  
VREF_I Undervoltage Lockout  
VREF_I Input Bias Current  
VREF_O Dropout Voltage  
10  
18.0  
5.8  
V
V
VREF_I rising  
5.4  
125  
No load  
250  
FA  
V
IVREF_O = 60mA  
0.25  
1.250  
0.5  
VVREF_I = 13.5V, 1mA PIVREF_O P30mA  
VVREF_I from 10V to 18V, IVREF_O = 20mA  
1.243  
60  
1.256  
P0.9  
V
VREF_B Regulation Voltage  
mV/V  
mA  
VREF_O Maximum Output Current  
XAO FUNCTION  
VDET Threshold  
VDET falling, IN > VL UVLO  
1.225  
50  
1.250  
50  
1.275  
V
mV  
nA  
V
VDET Hysteresis  
VDET Input Bias Current  
XAO Output Voltage  
FAULT DETECTION  
Duration-to-Trigger Fault  
175  
300  
0.4  
VDET = AGND, IXAO = 1mA  
For UVP only  
50  
ms  
V
0.36 x  
VREF  
0.4 x  
VREF  
0.44 x  
VREF  
Step-Up Short-Circuit Protection FB1 falling edge  
0.18 x  
VREF  
0.2 x  
VREF  
0.22 x  
VREF  
Adjustable mode FB2 falling  
Step-Down Short-Circuit  
Protection  
V
V
Fixed mode OUT falling, internal feedback divider  
voltage  
0.18 x  
VREF  
0.2 x  
VREF  
0.22 x  
VREF  
Positive Charge-Pump Short-  
Circuit Protection  
0.36 x  
VREF  
0.4 x  
VREF  
0.44 x  
VREF  
FBP falling edge  
Negative Charge-Pump  
Short-Circuit Protection  
VFBN - VREF  
0.4  
0.45  
0.5  
V
Thermal-Shutdown Threshold  
Latch protection  
+160  
NC  
SWITCHING FREQUENCY SELECTION  
FSEL Input Low Voltage  
FSEL Input High Voltage  
FSEL Pullup Resistance  
500kHz  
750kHz  
0.6  
V
V
1.6  
1
MI  
6
______________________________________________________________________________________  
Multi-Output Power Supply with VCOM Amplifier  
and High-Voltage Gamma Reference for LCD TVs  
ELECTRICAL CHARACTERISTICS  
(VINVL = VIN2 = VIN = 12V, VOPO = VAVDD = 15V, TA = -40°C to +85°C.) (Note 3)  
PARAMETER  
GENERAL  
CONDITIONS  
MIN  
TYP  
MAX  
UNITS  
INVL, IN2 Input-Voltage Range  
8
16.5  
870  
580  
V
FSEL = INVL or high impedance  
FSEL = GND  
630  
420  
SMPS Operating Frequency  
kHz  
INVL Undervoltage-Lockout  
Threshold  
INVL rising, 200mV typical hysteresis  
6.0  
8.0  
V
VL REGULATOR  
IVL = 25mA, VFB1 = VFB2 = VFBP = 1.1V, VFBN = 0.4V  
(all regulators switching)  
VL Output Voltage  
4.859  
3.5  
5.15  
4.3  
V
V
VL Undervoltage-Lockout  
Threshold  
VL rising, 100mV typical hysteresis  
REFERENCE  
REF Output Voltage  
No external load  
1.235  
1.265  
1.2  
V
V
REF Undervoltage-Lockout  
Threshold  
Rising edge, 20mV typical hysteresis  
STEP-DOWN REGULATOR  
OUT Voltage in Fixed Mode  
FB2 = GND, no load (Note 1)  
3.267  
3.333  
V
V
FB2 Voltage in Adjustable Mode VOUT = 2.5V, no load (Note 1)  
1.2375  
1.2625  
FB2 Adjustable-Mode  
Dual-mode comparator  
Threshold Voltage  
0.10  
0.20  
V
Output Voltage-Adjust Range  
FB2 Fault Trip Level  
Step-down output  
Falling edge  
1.5  
5
V
V
0.96  
1.04  
LX2-to-IN2 nMOS Switch  
On-Resistance  
200  
23  
mI  
I
LX2-to-GND2 nMOS Switch  
On-Resistance  
6
BST-to-VL pMOS Switch  
On-Resistance  
40  
110  
I
LX2 Positive Current Limit  
Maximum Duty Factor  
2.50  
70  
3.90  
85  
A
%
_______________________________________________________________________________________  
7
Multi-Output Power Supply with VCOM Amplifier  
and High-Voltage Gamma Reference for LCD TVs  
ELECTRICAL CHARACTERISTICS (continued)  
(VINVL = VIN2 = VIN = 12V, VOPO = VAVDD = 15V, TA = -40°C to +85°C.) (Note 3)  
PARAMETER  
STEP-UP REGULATOR  
Output-Voltage Range  
Oscillator Maximum Duty Cycle  
FB1 Regulation Voltage  
FB1 Fault-Trip Level  
CONDITIONS  
MIN  
TYP  
MAX  
UNITS  
VIN  
70  
20  
85  
V
%
FB1 = COMP, CCOMP = 1nF  
1.2375  
0.96  
150  
1.2625  
1.04  
560  
40  
V
Falling edge  
V
FB1 Transconductance  
LX1 Leakage Current  
LX1 Current Limit  
DI = Q2.5FA at COMP, FB1 = COMP  
VFB1 = 1.5V, VLX1 = 20V  
VFB1 = 1.1V, RCLIM = unconnected  
RCLIM = 60.5kI  
FS  
FA  
A
3.0  
4.2  
CLIM Voltage  
0.56  
0.19  
0.68  
0.25  
185  
6
V
Current-Sense Transresistance  
LX1 On-Resistance  
V/A  
mI  
FA  
SS Charge Current  
VSS = 1.2V  
4
POSITIVE CHARGE-PUMP REGULATORS  
GD_I Input-Supply Range  
8.0  
20  
0.2  
V
mA  
V
GD_I Input-Supply Current  
GD_I Overvoltage Threshold  
FBP Regulation Voltage  
VFBP = 1.5V (not switching)  
GD_I rising, 250mV typical hysteresis (Note 2)  
20.1  
22  
1.2375  
1.2625  
0.2  
V
FBP Line-Regulation Error  
VSUP = 11V to 16V, not in dropout  
%/V  
DRVP p-Channel MOSFET  
On-Resistance  
3
I
DRVP n-Channel MOSFET  
On-Resistance  
1
I
FBP Fault-Trip Level  
Falling edge  
0.96  
0.99  
1.04  
V
NEGATIVE CHARGE-PUMP REGULATORS  
FBN Regulation Voltage  
FBN Line-Regulation Error  
DRVN PCH On-Resistance  
DRVN NCH On-Resistance  
FBN Fault-Trip Level  
VREF - VFBN  
1.01  
0.2  
3
V
VIN2 = 11V to 16V, not in dropout  
%/V  
I
1
I
Rising edge  
720  
880  
mV  
AVDD SWITCH GATE CONTROL  
GD Output Sink Current  
EN = VL  
5
5
15  
7
FA  
GD_I - GD Done Threshold  
EN = VL, VGD_I - VGD  
V
8
______________________________________________________________________________________  
Multi-Output Power Supply with VCOM Amplifier  
and High-Voltage Gamma Reference for LCD TVs  
ELECTRICAL CHARACTERISTICS (continued)  
(VINVL = VIN2 = VIN = 12V, VOPO = VAVDD = 15V, TA = -40°C to +85°C.) (Note 3)  
PARAMETER  
OPERATIONAL AMPLIFIERS  
VOP Supply Range  
CONDITIONS  
MIN  
TYP  
MAX  
UNITS  
8
20  
22  
4
V
V
VOP Overvoltage Fault Threshold  
VOP Supply Current  
VVOP = rising, hysteresis = 200mV (Note 2)  
Buffer configuration, VOPP = VOPN = VOP/2, no load  
2V < (VOPP, VOPN ) < (VOP - 2V), TA = +25NC  
20.1  
mA  
mV  
Input Offset Voltage  
-12  
0
+8  
Input Common-Mode  
Voltage Range  
OVIN  
V
VOP -  
300  
Output-Voltage Swing High  
Output-Voltage Swing Low  
Short-Circuit Current  
IOUTx = 25mA  
mV  
mV  
mA  
IOUTx = -25mA  
300  
Short to VOP/2, sourcing  
Short to VOP/2, sinking  
200  
200  
HIGH-VOLTAGE SWITCH ARRAY  
VGH Supply Range  
35  
V
VGH Supply Current  
3300  
FA  
VGHM-to-VGH Switch  
On-Resistance  
VDLY1 = 2V, GVOFF = VL  
VVGH - VVGHM > 5V  
VDLY1 = 2V, GVOFF = GND  
VVGHM - VDRN > 5V  
DLY1 = GND  
10  
I
mA  
I
VGHM-to-VGH Switch  
Saturation Current  
150  
VGHM-to-DRN Switch  
On-Resistance  
50  
VGHM-to-DRN Switch  
Saturation Current  
75  
mA  
kI  
VGHM-to-GND Switch  
On-Resistance  
1.0  
4.0  
0.6  
GVOFF Input Low Voltage  
GVOFF Input High Voltage  
GVOFF Input Current  
V
V
1.6  
-1  
VGVOFF = 0V or VL  
+1  
FA  
V/V  
THR-to-VGHM Voltage Gain  
SEQUENCE CONTROL  
EN Input Low Voltage  
9.4  
10.6  
0.6  
V
V
EN Input High Voltage  
1.6  
6
VDLY1 = 1V; when DLY1 cap is not used,  
there is no delay  
DLY1 Charge Current  
10  
FA  
DLY1 Turn-On Threshold  
1.19  
1.31  
V
_______________________________________________________________________________________  
9
Multi-Output Power Supply with VCOM Amplifier  
and High-Voltage Gamma Reference for LCD TVs  
ELECTRICAL CHARACTERISTICS (continued)  
(VINVL = VIN2 = VIN = 12V, VOPO = VAVDD = 15V, TA = -40°C to +85°C.) (Note 3)  
PARAMETER  
CONDITIONS  
MIN  
TYP  
MAX  
UNITS  
GAMMA REFERENCE  
VREF_I Input-Voltage Range  
VREF_I Undervoltage Lockout  
VREF_I Input-Bias Current  
VREF_O Dropout Voltage  
10  
18.0  
5.8  
V
V
VREF_I rising  
No load  
250  
FA  
V
IVREF_O = 60mA  
0.5  
VREF_I = 13.5V, 1mA ≤ IVREF_O ≤ 30mA  
VREF_I from 10V to 18V, IVREF_O = 20mA  
1.243  
60  
1.256  
P 0.9  
V
VREF_FB Regulation Voltage  
mV/V  
VREF_O Maximum  
Output Current  
mA  
XAO FUNCTION  
VDET Threshold  
VDET falling, IN > VL UVLO  
VDET = AGND, IXAO = 1mA  
1.225  
1.275  
0.4  
V
V
XAO Output Voltage  
FAULT DETECTION  
Step-Up Short-Circuit  
Protection  
0.36 x  
VREF  
0.44 x  
VREF  
FB1 falling edge  
V
V
V
V
V
0.18 x  
VREF  
0.22 x  
VREF  
Adjustable mode FB2 falling  
Step-Down Short-Circuit  
Protection  
Fixed mode OUT falling, internal feedback-divider  
voltage  
0.18 x  
VREF  
0.22 x  
VREF  
Positive Charge-Pump  
Short-Circuit Protection  
0.36 x  
VREF  
0.44 x  
VREF  
FBP falling edge  
VREF - VFBN  
Negative Charge-Pump  
Short-Circuit Protection  
0.4  
0.5  
SWITCHING FREQUENCY SELECTION  
FSEL Input Low Voltage  
FSEL Input High Voltage  
500kHz  
750kHz  
0.6  
V
V
1.6  
Note 1: When the step-down inductor is in continuous conduction (EN = VL or heavy load), the output voltage has a DC regulation  
level lower than the error comparator threshold by 50% of the output-voltage ripple. In discontinuous conduction (EN = GND  
with light load), the output voltage has a DC regulation level higher than the error comparator threshold by 50% of the output  
voltage ripple.  
Note 2: Disables boost switching if either GD_I or VOP exceeds the threshold. Switching resumes when no threshold is exceeded.  
Note 3: Specifications to T = -40NC are guaranteed by design, not production tested.  
A
10 _____________________________________________________________________________________  
Multi-Output Power Supply with VCOM Amplifier  
and High-Voltage Gamma Reference for LCD TVs  
Typical Operating Characteristics  
(T = +25°C, unless otherwise noted.)  
A
STEP-DOWN REGULATOR EFFICIENCY  
STEP-DOWN REGULATOR OUTPUT  
VOLTAGE vs. LOAD CURRENT  
vs. LOAD CURRENT  
85  
80  
75  
70  
65  
60  
55  
50  
3.350  
3.325  
3.300  
3.275  
750kHz  
750kHz  
500kHz  
500kHz  
0.10  
1.00  
10.00  
0
0.40 0.80 1.20 1.60 2.00 2.40  
LOAD CURRENT (A)  
LOAD CURRENT (A)  
STEP-DOWN REGULATOR LOAD-TRANSIENT  
STEP-DOWN REGULATOR HEAVY-LOAD  
RESPONSE (0.3A TO 1.8A)  
SOFT-START (1A)  
MAX17114 toc03  
MAX17114 toc04  
V
IN  
5V/div  
V
OUT  
V
OUT  
0V  
(AC-COUPLED)  
200mV/div  
1V/div  
0V  
0V  
I
L2  
I
L2  
1A/div  
0A  
0A  
1A/div  
0A  
0V  
I
LOAD  
LX2  
10V/div  
1A/div  
20Fs/div  
4ms/div  
L = 4.7FH  
STEP-UP REGULATOR OUTPUT  
VOLTAGE vs. LOAD CURRENT  
STEP-UP REGULATOR EFFICIENCY  
vs. LOAD CURRENT  
16.445  
16.440  
16.435  
16.430  
16.425  
16.420  
16.415  
16.410  
100  
95  
90  
85  
80  
75  
70  
65  
60  
55  
50  
500kHz  
750kHz  
500kHz  
750kHz  
0
0.5  
1.0  
1.5  
2.0  
2.5  
0.01  
0.10  
1.00  
10.00  
LOAD CURRENT (A)  
LOAD CURRENT (A)  
______________________________________________________________________________________ 11  
Multi-Output Power Supply with VCOM Amplifier  
and High-Voltage Gamma Reference for LCD TVs  
Typical Operating Characteristics (continued)  
(T = +25°C, unless otherwise noted.)  
A
STEP-UP REGULATOR LOAD-TRANSIENT  
RESPONSE (0.1A TO 1.1mA)  
STEP-UP REGULATOR PULSED LOAD-TRANSIENT  
RESPONSE (0.1A TO 1.9mA)  
MAX17114 toc07  
MAX17114 toc08  
I
I
LOAD  
1A/div  
LOAD  
0V  
0A  
1A/div  
0V  
0V  
V
V
AVDD  
(AC-COUPLED)  
200mV/div  
AVDD  
(AC-COUPLED)  
200mV/div  
I
I
L1  
1A/div  
L1  
0A  
0A  
1A/div  
20Fs/div  
10Fs/div  
L = 10FH  
L = 10FH  
SWITCHING FREQUENCY  
vs. INPUT VOLTAGE  
STEP-UP REGULATOR HEAVY LOAD  
SOFT-START (0.5A)  
MAX17114 toc09  
498  
497  
496  
495  
494  
493  
492  
491  
490  
489  
488  
V
EN  
5V/div  
0V  
V
AVDD  
5V/div  
V
GD  
5V/div  
0V  
0V  
I
L1  
1A/div  
0A  
8
10  
12  
(V)  
14  
16  
1ms/div  
V
IN  
GAMMA REFERENCE LOAD  
REFERENCE VOLTAGE  
LOAD REGULATION  
GAMMA REFERENCE LINE REGULATION  
(LOAD = 20mA)  
REGULATION (V  
= 16V)  
REF  
15.2  
15.1  
15.0  
14.9  
14.8  
14.7  
14.6  
14.5  
1.2490  
1.2485  
1.2480  
1.2475  
1.2470  
1.2465  
15.14  
15.09  
15.04  
14.99  
14.94  
14.89  
14.84  
SWITCHING  
NO SWITCHING  
0
50  
100  
150  
200  
250  
0
50  
100  
150  
200  
15.0 15.5 16.0 16.5 17.0 17.5 18.0  
VOP VOLTAGE (V)  
LOAD CURRENT (mA)  
LOAD CURRENT (FA)  
12 _____________________________________________________________________________________  
Multi-Output Power Supply with VCOM Amplifier  
and High-Voltage Gamma Reference for LCD TVs  
Typical Operating Characteristics (continued)  
(T = +25°C, unless otherwise noted.)  
A
POSITIVE CHARGE-PUMP REGULATOR  
NORMALIZED LOAD REGULATION  
POSITIVE CHARGE-PUMP REGULATOR  
NORMALIZED LINE REGULATION  
0.5  
0
2
0
I
= 0A  
GON  
-2  
-0.5  
-1.0  
-1.5  
-2.0  
-4  
I
= 25mA  
-6  
GON  
-8  
-10  
-12  
0
50  
100  
150  
10 11 12 13 14 15 16 17 18  
SUPPLY VOLTAGE (V)  
LOAD CURRENT (mA)  
POSITIVE CHARGE-PUMP REGULATOR  
NEGATIVE CHARGE-PUMP REGULATOR  
NORMALIZED LINE REGULATION  
LOAD-TRANSIENT RESPONSE  
MAX17114 toc14  
0.01  
0
I
= 25mA  
GON  
V
GON  
0V  
0A  
(AC-COUPLED)  
200mV/div  
-0.01  
-0.02  
-0.03  
-0.04  
I
= 0mA  
GON  
60mA  
I
LOAD  
20mA/div  
10mA  
40Fs/div  
8
9
10 11 12 13 14 15 16  
SUPN VOLTAGE (V)  
NEGATIVE CHARGE-PUMP REGULATOR  
NORMALIZED LOAD REGULATION  
NEGATIVE CHARGE-PUMP REGULATOR  
LOAD-TRANSIENT RESPONSE  
MAX17114 toc17  
0.2  
0
-0.2  
-0.4  
-0.6  
-0.8  
-1.0  
-1.2  
V
GOFF  
0V  
(AC-COUPLED)  
200mV/div  
60mA  
I
LOAD  
20mA/div  
10mA  
0A  
0
50  
100  
150  
200  
250  
300  
20Fs/div  
LOAD CURRENT (mA)  
______________________________________________________________________________________ 13  
Multi-Output Power Supply with VCOM Amplifier  
and High-Voltage Gamma Reference for LCD TVs  
Typical Operating Characteristics (continued)  
(T = +25°C, unless otherwise noted.)  
A
OPERATIONAL AMPLIFIER SUPPLY CURRENT  
vs. SUPPLY VOLTAGE  
2.65  
POWER-UP SEQUENCE OF ALL  
SUPPLY OUTPUTS  
MAX17114 toc18  
V
V
IN  
2.60  
2.55  
2.50  
2.45  
2.40  
2.35  
2.30  
0V  
OUT  
0V  
0V  
V
V
V
GOFF  
AVDD  
GON  
0V  
0V  
0V  
0V  
0V  
V
V
COM  
DLY1  
V
GHM  
0V  
8
9
10 11 12 13 14 15 16 17 18 19 20  
VOP SUPPLY VOLTAGE (V)  
10ms/div  
V
V
V
V
= 10V/div  
V
GON  
V
COM  
V
DLY1  
V
GHM  
= 20V/div  
= 10V/div  
= 5V/div  
IN  
= 5V/div  
OUT  
GOFF  
AVDD  
= 10V/div  
=10V/div  
= 50V/div  
OPERATIONAL AMPLIFIER RAIL-TO-RAIL  
OPERATIONAL AMPLIFIER  
INPUT/OUTPUT WAVEFORMS  
LOAD-TRANSIENT RESPONSE  
MAX17114 toc20  
MAX17114 toc21  
V
OPP  
5V/div  
V
COM  
0V  
0A  
(AC-COUPLED)  
500mV/div  
0V  
0V  
V
COM  
5V/div  
I
VCOM  
100mA/div  
4Fs/div  
1Fs/div  
OPERATIONAL AMPLIFIER LARGE-  
SIGNAL STEP RESPONSE  
MAX17114 toc22  
V
5V/div  
OPP  
0V  
0V  
V
COM  
5V/div  
1Fs/div  
14 _____________________________________________________________________________________  
Multi-Output Power Supply with VCOM Amplifier  
and High-Voltage Gamma Reference for LCD TVs  
Typical Operating Characteristics (continued)  
(T = +25°C, unless otherwise noted.)  
A
OPERATIONAL AMPLIFIER SMALL-  
SIGNAL STEP RESPONSE  
INVL SUPPLY CURRENT vs. INPUT VOLTAGE  
7
MAX17114 toc23  
6
5
4
3
2
1
0
ALL OUTPUT SWITCHING  
V
OPP  
0V  
0V  
(AC-COUPLED)  
200mV/div  
BUCK OUTPUT SWITCHING  
NO OUTPUT SWITCHING  
V
COM  
(AC-COUPLED)  
200mV/div  
8
10  
12  
14  
16  
100ns/div  
INPUT VOLTAGE (V)  
HIGH-VOLTAGE SWITCH CONTROL  
FUNCTION (VGHM WITH 470pF LOAD)  
MAX17114 toc25  
V
GVOFF  
5V/div  
0V  
V
VGHM  
10V/div  
0V  
4Fs/div  
______________________________________________________________________________________ 15  
Multi-Output Power Supply with VCOM Amplifier  
and High-Voltage Gamma Reference for LCD TVs  
Pin Description  
PIN  
1
NAME  
VREF_I  
VOP  
FUNCTION  
Gamma Reference Input  
2
Operational Amplifier Power Supply  
Operational Amplifier Power Ground  
Operational Amplifier Noninverting Input  
Operational Amplifier Inverting Input  
Operational Amplifier Output  
3
OGND  
OPP  
4
5
OPN  
6
OPO  
7
XAO  
Voltage-Detector Output  
High-Voltage Switch-Control Block Timing Control Input. See the High-Voltage Switch Control sec-  
tion for details.  
8
9
GVOFF  
EN  
Enable Input. Enable is high, turns on step-up converter and positive charge pump.  
Step-Down Regulator Feedback Input. Connect FB2 to GND to select the step-down converter’s  
3.3V fixed mode. For adjustable mode, connect FB2 to the center of a resistive voltage-divider  
between the step-down regulator output (OUT) and GND to set the step-down regulator output  
voltage. Place the resistive voltage-divider within 5mm of FB2.  
10  
FB2  
11  
12  
OUT  
N.C.  
Step-Down Regulator Output-Voltage Sense. Connect OUT to step-down regulator output.  
No Connection. Not internally connected.  
Step-Down Regulator Switching Node. LX2 is the source of the internal n-channel MOSFET con-  
nected between IN2 and LX2. Connect the inductor and Schottky catch diode to both LX2 pins  
and minimize the trace area for lowest EMI.  
13, 14  
15  
LX2  
BST  
Step-Down Regulator Bootstrap Capacitor Connection. Power supply for the high-side gate driver.  
Connect a 0.1FF ceramic capacitor from BST to LX2.  
Step-Down Regulator Power Input. Drain of the internal n-channel MOSFET connected between  
IN2 and LX2.  
16, 17  
18  
IN2  
GND  
VDET  
Analog Ground  
Voltage-Detector Input. Connects VDET to the center of a resistor voltage-divider between input  
voltage and GND to set the trigger point of XAO.  
19  
Internal 5V Linear Regulator and the Startup Circuitry Power Supply. Bypass INVL to GND with  
0.22FF close to the IC.  
20  
21  
INVL  
VL  
5V Internal Linear Regulator Output. Bypass VL to GND with a 1FF minimum capacitor. Provides  
power for the internal MOSFET driving circuit, the PWM controllers, charge-pump regulators, logic,  
and reference and other analog circuitry. Provides 25mA load current when all switching regula-  
tors are enabled. VL is active whenever input voltage is high enough.  
Frequency-Select Pin. Connect FSEL to VL or INVL or float FSEL pin for 750kHz operation.  
Connect to GND for 500kHz operation.  
22  
23  
FSEL  
CLIM  
Boost Current-Limit Setting Input. Connects a resistor from CLIM to GND to set the current limit for  
the boost converter.  
Soft-Start Input. Connects a capacitor from SS to GND to set the soft-start time for the step-  
up converter. A 5FA current source starts to charge CSS when GD is done (see the Step-Up  
Regulator External pMOS Pass Switch section for a description). SS is internally pulled to GND  
through 1kI resistance when EN is low OR when VL is below its UVLO threshold.  
24  
SS  
Step-Up Regulator, Power-MOSFET, n-Channel Drain and Switching Node. Connects the inductor  
and Schottky catch diode to both LX1 pins and minimizes the trace area for lowest EMI.  
25, 26  
27, 28  
29  
LX1  
PGND  
GD_I  
Step-Up Regulator Power Ground  
Step-Up Regulator, External pMOS Pass Switch Source Input. Connects to the cathode of the  
step-up regulator Schottky catch diode.  
16 _____________________________________________________________________________________  
Multi-Output Power Supply with VCOM Amplifier  
and High-Voltage Gamma Reference for LCD TVs  
Pin Description (continued)  
PIN  
NAME  
FUNCTION  
Step-Up Regulator, External pMOS Pass Switch Gate Input. A 10FA Q20% current source pulls  
down on the gate of the external pFET when EN is high.  
30  
GD  
Boost Regulator Feedback Input. Connects FB1 to the center of a resistive voltage-divider  
between the boost regulator output and GND to set the boost regulator output voltage. Place the  
resistive voltage-divider within 5mm of FB1.  
31  
32  
33  
FB1  
COMP  
THR  
Compensation Pin for the Step-Up Regulator Error Amplifier. Connects a series resistor and  
capacitor from COMP to ground.  
VGHM Low-Level Regulation Set-Point Input. Connects THR to the center of a resistive voltage-  
divider between AVDD and GND to set the VGHM falling regulation level. The actual level is 10 x  
VTHR. See the High-Voltage Switch Control section for details.  
Positive Charge-Pump Drivers Power Supply. Connects to the output of the boost regulator (AVDD)  
and bypasses to CPGND with a 0.1FF capacitor. SUPP is internally connected to GD_I.  
34  
35  
36  
SUPP  
CPGND  
DRVP  
Charge-Pump and Buck Power Ground  
Positive Charge-Pump Driver Output. Connects DRVP to the positive charge-pump flying  
capacitor(s).  
High-Voltage Switch Array Delay Input. Connects a capacitor from DLY1 to GND to set the delay  
time between when the positive charge pump finishes its soft-start and the startup of this high-volt-  
age switch array. A 10FA current source charges CDLY1. DLY1 is internally pulled to GND through  
50I resistance when EN is low or when VL is below its UVLO threshold.  
37  
DLY1  
Positive Charge-Pump Regulator Feedback Input. Connects FBP to the center of a resistive  
voltage-divider between the positive charge-pump regulator output and GND to set the positive  
charge-pump regulator output voltage. Place the resistive voltage-divider within 5mm of FBP.  
38  
FBP  
39  
40  
41  
42  
VGH  
VGHM  
DRN  
Switch Input. Source of the internal high-voltage p-channel MOSFET between VGH and VGHM.  
Internal High-Voltage MOSFET Switch Common Terminal. VGHM is the output of the high-voltage  
switch-control block.  
Switch Output. Drain of the internal high-voltage p-channel MOSFET connected to VGHM.  
Negative Charge-Pump Drivers Power Supply. Bypass to CPGND with a 0.1FF capacitor. SUPN is  
internally connected to IN2.  
SUPN  
Negative Charge-Pump Driver Output. Connects DRVN to the negative charge-pump flying  
capacitor(s).  
43  
44  
DRVN  
GND  
Analog Ground  
Negative Charge-Pump Regulator Feedback Input. Connect FBN to the center of a resistive  
voltage-divider between the negative output and REF to set the negative charge-pump regulator  
output voltage. Place the resistive voltage-divider within 5mm of FBN.  
45  
46  
47  
FBN  
REF  
Reference Output. Connects a 0.22FF capacitor from REF to GND. All power outputs are disabled  
until REF exceeds its UVLO threshold.  
Gamma Reference Feedback Input. Connect VREF_FB to the center of a resistive voltage-divider  
between VREF_O and GND to set the gamma reference output voltage. Place the resistive volt-  
age-divider within 5mm of VREF_FB.  
VREF_FB  
48  
VREF_O  
EP  
Gamma Reference Output  
Exposed Pad. Connects EP to GND, and ties EP to a copper plane or island. Maximizes the area  
of this copper plane or island to improve thermal performance.  
______________________________________________________________________________________ 17  
Multi-Output Power Supply with VCOM Amplifier  
and High-Voltage Gamma Reference for LCD TVs  
VIN  
12V  
C1  
L1  
10µH  
D1  
C2  
0.1µF  
BST  
LX1  
LX1  
IN2  
IN2  
C4  
PGND  
PGND  
FB1  
COMP  
R2  
L2  
C
COMP  
R
COMP  
OUT  
3.3V, 1.5A  
FSEL  
CLIM  
1nF  
LX2  
LX2  
25kI  
D2  
C5  
R1  
OUT  
FB2  
GD_I  
GD  
Q1  
VL (OR 3.3V)  
VIN  
10kI  
MAX17114  
R7  
68.1kI  
AVDD  
16V, 1A  
XAO  
VIN  
0.1µF  
INVL  
VDET  
C3  
R8  
422kI  
VL  
VL  
VOP  
1µF  
13.3kI  
OPP  
OPN  
0.1µF  
REF  
0.22µF  
REF  
GND  
OPO  
OGND  
2.2kI  
1kI  
ON/OFF  
EN  
DRN  
THR  
13.3kI  
2.2kI  
VCOM  
DLY1  
SS  
0.1µF  
3I  
FLOATING OR 150nF  
AVDD  
FROM  
TCON  
GVOFF  
VGHM  
150µF  
VREF_I  
VGHM  
GREF  
VREF_O  
VGH  
1.61kI  
1.3nF  
SUPP  
R9  
0.1µF  
VREF_FB  
SUPN  
VGH  
35V, 50mA  
D3  
R10  
0.1µF  
DRVP  
1µF  
C12  
D4  
DRVN  
VGOFF  
-6V, 50mA  
C14  
R3  
R4  
0.1µF  
C11  
1µF  
FBN  
FBP  
CPGND  
AVDD  
R5  
C10  
0.1µF  
C13  
D5  
C15  
33pF  
R6  
REF  
Figure 1. Typical Operating Circuit  
18 _____________________________________________________________________________________  
Multi-Output Power Supply with VCOM Amplifier  
and High-Voltage Gamma Reference for LCD TVs  
Typical Operating Circuit  
Detailed Description  
The typical operating circuit (Figure 1) of the MAX17114  
is a complete power-supply system for TFT LCD TV pan-  
els. The circuit generates a +3.3V logic supply, a +16V  
source driver supply, a +35V positive gate-driver supply,  
a -6V negative gate-driver supply, and a Q0.5% high-  
accuracy, high-voltage gamma reference. Table 1 lists  
some selected components and Table 2 lists the contact  
information for component suppliers.  
The MAX17114 is a multiple-output power supply  
designed primarily for TFT LCD TV panels. It contains  
a step-down switching regulator to generate the supply  
for system logic, a step-up switching regulator to gener-  
ate the supply for source driver, and two charge-pump  
regulators to generate the supplies for TFT gate driv-  
ers, a high-accuracy, high-voltage reference supply for  
gamma correction. Each regulator features adjustable  
output voltage, digital soft-start, and timer-delayed fault  
protection. Both the step-down and step-up regulators  
use fixed-frequency current-mode control architecture.  
The two switching regulators are 180N out of phase to  
minimize the input ripple. The internal oscillator offers  
two pin-selectable frequency options (500kHz/750kHz),  
allowing users to optimize their designs based on the  
specific application requirements. The step-up regula-  
tor also features adjustable current limit, which can  
be adjusted through a resistor at the CLIM pin. The  
MAX17114 includes one high-performance operational  
amplifier designed to drive the LCD backplane (VCOM).  
The amplifier features high-output current (Q200mA), fast  
slew rate (45V/Fs), wide bandwidth (20MHz), and rail-  
to-rail outputs. The high-accuracy, high-voltage gamma  
reference has its error controlled to within Q0.5% and  
can deliver more than 60mA current. In addition, the  
MAX17114 features a high-voltage switch-control block,  
an internal 5V linear regulator, a 1.25V reference output,  
well-defined power-up and power-down sequences, and  
fault and thermal-overload protection. Figure 2 shows the  
MAX17114 functional diagram.  
Table 1. Component List  
DESIGNATION  
DESCRIPTION  
10FF ±10%, 25V X5R ceramic capacitors  
(1206)  
Murata GRM31CR61E106K  
TDK C3216X5R1E106M  
C1–C4  
22FF ±10%, 6.3V X5R ceramic capacitor  
(0805)  
Murata GRM21BR60J226K  
TDK C2012X5R0J226K  
C5  
Schottky diodes 30V, 3A (M-flat)  
Toshiba CMS02  
D1, D2  
Dual diodes 30V, 200mA (3 SOT23)  
Zetex BAT54S  
Fairchild BAT54S  
D3, D4, D5  
Inductor, 10FH, 3A, 45mIinductor  
(8.3mm x 9.5mm x 3mm)  
Coiltronics SD8328-100-R  
Sumida CDRH8D38NP-100N (8.3mm x  
8.3mm x 4mm)  
L1  
L2  
Inductor, 4.7FH, 3A, 24.7mIinductor  
(8.3mm x 9.5mm x 3mm)  
Coiltronics SD8328-4R7-R  
Sumida CDRH8D38NP-4R7N (8.3mm x  
8.3mm x 4mm)  
Table 2. Component Suppliers  
SUPPLIER  
Fairchild Semiconductor  
Sumida Corp.  
PHONE  
FAX  
WEBSITE  
www.fairchildsemi.com  
www.sumida.com  
408-822-2000  
847-545-6700  
847-803-6100  
949-455-2000  
408-822-2102  
847-545-6720  
847-390-4405  
949-859-3963  
TDK Corp.  
www.component.tdk.com  
www.toshiba.com/taec  
Toshiba America Electronic Components, Inc.  
______________________________________________________________________________________ 19  
Multi-Output Power Supply with VCOM Amplifier  
and High-Voltage Gamma Reference for LCD TVs  
VIN  
L1  
BST  
IN2  
LX1  
VL  
OUT  
LX2  
STEP-UP  
REG  
STEP-DOWN  
REG  
PGND  
FB1  
OSC  
COMP  
OUT  
FSEL  
CLIM  
GD_I  
GD  
VL (OR 3.3V)  
VIN  
AVDD  
FB2  
150mV  
VIN  
INVL  
REF  
XAO  
VL  
VL  
VL  
VDET  
REF  
REF  
REF  
VOP  
OPP  
GND  
EN  
VCOM  
AMP  
ON/OFF  
DLY1  
SS  
OPN  
OPO  
VCOM  
OGND  
AVDD  
VREF_I  
DRN  
GREF  
VREF_O  
GAMMA  
REF  
THR  
HIGH-  
VOLTAGE  
SWITCH  
BLOCK  
GVOFF  
FROM  
TCON  
VREF_FB  
SUPN  
VGHM  
VGHM  
VGH  
IN2  
SUPP  
50%  
OSC  
GD_I  
VGH  
DRVP  
VGOFF  
NEGATIVE  
CHARGE  
PUMP  
POSITIVE  
CHARGE  
PUMP  
DRVN  
CPGND  
CPGND  
FBN  
FBP  
AVDD  
REF  
Figure 2. Functional Diagram  
20 _____________________________________________________________________________________  
Multi-Output Power Supply with VCOM Amplifier  
and High-Voltage Gamma Reference for LCD TVs  
GND to enable the 3.3V fixed-output voltage. Connect a  
resistive voltage-divider between OUT and GND with the  
center tap connected to FB2 to adjust the output voltage.  
Choose RB (resistance from FB2 to GND) to be between  
5kIand 50kI, and solve for RA (resistance from OUT to  
FB2) using the equation:  
Step-Down Regulator  
The step-down regulator consists of an internal n-chan-  
nel MOSFET with gate driver, a lossless current-sense  
network, a current-limit comparator, and a PWM con-  
troller block. The external power stage consists of a  
Schottky diode rectifier, an inductor, and output capaci-  
tors. The output voltage is regulated by changing the  
duty cycle of the high-side MOSFET. A bootstrap circuit  
that uses a 0.1FF flying capacitor between LX2 and  
BST provides the supply voltage for the high-side gate  
driver. Although the MAX17114 also includes a 10I  
(typ) low-side MOSFET, this switch is used to charge the  
bootstrap capacitor during startup and maintains fixed-  
frequency operation at light load and cannot be used as  
a synchronous rectifier. An external Schottky diode (D2  
in Figure 1) is always required.  
V
OUT  
RA = RB×  
-1  
V
FB2  
where V  
FB2  
= 1.25V, and V may vary from 1.5V to 5V.  
OUT  
Because FB2 is a very sensitive pin, a noise filter is gen-  
erally required for FB2 in adjustable-mode operation.  
Place an 82pF capacitor from FB2 to GND to prevent  
unstable operation. No filter is required for 3.3V fixed-  
mode operation.  
Soft-Start  
The step-down regulator includes a 7-bit soft-start DAC  
that steps its internal reference voltage from zero to 1.25V  
in 128 steps. The soft-start period is 3ms (typ) and FB2  
fault detection is disabled during this period. The soft-start  
feature effectively limits the inrush current during startup  
(see the Step-Down Regulator Heavy-Load Soft-Start (1A)  
waveform in the Typical Operating Characteristics).  
PWM Controller Block  
The heart of the PWM control block is a multi-input, open-  
loop comparator that sums three signals: the output-  
voltage signal with respect to the reference voltage, the  
current-sense signal, and the slope-compensation signal.  
The PWM controller is a direct-summing type, lacking a  
traditional error amplifier and the phase shift associated  
with it. This direct-summing configuration approaches  
ideal cycle-by-cycle control over the output voltage.  
Step-Up Regulator  
The step-up regulator employs a current-mode, fixed-fre-  
quency PWM architecture to maximize loop bandwidth  
and provide fast-transient response to pulsed loads  
typical of TFT LCD panel source drivers. The integrated  
MOSFET and the built-in digital soft-start function reduce  
the number of external components required while con-  
trolling inrush currents. The output voltage can be set  
The step-down controller always operates in fixed-fre-  
quency PWM mode. Each pulse from the oscillator sets  
the main PWM latch that turns on the high-side switch  
until the PWM comparator changes state. As the high-  
side switch turns off, the low-side switch turns on. The  
low-side switch stays on until the beginning of the next  
clock cycle.  
from V to 20V with an external resistive voltage-divider.  
IN  
Current Limiting and Lossless Current Sensing  
The current-limit circuit turns off the high-side MOSFET  
switch whenever the voltage across the high-side  
MOSFET exceeds an internal threshold. The actual cur-  
rent limit is typically 3.2A.  
The regulator controls the output voltage and the power  
delivered to the output by modulating duty cycle D of  
the internal power MOSFET in each switching cycle. The  
duty cycle of the MOSFET is approximated by:  
For current-mode control, an internal lossless sense  
network derives a current-sense signal from the inductor  
DCR. The time constant of the current-sense network is  
not required to match the time constant of the inductor  
and has been chosen to provide sufficient current ramp  
signal for stable operation at both operating frequencies.  
The current-sense signal is AC-coupled into the PWM  
comparator, eliminating most DC output-voltage varia-  
tion with load current.  
V
+ V  
+ V  
- V  
IN  
AVDD  
DIODE  
- V  
DIODE LX1  
D ≈  
V
AVDD  
where V  
is the output voltage of the step-up regu-  
is the voltage drop across the diode, and  
is the voltage drop across the internal MOSFET.  
AVDD  
lator, V  
V
DIODE  
LX1  
PWM Controller Block  
An error amplifier compares the signal at FB1 to 1.25V  
and changes the COMP output. The voltage at COMP  
sets the peak inductor current. As the load varies, the  
error amplifier sources or sinks current to the COMP  
Dual-Mode Feedback  
The step-down regulator of the MAX17114 supports  
both fixed output and adjustable output. Connect FB2 to  
______________________________________________________________________________________ 21  
Multi-Output Power Supply with VCOM Amplifier  
and High-Voltage Gamma Reference for LCD TVs  
output accordingly to produce the inductor peak cur-  
rent necessary to service the load. To maintain stabil-  
ity at high duty cycles, a slope-compensation signal is  
summed with the current-sense signal.  
with a 10FA (typ) internal current source. The external  
p-channel MOSFET turns on and connects the cathode  
of the step-up regulator Schottky catch diode to the  
step-up regulator load capacitors when GD falls below  
the turn-on threshold of the MOSFET. When V  
reaches  
GD  
On the rising edge of the internal clock, the controller  
sets a flip-flop, turning on the n-channel MOSFET and  
applying the input voltage across the inductor. The  
current through the inductor ramps up linearly, storing  
energy in its magnetic field. Once the sum of the current-  
feedback signal and the slope compensation exceed  
the COMP voltage, the controller resets the flip-flop  
and turns off the MOSFET. Since the inductor current is  
continuous, a transverse potential develops across the  
inductor that turns on diode D1. The voltage across the  
inductor then becomes the difference between the out-  
put voltage and the input voltage. This discharge condi-  
tion forces the current through the inductor to ramp back  
down, transferring the energy stored in the magnetic  
field to the output capacitor and the load. The MOSFET  
remains off for the rest of the clock cycle.  
V
- 6V (GD done), the step-up regulator is enabled  
GD_I  
and initiates a soft-start routine.  
When not using this feature, leave GD high impedance,  
and connect GD_I to the output of the step-up converter.  
Soft-Start  
The step-up regulator achieves soft-start by linearly  
ramping up its internal current limit. The soft-start is  
either done internally when the capacitance on pin SS is  
< 200pF or externally when capacitance on pin SS is >  
200pF. The internal soft-start ramps up the current limit  
in 128 steps in 12ms. The external soft-start terminates  
when the SS pin voltage reaches 1.25V. The soft-start  
feature effectively limits the inrush current during startup  
(see the Step-Up Regulator Heavy-Load Soft-Start (0.5A)  
waveform in the Typical Operating Characteristics).  
Step-Up Regulator External pMOS Pass Switch  
As shown in Figure 1, a series external p-channel  
MOSFET can be installed between the cathode of the  
step-up regulator Schottky catch diode and the AVDD  
filter capacitors. This feature is used to sequence power  
to AVDD after the MAX17114 has proceeded through  
normal startup to limit input-surge current during the  
output capacitor initial charge, and to provide true shut-  
down when the step-up regulator is disabled. When EN  
is low, GD is internally pulled up to GD_I through a 25I  
resistor. Once EN is high and the negative charge-pump  
regulator is in regulation, the GD starts pulling down  
Positive Charge-Pump Regulator  
The positive charge-pump regulator is typically used to  
generate the positive supply rail for the TFT LCD gate-  
driver ICs. The output voltage is set with an external  
resistive voltage-divider from its output to GND with the  
midpoint connected to FBP. The number of charge-pump  
stages and the setting of the feedback divider determine  
the output voltage of the positive charge-pump regula-  
tor. The charge pump includes a high-side p-channel  
MOSFET (P1) and a low-side n-channel MOSFET (N1) to  
control the power transfer as shown in Figure 3.  
GD_I  
SUPP  
OSC  
C12  
ERROR  
AMPLIFIER  
D5  
D3  
P1  
N1  
C14  
REF  
1.25V  
DRVP  
C13  
VGH  
MAX17114  
C15  
CPGND  
FBP  
POSITIVE CHARGE-PUMP REGULATOR  
Figure 3. Positive Charge-Pump Regulator Block Diagram  
22 _____________________________________________________________________________________  
Multi-Output Power Supply with VCOM Amplifier  
and High-Voltage Gamma Reference for LCD TVs  
During the first half cycle, N1 turns on and charges flying  
capacitors C12 and C13 (Figure 3). During the second  
half cycle, N1 turns off and P1 turns on, level shifting C12  
the output of the negative charge-pump regulator. The  
charge-pump controller includes a high-side p-channel  
MOSFET (P2) and a low-side n-channel MOSFET (N2) to  
control the power transfer as shown in Figure 4.  
and C13 by V  
volts. If the voltage across C15 (V  
)
SUPP  
GH  
plus a diode drop (VD) is smaller than the level-shifted  
flying-capacitor voltage (VC13) plus V , charge  
During the first half cycle, P2 turns on, and flying capacitor  
SUPP  
C10 charges to V  
minus a diode drop (Figure 4).  
SUPN  
flows from C13 to C15 until the diode (D3) turns off. The  
amount of charge transferred to the output is determined  
by the error amplifier that controls N1’s on-resistance.  
During the second half cycle, P2 turns off, and N2 turns  
on, level shifting C10. This connects C10 in parallel with  
reservoir capacitor C11. If the voltage across C11 minus  
a diode drop is greater than the voltage across C10,  
charge flows from C11 to C10 until the diode (D4) turns  
off. The amount of charge transferred from the output is  
determined by the error amplifier that controls N2’s on-  
resistance.  
Each time it is enabled, the positive charge-pump regu-  
lator goes through a soft-start routine by ramping up its  
internal reference voltage from 0 to 1.25V in 128 steps.  
The soft-start period is 1.8ms (typ) and FBP fault detec-  
tion is disabled during this period. The soft-start feature  
effectively limits the inrush current during startup.  
The negative charge-pump regulator is enabled after  
the step-down regulator finishes soft-start. Each time it  
is enabled, the negative charge-pump regulator goes  
through a soft-start routine by ramping down its internal  
reference voltage from 1.25V to 250mV in 128 steps. The  
soft-start period is 1.8ms (typ) and FBN fault detection  
is disabled during this period. The soft-start feature  
effectively limits the inrush current during startup.  
Negative Charge-Pump Regulator  
The negative charge-pump regulator is typically used to  
generate the negative supply rail for the TFT LCD gate-  
driver ICs. The output voltage is set with an external  
resistive voltage-divider from its output to REF with the  
midpoint connected to FBN. The number of charge-pump  
stages and the setting of the feedback divider determine  
SUPN  
IN2  
MAX17114  
OSC  
ERROR  
AMPLIFIER  
P2  
C10  
REF  
0.25V  
DRVN  
D4  
N2  
VGOFF  
C11  
CPGND  
FBN  
NEGATIVE CHARGE-PUMP REGULATOR  
R5  
REF  
R6  
Figure 4. Negative Charge-Pump Regulator Block Diagram  
______________________________________________________________________________________ 23  
Multi-Output Power Supply with VCOM Amplifier  
and High-Voltage Gamma Reference for LCD TVs  
REF  
MAX17114  
10µA  
DLY1  
FAULT  
SHDN  
EN  
Q4  
GD DONE  
VGH  
V
REF  
Q1  
VGHM  
9R  
R
1kI  
Q2  
XAO  
DRN  
THR  
GVOFF  
Figure 5. Switch Control  
High-Voltage Switch Control  
The MAX17114’s high-voltage switch-control block (Figure  
5) consists of two high-voltage p-channel MOSFETs: Q1,  
between VGH and VGHM and Q2, between VGHM and  
Operational Amplifier  
The operational amplifier is typically used to drive the  
LCD backplane (VCOM). It features Q200mA output  
short-circuit current, 45V/Fs slew rate, and 20MHz/3dB  
bandwidth. The rail-to-rail input and output capability  
maximizes system flexibility.  
DRN. The switch control block is enabled when V  
DLY1  
exceedsV .Q1andQ2arecontrolledbyGVOFFandXAO.  
REF  
When GVOFF is logic high, Q1 turns on and Q2 turns  
off, connecting VGHM to VGH. When GVOFF is logic  
low, Q1 turns off and Q2 turns on, connecting VGHM to  
DRN. VGHM can then be discharged through a resistor  
connected between DRN and GND or AVDD. Q2 turns  
off and stops discharging VGHM when VGHM reaches  
10 times the voltage on THR.  
Short-Circuit Current Limit and Input Clamp  
The operational amplifier limits short-circuit current to  
approximately Q200mA if the output is directly shorted  
to VOP or to OGND. If the short-circuit condition persists,  
the junction temperature of the IC rises until it reaches  
the thermal-shutdown threshold (+160NC typ). Once  
the junction temperature reaches the thermal-shutdown  
threshold, an internal thermal sensor immediately sets  
the thermal fault latch, shutting off all the IC’s outputs.  
The device remains inactive until the input voltage is  
cycled. The operational amplifiers have 4V input clamp  
structures in series with a 500I resistance and a diode  
(Figure 6).  
When XAO is triggered, Q1 is turned on to pull VGHM  
high to VGH to facilitate discharging the panel until  
there’s enough voltage on the VGH pin.  
The switch-control block is disabled and DLY1 is held  
low when the LCD is shut down or in a fault state.  
24 _____________________________________________________________________________________  
Multi-Output Power Supply with VCOM Amplifier  
and High-Voltage Gamma Reference for LCD TVs  
Reference Voltage (REF)  
The reference output is nominally 1.25V, and can source  
at least 50FA (see the Typical Operating Characteristics).  
MAX17114  
VL is the input of the internal reference block. Bypass  
4OP  
REF with a 0.22FF ceramic capacitor connected between  
REF and GND.  
OPP  
High-Accuracy,  
High-Voltage Gamma Reference  
The LDO is typically used to drive a gamma-correction  
divider string. Its output voltage is adjustable through a  
resistor-divider. This LDO features high output accuracy  
OPN  
(Q0.5%) and low-dropout voltage (0.25V, typ) and can  
supply at least 60mA.  
OPO  
OGND  
XAO Function  
XAO is an open-drain output that connects to GND when  
VDET is below its detection threshold (1.25V, typ). In the  
meantime, VGHM is tied to VGH. XAO is guaranteed to  
remain low until VGH is above 6.6V and VL > 2.5V.  
Figure 6. Op Amp Input Clamp Structure  
Frequency Selection and  
Out-of-Phase Operation (FSEL)  
Driving Pure Capacitive Load  
The step-down regulator and step-up regulator use  
The LCD backplane consists of a distributed series  
the same internal oscillator. The FSEL input selects  
capacitance and resistance, a load that can be easily  
the switching frequency. Table 3 shows the switching  
driven by the operational amplifier. However, if the  
frequency based on the FSEL connection. High-  
operational amplifier is used in an application with a pure  
frequency (750kHz) operation optimizes the application  
capacitive load, steps must be taken to ensure stable  
for the smallest component size, trading off efficiency  
operation. As the operational amplifier’s capacitive load  
due to higher switching losses. Low-frequency (500kHz)  
increases, the amplifier’s bandwidth decreases and gain  
operation offers the best overall efficiency at the expense  
of component size and board space.  
peaking increases. A 5I to 50I small resistor placed  
between OPO and the capacitive load reduces peaking,  
but also reduces the gain. An alternative method of  
reducing peaking is to place a series RC network  
(snubber) in parallel with the capacitive load. The RC  
network does not continuously load the output or reduce  
the gain. Typical values of the resistor are between 100I  
and 200I, and the typical value of the capacitor is 10nF.  
To reduce the input RMS current, the step-down regulator  
and the step-up regulator operate 180N out-of-phase  
from each other. This feature allows the use of less input  
capacitance.  
Table 3. Frequency Selection  
SWITCHING FREQUENCY  
Linear Regulator (VL)  
The MAX17114 includes an internal linear regulator. INVL  
is the input of the linear regulator. The input voltage range  
is between 8V and 16.5V. The output voltage is set to 5V.  
The regulator powers the internal MOSFET drivers, PWM  
controllers, charge-pump regulators, and logic circuitry.  
The total external load capability is 25mA. Bypass VL to  
GND with a minimum 1FF ceramic capacitor.  
FSEL  
(kHz)  
VL, INVL, OR FLOAT  
GND  
750  
500  
______________________________________________________________________________________ 25  
Multi-Output Power Supply with VCOM Amplifier  
and High-Voltage Gamma Reference for LCD TVs  
place. This saves one capacitor from system design. If  
an external capacitor greater than 200pF is used, a 5FA  
current source charges the SS capacitor pin and when  
the SS voltage reaches 1.25V, soft-start is done.  
Power-Up Sequence  
The step-down regulator starts up when the MAX17114’s  
internal reference voltage (REF) is above its undervolt-  
age lockout (UVLO) threshold. Once the step-down  
regulator soft-start is done, the FB2 fault-detection circuit  
and the negative charge pump are enabled.  
Gamma reference and the positive charge pump are  
enabled after the step-up regulator finishes its soft-start.  
After the positive charge-pump’s soft-start is done, the  
When EN goes to logic high, a 10FA current source  
starts to pull down on GD, turning on the external GD_I-  
high-voltage switch-delay block is enabled. C  
is  
DLY1  
charged with an internal 10FA current source and V  
DLY1  
AVDD pMOS switch. When V  
reaches the GD-done  
GD  
rises linearly. When V  
reaches REF, the high-voltage  
DLY1  
threshold (V  
- 6V), the step-up regulator is enabled.  
GD_I  
switch block is enabled. The FB1 fault-detection circuit is  
enabled after the step-up regulator reaches regulation,  
and similarly the FBP fault-detection circuit is enabled  
after the positive charge pump reaches regulation.  
The MAX17114 simplifies system design by including an  
internal 12ms soft-start. When the capacitor on the SS  
pin is less than 200pF, the internal 12ms soft-start is in  
V
IN  
INVL UVLO  
VL/REF  
EN  
REF  
UVLO  
BUCK OUTPUT  
TIME  
TIME  
t
SS  
NEGATIVE  
CHARGE-PUMP  
REGULATOR  
OUTPUT  
POSITIVE  
CHARGE-PUMP  
REGULATOR  
OUTPUT  
AVDD  
GREF  
GD  
GD  
SS  
DONE  
REF  
TIME  
TIME  
t
SS  
t
SS  
DLY1  
REF  
VGHM FLOATING  
VGHM  
VGHM DEPENDS ON GVOFF  
TIME  
Figure 7. Power-Up Sequence  
26 _____________________________________________________________________________________  
Multi-Output Power Supply with VCOM Amplifier  
and High-Voltage Gamma Reference for LCD TVs  
exact inductor value is not critical and can be adjusted  
to make trade-offs among size, cost, and efficiency.  
Lower inductor values minimize size and cost, but they  
also increase the output ripple and reduce the efficiency  
due to higher peak currents. On the other hand, higher  
inductor values increase efficiency, but at some point  
resistive losses due to extra turns of wire exceed the  
benefit gained from lower AC current levels.  
Fault Protection  
During steady-state operation, if any output of the four  
regulators’ output (step-down regulator, step-up regulator,  
positive charge-pump regulator, and negative charge-  
pump regulator) goes lower than its respective fault-  
detection threshold, the MAX17114 activates an internal  
fault timer. If any condition or the combination of conditions  
indicates a continuous fault for the fault-timer duration  
(50ms, typ), the MAX17114 latches off all its outputs.  
The inductor’s saturation current must exceed the peak  
inductor current. The peak current can be calculated by:  
If a short has happened to any of the four regulator  
outputs, no fault timer is applied; the part latches off  
immediately. Pay special attention to shorts on the step-  
up regulator and positive charge pump. Make sure when  
a short happens, negative ringing on VREF_I (connected  
to the step-up regulator output) and VGH (connected to  
the positive charge-pump output) does not exceed the  
Absolute Maximum Ratings. Otherwise, physical damage  
of the part may occur. Cycle the input voltage to clear the  
fault latch and restart the supplies.  
V
× V  
- V  
(
)
OUT  
f
IN2 OUT  
I
=
OUT_RIPPLE  
×L × V  
2 IN2  
SW  
I
OUT_RIPPLE  
2
I
= I  
+
OUT(MAX)  
OUT_PEAK  
The inductor’s DC resistance should be low for good  
efficiency. Find a low-loss inductor having the lowest  
possible DC resistance that fits in the allotted dimensions.  
Ferrite cores are often the best choice. Shielded-  
core geometries help keep noise, EMI, and switching  
waveform jitter low.  
Thermal-Overload Protection  
The thermal-overload protection prevents excessive  
power dissipation from overheating the MAX17114.  
When the junction temperature exceeds T = +160NC, a  
J
Considering the typical operation circuit in Figure 1, the  
thermal sensor immediately activates the fault protection,  
which shuts down all the outputs. Cycle the input voltage  
to clear the fault latch and restart the MAX17114.  
maximum load current I  
is 1.5A with a 3.3V  
OUT(MAX)  
output and a typical 12V input voltage. Choosing an LIR  
of 0.4 at this operation point:  
The thermal-overload protection protects the controller in  
the event of fault conditions. For continuous operation, do  
not exceed the absolute maximum junction temperature  
3.3V ×(12V - 3.3V)  
12V ×750kHz ×1.5A × 0.4  
L
=
5.3FH  
2
rating of T = +150NC.  
J
Pick L = 4.7FH. At that operation point, the ripple current  
and the peak current are:  
2
Design Procedure  
3.3V × 12V - 3.3V  
(
)
Step-Down Regulator  
I
=
= 0.68A  
OUT_RIPPLE  
750kHz × 4.7FH×12V  
Inductor Selection  
Three key inductor parameters must be specified:  
inductance value (L), peak current (I ), and DC  
0.68A  
PEAK  
I
= 1.5A +  
= 1.84A  
OUT_PEAK  
resistance (R ). The following equation includes a  
2
DC  
constant, LIR, which is the ratio of peak-to-peak inductor  
ripple current to DC load current. A higher LIR value  
allows smaller inductance, but results in higher losses  
and higher ripple. A good compromise between size and  
losses is typically found at a 30% ripple current-to-load  
current ratio (LIR = 0.3), which corresponds to a peak  
inductor current 1.15 times the DC load current:  
Input Capacitors  
The input filter capacitors reduce peak currents drawn  
from the power source and reduce noise and voltage  
ripple on the input caused by the regulator’s switching.  
They are usually selected according to input ripple  
current requirements and voltage rating, rather than  
capacitance value. The input voltage and load current  
V
× V  
(
- V  
)
OUT  
IN2 OUT  
L
=
determine the RMS input ripple current (I  
):  
RMS  
2
V
× f  
×I  
×LIR  
IN2 SW OUT(MAX)  
V
× V  
- V  
(
)
OUT  
IN2 OUT  
where I  
is the maximum DC load current, and  
OUT(MAX)  
I
= I  
×
OUT  
RMS  
V
the switching frequency (f ) is 750kHz when FSEL is  
tied to VL and 500kHz when FSEL is tied to GND. The  
SW  
IN2  
______________________________________________________________________________________ 27  
Multi-Output Power Supply with VCOM Amplifier  
and High-Voltage Gamma Reference for LCD TVs  
The worst case is I  
= 0.5 x I  
, which occurs at V  
IN2  
The step-down regulator’s output capacitor and ESR  
also affect the voltage undershoot and overshoot when  
the load steps up and down abruptly. The undershoot  
and overshoot also have two components: the voltage  
steps caused by ESR, and voltage sag and soar due to  
the finite capacitance and inductor slew rate. Use the  
following formulas to check if the ESR is low enough  
and the output capacitance is large enough to prevent  
excessive soar and sag.  
RMS  
OUT  
= 2 x V  
.
OUT  
For most applications, ceramic capacitors are used  
because of their high ripple current and surge current  
capabilities. For optimal circuit long-term reliability,  
choose an input capacitor that exhibits less than +10NC  
temperature rise at the RMS input current corresponding  
to the maximum load current.  
Output-Capacitor Selection  
Since the MAX17114’s step-down regulator is internally  
compensated, it is stable with any reasonable amount  
of output capacitance. However, the actual capacitance  
and equivalent series resistance (ESR) affect the  
regulator’s output ripple voltage and transient response.  
The rest of this section deals with how to determine the  
output capacitance and ESR needs according to the  
ripple voltage and load-transient requirements.  
The amplitude of the ESR step is a function of the load  
step and the ESR of the output capacitor:  
V
= DI  
×R  
OUT ESR_OUT  
OUT_ESR_STEP  
The amplitude of the capacitive sag is a function of the  
load step, the output capacitor value, the inductor value,  
the input-to-output voltage differential, and the maximum  
duty cycle:  
The output-voltage ripple has two components: variations  
in the charge stored in the output capacitor, and the  
voltage drop across the capacitor’s ESR caused by the  
current into and out of the capacitor:  
2
L
×(DI  
)
OUT  
2
V
=
OUT_SAG  
2× C  
× V  
(
×D  
- V  
MAX OUT  
)
OUT  
IN2(MIN)  
The amplitude of the capacitive soar is a function of the  
load step, the output capacitor value, the inductor value,  
and the output voltage:  
V
= V  
+ V  
OUT_RIPPLE  
OUT_RIPPLE(ESR) OUT_RIPPLE(C)  
V
= I  
×R  
OUT_RIPPLE ESR_OUT  
OUT_RIPPLE(ESR)  
2
L
×(DI  
)
2
OUT  
V
=
OUT_SOAR  
2× C  
× V  
OUT  
OUT  
I
OUT_RIPPLE  
V
=
OUT_RIPPLE(C)  
8× C  
× f  
Keeping the full-load overshoot and undershoot less  
than 3% ensures that the step-down regulator’s natural  
integrator response dominates. Given the component  
values in the circuit of Figure 1, during a full 1.5A step-  
load transient, the voltage step due to capacitor ESR  
is negligible. The voltage sag and soar are 76mV and  
73mV, respectively.  
OUT SW  
whereI  
_
isdefinedintheStep-DownRegulator,  
OUT RIPPLE  
Inductor Selection section, C  
output capacitance, and R  
output capacitor C  
(C5 in Figure 1) is the  
is the ESR of the  
OUT  
_
ESR OUT  
. In Figure 1’s circuit, the inductor  
OUT  
ripple current is 0.68A. If the voltage-ripple requirement of  
Figure 1’s circuit is P 1% of the 3.3V output, then the total  
peak-to-peak ripple voltage should be less than 66mV.  
Assuming that the ESR ripple and the capacitive ripple  
each should be less than 50% of the total peak-to-peak  
ripple, then the ESR should be less than 48.5mIand the  
output capacitance should be more than 3.4FF to meet  
the total ripple requirement. A 22FF capacitor with ESR  
(including PCB trace resistance) of 10mI is selected  
for the typical operating circuit in Figure 1, which easily  
meets the voltage-ripple requirement.  
Rectifier Diode  
The MAX17114’s high switching frequency demands a  
high-speed rectifier. Schottky diodes are recommended  
for most applications because of their fast recovery time  
and low forward voltage. In general, a 2A Schottky diode  
works well in the MAX17114’s step-up regulator.  
28 _____________________________________________________________________________________  
Multi-Output Power Supply with VCOM Amplifier  
and High-Voltage Gamma Reference for LCD TVs  
Choose an available inductor value from an appropriate  
inductor family. Calculate the maximum DC input current  
Step-Up Regulator  
Inductor Selection  
The inductance value, peak-current rating, and series  
resistance are factors to consider when selecting  
the inductor. These factors influence the converter’s  
efficiency, maximum output load capability, transient  
response time, and output-voltage ripple. Physical size  
and cost are also important factors to be considered.  
at the minimum input voltage V  
using conservation  
IN(MIN)  
of energy and the expected efficiency at that operating  
point (E ) taken from an appropriate curve in the  
MIN  
Typical Operating Characteristics:  
I
× V  
AVDD  
AVDD(MAX)  
I
=
IN(DC,MAX)  
V
× η  
MIN  
IN(MIN)  
The maximum output current, input voltage, output  
voltage, and switching frequency determine the inductor  
value. Very high inductance values minimize the current  
ripple and therefore reduce the peak current, which  
decreases core losses in the inductor and I2R losses in  
the entire power path. However, large inductor values  
also require more energy storage and more turns of  
wire, which increase physical size and can increase I2R  
losses in the inductor. Low inductance values decrease  
the physical size but increase the current ripple and peak  
current. Finding the best inductor involves choosing the  
best compromise between circuit efficiency, inductor  
size, and cost.  
Calculate the ripple current at that operating point and  
the peak current required for the inductor:  
V
× V  
- V  
AVDD IN(MIN)  
(
)
IN(MIN)  
I
=
AVDD_RIPPLE  
L
× V  
× f  
AVDD  
AVDD SW  
I
AVDD_RIPPLE  
2
I
= I  
+
AVDD_PEAK  
IN(DC,MAX)  
Theinductor’ssaturationcurrentratingandtheMAX17114’s  
LX1 current limit should exceed I  
inductor’s DC current rating should exceed I  
_
and the  
AVDD PEAK  
.
IN(DC,MAX)  
For good efficiency, choose an inductor with less than  
The equations used here include a constant LIR, which  
is the ratio of the inductor peak-to-peak ripple current to  
the average DC inductor current at the full-load current.  
The best trade-off between inductor size and circuit  
efficiency for step-up regulators generally has an LIR  
between 0.3 and 0.5. However, depending on the AC  
characteristics of the inductor core material and ratio of  
inductor resistance to other power-path resistances, the  
best LIR can shift up or down. If the inductor resistance  
is relatively high, more ripple can be accepted to  
reduce the number of turns required and increase the  
wire diameter. If the inductor resistance is relatively low,  
increasing inductance to lower the peak current can  
decrease losses throughout the power path. If extremely  
thin high-resistance inductors are used, as is common  
for LCD panel applications, the best LIR can increase to  
between 0.5 and 1.0.  
0.1Iseries resistance.  
Considering the typical operating circuit (Figure 1), the  
maximum load current (I  
output and a typical input voltage of 12V. Choosing  
an LIR of 0.3 and estimating efficiency of 90% at this  
operating point:  
) is 1A with a 16V  
AVDD(MAX)  
2
12V  
16V  
16V -12V  
90%  
   
  
  
L =  
= 9FH  
1
   
   
1A ×750kHz 0.3  
  
Using the circuit’s minimum input voltage (8V) and  
estimating efficiency of 85% at that operating point:  
1A ×16V  
8V × 85%  
I
=
2.35A  
IN(DC,MAX)  
The ripple current and the peak current are:  
Once a physical inductor is chosen, higher and lower  
values of the inductor should be evaluated for efficiency  
improvements in typical operating regions.  
8V × 16V - 8V  
(
)
I
=
0.53A  
AVDD_RIPPLE  
10FH×16V ×750kHz  
Calculate the approximate inductor value using the  
0.53A  
typical input voltage (V ), the maximum output current  
I
= 2.35A +  
2.62A  
IN  
AVDD_PEAK  
2
(I  
), the expected efficiency (E  
) taken  
TYP  
AVDD(MAX)  
from an appropriate curve in the Typical Operating  
Characteristics, and an estimate of LIR based on the  
above discussion:  
2
V
V
- V  
η
TYP  
LIR  
IN  
AVDD  
IN  
L =  
1
V
I
× f  
AVDD   
AVDD(MAX) SW  
______________________________________________________________________________________ 29  
Multi-Output Power Supply with VCOM Amplifier  
and High-Voltage Gamma Reference for LCD TVs  
Output-Capacitor Selection  
V
V
AVDD  
The total output-voltage ripple has two components:  
the capacitive ripple caused by the charging and  
discharging of the output capacitance, and the ohmic  
ripple due to the capacitor’s ESR:  
R1= R2×  
-1  
FB1  
where V  
, the step-up regulator’s feedback set point,  
is 1.25V. Place R1 and R2 close to the IC.  
FB1  
V
= V  
+ V  
AVDD_RIPPLE(C) AVDD_RIPPLE(ESR)  
AVDD_RIPPLE  
V
Loop Compensation  
Choose R  
to set the high-frequency integrator gain  
for fast-transient response. Choose C  
integrator to zero to maintain loop stability.  
COMP  
I
V
- V  
AVDD IN  
AVDD  
to set the  
AVDD_RIPPLE(C)  
COMP  
C
V
f
AVDD  
AVDD SW  
and:  
For low-ESR output capacitors, use the following  
equations to obtain stable performance and good  
transient response:  
V
I  
R
AVDD_PEAK ESR_AVDD  
AVDD_RIPPLE(ESR)  
100× V × V  
× C  
IN  
AVDD  
AVDD  
where I  
_
is the peak inductor current (see  
AVDD PEAK  
R
COMP  
L
×I  
the Inductor Selection section). For ceramic capacitors,  
AVDD AVDD(MAX)  
the output-voltage ripple is typically dominated by  
V
× C  
AVDD  
V
_
. The voltage rating and temperature  
AVDD RIPPLE(C)  
AVDD  
C
COMP  
characteristics of the output capacitor must also be  
considered. Note that all ceramic capacitors typically  
have large temperature coefficient and bias voltage  
coefficients. The actual capacitor value in circuit is  
typically significantly less than the stated value.  
10×I  
×R  
AVDD(MAX)  
COMP  
To further optimize transient response, vary R  
in 50% steps while observing  
transient-response waveforms.  
in  
COMP  
20% steps and C  
COMP  
Input-Capacitor Selection  
The input capacitor reduces the current peaks drawn  
from the input supply and reduces noise injection  
into the IC. A 22FF ceramic capacitor is used in the  
typical operating circuit (Figure 1) because of the high  
source impedance seen in typical lab setups. Actual  
applications usually have much lower source impedance  
since the step-up regulator often runs directly from the  
output of another regulated supply. Typically, the input  
capacitance can be reduced below the values used in  
the typical operating circuit.  
Charge-Pump Regulators  
Selecting the Number of Charge-Pump Stages  
For highest efficiency, always choose the lowest number  
of charge-pump stages that meet the output requirement.  
The number of positive charge-pump stages is given by:  
V
+ V  
- V  
GH  
DROPOUT AVDD  
n
=
POS  
V
- 2 × V  
D
SUPP  
where n  
stages, V  
is the number of positive charge-pump  
is the output of the positive charge-pump  
POS  
GH  
Rectifier Diode  
The MAX17114’s high switching frequency demands a  
high-speed rectifier. Schottky diodes are recommended  
for most applications because of their fast recovery time  
and low forward voltage. In general, a 2A Schottky diode  
complements the internal MOSFET well.  
regulator, V  
is the supply voltage of the charge-  
SUPP  
pump regulators, V is the forward voltage drop of the  
charge-pump diode, and V  
margin for the regulator. Use V  
D
is the dropout  
= 300mV.  
DROPOUT  
DROPOUT  
The number of negative charge-pump stages is given by:  
-V + V  
GOFF  
DROPOUT  
- 2× V  
D
n
=
Output-Voltage Selection  
The output voltage of the step-up regulator can be  
adjusted by connecting a resistive voltage-divider from  
NEG  
V
SUPN  
where n  
is the number of negative charge-pump  
NEG  
the output (V ) to GND with the center tap connected  
AVDD  
stages and V  
pump regulator.  
is the output of the negative charge-  
GOFF  
to FB1 (see Figure 1). Select R2 in the 10kI to 50kI  
range. Calculate R1 with the following equation:  
30 _____________________________________________________________________________________  
Multi-Output Power Supply with VCOM Amplifier  
and High-Voltage Gamma Reference for LCD TVs  
Output-Voltage Selection  
Adjust the positive charge-pump regulator’s output  
voltage by connecting a resistive voltage-divider from  
VGH output to GND with the center tap connected to FBP  
(Figure 1). Select the lower resistor of divider R4 in the  
10kIto 30kIrange. Calculate upper resistor R3 with the  
following equation:  
The above equations are derived based on the  
assumption that the first stage of the positive charge  
pump is connected to V  
and the first stage of  
AVDD  
the negative charge pump is connected to ground.  
Sometimes fractional stages are more desirable for  
better efficiency. This can be done by connecting the  
first stage to V  
first charge-pump stage is powered from V  
or another available supply. If the  
OUT  
, then the  
OUT  
above equations become:  
V
VGH  
R3 = R4×  
-1  
V
V
+ V  
- V  
D
FBP  
GH  
DROPOUT  
OUT  
n
=
POS  
V
- 2 × V  
SUPP  
where V  
= 1.25V (typ).  
FBP  
-V  
+ V  
+ V  
- 2 × V  
D
Adjust the negative charge-pump regulator’s output  
voltage by connecting a resistive voltage-divider from  
GOFF  
DROPOUT OUT  
n
=
NEG  
V
SUPN  
V
GOFF  
to REF with the center tap connected to FBN  
(Figure 1). Select R6 in the 20kIto 68kIrange. Calculate  
R5 with the following equation:  
Flying Capacitors  
Increasing the flying capacitor CX (connected to DRVP  
and DRVN) value lowers the effective source impedance  
and increases the output-current capability. Increasing  
the capacitance indefinitely has a negligible effect on  
output-current capability because the internal switch  
resistance and the diode impedance place a lower limit  
on the source impedance. A 0.1FF ceramic capacitor  
works well in most low-current applications. The flying  
capacitor’s voltage rating must exceed the following:  
V
- V  
GOFF  
FBN  
R5 = R6 ×  
V
- V  
REF  
= 1.25V. Note that REF  
REF  
FBN  
where V  
= 250mV, V  
FBN  
can only source up to 50FA, using a resistor less than  
20kI, for R6 results in a higher bias current than REF  
can supply.  
High-Accuracy, High-Voltage  
Gamma Reference  
V
> n  
× V  
POS(NEG) SUPP(SUPN)  
CX  
where n  
POS(NEG)  
flying capacitor appears. It is the same as the number of  
charge-pump stages.  
is the number of stages in which the  
Output-Voltage Selection  
The output voltage of the high-accuracy LDO is set by  
connecting a resistive voltage-divider from the output  
(V  
) to AGND with the center tap connected to  
(see Figure 1). Select R10 in the 10kI to 50kI  
REF_O  
Charge-Pump Output Capacitor  
Increasing the output capacitance or decreasing the ESR  
reduces the output-ripple voltage and the peak-to-peak  
transient voltage. With ceramic capacitors, the output-  
voltage ripple is dominated by the capacitance value.  
Use the following equation to approximate the required  
capacitor value:  
V
REF_FB  
range. Calculate R9 with the following equation:  
V
REF_O  
R9 = R10 ×  
-1  
V
REF_FB  
where V  
, the LDO’s feedback set point, is 1.25V.  
REF_FB  
Place R9 and R10 close to the IC.  
I
LOAD_CP  
× V  
RIPPLE_CP  
C
R
OUT_CP  
2× f  
SW  
Input- and Output-Capacitor Selection  
To ensure stability of the LDO, use a minimum of 1FF  
on the regulator’s input (V ) and a minimum of 2.2FF  
where C  
_
is the output capacitor of the charge pump,  
OUT CP  
REF_I  
I
_
is the load current of the charge pump, and  
is the peak-to-peak value of the output ripple.  
LOAD CP  
on the regulator’s output (V ). Place the capacitors  
REF_O  
V
RIPPLE_CP  
near the pins and connect their ground connections  
directly together.  
______________________________________________________________________________________ 31  
Multi-Output Power Supply with VCOM Amplifier  
and High-Voltage Gamma Reference for LCD TVs  
these together with short, wide traces or a small  
ground plane. Similarly, create a power ground island  
(PGND) for the step-up regulator, consisting of the  
input- and output-capacitor grounds and the PGND  
pin. Create a power ground island (CPGND) for the  
positive and negative charge pumps, consisting of  
SUPP and output (VGH, VGOFF) capacitor grounds,  
and negative charge-pump diode ground. Connect  
the step-down regulator ground plane, PGND ground  
plane, and CPGND ground plane together with wide  
traces. Maximizing the width of the power ground  
traces improves efficiency and reduces output-volt-  
age ripple and noise spikes.  
Set the XAO Threshold Voltage  
XAO threshold voltage can be adjusted by connecting a  
resistive voltage-divider from input V to GND with the  
IN  
center tap connected to V  
(see Figure 1). Select R8 in  
DET  
the 10kI to 50kI range. Calculate R7 with the following  
equation:  
V
IN_XAO  
R7 = R8 ×  
-1  
V
DET  
where V  
= 1.25V is the V  
threshold set point.  
DET  
DET  
V
is the desired XAO threshold voltage. Place R7  
and R8 close to the IC.  
IN_XAO  
U Create an analog ground plane (GND) consisting of  
the GND pin, all the feedback-divider ground con-  
nections, the COMP, SS, and DLY1 capacitor ground  
connections, and the device’s exposed backside  
pad. Connect the PGND and GND islands by con-  
necting the two ground pins directly to the exposed  
backside pad. Make no other connections between  
these separate ground planes.  
PCB Layout and Grounding  
Careful PCB layout is important for proper operation. Use  
the following guidelines for good PCB layout:  
U Minimize the area of respective high-current loops  
by placing each DC-DC converter’s inductor, diode,  
and output capacitors near its input capacitors and  
its LX_ and PGND pins. For the step-down regulator,  
the high-current input loop goes from the positive  
terminal of the input capacitor to the IC’s IN2 pin, out  
of LX2, to the inductor, to the positive terminals of the  
output capacitors, reconnecting the output capaci-  
tor and input capacitor ground terminals. The high-  
current output loop is from the inductor to the positive  
terminals of the output capacitors, to the negative  
terminals of the output capacitors, and to the Schottky  
diode (D2). For the step-up regulator, the high-current  
input loop goes from the positive terminal of the input  
capacitor to the inductor, to the IC’s LX1 pin, out of  
PGND, and to the input capacitor’s negative terminal.  
The high-current output loop is from the positive ter-  
minal of the input capacitor to the inductor, to the out-  
put diode (D1), to the positive terminal of the output  
capacitors, reconnecting between the output capaci-  
tor and input capacitor ground terminals. Connect  
these loop components with short, wide connections.  
Avoid using vias in the high-current paths. If vias  
are unavoidable, use many vias in parallel to reduce  
resistance and inductance.  
U Place all feedback voltage-divider resistors as close  
to their respective feedback pins as possible. The  
divider’s center trace should be kept short. Placing  
the resistors far away causes their FB traces to  
become antennas that can pick up switching noise.  
Care should be taken to avoid running any feedback  
trace near LX1, LX2, DRVP, or DRVN.  
U Place the IN2 pin, VL pin, REF pin, and VREF_O pin  
bypass capacitors as close as possible to the device.  
The ground connection of the VL bypass capacitor  
should be connected directly to the GND pin with a  
wide trace.  
U Minimize the length and maximize the width of the  
traces between the output capacitors and the load for  
best transient responses.  
U Minimize the size of the LX1 and LX2 nodes while  
keeping them wide and short. Keep the LX1 and LX2  
nodes away from feedback nodes (FB1, FB2, FBP,  
FBN, and VREF_FB) and analog ground. Use DC  
traces as a shield, if necessary.  
U Create a power ground island for the step-down  
regulator, consisting of the input- and output-capac-  
itor grounds and the diode ground. Connect all  
Refer to the MAX17114 evaluation kit for an example of  
proper board layout.  
32 _____________________________________________________________________________________  
Multi-Output Power Supply with VCOM Amplifier  
and High-Voltage Gamma Reference for LCD TVs  
Pin Configuration  
Chip Information  
PROCESS: BiCMOS  
TOP VIEW  
35 34 33 32 31 30 29 28 27  
36  
26  
25  
SS  
DLY1  
FBP  
24  
23  
22  
37  
38  
39  
CLIM  
FSEL  
Package Information  
For the latest package outline information and land patterns, go  
VGH  
to www.maxim-ic.com/packages.  
21 VL  
VGHM 40  
DRN 41  
20 INVL  
19 VDET  
PACKAGE TYPE PACKAGE CODE DOCUMENT NO.  
SUPN  
DRVN  
42  
43  
48 TQFN-EP  
T4877+3  
21-0144  
MAX17114  
18  
GND  
17 IN2  
16 IN2  
GND 44  
FBN 45  
BST  
14 LX2  
13  
REF  
VREF_FB  
VREF_O  
15  
46  
47  
48  
*EP  
LX2  
2
3
4
5
6
7
8
9
10  
1
11  
12  
THIN QFN  
*EXPOSED PAD  
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied.  
Maxim reserves the right to change the circuitry and specifications without notice at any time.  
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600  
33  
©
2009 Maxim Integrated Products  
Maxim is a registered trademark of Maxim Integrated Products, Inc.  

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