MAX17410EVKIT+ [MAXIM]
Intel IMVP-6 Code-Set Compliant;型号: | MAX17410EVKIT+ |
厂家: | MAXIM INTEGRATED PRODUCTS |
描述: | Intel IMVP-6 Code-Set Compliant |
文件: | 总20页 (文件大小:1047K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
19-4441; Rev 0; 1/09
MAX17410 Evaluation Kit
Evluates:MAX7410
General Description
Features
The MAX17410 evaluation kit (EV kit) demonstrates the
high-power, dynamically adjustable, multiphase IMVP-6+
notebook CPU application circuit. This DC-DC convert-
er steps down high-voltage batteries and/or AC
adapters, generating a precision, low-voltage CPU core
♦ Dual-Phase, Fast-Response Interleaved, Quick-
PWM
♦ Intel IMVP-6+ Code-Set Compliant
♦ Dynamic Phase Selection Optimizes Active/Sleep
V
rail. The MAX17410 EV kit meets the Intel mobile
CC
Efficiency
IMVP-6+ CPU’s transient voltage specification, power-
good signaling, voltage regulator thermal monitoring
(VRHOT), and power monitor output (PMON). The
MAX17410 EV kit consists of the MAX17410 2-phase
interleaved Quick-PWM™ step-down controller. The
MAX17410 EV kit includes active voltage positioning
with adjustable gain, reducing power dissipation, and
bulk output capacitance requirements. A slew-rate con-
troller allows controlled transitions between VID codes,
controlled soft-start and shutdown, and controlled exit
suspend voltage. Precision slew-rate control provides
“just-in-time” arrival at the new DAC setting, minimizing
surge currents to and from the battery.
♦ Transient Phase Overlap Reduces Output
Capacitance
♦ Transient-Overshoot Suppression Feature
♦ Active Voltage Positioning with Adjustable Gain
♦ High Speed, Accuracy, and Efficiency
♦ Low Bulk Output Capacitor Count
♦ 7V to 24V Input-Voltage Range
♦ 0 to 1.5000V Output-Voltage Range (7-Bit DAC)
♦ 38A Load-Current Capability (19A per Phase)
♦ Accurate Current Balance and Current Limit
♦ 300kHz Switching Frequency (per Phase)
Dedicated system inputs (PSI, DPRSTP, and DPRSLPVR)
dynamically select the operating mode and number of
active phases, optimizing the overall efficiency during
the CPU’s active and sleep states.
♦ Power-Good (PWRGD) and Phase-Good
The MAX17410 includes latched output undervoltage-
fault, overvoltage-fault, and thermal-overload protec-
tion. It also includes a voltage regulator power-good
output (PWRGD), a clock enable output (CLKEN), a
power monitor output (PMON), a phase-good output
(PHASEGD), and a system power-good input (PGDN).
(PHASEGD) Outputs and Indicators
♦ Clock Enable (CLKEN) and Thermal-Fault
(VRHOT) Outputs and Indicators
♦ Lead(Pb)-Free and RoHS Compliant
♦ Fully Assembled and Tested
This fully assembled and tested circuit board provides
a digitally adjustable 0 to 1.5000V output voltage (7-bit
on-board DAC) from a 7V to 24V battery input range.
Each phase delivers up to 19A output current for a total
of 38A. The MAX17410 EV kit operates at 300kHz
switching frequency (per phase) and has superior line-
and load-transient response.
Ordering Information
PART
TYPE
MAX17410EVKIT+
EV Kit
+Denotes lead(Pb)-free and RoHS compliant.
Component List
DESIGNATION
QTY
DESCRIPTION
DESIGNATION
QTY
DESCRIPTION
CLKEN, DPRSLPVR,
GND_SENSE,
10µF ±±0%, ±5V X5R ceramic
capacitors (1±10)
PGDIN, PHASEGD,
PMON, PSI, PWRGD,
VID_VCC,
C1–C4
4
TDK C3±±5X7R1E106M
AVX 1±103D106M
Taiyo Yuden TMK3±5BJ106MM
13 Test points
VOUT_SENSE,
VRHOT, VR_ON,
V3P3
Not installed, polymer
capacitor (D case)
C5
0
Quick-PWM is a trademark of Maxim Integrated Products, Inc.
________________________________________________________________ Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
MAX17410 Evaluation Kit
Component List (continued)
DESIGNATION
QTY
DESCRIPTION
DESIGNATION
QTY
DESCRIPTION
0.36µH, 36A, 0.82mΩ power
inductors
Panasonic ETQP4LR36ZFC
NEC TOKIN MPC1055LR36
TOKO FDUE1040D-R36M
330µF, ±V, 4.5Mꢀ low-ESR
polymer capacitors (D case)
Panasonic EEFSX0D331E4 or
NEC TOKIN PSGV0E337M4.5
C6, C7, C8
3
L1, L2
2
Not installed, ceramic
capacitor (0805)
C9
0
±
n-channel MOSFETs (PowerPAK
8 SO)
Fairchild FDS6298 (8 SO)
Vishay (Siliconix) SI4386DY
N1, N2
N3–N6
2
1µF ±10%, 16V X5R ceramic
capacitors (0603)
TDK C1608X5R1C105K
Taiyo Yuden EMK107BJ683MA
Murata GRM188R61C105K
C10, C11
n-channel MOSFETs (PowerPAK
8 SO)
Fairchild FDS8670 (8 SO)
Vishay (Siliconix) SI4626ADY
4
5
0.1µF ±10%, ±5V X7R ceramic
capacitors (0603)
TDK C1608X7R1E104K or
Murata GRM188R71E104K
C1±, C17, C±0, C±1
4
±
R1, R15, R16,
R43, R44
10Ω 5ꢀ resistors (0603)
R2
R3, R19
R4
1
2
1
3
2
61.9kΩ 1ꢀ resistor (0603)
10kΩ 1ꢀ resistors (0603)
4.02kΩ 1ꢀ resistor (0603)
0Ω resistors (0603)
Evluates:MAX7410
0.±±µF ±±0%, 10V X7R ceramic
capacitors (0603)
Taiyo Yuden LMK107BJ±±4MA
TDK C1608X7R1C±±4M
AVX 06033D±±4KAT
C13, C14
R5, R6, R10
R7, R11
3.32kΩ 1ꢀ resistors (0603)
1000pF ±10%, 50V X7R
ceramic capacitors (0603)
TDK C1608X7R1H10±K or
Murata GRM188R71H10±K or
equivalent
Not installed, resistors (0603)
R8, R10, R12, R18, R20, R33, R45,
R48, and R49 are open;
R8, R10, R12, R18,
R20, R33, R34,
R35, R45, R48, R49
C15, C18, C±7
3
0
R34 and R35 are short (PC trace)
R9, R30
2
0
1Ω 1ꢀ resistors (0603)
0.47µF ±±0%, 10V X5R ceramic
capacitor (0603)
R13, R31
Not installed, resistors (0805)
C16
1
0
Murata GRM188R71C474M
Taiyo Yuden LMK107BJ474MA
TDK C1608X5R1A474M
10kΩ 1ꢀ NTC thermistor,
β = 3380 (0603)
Murata NCP18XH103F03RB
TDK NTCG163JH103F
R14
1
C19, C±±–C±6,
C±8, C±9
Not installed, ceramic
capacitors (0603)
R17
R21–R24
R25
1
4
1
1.5kΩ 1ꢀ resistor (0603)
1kΩ 5ꢀ resistors (0603)
4.99kΩ 1ꢀ resistor (0603)
10µF ±±0%, 6.3V X5R ceramic
capacitors (0805)
C30–C61
3± TDK C±01±X5R0J106M or
Taiyo Yuden AMK±1±BJ106MG
AVX 08056D106MAT
100kΩ 5ꢀ NTC thermistor,
β = 4250 (0603)
Murata NCP18WF104J03RB
TDK NTCG163JF104J (0402) or
Panasonic ERT-J1VR104J
R26
1
D1, D±
D3–D6
0
4
Not installed, Schottky diodes
LEDs, green clear SMD (0805)
2
_______________________________________________________________________________________
MAX17410 Evaluation Kit
Evluates:MAX7410
Component List (continued)
DESIGNATION
QTY
DESCRIPTION
DESIGNATION
QTY
DESCRIPTION
R27, R28, R29,
R32, R36–R42
2-phase Quick-PWM VID
controller (48 TQFN)
11 100kΩ 5ꢀ resistors (0603)
U1
1
Maxim MAX17410GTM+
R46, R47
SW1
2
1
1
2kΩ 1ꢀ resistors (0603)
7-position low-profile DIP switch
5-position low-profile DIP switch
U2
—
1
1
CPU socket MPGA479
SW2
PCB: MAX17410 Evaluation Kit+
Component Suppliers
SUPPLIER
PHONE
WEBSITE
AVX Corporation
843-946-0238
888-522-5372
770-436-1300
408-324-1790
800-344-2112
800-348-2496
847-803-6100
847-297-0070
402-563-6866
www.avxcorp.com
Fairchild Semiconductor
www.fairchildsemi.com
www.murata-northamerica.com
www.nec-tokinamerica.com
www.panasonic.com
www.t-yuden.com
Murata Electronics North America, Inc.
NEC TOKIN America, Inc.
Panasonic Corp.
Taiyo Yuden
TDK Corp.
www.component.tdk.com
www.tokoam.com
TOKO America, Inc.
Vishay
www.vishay.com
Note: Indicate that you are using the MAX17410 when contacting these component suppliers.
Set SW1 (1, 14), SW1 (3, 12), SW1 (5, 10), SW1 (7, 8),
and SW1 (7, 8) to the on positions. The output voltage
is set for 0.9750V.
Quick Start
Recommended Equipment
• MAX17410 EV kit
3) Turn on the battery power before turning on the 5V
bias power.
• 7V to 24V, > 100W power supply, battery, or note-
book AC adapter
4) Observe the 0.9750V output voltage with the DMM
and/or oscilloscope. Look at the LX switching
nodes and MOSFET gate-drive signals while vary-
ing the load current.
• 5V at 1A DC bias power supply
• Two loads capable of sinking 19A each
• Digital multimeters (DMMs)
Detailed Description of Hardware
• 100MHz dual-trace oscilloscope
This 38A multiphase buck-regulator design is opti-
mized for a 300kHz switching frequency (per phase)
Procedure
The MAX17410 EV kit is fully assembled and tested.
Follow the steps below to verify board operation:
and output-voltage settings around 1V. At V
= 1V
OUT
and V = 10V, the inductor ripple is approximately
IN
1) Ensure that the circuit is connected correctly to the
supplies and dummy load prior to applying any
power.
45ꢀ (LIR = 0.45). The MAX17410 controller interleaves
all the active phases, resulting in out-of-phase opera-
tion that minimizes the input and output filtering
requirements. The multiphase controller shares the cur-
rent between two phases that operate 180° out-of-
phase supplying up to 19A per phase. Table 1 lists the
MAX17410 operating mode truth table function.
2) Verify that all positions of switch SW2 are off. The
DAC code settings (D6–D0) are set by switch SW1.
_______________________________________________________________________________________
3
MAX17410 Evaluation Kit
2) Switch SW1. When SW1 positions are off, the
MAX17410’s D0–D6 inputs are at logic 1 (connect-
ed to VDD). When SW1 positions are on, D0–D6
inputs are at logic 0 (connected to GND). The out-
put voltage can be changed during operation by
activating SW1 on and off. As shipped, the EV kit is
configured with SW1 positions set for 0.9750V out-
put (Table 2). Refer to the MAX17410 IC data sheet
for more information.
Setting the Output Voltage
The MAX17410 has an internal digital-to-analog con-
verter (DAC) that programs the output voltage. The out-
put voltage can be digitally set from 0 to 1.5000V
(Table 2) from the D0–D6 pins. There are two different
ways of setting the output voltage:
1) Drive the external VID0–VID6 inputs (all SW1 posi-
tions are off). The output voltage is set by driving
VID0–VID6 with open-drain drivers (pullup resistors
are included on the board) or 3V/5V CMOS output
logic levels.
Table 1. MAX17410 Operating Mode Truth Table Functions
INPUTS
PHASE
OPERATION*
SHDN
SW2
(1, 10)
DPRSTP DPRSLPVR
PSI
SW2
(3, 8)
OPERATING MODE
SW2
(5, 6)
SW2
(2, 9)
Low-Power Shutdown Mode. DL1 and DL2 are forced
low and the controller is disabled. The supply current
drops to 1µA (max).
GND
X
X
X
Disabled
Evluates:MAX7410
Startup/Boot. When SHDN is pulled high, the MAX17410
begins the startup sequence. Once the REF is above
1.84V, the controller enables the PWM controller and
ramps the output voltage up to the boot voltage.
Multiphase Forced-PWM
Rising
High
X
X
X
X
X
1/8 R
Slew Rate
TIME
Multiphase Forced-PWM Full Power. The no-load output voltage is determined by
Low
Low
High
Low
Nominal R
Slew Rate the selected VID DAC code (D0–D6, Table 2).
TIME
Intermediate Power. The no-load output voltage is
determined by the selected VID DAC code (D0–D6,
Table 2). When PSI is pulled low, the MAX17410
immediately disables phase 2. DH2 and DL2 are pulled
low.
1-Phase Forced-PWM
Nominal R Slew Rate
High
TIME
Deeper Sleep Mode. The no-load output voltage is
determined by the selected VID DAC code (D0–D6,
Table 2). When DPRSLPVR is pulled high, the
MAX17410 immediately enters 1-phase pulse-skipping
operation allowing automatic PWM/PFM switchover
under light loads. The PWRGD and CLKEN upper
thresholds are blanked. DH2 and DL2 are pulled low.
1-Phase Pulse Skipping
Nominal R Slew Rate
High
High
Low
High
High
X
X
TIME
Deeper Sleep Slow Exit Mode. The no-load output
voltage is determined by the selected VID DAC code
(D0–D6, Table 2). When DPRSTP is pulled high while
DPRSLPVR is already high, the MAX17410 remains in 1-
phase pulse-skipping operation allowing automatic
PWM/PFM switchover under light loads. The PWRGD
and CLKEN upper thresholds are blanked. DH2 and DL2
are pulled low.
1-Phase Pulse Skipping
1/4 R Slew Rate
High
TIME
4
_______________________________________________________________________________________
MAX17410 Evaluation Kit
Evluates:MAX7410
Table 1. MAX17410 Operating Mode Truth Table Functions (continued)
INPUTS
PHASE
OPERATION*
SHDN
SW2
(1, 10)
DPRSTP DPRSLPVR
PSI
SW2
(3, 8)
OPERATING MODE
SW2
(5, 6)
SW2
(2, 9)
Shutdown. When SHDN is pulled low, the MAX17410
immediately pulls PWRGD and PHASEGD low, CLKEN
Multiphase Forced-PWM becomes high impedance, all enabled phases are
Falling
X
X
X
1/8 R
Slew Rate
activated, and the output voltage is ramped down to
ground. Once the output reaches 0V, the controller
enters the low-power shutdown state.
TIME
Fault Mode. The fault latch has been set by the
MAX17410 UVP or thermal-shutdown protection, or by
the OVP protection. The controller remains in FAULT
mode until VCC power is cycled or SHDN toggled.
High
X
X
X
Disabled
*Multiphase operation = All enabled phases active.
X = Don’t care.
Table 2. MAX17410 IMVP-6+ Output-Voltage VID DAC Codes
OUTPUT
VOLTAGE (V)
OUTPUT
VOLTAGE (V)
D6
D5
D4
D3
D2
D1
D0
D6
D5
D4
D3
D2
D1
D0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1.5000
1.4875
1.4750
1.4625
1.4500
1.4375
1.4250
1.4125
1.4000
1.3875
1.3750
1.3625
1.3500
1.3375
1.3250
1.3125
1.3000
1.2875
1.2750
1.2625
1.2500
1.2375
1.2250
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
0.7000
0.6875
0.6750
0.6625
0.6500
0.6375
0.6250
0.6125
0.6000
0.5875
0.5750
0.5625
0.5500
0.5375
0.5250
0.5125
0.5000
0.4875
0.4750
0.4625
0.4500
0.4375
0.4250
_______________________________________________________________________________________
5
MAX17410 Evaluation Kit
Table 2. MAX17410 IMVP-6+ Output-Voltage VID DAC Codes (continued)
OUTPUT
VOLTAGE (V)
OUTPUT
VOLTAGE (V)
D6
D5
D4
D3
D2
D1
D0
D6
D5
D4
D3
D2
D1
D0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
1.2125
1.2000
1.1875
1.1750
1.1625
1.1500
1.1375
1.1250
1.1125
1.1000
1.0875
1.0750
1.0625
1.0500
1.0375
1.0250
1.0125
1.0000
0.9875
0.9750
0.9625
0.9500
0.9375
0.9250
0.9125
0.9000
0.8875
0.8750
0.8625
0.8500
0.8375
0.8250
0.8125
0.8000
0.7875
0.7750
0.7625
0.7500
0.7375
0.7250
0.7125
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0.4125
0.4000
0.3875
0.3750
0.3625
0.3500
0.3375
0.3250
0.3125
0.3000
0.2875
0.2750
0.2625
0.2500
0.2375
0.2250
0.2125
0.2000
0.1875
0.1750
0.1625
0.1500
0.1375
0.1250
0.1125
0.1000
0.0875
0.0750
0.0625
0.0500
0.0375
0.0250
0.0125
0
Evluates:MAX7410
0
0
0
0
0
0
0
6
_______________________________________________________________________________________
MAX17410 Evaluation Kit
Evluates:MAX7410
Reduced Power-Dissipation
Voltage Positioning
Table 3. Shutdown Mode (SHDN)
The MAX17410 includes a transconductance amplifier
for adding gain to the voltage-positioning sense path.
The amplifier’s input is generated by summing the cur-
rent-sense inputs, which differentially sense the voltage
across the inductor’s DCR. The transconductance
amplifier’s output connects to the voltage-positioned
feedback input (FB), so the resistance between FB and
VPS (R4) determines the voltage-positioning gain.
Resistor R4 (4.75kΩ) provides a -2.1mV/A voltage-posi-
tioning slope at the output when all phases are active.
Remote output and ground sensing eliminate any addi-
tional PCB voltage drops.
SW2 (1, 10)
SHDN PIN
MAX17410 OUTPUT
Output enabled—V is
selected by VID DAC code
(D0–D6) settings
OUT
Connected
to VDD
Off
On
Connected
to GND
Shutdown mode, V
= 0V
OUT
DPRSLPVR SW2 (2, 9), PSI SW2 (3, 8)
DPRSLPVR and PSI together determine the operating
mode, as shown in Table 4. The MAX17410 will be
forced into full-phase PWM mode during startup, while
in boot mode, during the transition from boot mode to
VID mode, and during shutdown.
Dynamic Output-Voltage
Transition Experiment
This MAX17410 EV kit is set to transition the output volt-
age at 12.5mV/µs. The speed of the transition is altered
by scaling resistors R2 and R3.
DPRSTP SW2 (5,6)
The DPRSTP logic signal is usually the logical comple-
ment of the DPRSLPVR signal. However, there is a spe-
cial condition when both DPRSTP and DPRSLPVR
could temporarily be simultaneously high. If this hap-
During the voltage transition, watch the inductor current
by looking at the current-sense inputs with a differential
scope probe. Observe the low, well-controlled inductor
current that accompanies the voltage transition. Slew-rate
control during shutdown and startup results in well-con-
trolled currents in to and out of the battery (input source).
pens, the slew rate reduces to 1/4 of the normal (R
-
TIME
based) slew rate for the duration of this condition. The
slew rate returns to normal when this condition is exit-
ed. Note: Only DPRSLPVR and PSI (not DPRSTP)
determine the mode of operation (PWM vs. skip and the
number of active phases). See Table 5.
There are two methods to create an output-voltage tran-
sition. Select D0–D6 (SW1). Then either manually
change the SW1 settings to a new VID code setting
(Table 2), or disable all SW1 settings and drive the
VID0–VID6 PCB test points externally to the desired
code settings.
Table 4. DPRSLPVR, PSI
DPRSLPVR
SW2 (2, 9) SW2 (3, 8)
PSI
POWER
LEVEL
OPERATING
MODE
Switch SW2 Settings
Very low
current
1-phase pulse-
skipping mode
Shutdown SW2 (1, 10)
When SHDN goes low (SW2 (1, 10) = on), the
MAX17410 enters the low-power shutdown mode.
PWRGD is pulled low immediately, and the output volt-
age ramps down at 1/8 the slew rate set by R2 and R3
(71.9kΩ). When the controller reaches the 0V target, the
drivers are disabled (DL1 and DL2 driven high), the ref-
erence is turned off, and the IC supply currents drop to
1µA (max).
On (VDD)
On (VDD)
Off (GND)
On (GND)
Off (VDD)
Low current 1-phase pulse-
(3A)
skipping mode
1-phase forced-
PWM mode
On (GND) Intermediate
Normal
operation—all
phases are active,
forced-PWM mode
Off (GND)
Off (VDD)
Maximum
When a fault condition activates the shutdown
sequence (output undervoltage lockout or thermal shut-
down), the protection circuitry sets the fault latch to pre-
vent the controller from restarting. To clear the fault
latch and reactivate the MAX17410, toggle SHDN or
cycle VDD power. Table 3 shows the shutdown mode
(SHDN).
_______________________________________________________________________________________
7
MAX17410 Evaluation Kit
Table 5. DPRSLPVR, DPRSTP
Table 6. PGDIN
DPRSLPVR
SW2 (2,11)
DPRSTP
SW2 (5,6)
SW2 (4, 7) PGDIN PIN
MAX17410 OUTPUT
FUNCTIONALITY
VOUT remains at the boot
voltage, CLKEN remains high,
and PWRGD remains low.
Connected
Normal slew rate, 1- or 2-phase
forced PWM mode (DPRSLPVR
low ¡ DPRSTP is ignored)
Off
to GND
Off (GND)
On (GND)
Connected VOUT transitions to selected VID
to VDD voltage and CLKEN is pulled low.
Normal slew rate, 1- or 2-phase
Off (VDD) forced PWM mode (DPRSLPVR
On
Off (GND)
On (VDD)
On (VDD)
low ¡ DPRSTP is ignored)
Normal slew rate, 1-phase
On (GND)
automatic pulse-skipping mode
Slew rate reduced to 1/4 of
normal, 1-phase automatic pulse-
skipping mode
Off (VDD)
PGDIN, SW2 (4, 7)
PGDIN indicates the power status of other system rails
and is used for power-supply sequencing. After power-
up to the boot voltage, the output voltage remains at
Evluates:MAX7410
V
, CLKEN remains high, and PWRGD remains low
BOOT
as long as the PGDIN stays low. When PGDIN is pulled
high, the output transitions to selected VID voltage, and
CLKEN is pulled low. If the system pulls PGDIN low
during normal operation, the MAX17410 immediately
drives CLKEN high, pulls PWRGD low, and slews the
output to the boot voltage (using 2-phase pulse-skip-
ping mode). The controller remains at the boot voltage
until PGDIN goes high again, SHDN is toggled, or the
VDD is cycled. See Table 6.
8
_______________________________________________________________________________________
MAX17410 Evaluation Kit
Evluates:MAX7410
Figure 1a. MAX17410 EV Kit Schematic (Sheet 1 of 2)
_______________________________________________________________________________________
9
MAX17410 Evaluation Kit
Evluates:MAX7410
Figure 1b. MAX17410 EV Kit Schematic (Sheet 2 of 2)
10 ______________________________________________________________________________________
MAX17410 Evaluation Kit
Evluates:MAX7410
Figure 2. MAX17410 EV Kit Component Placement Guide—Component Side
______________________________________________________________________________________ 11
MAX17410 Evaluation Kit
Evluates:MAX7410
Figure 3. MAX17410 EV Kit PCB Layout—Component Side
12 ______________________________________________________________________________________
MAX17410 Evaluation Kit
Evluates:MAX7410
Figure 4. MAX17410 EV Kit PCB Layout—Internal Layer 2 (VBATT/PGND Plane)
______________________________________________________________________________________ 13
MAX17410 Evaluation Kit
Evluates:MAX7410
Figure 5. MAX17410 EV Kit PCB Layout—Internal Layer 3 (Signal Layer)
14 ______________________________________________________________________________________
MAX17410 Evaluation Kit
Evluates:MAX7410
Figure 6. MAX17410 EV Kit PCB Layout—Internal Layer 4 (PGND Layer)
______________________________________________________________________________________ 15
MAX17410 Evaluation Kit
Evluates:MAX7410
Figure 7. MAX17410 EV Kit PCB Layout—Internal Layer 5 (AGND/PGND Layer)
16 ______________________________________________________________________________________
MAX17410 Evaluation Kit
Evluates:MAX7410
Figure 8. MAX17410 EV Kit PCB Layout—Internal Layer 6 (Signal Layer)
______________________________________________________________________________________ 17
MAX17410 Evaluation Kit
Evluates:MAX7410
Figure 9. MAX17410 EV Kit PCB Layout—Internal Layer 7 (PGND Layer)
18 ______________________________________________________________________________________
MAX17410 Evaluation Kit
Evluates:MAX7410
Figure 10. MAX17410 EV Kit PCB Layout—Solder Side
______________________________________________________________________________________ 19
MAX17410 Evaluation Kit
Evluates:MAX7410
Figure 11. MAX17410 EV Kit Component Placement Guide—Solder Side
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
20 __________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
© 2009 Maxim Integrated Products
Maxim is a registered trademark of Maxim Integrated Products, Inc.
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